Previous

15994 Revisions

Next

r14977 Friday 20th April, 2012 at 09:04:29 UTC by Miodrag Milanović
Sync with MAME r16034 (nw)

[src/emu]	device.c device.h diimage.c drawgfx.c machine.c machine.h memory.c memory.h romload.c screen.c
[src/emu/cpu/cubeqcpu]	cubeqcpu.c
[src/emu/cpu/esrip]	esrip.c
[src/emu/cpu/mb86233]	mb86233.c
[src/emu/debug]	debugcpu.c dvmemory.c dvmemory.h
[src/emu/imagedev]	cartslot.c
[src/emu/machine]	laserdsc.c mccs1850.c pls100.c
[src/emu/sound]	2610intf.c digitalk.c es5506.c fm.c gaelco.c i5000.c k053260.c k054539.c okim6295.c tms5110.c votrax.c ymz770.c zsg2.c
[src/emu/video]	315_5124.c generic.c hd61830.c pc_cga.c tms9927.c
[src/lib/formats]	ap2_dsk.c ap2_dsk.h dfi_dsk.c
[src/mame/audio]	atarijsa.c cage.c cclimber.c cinemat.c circus.c cyberbal.c dcs.c dkong.c exidy440.c flower.c gomoku.c harddriv.c leland.c m72.c mario.c midway.c midway.h polepos.c segag80r.c segasnd.c seibu.c snes_snd.c snk6502.c suna8.c taito_en.c targ.c williams.c wiping.c
[src/mame/drivers]	1942.c 1943.c 20pacgal.c 2mindril.c 39in1.c 3do.c 40love.c 4enraya.c 5clown.c 8080bw.c 88games.c acefruit.c acesp.c adp.c aeroboto.c aerofgt.c airbustr.c albazc.c albazg.c aleck64.c alg.c aliens.c alpha68k.c amaticmg.c ampoker2.c amspdwy.c angelkds.c appoooh.c aquarium.c arcadecl.c arcadia.c argus.c aristmk4.c aristmk5.c aristmk6.c arkanoid.c armedf.c ashnojoe.c asterix.c astinvad.c astrafr.c astrocde.c astrocorp.c astrof.c asuka.c atarig42.c atarisy2.c atarisy4.c atetris.c atvtrack.c avt.c backfire.c badlands.c balsente.c baraduke.c battlex.c battlnts.c bfcobra.c bfm_sc1.c bfm_sc2.c bfm_sc4.c bfm_sc4h.c bfm_sc5.c bigevglf.c bingoc.c bking.c bladestl.c blitz.c blitz68k.c blktiger.c blmbycar.c blockhl.c bnstars.c boogwing.c bottom9.c boxer.c brkthru.c btime.c bublbobl.c buggychl.c bwing.c cabal.c cabaret.c calchase.c calomega.c calorie.c capbowl.c cardline.c carpolo.c carrera.c caswin.c cave.c cb2001.c cbasebal.c cbuster.c ccastles.c cclimber.c cd32.c cdi.c chaknpop.c cham24.c champbas.c champbwl.c chanbara.c chihiro.c chinagat.c chinsan.c chqflag.c chsuper.c cidelsa.c cinemat.c cischeat.c citycon.c cloud9.c clshroad.c cmmb.c cninja.c cntsteer.c cobra.c coinmstr.c coinmvga.c combatsc.c commando.c compgolf.c contra.c coolpool.c coolridr.c cop01.c corona.c cosmic.c cps1.c cps2.c cps3.c crgolf.c crimfght.c crospang.c crshrace.c crystal.c cshooter.c csplayh5.c cultures.c cvs.c cybertnk.c cyclemb.c d9final.c dacholer.c dambustr.c darius.c darkhors.c darkmist.c darkseal.c dassault.c dbz.c dcon.c ddayjlc.c ddenlovr.c ddragon.c ddribble.c dec0.c dec8.c deco156.c deco32.c deco_mlc.c decocass.c deshoros.c dgpix.c discoboy.c djboy.c djmain.c dkong.c dmndrby.c docastle.c dooyong.c dorachan.c dreamwld.c drgnmst.c drmicro.c drw80pkr.c dunhuang.c dwarfd.c dynadice.c dynax.c enigma2.c eolith.c epos.c equites.c esd16.c esh.c esripsys.c ettrivia.c exerion.c exidy.c exidy440.c expro02.c exprraid.c exzisus.c f1gp.c famibox.c fantland.c fastfred.c fastlane.c fcombat.c fcrash.c feversoc.c fgoal.c firebeat.c firefox.c firetrap.c fitfight.c flkatck.c flyball.c forte2.c fortecar.c freekick.c fromanc2.c fromance.c funkball.c funworld.c funybubl.c fuukifg2.c fuukifg3.c gaelco.c gaelco3d.c gaiden.c galaga.c galaxian.c galgame.c galivan.c galpani2.c galpani3.c galpanic.c gamecstl.c gaplus.c gauntlet.c gberet.c gbusters.c gcpinbal.c gei.c ghosteo.c ginganin.c gladiatr.c glass.c gng.c go2000.c goal92.c goindol.c goldnpkr.c goldstar.c gpworld.c groundfx.c gstriker.c gsword.c gticlub.c guab.c gundealr.c gunpey.c gunsmoke.c halleys.c harddriv.c hcastle.c highvdeo.c himesiki.c hitpoker.c hnayayoi.c hng64.c homedata.c homerun.c hornet.c hshavoc.c hvyunit.c hyprduel.c ichiban.c igs009.c igs011.c igs017.c igs_m027.c igspoker.c intrscti.c inufuku.c iqblock.c istellar.c itech32.c itech8.c itgambl2.c itgambl3.c jack.c jackal.c jackie.c jackpool.c jaguar.c jailbrek.c jalmah.c jangou.c jantotsu.c jchan.c jedi.c jokrwild.c jollyjgr.c jongkyo.c jpmimpct.c jpmsys5.c jrpacman.c junofrst.c kaneko16.c kangaroo.c karnov.c kas89.c kchamp.c kickgoal.c kingdrby.c kingobox.c kingpin.c koikoi.c konamigq.c konamigx.c konendev.c ksayakyu.c kungfur.c labyrunr.c ladybug.c lastduel.c lastfght.c lazercmd.c legionna.c leland.c lethal.c liberate.c limenko.c littlerb.c lkage.c looping.c lordgun.c lsasquad.c ltcasino.c luckgrln.c lucky74.c lwings.c m107.c m58.c m62.c m63.c m72.c m79amb.c m90.c m92.c macs.c madalien.c madmotor.c magicard.c magictg.c magtouch.c mainevt.c majorpkr.c malzak.c marinedt.c mastboy.c maxaflex.c maygay1b.c mayumi.c mazerbla.c mcatadv.c mcr.c mcr3.c meadows.c mediagx.c megadrvb.c megaplay.c megasys1.c megatech.c meijinsn.c merit.c meritm.c mermaid.c metalmx.c metro.c mexico86.c midas.c midqslvr.c midvunit.c midzeus.c miniboy7.c mirax.c missb2.c missile.c mitchell.c mjkjidai.c mjsister.c mlanding.c model1.c model2.c model3.c mogura.c momoko.c moo.c mouser.c mpu4.c mpu4vid.c mquake.c mrdo.c ms32.c multfish.c multigam.c murogmbl.c mustache.c mystwarr.c namcofl.c namcoic.c namcona1.c namconb1.c namcos10.c namcos11.c namcos12.c namcos2.c namcos21.c namcos22.c namcos23.c namcos86.c naomi.c naughtyb.c nbmj8688.c nbmj8891.c nbmj8900.c nbmj8991.c nbmj9195.c neodrvr.c neogeo.c neoprint.c nexus3d.c nightgal.c ninjakd2.c ninjaw.c niyanpai.c nmk16.c norautp.c nova2001.c nss.c nwk-tr.c nycaptor.c ohmygod.c ojankohs.c olibochu.c omegrace.c onetwo.c opwolf.c othello.c othunder.c pachifev.c pacman.c panicr.c paradise.c parodius.c pasha2.c pastelg.c pbaction.c pcat_nit.c pcktgal.c pcxt.c pengadvb.c pengo.c peplus.c pgm.c pgm2.c phoenix.c photon.c photon2.c pingpong.c pipedrm.c pipeline.c pirates.c playmark.c pluto5.c plygonet.c pntnpuzl.c pokechmp.c poker72.c polepos.c policetr.c poo.c poolshrk.c popeye.c powerbal.c powerins.c ppmast93.c progolf.c psikyo.c psikyo4.c psikyosh.c psychic5.c pturn.c puckpkmn.c qdrmfgp.c qix.c queen.c quizdna.c quizo.c quizpun2.c quizshow.c r2dx_v33.c rabbit.c raiden.c raiden2.c rainbow.c rampart.c rastan.c redclash.c relief.c renegade.c rltennis.c rmhaihai.c rockrage.c rocnrope.c rohga.c rollerg.c roul.c route16.c royalmah.c rpunch.c rungun.c sandscrp.c sangho.c saturn.c sauro.c savquest.c sbowling.c sbrkout.c scregg.c segac2.c segae.c segag80r.c segahang.c segald.c segaorun.c segas16a.c segas16b.c segas18.c segas24.c segas32.c seibuspi.c seta.c seta2.c sf.c sfbonus.c sfkick.c shangha3.c shangkid.c shootout.c shougi.c sidearms.c sigmab52.c sigmab98.c silkroad.c silvmil.c simpl156.c simpsons.c skimaxx.c skullxbo.c skyarmy.c skyfox.c skykid.c slapfght.c slapshot.c sliver.c slotcarn.c sms.c snesb.c snk.c snk68.c snowbros.c sothello.c spdodgeb.c speedspn.c spiders.c splash.c splus.c spoker.c spool99.c sprcros2.c spy.c srmp2.c srmp5.c srmp6.c srumbler.c ssfindo.c sshangha.c ssingles.c ssrj.c sstrangr.c ssv.c st0016.c starwars.c statriv2.c stv.c su2000.c sub.c subsino.c subsino2.c suna16.c suna8.c supdrapo.c superdq.c superqix.c supertnk.c suprgolf.c suprloco.c suprnova.c suprslam.c surpratk.c system1.c system16.c tail2nos.c taito_b.c taito_f2.c taito_f3.c taito_h.c taito_l.c taito_x.c taito_z.c taitoair.c taitojc.c taitowlf.c tank8.c tankbust.c taotaido.c targeth.c tatsumi.c tattack.c tbowl.c tcl.c tecmo.c tecmosys.c tehkanwc.c tetrisp2.c thedeep.c thepit.c thief.c thoop2.c thunderx.c tmaster.c tmmjprd.c tmnt.c tmspoker.c tnzs.c toaplan2.c toki.c topspeed.c trackfld.c travrusa.c trucocl.c trvmadns.c trvquest.c tryout.c ttchamp.c tugboat.c tumbleb.c tumblep.c turbo.c tutankhm.c twin16.c twinkle.c umipoker.c undrfire.c unico.c upscope.c usgames.c vaportra.c vball.c vcombat.c vega.c vendetta.c videopkr.c vigilant.c viper.c vmetal.c voyager.c wallc.c wardner.c warpsped.c warriorb.c wc90.c wc90b.c wecleman.c welltris.c wgp.c wheelfir.c whitestar.c williams.c wink.c witch.c wiz.c xain.c xexex.c xmen.c xorworld.c xtom3d.c xxmissio.c yunsun16.c yunsung8.c zaxxon.c zn.c zr107.c
[src/mame/machine]	3do.c acitya.c ajax.c archimds.c asteroid.c atari.c awboard.c balsente.c beezer.c bfm_comn.c btime.c bublbobl.c cclimber.c cps2crpt.c dec0.c deco102.c deco156.c decocass.c decocrpt.c fd1089.c fddebug.c gaelco2.c galaxold.c harddriv.c irobot.c jalcrpt.c jumpshot.c kabuki.c kaneko16.c konami1.c konppc.c leland.c mc8123.c md_cart.c megadriv.c mhavoc.c micro3d.c midtunit.c midwunit.c midxunit.c midyunit.c model1.c n64.c namcond1.c namcos1.c namcos2.c naomi.c naomigd.c naomim1.c naomim2.c naomim4.c nb1413m3.c nb1414m4.c neoboot.c neocrypt.c neoprot.c nmk004.c nmk112.c opwolf.c pacplus.c pgmcrypt.c pgmprot1.c pgmprot2.c pgmprot3.c pgmprot4.c pgmprot5.c pgmprot6.c playch10.c qix.c r2crypt.c s16fd.c s24fd.c scramble.c segacrp2.c segacrpt.c segaic16.c segamsys.c segas32.c simpsons.c slapfght.c smpc.c snes.c snes7110.c snesbsx.c snessdd1.c starwars.c stfight.c stvprot.c subsino.c taitosj.c tatsumi.c theglobp.c tnzs.c tx1.c vectrex.c vsnes.c williams.c wrally.c
[src/mame/video]	1942.c 1943.c 20pacgal.c 40love.c 8080bw.c aerofgt.c alpha68k.c ambush.c ampoker2.c appoooh.c arabian.c archimds.c argus.c arkanoid.c artmagic.c atarirle.c atarisy1.c avgdvg.c bagman.c balsente.c bankp.c baraduke.c bbusters.c bfm_adr2.c bking.c bladestl.c bogeyman.c bombjack.c bosco.c brkthru.c btime.c bublbobl.c buggychl.c bwing.c calomega.c capbowl.c carjmbre.c carpolo.c cave.c ccastles.c cclimber.c centiped.c chaknpop.c champbas.c changela.c cheekyms.c circusc.c citycon.c cloud9.c clshroad.c combatsc.c compgolf.c contra.c cop01.c cosmic.c cps1.c crbaloon.c crgolf.c cvs.c darkmist.c dcheese.c dday.c ddribble.c deadang.c dec8.c deco_mlc.c deniam.c digdug.c dkong.c docastle.c dogfgt.c dooyong.c dribling.c drmicro.c dynax.c epos.c equites.c espial.c esripsys.c exedexes.c exerion.c exprraid.c f1gp.c fastfred.c fastlane.c fcombat.c finalizr.c firetrap.c firetrk.c flower.c funkybee.c funworld.c fuukifg2.c gaelco3d.c galaga.c galastrm.c galaxian.c galaxold.c galivan.c gaplus.c gberet.c ginganin.c glass.c goldstar.c gomoku.c gotya.c gradius3.c grchamp.c gridlee.c groundfx.c gsword.c gticlub.c gunbustr.c gunsmoke.c gyruss.c hanaawas.c hcastle.c hexion.c higemaru.c hnayayoi.c hng64.c homedata.c homerun.c hyhoo.c hyperspt.c hyprduel.c ikki.c irobot.c ironhors.c itech32.c itech8.c jack.c jackal.c jailbrek.c jedi.c kaneko16.c kangaroo.c karnov.c kchamp.c kingobox.c kncljoe.c konamigx.c konamiic.c konicdev.c kopunch.c ksayakyu.c kyugo.c labyrunr.c ladybug.c lasso.c leland.c lethalj.c liberate.c liberatr.c lockon.c lucky74.c lvcards.c lwings.c m107.c m52.c m57.c m58.c m62.c madalien.c magmax.c mainsnk.c mappy.c marineb.c mario.c markham.c matmania.c mcatadv.c mcr68.c megasys1.c megazone.c mermaid.c metlclsh.c metro.c mexico86.c mikie.c mjkjidai.c model1.c model2.c momoko.c mouser.c mrdo.c mrjong.c munchmo.c mustache.c mw8080bw.c mystston.c mystwarr.c n64.h n8080.c namcofl.c namconb1.c namcos1.c namcos2.c namcos22.c namcos86.c naughtyb.c nbmj8688.c nbmj8891.c nbmj8900.c nbmj8991.c nbmj9195.c neogeo.c niyanpai.c nmk16.c nova2001.c ojankohs.c othunder.c pacland.c pacman.c pandoras.c pastelg.c pcktgal.c pgm.c phoenix.c pingpong.c pitnrun.c playch10.c plygonet.c polepos.c policetr.c pooyan.c popeye.c popper.c portrait.c ppu2c0x.c prehisle.c psikyo.c punchout.c pushman.c quasar.c quizdna.c rallyx.c redalert.c redclash.c retofinv.c rockrage.c rocnrope.c rollrace.c route16.c rungun.c sbasketb.c scotrsht.c sega16sp.c segag80r.c segag80v.c segaic16.c segas32.c seibuspi.c seicross.c seta.c sf.c shangkid.c shaolins.c shisen.c shootout.c sidearms.c sidepckt.c simpsons.c skyfox.c skykid.c skyraid.c snk.c snk6502.c snookr10.c sonson.c spacefb.c spdodgeb.c speedatk.c sprcros2.c srmp2.c ssozumo.c sspeedr.c st0016.c stactics.c stfight.c strnskil.c stvvdp2.c suna8.c superchs.c superqix.c suprloco.c suprnova.c suprridr.c system1.c tagteam.c tail2nos.c taito_z.c taitoic.c taitosj.c tankbatt.c tatsumi.c tceptor.c tecmosys.c terracre.c thedeep.c thepit.c thief.c tigeroad.c timelimt.c timeplt.c tmnt.c tnzs.c toypop.c tp84.c trackfld.c travrusa.c trucocl.c tryout.c tubep.c tunhunt.c turbo.c tx1.c ultratnk.c undrfire.c vball.c vertigo.c vicdual.c vulgus.c wecleman.c williams.c wiping.c wiz.c xevious.c xorworld.c xyonix.c yiear.c zaccaria.c zaxxon.c zodiack.c
[src/mess/audio]	spchroms.c svision.c
[src/mess/drivers]	a2600.c a5105.c a7000.c abc1600.c abc80.c abc80x.c adam.c alesis.c alphatro.c ami1200.c amiga.c apexc.c applix.c aquarius.c arcadia.c argo.c atari400.c atm.c atom.c avigo.c b16.c bbcbc.c bcs3.c beehive.c beta.c bigbord2.c bmjr.c bml3.c bullet.c bw12.c bw2.c c10.c c64.c camplynx.c ccs2422.c cd2650.c cgenie.c channelf.c chesstrv.c codata.c coleco.c compis.c comquest.c comx35.c cosmicos.c crvision.c czk80.c dectalk.c digel804.c dim68k.c dmv.c dual68.c e01.c ec65.c einstein.c elf.c elwro800.c enterp.c esq1.c exelv.c exp85.c fk1.c fm7.c fmtowns.c fp1100.c fp6000.c gamepock.c gba.c gmaster.c gp2x.c h19.c hec2hrp.c homelab.c homez80.c hp49gp.c ht68k.c huebler.c ip22.c ipds.c iq151.c jr100.c jr200.c jupiter.c k8915.c kyocera.c lc80.c lcmate2.c lynx.c m79152pc.c mc10.c mc1000.c mccpm.c mekd2.c mes.c micronic.c mikromik.c mini2440.c mirage.c mmd1.c mmodular.c mpz80.c msbc1.c mstation.c multi8.c mycom.c mz2000.c mz2500.c n64.c nakajies.c nanos.c nc.c newbrain.c next.c ng_aes.c ngp.c ob68k1a.c okean240.c osbexec.c osi.c palm.c palmz22.c paso1600.c pasogo.c pasopia.c pasopia7.c pb1000.c pc100.c pc2000.c pc4.c pc6001.c pc8001.c pc8401a.c pc8801.c pc88va.c pc9801.c pce220.c pcfx.c pcm.c pcw.c pcw16.c pda600.c pdp1.c pdp11.c pegasus.c pentagon.c phc25.c phunsy.c pk8000.c plan80.c pocketc.c pockstat.c portfoli.c prestige.c prof80.c psion.c pt68k4.c ptcsol.c pv1000.c pv2000.c px4.c px8.c pyl601.c ql.c qtsbc.c qx10.c rex6000.c rt1715.c rx78.c sage2.c sapi1.c scorpion.c scv.c sg1000.c sgi_ip2.c sm1800.c smc777.c socrates.c sorcerer.c spc1000.c spec128.c specpls3.c spectrum.c studio2.c sun1.c sun2.c sun3.c super6.c supracan.c svision.c sys2900.c systec.c tandy2k.c tek405x.c ti89.c ti990_10.c ti99_2.c ti99_4p.c tiki100.c timex.c tmc1800.c tricep.c trs80.c trs80m2.c tsispch.c tutor.c tvc.c tx0.c unior.c univac.c unixpc.c v1050.c v6809.c vc4000.c vg5k.c vic20.c vii.c vip.c vixen.c vt240.c vt520.c vta2000.c vtech1.c x07.c x1.c x68k.c xerox820.c xor100.c z100.c z1013.c z88.c z9001.c zexall.c zrt80.c
[src/mess/formats]	ace_ace.c m65_snqk.c studio2_st2.c
[src/mess/machine]	a2cffa.c a2diskii.c a2memexp.c a2scsi.c a2thunderclock.c a7800.c abc_fd2.c abc_sio.c advision.c amigacrt.c amstrad.c apple1.c apple2.c apple2gs.c apple3.c at.c ataricrt.c b2m.c bbc.c bebox.c c128.c c16.c c2040.c c64.c c64_dela_ep256.c c64_dela_ep64.c c64_dela_ep7x8.c c64_rex_ep256.c c64_xl80.c c65.c cbmb.c cgenie.c coco12.c coco_fdc.c coco_pak.c comx_clm.c comx_eb.c comx_epr.c comx_fd.c comx_prn.c comx_thm.c comxpl80.c cpc_ssa1.c cs4031.c cuda.c cybiko.c dai.c dgn_beta.c ecb_grip.c egret.c electron.c galaxy.c gamecom.c gb.c genpc.c hec2hrp.c hecdisk2.c hp48.c i82439tx.c intv.c iq151_disc2.c iq151_minigraf.c iq151_ms151a.c iq151_rom.c isa.c jupiter.c kaypro.c kc.c kc_d004.c kc_ram.c kc_rom.c lisa.c llc.c lux10828.c lux21046.c lviv.c lynx.c mac.c mbc55x.c mbee.c mface2.c microtan.c mikro80.c mpc105.c msx.c msx_slot.c mtx.c mz700.c nascom1.c nes.c nes_mmc.c nes_pcb.c nubus.c odyssey2.c ondra.c oric.c orion.c osborne1.c partner.c pc.c pc1251.c pc1350.c pc1401.c pc1403.c pce.c pecom.c pet.c pk8020.c pmd85.c pokemini.c pp01.c primo.c radio86.c rm380z.c rmnimbus.c s100_dj2db.c samcoupe.c sapi1.c sms.c snescart.c sorcerer.c special.c super80.c svi318.c sym1.c tandy1t.c thomflop.c thomson.c ti85.c trs80.c ut88.c vector06.c vtech2.c wswan.c z80ne.c z88_ram.c z88_rom.c zx.c
[src/mess/machine/ti99]	bwg.c evpc.c genboard.c grom.c gromport.c hfdc.c horizon.c mapper8.c memex.c myarcmem.c p_code.c samsmem.c spchsyn.c speech8.c ti32kmem.c ti_fdc.c ti_rs232.c tn_ide.c tn_usbsm.c
[src/mess/video]	733_asr.c 911_vdt.c a7800.c abc1600.c abc80.c abc800.c abc802.c abc806.c apple2.c avigo.c bbc.c cbmb.c cgc7900.c channelf.c dai.c dgn_beta.c ef9345.h fm7.c fmtowns.c galaxy.c gb.c gime.c intv.c iq151_video32.c iq151_video64.c isa_cga.c isa_ega.c isa_mda.c k1ge.c kaypro.c llc.c mbee.c mc80.c mikro80.c mikromik.c mz80.c newbrain.c osi.c pc1512.c pc4.c pc_aga.c pc_t1t.c pet.c pk8020.c poly88.c radio86.c rm380z.c super80.c thomson.c tmc600.c trs80.c vtvideo.c x68k.c zx.c

src/mame/audio/suna8.c

r14976	r14977
52	52	{
53	53	suna8_state *state = device.machine().driver_data<suna8_state>();
54	54	running_machine &machine = device.machine();
55		int i, len = machine.region("samples")->bytes();
56		UINT8 *ROM = machine.region("samples")->base();
	55	int i, len = machine.root_device().memregion("samples")->bytes();
	56	UINT8 *ROM = state->memregion("samples")->base();
57	57
58	58	state->m_samplebuf = auto_alloc_array(machine, INT16, len);
59	59

src/mame/audio/cyberbal.c

r14976	r14977
20	20	cyberbal_state *state = machine.driver_data<cyberbal_state>();
21	21
22	22	/* reset the sound system */
23		state->m_bank_base = &machine.region("audiocpu")->base()[0x10000];
24		memory_set_bankptr(machine, "soundbank", &state->m_bank_base[0x0000]);
	23	state->m_bank_base = &state->memregion("audiocpu")->base()[0x10000];
	24	state->membank("soundbank")->set_base(&state->m_bank_base[0x0000]);
25	25	state->m_fast_68k_int = state->m_io_68k_int = 0;
26	26	state->m_sound_data_from_68k = state->m_sound_data_from_6502 = 0;
27	27	state->m_sound_data_from_68k_ready = state->m_sound_data_from_6502_ready = 0;
r14976	r14977
56	56
57	57	WRITE8_MEMBER(cyberbal_state::cyberbal_sound_bank_select_w)
58	58	{
59		memory_set_bankptr(machine(), "soundbank", &m_bank_base[0x1000 * ((data >> 6) & 3)]);
	59	membank("soundbank")->set_base(&m_bank_base[0x1000 * ((data >> 6) & 3)]);
60	60	coin_counter_w(machine(), 1, (data >> 5) & 1);
61	61	coin_counter_w(machine(), 0, (data >> 4) & 1);
62	62	cputag_set_input_line(machine(), "dac", INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);

src/mame/audio/atarijsa.c

r14976	r14977
133	133	test_mask = testmask;
134	134
135	135	/* predetermine the bank base */
136		rgn = machine.region("jsa")->base();
	136	rgn = machine.root_device().memregion("jsa")->base();
137	137	bank_base = &rgn[0x03000];
138	138	bank_source_data = &rgn[0x10000];
139	139
r14976	r14977
161	161	/* the upper 128k is fixed, the lower 128k is bankswitched */
162	162	for (rgn = 0; rgn < ARRAY_LENGTH(regions); rgn++)
163	163	{
164		UINT8 *base = machine.region(regions[rgn])->base();
165		if (base != NULL && machine.region(regions[rgn])->bytes() >= 0x80000)
	164	UINT8 *base = machine.root_device().memregion(regions[rgn])->base();
	165	if (base != NULL && machine.root_device().memregion(regions[rgn])->bytes() >= 0x80000)
166	166	{
167	167	const char *bank = (rgn != 2) ? "bank12" : "bank14";
168	168	const char *bank_plus_1 = (rgn != 2) ? "bank13" : "bank15";
169		memory_configure_bank(machine, bank, 0, 2, base + 0x00000, 0x00000);
170		memory_configure_bank(machine, bank, 2, 2, base + 0x20000, 0x20000);
171		memory_set_bankptr(machine, bank_plus_1, base + 0x60000);
	169	machine.root_device().membank(bank)->configure_entries(0, 2, base + 0x00000, 0x00000);
	170	machine.root_device().membank(bank)->configure_entries(2, 2, base + 0x20000, 0x20000);
	171	machine.root_device().membank(bank_plus_1)->set_base(base + 0x60000);
172	172	}
173	173	}
174	174	}
r14976	r14977
548	548
549	549	/* update the OKI bank */
550	550	if (oki6295 != NULL)
551		memory_set_bank(space->machine(), "bank12", (space->machine().memory().bank("bank12")->entry() & 2) | ((data >> 1) & 1));
	551	space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
552	552
553	553	/* update the bank */
554	554	memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
r14976	r14977
572	572
573	573	/* update the OKI bank */
574	574	if (oki6295 != NULL)
575		memory_set_bank(space->machine(), "bank12", (space->machine().memory().bank("bank12")->entry() & 1) | ((data >> 3) & 2));
	575	space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
576	576
577	577	/* update the volumes */
578	578	ym2151_volume = ((data >> 1) & 7) * 100 / 7;
r14976	r14977
681	681	if ((data&1) == 0) devtag_reset(space->machine(), "ymsnd");
682	682
683	683	/* update the OKI bank */
684		memory_set_bank(space->machine(), "bank12", (space->machine().memory().bank("bank12")->entry() & 2) | ((data >> 1) & 1));
	684	space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
685	685
686	686	/* update the bank */
687	687	memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
r14976	r14977
705	705	*/
706	706
707	707	/* update the OKI bank */
708		memory_set_bank(space->machine(), "bank12", (space->machine().memory().bank("bank12")->entry() & 1) | ((data >> 3) & 2));
709		memory_set_bank(space->machine(), "bank14", data >> 6);
	708	space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
	709	space->machine().root_device().membank("bank14")->set_entry(data >> 6);
710	710
711	711	/* update the volumes */
712	712	ym2151_volume = ((data >> 1) & 7) * 100 / 7;

src/mame/audio/cage.c

r14976	r14977
165	165
166	166	state->irqhandler = NULL;
167	167
168		memory_set_bankptr(machine, "bank10", machine.region("cageboot")->base());
169		memory_set_bankptr(machine, "bank11", machine.region("cage")->base());
	168	machine.root_device().membank("bank10")->set_base(machine.root_device().memregion("cageboot")->base());
	169	machine.root_device().membank("bank11")->set_base(machine.root_device().memregion("cage")->base());
170	170
171	171	state->cpu = machine.device<cpu_device>("cage");
172	172	cage_cpu_clock_period = attotime::from_hz(state->cpu->clock());

src/mame/audio/segasnd.c

r14976	r14977
155	155	{
156	156	speech_state *state = get_safe_speech(device);
157	157
158		state->speech = device->machine().region("speech")->base();
	158	state->speech = device->machine().root_device().memregion("speech")->base();
159	159	}
160	160
161	161

src/mame/audio/wiping.c

r14976	r14977
193	193	state->m_num_voices = 8;
194	194	state->m_last_channel = state->m_channel_list + state->m_num_voices;
195	195
196		state->m_sound_rom = machine.region("samples")->base();
197		state->m_sound_prom = machine.region("soundproms")->base();
	196	state->m_sound_rom = machine.root_device().memregion("samples")->base();
	197	state->m_sound_prom = machine.root_device().memregion("soundproms")->base();
198	198
199	199	/* start with sound enabled, many games don't have a sound enable register */
200	200	state->m_sound_enable = 1;

src/mame/audio/leland.c

r14976	r14977
551	551	/* if we have a 2151, install an externally driven DAC stream */
552	552	if (state->m_has_ym2151)
553	553	{
554		state->m_ext_base = machine.region("dac")->base();
	554	state->m_ext_base = machine.root_device().memregion("dac")->base();
555	555	state->m_extern_stream = device->machine().sound().stream_alloc(*device, 0, 1, OUTPUT_RATE, NULL, leland_80186_extern_update);
556	556	}
557	557

src/mame/audio/gomoku.c

r14976	r14977
192	192	state->m_num_voices = MAX_VOICES;
193	193	state->m_last_channel = state->m_channel_list + state->m_num_voices;
194	194
195		state->m_sound_rom = machine.region("gomoku")->base();
	195	state->m_sound_rom = machine.root_device().memregion("gomoku")->base();
196	196
197	197	/* start with sound enabled, many games don't have a sound enable register */
198	198	state->m_sound_enable = 1;

src/mame/audio/taito_en.c

r14976	r14977
49	49
50	50	static WRITE16_HANDLER( f3_es5505_bank_w )
51	51	{
52		UINT32 max_banks_this_game=(space->machine().region("ensoniq.0")->bytes()/0x200000)-1;
	52	UINT32 max_banks_this_game=(space->machine().root_device().memregion("ensoniq.0")->bytes()/0x200000)-1;
53	53
54	54	#if 0
55	55	{
r14976	r14977
222	222
223	223	static WRITE16_HANDLER(es5510_dsp_w)
224	224	{
225		UINT8 *snd_mem = (UINT8 *)space->machine().region("ensoniq.0")->base();
	225	UINT8 *snd_mem = (UINT8 *)space->machine().root_device().memregion("ensoniq.0")->base();
226	226
227	227	//  if (offset>4 && offset!=0x80  && offset!=0xa0  && offset!=0xc0  && offset!=0xe0)
228	228	//      logerror("%06x: DSP write offset %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
r14976	r14977
304	304	SOUND_RESET( taito_f3_soundsystem_reset )
305	305	{
306	306	/* Sound cpu program loads to 0xc00000 so we use a bank */
307		UINT16 *ROM = (UINT16 *)machine.region("audiocpu")->base();
	307	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("audiocpu")->base();
308	308	UINT16 *sound_ram = (UINT16 *)machine.memory().shared("share1")->ptr();
309		memory_set_bankptr(machine, "bank1",&ROM[0x80000]);
310		memory_set_bankptr(machine, "bank2",&ROM[0x90000]);
311		memory_set_bankptr(machine, "bank3",&ROM[0xa0000]);
	309	machine.root_device().membank("bank1")->set_base(&ROM[0x80000]);
	310	machine.root_device().membank("bank2")->set_base(&ROM[0x90000]);
	311	machine.root_device().membank("bank3")->set_base(&ROM[0xa0000]);
312	312
313	313	sound_ram[0]=ROM[0x80000]; /* Stack and Reset vectors */
314	314	sound_ram[1]=ROM[0x80001];

src/mame/audio/seibu.c

r14976	r14977
106	106	{
107	107	address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
108	108	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
109		UINT8 *rom = machine.region(cpu)->base();
	109	UINT8 *rom = machine.root_device().memregion(cpu)->base();
110	110	int i;
111	111
112	112	space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
r14976	r14977
120	120	}
121	121
122	122	if (length > 0x10000)
123		memory_configure_bank_decrypted(machine, "bank1", 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
	123	machine.root_device().membank("bank1")->configure_decrypted_entries(0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
124	124	}
125	125
126	126
r14976	r14977
190	190
191	191	state->m_playing = 0;
192	192	state->m_stream = device->machine().sound().stream_alloc(*device, 0, 1, device->clock(), state, seibu_adpcm_callback);
193		state->m_base = machine.region(intf->rom_region)->base();
	193	state->m_base = machine.root_device().memregion(intf->rom_region)->base();
194	194	state->m_adpcm.reset();
195	195	}
196	196
r14976	r14977
217	217
218	218	void seibu_adpcm_decrypt(running_machine &machine, const char *region)
219	219	{
220		UINT8 *ROM = machine.region(region)->base();
221		int len = machine.region(region)->bytes();
	220	UINT8 *ROM = machine.root_device().memregion(region)->base();
	221	int len = machine.root_device().memregion(region)->bytes();
222	222	int i;
223	223
224	224	for (i = 0; i < len; i++)
r14976	r14977
346	346
347	347	MACHINE_RESET( seibu_sound )
348	348	{
349		int romlength = machine.region("audiocpu")->bytes();
350		UINT8 *rom = machine.region("audiocpu")->base();
	349	int romlength = machine.root_device().memregion("audiocpu")->bytes();
	350	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
351	351
352	352	sound_cpu = machine.device("audiocpu");
353	353	update_irq_lines(machine, VECTOR_INIT);
354	354	if (romlength > 0x10000)
355	355	{
356		memory_configure_bank(machine, "bank1", 0, (romlength - 0x10000) / 0x8000, rom + 0x10000, 0x8000);
	356	machine.root_device().membank("bank1")->configure_entries(0, (romlength - 0x10000) / 0x8000, rom + 0x10000, 0x8000);
357	357
358	358	/* Denjin Makai definitely needs this at start-up, it never writes to the bankswitch */
359		memory_set_bank(machine, "bank1", 0);
	359	machine.root_device().membank("bank1")->set_entry(0);
360	360	}
361	361	}
362	362
r14976	r14977
367	367
368	368	WRITE8_HANDLER( seibu_bank_w )
369	369	{
370		memory_set_bank(space->machine(), "bank1", data & 1);
	370	space->machine().root_device().membank("bank1")->set_entry(data & 1);
371	371	}
372	372
373	373	WRITE8_HANDLER( seibu_coin_w )

src/mame/audio/segag80r.c

r14976	r14977
488	488	INLINE void sega005_update_sound_data(running_machine &machine)
489	489	{
490	490	segag80r_state *state = machine.driver_data<segag80r_state>();
491		UINT8 newval = machine.region("005")->base()[state->m_sound_addr];
	491	UINT8 newval = state->memregion("005")->base()[state->m_sound_addr];
492	492	UINT8 diff = newval ^ state->m_sound_data;
493	493
494	494	//mame_printf_debug("  [%03X] = %02X\n", state->m_sound_addr, newval);
r14976	r14977
589	589	static STREAM_UPDATE( sega005_stream_update )
590	590	{
591	591	segag80r_state *state = device->machine().driver_data<segag80r_state>();
592		const UINT8 *sound_prom = device->machine().region("proms")->base();
	592	const UINT8 *sound_prom = state->memregion("proms")->base();
593	593	int i;
594	594
595	595	/* no implementation yet */
r14976	r14977
881	881	tms36xx_note_w(tms, 0, data & 15);
882	882
883	883	/* Top four data lines address an 82S123 ROM that enables/disables voices */
884		enable_val = device->machine().region("prom")->base()[(data & 0xF0) >> 4];
	884	enable_val = device->machine().root_device().memregion("prom")->base()[(data & 0xF0) >> 4];
885	885	tms3617_enable_w(tms, enable_val >> 2);
886	886	}
887	887
r14976	r14977
963	963	case 3:
964	964	state->m_sound_addr &= 0xfff;
965	965	{
966		int numroms = device->machine().region("n7751")->bytes() / 0x1000;
	966	int numroms = state->memregion("n7751")->bytes() / 0x1000;
967	967	if (!(data & 0x01) && numroms >= 1) state->m_sound_addr |= 0x0000;
968	968	if (!(data & 0x02) && numroms >= 2) state->m_sound_addr |= 0x1000;
969	969	if (!(data & 0x04) && numroms >= 3) state->m_sound_addr |= 0x2000;
r14976	r14977
977	977	READ8_MEMBER(segag80r_state::n7751_rom_r)
978	978	{
979	979	/* read from BUS */
980		return machine().region("n7751")->base()[m_sound_addr];
	980	return memregion("n7751")->base()[m_sound_addr];
981	981	}
982	982
983	983

src/mame/audio/flower.c

r14976	r14977
190	190	/* extract globals from the interface */
191	191	state->m_last_channel = state->m_channel_list + 8;
192	192
193		state->m_sample_rom = machine.region("sound1")->base();
194		state->m_volume_rom = machine.region("sound2")->base();
	193	state->m_sample_rom = machine.root_device().memregion("sound1")->base();
	194	state->m_volume_rom = machine.root_device().memregion("sound2")->base();
195	195
196	196	/* register for savestates */
197	197	for (i = 0; i < 8; i++)

src/mame/audio/dcs.c

r14976	r14977
821	821	/* rev 1: just reset the bank to 0 */
822	822	case 1:
823	823	dcs.sounddata_bank = 0;
824		memory_set_bank(machine, "databank", 0);
	824	machine.root_device().membank("databank")->set_entry(0);
825	825	break;
826	826
827	827	/* rev 2: reset the SDRC ASIC */
r14976	r14977
955	955	dcs.dmadac[0] = machine.device<dmadac_sound_device>("dac");
956	956
957	957	/* configure boot and sound ROMs */
958		dcs.bootrom = (UINT16 *)machine.region("dcs")->base();
959		dcs.bootrom_words = machine.region("dcs")->bytes() / 2;
	958	dcs.bootrom = (UINT16 *)machine.root_device().memregion("dcs")->base();
	959	dcs.bootrom_words = machine.root_device().memregion("dcs")->bytes() / 2;
960	960	dcs.sounddata = dcs.bootrom;
961	961	dcs.sounddata_words = dcs.bootrom_words;
962	962	dcs.sounddata_banks = dcs.sounddata_words / 0x1000;
963		memory_configure_bank(machine, "databank", 0, dcs.sounddata_banks, dcs.sounddata, 0x1000*2);
	963	machine.root_device().membank("databank")->configure_entries(0, dcs.sounddata_banks, dcs.sounddata, 0x1000*2);
964	964
965	965	/* create the timers */
966	966	dcs.internal_timer = machine.device<timer_device>("dcs_int_timer");
r14976	r14977
1008	1008	dcs.dmadac[1] = machine.device<dmadac_sound_device>("dac2");
1009	1009
1010	1010	/* always boot from the base of "dcs" */
1011		dcs.bootrom = (UINT16 *)machine.region("dcs")->base();
1012		dcs.bootrom_words = machine.region("dcs")->bytes() / 2;
	1011	dcs.bootrom = (UINT16 *)machine.root_device().memregion("dcs")->base();
	1012	dcs.bootrom_words = machine.root_device().memregion("dcs")->bytes() / 2;
1013	1013
1014	1014	/* supports both RAM and ROM variants */
1015	1015	if (dram_in_mb != 0)
r14976	r14977
1024	1024	}
1025	1025	dcs.sounddata_banks = dcs.sounddata_words / soundbank_words;
1026	1026	if (dcs.rev != 2)
1027		memory_configure_bank(machine, "databank", 0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2);
	1027	machine.root_device().membank("databank")->configure_entries(0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2);
1028	1028
1029	1029	/* allocate memory for the SRAM */
1030	1030	dcs.sram = auto_alloc_array(machine, UINT16, 0x8000*4/2);
r14976	r14977
1085	1085	static WRITE16_HANDLER( dcs_data_bank_select_w )
1086	1086	{
1087	1087	dcs.sounddata_bank = data & 0x7ff;
1088		memory_set_bank(space->machine(), "databank", dcs.sounddata_bank % dcs.sounddata_banks);
	1088	space->machine().root_device().membank("databank")->set_entry(dcs.sounddata_bank % dcs.sounddata_banks);
1089	1089
1090	1090	/* bit 11 = sound board led */
1091	1091	#if 0
r14976	r14977
1112	1112	{
1113	1113	/* ROM-based; use the memory page to select from ROM */
1114	1114	if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3)
1115		memory_set_bankptr(machine, "rompage", &dcs.sounddata[(SDRC_EPM_PG * pagesize) % dcs.sounddata_words]);
	1115	machine.root_device().membank("rompage")->set_base(&dcs.sounddata[(SDRC_EPM_PG * pagesize) % dcs.sounddata_words]);
1116	1116	}
1117	1117	else
1118	1118	{
1119	1119	/* RAM-based; use the ROM page to select from ROM, and the memory page to select from RAM */
1120	1120	if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3)
1121		memory_set_bankptr(machine, "rompage", &dcs.bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % dcs.bootrom_words]);
	1121	machine.root_device().membank("rompage")->set_base(&dcs.bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % dcs.bootrom_words]);
1122	1122	if (SDRC_DM_ST != 0)
1123		memory_set_bankptr(machine, "drampage", &dcs.sounddata[(SDRC_DM_PG * 1024) % dcs.sounddata_words]);
	1123	machine.root_device().membank("drampage")->set_base(&dcs.sounddata[(SDRC_DM_PG * 1024) % dcs.sounddata_words]);
1124	1124	}
1125	1125	}
1126	1126	}
r14976	r14977
1362	1362	/* offset 2 controls RAM pages */
1363	1363	case 2:
1364	1364	dsio.reg[2] = data;
1365		memory_set_bank(space->machine(), "databank", DSIO_DM_PG % dcs.sounddata_banks);
	1365	space->machine().root_device().membank("databank")->set_entry(DSIO_DM_PG % dcs.sounddata_banks);
1366	1366	break;
1367	1367	}
1368	1368	}
r14976	r14977
1429	1429	/* offset 2 controls RAM pages */
1430	1430	case 2:
1431	1431	dsio.reg[2] = data;
1432		memory_set_bank(space->machine(), "databank", DENV_DM_PG % dcs.sounddata_bank);
	1432	space->machine().root_device().membank("databank")->set_entry(DENV_DM_PG % dcs.sounddata_bank);
1433	1433	break;
1434	1434
1435	1435	/* offset 3 controls FIFO reset */

src/mame/audio/targ.c

r14976	r14977
115	115	if ((data & 0x01) && !(port_2_last & 0x01))
116	116	{
117	117	samples_device *samples = space->machine().device<samples_device>("samples");
118		UINT8 *prom = space->machine().region("targ")->base();
	118	UINT8 *prom = space->machine().root_device().memregion("targ")->base();
119	119
120	120	tone_pointer = (tone_pointer + 1) & 0x0f;
121	121

src/mame/audio/cinemat.c

r14976	r14977
1612	1612
1613	1613	/* this patch prevents the sound ROM from eating itself when command $0A is sent */
1614	1614	/* on a cube rotate */
1615		machine.region("audiocpu")->base()[0x11dc] = 0x09;
	1615	state->memregion("audiocpu")->base()[0x11dc] = 0x09;
1616	1616	}
1617	1617
1618	1618

src/mame/audio/circus.c

r14976	r14977
174	174	{
175	175
176	176	m_clown_z = (data & 0x0f);
177		*(machine().region("maincpu")->base() + 0x8000) = data; logerror("Z:%02x\n",data); //DEBUG
	177	*(machine().root_device().memregion("maincpu")->base() + 0x8000) = data; logerror("Z:%02x\n",data); //DEBUG
178	178
179	179	/* Bits 4-6 enable/disable trigger different events */
180	180	switch (m_game_id)

src/mame/audio/midway.c

r14976	r14977
231	231	//
232	232
233	233	// loop over all possible values of the duty cycle
234		UINT8 *prom = machine().region("proms")->base();
	234	UINT8 *prom = memregion("proms")->base();
235	235	for (int volval = 0; volval < 16; volval++)
236	236	{
237	237	// loop over all the clocks until we run out; look up in the PROM
r14976	r14977
449	449
450	450
451	451	//-------------------------------------------------
	452	//  ROM definitions
	453	//-------------------------------------------------
	454
	455	ROM_START( midway_ssio )
	456	ROM_REGION( 0x0020, "proms", 0 )
	457	ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
	458	ROM_END
	459
	460
	461	//-------------------------------------------------
	462	//  device_rom_region - return a pointer to the
	463	//  the device's ROM definitions
	464	//-------------------------------------------------
	465
	466	const rom_entry *midway_ssio_device::device_rom_region() const
	467	{
	468	return ROM_NAME(midway_ssio);
	469	}
	470
	471
	472	//-------------------------------------------------
452	473	//  device_mconfig_additions - return a pointer to
453	474	//  the device's machine fragment
454	475	//-------------------------------------------------

src/mame/audio/midway.h

r14976	r14977
121	121
122	122	protected:
123	123	// device-level overrides
	124	virtual const rom_entry *device_rom_region() const;
124	125	virtual machine_config_constructor device_mconfig_additions() const;
125	126	virtual ioport_constructor device_input_ports() const;
126	127	virtual void device_start();

src/mame/audio/snk6502.c

r14976	r14977
654	654	snk6502_sound_state *state = get_safe_token(device);
655	655
656	656	state->m_samples = device->machine().device<samples_device>("samples");
657		state->m_ROM = device->machine().region("snk6502")->base();
	657	state->m_ROM = device->machine().root_device().memregion("snk6502")->base();
658	658
659	659	// adjusted
660	660	snk6502_set_music_freq(device->machine(), 43000);

src/mame/audio/exidy440.c

r14976	r14977
175	175	state->stream = device->machine().sound().stream_alloc(*device, 0, 2, device->clock(), NULL, channel_update);
176	176
177	177	/* allocate the sample cache */
178		length = machine.region("cvsd")->bytes() * 16 + MAX_CACHE_ENTRIES * sizeof(sound_cache_entry);
	178	length = machine.root_device().memregion("cvsd")->bytes() * 16 + MAX_CACHE_ENTRIES * sizeof(sound_cache_entry);
179	179	state->sound_cache = (sound_cache_entry *)auto_alloc_array(machine, UINT8, length);
180	180
181	181	/* determine the hard end of the cache and reset */
r14976	r14977
696	696	if (current->address == address && current->length == length && current->bits == bits && current->frequency == frequency)
697	697	return current->data;
698	698
699		return add_to_sound_cache(device, &device->machine().region("cvsd")->base()[address], address, length, bits, frequency);
	699	return add_to_sound_cache(device, &device->machine().root_device().memregion("cvsd")->base()[address], address, length, bits, frequency);
700	700	}
701	701
702	702

src/mame/audio/cclimber.c

r14976	r14977
17	17	{
18	18	running_machine &machine = device.machine();
19	19	samplebuf = 0;
20		if (machine.region("samples")->base())
21		samplebuf = auto_alloc_array(machine, INT16, 2 * machine.region("samples")->bytes());
	20	if (machine.root_device().memregion("samples")->base())
	21	samplebuf = auto_alloc_array(machine, INT16, 2 * machine.root_device().memregion("samples")->bytes());
22	22	}
23	23
24	24
25	25	static void cclimber_play_sample(running_machine &machine, int start,int freq,int volume)
26	26	{
27	27	int len;
28		int romlen = machine.region("samples")->bytes();
29		const UINT8 *rom = machine.region("samples")->base();
	28	int romlen = machine.root_device().memregion("samples")->bytes();
	29	const UINT8 *rom = machine.root_device().memregion("samples")->base();
30	30	samples_device *samples = machine.device<samples_device>("samples");
31	31
32	32

src/mame/audio/dkong.c

r14976	r14977
1116	1116	{
1117	1117	dkong_state *state = machine.driver_data<dkong_state>();
1118	1118
1119		state->m_snd_rom = machine.region("soundcpu")->base();
	1119	state->m_snd_rom = state->memregion("soundcpu")->base();
1120	1120	}
1121	1121
1122	1122

src/mame/audio/harddriv.c

r14976	r14977
24	24	void hdsnd_init(running_machine &machine)
25	25	{
26	26	harddriv_state *state = machine.driver_data<harddriv_state>();
27		state->m_rombase = (UINT8 *)machine.region("serialroms")->base();
28		state->m_romsize = machine.region("serialroms")->bytes();
	27	state->m_rombase = (UINT8 *)state->memregion("serialroms")->base();
	28	state->m_romsize = state->memregion("serialroms")->bytes();
29	29	}
30	30
31	31

src/mame/audio/m72.c

r14976	r14977
124	124	{
125	125	m72_audio_state *state = get_safe_token(device);
126	126
127		state->samples = device->machine().region("samples")->base();
128		state->samples_size = device->machine().region("samples")->bytes();
	127	state->samples = device->machine().root_device().memregion("samples")->base();
	128	state->samples_size = device->machine().root_device().memregion("samples")->bytes();
129	129	state->space = device->machine().device("soundcpu")->memory().space(AS_IO);
130	130	state->dac = device->machine().device("dac");
131	131

src/mame/audio/snes_snd.c

r14976	r14977
1171	1171	if ((data & 0x80) != (spc700->ram[0xf1] & 0x80))
1172	1172	{
1173	1173	if (data & 0x80)
1174		memcpy(spc700->ipl_region, device->machine().region("user5")->base(), 64);
	1174	memcpy(spc700->ipl_region, device->machine().root_device().memregion("user5")->base(), 64);
1175	1175	else
1176	1176	memcpy(spc700->ipl_region, &spc700->ram[0xffc0], 64);
1177	1177	}
r14976	r14977
1319	1319	spc700->ram[0xf1] = 0x80;
1320	1320
1321	1321	/* put IPL image at the top of RAM */
1322		memcpy(spc700->ipl_region, machine.region("user5")->base(), 64);
	1322	memcpy(spc700->ipl_region, machine.root_device().memregion("user5")->base(), 64);
1323	1323
1324	1324	/* Initialize the timers */
1325	1325	spc700->timer[0] = machine.scheduler().timer_alloc(FUNC(snes_spc_timer), spc700);

src/mame/audio/williams.c

r14976	r14977
146	146
147	147	WRITE8_MEMBER(williams_cvsd_sound_device::bank_select_w)
148	148	{
149		subbank("rombank")->set_entry(data & 0x0f);
	149	membank("rombank")->set_entry(data & 0x0f);
150	150	}
151	151
152	152
r14976	r14977
302	302	void williams_cvsd_sound_device::device_start()
303	303	{
304	304	// configure master CPU banks
305		UINT8 *rom = subregion("cpu")->base();
	305	UINT8 *rom = memregion("cpu")->base();
306	306	for (int bank = 0; bank < 16; bank++)
307	307	{
308	308	//
r14976	r14977
311	311	//  D3 -> A16
312	312	//
313	313	offs_t offset = 0x8000 * ((bank >> 2) & 3) + 0x20000 * (bank & 3);
314		subbank("rombank")->configure_entry(bank, &rom[0x10000 + offset]);
	314	membank("rombank")->configure_entry(bank, &rom[0x10000 + offset]);
315	315	}
316		subbank("rombank")->set_entry(0);
	316	membank("rombank")->set_entry(0);
317	317
318	318	// reset the IRQ state
319	319	m_pia->ca1_w(1);
r14976	r14977
427	427
428	428	WRITE8_MEMBER(williams_narc_sound_device::master_bank_select_w)
429	429	{
430		subbank("masterbank")->set_entry(data & 0x0f);
	430	membank("masterbank")->set_entry(data & 0x0f);
431	431	}
432	432
433	433
r14976	r14977
438	438
439	439	WRITE8_MEMBER(williams_narc_sound_device::slave_bank_select_w)
440	440	{
441		subbank("slavebank")->set_entry(data & 0x0f);
	441	membank("slavebank")->set_entry(data & 0x0f);
442	442	}
443	443
444	444
r14976	r14977
650	650	void williams_narc_sound_device::device_start()
651	651	{
652	652	// configure master CPU banks
653		UINT8 *rom = subregion("cpu0")->base();
	653	UINT8 *rom = memregion("cpu0")->base();
654	654	for (int bank = 0; bank < 16; bank++)
655	655	{
656	656	//
r14976	r14977
659	659	//  D3 -> A16
660	660	//
661	661	offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3);
662		subbank("masterbank")->configure_entry(bank, &rom[0x10000 + offset]);
	662	membank("masterbank")->configure_entry(bank, &rom[0x10000 + offset]);
663	663	}
664		subbank("masterupper")->set_base(&rom[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
	664	membank("masterupper")->set_base(&rom[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
665	665
666	666	// configure slave CPU banks
667		rom = subregion("cpu1")->base();
	667	rom = memregion("cpu1")->base();
668	668	for (int bank = 0; bank < 16; bank++)
669	669	{
670	670	//
r14976	r14977
673	673	//  D3 -> A16
674	674	//
675	675	offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3);
676		subbank("slavebank")->configure_entry(bank, &rom[0x10000 + offset]);
	676	membank("slavebank")->configure_entry(bank, &rom[0x10000 + offset]);
677	677	}
678		subbank("slaveupper")->set_base(&rom[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
	678	membank("slaveupper")->set_base(&rom[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
679	679
680	680	// register for save states
681	681	save_item(NAME(m_latch));
r14976	r14977
800	800
801	801	WRITE8_MEMBER(williams_adpcm_sound_device::bank_select_w)
802	802	{
803		subbank("rombank")->set_entry(data & 0x07);
	803	membank("rombank")->set_entry(data & 0x07);
804	804	}
805	805
806	806
r14976	r14977
811	811
812	812	WRITE8_MEMBER(williams_adpcm_sound_device::oki6295_bank_select_w)
813	813	{
814		subbank("okibank")->set_entry(data & 7);
	814	membank("okibank")->set_entry(data & 7);
815	815	}
816	816
817	817
r14976	r14977
929	929	void williams_adpcm_sound_device::device_start()
930	930	{
931	931	// configure banks
932		UINT8 *rom = subregion("cpu")->base();
933		subbank("rombank")->configure_entries(0, 8, &rom[0x10000], 0x8000);
934		subbank("romupper")->set_base(&rom[0x10000 + 0x4000 + 7 * 0x8000]);
	932	UINT8 *rom = memregion("cpu")->base();
	933	membank("rombank")->configure_entries(0, 8, &rom[0x10000], 0x8000);
	934	membank("romupper")->set_base(&rom[0x10000 + 0x4000 + 7 * 0x8000]);
935	935
936	936	// expand ADPCM data
937		rom = subregion("oki")->base();
	937	rom = memregion("oki")->base();
938	938	// it is assumed that U12 is loaded @ 0x00000 and U13 is loaded @ 0x40000
939		subbank("okibank")->configure_entry(0, &rom[0x40000]);
940		subbank("okibank")->configure_entry(1, &rom[0x40000]);
941		subbank("okibank")->configure_entry(2, &rom[0x20000]);
942		subbank("okibank")->configure_entry(3, &rom[0x00000]);
943		subbank("okibank")->configure_entry(4, &rom[0xe0000]);
944		subbank("okibank")->configure_entry(5, &rom[0xc0000]);
945		subbank("okibank")->configure_entry(6, &rom[0xa0000]);
946		subbank("okibank")->configure_entry(7, &rom[0x80000]);
	939	membank("okibank")->configure_entry(0, &rom[0x40000]);
	940	membank("okibank")->configure_entry(1, &rom[0x40000]);
	941	membank("okibank")->configure_entry(2, &rom[0x20000]);
	942	membank("okibank")->configure_entry(3, &rom[0x00000]);
	943	membank("okibank")->configure_entry(4, &rom[0xe0000]);
	944	membank("okibank")->configure_entry(5, &rom[0xc0000]);
	945	membank("okibank")->configure_entry(6, &rom[0xa0000]);
	946	membank("okibank")->configure_entry(7, &rom[0x80000]);
947	947
948	948	// register for save states
949	949	save_item(NAME(m_latch));

src/mame/audio/mario.c

r14976	r14977
402	402	//printf("ea: %d\n", ea);
403	403	//cputag_set_input_line(machine, "audiocpu", MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE);
404	404	if (state->m_eabank != NULL)
405		memory_set_bank(space.machine(), state->m_eabank, ea);
	405	state->membank(state->m_eabank)->set_entry(ea);
406	406	}
407	407
408	408	/****************************************************************
r14976	r14977
416	416	mario_state   *state = machine.driver_data<mario_state>();
417	417	device_t *audiocpu = machine.device("audiocpu");
418	418	#if USE_8039
419		UINT8 *SND = machine.region("audiocpu")->base();
	419	UINT8 *SND = machine.root_device().memregion("audiocpu")->base();
420	420
421	421	SND[0x1001] = 0x01;
422	422	#endif
r14976	r14977
426	426	{
427	427	state->m_eabank = "bank1";
428	428	audiocpu->memory().space(AS_PROGRAM)->install_read_bank(0x000, 0x7ff, "bank1");
429		memory_configure_bank(machine, "bank1", 0, 1, machine.region("audiocpu")->base(), 0);
430		memory_configure_bank(machine, "bank1", 1, 1, machine.region("audiocpu")->base() + 0x1000, 0x800);
	429	state->membank("bank1")->configure_entry(0, machine.root_device().memregion("audiocpu")->base());
	430	state->membank("bank1")->configure_entry(1, state->memregion("audiocpu")->base() + 0x1000);
431	431	}
432	432
433	433	state->save_item(NAME(state->m_last));
r14976	r14977
482	482
483	483	READ8_MEMBER(mario_state::mario_sh_tune_r)
484	484	{
485		UINT8 *SND = machine().region("audiocpu")->base();
486		UINT16 mask = machine().region("audiocpu")->bytes()-1;
	485	UINT8 *SND = memregion("audiocpu")->base();
	486	UINT16 mask = memregion("audiocpu")->bytes()-1;
487	487	UINT8 p2 = I8035_P2_R(*&space);
488	488
489	489	if ((p2 >> 7) & 1)

src/mame/audio/polepos.c

r14976	r14977
80	80	/* determine the volume */
81	81	slot = (state->m_sample_msb >> 3) & 7;
82	82	volume = volume_table[slot];
83		base = &device->machine().region("engine")->base()[slot * 0x800];
	83	base = &device->machine().root_device().memregion("engine")->base()[slot * 0x800];
84	84
85	85	/* fill in the sample */
86	86	while (samples--)

src/mame/machine/segacrp2.c

r14976	r14977
61	61
62	62
63	63	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
64		UINT8 *rom = machine.region(cputag)->base();
	64	UINT8 *rom = machine.root_device().memregion(cputag)->base();
65	65	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x8000);
66	66
67	67	space->set_decrypted_region(0x0000, 0x7fff, decrypted);

src/mame/machine/nmk004.c

r14976	r14977
175	175
176	176	if (sample != 0)
177	177	{
178		UINT8 *rom = NMK004_state.machine().region((chip == 0) ? "oki1" : "oki2")->base();
	178	UINT8 *rom = NMK004_state.machine().root_device().memregion((chip == 0) ? "oki1" : "oki2")->base();
179	179	int bank = (byte2 & 0x0c) >> 2;
180	180	int vol = (byte2 & 0x70) >> 4;
181	181
r14976	r14977
1033	1033	NMK004_state.oki1device = machine.device<okim6295_device>("oki1");
1034	1034	NMK004_state.oki2device = machine.device<okim6295_device>("oki2");
1035	1035
1036		NMK004_state.rom = machine.region("audiocpu")->base();
	1036	NMK004_state.rom = machine.root_device().memregion("audiocpu")->base();
1037	1037
1038	1038	ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x2f);
1039	1039

src/mame/machine/fd1089.c

r14976	r14977
405	405	static void sys16_decrypt(running_machine &machine, const UINT8 *key,int cputype)
406	406	{
407	407	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
408		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
409		int size = machine.region("maincpu")->bytes();
	408	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
	409	int size = machine.root_device().memregion("maincpu")->bytes();
410	410	int A;
411	411	decrypted = auto_alloc_array(machine, UINT16, size/2);
412	412
r14976	r14977
432	432
433	433	void fd1089a_decrypt(running_machine &machine)
434	434	{
435		sys16_decrypt(machine, machine.region("fd1089a")->base(), FD1089A);
	435	sys16_decrypt(machine, machine.root_device().memregion("fd1089a")->base(), FD1089A);
436	436	}
437	437
438	438	void fd1089b_decrypt(running_machine &machine)
439	439	{
440		sys16_decrypt(machine, machine.region("fd1089b")->base(), FD1089B);
	440	sys16_decrypt(machine, machine.root_device().memregion("fd1089b")->base(), FD1089B);
441	441	}
442	442

src/mame/machine/stvprot.c

r14976	r14977
114	114
115	115	static READ32_HANDLER( twcup98_prot_r )
116	116	{
117		UINT32 *ROM = (UINT32 *)space->machine().region("abus")->base();
	117	UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
118	118
119	119	if(a_bus[0] & 0x00010000)//protection calculation is activated
120	120	{
r14976	r14977
173	173
174	174	static READ32_HANDLER( sss_prot_r )
175	175	{
176		UINT32 *ROM = (UINT32 *)space->machine().region("abus")->base();
	176	UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
177	177
178	178	if(a_bus[0] & 0x00010000)//protection calculation is activated
179	179	{
r14976	r14977
238	238
239	239	static READ32_HANDLER( rsgun_prot_r )
240	240	{
241		UINT32 *ROM = (UINT32 *)space->machine().region("abus")->base();
	241	UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
242	242
243	243	if(a_bus[0] & 0x00010000)//protection calculation is activated
244	244	{
r14976	r14977
313	313
314	314	static READ32_HANDLER( elandore_prot_r )
315	315	{
316		UINT32 *ROM = (UINT32 *)space->machine().region("abus")->base();
	316	UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
317	317
318	318	if(a_bus[0] & 0x00010000)//protection calculation is activated
319	319	{
r14976	r14977
420	420
421	421	static READ32_HANDLER( ffreveng_prot_r )
422	422	{
423		UINT32 *ROM = (UINT32 *)space->machine().region("abus")->base();
	423	UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
424	424
425	425	if(a_bus[0] & 0x00010000)//protection calculation is activated
426	426	{
r14976	r14977
485	485	if ( offset == 3 && ctrl_index != -1 )
486	486	{
487	487	UINT32 data = 0;
488		UINT32 *prot_data = (UINT32 *)space->machine().region("user2")->base();
	488	UINT32 *prot_data = (UINT32 *)space->machine().root_device().memregion("user2")->base();
489	489
490	490	data = prot_data[ctrl_index++];
491	491
492		if ( ctrl_index >= space->machine().region("user2")->bytes()/4 )
	492	if ( ctrl_index >= space->machine().root_device().memregion("user2")->bytes()/4 )
493	493	{
494	494	ctrl_index = -1;
495	495	}
r14976	r14977
533	533	{
534	534	// the offsets written to the protection device definitely only refer to 2 of the roms
535	535	//  it's a fair assumption to say that only those 2 are connected to the protection device
536		UINT8 *ROM = (UINT8 *)space->machine().region("abus")->base()+0x1000000;
	536	UINT8 *ROM = (UINT8 *)space->machine().root_device().memregion("abus")->base()+0x1000000;
537	537
538	538	if (offset==2)
539	539	{

src/mame/machine/snes7110.c

r14976	r14977
276	276
277	277	static UINT8 SPC7110Decomp_dataread(SPC7110Decomp *thisptr)
278	278	{
279		UINT8 *ROM = thisptr->machine().region("cart")->base();
	279	UINT8 *ROM = thisptr->machine().root_device().memregion("cart")->base();
280	280	UINT32 size = thisptr->rom_size - 0x100000;
281	281	while(thisptr->decomp_offset >= size)
282	282	{
r14976	r14977
1071	1071	static UINT8 spc7110_mmio_read(address_space *space, UINT32 addr)
1072	1072	{
1073	1073	running_machine &machine = space->machine();
1074		UINT8 *ROM = machine.region("cart")->base();
	1074	UINT8 *ROM = machine.root_device().memregion("cart")->base();
1075	1075
1076	1076	addr &= 0xffff;
1077	1077
r14976	r14977
1257	1257
1258	1258	static void spc7110_mmio_write(running_machine &machine, UINT32 addr, UINT8 data)
1259	1259	{
1260		UINT8 *ROM = machine.region("cart")->base();
	1260	UINT8 *ROM = machine.root_device().memregion("cart")->base();
1261	1261
1262	1262	addr &= 0xffff;
1263	1263
r14976	r14977
1643	1643
1644	1644	static UINT8 spc7110_bank7_read(address_space *space, UINT32 offset)
1645	1645	{
1646		UINT8 *ROM = space->machine().region("cart")->base();
	1646	UINT8 *ROM = space->machine().root_device().memregion("cart")->base();
1647	1647	UINT32 addr = offset & 0x0fffff;
1648	1648
1649	1649	switch (offset & 0xf00000)

src/mame/machine/bublbobl.c

r14976	r14977
16	16	{
17	17
18	18	/* bits 0-2 select ROM bank */
19		memory_set_bank(machine(), "bank1", (data ^ 4) & 7);
	19	membank("bank1")->set_entry((data ^ 4) & 7);
20	20
21	21	/* bit 3 n.c. */
22	22
r14976	r14977
37	37	WRITE8_MEMBER(bublbobl_state::tokio_bankswitch_w)
38	38	{
39	39	/* bits 0-2 select ROM bank */
40		memory_set_bank(machine(), "bank1", data & 7);
	40	membank("bank1")->set_entry(data & 7);
41	41
42	42	/* bits 3-7 unknown */
43	43	}

src/mame/machine/3do.c

r14976	r14977
121	121	case 0:      /* Boot ROM writes 03180000 here and then starts reading some things */
122	122	{
123	123	/* disable ROM overlay */
124		memory_set_bank(machine(), "bank1", 0);
	124	membank("bank1")->set_entry(0);
125	125	}
126	126	m_slow2.cg_input = m_slow2.cg_input << 1 | ( data & 0x00000001 );
127	127	m_slow2.cg_w_count ++;

src/mame/machine/tnzs.c

r14976	r14977
535	535	DRIVER_INIT( kabukiz )
536	536	{
537	537	tnzs_state *state = machine.driver_data<tnzs_state>();
538		UINT8 *SOUND = machine.region("audiocpu")->base();
	538	UINT8 *SOUND = state->memregion("audiocpu")->base();
539	539	state->m_mcu_type = MCU_NONE_KABUKIZ;
540	540
541		memory_configure_bank(machine, "bank3", 0, 8, &SOUND[0x10000], 0x4000);
	541	state->membank("bank3")->configure_entries(0, 8, &SOUND[0x10000], 0x4000);
542	542	}
543	543
544	544	DRIVER_INIT( insectx )
r14976	r14977
659	659	tnzs_state *state = machine.driver_data<tnzs_state>();
660	660	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
661	661
662		memory_set_bank(machine, "bank1", state->m_bank1);
663		memory_set_bank(machine, "bank2", state->m_bank2);
	662	state->membank("bank1")->set_entry(state->m_bank1);
	663	state->membank("bank2")->set_entry(state->m_bank2);
664	664
665	665	if (state->m_bank1 <= 1)
666	666	space->install_write_bank(0x8000, 0xbfff, "bank1");
r14976	r14977
671	671	MACHINE_START( tnzs )
672	672	{
673	673	tnzs_state *state = machine.driver_data<tnzs_state>();
674		UINT8 *ROM = machine.region("maincpu")->base();
675		UINT8 *SUB = machine.region("sub")->base();
	674	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	675	UINT8 *SUB = state->memregion("sub")->base();
676	676
677		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
678		memory_configure_bank(machine, "bank2", 0, 4, &SUB[0x10000], 0x2000);
	677	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
	678	state->membank("bank2")->configure_entries(0, 4, &SUB[0x10000], 0x2000);
679	679
680		memory_set_bank(machine, "bank1", 2);
681		memory_set_bank(machine, "bank2", 0);
	680	state->membank("bank1")->set_entry(2);
	681	state->membank("bank2")->set_entry(0);
682	682
683	683	state->m_bank1 = 2;
684	684	state->m_bank2 = 0;
r14976	r14977
709	709	MACHINE_START( jpopnics )
710	710	{
711	711	tnzs_state *state = machine.driver_data<tnzs_state>();
712		UINT8 *ROM = machine.region("maincpu")->base();
713		UINT8 *SUB = machine.region("sub")->base();
	712	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	713	UINT8 *SUB = state->memregion("sub")->base();
714	714
715		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
716		memory_configure_bank(machine, "bank2", 0, 4, &SUB[0x10000], 0x2000);
	715	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
	716	state->membank("bank2")->configure_entries(0, 4, &SUB[0x10000], 0x2000);
717	717
718	718	state->m_subcpu = machine.device("sub");
719	719	state->m_mcu = NULL;
r14976	r14977
742	742
743	743	/* bits 0-2 select RAM/ROM bank */
744	744	m_bank1 = data & 0x07;
745		memory_set_bank(machine(), "bank1", m_bank1);
	745	membank("bank1")->set_entry(m_bank1);
746	746
747	747	if (m_bank1 <= 1)
748	748	space.install_write_bank(0x8000, 0xbfff, "bank1");
r14976	r14977
798	798
799	799	/* bits 0-1 select ROM bank */
800	800	m_bank2 = data & 0x03;
801		memory_set_bank(machine(), "bank2", m_bank2);
	801	membank("bank2")->set_entry(m_bank2);
802	802	}

src/mame/machine/midyunit.c

r14976	r14977
250	250	int i;
251	251
252	252	/* load graphics ROMs */
253		base = machine.region("gfx1")->base();
	253	base = state->memregion("gfx1")->base();
254	254	switch (bpp)
255	255	{
256	256	case 4:
r14976	r14977
298	298	{
299	299	case SOUND_CVSD_SMALL:
300	300	machine.device("cvsd:cpu")->memory().space(AS_PROGRAM)->install_write_handler(prot_start, prot_end, write8_delegate(FUNC(midyunit_state::cvsd_protection_w),state));
301		state->m_cvsd_protection_base = machine.region("cvsdcpu")->base() + 0x10000 + (prot_start - 0x8000);
	301	state->m_cvsd_protection_base = machine.root_device().memregion("cvsdcpu")->base() + 0x10000 + (prot_start - 0x8000);
302	302	break;
303	303
304	304	case SOUND_CVSD:

src/mame/machine/naomi.c

r14976	r14977
87	87	static void create_pic_from_retdat(running_machine& machine)
88	88	{
89	89	{
90		UINT8* hexregion = machine.region("pichex")->base();
91		UINT8* retregion = machine.region("picreturn")->base();
92		UINT8* newregion = machine.region("pic")->base();
	90	UINT8* hexregion = machine.root_device().memregion("pichex")->base();
	91	UINT8* retregion = machine.root_device().memregion("picreturn")->base();
	92	UINT8* newregion = machine.root_device().memregion("pic")->base();
93	93	int outcount = 0;
94	94
95	95	if (hexregion && retregion && newregion)

src/mame/machine/asteroid.c

r14976	r14977
96	96	{
97	97	if (data & 4)
98	98	{
99		memory_set_bankptr(machine(), "bank1", m_ram2);
100		memory_set_bankptr(machine(), "bank2", m_ram1);
	99	membank("bank1")->set_base(m_ram2);
	100	membank("bank2")->set_base(m_ram1);
101	101	}
102	102	else
103	103	{
104		memory_set_bankptr(machine(), "bank1", m_ram1);
105		memory_set_bankptr(machine(), "bank2", m_ram2);
	104	membank("bank1")->set_base(m_ram1);
	105	membank("bank2")->set_base(m_ram2);
106	106	}
107	107
108	108	set_led_status (machine(), 0, ~data & 0x02);
r14976	r14977
114	114	{
115	115	if (data & 0x80)
116	116	{
117		memory_set_bankptr(machine(), "bank1", m_ram2);
118		memory_set_bankptr(machine(), "bank2", m_ram1);
	117	membank("bank1")->set_base(m_ram2);
	118	membank("bank2")->set_base(m_ram1);
119	119	}
120	120	else
121	121	{
122		memory_set_bankptr(machine(), "bank1", m_ram1);
123		memory_set_bankptr(machine(), "bank2", m_ram2);
	122	membank("bank1")->set_base(m_ram1);
	123	membank("bank2")->set_base(m_ram2);
124	124	}
125	125	}
126	126

src/mame/machine/mhavoc.c

r14976	r14977
87	87	address_space *space = machine.device("alpha")->memory().space(AS_PROGRAM);
88	88	state->m_has_gamma_cpu = (machine.device("gamma") != NULL);
89	89
90		memory_configure_bank(machine, "bank1", 0, 1, state->m_zram0, 0);
91		memory_configure_bank(machine, "bank1", 1, 1, state->m_zram1, 0);
92		memory_configure_bank(machine, "bank2", 0, 4, machine.region("alpha")->base() + 0x10000, 0x2000);
	90	state->membank("bank1")->configure_entry(0, state->m_zram0);
	91	state->membank("bank1")->configure_entry(1, state->m_zram1);
	92	state->membank("bank2")->configure_entries(0, 4, state->memregion("alpha")->base() + 0x10000, 0x2000);
93	93
94	94	/* reset RAM/ROM banks to 0 */
95	95	state->mhavoc_ram_banksel_w(*space, 0, 0);
r14976	r14977
188	188
189	189	WRITE8_MEMBER(mhavoc_state::mhavoc_ram_banksel_w)
190	190	{
191		memory_set_bank(machine(), "bank1", data & 1);
	191	membank("bank1")->set_entry(data & 1);
192	192	}
193	193
194	194
195	195	WRITE8_MEMBER(mhavoc_state::mhavoc_rom_banksel_w)
196	196	{
197		memory_set_bank(machine(), "bank2", data & 3);
	197	membank("bank2")->set_entry(data & 3);
198	198	}
199	199
200	200

src/mame/machine/bfm_comn.c

r14976	r14977
21	21	{
22	22	UINT8 *tmp, *rom;
23	23
24		rom = machine.region(rom_region)->base();
	24	rom = machine.root_device().memregion(rom_region)->base();
25	25
26	26	tmp = auto_alloc_array(machine, UINT8, 0x10000);
27	27	{

src/mame/machine/neoboot.c

r14976	r14977
22	22	void neogeo_bootleg_cx_decrypt( running_machine &machine )
23	23	{
24	24	int i;
25		int cx_size = machine.region( "sprites" )->bytes();
26		UINT8 *rom = machine.region( "sprites" )->base();
	25	int cx_size = machine.root_device().memregion( "sprites" )->bytes();
	26	UINT8 *rom = machine.root_device().memregion( "sprites" )->base();
27	27	UINT8 *buf = auto_alloc_array(machine, UINT8, cx_size );
28	28
29	29	memcpy( buf, rom, cx_size );
r14976	r14977
38	38
39	39	void neogeo_bootleg_sx_decrypt( running_machine &machine, int value )
40	40	{
41		int sx_size = machine.region( "fixed" )->bytes();
42		UINT8 *rom = machine.region( "fixed" )->base();
	41	int sx_size = machine.root_device().memregion( "fixed" )->bytes();
	42	UINT8 *rom = machine.root_device().memregion( "fixed" )->base();
43	43	int i;
44	44
45	45	if (value == 1)
r14976	r14977
71	71	void kog_px_decrypt( running_machine &machine )
72	72	{
73	73	/* the protection chip does some *very* strange things to the rom */
74		UINT8 *src = machine.region("maincpu")->base();
	74	UINT8 *src = machine.root_device().memregion("maincpu")->base();
75	75	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x600000 );
76		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	76	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
77	77	int i;
78	78	static const int sec[] = { 0x3, 0x8, 0x7, 0xC, 0x1, 0xA, 0x6, 0xD };
79	79
r14976	r14977
155	155	static WRITE16_HANDLER( kof10th_custom_w )
156	156	{
157	157	if (!kof10thExtraRAMB[0xFFE]) { // Write to RAM bank A
158		UINT16 *prom = (UINT16*)space->machine().region( "maincpu" )->base();
	158	UINT16 *prom = (UINT16*)space->machine().root_device().memregion( "maincpu" )->base();
159	159	COMBINE_DATA(&prom[(0xE0000/2) + (offset & 0xFFFF)]);
160	160	} else { // Write S data on-the-fly
161		UINT8 *srom = space->machine().region( "fixed" )->base();
	161	UINT8 *srom = space->machine().root_device().memregion( "fixed" )->base();
162	162	srom[offset] = BITSWAP8(data,7,6,0,4,3,2,1,5);
163	163	}
164	164	}
r14976	r14977
169	169	if (offset == 0x5FFF8) { // Standard bankswitch
170	170	kof10thBankswitch(space, data);
171	171	} else if (offset == 0x5FFFC && kof10thExtraRAMB[0xFFC] != data) { // Special bankswitch
172		UINT8 *src = space->machine().region( "maincpu" )->base();
	172	UINT8 *src = space->machine().root_device().memregion( "maincpu" )->base();
173	173	memcpy (src + 0x10000,  src + ((data & 1) ? 0x810000 : 0x710000), 0xcffff);
174	174	}
175	175	COMBINE_DATA(&kof10thExtraRAMB[offset & 0xFFF]);
r14976	r14977
187	187	{
188	188	int i, j;
189	189	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x900000);
190		UINT8 *src = machine.region( "maincpu" )->base();
	190	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
191	191
192	192	memcpy(dst + 0x000000, src + 0x700000, 0x100000); // Correct (Verified in Uni-bios)
193	193	memcpy(dst + 0x100000, src + 0x000000, 0x800000);
r14976	r14977
215	215	void decrypt_kf10thep(running_machine &machine)
216	216	{
217	217	int i;
218		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
219		UINT8  *src = machine.region("maincpu")->base();
220		UINT16 *buf = (UINT16*)machine.region("audiocrypt")->base();
221		UINT8 *srom = (UINT8*)machine.region("fixed")->base();
	218	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
	219	UINT8  *src = machine.root_device().memregion("maincpu")->base();
	220	UINT16 *buf = (UINT16*)machine.root_device().memregion("audiocrypt")->base();
	221	UINT8 *srom = (UINT8*)machine.root_device().memregion("fixed")->base();
222	222	UINT8 *sbuf = auto_alloc_array(machine, UINT8, 0x20000);
223	223
224	224	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x200000);
r14976	r14977
256	256	static void kf2k5uni_px_decrypt( running_machine &machine )
257	257	{
258	258	int i, j, ofst;
259		UINT8 *src = machine.region( "maincpu" )->base();
	259	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
260	260	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x80);
261	261
262	262	for (i = 0; i < 0x800000; i+=0x80)
r14976	r14977
276	276	static void kf2k5uni_sx_decrypt( running_machine &machine )
277	277	{
278	278	int i;
279		UINT8 *srom = machine.region( "fixed" )->base();
	279	UINT8 *srom = machine.root_device().memregion( "fixed" )->base();
280	280
281	281	for (i = 0; i < 0x20000; i++)
282	282	srom[i] = BITSWAP8(srom[i], 4, 5, 6, 7, 0, 1, 2, 3);
r14976	r14977
285	285	static void kf2k5uni_mx_decrypt( running_machine &machine )
286	286	{
287	287	int i;
288		UINT8 *mrom = machine.region( "audiocpu" )->base();
	288	UINT8 *mrom = machine.root_device().memregion( "audiocpu" )->base();
289	289
290	290	for (i = 0; i < 0x30000; i++)
291	291	mrom[i] = BITSWAP8(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3);
r14976	r14977
343	343	{
344	344	int i,j;
345	345
346		UINT8 *src = machine.region("maincpu")->base();
	346	UINT8 *src = machine.root_device().memregion("maincpu")->base();
347	347	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x80);
348	348
349	349	memmove(src, src + 0x300000, 0x500000);
r14976	r14977
366	366
367	367	void kf2k2mp2_px_decrypt( running_machine &machine )
368	368	{
369		UINT8 *src = machine.region("maincpu")->base();
	369	UINT8 *src = machine.root_device().memregion("maincpu")->base();
370	370	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x600000);
371	371
372	372	memcpy (dst + 0x000000, src + 0x1C0000, 0x040000);
r14976	r14977
388	388	int tilesize=128;
389	389
390	390	UINT8* rom = auto_alloc_array(machine, UINT8, 16*tilesize);   // 16 tiles buffer
391		UINT8* realrom = machine.region("sprites")->base() + start*tilesize;
	391	UINT8* realrom = machine.root_device().memregion("sprites")->base() + start*tilesize;
392	392
393	393	for (i = 0; i < (end-start)/16; i++) {
394	394	for (j = 0; j < 16; j++) {
r14976	r14977
441	441
442	442	void decrypt_cthd2003( running_machine &machine )
443	443	{
444		UINT8 *romdata = machine.region("fixed")->base();
	444	UINT8 *romdata = machine.root_device().memregion("fixed")->base();
445	445	UINT8 *tmp = auto_alloc_array(machine, UINT8, 8*128*128);
446	446
447	447	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
r14976	r14977
450	450	memcpy(tmp+8*96*128, romdata+8*96*128, 8*32*128);
451	451	memcpy(romdata, tmp, 8*128*128);
452	452
453		romdata = machine.region("audiocpu")->base()+0x10000;
	453	romdata = machine.root_device().memregion("audiocpu")->base()+0x10000;
454	454	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
455	455	memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128);
456	456	memcpy(tmp+8*64*128, romdata+8*32*128, 8*32*128);
r14976	r14977
482	482	{
483	483	/* patches thanks to razoola */
484	484	int i;
485		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	485	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
486	486
487	487	/* special ROM banking handler */
488	488	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x2ffff0, 0x2fffff, FUNC(cthd2003_bankswitch_w));
r14976	r14977
525	525
526	526	static void ct2k3sp_sx_decrypt( running_machine &machine )
527	527	{
528		int rom_size = machine.region( "fixed" )->bytes();
529		UINT8 *rom = machine.region( "fixed" )->base();
	528	int rom_size = machine.root_device().memregion( "fixed" )->bytes();
	529	UINT8 *rom = machine.root_device().memregion( "fixed" )->base();
530	530	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
531	531	int i;
532	532	int ofst;
r14976	r14977
555	555
556	556	void decrypt_ct2k3sp( running_machine &machine )
557	557	{
558		UINT8 *romdata = machine.region("audiocpu")->base()+0x10000;
	558	UINT8 *romdata = machine.root_device().memregion("audiocpu")->base()+0x10000;
559	559	UINT8*tmp = auto_alloc_array(machine, UINT8, 8*128*128);
560	560	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
561	561	memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128);
r14976	r14977
575	575
576	576	void decrypt_ct2k3sa( running_machine &machine )
577	577	{
578		UINT8 *romdata = machine.region("audiocpu")->base()+0x10000;
	578	UINT8 *romdata = machine.root_device().memregion("audiocpu")->base()+0x10000;
579	579	UINT8*tmp = auto_alloc_array(machine, UINT8, 8*128*128);
580	580	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
581	581	memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128);
r14976	r14977
592	592	{
593	593	/* patches thanks to razoola - same as for cthd2003*/
594	594	int i;
595		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	595	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
596	596
597	597	// theres still a problem on the character select screen but it seems to be related to cpu core timing issues,
598	598	// overclocking the 68k prevents it.
r14976	r14977
633	633
634	634	void decrypt_kof2k4se_68k( running_machine &machine )
635	635	{
636		UINT8 *src = machine.region("maincpu")->base()+0x100000;
	636	UINT8 *src = machine.root_device().memregion("maincpu")->base()+0x100000;
637	637	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x400000);
638	638	int i;
639	639	static const int sec[] = {0x300000,0x200000,0x100000,0x000000};
r14976	r14977
653	653	void lans2004_vx_decrypt( running_machine &machine )
654	654	{
655	655	int i;
656		UINT8 *rom = machine.region( "ymsnd" )->base();
	656	UINT8 *rom = machine.root_device().memregion( "ymsnd" )->base();
657	657	for (i = 0; i < 0xA00000; i++)
658	658	rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
659	659	}
r14976	r14977
662	662	{
663	663	/* Descrambling P ROMs - Thanks to Razoola for the info */
664	664	int i;
665		UINT8 *src = machine.region( "maincpu" )->base();
666		UINT16 *rom = (UINT16*)machine.region( "maincpu" )->base();
	665	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
	666	UINT16 *rom = (UINT16*)machine.root_device().memregion( "maincpu" )->base();
667	667	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x600000);
668	668
669	669	{
r14976	r14977
742	742	0x06, 0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x00
743	743	};
744	744	int i;
745		int size = machine.region( "maincpu" )->bytes();
746		UINT8 *src = machine.region( "maincpu" )->base();
	745	int size = machine.root_device().memregion( "maincpu" )->bytes();
	746	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
747	747	UINT8 *dst = auto_alloc_array(machine, UINT8,  size );
748	748	int ofst;
749	749	for( i = 0; i < size / 0x100000; i++ ){
r14976	r14977
771	771	{ 3, 0, 2, 1 },
772	772	};
773	773	int i;
774		int size = machine.region( "sprites" )->bytes();
775		UINT8 *src = machine.region( "sprites" )->base();
	774	int size = machine.root_device().memregion( "sprites" )->bytes();
	775	UINT8 *src = machine.root_device().memregion( "sprites" )->base();
776	776	UINT8 *dst = auto_alloc_array(machine, UINT8,  size );
777	777	int ofst;
778	778	memcpy( dst, src, size );
r14976	r14977
798	798	static const int sec[] = {
799	799	0x00, 0x03, 0x02, 0x05, 0x04, 0x01
800	800	};
801		int size = machine.region( "maincpu" )->bytes();
802		UINT8 *src = machine.region( "maincpu" )->base();
	801	int size = machine.root_device().memregion( "maincpu" )->bytes();
	802	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
803	803	UINT8 *dst = auto_alloc_array(machine, UINT8,  size );
804	804	int i;
805	805	int ofst;
r14976	r14977
822	822	void svcplus_px_hack( running_machine &machine )
823	823	{
824	824	/* patched by the protection chip? */
825		UINT8 *src = machine.region( "maincpu" )->base();
	825	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
826	826	src[ 0x0f8010 ] = 0x40;
827	827	src[ 0x0f8011 ] = 0x04;
828	828	src[ 0x0f8012 ] = 0x00;
r14976	r14977
843	843	static const int sec[] = {
844	844	0x01, 0x02, 0x03, 0x04, 0x05, 0x00
845	845	};
846		int size = machine.region( "maincpu" )->bytes();
847		UINT8 *src = machine.region( "maincpu" )->base();
	846	int size = machine.root_device().memregion( "maincpu" )->bytes();
	847	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
848	848	UINT8 *dst = auto_alloc_array(machine, UINT8,  size );
849	849	memcpy( dst, src, size );
850	850	for( i = 0; i < 6; i++ ){
r14976	r14977
862	862	static const int sec[] = {
863	863	0x06, 0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x00
864	864	};
865		int size = machine.region( "maincpu" )->bytes();
866		UINT8 *src = machine.region( "maincpu" )->base();
	865	int size = machine.root_device().memregion( "maincpu" )->bytes();
	866	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
867	867	UINT8 *dst = auto_alloc_array(machine, UINT8,  size );
868	868	int i;
869	869	int ofst;
r14976	r14977
882	882	void svcsplus_px_hack( running_machine &machine )
883	883	{
884	884	/* patched by the protection chip? */
885		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	885	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
886	886	mem16[0x9e90/2] = 0x000f;
887	887	mem16[0x9e92/2] = 0xc9c0;
888	888	mem16[0xa10c/2] = 0x4eb9;
r14976	r14977
924	924	UINT8* cr = (UINT8 *)kof2003_tbl;
925	925	UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)]<<16)|(cr[BYTE_XOR_LE(0x1ff2)]<<8)|cr[BYTE_XOR_LE(0x1ff1)];
926	926	UINT8 prt = cr[BYTE_XOR_LE(0x1ff2)];
927		UINT8* mem = (UINT8 *)space->machine().region("maincpu")->base();
	927	UINT8* mem = (UINT8 *)space->machine().root_device().memregion("maincpu")->base();
928	928
929	929	cr[BYTE_XOR_LE(0x1ff0)] =  0xa0;
930	930	cr[BYTE_XOR_LE(0x1ff1)] &= 0xfe;
r14976	r14977
942	942	UINT8* cr = (UINT8 *)kof2003_tbl;
943	943	UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)]<<16)|(cr[BYTE_XOR_LE(0x1ff2)]<<8)|cr[BYTE_XOR_LE(0x1ff0)];
944	944	UINT8 prt = cr[BYTE_XOR_LE(0x1ff2)];
945		UINT8* mem = (UINT8 *)space->machine().region("maincpu")->base();
	945	UINT8* mem = (UINT8 *)space->machine().root_device().memregion("maincpu")->base();
946	946
947	947	cr[BYTE_XOR_LE(0x1ff0)] &= 0xfe;
948	948	cr[BYTE_XOR_LE(0x1ff3)] &= 0x7f;
r14976	r14977
960	960	};
961	961
962	962	int rom_size = 0x800000;
963		UINT8 *rom = machine.region( "maincpu" )->base();
	963	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
964	964	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
965	965	memcpy( buf, rom, rom_size );
966	966
r14976	r14977
982	982	void kf2k3pl_px_decrypt( running_machine &machine )
983	983	{
984	984	UINT16*tmp = auto_alloc_array(machine, UINT16, 0x100000/2);
985		UINT16*rom = (UINT16*)machine.region( "maincpu" )->base();
	985	UINT16*rom = (UINT16*)machine.root_device().memregion( "maincpu" )->base();
986	986	int j;
987	987	int i;
988	988
r14976	r14977
1010	1010	void kf2k3upl_px_decrypt( running_machine &machine )
1011	1011	{
1012	1012	{
1013		UINT8 *src = machine.region("maincpu")->base();
	1013	UINT8 *src = machine.root_device().memregion("maincpu")->base();
1014	1014	memmove(src+0x100000, src, 0x600000);
1015	1015	memmove(src, src+0x700000, 0x100000);
1016	1016	}
r14976	r14977
1019	1019
1020	1020	int ofst;
1021	1021	int i;
1022		UINT8 *rom = machine.region( "maincpu" )->base() + 0xfe000;
1023		UINT8 *buf = machine.region( "maincpu" )->base() + 0xd0610;
	1022	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base() + 0xfe000;
	1023	UINT8 *buf = machine.root_device().memregion( "maincpu" )->base() + 0xd0610;
1024	1024
1025	1025	for( i = 0; i < 0x2000 / 2; i++ ){
1026	1026	ofst = (i & 0xff00) + BITSWAP8( (i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5 );
r14976	r14977
1040	1040
1041	1041	void samsho5b_px_decrypt( running_machine &machine )
1042	1042	{
1043		int px_size = machine.region( "maincpu" )->bytes();
1044		UINT8 *rom = machine.region( "maincpu" )->base();
	1043	int px_size = machine.root_device().memregion( "maincpu" )->bytes();
	1044	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
1045	1045	UINT8 *buf = auto_alloc_array(machine, UINT8,  px_size );
1046	1046	int ofst;
1047	1047	int i;
r14976	r14977
1067	1067
1068	1068	void samsho5b_vx_decrypt( running_machine &machine )
1069	1069	{
1070		int vx_size = machine.region( "ymsnd" )->bytes();
1071		UINT8 *rom = machine.region( "ymsnd" )->base();
	1070	int vx_size = machine.root_device().memregion( "ymsnd" )->bytes();
	1071	UINT8 *rom = machine.root_device().memregion( "ymsnd" )->base();
1072	1072	int i;
1073	1073
1074	1074	for( i = 0; i < vx_size; i++ )
r14976	r14977
1084	1084	void matrimbl_decrypt( running_machine &machine )
1085	1085	{
1086	1086	/* decrypt Z80 */
1087		UINT8 *rom = machine.region( "audiocpu" )->base()+0x10000;
	1087	UINT8 *rom = machine.root_device().memregion( "audiocpu" )->base()+0x10000;
1088	1088	UINT8 *buf = auto_alloc_array(machine, UINT8,  0x20000 );
1089	1089	int i, j=0;
1090	1090	memcpy( buf, rom, 0x20000 );

src/mame/machine/snesbsx.c

r14976	r14977
48	48	static void bsx_update_memory_map(void)
49	49	{
50	50	bsx_state.ram_source = BIT(bsx_state.cart_regs[0x01], 7) ? SNES_BSX_PRAM : SNES_BSX_FLASH;
51		//  UINT8 *RAM = (bsx_state.cart_regs[0x01] & 0x80) == 0x00 ? space->machine().region("flash")->base() : bsx_state.pram;
	51	//  UINT8 *RAM = (bsx_state.cart_regs[0x01] & 0x80) == 0x00 ? space->machine().root_device().memregion("flash")->base() : bsx_state.pram;
52	52
53	53	logerror("BSX: updated memory map, current RAM: %d", bsx_state.ram_source);
54	54	if (!BIT(bsx_state.cart_regs[0x02], 7))
r14976	r14977
149	149	#ifdef UNUSED_FUNCTION
150	150	static READ8_HANDLER( bsx_flash_read )
151	151	{
152		UINT8 *FLASH = space->machine().region("flash")->base();
	152	UINT8 *FLASH = space->machine().root_device().memregion("flash")->base();
153	153
154	154	if (offset == 0x0002)
155	155	{

src/mame/machine/midtunit.c

r14976	r14977
417	417	register_state_saving(machine);
418	418
419	419	/* load the graphics ROMs -- quadruples */
420		base = machine.region("gfx1")->base();
	420	base = machine.root_device().memregion("gfx1")->base();
421	421	for (i = 0; i < midtunit_gfx_rom_size; i += 4)
422	422	{
423	423	midtunit_gfx_rom[i + 0] = base[0 * gfx_chunk + i / 4];
r14976	r14977
526	526	/* sound chip protection (hidden RAM) */
527	527	machine.device("adpcm:cpu")->memory().space(AS_PROGRAM)->install_read_bank(0xfbcf, 0xfbf9, "bank7");
528	528	machine.device("adpcm:cpu")->memory().space(AS_PROGRAM)->install_write_bank(0xfbcf, 0xfbf9, "bank9");
529		memory_set_bankptr(machine, "bank9", auto_alloc_array(machine, UINT8, 0x80));
	529	state->membank("bank9")->set_base(auto_alloc_array(machine, UINT8, 0x80));
530	530
531	531	#if ENABLE_ALL_JDREDD_LEVELS
532	532	/* how about the final levels? */

src/mame/machine/konami1.c

r14976	r14977
43	43	UINT8 *konami1_decode(running_machine &machine, const char *cpu)
44	44	{
45	45	address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
46		const UINT8 *rom = machine.region(cpu)->base();
47		int size = machine.region(cpu)->bytes();
	46	const UINT8 *rom = machine.root_device().memregion(cpu)->base();
	47	int size = machine.root_device().memregion(cpu)->bytes();
48	48	int A;
49	49
50	50	UINT8 *decrypted = auto_alloc_array(machine, UINT8, size);

src/mame/machine/namcos1.c

r14976	r14977
554	554
555	555	WRITE8_MEMBER(namcos1_state::namcos1_sound_bankswitch_w)
556	556	{
557		UINT8 *rom = machine().region("audiocpu")->base() + 0xc000;
	557	UINT8 *rom = memregion("audiocpu")->base() + 0xc000;
558	558
559	559	int bank = (data & 0x70) >> 4;
560		memory_set_bankptr(machine(), "bank17",rom + 0x4000 * bank);
	560	membank("bank17")->set_base(rom + 0x4000 * bank);
561	561	}
562	562
563	563
r14976	r14977
677	677
678	678	/* for BANK handlers , memory direct and OP-code base */
679	679	if (handler->bank_pointer)
680		memory_set_bankptr(machine, banktags[banknum], handler->bank_pointer);
	680	state->membank(banktags[banknum])->set_base(handler->bank_pointer);
681	681
682	682	/* read handlers */
683	683	if (!handler->bank_handler_r)
r14976	r14977
826	826
827	827	/* PRG0-PRG7 */
828	828	{
829		UINT8 *rom = machine.region("user1")->base();
	829	UINT8 *rom = machine.root_device().memregion("user1")->base();
830	830
831	831	namcos1_install_bank(state,0x200,0x3ff,0,rom_w,0,rom);
832	832
r14976	r14977
920	920	/* bit 0-1 : address line A15-A16 */
921	921	addr += (data & 3) * 0x8000;
922	922
923		memory_set_bankptr(machine(), "bank20", machine().region("mcu")->base() + addr);
	923	membank("bank20")->set_base(machine().root_device().memregion("mcu")->base() + addr);
924	924	}
925	925
926	926
r14976	r14977
997	997	state_save_register_global_pointer(machine, state->m_paletteram, 0x8000);
998	998
999	999	/* Point mcu & sound shared RAM to destination */
1000		memory_set_bankptr(machine,  "bank18", state->m_triram );
1001		memory_set_bankptr(machine,  "bank19", state->m_triram );
	1000	state->membank("bank18")->set_base(state->m_triram );
	1001	state->membank("bank19")->set_base(state->m_triram );
1002	1002
1003	1003	/* build bank elements */
1004	1004	namcos1_build_banks(machine,specific->key_r,specific->key_w);
r14976	r14977
1126	1126	static const UINT8 target[8] = {0x34,0x37,0x35,0x37,0x96,0x00,0x2e,0xed};
1127	1127	UINT8 *rombase, *srcptr, *endptr, *scanptr;
1128	1128
1129		rombase = machine.region("user1")->base();
	1129	rombase = machine.root_device().memregion("user1")->base();
1130	1130	srcptr = rombase + 0x1e000;
1131	1131	endptr = srcptr + 0xa000;
1132	1132

src/mame/machine/deco156.c

r14976	r14977
124	124
125	125	void deco156_decrypt(running_machine &machine)
126	126	{
127		UINT32 *rom = (UINT32 *)machine.region("maincpu")->base();
128		int length = machine.region("maincpu")->bytes();
	127	UINT32 *rom = (UINT32 *)machine.root_device().memregion("maincpu")->base();
	128	int length = machine.root_device().memregion("maincpu")->bytes();
129	129	UINT32 *buf = auto_alloc_array(machine, UINT32, length/4);
130	130
131	131	memcpy(buf, rom, length);

src/mame/machine/nmk112.c

r14976	r14977
120	120	}
121	121	else
122	122	{
123		nmk112->rom0 = device->machine().region(intf->rgn0)->base();
124		nmk112->size0 = device->machine().region(intf->rgn0)->bytes() - 0x40000;
	123	nmk112->rom0 = device->machine().root_device().memregion(intf->rgn0)->base();
	124	nmk112->size0 = device->machine().root_device().memregion(intf->rgn0)->bytes() - 0x40000;
125	125	}
126	126
127	127	if (intf->rgn1 == NULL)
r14976	r14977
131	131	}
132	132	else
133	133	{
134		nmk112->rom1 = device->machine().region(intf->rgn1)->base();
135		nmk112->size1 = device->machine().region(intf->rgn1)->bytes() - 0x40000;
	134	nmk112->rom1 = device->machine().root_device().memregion(intf->rgn1)->base();
	135	nmk112->size1 = device->machine().root_device().memregion(intf->rgn1)->bytes() - 0x40000;
136	136	}
137	137
138	138	nmk112->page_mask = ~intf->disable_page_mask;

src/mame/machine/pgmprot1.c

r14976	r14977
386	386	static void pgm_decode_kovlsqh2_tiles( running_machine &machine )
387	387	{
388	388	int i, j;
389		UINT16 *src = (UINT16 *)(machine.region("tiles")->base() + 0x180000);
	389	UINT16 *src = (UINT16 *)(machine.root_device().memregion("tiles")->base() + 0x180000);
390	390	UINT16 *dst = auto_alloc_array(machine, UINT16, 0x800000);
391	391
392	392	for (i = 0; i < 0x800000 / 2; i++)
r14976	r14977
421	421	static void pgm_decode_kovlsqh2_samples( running_machine &machine )
422	422	{
423	423	int i;
424		UINT8 *src = (UINT8 *)(machine.region("ics")->base() + 0x400000);
	424	UINT8 *src = (UINT8 *)(machine.root_device().memregion("ics")->base() + 0x400000);
425	425
426	426	for (i = 0; i < 0x400000; i+=2) {
427	427	src[i + 0x000001] = src[i + 0x400001];
r14976	r14977
433	433	static void pgm_decode_kovqhsgs_program( running_machine &machine )
434	434	{
435	435	int i;
436		UINT16 *src = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	436	UINT16 *src = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
437	437	UINT16 *dst = auto_alloc_array(machine, UINT16, 0x400000);
438	438
439	439	for (i = 0; i < 0x400000 / 2; i++)
r14976	r14977
451	451	static void pgm_decode_kovqhsgs2_program( running_machine &machine )
452	452	{
453	453	int i;
454		UINT16 *src = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	454	UINT16 *src = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
455	455	UINT16 *dst = auto_alloc_array(machine, UINT16, 0x400000);
456	456
457	457	for (i = 0; i < 0x400000 / 2; i++)
r14976	r14977
472	472	pgm_decode_kovqhsgs2_program(machine);
473	473	pgm_decode_kovlsqh2_tiles(machine);
474	474
475		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x0000000);
476		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x0800000);
477		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x1000000);
478		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x1800000);
479		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x2000000);
480		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x2800000);
481		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprmask")->base() + 0x0000000);
482		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprmask")->base() + 0x0800000);
	475	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x0000000);
	476	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x0800000);
	477	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x1000000);
	478	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x1800000);
	479	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x2000000);
	480	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x2800000);
	481	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprmask")->base() + 0x0000000);
	482	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprmask")->base() + 0x0800000);
483	483
484	484	pgm_decode_kovlsqh2_samples(machine);
485	485	pgm_basic_init(machine);
r14976	r14977
493	493	pgm_decode_kovqhsgs_program(machine);
494	494	pgm_decode_kovlsqh2_tiles(machine);
495	495
496		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x0000000);
497		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x0800000);
498		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x1000000);
499		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x1800000);
500		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x2000000);
501		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprcol")->base() + 0x2800000);
502		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprmask")->base() + 0x0000000);
503		pgm_decode_kovlsqh2_sprites(machine, machine.region("sprmask")->base() + 0x0800000);
	496	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x0000000);
	497	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x0800000);
	498	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x1000000);
	499	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x1800000);
	500	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x2000000);
	501	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprcol")->base() + 0x2800000);
	502	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprmask")->base() + 0x0000000);
	503	pgm_decode_kovlsqh2_sprites(machine, machine.root_device().memregion("sprmask")->base() + 0x0800000);
504	504
505	505	pgm_decode_kovlsqh2_samples(machine);
506	506	pgm_basic_init(machine);

src/mame/machine/balsente.c

r14976	r14977
172	172	memset(state->m_noise_position, 0, sizeof(state->m_noise_position));
173	173
174	174	/* point the banks to bank 0 */
175		numbanks = (machine.region("maincpu")->bytes() > 0x40000) ? 16 : 8;
176		memory_configure_bank(machine, "bank1", 0, numbanks, &machine.region("maincpu")->base()[0x10000], 0x6000);
177		memory_configure_bank(machine, "bank2", 0, numbanks, &machine.region("maincpu")->base()[0x12000], 0x6000);
178		memory_set_bank(space->machine(), "bank1", 0);
179		memory_set_bank(space->machine(), "bank2", 0);
	175	numbanks = (machine.root_device().memregion("maincpu")->bytes() > 0x40000) ? 16 : 8;
	176	state->membank("bank1")->configure_entries(0, numbanks, &machine.root_device().memregion("maincpu")->base()[0x10000], 0x6000);
	177	state->membank("bank2")->configure_entries(0, numbanks, &state->memregion("maincpu")->base()[0x12000], 0x6000);
	178	state->membank("bank1")->set_entry(0);
	179	state->membank("bank2")->set_entry(0);
180	180	machine.device("maincpu")->reset();
181	181
182	182	/* start a timer to generate interrupts */
r14976	r14977
280	280	WRITE8_MEMBER(balsente_state::balsente_rombank_select_w)
281	281	{
282	282	/* the bank number comes from bits 4-6 */
283		memory_set_bank(machine(), "bank1", (data >> 4) & 7);
284		memory_set_bank(machine(), "bank2", (data >> 4) & 7);
	283	membank("bank1")->set_entry((data >> 4) & 7);
	284	membank("bank2")->set_entry((data >> 4) & 7);
285	285	}
286	286
287	287
r14976	r14977
291	291	int bank = data & 7;
292	292
293	293	/* top bit controls which half of the ROMs to use (Name that Tune only) */
294		if (machine().region("maincpu")->bytes() > 0x40000) bank |= (data >> 4) & 8;
	294	if (machine().root_device().memregion("maincpu")->bytes() > 0x40000) bank |= (data >> 4) & 8;
295	295
296	296	/* when they set the AB bank, it appears as though the CD bank is reset */
297	297	if (data & 0x20)
298	298	{
299		memory_set_bank(machine(), "bank1", bank);
300		memory_set_bank(machine(), "bank2", 6);
	299	membank("bank1")->set_entry(bank);
	300	membank("bank2")->set_entry(6);
301	301	}
302	302
303	303	/* set both banks */
304	304	else
305	305	{
306		memory_set_bank(machine(), "bank1", bank);
307		memory_set_bank(machine(), "bank2", bank);
	306	membank("bank1")->set_entry(bank);
	307	membank("bank2")->set_entry(bank);
308	308	}
309	309	}
310	310

src/mame/machine/vsnes.c

r14976	r14977
182	182	/* count determines the size of the area mapped */
183	183	for (i = 0; i < count; i++)
184	184	{
185		memory_set_bank(machine, chr_banknames[i + start], vrom_start_bank + i);
	185	state->membank(chr_banknames[i + start])->set_entry(vrom_start_bank + i);
186	186	}
187	187	}
188	188
r14976	r14977
202	202
203	203	ppu1_space->install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(vsnes_state::vsnes_nt0_r),state), write8_delegate(FUNC(vsnes_state::vsnes_nt0_w),state));
204	204
205		state->m_vrom[0] = machine.region("gfx1")->base();
206		state->m_vrom_size[0] = machine.region("gfx1")->bytes();
	205	state->m_vrom[0] = machine.root_device().memregion("gfx1")->base();
	206	state->m_vrom_size[0] = state->memregion("gfx1")->bytes();
207	207	state->m_vrom_banks = state->m_vrom_size[0] / 0x400;
208	208
209	209	/* establish chr banks */
r14976	r14977
214	214	for (i = 0; i < 8; i++)
215	215	{
216	216	ppu1_space->install_read_bank(0x0400 * i, 0x0400 * i + 0x03ff, chr_banknames[i]);
217		memory_configure_bank(machine, chr_banknames[i], 0, state->m_vrom_banks, state->m_vrom[0], 0x400);
	217	state->membank(chr_banknames[i])->configure_entries(0, state->m_vrom_banks, state->m_vrom[0], 0x400);
218	218	}
219	219	v_set_videorom_bank(machine, 0, 8, 0);
220	220	}
r14976	r14977
227	227	MACHINE_START( vsdual )
228	228	{
229	229	vsnes_state *state = machine.driver_data<vsnes_state>();
230		state->m_vrom[0] = machine.region("gfx1")->base();
231		state->m_vrom[1] = machine.region("gfx2")->base();
232		state->m_vrom_size[0] = machine.region("gfx1")->bytes();
233		state->m_vrom_size[1] = machine.region("gfx2")->bytes();
	230	state->m_vrom[0] = machine.root_device().memregion("gfx1")->base();
	231	state->m_vrom[1] = machine.root_device().memregion("gfx2")->base();
	232	state->m_vrom_size[0] = machine.root_device().memregion("gfx1")->bytes();
	233	state->m_vrom_size[1] = state->memregion("gfx2")->bytes();
234	234
235	235	/* establish nametable ram */
236	236	state->m_nt_ram[0] = auto_alloc_array(machine, UINT8, 0x1000);
r14976	r14977
251	251	machine.device("ppu1")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank2");
252	252	// read only!
253	253	machine.device("ppu2")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank3");
254		memory_configure_bank(machine, "bank2", 0, state->m_vrom_size[0] / 0x2000, state->m_vrom[0], 0x2000);
255		memory_configure_bank(machine, "bank3", 0, state->m_vrom_size[1] / 0x2000, state->m_vrom[1], 0x2000);
256		memory_set_bank(machine, "bank2", 0);
257		memory_set_bank(machine, "bank3", 0);
	254	state->membank("bank2")->configure_entries(0, state->m_vrom_size[0] / 0x2000, state->m_vrom[0], 0x2000);
	255	state->membank("bank3")->configure_entries(0, state->m_vrom_size[1] / 0x2000, state->m_vrom[1], 0x2000);
	256	state->membank("bank2")->set_entry(0);
	257	state->membank("bank3")->set_entry(0);
258	258	}
259	259
260	260	/*************************************
r14976	r14977
419	419	case 2: /* code bank 1 */
420	420	case 4: /* code bank 2 */
421	421	{
422		UINT8 *prg = machine().region("maincpu")->base();
	422	UINT8 *prg = memregion("maincpu")->base();
423	423	memcpy(&prg[0x08000 + reg * 0x1000], &prg[bankoffset], 0x2000);
424	424	}
425	425	break;
r14976	r14977
438	438	{
439	439	/* We do manual banking, in case the code falls through */
440	440	/* Copy the initial banks */
441		UINT8 *prg = machine.region("maincpu")->base();
	441	UINT8 *prg = machine.root_device().memregion("maincpu")->base();
442	442	memcpy(&prg[0x08000], &prg[0x18000], 0x8000);
443	443
444	444	/* banking is done with writes to the $8000-$ffff area */
r14976	r14977
454	454	int addr;
455	455	if((data & 0x04) != m_old_bank)
456	456	{
457		UINT8 *prg = machine().region("maincpu")->base();
	457	UINT8 *prg = memregion("maincpu")->base();
458	458	m_old_bank = data & 0x04;
459	459	addr = m_old_bank ? 0x12000: 0x10000;
460	460	memcpy(&prg[0x08000], &prg[addr], 0x2000);
r14976	r14977
467	467	{
468	468	vsnes_state *state = machine.driver_data<vsnes_state>();
469	469	/* set up the default bank */
470		UINT8 *prg = machine.region("maincpu")->base();
	470	UINT8 *prg = state->memregion("maincpu")->base();
471	471	memcpy (&prg[0x08000], &prg[0x12000], 0x2000);
472	472
473	473	/* vrom switching is enabled with bit 2 of $4016 */
r14976	r14977
562	562	case 3:   /* program banking */
563	563	{
564	564	int bank = (m_drmario_shiftreg & 0x03) * 0x4000;
565		UINT8 *prg = machine().region("maincpu")->base();
	565	UINT8 *prg = memregion("maincpu")->base();
566	566
567	567	if (!m_size16k)
568	568	{
r14976	r14977
596	596	vsnes_state *state = machine.driver_data<vsnes_state>();
597	597	/* We do manual banking, in case the code falls through */
598	598	/* Copy the initial banks */
599		UINT8 *prg = machine.region("maincpu")->base();
	599	UINT8 *prg = state->memregion("maincpu")->base();
600	600	memcpy(&prg[0x08000], &prg[0x10000], 0x4000);
601	601	memcpy(&prg[0x0c000], &prg[0x1c000], 0x4000);
602	602
r14976	r14977
613	613	WRITE8_MEMBER(vsnes_state::vsvram_rom_banking)
614	614	{
615	615	int rombank = 0x10000 + (data & 7) * 0x4000;
616		UINT8 *prg = machine().region("maincpu")->base();
	616	UINT8 *prg = memregion("maincpu")->base();
617	617
618	618	memcpy(&prg[0x08000], &prg[rombank], 0x4000);
619	619	}
r14976	r14977
622	622	{
623	623	vsnes_state *state = machine.driver_data<vsnes_state>();
624	624	/* when starting the game, the 1st 16k and the last 16k are loaded into the 2 banks */
625		UINT8 *prg = machine.region("maincpu")->base();
	625	UINT8 *prg = state->memregion("maincpu")->base();
626	626	memcpy(&prg[0x08000], &prg[0x28000], 0x8000);
627	627
628	628	/* banking is done with writes to the $8000-$ffff area */
r14976	r14977
638	638	static void mapper4_set_prg( running_machine &machine )
639	639	{
640	640	vsnes_state *state = machine.driver_data<vsnes_state>();
641		UINT8 *prg = machine.region("maincpu")->base();
	641	UINT8 *prg = state->memregion("maincpu")->base();
642	642	UINT8 prg_flip = (state->m_MMC3_cmd & 0x40) ? 2 : 0;
643	643
644	644	memcpy(&prg[0x8000], &prg[0x2000 * (state->m_MMC3_prg_bank[0 ^ prg_flip] & state->m_MMC3_prg_mask) + 0x10000], 0x2000);
r14976	r14977
773	773	DRIVER_INIT( MMC3 )
774	774	{
775	775	vsnes_state *state = machine.driver_data<vsnes_state>();
776		UINT8 *prg = machine.region("maincpu")->base();
	776	UINT8 *prg = machine.root_device().memregion("maincpu")->base();
777	777	state->m_IRQ_enable = state->m_IRQ_count = state->m_IRQ_count_latch = 0;
778		int MMC3_prg_chunks = (machine.region("maincpu")->bytes() - 0x10000) / 0x4000;
	778	int MMC3_prg_chunks = (state->memregion("maincpu")->bytes() - 0x10000) / 0x4000;
779	779
780	780	state->m_MMC3_prg_bank[0] = state->m_MMC3_prg_bank[2] = 0xfe;
781	781	state->m_MMC3_prg_bank[1] = state->m_MMC3_prg_bank[3] = 0xff;
r14976	r14977
952	952
953	953	case 0x7000:
954	954	{
955		UINT8 *prg = machine().region("maincpu")->base();
	955	UINT8 *prg = memregion("maincpu")->base();
956	956	memcpy(&prg[0x08000], &prg[0x10000 + data * 0x4000], 0x4000);
957	957	}
958	958	break;
r14976	r14977
967	967	/* when starting a mapper 68 game  the first 16K ROM bank in the cart is loaded into $8000
968	968	the LAST 16K ROM bank is loaded into $C000. The last 16K of ROM cannot be swapped. */
969	969
970		UINT8 *prg = machine.region("maincpu")->base();
	970	UINT8 *prg = machine.root_device().memregion("maincpu")->base();
971	971	memcpy(&prg[0x08000], &prg[0x10000], 0x4000);
972	972	memcpy(&prg[0x0c000], &prg[0x2c000], 0x4000);
973	973
r14976	r14977
1012	1012	{
1013	1013	device_t *other_cpu = (&space.device() == machine().device("maincpu")) ? machine().device("sub") : machine().device("maincpu");
1014	1014	/* switch vrom */
1015		(&space.device() == machine().device("maincpu")) ? memory_set_bank(machine(), "bank2", BIT(data, 2)) : memory_set_bank(machine(), "bank3", BIT(data, 2));
	1015	(&space.device() == machine().device("maincpu")) ? membank("bank2")->set_entry(BIT(data, 2)) : membank("bank3")->set_entry(BIT(data, 2));
1016	1016
1017	1017	/* bit 1 ( data & 2 ) triggers irq on the other cpu */
1018	1018	device_set_input_line(other_cpu, 0, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
r14976	r14977
1026	1026
1027	1027	DRIVER_INIT( vsdual )
1028	1028	{
1029		UINT8 *prg = machine.region("maincpu")->base();
	1029	UINT8 *prg = machine.root_device().memregion("maincpu")->base();
1030	1030
1031	1031	vsnes_state *state = machine.driver_data<vsnes_state>();
1032	1032	/* vrom switching is enabled with bit 2 of $4016 */

src/mame/machine/megadriv.c

r14976	r14977
2560	2560
2561	2561	// install the game rom in the normal 0x000000-0x03fffff space used by the genesis - this allows VDP DMA operations to work as they have to be from this area or RAM
2562	2562	// it should also UNMAP the banked rom area...
2563		space->install_rom(0x0000100, 0x03fffff, space->machine().region("gamecart")->base() + 0x100);
	2563	space->install_rom(0x0000100, 0x03fffff, space->machine().root_device().memregion("gamecart")->base() + 0x100);
2564	2564	}
2565	2565	else
2566	2566	{
r14976	r14977
2568	2568
2569	2569	// this is actually blank / nop area
2570	2570	// we should also map the banked area back (we don't currently unmap it tho)
2571		space->install_rom(0x0000100, 0x03fffff, space->machine().region("maincpu")->base()+0x100);
	2571	space->install_rom(0x0000100, 0x03fffff, space->machine().root_device().memregion("maincpu")->base()+0x100);
2572	2572	}
2573	2573
2574	2574	if((a15106_reg & 4) == 0) // clears the FIFO state
r14976	r14977
2860	2860	if (data & 0x01)
2861	2861	{
2862	2862	_32x_adapter_enabled = 1;
2863		space->install_rom(0x0880000, 0x08fffff, space->machine().region("gamecart")->base()); // 'fixed' 512kb rom bank
	2863	space->install_rom(0x0880000, 0x08fffff, space->machine().root_device().memregion("gamecart")->base()); // 'fixed' 512kb rom bank
2864	2864
2865	2865	space->install_read_bank(0x0900000, 0x09fffff, "bank12"); // 'bankable' 1024kb rom bank
2866		memory_set_bankptr(space->machine(),  "bank12", space->machine().region("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
	2866	space->machine().root_device().membank("bank12")->set_base(space->machine().root_device().memregion("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
2867	2867
2868		space->install_rom(0x0000000, 0x03fffff, space->machine().region("32x_68k_bios")->base());
	2868	space->install_rom(0x0000000, 0x03fffff, space->machine().root_device().memregion("32x_68k_bios")->base());
2869	2869
2870	2870	/* VDP area */
2871	2871	space->install_legacy_readwrite_handler(0x0a15180, 0x0a1518b, FUNC(_32x_common_vdp_regs_r), FUNC(_32x_common_vdp_regs_w)); // common / shared VDP regs
r14976	r14977
2881	2881	{
2882	2882	_32x_adapter_enabled = 0;
2883	2883
2884		space->install_rom(0x0000000, 0x03fffff, space->machine().region("gamecart")->base());
	2884	space->install_rom(0x0000000, 0x03fffff, space->machine().root_device().memregion("gamecart")->base());
2885	2885	space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x000070, 0x000073, FUNC(_32x_68k_hint_vector_r), FUNC(_32x_68k_hint_vector_w)); // h interrupt vector
2886	2886	}
2887	2887	}
r14976	r14977
2949	2949	_32x_68k_a15104_reg = (_32x_68k_a15104_reg & 0x00ff) | (data & 0xff00);
2950	2950	}
2951	2951
2952		memory_set_bankptr(space->machine(),  "bank12", space->machine().region("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
	2952	space->machine().root_device().membank("bank12")->set_base(space->machine().root_device().memregion("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
2953	2953	}
2954	2954
2955	2955	/**********************************************************************************************/
r14976	r14977
6005	6005	space->unmap_readwrite        (0x020000,0x3fffff);
6006	6006
6007	6007	//  space->install_read_bank(0x0020000, 0x003ffff, "scd_4m_prgbank");
6008		//  memory_set_bankptr(space->machine(),  "scd_4m_prgbank", segacd_4meg_prgram + segacd_4meg_prgbank * 0x20000 );
	6008	//  space->machine().root_device().membank("scd_4m_prgbank")->set_base(segacd_4meg_prgram + segacd_4meg_prgbank * 0x20000 );
6009	6009	space->install_legacy_read_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_r) );
6010	6010	space->install_legacy_write_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_w) );
6011	6011	segacd_wordram_mapped = 1;
r14976	r14977
6922	6922	int addr = state->m_pmac_read[reg]&0xffff;
6923	6923	if      ((mode & 0xfff0) == 0x0800) // ROM, inc 1, verified to be correct
6924	6924	{
6925		UINT16 *ROM = (UINT16 *) space->machine().region("maincpu")->base();
	6925	UINT16 *ROM = (UINT16 *) space->machine().root_device().memregion("maincpu")->base();
6926	6926	state->m_pmac_read[reg] += 1;
6927	6927	d = ROM[addr|((mode&0xf)<<16)];
6928	6928	}
r14976	r14977
7173	7173	machine.device("svp")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x438, 0x438, FUNC(svp_speedup_r));
7174	7174
7175	7175	state->m_iram = auto_alloc_array(machine, UINT8, 0x800);
7176		memory_set_bankptr(machine,  "bank3", state->m_iram);
	7176	state->membank("bank3")->set_base(state->m_iram);
7177	7177	/* SVP ROM just shares m68k region.. */
7178		ROM = machine.region("maincpu")->base();
7179		memory_set_bankptr(machine,  "bank4", ROM + 0x800);
	7178	ROM = state->memregion("maincpu")->base();
	7179	state->membank("bank4")->set_base(ROM + 0x800);
7180	7180
7181	7181	megadrive_io_read_data_port_ptr   = megadrive_io_read_data_port_svp;
7182	7182	}
r14976	r14977
9856	9856	//printf("GENESIS Sound Z80 cpu found '%s'\n", _genesis_snd_z80_cpu->tag() );
9857	9857
9858	9858	genz80.z80_prgram = auto_alloc_array(machine, UINT8, 0x2000);
9859		memory_set_bankptr(machine,  "bank1", genz80.z80_prgram );
	9859	machine.root_device().membank("bank1")->set_base(genz80.z80_prgram );
9860	9860	}
9861	9861
9862	9862	/* Look to see if this system has the 32x Master SH2 */
r14976	r14977
9933	9933	some games specify a single address, (start 200001, end 200001)
9934	9934	this usually means there is serial eeprom instead */
9935	9935	int i;
9936		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	9936	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
9937	9937
9938	9938	mame_printf_debug("DEBUG:: Header: Backup RAM string (ignore for games without)\n");
9939	9939	for (i=0;i<12;i++)
r14976	r14977
10050	10050
10051	10051
10052	10052	machine.device(tag)->memory().space(AS_PROGRAM)->install_readwrite_bank(0x0000, 0x1fff, "bank1");
10053		memory_set_bankptr(machine,  "bank1", genz80.z80_prgram );
	10053	machine.root_device().membank("bank1")->set_base(genz80.z80_prgram );
10054	10054
10055	10055	machine.device(tag)->memory().space(AS_PROGRAM)->install_ram(0x0000, 0x1fff, genz80.z80_prgram);
10056	10056
r14976	r14977
10093	10093
10094	10094	if (_32x_adapter_enabled == 0)
10095	10095	{
10096		machine.device("maincpu")->memory().space(AS_PROGRAM)->install_rom(0x0000000, 0x03fffff, machine.region("gamecart")->base());
	10096	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_rom(0x0000000, 0x03fffff, machine.root_device().memregion("gamecart")->base());
10097	10097	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x000070, 0x000073, FUNC(_32x_68k_hint_vector_r), FUNC(_32x_68k_hint_vector_w)); // h interrupt vector
10098	10098	};
10099	10099

src/mame/machine/taitosj.c

r14976	r14977
19	19	MACHINE_START( taitosj )
20	20	{
21	21	taitosj_state *state = machine.driver_data<taitosj_state>();
22		memory_configure_bank(machine, "bank1", 0, 1, machine.region("maincpu")->base() + 0x6000, 0);
23		memory_configure_bank(machine, "bank1", 1, 1, machine.region("maincpu")->base() + 0x10000, 0);
	22	state->membank("bank1")->configure_entry(0, machine.root_device().memregion("maincpu")->base() + 0x6000);
	23	state->membank("bank1")->configure_entry(1, state->memregion("maincpu")->base() + 0x10000);
24	24
25	25	state->save_item(NAME(state->m_fromz80));
26	26	state->save_item(NAME(state->m_toz80));
r14976	r14977
58	58	{
59	59	coin_lockout_global_w(machine(), ~data & 1);
60	60
61		if(data & 0x80) memory_set_bank(machine(), "bank1", 1);
62		else memory_set_bank(machine(), "bank1", 0);
	61	if(data & 0x80) membank("bank1")->set_entry(1);
	62	else membank("bank1")->set_entry(0);
63	63	}
64	64
65	65

src/mame/machine/mc8123.c

r14976	r14977
381	381	int fixed_length = numbanks == 1 ? 0xc000 : 0x8000;
382	382	UINT8 *decrypted1 = auto_alloc_array(machine, UINT8, fixed_length);
383	383	UINT8 *decrypted2 = numbanks > 1 ? auto_alloc_array(machine, UINT8, 0x4000 * numbanks) : 0;
384		UINT8 *rom = machine.region(cpu)->base();
385		UINT8 *key = machine.region(keyrgn)->base();
	384	UINT8 *rom = machine.root_device().memregion(cpu)->base();
	385	UINT8 *key = machine.root_device().memregion(keyrgn)->base();
386	386	int A, bank;
387	387
388	388	space->set_decrypted_region(0x0000, fixed_length-1, decrypted1);
r14976	r14977
400	400
401	401	if (bankname != NULL)
402	402	{
403		memory_configure_bank_decrypted(machine, bankname, 0, numbanks, decrypted2, 0x4000);
	403	machine.root_device().membank(bankname)->configure_decrypted_entries(0, numbanks, decrypted2, 0x4000);
404	404
405	405	for (bank = 0; bank < numbanks; ++bank)
406	406	{

src/mame/machine/neoprot.c

r14976	r14977
119	119	static WRITE16_HANDLER ( kof98_prot_w )
120	120	{
121	121	/* info from razoola */
122		UINT16* mem16 = (UINT16*)space->machine().region("maincpu")->base();
	122	UINT16* mem16 = (UINT16*)space->machine().root_device().memregion("maincpu")->base();
123	123
124	124	switch (data)
125	125	{
r14976	r14977
160	160	void mslugx_install_protection( running_machine &machine )
161	161	{
162	162	int i;
163		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	163	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
164	164
165	165	for (i = 0;i < (0x100000/2) - 4;i++)
166	166	{

src/mame/machine/midwunit.c

r14976	r14977
156	156	register_state_saving(machine);
157	157
158	158	/* load the graphics ROMs -- quadruples */
159		midtunit_gfx_rom = base = machine.region("gfx1")->base();
160		len = machine.region("gfx1")->bytes();
	159	midtunit_gfx_rom = base = machine.root_device().memregion("gfx1")->base();
	160	len = state->memregion("gfx1")->bytes();
161	161	for (i = 0; i < len / 0x400000; i++)
162	162	{
163	163	memcpy(state->m_decode_memory, base, 0x400000);

src/mame/machine/namcos2.c

r14976	r14977
154	154	/* 68000 Shared memory area - Data ROM area                  */
155	155	/*************************************************************/
156	156	READ16_HANDLER( namcos2_68k_data_rom_r ){
157		UINT16 *ROM = (UINT16 *)space->machine().region("user1")->base();
	157	UINT16 *ROM = (UINT16 *)space->machine().root_device().memregion("user1")->base();
158	158	return ROM[offset];
159	159	}
160	160
r14976	r14977
709	709
710	710	WRITE8_HANDLER( namcos2_sound_bankselect_w )
711	711	{
712		UINT8 *RAM=space->machine().region("audiocpu")->base();
713		UINT32 max = (space->machine().region("audiocpu")->bytes() - 0x10000) / 0x4000;
	712	UINT8 *RAM=space->machine().root_device().memregion("audiocpu")->base();
	713	UINT32 max = (space->machine().root_device().memregion("audiocpu")->bytes() - 0x10000) / 0x4000;
714	714	int bank = ( data >> 4 ) % max;   /* 991104.CAB */
715		memory_set_bankptr(space->machine(),  BANKED_SOUND_ROM, &RAM[ 0x10000 + ( 0x4000 * bank ) ] );
	715	space->machine().root_device().membank(BANKED_SOUND_ROM)->set_base(&RAM[ 0x10000 + ( 0x4000 * bank ) ] );
716	716	}
717	717
718	718	/**************************************************************/

src/mame/machine/neocrypt.c

r14976	r14977
535	535	UINT8 *rom;
536	536	int rpos;
537	537
538		rom_size = machine.region("sprites")->bytes();
	538	rom_size = machine.root_device().memregion("sprites")->bytes();
539	539
540	540	buf = auto_alloc_array(machine, UINT8, rom_size);
541	541
542		rom = machine.region("sprites")->base();
	542	rom = machine.root_device().memregion("sprites")->base();
543	543
544	544	// Data xor
545	545	for (rpos = 0;rpos < rom_size/4;rpos++)
r14976	r14977
595	595	void neogeo_sfix_decrypt(running_machine &machine)
596	596	{
597	597	int i;
598		int rom_size = machine.region("sprites")->bytes();
599		int tx_size = machine.region("fixed")->bytes();
600		UINT8 *src = machine.region("sprites")->base()+rom_size-tx_size;
601		UINT8 *dst = machine.region("fixed")->base();
	598	int rom_size = machine.root_device().memregion("sprites")->bytes();
	599	int tx_size = machine.root_device().memregion("fixed")->bytes();
	600	UINT8 *src = machine.root_device().memregion("sprites")->base()+rom_size-tx_size;
	601	UINT8 *dst = machine.root_device().memregion("fixed")->base();
602	602
603	603	for (i = 0;i < tx_size;i++)
604	604	dst[i] = src[(i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4)];
r14976	r14977
677	677	static const UINT8 xorval[ 4 ] = { 0x34, 0x21, 0xc4, 0xe9 };
678	678	int i;
679	679	int ofst;
680		int rom_size = machine.region( "sprites" )->bytes();
681		UINT8 *rom = machine.region( "sprites" )->base();
	680	int rom_size = machine.root_device().memregion( "sprites" )->bytes();
	681	UINT8 *rom = machine.root_device().memregion( "sprites" )->base();
682	682	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
683	683
684	684	for( i = 0; i < rom_size; i++ )
r14976	r14977
710	710	void svcpcb_s1data_decrypt(running_machine &machine)
711	711	{
712	712	int i;
713		UINT8 *s1 = machine.region( "fixed" )->base();
714		size_t s1_size = machine.region( "fixed" )->bytes();
	713	UINT8 *s1 = machine.root_device().memregion( "fixed" )->base();
	714	size_t s1_size = machine.root_device().memregion( "fixed" )->bytes();
715	715
716	716	for( i = 0; i < s1_size; i++ ) // Decrypt S
717	717	{
r14976	r14977
727	727	static const UINT8 xorval[ 4 ] = { 0x34, 0x21, 0xc4, 0xe9 };
728	728	int i;
729	729	int ofst;
730		int rom_size = machine.region( "sprites" )->bytes();
731		UINT8 *rom = machine.region( "sprites" )->base();
	730	int rom_size = machine.root_device().memregion( "sprites" )->bytes();
	731	UINT8 *rom = machine.root_device().memregion( "sprites" )->base();
732	732	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
733	733
734	734	for ( i = 0; i < rom_size; i++ )
r14976	r14977
758	758	UINT8 *src;
759	759	UINT8 *dst;
760	760	int i;
761		int tx_size = machine.region( "fixed" )->bytes();
762		int srom_size = machine.region( "sprites" )->bytes();
	761	int tx_size = machine.root_device().memregion( "fixed" )->bytes();
	762	int srom_size = machine.root_device().memregion( "sprites" )->bytes();
763	763
764		src = machine.region( "sprites" )->base() + srom_size - 0x1000000 - 0x80000; // Decrypt S
765		dst = machine.region( "fixed" )->base();
	764	src = machine.root_device().memregion( "sprites" )->base() + srom_size - 0x1000000 - 0x80000; // Decrypt S
	765	dst = machine.root_device().memregion( "fixed" )->base();
766	766
767	767	for( i = 0; i < tx_size / 2; i++ )
768	768	{
769	769	dst[ i ] = src[ (i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4) ];
770	770	}
771	771
772		src = machine.region( "sprites" )->base() + srom_size - 0x80000;
773		dst = machine.region( "fixed" )->base() + 0x80000;
	772	src = machine.root_device().memregion( "sprites" )->base() + srom_size - 0x80000;
	773	dst = machine.root_device().memregion( "fixed" )->base() + 0x80000;
774	774
775	775	for( i = 0; i < tx_size / 2; i++ )
776	776	{
777	777	dst[ i ] = src[ (i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4) ];
778	778	}
779	779
780		dst = machine.region( "fixed" )->base();
	780	dst = machine.root_device().memregion( "fixed" )->base();
781	781
782	782	for( i = 0; i < tx_size; i++ )
783	783	{
r14976	r14977
887	887
888	888	void neogeo_cmc50_m1_decrypt(running_machine &machine)
889	889	{
890		UINT8* rom = machine.region("audiocrypt")->base();
	890	UINT8* rom = machine.root_device().memregion("audiocrypt")->base();
891	891	size_t rom_size = 0x80000;
892		UINT8* rom2 = machine.region("audiocpu")->base();
	892	UINT8* rom2 = machine.root_device().memregion("audiocpu")->base();
893	893
894	894	UINT8* buffer = auto_alloc_array(machine, UINT8, rom_size);
895	895
r14976	r14977
956	956	/* Kof98 uses an early encryption, quite different from the others */
957	957	void kof98_decrypt_68k(running_machine &machine)
958	958	{
959		UINT8 *src = machine.region("maincpu")->base();
	959	UINT8 *src = machine.root_device().memregion("maincpu")->base();
960	960	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x200000);
961	961	int i, j, k;
962	962	static const UINT32 sec[]={0x000000,0x100000,0x000004,0x100004,0x10000a,0x00000a,0x10000e,0x00000e};
r14976	r14977
1006	1006	UINT16 *rom;
1007	1007	int i,j;
1008	1008
1009		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1009	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1010	1010	/* swap data lines on the whole ROMs */
1011	1011	for (i = 0;i < 0x800000/2;i++)
1012	1012	{
r14976	r14977
1025	1025	}
1026	1026
1027	1027	/* swap address lines & relocate fixed part */
1028		rom = (UINT16 *)machine.region("maincpu")->base();
	1028	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1029	1029	for (i = 0;i < 0x0c0000/2;i++)
1030	1030	{
1031	1031	rom[i] = rom[0x700000/2 + BITSWAP24(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)];
r14976	r14977
1039	1039	int i,j;
1040	1040
1041	1041	/* thanks to Razoola and Mr K for the info */
1042		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1042	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1043	1043	/* swap data lines on the whole ROMs */
1044	1044	for (i = 0;i < 0x800000/2;i++)
1045	1045	{
r14976	r14977
1047	1047	}
1048	1048
1049	1049	/* swap address lines & relocate fixed part */
1050		rom = (UINT16 *)machine.region("maincpu")->base();
	1050	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1051	1051	for (i = 0;i < 0x0c0000/2;i++)
1052	1052	{
1053	1053	rom[i] = rom[0x710000/2 + BITSWAP24(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)];
1054	1054	}
1055	1055
1056	1056	/* swap address lines for the banked part */
1057		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1057	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1058	1058	for (i = 0;i < 0x800000/2;i+=0x8000/2)
1059	1059	{
1060	1060	UINT16 buffer[0x8000/2];
r14976	r14977
1073	1073	int i,j;
1074	1074
1075	1075	/* thanks to Razoola and Mr K for the info */
1076		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1076	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1077	1077	/* swap data lines on the whole ROMs */
1078	1078	for (i = 0;i < 0x800000/2;i++)
1079	1079	{
r14976	r14977
1081	1081	}
1082	1082
1083	1083	/* swap address lines & relocate fixed part */
1084		rom = (UINT16 *)machine.region("maincpu")->base();
	1084	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1085	1085	for (i = 0;i < 0x0c0000/2;i++)
1086	1086	{
1087	1087	rom[i] = rom[0x7f8000/2 + BITSWAP24(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)];
1088	1088	}
1089	1089
1090	1090	/* swap address lines for the banked part */
1091		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1091	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1092	1092	for (i = 0;i < 0x800000/2;i+=0x8000/2)
1093	1093	{
1094	1094	UINT16 buffer[0x8000/2];
r14976	r14977
1107	1107	int i,j;
1108	1108
1109	1109	/* thanks to Razoola and Mr K for the info */
1110		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1110	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1111	1111	/* swap data lines on the whole ROMs */
1112	1112	for (i = 0;i < 0x800000/2;i++)
1113	1113	{
r14976	r14977
1115	1115	}
1116	1116
1117	1117	/* swap address lines & relocate fixed part */
1118		rom = (UINT16 *)machine.region("maincpu")->base();
	1118	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1119	1119	for (i = 0;i < 0x0c0000/2;i++)
1120	1120	{
1121	1121	rom[i] = rom[0x5d0000/2 + BITSWAP24(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)];
1122	1122	}
1123	1123
1124	1124	/* swap address lines for the banked part */
1125		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1125	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1126	1126	for (i = 0;i < 0x800000/2;i+=0x10000/2)
1127	1127	{
1128	1128	UINT16 buffer[0x10000/2];
r14976	r14977
1141	1141	int i,j;
1142	1142
1143	1143	/* thanks to Razoola and Mr K for the info */
1144		rom = (UINT16 *)(machine.region("maincpu")->base() + 0x100000);
	1144	rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x100000);
1145	1145	/* swap data lines on the whole ROMs */
1146	1146	for (i = 0;i < 0x800000/2;i++)
1147	1147	{
r14976	r14977
1160	1160	}
1161	1161
1162	1162	/* swap address lines & relocate fixed part */
1163		rom = (UINT16 *)machine.region("maincpu")->base();
	1163	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1164	1164	for (i = 0;i < 0x0c0000/2;i++)
1165	1165	{
1166	1166	rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
r14976	r14977
1173	1173	{
1174	1174	int i;
1175	1175	static const int sec[]={0x100000,0x280000,0x300000,0x180000,0x000000,0x380000,0x200000,0x080000};
1176		UINT8 *src = machine.region("maincpu")->base()+0x100000;
	1176	UINT8 *src = machine.root_device().memregion("maincpu")->base()+0x100000;
1177	1177	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x400000);
1178	1178	memcpy( dst, src, 0x400000 );
1179	1179	for( i=0; i<8; ++i )
r14976	r14977
1188	1188	{
1189	1189	int i;
1190	1190	static const int sec[]={0x100000,0x280000,0x300000,0x180000,0x000000,0x380000,0x200000,0x080000};
1191		UINT8 *src = machine.region("maincpu")->base()+0x100000;
	1191	UINT8 *src = machine.root_device().memregion("maincpu")->base()+0x100000;
1192	1192	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x400000);
1193	1193	memcpy( dst, src, 0x400000);
1194	1194	for( i=0; i<8; ++i )
r14976	r14977
1203	1203	{
1204	1204	int i;
1205	1205	static const int sec[]={0x000000,0x080000,0x700000,0x680000,0x500000,0x180000,0x200000,0x480000,0x300000,0x780000,0x600000,0x280000,0x100000,0x580000,0x400000,0x380000};
1206		UINT8 *src = machine.region("maincpu")->base();
	1206	UINT8 *src = machine.root_device().memregion("maincpu")->base();
1207	1207	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x800000);
1208	1208
1209	1209	memcpy( dst, src, 0x800000 );
r14976	r14977
1219	1219	{
1220	1220	int i;
1221	1221	static const int sec[]={0x000000,0x080000,0x500000,0x480000,0x600000,0x580000,0x700000,0x280000,0x100000,0x680000,0x400000,0x780000,0x200000,0x380000,0x300000,0x180000};
1222		UINT8 *src = machine.region("maincpu")->base();
	1222	UINT8 *src = machine.root_device().memregion("maincpu")->base();
1223	1223	UINT8 *dst = auto_alloc_array(machine, UINT8, 0x800000);
1224	1224
1225	1225	memcpy( dst, src, 0x800000 );
r14976	r14977
1239	1239	int i;
1240	1240	int ofst;
1241	1241	int rom_size = 0x800000;
1242		UINT8 *rom = machine.region( "maincpu" )->base();
	1242	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
1243	1243	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
1244	1244
1245	1245	for( i = 0; i < 0x100000; i++ )
r14976	r14977
1284	1284	int i;
1285	1285	int ofst;
1286	1286	int rom_size = 0x800000;
1287		UINT8 *rom = machine.region( "maincpu" )->base();
	1287	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
1288	1288	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
1289	1289
1290	1290	for( i = 0; i < 0x100000; i++ )
r14976	r14977
1328	1328	int i;
1329	1329	int ofst;
1330	1330	int rom_size = 0x900000;
1331		UINT8 *rom = machine.region( "maincpu" )->base();
	1331	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
1332	1332	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
1333	1333
1334	1334	for (i = 0; i < 0x100000; i++)
r14976	r14977
1371	1371	int i;
1372	1372	int ofst;
1373	1373	int rom_size = 0x900000;
1374		UINT8 *rom = machine.region( "maincpu" )->base();
	1374	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
1375	1375	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
1376	1376
1377	1377	for (i = 0; i < 0x100000; i++)
r14976	r14977
1419	1419	int i;
1420	1420	int ofst;
1421	1421	int rom_size = 0x900000;
1422		UINT8 *rom = machine.region( "maincpu" )->base();
	1422	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
1423	1423	UINT8 *buf = auto_alloc_array(machine, UINT8,  rom_size );
1424	1424
1425	1425	for (i = 0; i < 0x100000; i++)
r14976	r14977
1469	1469	/* Neo-Pcm2 Drivers for Encrypted V Roms */
1470	1470	void neo_pcm2_snk_1999(running_machine &machine, int value)
1471	1471	{   /* thanks to Elsemi for the NEO-PCM2 info */
1472		UINT16 *rom = (UINT16 *)machine.region("ymsnd")->base();
1473		int size = machine.region("ymsnd")->bytes();
	1472	UINT16 *rom = (UINT16 *)machine.root_device().memregion("ymsnd")->base();
	1473	int size = machine.root_device().memregion("ymsnd")->bytes();
1474	1474	int i, j;
1475	1475
1476	1476	if( rom != NULL )
r14976	r14977
1509	1509	{0xcb,0x29,0x7d,0x43,0xd2,0x3a,0xc2,0xb4},
1510	1510	{0x4b,0xa4,0x63,0x46,0xf0,0x91,0xea,0x62},
1511	1511	{0x4b,0xa4,0x63,0x46,0xf0,0x91,0xea,0x62}};
1512		UINT8 *src = machine.region("ymsnd")->base();
	1512	UINT8 *src = machine.root_device().memregion("ymsnd")->base();
1513	1513	UINT8 *buf = auto_alloc_array(machine, UINT8, 0x1000000);
1514	1514	int i, j, d;
1515	1515
r14976	r14977
1553	1553	0xd3,0xd2,0x5c,0x5d,0x57,0x56,0xd8,0xd9,
1554	1554	0xd3,0xd2,0x5c,0x5d,0x57,0x56,0xd8,0xd9,
1555	1555	};
1556		UINT16*src= (UINT16*)machine.region( "mainbios" )->base();
	1556	UINT16*src= (UINT16*)machine.root_device().memregion( "mainbios" )->base();
1557	1557	UINT16*buf= auto_alloc_array(machine, UINT16, 0x80000/2);
1558	1558	int   a,addr;
1559	1559

src/mame/machine/pgmprot2.c

r14976	r14977
207	207	pgm_kov2p_decrypt(machine);
208	208	kov2_latch_init(machine);
209	209
210		UINT8 *mem8 = (UINT8 *)machine.region("user1")->base();
	210	UINT8 *mem8 = (UINT8 *)machine.root_device().memregion("user1")->base();
211	211	mem8[0xDE] = 0xC0;
212	212	mem8[0xDF] = 0x46;
213	213	mem8[0x4ED8] = 0xA8;// B0
r14976	r14977
313	313	DRIVER_INIT( dw2001 )
314	314	{
315	315	//pgm_arm_type2_state *state = machine.driver_data<pgm_arm_type2_state>();
316		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	316	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
317	317
318	318	pgm_basic_init(machine);
319	319	kov2_latch_init(machine);
r14976	r14977
330	330	mem16[0x11eb04 / 2] = 0x4e71;
331	331
332	332	/* patch ARM area with fake code */
333		UINT16 *temp16 = (UINT16 *)machine.region("prot")->base();
	333	UINT16 *temp16 = (UINT16 *)machine.root_device().memregion("prot")->base();
334	334	temp16[(0x0000)/2] = 0xd088;
335	335	temp16[(0x0002)/2] = 0xe59f;
336	336	temp16[(0x0004)/2] = 0x0680;
r14976	r14977
347	347	DRIVER_INIT( dwpc )
348	348	{
349	349	//pgm_arm_type2_state *state = machine.driver_data<pgm_arm_type2_state>();
350		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	350	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
351	351
352	352	pgm_basic_init(machine);
353	353	kov2_latch_init(machine);
r14976	r14977
365	365
366	366
367	367	/* patch ARM area with fake code */
368		UINT16 *temp16 = (UINT16 *)machine.region("prot")->base();
	368	UINT16 *temp16 = (UINT16 *)machine.root_device().memregion("prot")->base();
369	369	temp16[(0x0000)/2] = 0xd088;
370	370	temp16[(0x0002)/2] = 0xe59f;
371	371	temp16[(0x0004)/2] = 0x0680;

src/mame/machine/nb1414m4.c

r14976	r14977
31	31
32	32	static void nichibutsu_1414m4_dma(address_space *space,UINT16 src,UINT16 dst,UINT16 size, UINT8 condition,UINT8 *vram)
33	33	{
34		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	34	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
35	35	int i;
36	36
37	37	for(i=0;i<size;i++)
r14976	r14977
61	61
62	62	static void insert_coin_msg(address_space *space,UINT8 *vram)
63	63	{
64		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	64	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
65	65	int credit_count = (vram[0xf] & 0xff);
66	66	UINT8 fl_cond = space->machine().primary_screen->frame_number() & 0x10; /* for insert coin "flickering" */
67	67	UINT16 dst;
r14976	r14977
82	82
83	83	static void credit_msg(address_space *space,UINT8 *vram)
84	84	{
85		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	85	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
86	86	int credit_count = (vram[0xf] & 0xff);
87	87	UINT8 fl_cond = space->machine().primary_screen->frame_number() & 0x10; /* for insert coin "flickering" */
88	88	UINT16 dst;
r14976	r14977
112	112	int i;
113	113	UINT8 first_digit;
114	114	UINT8 res;
115		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	115	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
116	116
117	117	first_digit = 0;
118	118
r14976	r14977
140	140
141	141	static void nichibutsu_1414m4_0200(address_space *space, UINT16 mcu_cmd,UINT8 *vram)
142	142	{
143		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	143	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
144	144	UINT16 dst;
145	145
146	146	dst = (data[0x330+((mcu_cmd & 0xf)*2)]<<8)|(data[0x331+((mcu_cmd & 0xf)*2)]&0xff);
r14976	r14977
185	185	*/
186	186	static void nichibutsu_1414m4_0600(address_space *space, UINT8 is2p,UINT8 *vram)
187	187	{
188		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	188	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
189	189	UINT16 dst;
190	190	int i;
191	191
r14976	r14977
241	241
242	242	static void nichibutsu_1414m4_0e00(address_space *space,UINT16 mcu_cmd,UINT8 *vram)
243	243	{
244		UINT8 * data = (UINT8 *)space->machine().region("blit_data")->base();
	244	UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
245	245	UINT16 dst;
246	246
247	247	dst = ((data[0xdf]<<8)|(data[0xe0]&0xff)) & 0x3fff;

src/mame/machine/tx1.c

r14976	r14977
421	421
422	422	tx1_state *state = machine.driver_data<tx1_state>();
423	423	math_t &math = state->m_math;
424		const UINT16 *prom = (UINT16*)machine.region("au_data")->base() + (0x8000 >> 1);
	424	const UINT16 *prom = (UINT16*)state->memregion("au_data")->base() + (0x8000 >> 1);
425	425
426	426	for (;;)
427	427	{
r14976	r14977
479	479	data = math.muxlatch;
480	480	else if (dsel == 1)
481	481	{
482		UINT16 *romdata = (UINT16*)machine.region("au_data")->base();
	482	UINT16 *romdata = (UINT16*)machine.root_device().memregion("au_data")->base();
483	483	UINT16 addr = get_tx1_datarom_addr(math);
484	484	data = romdata[addr];
485	485	}
r14976	r14977
656	656	TODO make this constant somewhere
657	657	e.g. math.retval =  math.romptr[ get_tx1_datarom_addr() ];
658	658	*/
659		UINT16 *romdata = (UINT16*)machine().region("au_data")->base();
	659	UINT16 *romdata = (UINT16*)machine().root_device().memregion("au_data")->base();
660	660	UINT16 addr = get_tx1_datarom_addr(math);
661	661	math.retval = romdata[addr];
662	662	}
r14976	r14977
804	804	READ16_MEMBER(tx1_state::tx1_spcs_rom_r)
805	805	{
806	806	math_t &math = m_math;
807		math.cpulatch = *(UINT16*)((UINT8*)machine().region("math_cpu")->base() + 0xfc000 + 0x1000 + offset*2);
	807	math.cpulatch = *(UINT16*)((UINT8*)machine().root_device().memregion("math_cpu")->base() + 0xfc000 + 0x1000 + offset*2);
808	808
809	809	if (math.mux == TX1_SEL_ILDEN)
810	810	{
r14976	r14977
984	984
985	985	tx1_state *state = machine.driver_data<tx1_state>();
986	986	math_t &math = state->m_math;
987		const UINT16 *prom = (UINT16*)machine.region("au_data")->base() + (0x8000 >> 1);
	987	const UINT16 *prom = (UINT16*)state->memregion("au_data")->base() + (0x8000 >> 1);
988	988
989	989	for (;;)
990	990	{
r14976	r14977
1017	1017
1018	1018	if (math.mux == BB_MUX_DPROE)
1019	1019	{
1020		UINT16 *romdata = (UINT16*)machine.region("au_data")->base();
	1020	UINT16 *romdata = (UINT16*)machine.root_device().memregion("au_data")->base();
1021	1021	UINT16 addr = get_bb_datarom_addr(math);
1022	1022	kick_sn74s516(machine, &romdata[addr], ins);
1023	1023	}
r14976	r14977
1133	1133	/* /DPROE */
1134	1134	else if ((offset & 0xc00) == 0xc00)
1135	1135	{
1136		UINT16 *romdata = (UINT16*)machine().region("au_data")->base();
	1136	UINT16 *romdata = (UINT16*)machine().root_device().memregion("au_data")->base();
1137	1137	UINT16 addr = get_bb_datarom_addr(math);
1138	1138
1139	1139	math.retval = romdata[addr];
r14976	r14977
1266	1266	READ16_MEMBER(tx1_state::buggyboy_spcs_rom_r)
1267	1267	{
1268	1268	math_t &math = m_math;
1269		math.cpulatch = *(UINT16*)((UINT8*)machine().region("math_cpu")->base() + 0xfc000 + 0x1000 + offset*2);
	1269	math.cpulatch = *(UINT16*)((UINT8*)machine().root_device().memregion("math_cpu")->base() + 0xfc000 + 0x1000 + offset*2);
1270	1270
1271	1271	if (math.mux == BB_MUX_ILDEN)
1272	1272	{

src/mame/machine/cclimber.c

r14976	r14977
7	7	static void cclimber_decode(running_machine &machine, const UINT8 convtable[8][16])
8	8	{
9	9	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
10		UINT8 *rom = machine.region("maincpu")->base();
	10	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
11	11	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
12	12	int A;
13	13
r14976	r14977
68	68	DRIVER_INIT( ckongb )
69	69	{
70	70	int A;
71		UINT8 *rom = machine.region("maincpu")->base();
	71	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
72	72
73	73	for (A = 0x0000;A < 0x6000;A++) /* all the program ROMs are encrypted */
74	74	{
r14976	r14977
79	79	#if CANNONB_HACK
80	80	static void cannonb_patch(running_machine &machine)
81	81	{
82		UINT8 *rom = machine.region("maincpu")->base();
	82	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
83	83
84	84	rom[0x2ba0] = 0x21;
85	85	rom[0x2ba1] = 0xfb;
r14976	r14977
91	91	DRIVER_INIT( cannonb )
92	92	{
93	93	int A;
94		UINT8 *rom = machine.region("maincpu")->base();
	94	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
95	95
96	96	for (A = 0x0000;A < 0x1000;A++) /* only first ROM is encrypted */
97	97	{

src/mame/machine/s24fd.c

r14976	r14977
158	158
159	159	s24_fd1094_cpuregion = (UINT16*)machine.memory().shared("share2")->ptr();
160	160	s24_fd1094_cpuregionsize = 0x40000;
161		s24_fd1094_key = machine.region("fd1094key")->base();
	161	s24_fd1094_key = machine.root_device().memregion("fd1094key")->base();
162	162
163	163	/* punt if no key; this allows us to be called even for non-s24_fd1094 games */
164	164	if (!s24_fd1094_key)

src/mame/machine/tatsumi.c

r14976	r14977
293	293
294	294	READ16_MEMBER(tatsumi_state::tatsumi_v30_68000_r)
295	295	{
296		const UINT16* rom=(UINT16*)machine().region("sub")->base();
	296	const UINT16* rom=(UINT16*)machine().root_device().memregion("sub")->base();
297	297
298	298	logerror("%05X:68000_r(%04X),cw=%04X\n", cpu_get_pc(&space.device()), offset*2, m_control_word);
299	299	/* Read from 68k RAM */
r14976	r14977
302	302	// hack to make roundup 5 boot
303	303	if (cpu_get_pc(&space.device())==0xec575)
304	304	{
305		UINT8 *dst = machine().region("maincpu")->base();
	305	UINT8 *dst = memregion("maincpu")->base();
306	306	dst[BYTE_XOR_LE(0xec57a)]=0x46;
307	307	dst[BYTE_XOR_LE(0xec57b)]=0x46;
308	308

src/mame/machine/segamsys.c

r14976	r14977
1613	1613	//printf("bank ram??\n");
1614	1614	break;
1615	1615	case 1:
1616		memcpy(sms_rom+0x0000, space->machine().region("maincpu")->base()+bank*0x4000, 0x4000);
	1616	memcpy(sms_rom+0x0000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1617	1617	break;
1618	1618	case 2:
1619		memcpy(sms_rom+0x4000, space->machine().region("maincpu")->base()+bank*0x4000, 0x4000);
	1619	memcpy(sms_rom+0x4000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1620	1620	break;
1621	1621	case 3:
1622		memcpy(sms_rom+0x8000, space->machine().region("maincpu")->base()+bank*0x4000, 0x4000);
	1622	memcpy(sms_rom+0x8000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1623	1623	break;
1624	1624
1625	1625	}
r14976	r14977
1628	1628	static WRITE8_HANDLER( codemasters_rom_bank_0000_w )
1629	1629	{
1630	1630	int bank = data&0x1f;
1631		memcpy(sms_rom+0x0000, space->machine().region("maincpu")->base()+bank*0x4000, 0x4000);
	1631	memcpy(sms_rom+0x0000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1632	1632	}
1633	1633
1634	1634	static WRITE8_HANDLER( codemasters_rom_bank_4000_w )
1635	1635	{
1636	1636	int bank = data&0x1f;
1637		memcpy(sms_rom+0x4000, space->machine().region("maincpu")->base()+bank*0x4000, 0x4000);
	1637	memcpy(sms_rom+0x4000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1638	1638	}
1639	1639
1640	1640	static WRITE8_HANDLER( codemasters_rom_bank_8000_w )
1641	1641	{
1642	1642	int bank = data&0x1f;
1643		memcpy(sms_rom+0x8000, space->machine().region("maincpu")->base()+bank*0x4000, 0x4000);
	1643	memcpy(sms_rom+0x8000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1644	1644	}
1645	1645
1646	1646
r14976	r14977
1682	1682	/* fixed rom bank area */
1683	1683	sms_rom = (UINT8 *)machine.device(tag)->memory().space(AS_PROGRAM)->install_rom(0x0000, 0xbfff, NULL);
1684	1684
1685		memcpy(sms_rom, machine.region("maincpu")->base(), 0xc000);
	1685	memcpy(sms_rom, machine.root_device().memregion("maincpu")->base(), 0xc000);
1686	1686
1687	1687	if (mapper == MAPPER_STANDARD )
1688	1688	{

src/mame/machine/harddriv.c

r14976	r14977
59	59	atarigen_init(machine);
60	60
61	61	/* predetermine memory regions */
62		state->m_sim_memory = (UINT16 *)machine.region("user1")->base();
63		state->m_sim_memory_size = machine.region("user1")->bytes() / 2;
	62	state->m_sim_memory = (UINT16 *)machine.root_device().memregion("user1")->base();
	63	state->m_sim_memory_size = state->memregion("user1")->bytes() / 2;
64	64	state->m_adsp_pgm_memory_word = (UINT16 *)(reinterpret_cast<UINT8 *>(state->m_adsp_pgm_memory.target()) + 1);
65	65	}
66	66

src/mame/machine/segacrpt.c

r14976	r14977
159	159	static void lfkp(int mask)
160	160	{
161	161	int A;
162		UINT8 *RAM = machine.region("maincpu")->base();
	162	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
163	163
164	164
165	165	for (A = 0x0000;A < 0x8000-14;A++)
r14976	r14977
218	218	int A;
219	219
220	220	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
221		int length = machine.region(cputag)->bytes();
	221	int length = machine.root_device().memregion(cputag)->bytes();
222	222	int cryptlen = MIN(length, 0x8000);
223		UINT8 *rom = machine.region(cputag)->base();
	223	UINT8 *rom = machine.root_device().memregion(cputag)->base();
224	224	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0xc000);
225	225
226	226	space->set_decrypted_region(0x0000, cryptlen - 1, decrypted);
r14976	r14977
440	440	int A;
441	441
442	442	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
443		UINT8 *rom = machine.region(regiontag)->base();
	443	UINT8 *rom = machine.root_device().memregion(regiontag)->base();
444	444	int bankstart;
445	445	decrypted = auto_alloc_array(machine, UINT8, 0x6000*3);
446	446
r14976	r14977
471	471	rom[A+bankstart] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xorval);
472	472	}
473	473
474		memory_configure_bank(machine, "bank1",0,3, machine.region(regiontag)->base(),0x6000);
475		memory_configure_bank_decrypted(machine, "bank1",0,3,decrypted,0x6000);
	474	machine.root_device().membank("bank1")->configure_entries(0,3, machine.root_device().memregion(regiontag)->base(),0x6000);
	475	machine.root_device().membank("bank1")->configure_decrypted_entries(0,3,decrypted,0x6000);
476	476	space->set_decrypted_region(0x0000, 0x5fff, decrypted);
477		memory_set_bank(space->machine(), "bank1", 0);
	477	space->machine().root_device().membank("bank1")->set_entry(0);
478	478	}
479	479
480	480
r14976	r14977
798	798	int A;
799	799
800	800	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
801		UINT8 *rom = machine.region(cputag)->base();
	801	UINT8 *rom = machine.root_device().memregion(cputag)->base();
802	802	decrypted = auto_alloc_array(machine, UINT8, 0x9000);
803	803
804	804	for (A = 0x0000;A < 0x9000;A++)
r14976	r14977
830	830	rom[A] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xorval);
831	831	}
832	832
833		memory_configure_bank(machine, "bank1",0,8, machine.region(cputag)->base()+0x7000,0x0400);
834		memory_configure_bank_decrypted(machine, "bank1",0,8,decrypted+0x7000,0x0400);
	833	machine.root_device().membank("bank1")->configure_entries(0,8, machine.root_device().memregion(cputag)->base()+0x7000,0x0400);
	834	machine.root_device().membank("bank1")->configure_decrypted_entries(0,8,decrypted+0x7000,0x0400);
835	835	space->set_decrypted_region(0x0000, 0x6bff, decrypted);
836		memory_set_bank(space->machine(), "bank1", 0);
	836	machine.root_device().membank("bank1")->set_entry(0);
837	837	}
838	838
839	839

src/mame/machine/beezer.c

r14976	r14977
176	176	}
177	177	else
178	178	{
179		UINT8 *rom = machine().region("maincpu")->base() + 0x10000;
	179	UINT8 *rom = memregion("maincpu")->base() + 0x10000;
180	180	space.install_ram(0xc000, 0xcfff, rom + (data & 0x07) * 0x2000 + ((data & 0x08) ? 0x1000: 0));
181	181	}
182	182	}

src/mame/machine/kaneko16.c

r14976	r14977
1659	1659	kaneko16_state *state = machine.driver_data<kaneko16_state>();
1660	1660	calc3_t &calc3 = state->m_calc3;
1661	1661	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1662		UINT8* rom = machine.region("cpu1")->base();
	1662	UINT8* rom = state->memregion("cpu1")->base();
1663	1663	UINT8 numregions;
1664	1664	UINT16 length;
1665	1665	int local_counter=0;
r14976	r14977
1970	1970	{
1971	1971	kaneko16_state *state = machine.driver_data<kaneko16_state>();
1972	1972	calc3_t &calc3 = state->m_calc3;
1973		UINT8* rom = machine.region("cpu1")->base();
	1973	UINT8* rom = state->memregion("cpu1")->base();
1974	1974	UINT8 numregions;
1975	1975
1976	1976	int x;
r14976	r14977
2283	2283	DRIVER_INIT( decrypt_toybox_rom )
2284	2284	{
2285	2285
2286		UINT8 *src = (UINT8 *)machine.region("mcudata" )->base();
	2286	UINT8 *src = (UINT8 *)machine.root_device().memregion("mcudata" )->base();
2287	2287
2288	2288	int i;
2289	2289
r14976	r14977
2310	2310	DRIVER_INIT( decrypt_toybox_rom_alt )
2311	2311	{
2312	2312
2313		UINT8 *src = (UINT8 *)machine.region("mcudata" )->base();
	2313	UINT8 *src = (UINT8 *)machine.root_device().memregion("mcudata" )->base();
2314	2314
2315	2315	int i;
2316	2316
r14976	r14977
2322	2322
2323	2323	void toxboy_handle_04_subcommand(running_machine& machine,UINT8 mcu_subcmd, UINT16*mcu_ram)
2324	2324	{
2325		UINT8 *src = (UINT8 *)machine.region("mcudata")->base()+0x10000;
	2325	UINT8 *src = (UINT8 *)machine.root_device().memregion("mcudata")->base()+0x10000;
2326	2326	UINT8* dst = (UINT8 *)mcu_ram;
2327	2327
2328	2328	int offs = (mcu_subcmd&0x3f)*8;

src/mame/machine/cps2crpt.c

r14976	r14977
633	633	static void cps2_decrypt(running_machine &machine, const UINT32 *master_key, UINT32 upper_limit)
634	634	{
635	635	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
636		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
637		int length = machine.region("maincpu")->bytes();
	636	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
	637	int length = machine.root_device().memregion("maincpu")->bytes();
638	638	UINT16 *dec = auto_alloc_array(machine, UINT16, length/2);
639	639	int i;
640	640	UINT32 key1[4];

src/mame/machine/naomim1.c

r14976	r14977
31	31	{
32	32	naomi_board::device_start();
33	33
34		const UINT8 *key_data = machine().region(key_tag)->base();
	34	const UINT8 *key_data = memregion(key_tag)->base();
35	35	key = (key_data[0] << 24) | (key_data[1] << 16) | (key_data[2] << 8) | key_data[3];
36	36	buffer = auto_alloc_array(machine(), UINT8, BUFFER_SIZE);
37	37

src/mame/machine/decocrpt.c

r14976	r14977
600	600
601	601	static void deco_decrypt(running_machine &machine,const char *rgntag,const UINT8 *xor_table,const UINT16 *address_table,const UINT8 *swap_table,int remap_only)
602	602	{
603		UINT16 *rom = (UINT16 *)machine.region(rgntag)->base();
604		int len = machine.region(rgntag)->bytes()/2;
	603	UINT16 *rom = (UINT16 *)machine.root_device().memregion(rgntag)->base();
	604	int len = machine.root_device().memregion(rgntag)->bytes()/2;
605	605	UINT16 *buffer = auto_alloc_array(machine, UINT16, len);
606	606	int i;
607	607

src/mame/machine/simpsons.c

r14976	r14977
65	65
66	66	static KONAMI_SETLINES_CALLBACK( simpsons_banking )
67	67	{
68		memory_set_bank(device->machine(), "bank1", lines & 0x3f);
	68	device->machine().root_device().membank("bank1")->set_entry(lines & 0x3f);
69	69	}
70	70
71	71	static void simpsons_postload(running_machine &machine)
r14976	r14977
118	118	state->m_video_bank = 0;
119	119
120	120	/* init the default banks */
121		memory_configure_bank(machine, "bank1", 0, 64, machine.region("maincpu")->base() + 0x10000, 0x2000);
122		memory_set_bank(machine, "bank1", 0);
	121	state->membank("bank1")->configure_entries(0, 64, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x2000);
	122	state->membank("bank1")->set_entry(0);
123	123
124		memory_configure_bank(machine, "bank2", 0, 2, machine.region("audiocpu")->base() + 0x10000, 0);
125		memory_configure_bank(machine, "bank2", 2, 6, machine.region("audiocpu")->base() + 0x10000, 0x4000);
126		memory_set_bank(machine, "bank2", 0);
	124	state->membank("bank2")->configure_entries(0, 2, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0);
	125	state->membank("bank2")->configure_entries(2, 6, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
	126	state->membank("bank2")->set_entry(0);
127	127
128	128	simpsons_video_banking(machine, 0);
129	129	}

src/mame/machine/pgmprot3.c

r14976	r14977
199	199
200	200	static void pgm_create_dummy_internal_arm_region(running_machine &machine)
201	201	{
202		UINT16 *temp16 = (UINT16 *)machine.region("prot")->base();
	202	UINT16 *temp16 = (UINT16 *)machine.root_device().memregion("prot")->base();
203	203
204	204	// fill with RX 14
205	205	int i;

src/mame/machine/model1.c

r14976	r14977
495	495	static TGP_FUNCTION( track_read_quad )
496	496	{
497	497	model1_state *state = machine.driver_data<model1_state>();
498		const UINT32 *tgp_data = (const UINT32 *)machine.region("user2")->base();
	498	const UINT32 *tgp_data = (const UINT32 *)state->memregion("user2")->base();
499	499	UINT32 a = fifoin_pop(state);
500	500	int offd;
501	501
r14976	r14977
885	885	static TGP_FUNCTION( track_read_info )
886	886	{
887	887	model1_state *state = machine.driver_data<model1_state>();
888		const UINT32 *tgp_data = (const UINT32 *)machine.region("user2")->base();
	888	const UINT32 *tgp_data = (const UINT32 *)state->memregion("user2")->base();
889	889	UINT16 a = fifoin_pop(state);
890	890	int offd;
891	891
r14976	r14977
1039	1039	static TGP_FUNCTION( track_lookup )
1040	1040	{
1041	1041	model1_state *state = machine.driver_data<model1_state>();
1042		const UINT32 *tgp_data = (const UINT32 *)machine.region("user2")->base();
	1042	const UINT32 *tgp_data = (const UINT32 *)state->memregion("user2")->base();
1043	1043	float a = fifoin_pop_f(state);
1044	1044	UINT32 b = fifoin_pop(state);
1045	1045	float c = fifoin_pop_f(state);

src/mame/machine/jalcrpt.c

r14976	r14977
4	4
5	5	void phantasm_rom_decode(running_machine &machine, const char *region)
6	6	{
7		UINT16   *RAM   =   (UINT16 *) machine.region(region)->base();
8		int i,      size   =   machine.region(region)->bytes();
	7	UINT16   *RAM   =   (UINT16 *) machine.root_device().memregion(region)->base();
	8	int i,      size   =   machine.root_device().memregion(region)->bytes();
9	9	if (size > 0x40000)   size = 0x40000;
10	10
11	11	for (i = 0 ; i < size/2 ; i++)
r14976	r14977
38	38
39	39	void astyanax_rom_decode(running_machine &machine, const char *region)
40	40	{
41		UINT16   *RAM   =   (UINT16 *) machine.region(region)->base();
42		int i,      size   =   machine.region(region)->bytes();
	41	UINT16   *RAM   =   (UINT16 *) machine.root_device().memregion(region)->base();
	42	int i,      size   =   machine.root_device().memregion(region)->bytes();
43	43	if (size > 0x40000)   size = 0x40000;
44	44
45	45	for (i = 0 ; i < size/2 ; i++)
r14976	r14977
72	72
73	73	void rodland_rom_decode(running_machine &machine, const char *region)
74	74	{
75		UINT16   *RAM   =   (UINT16 *) machine.region(region)->base();
76		int i,      size   =   machine.region(region)->bytes();
	75	UINT16   *RAM   =   (UINT16 *) machine.root_device().memregion(region)->base();
	76	int i,      size   =   machine.root_device().memregion(region)->bytes();
77	77	if (size > 0x40000)   size = 0x40000;
78	78
79	79	for (i = 0 ; i < size/2 ; i++)
r14976	r14977
125	125
126	126	UINT8 *result_data;
127	127
128		source_data = machine.region       ( region )->base();
129		source_size = machine.region( region )->bytes();
	128	source_data = machine.root_device().memregion       ( region )->base();
	129	source_size = machine.root_device().memregion( region )->bytes();
130	130
131	131	result_data = auto_alloc_array(machine, UINT8, source_size);
132	132
r14976	r14977
150	150
151	151	UINT8 *result_data;
152	152
153		source_data = machine.region       ( region )->base();
154		source_size = machine.region( region )->bytes();
	153	source_data = machine.root_device().memregion       ( region )->base();
	154	source_size = machine.root_device().memregion( region )->bytes();
155	155
156	156	result_data = auto_alloc_array(machine, UINT8, source_size);
157	157
r14976	r14977
204	204
205	205	UINT8 *result_data;
206	206
207		source_data = machine.region       ( region )->base();
208		source_size = machine.region( region )->bytes();
	207	source_data = machine.root_device().memregion       ( region )->base();
	208	source_size = machine.root_device().memregion( region )->bytes();
209	209
210	210	result_data = auto_alloc_array(machine, UINT8, source_size);
211	211

src/mame/machine/micro3d.c

r14976	r14977
320	320	case 0x08:
321	321	{
322	322	int i;
323		const UINT16 *rom = (UINT16*)machine().region("vertex")->base();
	323	const UINT16 *rom = (UINT16*)machine().root_device().memregion("vertex")->base();
324	324
325	325	for (i = 0; i <= cnt; ++i)
326	326	{
r14976	r14977
359	359	case 0x0c:
360	360	{
361	361	int i;
362		const UINT16 *rom = (UINT16*)machine().region("vertex")->base();
	362	const UINT16 *rom = (UINT16*)machine().root_device().memregion("vertex")->base();
363	363
364	364	for (i = 0; i <= cnt; ++i)
365	365	{
r14976	r14977
392	392	case 0x0f:
393	393	{
394	394	int i;
395		const UINT16 *rom = (UINT16*)machine().region("vertex")->base();
	395	const UINT16 *rom = (UINT16*)machine().root_device().memregion("vertex")->base();
396	396
397	397	for (i = 0; i <= cnt; ++i, vtx_addr += 4)
398	398	{

src/mame/machine/btime.c

r14976	r14977
6	6
7	7	READ8_MEMBER(btime_state::mmonkey_protection_r)
8	8	{
9		UINT8 *RAM = machine().region("maincpu")->base();
	9	UINT8 *RAM = memregion("maincpu")->base();
10	10	int ret = 0;
11	11
12	12	if (offset == 0x0000)
r14976	r14977
23	23
24	24	WRITE8_MEMBER(btime_state::mmonkey_protection_w)
25	25	{
26		UINT8 *RAM = machine().region("maincpu")->base();
	26	UINT8 *RAM = memregion("maincpu")->base();
27	27
28	28	if (offset == 0)
29	29	{

src/mame/machine/pacplus.c

r14976	r14977
46	46
47	47	/* CPU ROMs */
48	48
49		RAM = machine.region("maincpu")->base();
	49	RAM = machine.root_device().memregion("maincpu")->base();
50	50	for (i = 0; i < 0x4000; i++)
51	51	{
52	52	RAM[i] = decrypt(i,RAM[i]);

src/mame/machine/md_cart.c

r14976	r14977
194	194	static WRITE16_HANDLER( genesis_ssf2_bank_w )
195	195	{
196	196	md_cons_state *state = space->machine().driver_data<md_cons_state>();
197		UINT8 *ROM = space->machine().region("maincpu")->base();
	197	UINT8 *ROM = state->memregion("maincpu")->base();
198	198
199	199	if ((state->m_md_cart.ssf2_lastoff != offset) || (state->m_md_cart.ssf2_lastdata != data))
200	200	{
r14976	r14977
325	325	{
326	326	case 0:
327	327	{
328		UINT8 *ROM = space->machine().region("maincpu")->base();
	328	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
329	329	/* printf("%06x data %04x\n",activecpu_get_pc(), data); */
330	330	memcpy(&ROM[0x000000], &ROM[VIRGIN_COPY_GEN + (data & 0xffff) * 0x8000], 0x8000);
331	331	}
r14976	r14977
355	355	md_cons_state *state = space->machine().driver_data<md_cons_state>();
356	356	int bankdata = (data >> 9) & 0x7;
357	357
358		UINT8 *ROM = space->machine().region("maincpu")->base();
	358	UINT8 *ROM = state->memregion("maincpu")->base();
359	359
360	360	state->m_md_cart.realtec_old_bank_addr = state->m_md_cart.realtec_bank_addr;
361	361	state->m_md_cart.realtec_bank_addr = (state->m_md_cart.realtec_bank_addr & 0x7) | bankdata << 3;
r14976	r14977
368	368	{
369	369	md_cons_state *state = space->machine().driver_data<md_cons_state>();
370	370	int bankdata = (data >> 8) & 0x3;
371		UINT8 *ROM = space->machine().region("maincpu")->base();
	371	UINT8 *ROM = state->memregion("maincpu")->base();
372	372
373	373	state->m_md_cart.realtec_old_bank_addr = state->m_md_cart.realtec_bank_addr;
374	374	state->m_md_cart.realtec_bank_addr = (state->m_md_cart.realtec_bank_addr & 0xf8) | bankdata;
r14976	r14977
385	385	*************************************/
386	386	static WRITE16_HANDLER( chifi3_bank_w )
387	387	{
388		UINT8 *ROM = space->machine().region("maincpu")->base();
	388	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
389	389
390	390	if (data == 0xf100) // *hit player
391	391	{
r14976	r14977
489	489	*************************************/
490	490	static WRITE16_HANDLER( s19in1_bank )
491	491	{
492		UINT8 *ROM = space->machine().region("maincpu")->base();
	492	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
493	493	memcpy(ROM + 0x000000, ROM + 0x400000 + ((offset << 1) * 0x10000), 0x80000);
494	494	}
495	495
r14976	r14977
498	498	*************************************/
499	499	static WRITE16_HANDLER( kaiju_bank_w )
500	500	{
501		UINT8 *ROM = space->machine().region("maincpu")->base();
	501	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
502	502	memcpy(ROM + 0x000000, ROM + 0x400000 + (data & 0x7f) * 0x8000, 0x8000);
503	503	}
504	504
r14976	r14977
605	605	static READ16_HANDLER( radica_bank_select )
606	606	{
607	607	int bank = offset & 0x3f;
608		UINT8 *ROM = space->machine().region("maincpu")->base();
	608	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
609	609	memcpy(ROM, ROM + 0x400000 + (bank * 0x10000), 0x400000);
610	610	return 0;
611	611	}
r14976	r14977
772	772
773	773	static WRITE16_HANDLER( topfig_bank_w )
774	774	{
775		UINT8 *ROM = space->machine().region("maincpu")->base();
	775	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
776	776	if (data == 0x002a)
777	777	{
778	778	memcpy(ROM + 0x060000, ROM + 0x570000, 0x8000); // == 0x2e*0x8000?!
r14976	r14977
819	819	*************************************/
820	820	static WRITE16_HANDLER( mc_12in1_bank_w )
821	821	{
822		UINT8 *ROM = space->machine().region("maincpu")->base();
	822	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
823	823	logerror("offset %06x", offset << 17);
824	824	memcpy(ROM + 0x000000, ROM + VIRGIN_COPY_GEN + ((offset & 0x3f) << 17), 0x100000);
825	825	}
r14976	r14977
854	854	return state->m_md_cart.sram[offset];
855	855	else
856	856	{
857		ROM = space->machine().region("maincpu")->base();
	857	ROM = state->memregion("maincpu")->base();
858	858	rom_offset = state->m_md_cart.sram_start + (offset << 1);
859	859
860	860	return (UINT16) ROM[rom_offset] | (ROM[rom_offset + 1] << 8);
r14976	r14977
1018	1018	{
1019	1019	md_cons_state *state = machine.driver_data<md_cons_state>();
1020	1020	UINT32 mirroraddr;
1021		UINT8 *ROM = machine.region("maincpu")->base();
	1021	UINT8 *ROM = state->memregion("maincpu")->base();
1022	1022
1023	1023	switch (state->m_md_cart.type)
1024	1024	{
r14976	r14977
1235	1235	you need to return 1 @ 0xa13002 and 0???1f @ 0xa1303E (it does word reads).
1236	1236
1237	1237	*/
1238		UINT16 *ROM16 = (UINT16 *)machine.region("maincpu")->base();
	1238	UINT16 *ROM16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1239	1239
1240	1240	ROM16[0x0dd19e/2] = 0x47F8;
1241	1241	ROM16[0x0dd1a0/2] = 0xFFF0;
r14976	r14977
1254	1254	002476:6022
1255	1255
1256	1256	*/
1257		UINT16 *ROM16 = (UINT16 *)machine.region("maincpu")->base();
	1257	UINT16 *ROM16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1258	1258
1259	1259	ROM16[0x06036/2] = 0xE000;
1260	1260	ROM16[0x02540/2] = 0x6026;
r14976	r14977
1274	1274	//  ROM[0x01ED0/2] = 0xE000;
1275	1275	//  ROM[0x02540/2] = 0xE000;
1276	1276
1277		UINT16 *ROM16 = (UINT16 *)machine.region("maincpu")->base();
	1277	UINT16 *ROM16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1278	1278
1279	1279	ROM16[0x06036/2] = 0xE000;
1280	1280	}
r14976	r14977
1287	1287	{
1288	1288	running_machine &machine = image.device().machine();
1289	1289	md_cons_state *state = machine.driver_data<md_cons_state>();
1290		UINT8 *ROM = machine.region("maincpu")->base();
	1290	UINT8 *ROM = state->memregion("maincpu")->base();
1291	1291	megadriv_backupram = NULL;
1292	1292	state->m_md_cart.sram = NULL;
1293	1293	state->m_md_cart.sram_start = state->m_md_cart.sram_end = 0;
r14976	r14977
1546	1546	#endif
1547	1547
1548	1548	// STEP 1: determine the file type (SMD? MD? BIN?)
1549		rawROM = image.device().machine().region("maincpu")->base();
	1549	rawROM = state->memregion("maincpu")->base();
1550	1550	ROM = rawROM /*+ 512 */;
1551	1551
1552	1552	state->m_md_cart.last_loaded_image_length = -1;
r14976	r14977
1881	1881	static int megadrive_load_list(device_image_interface &image)
1882	1882	{
1883	1883	md_cons_state *state = image.device().machine().driver_data<md_cons_state>();
1884		UINT8 *ROM = image.device().machine().region("maincpu")->base();
	1884	UINT8 *ROM = state->memregion("maincpu")->base();
1885	1885	UINT32 length = image.get_software_region_length("rom");
1886	1886	const char   *pcb_name;
1887	1887	memcpy(ROM, image.get_software_region("rom"), length);
r14976	r14977
1975	1975
1976	1976	/* Copy the cart image in the locations the driver expects */
1977	1977	// Notice that, by using pick_integer, we are sure the code works on both LE and BE machines
1978		ROM16 = (UINT16 *) image.device().machine().region("gamecart")->base();
	1978	ROM16 = (UINT16 *) image.device().machine().root_device().memregion("gamecart")->base();
1979	1979	for (i = 0; i < length; i += 2)
1980	1980	ROM16[i / 2] = pick_integer_be(temp_copy, i, 2);
1981	1981
1982		ROM32 = (UINT32 *) image.device().machine().region("gamecart_sh2")->base();
	1982	ROM32 = (UINT32 *) image.device().machine().root_device().memregion("gamecart_sh2")->base();
1983	1983	for (i = 0; i < length; i += 4)
1984	1984	ROM32[i / 4] = pick_integer_be(temp_copy, i, 4);
1985	1985
1986		ROM16 = (UINT16 *) image.device().machine().region("maincpu")->base();
	1986	ROM16 = (UINT16 *) image.device().machine().root_device().memregion("maincpu")->base();
1987	1987	for (i = 0x00; i < length; i += 2)
1988	1988	ROM16[i / 2] = pick_integer_be(temp_copy, i, 2);
1989	1989

src/mame/machine/playch10.c

r14976	r14977
46	46	MACHINE_START( pc10 )
47	47	{
48	48	playch10_state *state = machine.driver_data<playch10_state>();
49		state->m_vrom = machine.region("gfx2")->base();
	49	state->m_vrom = machine.root_device().memregion("gfx2")->base();
50	50
51	51	/* allocate 4K of nametable ram here */
52	52	/* move to individual boards as documentation of actual boards allows */
r14976	r14977
61	61
62	62	nvram_device *nvram = machine.device<nvram_device>("nvram");
63	63	if (nvram != NULL)
64		nvram->set_base(machine.region("cart" )->base() + 0x6000, 0x1000);
	64	nvram->set_base(state->memregion("cart" )->base() + 0x6000, 0x1000);
65	65	}
66	66
67	67	MACHINE_START( playch10_hboard )
68	68	{
69	69	playch10_state *state = machine.driver_data<playch10_state>();
70		state->m_vrom = machine.region("gfx2")->base();
	70	state->m_vrom = state->memregion("gfx2")->base();
71	71
72	72	/* allocate 4K of nametable ram here */
73	73	/* move to individual boards as documentation of actual boards allows */
r14976	r14977
196	196	/* is the actual protection memory area                     */
197	197	/* setting the whole 0x2000 region every time is a waste    */
198	198	/* so we just set $ffff with the current value              */
199		machine().region("maincpu")->base()[0xffff] = pc10_prot_r(space, 0);
	199	memregion("maincpu")->base()[0xffff] = pc10_prot_r(space, 0);
200	200	}
201	201	}
202	202
r14976	r14977
370	370	/* yeah, this is probably a horrible assumption to make.*/
371	371	/* but the driver is 100% consistant */
372	372
373		len = machine.region("gfx2")->bytes();
	373	len = state->memregion("gfx2")->bytes();
374	374	len /= 0x400;   // convert to KB
375	375	len /= size;   // convert to bank resolution
376	376	len--;         // convert to mask
r14976	r14977
548	548	case 3:   /* program banking */
549	549	{
550	550	int bank = (m_mmc1_shiftreg & m_mmc1_rom_mask) * 0x4000;
551		UINT8 *prg = machine().region("cart")->base();
	551	UINT8 *prg = memregion("cart")->base();
552	552
553	553	if (!size16k)
554	554	{
r14976	r14977
605	605	WRITE8_MEMBER(playch10_state::bboard_rom_switch_w)
606	606	{
607	607	int bankoffset = 0x10000 + ((data & 7) * 0x4000);
608		UINT8 *prg = machine().region("cart")->base();
	608	UINT8 *prg = memregion("cart")->base();
609	609
610	610	memcpy(&prg[0x08000], &prg[bankoffset], 0x4000);
611	611	}
r14976	r14977
613	613	DRIVER_INIT( pcbboard )
614	614	{
615	615	playch10_state *state = machine.driver_data<playch10_state>();
616		UINT8 *prg = machine.region("cart")->base();
	616	UINT8 *prg = state->memregion("cart")->base();
617	617
618	618	/* We do manual banking, in case the code falls through */
619	619	/* Copy the initial banks */
r14976	r14977
661	661	DRIVER_INIT( pcdboard )
662	662	{
663	663	playch10_state *state = machine.driver_data<playch10_state>();
664		UINT8 *prg = machine.region("cart")->base();
	664	UINT8 *prg = state->memregion("cart")->base();
665	665
666	666	/* We do manual banking, in case the code falls through */
667	667	/* Copy the initial banks */
r14976	r14977
736	736	case 0x2000: /* code bank switching */
737	737	{
738	738	int bankoffset = 0x10000 + (data & 0x0f) * 0x2000;
739		UINT8 *prg = machine().region("cart")->base();
	739	UINT8 *prg = memregion("cart")->base();
740	740	memcpy(&prg[0x08000], &prg[bankoffset], 0x2000);
741	741	}
742	742	break;
r14976	r14977
776	776	{
777	777	playch10_state *state = machine.driver_data<playch10_state>();
778	778	ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
779		UINT8 *prg = machine.region("cart")->base();
	779	UINT8 *prg = state->memregion("cart")->base();
780	780
781	781	/* we have no vram, make sure switching games doesn't point to an old allocation */
782	782	state->m_vram = NULL;
r14976	r14977
804	804	DRIVER_INIT( pcfboard )
805	805	{
806	806	playch10_state *state = machine.driver_data<playch10_state>();
807		UINT8 *prg = machine.region("cart")->base();
	807	UINT8 *prg = state->memregion("cart")->base();
808	808
809	809	/* we have no vram, make sure switching games doesn't point to an old allocation */
810	810	state->m_vram = NULL;
r14976	r14977
867	867	if (m_gboard_last_bank != (data & 0xc0))
868	868	{
869	869	int bank;
870		UINT8 *prg = machine().region("cart")->base();
	870	UINT8 *prg = memregion("cart")->base();
871	871
872	872	/* reset the banks */
873	873	if (m_gboard_command & 0x40)
r14976	r14977
920	920
921	921	case 6: /* program banking */
922	922	{
923		UINT8 *prg = machine().region("cart")->base();
	923	UINT8 *prg = memregion("cart")->base();
924	924	if (m_gboard_command & 0x40)
925	925	{
926	926	/* high bank */
r14976	r14977
945	945	case 7: /* program banking */
946	946	{
947	947	/* mid bank */
948		UINT8 *prg = machine().region("cart")->base();
	948	UINT8 *prg = memregion("cart")->base();
949	949	m_gboard_banks[1] = data & 0x1f;
950	950	bank = m_gboard_banks[1] * 0x2000 + 0x10000;
951	951
r14976	r14977
991	991	DRIVER_INIT( pcgboard )
992	992	{
993	993	playch10_state *state = machine.driver_data<playch10_state>();
994		UINT8 *prg = machine.region("cart")->base();
	994	UINT8 *prg = state->memregion("cart")->base();
995	995	state->m_vram = NULL;
996	996
997	997	/* We do manual banking, in case the code falls through */
r14976	r14977
1032	1032	WRITE8_MEMBER(playch10_state::iboard_rom_switch_w)
1033	1033	{
1034	1034	int bank = data & 7;
1035		UINT8 *prg = machine().region("cart")->base();
	1035	UINT8 *prg = memregion("cart")->base();
1036	1036
1037	1037	if (data & 0x10)
1038	1038	pc10_set_mirroring(PPU_MIRROR_HIGH);
r14976	r14977
1045	1045	DRIVER_INIT( pciboard )
1046	1046	{
1047	1047	playch10_state *state = machine.driver_data<playch10_state>();
1048		UINT8 *prg = machine.region("cart")->base();
	1048	UINT8 *prg = state->memregion("cart")->base();
1049	1049
1050	1050	/* We do manual banking, in case the code falls through */
1051	1051	/* Copy the initial banks */
r14976	r14977
1115	1115	DRIVER_INIT( pchboard )
1116	1116	{
1117	1117	playch10_state *state = machine.driver_data<playch10_state>();
1118		UINT8 *prg = machine.region("cart")->base();
	1118	UINT8 *prg = state->memregion("cart")->base();
1119	1119	memcpy(&prg[0x08000], &prg[0x4c000], 0x4000);
1120	1120	memcpy(&prg[0x0c000], &prg[0x4c000], 0x4000);
1121	1121
r14976	r14977
1142	1142	DRIVER_INIT( pckboard )
1143	1143	{
1144	1144	playch10_state *state = machine.driver_data<playch10_state>();
1145		UINT8 *prg = machine.region("cart")->base();
	1145	UINT8 *prg = state->memregion("cart")->base();
1146	1146
1147	1147	/* We do manual banking, in case the code falls through */
1148	1148	/* Copy the initial banks */

src/mame/machine/s16fd.c

r14976	r14977
203	203
204	204	strcpy(fd1094_cputag, tag);
205	205
206		fd1094_cpuregion = (UINT16*)machine.region(fd1094_cputag)->base();
207		fd1094_cpuregionsize = machine.region(fd1094_cputag)->bytes();
208		fd1094_key = machine.region("user1")->base();
	206	fd1094_cpuregion = (UINT16*)machine.root_device().memregion(fd1094_cputag)->base();
	207	fd1094_cpuregionsize = machine.root_device().memregion(fd1094_cputag)->bytes();
	208	fd1094_key = machine.root_device().memregion("user1")->base();
209	209	fd1094_set_decrypted = set_decrypted;
210	210
211	211	/* punt if no key; this allows us to be called even for non-FD1094 games */
r14976	r14977
222	222
223	223	/* key debugging */
224	224	#if KEY_DEBUGGING
225		if ((machine.debug_flags & DEBUG_FLAG_ENABLED) != 0 && machine.region("user2")->base() != NULL)
	225	if ((machine.debug_flags & DEBUG_FLAG_ENABLED) != 0 && machine.root_device().memregion("user2")->base() != NULL)
226	226	{
227	227	fd1094_init_debugging(machine, fd1094_cputag, "user1", "user2", key_changed);
228	228	}

src/mame/machine/snessdd1.c

r14976	r14977
662	662
663	663	static UINT8 sdd1_read(running_machine& machine, UINT32 addr)
664	664	{
665		unsigned char *ROM = machine.region("cart")->base();
	665	unsigned char *ROM = machine.root_device().memregion("cart")->base();
666	666
667	667	if(snes_sdd1.sdd1_enable & snes_sdd1.xfer_enable)
668	668	{

src/mame/machine/atari.c

r14976	r14977
112	112	logerror("%s MMU SELFTEST ROM\n", machine.system().name);
113	113	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x5000, 0x57ff, "bank2");
114	114	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x5000, 0x57ff);
115		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x5000);
	115	machine.root_device().membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x5000);
116	116	}
117	117	}
118	118

src/mame/machine/naomim2.c

r14976	r14977
20	20	{
21	21	naomi_board::device_start();
22	22
23		const UINT8 *key_data = machine().region(key_tag)->base();
	23	const UINT8 *key_data = memregion(key_tag)->base();
24	24	key = (key_data[0] << 24) | (key_data[1] << 16) | (key_data[2] << 8) | key_data[3];
25	25
26	26	ram = auto_alloc_array(machine(), UINT8, RAM_SIZE);

src/mame/machine/smpc.c

r14976	r14977
189	189
190	190	if(state->m_prev_bankswitch != param)
191	191	{
192		game_region = machine.region(banknames[param])->base();
	192	game_region = machine.root_device().memregion(banknames[param])->base();
193	193
194	194	if (game_region)
195		memcpy(machine.region("abus")->base(), game_region, 0x3000000);
	195	memcpy(machine.root_device().memregion("abus")->base(), game_region, 0x3000000);
196	196	else
197		memset(machine.region("abus")->base(), 0x00, 0x3000000);
	197	memset(machine.root_device().memregion("abus")->base(), 0x00, 0x3000000);
198	198
199	199	state->m_prev_bankswitch = param;
200	200	}

src/mame/machine/pgmcrypt.c

r14976	r14977
27	27	{
28	28
29	29	int i;
30		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	30	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
31	31
32	32	int rom_size = 0x400000;
33	33
r14976	r14977
89	89	{
90	90
91	91	int i;
92		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	92	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
93	93
94	94	int rom_size = 0x400000;
95	95
r14976	r14977
130	130	{
131	131
132	132	int i;
133		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	133	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
134	134
135	135	int rom_size = 0x80000;
136	136
r14976	r14977
172	172	{
173	173
174	174	int i;
175		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	175	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
176	176
177	177	int rom_size = 0x400000;
178	178
r14976	r14977
232	232	{
233	233
234	234	int i;
235		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	235	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
236	236
237	237	int rom_size = 0x100000;
238	238
r14976	r14977
272	272	//  UINT16 *src=(UINT16 *) (OP_ROM+0x100000);
273	273
274	274	int i;
275		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	275	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
276	276
277	277	int rom_size = 0x100000;
278	278
r14976	r14977
304	304	//  UINT16 *src=(UINT16 *) (OP_ROM+0x100000);
305	305
306	306	int i;
307		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	307	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
308	308
309	309	int rom_size = 0x200000;
310	310
r14976	r14977
343	343	void pgm_dfront_decrypt(running_machine &machine)
344	344	{
345	345	int i;
346		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	346	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
347	347
348	348	int rom_size = 0x400000;
349	349
r14976	r14977
403	403	void pgm_ddp2_decrypt(running_machine &machine)
404	404	{
405	405	int i;
406		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	406	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
407	407
408	408	int rom_size = 0x200000;
409	409
r14976	r14977
457	457	void pgm_mm_decrypt(running_machine &machine) // and dw2001
458	458	{
459	459	int i;
460		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	460	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
461	461
462	462	int rom_size = 0x200000;
463	463
r14976	r14977
516	516	void pgm_kov2_decrypt(running_machine &machine)
517	517	{
518	518	int i;
519		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	519	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
520	520
521	521	int rom_size = 0x200000;
522	522
r14976	r14977
572	572	void pgm_kov2p_decrypt(running_machine &machine)
573	573	{
574	574	int i;
575		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	575	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
576	576
577	577	int rom_size = 0x200000;
578	578
r14976	r14977
631	631	void pgm_puzzli2_decrypt(running_machine &machine)
632	632	{
633	633	int i;
634		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	634	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
635	635
636	636	int rom_size = 0x100000;
637	637
r14976	r14977
690	690	void pgm_theglad_decrypt(running_machine &machine)
691	691	{
692	692	int i;
693		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	693	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
694	694
695	695	int rom_size = 0x200000;
696	696
r14976	r14977
750	750	void pgm_oldsplus_decrypt(running_machine &machine)
751	751	{
752	752	int i;
753		unsigned short *src = (unsigned short *)(machine.region("maincpu")->base()+0x100000);
	753	unsigned short *src = (unsigned short *)(machine.root_device().memregion("maincpu")->base()+0x100000);
754	754
755	755	int rom_size = 0x400000;
756	756
r14976	r14977
810	810	void pgm_kovshp_decrypt(running_machine &machine)
811	811	{
812	812	int i;
813		unsigned short *src = (unsigned short *)(machine.region("maincpu")->base()+0x100000);
	813	unsigned short *src = (unsigned short *)(machine.root_device().memregion("maincpu")->base()+0x100000);
814	814
815	815	int rom_size = 0x400000;
816	816
r14976	r14977
870	870	void pgm_killbldp_decrypt(running_machine &machine)
871	871	{
872	872	int i;
873		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	873	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
874	874
875	875	int rom_size = 0x200000;
876	876
r14976	r14977
911	911	void pgm_svg_decrypt(running_machine &machine)
912	912	{
913	913	int i;
914		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	914	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
915	915
916	916	int rom_size = 0x800000;
917	917
r14976	r14977
968	968	void pgm_svgpcb_decrypt(running_machine &machine)
969	969	{
970	970	int i;
971		UINT16 *src = (UINT16 *)(machine.region("user1")->base());
	971	UINT16 *src = (UINT16 *)(machine.root_device().memregion("user1")->base());
972	972
973	973	int rom_size = 0x800000;
974	974
r14976	r14977
1014	1014	void pgm_py2k2_decrypt(running_machine &machine) // and ddpdoj/ddpdojbl
1015	1015	{
1016	1016	int i;
1017		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base()+0x100000);
	1017	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base()+0x100000);
1018	1018
1019	1019	int rom_size = 0x400000;
1020	1020
r14976	r14977
1060	1060	void pgm_ket_decrypt(running_machine &machine)
1061	1061	{
1062	1062	int i;
1063		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	1063	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
1064	1064
1065	1065	int rom_size = 0x400000;
1066	1066
r14976	r14977
1106	1106	void pgm_espgal_decrypt(running_machine &machine)
1107	1107	{
1108	1108	int i;
1109		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	1109	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
1110	1110
1111	1111	int rom_size = 0x400000;
1112	1112
r14976	r14977
1153	1153	void pgm_happy6_decrypt(running_machine &machine)
1154	1154	{
1155	1155	int i;
1156		UINT16 *src = (UINT16 *) (machine.region("user1")->base());
	1156	UINT16 *src = (UINT16 *) (machine.root_device().memregion("user1")->base());
1157	1157
1158	1158	int rom_size = 0x400000;
1159	1159

src/mame/machine/segas32.c

r14976	r14977
36	36	void decrypt_ga2_protrom(running_machine &machine)
37	37	{
38	38	int i;
39		UINT8 *rom = machine.region("mcu")->base();
	39	UINT8 *rom = machine.root_device().memregion("mcu")->base();
40	40	UINT8* temp = auto_alloc_array(machine, UINT8, 0x100000);
41	41
42	42	// make copy of ROM so original can be overwritten
r14976	r14977
113	113	}
114	114	else
115	115	{
116		const UINT8 *ROM = machine().region("maincpu")->base();
	116	const UINT8 *ROM = memregion("maincpu")->base();
117	117	level =  *((ROM + LEVEL_ORDER_ARRAY) + (m_system32_workram[CLEARED_LEVELS / 2] * 2) - 1);
118	118	level |= *((ROM + LEVEL_ORDER_ARRAY) + (m_system32_workram[CLEARED_LEVELS / 2] * 2) - 2) << 8;
119	119	}
r14976	r14977
163	163	};
164	164	char ret[32];
165	165	int curProtType;
166		UINT8 *ROM = machine().region("maincpu")->base();
	166	UINT8 *ROM = memregion("maincpu")->base();
167	167
168	168	switch (offset)
169	169	{

src/mame/machine/slapfght.c

r14976	r14977
65	65
66	66	WRITE8_MEMBER(slapfght_state::slapfight_port_08_w)
67	67	{
68		UINT8 *RAM = machine().region("maincpu")->base();
	68	UINT8 *RAM = memregion("maincpu")->base();
69	69
70		memory_set_bankptr(machine(), "bank1",&RAM[0x10000]);
	70	membank("bank1")->set_base(&RAM[0x10000]);
71	71	}
72	72
73	73	WRITE8_MEMBER(slapfght_state::slapfight_port_09_w)
74	74	{
75		UINT8 *RAM = machine().region("maincpu")->base();
	75	UINT8 *RAM = memregion("maincpu")->base();
76	76
77		memory_set_bankptr(machine(), "bank1",&RAM[0x14000]);
	77	membank("bank1")->set_base(&RAM[0x14000]);
78	78	}
79	79
80	80

src/mame/machine/acitya.c

r14976	r14977
22	22	int mem;
23	23	UINT8 *RAM;
24	24
25		RAM = machine.region("maincpu")->base();
	25	RAM = machine.root_device().memregion("maincpu")->base();
26	26
27	27
28	28	for (mem=0;mem<0x4000;mem++)
r14976	r14977
58	58	int mem;
59	59	UINT8 *RAM;
60	60
61		RAM = machine.region("maincpu")->base();
	61	RAM = machine.root_device().memregion("maincpu")->base();
62	62
63	63	for (mem=0;mem<0x4000;mem++)
64	64	{
r14976	r14977
91	91	int mem;
92	92	UINT8 *RAM;
93	93
94		RAM = machine.region("maincpu")->base();
	94	RAM = machine.root_device().memregion("maincpu")->base();
95	95
96	96	for (mem=0;mem<0x4000;mem++)
97	97	{
r14976	r14977
124	124	int mem;
125	125	UINT8 *RAM;
126	126
127		RAM = machine.region("maincpu")->base();
	127	RAM = machine.root_device().memregion("maincpu")->base();
128	128
129	129	for (mem=0;mem<0x4000;mem++)
130	130	{
r14976	r14977
168	168
169	169	switch(state->m_counter)
170	170	{
171		case 0x08:   memory_set_bank (space->machine(), "bank1", 0);      break;
172		case 0x09:   memory_set_bank (space->machine(), "bank1", 1);      break;
173		case 0x0A:   memory_set_bank (space->machine(), "bank1", 2);      break;
174		case 0x0B:   memory_set_bank (space->machine(), "bank1", 3);      break;
	171	case 0x08:   state->membank ("bank1")->set_entry (0);      break;
	172	case 0x09:   state->membank ("bank1")->set_entry (1);      break;
	173	case 0x0A:   state->membank ("bank1")->set_entry (2);      break;
	174	case 0x0B:   state->membank ("bank1")->set_entry (3);      break;
175	175	default:
176	176	logerror("Invalid counter = %02X\n",state->m_counter);
177	177	break;
r14976	r14977
184	184	MACHINE_START( acitya )
185	185	{
186	186	pacman_state *state = machine.driver_data<pacman_state>();
187		UINT8 *RAM = machine.region("maincpu")->base();
	187	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
188	188
189	189	/* While the PAL supports up to 16 decryption methods, only four
190	190	are actually used in the PAL.  Therefore, we'll take a little
r14976	r14977
194	194	acitya_decrypt_rom_A(machine);
195	195	acitya_decrypt_rom_B(machine);
196	196
197		memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x10000], 0x4000);
	197	state->membank("bank1")->configure_entries(0, 4, &RAM[0x10000], 0x4000);
198	198
199	199	state_save_register_global(machine, state->m_counter);
200	200	}
r14976	r14977
205	205	pacman_state *state = machine.driver_data<pacman_state>();
206	206	/* The initial state of the counter is 0x0B */
207	207	state->m_counter = 0x0B;
208		memory_set_bank(machine, "bank1", 3);
	208	state->membank("bank1")->set_entry(3);
209	209	}

src/mame/machine/pgmprot4.c

r14976	r14977
107	107	};
108	108	*/
109	109	int x;
110		UINT16 *PROTROM = (UINT16*)machine.region("igs022data")->base();
	110	UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
111	111
112	112	for (x = 0; x < size; x++)
113	113	{
114		//UINT16 *RAMDUMP = (UINT16*)space->machine().region("user2")->base();
	114	//UINT16 *RAMDUMP = (UINT16*)space->machine().root_device().memregion("user2")->base();
115	115	//UINT16 dat = RAMDUMP[dst + x];
116	116
117	117	UINT16 dat2 = PROTROM[src + x];
118	118
119	119	UINT8 extraoffset = param&0xfe; // the lowest bit changed the table addressing in tests, see 'rawDataOdd' table instead.. it's still related to the main one, not identical
120		UINT8* dectable = (UINT8*)machine.region("igs022data")->base();//rawDataEven; // the basic decryption table is at the start of the mcu data rom! at least in killbld
	120	UINT8* dectable = (UINT8*)machine.root_device().memregion("igs022data")->base();//rawDataEven; // the basic decryption table is at the start of the mcu data rom! at least in killbld
121	121	UINT16 extraxor = ((dectable[((x*2)+0+extraoffset)&0xff]) << 8) | (dectable[((x*2)+1+extraoffset)&0xff] << 0);
122	122
123	123	dat2 = ((dat2 & 0x00ff)<<8) | ((dat2 & 0xff00)>>8);
r14976	r14977
148	148	{
149	149	/* mode 5 seems to be a straight copy */
150	150	int x;
151		UINT16 *PROTROM = (UINT16*)machine.region("igs022data")->base();
	151	UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
152	152	for (x = 0; x < size; x++)
153	153	{
154	154	UINT16 dat = PROTROM[src + x];
r14976	r14977
161	161	{
162	162	/* mode 6 seems to swap bytes and nibbles */
163	163	int x;
164		UINT16 *PROTROM = (UINT16*)machine.region("igs022data")->base();
	164	UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
165	165	for (x = 0; x < size; x++)
166	166	{
167	167	UINT16 dat = PROTROM[src + x];
r14976	r14977
194	194	static void IGS022_reset(running_machine& machine)
195	195	{
196	196	int i;
197		UINT16 *PROTROM = (UINT16*)machine.region("igs022data")->base();
	197	UINT16 *PROTROM = (UINT16*)machine.root_device().memregion("igs022data")->base();
198	198	pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
199	199	UINT16 tmp;
200	200
r14976	r14977
534	534
535	535	{
536	536	int x;
537		UINT16 *RAMDUMP = (UINT16*)machine.region("user2")->base();
	537	UINT16 *RAMDUMP = (UINT16*)state->memregion("user2")->base();
538	538	for (x=0;x<(0x4000/2);x++)
539	539	{
540	540	state->m_sharedprotram[x] = RAMDUMP[x];

src/mame/machine/decocass.c

r14976	r14977
297	297	{
298	298	offs_t promaddr;
299	299	UINT8 save;
300		UINT8 *prom = space->machine().region("dongle")->base();
	300	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
301	301
302	302	if (state->m_firsttime)
303	303	{
r14976	r14977
377	377	{
378	378	offs_t promaddr;
379	379	UINT8 save;
380		UINT8 *prom = space->machine().region("dongle")->base();
	380	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
381	381
382	382	if (state->m_firsttime)
383	383	{
r14976	r14977
457	457	{
458	458	offs_t promaddr;
459	459	UINT8 save;
460		UINT8 *prom = space->machine().region("dongle")->base();
	460	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
461	461
462	462	if (state->m_firsttime)
463	463	{
r14976	r14977
537	537	{
538	538	offs_t promaddr;
539	539	UINT8 save;
540		UINT8 *prom = space->machine().region("dongle")->base();
	540	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
541	541
542	542	if (state->m_firsttime)
543	543	{
r14976	r14977
619	619	{
620	620	offs_t promaddr;
621	621	UINT8 save;
622		UINT8 *prom = space->machine().region("dongle")->base();
	622	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
623	623
624	624	if (state->m_firsttime)
625	625	{
r14976	r14977
687	687	{
688	688	if (1 == (offset & 1))
689	689	{
690		UINT8 *prom = space->machine().region("dongle")->base();
	690	UINT8 *prom = state->memregion("dongle")->base();
691	691	data = prom[256 * state->m_type2_d2_latch + state->m_type2_promaddr];
692	692	LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, 256 * state->m_type2_d2_latch + state->m_type2_promaddr));
693	693	}
r14976	r14977
771	771	{
772	772	if (1 == state->m_type3_pal_19)
773	773	{
774		UINT8 *prom = space->machine().region("dongle")->base();
	774	UINT8 *prom = state->memregion("dongle")->base();
775	775	data = prom[state->m_type3_ctrs];
776	776	LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, state->m_type3_ctrs));
777	777	if (++state->m_type3_ctrs == 4096)
r14976	r14977
1024	1024	{
1025	1025	if (state->m_type4_latch)
1026	1026	{
1027		UINT8 *prom = space->machine().region("dongle")->base();
	1027	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
1028	1028
1029	1029	data = prom[state->m_type4_ctrs];
1030	1030	LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.', state->m_type4_ctrs));
r14976	r14977
1288	1288	{
1289	1289	decocass_state *state = space->machine().driver_data<decocass_state>();
1290	1290	state->m_de0091_enable = data & 1;
1291		memory_set_bank(space->machine(), "bank1", data & 1);
	1291	state->membank("bank1")->set_entry(data & 1);
1292	1292	/* Perhaps the second row of ROMs is enabled by another bit.
1293	1293	* There is no way to verify this yet, so for now just look
1294	1294	* at bit 0 to enable the daughter board at reads between
r14976	r14977
1648	1648	MACHINE_RESET( czeroize )
1649	1649	{
1650	1650	decocass_state *state = machine.driver_data<decocass_state>();
1651		UINT8 *mem = machine.region("dongle")->base();
	1651	UINT8 *mem = state->memregion("dongle")->base();
1652	1652	decocass_reset_common(machine);
1653	1653	LOG(0,("dongle type #3 (PAL)\n"));
1654	1654	state->m_dongle_r = decocass_type3_r;

src/mame/machine/konppc.c

r14976	r14977
118	118	{
119	119	texture_bank[board] = bank;
120	120
121		memory_configure_bank(machine, bank, 0, 2, rom, 0x800000);
	121	machine.root_device().membank(bank)->configure_entries(0, 2, rom, 0x800000);
122	122	}
123	123
124	124	/*****************************************************************************/
r14976	r14977
254	254	{
255	255	int offset = (data & 0x08) ? 1 : 0;
256	256
257		memory_set_bank(space->machine(), texture_bank[board], offset);
	257	space->machine().root_device().membank(texture_bank[board])->set_entry(offset);
258	258	}
259	259	}
260	260	break;
r14976	r14977
268	268	{
269	269	int offset = (data & 0x08) ? 1 : 0;
270	270
271		memory_set_bank(space->machine(), texture_bank[board], offset);
	271	space->machine().root_device().membank(texture_bank[board])->set_entry(offset);
272	272	}
273	273	}
274	274	break;

src/mame/machine/irobot.c

r14976	r14977
101	101
102	102	WRITE8_MEMBER(irobot_state::irobot_out0_w)
103	103	{
104		UINT8 *RAM = machine().region("maincpu")->base();
	104	UINT8 *RAM = memregion("maincpu")->base();
105	105
106	106	m_out0 = data;
107	107	switch (data & 0x60)
108	108	{
109	109	case 0:
110		memory_set_bankptr(machine(), "bank2", &RAM[0x1C000]);
	110	membank("bank2")->set_base(&RAM[0x1C000]);
111	111	break;
112	112	case 0x20:
113		memory_set_bankptr(machine(), "bank2", &RAM[0x1C800]);
	113	membank("bank2")->set_base(&RAM[0x1C800]);
114	114	break;
115	115	case 0x40:
116		memory_set_bankptr(machine(), "bank2", &RAM[0x1D000]);
	116	membank("bank2")->set_base(&RAM[0x1D000]);
117	117	break;
118	118	}
119	119	m_outx = (data & 0x18) >> 3;
r14976	r14977
123	123
124	124	WRITE8_MEMBER(irobot_state::irobot_rom_banksel_w)
125	125	{
126		UINT8 *RAM = machine().region("maincpu")->base();
	126	UINT8 *RAM = memregion("maincpu")->base();
127	127
128	128	switch ((data & 0x0E) >> 1)
129	129	{
130	130	case 0:
131		memory_set_bankptr(machine(), "bank1", &RAM[0x10000]);
	131	membank("bank1")->set_base(&RAM[0x10000]);
132	132	break;
133	133	case 1:
134		memory_set_bankptr(machine(), "bank1", &RAM[0x12000]);
	134	membank("bank1")->set_base(&RAM[0x12000]);
135	135	break;
136	136	case 2:
137		memory_set_bankptr(machine(), "bank1", &RAM[0x14000]);
	137	membank("bank1")->set_base(&RAM[0x14000]);
138	138	break;
139	139	case 3:
140		memory_set_bankptr(machine(), "bank1", &RAM[0x16000]);
	140	membank("bank1")->set_base(&RAM[0x16000]);
141	141	break;
142	142	case 4:
143		memory_set_bankptr(machine(), "bank1", &RAM[0x18000]);
	143	membank("bank1")->set_base(&RAM[0x18000]);
144	144	break;
145	145	case 5:
146		memory_set_bankptr(machine(), "bank1", &RAM[0x1A000]);
	146	membank("bank1")->set_base(&RAM[0x1A000]);
147	147	break;
148	148	}
149	149	set_led_status(machine(), 0,data & 0x10);
r14976	r14977
170	170	MACHINE_RESET( irobot )
171	171	{
172	172	irobot_state *state = machine.driver_data<irobot_state>();
173		UINT8 *MB = machine.region("mathbox")->base();
	173	UINT8 *MB = state->memregion("mathbox")->base();
174	174
175	175	/* initialize the memory regions */
176	176	state->m_mbROM      = MB + 0x00000;
r14976	r14977
332	332	static void load_oproms(running_machine &machine)
333	333	{
334	334	irobot_state *state = machine.driver_data<irobot_state>();
335		UINT8 *MB = machine.region("proms")->base() + 0x20;
	335	UINT8 *MB = state->memregion("proms")->base() + 0x20;
336	336	int i;
337	337
338	338	/* allocate RAM */

src/mame/machine/leland.c

r14976	r14977
354	354	state->m_alternate_bank = 0;
355	355
356	356	/* initialize the master banks */
357		state->m_master_length = machine.region("master")->bytes();
358		state->m_master_base = machine.region("master")->base();
	357	state->m_master_length = machine.root_device().memregion("master")->bytes();
	358	state->m_master_base = machine.root_device().memregion("master")->base();
359	359	(*state->m_update_master_bank)(machine);
360	360
361	361	/* initialize the slave banks */
362		state->m_slave_length = machine.region("slave")->bytes();
363		state->m_slave_base = machine.region("slave")->base();
	362	state->m_slave_length = machine.root_device().memregion("slave")->bytes();
	363	state->m_slave_base = state->memregion("slave")->base();
364	364	if (state->m_slave_length > 0x10000)
365		memory_set_bankptr(machine, "bank3", &state->m_slave_base[0x10000]);
	365	state->membank("bank3")->set_base(&state->m_slave_base[0x10000]);
366	366	}
367	367
368	368
r14976	r14977
385	385	state->m_master_int_timer->adjust(machine.primary_screen->time_until_pos(8), 8);
386	386
387	387	/* initialize the XROM */
388		state->m_xrom_length = machine.region("user1")->bytes();
389		state->m_xrom_base = machine.region("user1")->base();
	388	state->m_xrom_length = machine.root_device().memregion("user1")->bytes();
	389	state->m_xrom_base = machine.root_device().memregion("user1")->base();
390	390	state->m_xrom1_addr = 0;
391	391	state->m_xrom2_addr = 0;
392	392
r14976	r14977
400	400	state->m_master_bank = 0;
401	401
402	402	/* initialize the master banks */
403		state->m_master_length = machine.region("master")->bytes();
404		state->m_master_base = machine.region("master")->base();
	403	state->m_master_length = machine.root_device().memregion("master")->bytes();
	404	state->m_master_base = machine.root_device().memregion("master")->base();
405	405	ataxx_bankswitch(machine);
406	406
407	407	/* initialize the slave banks */
408		state->m_slave_length = machine.region("slave")->bytes();
409		state->m_slave_base = machine.region("slave")->base();
	408	state->m_slave_length = machine.root_device().memregion("slave")->bytes();
	409	state->m_slave_base = state->memregion("slave")->base();
410	410	if (state->m_slave_length > 0x10000)
411		memory_set_bankptr(machine, "bank3", &state->m_slave_base[0x10000]);
	411	state->membank("bank3")->set_base(&state->m_slave_base[0x10000]);
412	412	}
413	413
414	414
r14976	r14977
494	494	state->m_battery_ram_enable = ((state->m_sound_port_bank & 0x24) == 0);
495	495
496	496	address = (!(state->m_sound_port_bank & 0x04)) ? &state->m_master_base[0x10000] : &state->m_master_base[0x1c000];
497		memory_set_bankptr(machine, "bank1", address);
	497	state->membank("bank1")->set_base(address);
498	498
499	499	address = state->m_battery_ram_enable ? state->m_battery_ram : &address[0x8000];
500		memory_set_bankptr(machine, "bank2", address);
	500	state->membank("bank2")->set_base(address);
501	501	}
502	502
503	503
r14976	r14977
510	510	state->m_battery_ram_enable = ((state->m_top_board_bank & 0x80) != 0);
511	511
512	512	address = (!(state->m_alternate_bank & 1)) ? &state->m_master_base[0x02000] : &state->m_master_base[0x12000];
513		memory_set_bankptr(machine, "bank1", address);
	513	state->membank("bank1")->set_base(address);
514	514
515	515	address = state->m_battery_ram_enable ? state->m_battery_ram : &address[0x8000];
516		memory_set_bankptr(machine, "bank2", address);
	516	state->membank("bank2")->set_base(address);
517	517	}
518	518
519	519
r14976	r14977
529	529	address = (!(state->m_sound_port_bank & 0x04)) ? &state->m_master_base[0x10000] : &state->m_master_base[0x1c000];
530	530	else
531	531	address = (!(state->m_top_board_bank & 0x40)) ? &state->m_master_base[0x28000] : &state->m_master_base[0x30000];
532		memory_set_bankptr(machine, "bank1", address);
	532	state->membank("bank1")->set_base(address);
533	533
534	534	address = state->m_battery_ram_enable ? state->m_battery_ram : &address[0x8000];
535		memory_set_bankptr(machine, "bank2", address);
	535	state->membank("bank2")->set_base(address);
536	536	}
537	537
538	538
r14976	r14977
546	546	state->m_battery_ram_enable = ((state->m_alternate_bank & 3) == 1);
547	547
548	548	address = &state->m_master_base[bank_list[state->m_alternate_bank & 3]];
549		memory_set_bankptr(machine, "bank1", address);
	549	state->membank("bank1")->set_base(address);
550	550
551	551	address = state->m_battery_ram_enable ? state->m_battery_ram : &state->m_master_base[0xa000];
552		memory_set_bankptr(machine, "bank2", address);
	552	state->membank("bank2")->set_base(address);
553	553	}
554	554
555	555
r14976	r14977
568	568	logerror("%s:Master bank %02X out of range!\n", machine.describe_context(), state->m_alternate_bank & 3);
569	569	address = &state->m_master_base[bank_list[0]];
570	570	}
571		memory_set_bankptr(machine, "bank1", address);
	571	state->membank("bank1")->set_base(address);
572	572
573	573	address = state->m_battery_ram_enable ? state->m_battery_ram : &state->m_master_base[0xa000];
574		memory_set_bankptr(machine, "bank2", address);
	574	state->membank("bank2")->set_base(address);
575	575	}
576	576
577	577
r14976	r14977
590	590	logerror("%s:Master bank %02X out of range!\n", machine.describe_context(), state->m_alternate_bank & 7);
591	591	address = &state->m_master_base[bank_list[0]];
592	592	}
593		memory_set_bankptr(machine, "bank1", address);
	593	state->membank("bank1")->set_base(address);
594	594
595	595	address = state->m_battery_ram_enable ? state->m_battery_ram : &state->m_master_base[0xa000];
596		memory_set_bankptr(machine, "bank2", address);
	596	state->membank("bank2")->set_base(address);
597	597	}
598	598
599	599
r14976	r14977
616	616	logerror("%s:Master bank %02X out of range!\n", machine.describe_context(), state->m_master_bank & 15);
617	617	address = &state->m_master_base[bank_list[0]];
618	618	}
619		memory_set_bankptr(machine, "bank1", address);
	619	state->membank("bank1")->set_base(address);
620	620
621	621	if (state->m_battery_ram_enable)
622	622	address = state->m_battery_ram;
r14976	r14977
624	624	address = &state->m_ataxx_qram[(state->m_master_bank & 0xc0) << 8];
625	625	else
626	626	address = &state->m_master_base[0xa000];
627		memory_set_bankptr(machine, "bank2", address);
	627	state->membank("bank2")->set_base(address);
628	628
629	629	state->m_wcol_enable = ((state->m_master_bank & 0x30) == 0x30);
630	630	}
r14976	r14977
1349	1349	logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(&space.device()), data & 1);
1350	1350	bankaddress = 0x10000;
1351	1351	}
1352		memory_set_bankptr(machine(), "bank3", &m_slave_base[bankaddress]);
	1352	membank("bank3")->set_base(&m_slave_base[bankaddress]);
1353	1353
1354	1354	if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(&space.device()), data & 1, bankaddress);
1355	1355	}
r14976	r14977
1364	1364	logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(&space.device()), data & 15);
1365	1365	bankaddress = 0x10000;
1366	1366	}
1367		memory_set_bankptr(machine(), "bank3", &m_slave_base[bankaddress]);
	1367	membank("bank3")->set_base(&m_slave_base[bankaddress]);
1368	1368
1369	1369	if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(&space.device()), data & 15, bankaddress);
1370	1370	}
r14976	r14977
1388	1388	logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(&space.device()), data & 0x3f);
1389	1389	bankaddress = 0x2000;
1390	1390	}
1391		memory_set_bankptr(machine(), "bank3", &m_slave_base[bankaddress]);
	1391	membank("bank3")->set_base(&m_slave_base[bankaddress]);
1392	1392
1393	1393	if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(&space.device()), data, bankaddress);
1394	1394	}
r14976	r14977
1418	1418	void leland_rotate_memory(running_machine &machine, const char *cpuname)
1419	1419	{
1420	1420	int startaddr = 0x10000;
1421		int banks = (machine.region(cpuname)->bytes() - startaddr) / 0x8000;
1422		UINT8 *ram = machine.region(cpuname)->base();
	1421	int banks = (machine.root_device().memregion(cpuname)->bytes() - startaddr) / 0x8000;
	1422	UINT8 *ram = machine.root_device().memregion(cpuname)->base();
1423	1423	UINT8 temp[0x2000];
1424	1424	int i;
1425	1425

src/mame/machine/kabuki.c

r14976	r14977
162	162	static void mitchell_decode(running_machine &machine, int swap_key1,int swap_key2,int addr_key,int xor_key)
163	163	{
164	164	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
165		UINT8 *rom = machine.region("maincpu")->base();
166		UINT8 *decrypt = auto_alloc_array(machine, UINT8, machine.region("maincpu")->bytes());
167		int numbanks = (machine.region("maincpu")->bytes() - 0x10000) / 0x4000;
	165	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	166	UINT8 *decrypt = auto_alloc_array(machine, UINT8, machine.root_device().memregion("maincpu")->bytes());
	167	int numbanks = (machine.root_device().memregion("maincpu")->bytes() - 0x10000) / 0x4000;
168	168	int i;
169	169
170	170	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
r14976	r14977
175	175	for (i = 0; i < numbanks; i++)
176	176	kabuki_decode(rom+i*0x4000,decrypt+i*0x4000,rom+i*0x4000,0x8000,0x4000, swap_key1,swap_key2,addr_key,xor_key);
177	177
178		memory_configure_bank_decrypted(machine, "bank1", 0, numbanks, decrypt, 0x4000);
	178	machine.root_device().membank("bank1")->configure_decrypted_entries(0, numbanks, decrypt, 0x4000);
179	179	/*
180	180	{
181	181	FILE *f;
r14976	r14977
204	204	{
205	205	address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
206	206	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
207		UINT8 *rom = machine.region("audiocpu")->base();
	207	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
208	208
209	209	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
210	210	kabuki_decode(rom,decrypt,rom,0x0000,0x8000, swap_key1,swap_key2,addr_key,xor_key);

src/mame/machine/vectrex.c

r14976	r14977
67	67	DEVICE_IMAGE_LOAD(vectrex_cart)
68	68	{
69	69	vectrex_state *state = image.device().machine().driver_data<vectrex_state>();
70		UINT8 *mem = image.device().machine().region("maincpu")->base();
	70	UINT8 *mem = state->memregion("maincpu")->base();
71	71	if (image.software_entry() == NULL)
72	72	{
73	73	image.fread( mem, 0x8000);

src/mame/machine/scramble.c

r14976	r14977
26	26
27	27	MACHINE_RESET( explorer )
28	28	{
29		UINT8 *RAM = machine.region("maincpu")->base();
	29	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
30	30	RAM[0x47ff] = 0; /* If not set, it doesn't reset after the 1st time */
31	31
32	32	MACHINE_RESET_CALL(galaxold);
r14976	r14977
111	111	to keep the CPU core happy at the boundaries */
112	112
113	113	state->m_cavelon_bank = !state->m_cavelon_bank;
114		memory_set_bank(machine, "bank1", state->m_cavelon_bank);
	114	state->membank("bank1")->set_entry(state->m_cavelon_bank);
115	115	}
116	116
117	117	static READ8_HANDLER( cavelon_banksw_r )
r14976	r14977
246	246	/* extra ROM */
247	247	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x5800, 0x67ff, "bank1");
248	248	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x5800, 0x67ff);
249		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x5800);
	249	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x5800);
250	250
251	251	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x9008, 0x9008, FUNC(mariner_protection_2_r));
252	252	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0xb401, 0xb401, FUNC(mariner_protection_1_r));
r14976	r14977
262	262	UINT8 *ROM;
263	263
264	264	/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
265		ROM = machine.region("audiocpu")->base();
	265	ROM = machine.root_device().memregion("audiocpu")->base();
266	266	for (A = 0;A < 0x0800;A++)
267	267	ROM[A] = BITSWAP8(ROM[A],7,6,5,4,3,2,0,1);
268	268
269	269	/* likewise, the 2nd gfx ROM has data lines D0 and D1 swapped. Decode it. */
270		ROM = machine.region("gfx1")->base();
	270	ROM = machine.root_device().memregion("gfx1")->base();
271	271	for (A = 0x0800;A < 0x1000;A++)
272	272	ROM[A] = BITSWAP8(ROM[A],7,6,5,4,3,2,0,1);
273	273	}
r14976	r14977
278	278	UINT8 *ROM;
279	279
280	280	/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
281		ROM = machine.region("audiocpu")->base();
	281	ROM = machine.root_device().memregion("audiocpu")->base();
282	282	for (A = 0;A < 0x0800;A++)
283	283	ROM[A] = BITSWAP8(ROM[A],7,6,5,4,3,2,0,1);
284	284	}
r14976	r14977
296	296	/* A2 -> A3 */
297	297	/* A3 -> A1 */
298	298
299		RAM = machine.region("maincpu")->base();
	299	RAM = machine.root_device().memregion("maincpu")->base();
300	300	for (i = 0; i < 0x10000; i += 16)
301	301	{
302	302	offs_t j;
r14976	r14977
322	322	{
323	323	/* protection??? The game jumps into never-neverland here. I think
324	324	it just expects a RET there */
325		machine.region("maincpu")->base()[0x2ef9] = 0xc9;
	325	machine.root_device().memregion("maincpu")->base()[0x2ef9] = 0xc9;
326	326	}
327	327
328	328	DRIVER_INIT( cavelon )
329	329	{
330	330	scramble_state *state = machine.driver_data<scramble_state>();
331		UINT8 *ROM = machine.region("maincpu")->base();
	331	UINT8 *ROM = state->memregion("maincpu")->base();
332	332
333	333	/* banked ROM */
334	334	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x3fff, "bank1");
335		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x00000], 0x10000);
	335	state->membank("bank1")->configure_entries(0, 2, &ROM[0x00000], 0x10000);
336	336	cavelon_banksw(machine);
337	337
338	338	/* A15 switches memory banks */
r14976	r14977
374	374	{ 0x80,0x87,0x81,0x87,0x83,0x00,0x84,0x01,0x01,0x86,0x86,0x80,0x86,0x00,0x86,0x86 }
375	375	};
376	376
377		UINT8 *ROM = machine.region("maincpu")->base();
	377	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
378	378	int A, ctr = 0, line, col;
379	379
380	380	for( A = 0; A < 0x4000; A++ )
r14976	r14977
422	422	*   Optimizations done by Fabio Buffoni
423	423	*/
424	424
425		RAM = machine.region("gfx1")->base();
426		len = machine.region("gfx1")->bytes();
	425	RAM = machine.root_device().memregion("gfx1")->base();
	426	len = machine.root_device().memregion("gfx1")->bytes();
427	427
428	428	scratch = alloc_array_or_die(UINT8, len);
429	429
r14976	r14977
460	460	*   Optimizations done by Fabio Buffoni
461	461	*/
462	462
463		RAM = machine.region("gfx1")->base();
464		len = machine.region("gfx1")->bytes();
	463	RAM = machine.root_device().memregion("gfx1")->base();
	464	len = machine.root_device().memregion("gfx1")->bytes();
465	465
466	466	scratch = auto_alloc_array(machine, UINT8, len);
467	467
r14976	r14977
496	496	*   Code To Decode Minefield by Mike Balfour and Nicola Salmoria
497	497	*/
498	498
499		RAM = machine.region("gfx1")->base();
500		len = machine.region("gfx1")->bytes();
	499	RAM = machine.root_device().memregion("gfx1")->base();
	500	len = machine.root_device().memregion("gfx1")->bytes();
501	501
502	502	scratch = auto_alloc_array(machine, UINT8, len);
503	503
r14976	r14977
535	535	*   Optimizations done by Fabio Buffoni
536	536	*/
537	537
538		RAM = machine.region("gfx1")->base();
539		len = machine.region("gfx1")->bytes();
	538	RAM = machine.root_device().memregion("gfx1")->base();
	539	len = machine.root_device().memregion("gfx1")->bytes();
540	540
541	541	scratch = alloc_array_or_die(UINT8, len);
542	542
r14976	r14977
562	562	DRIVER_INIT( hustler )
563	563	{
564	564	offs_t A;
565		UINT8 *rom = machine.region("maincpu")->base();
	565	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
566	566
567	567
568	568	for (A = 0;A < 0x4000;A++)
r14976	r14977
590	590
591	591	/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
592	592	{
593		rom = machine.region("audiocpu")->base();
	593	rom = machine.root_device().memregion("audiocpu")->base();
594	594
595	595
596	596	for (A = 0;A < 0x0800;A++)
r14976	r14977
602	602	{
603	603	/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
604	604	offs_t A;
605		UINT8 *rom = machine.region("audiocpu")->base();
	605	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
606	606
607	607
608	608	for (A = 0;A < 0x0800;A++)
r14976	r14977
612	612	DRIVER_INIT( billiard )
613	613	{
614	614	offs_t A;
615		UINT8 *rom = machine.region("maincpu")->base();
	615	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
616	616
617	617
618	618	for (A = 0;A < 0x4000;A++)
r14976	r14977
642	642
643	643	/* the first ROM of the second CPU has data lines D0 and D1 swapped. Decode it. */
644	644	{
645		rom = machine.region("audiocpu")->base();
	645	rom = machine.root_device().memregion("audiocpu")->base();
646	646
647	647
648	648	for (A = 0;A < 0x0800;A++)
r14976	r14977
670	670	DRIVER_INIT( ad2083 )
671	671	{
672	672	UINT8 c;
673		int i, len = machine.region("maincpu")->bytes();
674		UINT8 *ROM = machine.region("maincpu")->base();
	673	int i, len = machine.root_device().memregion("maincpu")->bytes();
	674	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
675	675
676	676	for (i=0; i<len; i++)
677	677	{

src/mame/machine/fddebug.c

r14976	r14977
482	482	key_changed = changed;
483	483
484	484	/* set up the regions */
485		coderegion = (UINT16 *)machine.region(cpureg)->base();
486		coderegion_words = machine.region(cpureg)->bytes() / 2;
487		keyregion = (UINT8 *)machine.region(keyreg)->base();
488		keystatus = (UINT16 *)machine.region(statreg)->base();
489		keystatus_words = machine.region(statreg)->bytes() / 2;
	485	coderegion = (UINT16 *)machine.root_device().memregion(cpureg)->base();
	486	coderegion_words = machine.root_device().memregion(cpureg)->bytes() / 2;
	487	keyregion = (UINT8 *)machine.root_device().memregion(keyreg)->base();
	488	keystatus = (UINT16 *)machine.root_device().memregion(statreg)->base();
	489	keystatus_words = machine.root_device().memregion(statreg)->bytes() / 2;
490	490	assert(coderegion_words == keystatus_words);
491	491
492	492	/* allocate memory for the ignore table */

src/mame/machine/midxunit.c

r14976	r14977
299	299	register_state_saving(machine);
300	300
301	301	/* load the graphics ROMs -- quadruples */
302		midtunit_gfx_rom = base = machine.region("gfx1")->base();
303		len = machine.region("gfx1")->bytes();
	302	midtunit_gfx_rom = base = machine.root_device().memregion("gfx1")->base();
	303	len = state->memregion("gfx1")->bytes();
304	304	for (i = 0; i < len / 0x200000; i++)
305	305	{
306	306	memcpy(state->m_decode_memory, base, 0x200000);

src/mame/machine/segaic16.c

r14976	r14977
157	157	if (region_start >= romsize)
158	158	continue;
159	159
160		memory_configure_bank_decrypted(machine, readbank, 0, 1, decrypted + region_start, 0);
161		memory_set_bank(machine, readbank, 0);
	160	machine.root_device().membank(readbank)->configure_decrypted_entry(0, decrypted + region_start);
	161	machine.root_device().membank(readbank)->set_entry(0);
162	162	}
163	163	}
164	164
r14976	r14977
349	349	{
350	350	if (rgn->base != NULL)
351	351	{
352		memory_configure_bank(machine, readbank, 0, 1, *rgn->base, 0);
353		memory_set_bank(machine, readbank, 0);
	352	machine.root_device().membank(readbank)->configure_entry(0, *rgn->base);
	353	machine.root_device().membank(readbank)->set_entry(0);
354	354	}
355	355	else if (rgn->romoffset != ~0)
356	356	{
r14976	r14977
363	363	decrypted = (UINT8 *)fd1089_get_decrypted_base();
364	364	}
365	365
366		memory_configure_bank(machine, readbank, 0, 1, chip->cpu->region()->base() + region_start, 0);
	366	machine.root_device().membank(readbank)->configure_entry(0, chip->cpu->region()->base() + region_start);
367	367	if (decrypted)
368		memory_configure_bank_decrypted(machine, readbank, 0, 1, decrypted + region_start, 0);
	368	machine.root_device().membank(readbank)->configure_decrypted_entry(0, decrypted + region_start);
369	369
370		memory_set_bank(machine, readbank, 0);
	370	machine.root_device().membank(readbank)->set_entry(0);
371	371	}
372	372	}
373	373

src/mame/machine/n64.c

r14976	r14977
71	71
72	72	void n64_periphs::device_reset()
73	73	{
74		UINT32 *cart = (UINT32*)machine().region("user2")->base();
	74	UINT32 *cart = (UINT32*)machine().root_device().memregion("user2")->base();
75	75
76	76	maincpu = machine().device("maincpu");
77	77	rspcpu = machine().device("rsp");
r14976	r14977
1412	1412
1413	1413	void n64_periphs::pi_dma_tick()
1414	1414	{
1415		UINT16 *cart16 = (UINT16*)machine().region("user2")->base();
	1415	UINT16 *cart16 = (UINT16*)machine().root_device().memregion("user2")->base();
1416	1416	UINT16 *dram16 = (UINT16*)rdram;
1417	1417
1418	1418	UINT32 cart_addr = (pi_cart_addr & 0x0fffffff) >> 1;
r14976	r14977
1425	1425	}
1426	1426	else if((cart_addr & 0x03000000) == 0x03000000 && dd_present)
1427	1427	{
1428		cart16 = (UINT16*)machine().region("ddipl")->base();
	1428	cart16 = (UINT16*)machine().root_device().memregion("ddipl")->base();
1429	1429	cart_addr = (pi_cart_addr & 0x003fffff) >> 1;
1430	1430	}
1431	1431	else
1432	1432	{
1433		cart_addr &= ((machine().region("user2")->bytes() >> 1) - 1);
	1433	cart_addr &= ((machine().root_device().memregion("user2")->bytes() >> 1) - 1);
1434	1434	}
1435	1435
1436	1436	//printf("%08x Cart, %08x Dram\n", cart_addr << 1, dram_addr << 1); fflush(stdout);

src/mame/machine/stfight.c

r14976	r14977
40	40	{
41	41	stfight_state *state = machine.driver_data<stfight_state>();
42	42	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
43		UINT8 *rom = machine.region("maincpu")->base();
	43	UINT8 *rom = state->memregion("maincpu")->base();
44	44	int A;
45	45
46	46	state->m_decrypt = auto_alloc_array(machine, UINT8, 0x8000);
r14976	r14977
103	103	// - in fact I don't even know how/where it's switched in!
104	104	WRITE8_MEMBER(stfight_state::stfight_bank_w)
105	105	{
106		UINT8   *ROM2 = machine().region("maincpu")->base() + 0x10000;
	106	UINT8   *ROM2 = memregion("maincpu")->base() + 0x10000;
107	107
108		memory_set_bankptr(machine(),  "bank1", &ROM2[data<<14] );
	108	membank("bank1")->set_base(&ROM2[data<<14] );
109	109	}
110	110
111	111	/*
r14976	r14977
192	192	void stfight_adpcm_int(device_t *device)
193	193	{
194	194	stfight_state *state = device->machine().driver_data<stfight_state>();
195		UINT8 *SAMPLES = device->machine().region("adpcm")->base();
	195	UINT8 *SAMPLES = state->memregion("adpcm")->base();
196	196	int adpcm_data = SAMPLES[state->m_adpcm_data_offs & 0x7fff];
197	197
198	198	// finished playing sample?

src/mame/machine/pgmprot5.c

r14976	r14977
66	66
67	67	DRIVER_INIT( drgw2 )
68	68	{   /* incomplete? */
69		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	69	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
70	70	drgwld2_common_init(machine);
71	71	/* These ROM patches are not hacks, the protection device
72	72	overlays the normal ROM code, this has been confirmed on a real PCB
r14976	r14977
78	78
79	79	DRIVER_INIT( dw2v100x )
80	80	{
81		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	81	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
82	82	drgwld2_common_init(machine);
83	83
84	84	mem16[0x131084 / 2] = 0x4e93;
r14976	r14977
88	88
89	89	DRIVER_INIT( drgw2c )
90	90	{
91		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	91	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
92	92	drgwld2_common_init(machine);
93	93	/* These ROM patches are not hacks, the protection device
94	94	overlays the normal ROM code, this has been confirmed on a real PCB
r14976	r14977
100	100
101	101	DRIVER_INIT( drgw2j )
102	102	{
103		UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	103	UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
104	104	drgwld2_common_init(machine);
105	105	/* These ROM patches are not hacks, the protection device
106	106	overlays the normal ROM code, this has been confirmed on a real PCB

src/mame/machine/awboard.c

r14976	r14977
212	212	if(!keyregion)
213	213	return;
214	214
215		const memory_region *kr = machine().region(keyregion);
	215	memory_region *kr = memregion(keyregion);
216	216	if(!kr)
217	217	return;
218	218

src/mame/machine/deco102.c

r14976	r14977
51	51	{
52	52	int i;
53	53	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
54		UINT16 *rom = (UINT16 *)machine.region(cputag)->base();
55		int size = machine.region(cputag)->bytes();
	54	UINT16 *rom = (UINT16 *)machine.root_device().memregion(cputag)->base();
	55	int size = machine.root_device().memregion(cputag)->bytes();
56	56	UINT16 *opcodes = auto_alloc_array(machine, UINT16, size / 2);
57	57	UINT16 *buf = auto_alloc_array(machine, UINT16, size / 2);
58	58

src/mame/machine/qix.c

r14976	r14977
266	266
267	267	WRITE8_MEMBER(qix_state::zookeep_bankswitch_w)
268	268	{
269		memory_set_bank(machine(), "bank1", (data >> 2) & 1);
	269	membank("bank1")->set_entry((data >> 2) & 1);
270	270	/* not necessary, but technically correct */
271	271	qix_palettebank_w(space, offset, data);
272	272	}

src/mame/machine/theglobp.c

r14976	r14977
71	71	int mem;
72	72	UINT8 *RAM;
73	73
74		RAM = machine.region("maincpu")->base();
	74	RAM = machine.root_device().memregion("maincpu")->base();
75	75
76	76
77	77	for (mem=0;mem<0x4000;mem++)
r14976	r14977
108	108	int mem;
109	109	UINT8 *RAM;
110	110
111		RAM = machine.region("maincpu")->base();
	111	RAM = machine.root_device().memregion("maincpu")->base();
112	112
113	113	for (mem=0;mem<0x4000;mem++)
114	114	{
r14976	r14977
143	143	int mem;
144	144	UINT8 *RAM;
145	145
146		RAM = machine.region("maincpu")->base();
	146	RAM = machine.root_device().memregion("maincpu")->base();
147	147
148	148	for (mem=0;mem<0x4000;mem++)
149	149	{
r14976	r14977
178	178	int mem;
179	179	UINT8 *RAM;
180	180
181		RAM = machine.region("maincpu")->base();
	181	RAM = machine.root_device().memregion("maincpu")->base();
182	182
183	183	for (mem=0;mem<0x4000;mem++)
184	184	{
r14976	r14977
222	222
223	223	switch(state->m_counter)
224	224	{
225		case 0x08:   memory_set_bank (space->machine(), "bank1", 0);      break;
226		case 0x09:   memory_set_bank (space->machine(), "bank1", 1);      break;
227		case 0x0A:   memory_set_bank (space->machine(), "bank1", 2);      break;
228		case 0x0B:   memory_set_bank (space->machine(), "bank1", 3);      break;
	225	case 0x08:   state->membank ("bank1")->set_entry (0);      break;
	226	case 0x09:   state->membank ("bank1")->set_entry (1);      break;
	227	case 0x0A:   state->membank ("bank1")->set_entry (2);      break;
	228	case 0x0B:   state->membank ("bank1")->set_entry (3);      break;
229	229	default:
230	230	logerror("Invalid counter = %02X\n",state->m_counter);
231	231	break;
r14976	r14977
238	238	MACHINE_START( theglobp )
239	239	{
240	240	pacman_state *state = machine.driver_data<pacman_state>();
241		UINT8 *RAM = machine.region("maincpu")->base();
	241	UINT8 *RAM = state->memregion("maincpu")->base();
242	242
243	243	/* While the PAL supports up to 16 decryption methods, only four
244	244	are actually used in the PAL.  Therefore, we'll take a little
r14976	r14977
248	248	theglobp_decrypt_rom_A(machine);
249	249	theglobp_decrypt_rom_B(machine);
250	250
251		memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x10000], 0x4000);
	251	state->membank("bank1")->configure_entries(0, 4, &RAM[0x10000], 0x4000);
252	252
253	253	state_save_register_global(machine, state->m_counter);
254	254	}
r14976	r14977
259	259	pacman_state *state = machine.driver_data<pacman_state>();
260	260	/* The initial state of the counter is 0x0A */
261	261	state->m_counter = 0x0A;
262		memory_set_bank(machine, "bank1", 2);
	262	state->membank("bank1")->set_entry(2);
263	263	}

src/mame/machine/snes.c

r14976	r14977
1998	1998	UINT16 total_blocks, read_blocks;
1999	1999	UINT8 *rom;
2000	2000
2001		rom = machine.region("user3")->base();
	2001	rom = machine.root_device().memregion("user3")->base();
2002	2002	snes_ram = auto_alloc_array_clear(machine, UINT8, 0x1400000);
2003	2003
2004	2004	/* all NSS games seem to use MODE 20 */
r14976	r14977
2007	2007	state->m_has_addon_chip = HAS_NONE;
2008	2008
2009	2009	/* Find the number of blocks in this ROM */
2010		total_blocks = (machine.region("user3")->bytes() / 0x8000);
	2010	total_blocks = (state->memregion("user3")->bytes() / 0x8000);
2011	2011	read_blocks = 0;
2012	2012
2013	2013	/* Loading all the data blocks from cart, we only partially cover banks 0x00 to 0x7f. Therefore, we
r14976	r14977
2064	2064	UINT16 total_blocks, read_blocks;
2065	2065	UINT8  *rom;
2066	2066
2067		rom = machine.region("user3")->base();
	2067	rom = machine.root_device().memregion("user3")->base();
2068	2068	snes_ram = auto_alloc_array(machine, UINT8, 0x1400000);
2069	2069	memset(snes_ram, 0, 0x1400000);
2070	2070
r14976	r14977
2073	2073	state->m_has_addon_chip = HAS_NONE;
2074	2074
2075	2075	/* Find the number of blocks in this ROM */
2076		total_blocks = (machine.region("user3")->bytes() / 0x10000);
	2076	total_blocks = (state->memregion("user3")->bytes() / 0x10000);
2077	2077	read_blocks = 0;
2078	2078
2079	2079	/* See above for details about the way we fill banks 0x00 to 0x7f */

src/mame/machine/naomigd.c

r14976	r14977
394	394
395	395	UINT64 key;
396	396
397		const UINT8 *picdata = machine().region(pic_tag)->base();
	397	const UINT8 *picdata = memregion(pic_tag)->base();
398	398
399	399	if(picdata) {
400		if(machine().region(pic_tag)->bytes() >= 0x4000) {
	400	if(machine().root_device().memregion(pic_tag)->bytes() >= 0x4000) {
401	401	printf("Real PIC binary found\n");
402	402	for(int i=0;i<7;i++)
403	403	name[i] = picdata[0x7c0+i*2];

src/mame/machine/subsino.c

r14976	r14977
85	85	{
86	86	int i;
87	87	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
88		UINT8* region = machine.region("maincpu")->base();
	88	UINT8* region = machine.root_device().memregion("maincpu")->base();
89	89
90	90	for (i=0;i<0x10000;i++)
91	91	{

src/mame/machine/naomim4.c

r14976	r14977
45	45	{
46	46	naomi_board::device_start();
47	47
48		const UINT8 *key_data = machine().region(key_tag)->base();
	48	const UINT8 *key_data = memregion(key_tag)->base();
49	49	key = (key_data[2] << 8) | key_data[3];
50	50	iv = (key_data[0] << 8) | key_data[1];
51	51	buffer = auto_alloc_array(machine(), UINT8, BUFFER_SIZE);

src/mame/machine/gaelco2.c

r14976	r14977
22	22	int i;
23	23
24	24	/* get a pointer to the source data */
25		UINT8 *src = (UINT8 *)machine.region(src_reg)->base();
	25	UINT8 *src = (UINT8 *)machine.root_device().memregion(src_reg)->base();
26	26
27	27	/* get a pointer to the destination data */
28		UINT8 *dst = (UINT8 *)machine.region(dst_reg)->base();
	28	UINT8 *dst = (UINT8 *)machine.root_device().memregion(dst_reg)->base();
29	29
30	30	/* fill destination areas with the proper data */
31	31	for (i = 0; i < length/2; i++){

src/mame/machine/pgmprot6.c

r14976	r14977
86	86	static MACHINE_RESET( olds )
87	87	{
88	88	pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
89		UINT16 *mem16 = (UINT16 *)machine.region("user2")->base();
	89	UINT16 *mem16 = (UINT16 *)state->memregion("user2")->base();
90	90	int i;
91	91
92	92	MACHINE_RESET_CALL(pgm);

src/mame/machine/archimds.c

r14976	r14977
116	116	static TIMER_CALLBACK( vidc_video_tick )
117	117	{
118	118	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
119		static UINT8 *vram = machine.region("vram")->base();
	119	static UINT8 *vram = machine.root_device().memregion("vram")->base();
120	120	UINT32 size;
121	121
122	122	size = vidc_vidend-vidc_vidstart+0x10;
r14976	r14977
289	289	{
290	290	UINT32 *rom;
291	291
292		rom = (UINT32 *)space->machine().region("maincpu")->base();
	292	rom = (UINT32 *)space->machine().root_device().memregion("maincpu")->base();
293	293
294	294	return rom[offset & 0x1fffff];
295	295	}
r14976	r14977
355	355	{
356	356	UINT32 *rom;
357	357
358		rom = (UINT32 *)space->machine().region("maincpu")->base();
	358	rom = (UINT32 *)space->machine().root_device().memregion("maincpu")->base();
359	359
360	360	return rom[offset & 0x1fffff];
361	361	}
r14976	r14977
406	406	// if the boot ROM is mapped in, do some trickery to make it show up
407	407	if (memc_latchrom)
408	408	{
409		direct.explicit_configure(0x000000, 0x1fffff, 0x1fffff, *direct.space().machine().region("maincpu"));
	409	direct.explicit_configure(0x000000, 0x1fffff, 0x1fffff, *direct.space().machine().root_device().memregion("maincpu"));
410	410	}
411	411	else   // executing from logical memory
412	412	{

src/mame/machine/galaxold.c

r14976	r14977
154	154	if (data)
155	155	{
156	156	/* swap ROM 2 and 3! */
157		memory_set_bank(machine(), "bank1", 1);
158		memory_set_bank(machine(), "bank2", 0);
	157	membank("bank1")->set_entry(1);
	158	membank("bank2")->set_entry(0);
159	159	}
160	160	else
161	161	{
162		memory_set_bank(machine(), "bank1", 0);
163		memory_set_bank(machine(), "bank2", 1);
	162	membank("bank1")->set_entry(0);
	163	membank("bank2")->set_entry(1);
164	164	}
165	165	}
166	166
167	167	DRIVER_INIT( zigzag )
168	168	{
169		UINT8 *RAM = machine.region("maincpu")->base();
170		memory_configure_bank(machine, "bank1", 0, 2, &RAM[0x2000], 0x1000);
171		memory_configure_bank(machine, "bank2", 0, 2, &RAM[0x2000], 0x1000);
172		memory_set_bank(machine, "bank1", 0);
173		memory_set_bank(machine, "bank2", 1);
	169	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	170	machine.root_device().membank("bank1")->configure_entries(0, 2, &RAM[0x2000], 0x1000);
	171	machine.root_device().membank("bank2")->configure_entries(0, 2, &RAM[0x2000], 0x1000);
	172	machine.root_device().membank("bank1")->set_entry(0);
	173	machine.root_device().membank("bank2")->set_entry(1);
174	174	}
175	175
176	176
r14976	r14977
194	194	DRIVER_INIT( dingoe )
195	195	{
196	196	offs_t i;
197		UINT8 *rom = machine.region("maincpu")->base();
	197	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
198	198
199	199	for (i = 0; i < 0x3000; i++)
200	200	{
r14976	r14977
251	251	{
252	252	m__4in1_bank = data & 0x03;
253	253	galaxold_gfxbank_w(space, 0, m__4in1_bank);
254		memory_set_bank(machine(), "bank1", m__4in1_bank);
	254	membank("bank1")->set_entry(m__4in1_bank);
255	255	}
256	256
257	257	CUSTOM_INPUT_MEMBER(galaxold_state::_4in1_fake_port_r)
r14976	r14977
301	301
302	302	DRIVER_INIT( mooncrst )
303	303	{
304		offs_t i, len = machine.region("maincpu")->bytes();
305		UINT8 *rom = machine.region("maincpu")->base();
	304	offs_t i, len = machine.root_device().memregion("maincpu")->bytes();
	305	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
306	306
307	307
308	308	for (i = 0;i < len;i++)
r14976	r14977
320	320	{
321	321	offs_t i;
322	322	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
323		UINT8 *rom = machine.region("maincpu")->base();
	323	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
324	324	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
325	325
326	326	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
r14976	r14977
378	378	{ 1,4,1,4 }
379	379	};
380	380
381		offs_t i, len = machine.region("maincpu")->bytes();
382		UINT8 *rom = machine.region("maincpu")->base();
	381	offs_t i, len = machine.root_device().memregion("maincpu")->bytes();
	382	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
383	383
384	384
385	385	for (i = 0; i < len; i++)
r14976	r14977
399	399	{
400	400	galaxold_state *state = machine.driver_data<galaxold_state>();
401	401	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
402		offs_t i, len = machine.region("maincpu")->bytes();
403		UINT8 *RAM = machine.region("maincpu")->base();
	402	offs_t i, len = machine.root_device().memregion("maincpu")->bytes();
	403	UINT8 *RAM = state->memregion("maincpu")->base();
404	404
405	405	/* Decrypt Program Roms */
406	406	for (i = 0; i < len; i++)
407	407	RAM[i] = RAM[i] ^ (i & 0xff);
408	408
409	409	/* games are banked at 0x0000 - 0x3fff */
410		memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x10000], 0x4000);
	410	state->membank("bank1")->configure_entries(0, 4, &RAM[0x10000], 0x4000);
411	411
412	412	state->_4in1_bank_w(*space, 0, 0); /* set the initial CPU bank */
413	413

src/mame/machine/dec0.c

r14976	r14977
351	351	static void h6280_decrypt(running_machine &machine, const char *cputag)
352	352	{
353	353	int i;
354		UINT8 *RAM = machine.region(cputag)->base();
	354	UINT8 *RAM = machine.root_device().memregion(cputag)->base();
355	355
356	356	/* Read each byte, decrypt it */
357	357	for (i = 0x00000; i < 0x10000; i++)
r14976	r14977
360	360
361	361	DRIVER_INIT( hippodrm )
362	362	{
363		UINT8 *RAM = machine.region("sub")->base();
	363	UINT8 *RAM = machine.root_device().memregion("sub")->base();
364	364	dec0_state *state = machine.driver_data<dec0_state>();
365	365	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x180000, 0x180fff, read16_delegate(FUNC(dec0_state::hippodrm_68000_share_r),state), write16_delegate(FUNC(dec0_state::hippodrm_68000_share_w),state));
366	366	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xffc800, 0xffcfff, write16_delegate(FUNC(dec0_state::sprite_mirror_w),state));
r14976	r14977
376	376
377	377	DRIVER_INIT( slyspy )
378	378	{
379		UINT8 *RAM = machine.region("audiocpu")->base();
	379	UINT8 *RAM = machine.root_device().memregion("audiocpu")->base();
380	380
381	381	h6280_decrypt(machine, "audiocpu");
382	382

src/mame/machine/williams.c

r14976	r14977
368	368	{
369	369	williams_state *state = machine.driver_data<williams_state>();
370	370	/* configure the memory bank */
371		memory_configure_bank(machine, "bank1", 0, 1, state->m_videoram, 0);
372		memory_configure_bank(machine, "bank1", 1, 1, machine.region("maincpu")->base() + 0x10000, 0);
	371	state->membank("bank1")->configure_entry(0, state->m_videoram);
	372	state->membank("bank1")->configure_entry(1, state->memregion("maincpu")->base() + 0x10000);
373	373
374	374	state_save_register_global(machine, state->m_vram_bank);
375	375	}
r14976	r14977
466	466	{
467	467	williams_state *state = machine.driver_data<williams_state>();
468	468	/* configure memory banks */
469		memory_configure_bank(machine, "bank1", 0, 1, state->m_videoram, 0);
470		memory_configure_bank(machine, "bank1", 1, 4, machine.region("maincpu")->base() + 0x10000, 0x10000);
	469	state->membank("bank1")->configure_entry(0, state->m_videoram);
	470	state->membank("bank1")->configure_entries(1, 4, state->memregion("maincpu")->base() + 0x10000, 0x10000);
471	471
472	472	/* register for save states */
473	473	state_save_register_global(machine, state->m_vram_bank);
r14976	r14977
504	504	{
505	505	/* VRAM/ROM banking from bit 0 */
506	506	m_vram_bank = data & 0x01;
507		memory_set_bank(machine(), "bank1", m_vram_bank);
	507	membank("bank1")->set_entry(m_vram_bank);
508	508
509	509	/* cocktail flip from bit 1 */
510	510	m_cocktail = data & 0x02;
r14976	r14977
522	522	case 0:
523	523	space.install_read_bank(0x0000, 0x8fff, "bank1");
524	524	space.install_write_bank(0x8000, 0x87ff, "bank4");
525		memory_set_bank(machine(), "bank1", 0);
526		memory_set_bankptr(machine(), "bank4", &m_videoram[0x8000]);
	525	membank("bank1")->set_entry(0);
	526	membank("bank4")->set_base(&m_videoram[0x8000]);
527	527	break;
528	528
529	529	/* pages 1 and 2 are ROM */
r14976	r14977
531	531	case 2:
532	532	space.install_read_bank(0x0000, 0x8fff, "bank1");
533	533	space.install_write_bank(0x8000, 0x87ff, "bank4");
534		memory_set_bank(machine(), "bank1", 1 + ((m_vram_bank & 6) >> 1));
535		memory_set_bankptr(machine(), "bank4", &m_videoram[0x8000]);
	534	membank("bank1")->set_entry(1 + ((m_vram_bank & 6) >> 1));
	535	membank("bank4")->set_base(&m_videoram[0x8000]);
536	536	break;
537	537
538	538	/* page 3 accesses palette RAM; the remaining areas are as if page 1 ROM was selected */
539	539	case 3:
540	540	space.install_read_bank(0x8000, 0x87ff, "bank4");
541	541	space.install_write_handler(0x8000, 0x87ff, write8_delegate(FUNC(williams_state::williams2_paletteram_w),this));
542		memory_set_bank(machine(), "bank1", 1 + ((m_vram_bank & 4) >> 1));
543		memory_set_bankptr(machine(), "bank4", m_generic_paletteram_8);
	542	membank("bank1")->set_entry(1 + ((m_vram_bank & 4) >> 1));
	543	membank("bank4")->set_base(m_generic_paletteram_8);
544	544	break;
545	545	}
546	546	}
r14976	r14977
772	772	MACHINE_START_CALL(williams_common);
773	773
774	774	/* configure the banking and make sure it is reset to 0 */
775		memory_configure_bank(machine, "bank1", 0, 9, &machine.region("maincpu")->base()[0x10000], 0x1000);
	775	machine.root_device().membank("bank1")->configure_entries(0, 9, &machine.root_device().memregion("maincpu")->base()[0x10000], 0x1000);
776	776
777	777	machine.save().register_postload(save_prepost_delegate(FUNC(defender_postload), &machine));
778	778	}
r14976	r14977
819	819	case 9:
820	820	space.install_read_bank(0xc000, 0xcfff, "bank1");
821	821	space.unmap_write(0xc000, 0xcfff);
822		memory_set_bank(machine(), "bank1", m_vram_bank - 1);
	822	membank("bank1")->set_entry(m_vram_bank - 1);
823	823	break;
824	824
825	825	/* pages A-F are not connected */
r14976	r14977
878	878	MACHINE_START_CALL(williams_common);
879	879
880	880	/* banking is different for blaster */
881		memory_configure_bank(machine, "bank1", 0, 1, state->m_videoram, 0);
882		memory_configure_bank(machine, "bank1", 1, 16, machine.region("maincpu")->base() + 0x18000, 0x4000);
	881	state->membank("bank1")->configure_entry(0, state->m_videoram);
	882	state->membank("bank1")->configure_entries(1, 16, machine.root_device().memregion("maincpu")->base() + 0x18000, 0x4000);
883	883
884		memory_configure_bank(machine, "bank2", 0, 1, state->m_videoram + 0x4000, 0);
885		memory_configure_bank(machine, "bank2", 1, 16, machine.region("maincpu")->base() + 0x10000, 0x0000);
	884	state->membank("bank2")->configure_entry(0, state->m_videoram + 0x4000);
	885	state->membank("bank2")->configure_entries(1, 16, state->memregion("maincpu")->base() + 0x10000, 0x0000);
886	886
887	887	state_save_register_global(machine, state->m_blaster_bank);
888	888	}
r14976	r14977
897	897	INLINE void update_blaster_banking(running_machine &machine)
898	898	{
899	899	williams_state *state = machine.driver_data<williams_state>();
900		memory_set_bank(machine, "bank1", state->m_vram_bank * (state->m_blaster_bank + 1));
901		memory_set_bank(machine, "bank2", state->m_vram_bank * (state->m_blaster_bank + 1));
	900	state->membank("bank1")->set_entry(state->m_vram_bank * (state->m_blaster_bank + 1));
	901	state->membank("bank2")->set_entry(state->m_vram_bank * (state->m_blaster_bank + 1));
902	902	}
903	903
904	904

src/mame/machine/namcond1.c

r14976	r14977
27	27	{
28	28	namcond1_state *state = machine.driver_data<namcond1_state>();
29	29	#ifdef MAME_DEBUG
30		/*UINT8   *ROM = machine.region(REGION_CPU1)->base();*/
	30	/*UINT8   *ROM = state->memregion(REGION_CPU1)->base();*/
31	31	/*UINT32 debug_trigger_addr;*/
32	32	/*int             i;*/
33	33

src/mame/machine/r2crypt.c

r14976	r14977
220	220
221	221	void raiden2_decrypt_sprites(running_machine &machine)
222	222	{
223		UINT32 *data = (UINT32 *)machine.region("gfx3")->base();
	223	UINT32 *data = (UINT32 *)machine.root_device().memregion("gfx3")->base();
224	224	for(int i=0; i<0x800000/4; i++)
225	225	{
226	226	data[i] = core_decrypt(data[i],
r14976	r14977
240	240
241	241	void zeroteam_decrypt_sprites(running_machine &machine)
242	242	{
243		UINT32 *data = (UINT32 *)machine.region("gfx3")->base();
	243	UINT32 *data = (UINT32 *)machine.root_device().memregion("gfx3")->base();
244	244	for(int i=0; i<0x400000/4; i++)
245	245	{
246	246	data[i] = core_decrypt(data[i],

src/mame/machine/opwolf.c

r14976	r14977
420	420	if (offset == 0x14)
421	421	{
422	422	#if OPWOLF_READ_COINAGE_FROM_ROM
423		UINT16* rom = (UINT16*)machine().region("maincpu")->base();
	423	UINT16* rom = (UINT16*)machine().root_device().memregion("maincpu")->base();
424	424	UINT32 coin_table[2] = {0, 0};
425	425	UINT8 coin_offset[2];
426	426	int slot;

src/mame/machine/starwars.c

r14976	r14977
82	82	break;
83	83
84	84	case 4:      /* bank switch */
85		memory_set_bank(machine(), "bank1", (data >> 7) & 1);
	85	membank("bank1")->set_entry((data >> 7) & 1);
86	86	if (m_is_esb)
87		memory_set_bank(machine(), "bank2", (data >> 7) & 1);
	87	membank("bank2")->set_entry((data >> 7) & 1);
88	88	break;
89	89	case 5:      /* reset PRNG */
90	90	break;
r14976	r14977
153	153	void starwars_mproc_init(running_machine &machine)
154	154	{
155	155	starwars_state *state = machine.driver_data<starwars_state>();
156		UINT8 *src = machine.region("user2")->base();
	156	UINT8 *src = state->memregion("user2")->base();
157	157	int cnt, val;
158	158
159	159	state->m_PROM_STR = auto_alloc_array(machine, UINT8, 1024);

src/mame/machine/nb1413m3.c

r14976	r14977
298	298	popmessage("Sound ROM %02X:%05X [B1:%02X B2:%02X]", rombank, offset, nb1413m3_sndrombank1, nb1413m3_sndrombank2);
299	299	#endif
300	300
301		if (offset < space->machine().region(nb1413m3_sndromrgntag)->bytes())
302		return space->machine().region(nb1413m3_sndromrgntag)->base()[offset];
	301	if (offset < space->machine().root_device().memregion(nb1413m3_sndromrgntag)->bytes())
	302	return space->machine().root_device().memregion(nb1413m3_sndromrgntag)->base()[offset];
303	303	else
304	304	{
305	305	popmessage("read past sound ROM length (%05x[%02X])",offset, rombank);
r14976	r14977
322	322
323	323	READ8_HANDLER( nb1413m3_gfxrom_r )
324	324	{
325		UINT8 *GFXROM = space->machine().region("gfx1")->base();
	325	UINT8 *GFXROM = space->machine().root_device().memregion("gfx1")->base();
326	326
327	327	return GFXROM[(0x20000 * (nb1413m3_gfxrombank | ((nb1413m3_sndrombank1 & 0x02) << 3))) + ((0x0200 * nb1413m3_gfxradr_h) + (0x0002 * nb1413m3_gfxradr_l)) + (offset & 0x01)];
328	328	}

src/mame/machine/jumpshot.c

r14976	r14977
46	46
47	47	/* CPU ROMs */
48	48
49		RAM = machine.region("maincpu")->base();
	49	RAM = machine.root_device().memregion("maincpu")->base();
50	50	for (i = 0; i < 0x4000; i++)
51	51	{
52	52	RAM[i] = decrypt(i,RAM[i]);

src/mame/machine/wrally.c

r14976	r14977
33	33
34	34	WRITE16_MEMBER(wrally_state::OKIM6295_bankswitch_w)
35	35	{
36		UINT8 *RAM = machine().region("oki")->base();
	36	UINT8 *RAM = memregion("oki")->base();
37	37
38	38	if (ACCESSING_BITS_0_7){
39	39	memcpy(&RAM[0x30000], &RAM[0x40000 + (data & 0x0f)*0x10000], 0x10000);

src/mame/machine/ajax.c

r14976	r14977
48	48
49	49	/* bank # (ROMS N11 and N12) */
50	50	bank += (data & 0x07);
51		memory_set_bank(machine(), "bank2", bank);
	51	membank("bank2")->set_entry(bank);
52	52	}
53	53
54	54	/*  ajax_lamps_w:
r14976	r14977
191	191	m_firq_enable = data & 0x10;
192	192
193	193	/* bank # (ROMS G16 and I16) */
194		memory_set_bank(machine(), "bank1", data & 0x0f);
	194	membank("bank1")->set_entry(data & 0x0f);
195	195	}
196	196
197	197	MACHINE_START( ajax )
198	198	{
199	199	ajax_state *state = machine.driver_data<ajax_state>();
200		UINT8 *MAIN = machine.region("maincpu")->base();
201		UINT8 *SUB  = machine.region("sub")->base();
	200	UINT8 *MAIN = machine.root_device().memregion("maincpu")->base();
	201	UINT8 *SUB  = state->memregion("sub")->base();
202	202
203		memory_configure_bank(machine, "bank1", 0,  9,  &SUB[0x10000], 0x2000);
204		memory_configure_bank(machine, "bank2", 0, 12, &MAIN[0x10000], 0x2000);
	203	state->membank("bank1")->configure_entries(0,  9,  &SUB[0x10000], 0x2000);
	204	state->membank("bank2")->configure_entries(0, 12, &MAIN[0x10000], 0x2000);
205	205
206		memory_set_bank(machine, "bank1", 0);
207		memory_set_bank(machine, "bank2", 0);
	206	state->membank("bank1")->set_entry(0);
	207	state->membank("bank2")->set_entry(0);
208	208
209	209	state->m_maincpu = machine.device("maincpu");
210	210	state->m_audiocpu = machine.device("audiocpu");

src/mame/video/xevious.c

r14976	r14977
26	26	***************************************************************************/
27	27	PALETTE_INIT( xevious )
28	28	{
29		const UINT8 *color_prom = machine.region("proms")->base();
	29	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
30	30	int i;
31	31	#define TOTAL_COLORS(gfxn) (machine.gfx[gfxn]->total_colors * machine.gfx[gfxn]->color_granularity)
32	32
r14976	r14977
100	100
101	101	PALETTE_INIT( battles )
102	102	{
103		const UINT8 *color_prom = machine.region("proms")->base();
	103	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
104	104	int i;
105	105
106	106	machine.colortable = colortable_alloc(machine, 128+1);
r14976	r14977
320	320	{
321	321	xevious_state *state =  space->machine().driver_data<xevious_state>();
322	322
323		UINT8 *rom2a = space->machine().region("gfx4")->base();
	323	UINT8 *rom2a = state->memregion("gfx4")->base();
324	324	UINT8 *rom2b = rom2a+0x1000;
325	325	UINT8 *rom2c = rom2a+0x3000;
326	326	int adr_2b,adr_2c;

src/mame/video/deco_mlc.c

r14976	r14977
216	216	UINT32 *index_ptr=0;
217	217	int offs,fx=0,fy=0,x,y,color,colorOffset,sprite,indx,h,w,bx,by,fx1,fy1;
218	218	int xoffs,yoffs;
219		UINT8 *rom = machine.region("gfx2")->base() + 0x20000, *index_ptr8;
220		UINT8 *rawrom = machine.region("gfx2")->base();
	219	UINT8 *rom = machine.root_device().memregion("gfx2")->base() + 0x20000, *index_ptr8;
	220	UINT8 *rawrom = state->memregion("gfx2")->base();
221	221	int blockIsTilemapIndex=0;
222	222	int sprite2=0,indx2=0,use8bppMode=0;
223	223	int yscale,xscale;

src/mame/video/tunhunt.c

r14976	r14977
155	155	0020:   00 f0 f0 f0 b0 b0 00 f0
156	156	00 f0 f0 00 b0 00 f0 f0
157	157	*/
158		//const UINT8 *color_prom = machine.region( "proms" )->base();
	158	//const UINT8 *color_prom = machine.root_device().memregion( "proms" )->base();
159	159	tunhunt_state *state = machine.driver_data<tunhunt_state>();
160	160	int color;
161	161	int shade;

src/mame/video/tryout.c

r14976	r14977
11	11
12	12	PALETTE_INIT( tryout )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	int i;
16	16
17	17	for (i = 0;i < machine.total_colors();i++)

src/mame/video/rungun.c

r14976	r14977
89	89	assert(gfx_index != MAX_GFX_ELEMENTS);
90	90
91	91	// decode the ttl layer's gfx
92		machine.gfx[gfx_index] = gfx_element_alloc(machine, &charlayout, machine.region("gfx3")->base(), machine.total_colors() / 16, 0);
	92	machine.gfx[gfx_index] = gfx_element_alloc(machine, &charlayout, state->memregion("gfx3")->base(), machine.total_colors() / 16, 0);
93	93	state->m_ttl_gfx_index = gfx_index;
94	94
95	95	// create the tilemap

src/mame/video/skyfox.c

r14976	r14977
89	89
90	90	PALETTE_INIT( skyfox )
91	91	{
92		const UINT8 *color_prom = machine.region("proms")->base();
	92	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
93	93	int i;
94	94
95	95	for (i = 0; i < 256; i++)
r14976	r14977
240	240	static void draw_background(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
241	241	{
242	242	skyfox_state *state = machine.driver_data<skyfox_state>();
243		UINT8 *RAM = machine.region("gfx2")->base();
	243	UINT8 *RAM = state->memregion("gfx2")->base();
244	244	int x, y, i;
245	245
246	246	/* The foreground stars (sprites) move at twice this speed when

src/mame/video/bublbobl.c

r14976	r14977
32	32
33	33	sx = 0;
34	34
35		prom = screen.machine().region("proms")->base();
	35	prom = state->memregion("proms")->base();
36	36	for (offs = 0; offs < state->m_objectram.bytes(); offs += 4)
37	37	{
38	38	/* skip empty sprites */

src/mame/video/aerofgt.c

r14976	r14977
139	139	/* sprite maps are hardcoded in this game */
140	140
141	141	/* enemy sprites use ROM instead of RAM */
142		state->m_spriteram2.set_target(reinterpret_cast<UINT16 *>(machine.region("gfx5")->base()), 0x20000);
	142	state->m_spriteram2.set_target(reinterpret_cast<UINT16 *>(state->memregion("gfx5")->base()), 0x20000);
143	143
144	144	/* front sprites are direct maps */
145	145	state->m_spriteram1.set_target(state->m_spriteram2 + state->m_spriteram2.bytes() / 2, 0x4000);
r14976	r14977
682	682	aerofgt_state *state = machine.driver_data<aerofgt_state>();
683	683	int i;
684	684	UINT8 *lookup;
685		lookup = machine.region("user1")->base();
	685	lookup = state->memregion("user1")->base();
686	686	state->m_spritepalettebank = 1;
687	687
688	688	for (i = state->m_spriteram3.bytes() / 2 - 4; i >= 4; i -= 4)

src/mame/video/rocnrope.c

r14976	r14977
31	31
32	32	PALETTE_INIT( rocnrope )
33	33	{
34		const UINT8 *color_prom = machine.region("proms")->base();
	34	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
35	35	static const int resistances_rg[3] = { 1000, 470, 220 };
36	36	static const int resistances_b [2] = { 470, 220 };
37	37	double rweights[3], gweights[3], bweights[2];

src/mame/video/docastle.c

r14976	r14977
31	31
32	32	PALETTE_INIT( docastle )
33	33	{
34		const UINT8 *color_prom = machine.region("proms")->base();
	34	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
35	35	int i;
36	36
37	37	for (i = 0; i < 256; i++)

src/mame/video/mainsnk.c

r14976	r14977
4	4
5	5	PALETTE_INIT( mainsnk )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9	int num_colors = 0x400;
10	10

src/mame/video/mystston.c

r14976	r14977
75	75	static const int resistances_b [2] = { 3300, 1500 };
76	76	double weights_rg[3], weights_b[2];
77	77
78		UINT8 *color_prom = machine.region("proms")->base();
	78	UINT8 *color_prom = machine.root_device().memregion("proms")->base();
79	79
80	80	compute_resistor_weights(0,   255, -1.0,
81	81	3, resistances_rg, weights_rg, 0, 4700,

src/mame/video/yiear.c

r14976	r14977
30	30
31	31	PALETTE_INIT( yiear )
32	32	{
33		const UINT8 *color_prom = machine.region("proms")->base();
	33	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
34	34	int i;
35	35
36	36	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/nbmj9195.c

r14976	r14977
72	72	{
73	73	nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
74	74	int ret;
75		UINT8 *GFXROM = space->machine().region("gfx1")->base();
	75	UINT8 *GFXROM = state->memregion("gfx1")->base();
76	76
77	77	switch (offset)
78	78	{
r14976	r14977
209	209	static void nbmj9195_gfxdraw(running_machine &machine, int vram)
210	210	{
211	211	nbmj9195_state *state = machine.driver_data<nbmj9195_state>();
212		UINT8 *GFX = machine.region("gfx1")->base();
	212	UINT8 *GFX = state->memregion("gfx1")->base();
213	213	int width = machine.primary_screen->width();
214	214
215	215	int x, y;
r14976	r14977
256	256	skipy = -1;
257	257	}
258	258
259		gfxlen = machine.region("gfx1")->bytes();
	259	gfxlen = machine.root_device().memregion("gfx1")->bytes();
260	260	gfxaddr = ((state->m_blitter_src_addr[vram] + 2) & 0x00ffffff);
261	261
262	262	for (y = starty, ctry = sizey; ctry >= 0; y += skipy, ctry--)

src/mame/video/sonson.c

r14976	r14977
41	41
42	42	PALETTE_INIT( sonson )
43	43	{
44		const UINT8 *color_prom = machine.region("proms")->base();
	44	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
45	45	int i;
46	46
47	47	/* allocate the colortable */

src/mame/video/hcastle.c

r14976	r14977
11	11
12	12	PALETTE_INIT( hcastle )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	int chip;
16	16
17	17	/* allocate the colortable */

src/mame/video/deadang.c

r14976	r14977
39	39
40	40	static TILE_GET_INFO( get_pf3_tile_info )
41	41	{
42		const UINT16 *bgMap = (const UINT16 *)machine.region("gfx6")->base();
	42	const UINT16 *bgMap = (const UINT16 *)machine.root_device().memregion("gfx6")->base();
43	43	int code= bgMap[tile_index];
44	44	SET_TILE_INFO(4,code&0x7ff,code>>12,0);
45	45	}
46	46
47	47	static TILE_GET_INFO( get_pf2_tile_info )
48	48	{
49		const UINT16 *bgMap = (const UINT16 *)machine.region("gfx7")->base();
	49	const UINT16 *bgMap = (const UINT16 *)machine.root_device().memregion("gfx7")->base();
50	50	int code= bgMap[tile_index];
51	51	SET_TILE_INFO(3,code&0x7ff,code>>12,0);
52	52	}

src/mame/video/artmagic.c

r14976	r14977
41	41	VIDEO_START( artmagic )
42	42	{
43	43	artmagic_state *state = machine.driver_data<artmagic_state>();
44		state->m_blitter_base = (UINT16 *)machine.region("gfx1")->base();
45		state->m_blitter_mask = machine.region("gfx1")->bytes()/2 - 1;
	44	state->m_blitter_base = (UINT16 *)machine.root_device().memregion("gfx1")->base();
	45	state->m_blitter_mask = state->memregion("gfx1")->bytes()/2 - 1;
46	46
47	47	state_save_register_global_array(machine, state->m_xor);
48	48	state_save_register_global(machine, state->m_is_stoneball);

src/mame/video/hexion.c

r14976	r14977
50	50	state->m_bg_tilemap[1]->set_scrollx(0,-4);
51	51	state->m_bg_tilemap[1]->set_scrolly(0,4);
52	52
53		state->m_vram[0] = machine.region("maincpu")->base() + 0x30000;
	53	state->m_vram[0] = state->memregion("maincpu")->base() + 0x30000;
54	54	state->m_vram[1] = state->m_vram[0] + 0x2000;
55	55	state->m_unkram = state->m_vram[1] + 0x2000;
56	56	}
r14976	r14977
65	65
66	66	WRITE8_MEMBER(hexion_state::hexion_bankswitch_w)
67	67	{
68		UINT8 *rom = machine().region("maincpu")->base() + 0x10000;
	68	UINT8 *rom = memregion("maincpu")->base() + 0x10000;
69	69
70	70	/* bits 0-3 select ROM bank */
71		memory_set_bankptr(machine(), "bank1",rom + 0x2000 * (data & 0x0f));
	71	membank("bank1")->set_base(rom + 0x2000 * (data & 0x0f));
72	72
73	73	/* does bit 6 trigger the 052591? */
74	74	if (data & 0x40)
r14976	r14977
91	91	{
92	92	if (m_gfxrom_select && offset < 0x1000)
93	93	{
94		return machine().region("gfx1")->base()[((m_gfxrom_select & 0x7f) << 12) + offset];
	94	return memregion("gfx1")->base()[((m_gfxrom_select & 0x7f) << 12) + offset];
95	95	}
96	96	else if (m_bankctrl == 0)
97	97	{

src/mame/video/bking.c

r14976	r14977
30	30
31	31	PALETTE_INIT( bking )
32	32	{
33		const UINT8 *color_prom = machine.region("proms")->base();
	33	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
34	34	static const int resistances_rg[3] = { 220, 390, 820 };
35	35	static const int resistances_b [2] = { 220, 390 };
36	36	double rweights[3], gweights[3], bweights[2];
r14976	r14977
315	315
316	316	if (latch != 0)
317	317	{
318		const UINT8* MASK = screen.machine().region("user1")->base() + 8 * state->m_hit;
	318	const UINT8* MASK = screen.machine().root_device().memregion("user1")->base() + 8 * state->m_hit;
319	319
320	320	int x;
321	321	int y;

src/mame/video/arabian.c

r14976	r14977
154	154	VIDEO_START( arabian )
155	155	{
156	156	arabian_state *state = machine.driver_data<arabian_state>();
157		UINT8 *gfxbase = machine.region("gfx1")->base();
	157	UINT8 *gfxbase = state->memregion("gfx1")->base();
158	158	int offs;
159	159
160	160	/* allocate a common bitmap to use for both planes */

src/mame/video/labyrunr.c

r14976	r14977
4	4
5	5	PALETTE_INIT( labyrunr )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int pal;
9	9
10	10	/* allocate the colortable */

src/mame/video/thief.c

r14976	r14977
161	161	WRITE8_MEMBER(thief_state::thief_blit_w){
162	162	coprocessor_t &thief_coprocessor = m_coprocessor;
163	163	int i, offs, xoffset, dy;
164		UINT8 *gfx_rom = machine().region( "gfx1" )->base();
	164	UINT8 *gfx_rom = memregion( "gfx1" )->base();
165	165	UINT8 x = thief_coprocessor.param[SCREEN_XPOS];
166	166	UINT8 y = thief_coprocessor.param[SCREEN_YPOS];
167	167	UINT8 width = thief_coprocessor.param[BLIT_WIDTH];
r14976	r14977
239	239	return thief_coprocessor.image_ram[addr];
240	240	}
241	241	else {
242		UINT8 *gfx_rom = machine().region( "gfx1" )->base();
	242	UINT8 *gfx_rom = memregion( "gfx1" )->base();
243	243	addr -= 0x2000;
244	244	if( addr<0x6000 ) return gfx_rom[addr];
245	245	}

src/mame/video/ccastles.c

r14976	r14977
21	21	static const int resistances[3] = { 22000, 10000, 4700 };
22	22
23	23	/* get pointers to our PROMs */
24		state->m_syncprom = machine.region("proms")->base() + 0x000;
25		state->m_wpprom = machine.region("proms")->base() + 0x200;
26		state->m_priprom = machine.region("proms")->base() + 0x300;
	24	state->m_syncprom = machine.root_device().memregion("proms")->base() + 0x000;
	25	state->m_wpprom = machine.root_device().memregion("proms")->base() + 0x200;
	26	state->m_priprom = machine.root_device().memregion("proms")->base() + 0x300;
27	27
28	28	/* compute the color output resistor weights at startup */
29	29	compute_resistor_weights(0,   255, -1.0,

src/mame/video/ambush.c

r14976	r14977
20	20
21	21	PALETTE_INIT( ambush )
22	22	{
23		const UINT8 *color_prom = machine.region("proms")->base();
	23	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
24	24	int i;
25	25
26	26	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/policetr.c

r14976	r14977
26	26	{
27	27	policetr_state *state = machine.driver_data<policetr_state>();
28	28	/* the source bitmap is in ROM */
29		state->m_srcbitmap = machine.region("gfx1")->base();
	29	state->m_srcbitmap = machine.root_device().memregion("gfx1")->base();
30	30
31	31	/* compute the height */
32		state->m_srcbitmap_height_mask = (machine.region("gfx1")->bytes() / SRCBITMAP_WIDTH) - 1;
	32	state->m_srcbitmap_height_mask = (state->memregion("gfx1")->bytes() / SRCBITMAP_WIDTH) - 1;
33	33
34	34	/* the destination bitmap is not directly accessible to the CPU */
35	35	state->m_dstbitmap = auto_alloc_array(machine, UINT8, DSTBITMAP_WIDTH * DSTBITMAP_HEIGHT);

src/mame/video/seibuspi.c

r14976	r14977
508	508	for (i = 6000; i < 6016; i++) { state->m_alpha_table[i] = 1; }
509	509	for (i = 6128; i < 6144; i++) { state->m_alpha_table[i] = 1; }
510	510
511		region_length = machine.region("gfx2")->bytes();
	511	region_length = machine.root_device().memregion("gfx2")->bytes();
512	512
513	513	if (region_length <= 0x300000)
514	514	{

src/mame/video/gaplus.c

r14976	r14977
25	25
26	26	PALETTE_INIT( gaplus )
27	27	{
28		const UINT8 *color_prom = machine.region("proms")->base();
	28	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
29	29	int i;
30	30
31	31	/* allocate the colortable */

src/mame/video/drmicro.c

r14976	r14977
60	60
61	61	PALETTE_INIT( drmicro )
62	62	{
63		const UINT8 *color_prom = machine.region("proms")->base();
	63	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
64	64	int i;
65	65
66	66	/* allocate the colortable */

src/mame/video/carpolo.c

r14976	r14977
66	66
67	67	PALETTE_INIT( carpolo )
68	68	{
69		const UINT8 *color_prom = machine.region("proms")->base();
	69	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
70	70	int i;
71	71
72	72	/* thanks to Jarek Burczynski for analyzing the circuit */
r14976	r14977
190	190
191	191	static void remap_sprite_code(running_machine &machine, int bank, int code, int *remapped_code, int *flipy)
192	192	{
193		UINT8* PROM = machine.region("user1")->base();
	193	UINT8* PROM = machine.root_device().memregion("user1")->base();
194	194
195	195	code = (bank << 4) | code;
196	196	*remapped_code = PROM[code] & 0x0f;

src/mame/video/speedatk.c

r14976	r14977
10	10
11	11	PALETTE_INIT( speedatk )
12	12	{
13		const UINT8 *color_prom = machine.region("proms")->base();
	13	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
14	14	int i;
15	15
16	16	/* allocate the colortable */

src/mame/video/system1.c

r14976	r14977
291	291
292	292	WRITE8_MEMBER(system1_state::system1_paletteram_w)
293	293	{
294		const UINT8 *color_prom = machine().region("palette")->base();
	294	const UINT8 *color_prom = memregion("palette")->base();
295	295	int val,r,g,b;
296	296
297	297	/*
r14976	r14977
363	363	static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int xoffset)
364	364	{
365	365	system1_state *state = machine.driver_data<system1_state>();
366		UINT32 gfxbanks = machine.region("sprites")->bytes() / 0x8000;
367		const UINT8 *gfxbase = machine.region("sprites")->base();
	366	UINT32 gfxbanks = machine.root_device().memregion("sprites")->bytes() / 0x8000;
	367	const UINT8 *gfxbase = state->memregion("sprites")->base();
368	368	UINT8 *spriteram = state->m_spriteram;
369	369	int flipscreen = state->flip_screen();
370	370	int spritenum;
r14976	r14977
493	493	static void video_update_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind16 &fgpixmap, bitmap_ind16 **bgpixmaps, const int *bgrowscroll, int bgyscroll, int spritexoffs)
494	494	{
495	495	system1_state *state = screen.machine().driver_data<system1_state>();
496		const UINT8 *lookup = screen.machine().region("proms")->base();
	496	const UINT8 *lookup = state->memregion("proms")->base();
497	497	int x, y;
498	498
499	499	/* first clear the sprite bitmap and draw sprites within this area */

src/mame/video/stvvdp2.c

r14976	r14977
6839	6839	fp=fopen("68k.dmp", "w+b");
6840	6840	if (fp)
6841	6841	{
6842		fwrite(machine.region(REGION_CPU3)->base(), 0x100000, 1, fp);
	6842	fwrite(machine.root_device().memregion(REGION_CPU3)->base(), 0x100000, 1, fp);
6843	6843	fclose(fp);
6844	6844	}
6845	6845	}

src/mame/video/niyanpai.c

r14976	r14977
66	66	{
67	67	niyanpai_state *state = machine.driver_data<niyanpai_state>();
68	68	int ret;
69		UINT8 *GFXROM = machine.region("gfx1")->base();
	69	UINT8 *GFXROM = state->memregion("gfx1")->base();
70	70
71	71	switch (offset)
72	72	{
r14976	r14977
180	180	static void niyanpai_gfxdraw(running_machine &machine, int vram)
181	181	{
182	182	niyanpai_state *state = machine.driver_data<niyanpai_state>();
183		UINT8 *GFX = machine.region("gfx1")->base();
	183	UINT8 *GFX = state->memregion("gfx1")->base();
184	184	int width = machine.primary_screen->width();
185	185
186	186	int x, y;
r14976	r14977
227	227	skipy = -1;
228	228	}
229	229
230		gfxlen = machine.region("gfx1")->bytes();
	230	gfxlen = machine.root_device().memregion("gfx1")->bytes();
231	231	gfxaddr = ((state->m_blitter_src_addr[vram] + 2) & 0x00ffffff);
232	232
233	233	for (y = starty, ctry = sizey; ctry >= 0; y += skipy, ctry--)

src/mame/video/exedexes.c

r14976	r14977
10	10	#include "includes/exedexes.h"
11	11
12	12
13		#define TileMap(offs) (machine.region("gfx5")->base()[offs])
14		#define BackTileMap(offs) (machine.region("gfx5")->base()[offs+0x4000])
	13	#define TileMap(offs) (machine.root_device().memregion("gfx5")->base()[offs])
	14	#define BackTileMap(offs) (machine.root_device().memregion("gfx5")->base()[offs+0x4000])
15	15
16	16
17	17	/***************************************************************************
r14976	r14977
33	33
34	34	PALETTE_INIT( exedexes )
35	35	{
36		const UINT8 *color_prom = machine.region("proms")->base();
	36	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
37	37	int i;
38	38
39	39	/* allocate the colortable */
r14976	r14977
129	129
130	130	static TILE_GET_INFO( get_bg_tile_info )
131	131	{
132		UINT8 *tilerom = machine.region("gfx5")->base();
	132	UINT8 *tilerom = machine.root_device().memregion("gfx5")->base();
133	133
134	134	int attr = tilerom[tile_index];
135	135	int code = attr & 0x3f;
r14976	r14977
141	141
142	142	static TILE_GET_INFO( get_fg_tile_info )
143	143	{
144		int code = machine.region("gfx5")->base()[tile_index];
	144	int code = machine.root_device().memregion("gfx5")->base()[tile_index];
145	145
146	146	SET_TILE_INFO(2, code, 0, 0);
147	147	}

src/mame/video/jedi.c

r14976	r14977
135	135	int y;
136	136	int background_line_buffer[0x200];   /* RAM chip at 2A */
137	137
138		UINT8 *tx_gfx = machine.region("gfx1")->base();
139		UINT8 *bg_gfx = machine.region("gfx2")->base();
140		UINT8 *prom1 = &machine.region("proms")->base()[0x0000 | ((*state->m_smoothing_table & 0x03) << 8)];
141		UINT8 *prom2 = &machine.region("proms")->base()[0x0800 | ((*state->m_smoothing_table & 0x03) << 8)];
	138	UINT8 *tx_gfx = machine.root_device().memregion("gfx1")->base();
	139	UINT8 *bg_gfx = machine.root_device().memregion("gfx2")->base();
	140	UINT8 *prom1 = &machine.root_device().memregion("proms")->base()[0x0000 | ((*state->m_smoothing_table & 0x03) << 8)];
	141	UINT8 *prom2 = &machine.root_device().memregion("proms")->base()[0x0800 | ((*state->m_smoothing_table & 0x03) << 8)];
142	142	int vscroll = state->m_vscroll;
143	143	int hscroll = state->m_hscroll;
144	144	int tx_bank = *state->m_foreground_bank;
r14976	r14977
234	234	{
235	235	offs_t offs;
236	236	UINT8 *spriteram = state->m_spriteram;
237		UINT8 *gfx3 = machine.region("gfx3")->base();
	237	UINT8 *gfx3 = machine.root_device().memregion("gfx3")->base();
238	238
239	239	for (offs = 0x00; offs < 0x30; offs++)
240	240	{

src/mame/video/suprnova.c

r14976	r14977
626	626	state->m_sprite_bitmap.fill(0x0000, cliprect);
627	627
628	628	if (state->m_alt_enable_sprites)
629		state->m_spritegen->skns_draw_sprites(screen.machine(), state->m_sprite_bitmap, cliprect, state->m_spriteram, state->m_spriteram.bytes(), screen.machine().region("gfx1")->base(), screen.machine().region ("gfx1")->bytes(), state->m_spc_regs );
	629	state->m_spritegen->skns_draw_sprites(screen.machine(), state->m_sprite_bitmap, cliprect, state->m_spriteram, state->m_spriteram.bytes(), screen.machine().root_device().memregion("gfx1")->base(), screen.machine().root_device().memregion ("gfx1")->bytes(), state->m_spc_regs );
630	630
631	631
632	632	return 0;

src/mame/video/namcofl.c

r14976	r14977
119	119
120	120	VIDEO_START( namcofl )
121	121	{
122		namco_tilemap_init( machine, NAMCOFL_TILEGFX, machine.region(NAMCOFL_TILEMASKREGION)->base(), TilemapCB );
	122	namco_tilemap_init( machine, NAMCOFL_TILEGFX, machine.root_device().memregion(NAMCOFL_TILEMASKREGION)->base(), TilemapCB );
123	123	namco_obj_init(machine,NAMCOFL_SPRITEGFX,0x0,FLobjcode2tile);
124	124	namco_roz_init(machine,NAMCOFL_ROTGFX,NAMCOFL_ROTMASKREGION);
125	125	}

src/mame/video/dynax.c

r14976	r14977
28	28	/* 0 B01234 G01234 R01234 */
29	29	PALETTE_INIT( sprtmtch )
30	30	{
31		const UINT8 *color_prom = machine.region("proms")->base();
	31	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
32	32	int i;
33	33
34	34	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
356	356	{
357	357	dynax_state *state = machine.driver_data<dynax_state>();
358	358	UINT8 cmd;
359		UINT8 *ROM = machine.region(gfx)->base();
360		size_t ROM_size = machine.region(gfx)->bytes();
	359	UINT8 *ROM = machine.root_device().memregion(gfx)->base();
	360	size_t ROM_size = state->memregion(gfx)->bytes();
361	361
362	362	int sx;
363	363
r14976	r14977
1204	1204	if (toggle)
1205	1205	{
1206	1206	dynax_state *state = machine.driver_data<dynax_state>();
1207		UINT8 *RAM = machine.region( "gfx1" )->base();
1208		size_t size = machine.region( "gfx1" )->bytes();
	1207	UINT8 *RAM = machine.root_device().memregion( "gfx1" )->base();
	1208	size_t size = state->memregion( "gfx1" )->bytes();
1209	1209	static int i = 0, c = 0, r = 0;
1210	1210
1211	1211	if (machine.input().code_pressed_once(KEYCODE_I))   c = (c - 1) & 0x1f;

src/mame/video/shootout.c

r14976	r14977
9	9
10	10	PALETTE_INIT( shootout )
11	11	{
12		const UINT8 *color_prom = machine.region("proms")->base();
	12	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
13	13	int i;
14	14
15	15

src/mame/video/contra.c

r14976	r14977
22	22
23	23	PALETTE_INIT( contra )
24	24	{
25		const UINT8 *color_prom = machine.region("proms")->base();
	25	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
26	26	int chip;
27	27
28	28	/* allocate the colortable */

src/mame/video/dribling.c

r14976	r14977
17	17
18	18	PALETTE_INIT( dribling )
19	19	{
20		const UINT8 *prom = machine.region("proms")->base() + 0x400;
	20	const UINT8 *prom = machine.root_device().memregion("proms")->base() + 0x400;
21	21	int i;
22	22
23	23	for (i = 0; i < 256; i++)
r14976	r14977
60	60	SCREEN_UPDATE_IND16( dribling )
61	61	{
62	62	dribling_state *state = screen.machine().driver_data<dribling_state>();
63		UINT8 *prombase = screen.machine().region("proms")->base();
64		UINT8 *gfxbase = screen.machine().region("gfx1")->base();
	63	UINT8 *prombase = screen.machine().root_device().memregion("proms")->base();
	64	UINT8 *gfxbase = state->memregion("gfx1")->base();
65	65	int x, y;
66	66
67	67	/* loop over rows */

src/mame/video/balsente.c

r14976	r14977
22	22
23	23	/* reset the system */
24	24	state->m_palettebank_vis = 0;
25		state->m_sprite_bank[0] = machine.region("gfx1")->base();
26		state->m_sprite_bank[1] = machine.region("gfx1")->base() + 0x10000;
	25	state->m_sprite_bank[0] = machine.root_device().memregion("gfx1")->base();
	26	state->m_sprite_bank[1] = machine.root_device().memregion("gfx1")->base() + 0x10000;
27	27
28	28	/* determine sprite size */
29		state->m_sprite_data = machine.region("gfx1")->base();
30		state->m_sprite_mask = machine.region("gfx1")->bytes() - 1;
	29	state->m_sprite_data = machine.root_device().memregion("gfx1")->base();
	30	state->m_sprite_mask = state->memregion("gfx1")->bytes() - 1;
31	31
32	32	/* register for saving */
33	33	state->save_item(NAME(state->m_expanded_videoram));

src/mame/video/itech32.c

r14976	r14977
184	184	state->m_videoplane[0][i] = state->m_videoplane[1][i] = 0xff;
185	185
186	186	/* fetch the GROM base */
187		state->m_grom_base = machine.region("gfx1")->base();
188		state->m_grom_size = machine.region("gfx1")->bytes();
	187	state->m_grom_base = machine.root_device().memregion("gfx1")->base();
	188	state->m_grom_size = state->memregion("gfx1")->bytes();
189	189	state->m_grom_bank = 0;
190	190	state->m_grom_bank_mask = state->m_grom_size >> 24;
191	191	if (state->m_grom_bank_mask == 2)

src/mame/video/mexico86.c

r14976	r14977
8	8	if ((data & 7) > 5)
9	9	popmessage("Switching to invalid bank!");
10	10
11		memory_set_bank(machine(), "bank1", data & 0x07);
	11	membank("bank1")->set_entry(data & 0x07);
12	12
13	13	m_charbank = BIT(data, 5);
14	14	}

src/mame/video/chaknpop.c

r14976	r14977
24	24
25	25	PALETTE_INIT( chaknpop )
26	26	{
27		const UINT8 *color_prom = machine.region("proms")->base();
	27	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
28	28	int i;
29	29
30	30	for (i = 0; i < 1024; i++)
r14976	r14977
81	81	int all_dirty = 0;
82	82
83	83	m_gfxmode = data;
84		memory_set_bank(machine(), "bank1", (m_gfxmode & GFX_VRAM_BANK) ? 1 : 0);   /* Select 2 banks of 16k */
	84	membank("bank1")->set_entry((m_gfxmode & GFX_VRAM_BANK) ? 1 : 0);   /* Select 2 banks of 16k */
85	85
86	86	if (m_flip_x != (m_gfxmode & GFX_FLIP_X))
87	87	{
r14976	r14977
154	154	VIDEO_START( chaknpop )
155	155	{
156	156	chaknpop_state *state = machine.driver_data<chaknpop_state>();
157		UINT8 *RAM = machine.region("maincpu")->base();
	157	UINT8 *RAM = state->memregion("maincpu")->base();
158	158
159	159	/*                          info                       offset             type             w   h  col row */
160	160	state->m_tx_tilemap = tilemap_create(machine, chaknpop_get_tx_tile_info, tilemap_scan_rows,   8,  8, 32, 32);
r14976	r14977
169	169	state->save_pointer(NAME(state->m_vram3), 0x2000);
170	170	state->save_pointer(NAME(state->m_vram4), 0x2000);
171	171
172		memory_set_bank(machine, "bank1", 0);
	172	state->membank("bank1")->set_entry(0);
173	173	tx_tilemap_mark_all_dirty(machine);
174	174
175	175	machine.save().register_postload(save_prepost_delegate(FUNC(tx_tilemap_mark_all_dirty), &machine));

src/mame/video/sspeedr.c

r14976	r14977
83	83	static void draw_track(running_machine &machine, bitmap_ind16 &bitmap)
84	84	{
85	85	sspeedr_state *state = machine.driver_data<sspeedr_state>();
86		const UINT8* p = machine.region("gfx3")->base();
	86	const UINT8* p = state->memregion("gfx3")->base();
87	87
88	88	int x;
89	89	int y;

src/mame/video/terracre.c

r14976	r14977
34	34	static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
35	35	{
36	36	terracre_state *state = machine.driver_data<terracre_state>();
37		const UINT8 *spritepalettebank = machine.region("user1")->base();
	37	const UINT8 *spritepalettebank = state->memregion("user1")->base();
38	38	const gfx_element *pGfx = machine.gfx[2];
39	39	const UINT16 *pSource = state->m_spriteram;
40	40	int i;
r14976	r14977
95	95
96	96	PALETTE_INIT( amazon )
97	97	{
98		const UINT8 *color_prom = machine.region("proms")->base();
	98	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
99	99	int i;
100	100
101	101	/* allocate the colortable */

src/mame/video/ddribble.c

r14976	r14977
12	12
13	13	PALETTE_INIT( ddribble )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	/* allocate the colortable */

src/mame/video/mouser.c

r14976	r14977
18	18
19	19	PALETTE_INIT( mouser )
20	20	{
21		const UINT8 *color_prom = machine.region("proms")->base();
	21	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
22	22	int i;
23	23
24	24	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/undrfire.c

r14976	r14977
68	68	{
69	69	undrfire_state *state = machine.driver_data<undrfire_state>();
70	70	UINT32 *spriteram32 = state->m_spriteram;
71		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	71	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
72	72	int offs, data, tilenum, color, flipx, flipy;
73	73	int x, y, priority, dblsize, curx, cury;
74	74	int sprites_flipscreen = 0;
r14976	r14977
212	212	{
213	213	undrfire_state *state = machine.driver_data<undrfire_state>();
214	214	UINT32 *spriteram32 = state->m_spriteram;
215		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
216		UINT8 *spritemapHibit = (UINT8 *)machine.region("user2")->base();
	215	UINT16 *spritemap = (UINT16 *)machine.root_device().memregion("user1")->base();
	216	UINT8 *spritemapHibit = (UINT8 *)state->memregion("user2")->base();
217	217
218	218	int offs, data, tilenum, color, flipx, flipy;
219	219	int x, y, priority, dblsize, curx, cury;

src/mame/video/vertigo.c

r14976	r14977
159	159	int i;
160	160	UINT64 *mcode;
161	161
162		state->m_vectorrom = (UINT16 *)machine.region("user1")->base();
163		mcode = (UINT64 *)machine.region("proms")->base();
	162	state->m_vectorrom = (UINT16 *)machine.root_device().memregion("user1")->base();
	163	mcode = (UINT64 *)state->memregion("proms")->base();
164	164
165	165	/* Decode microcode */
166	166	for (i = 0; i < MC_LENGTH; i++)

src/mame/video/argus.c

r14976	r14977
369	369	int voffs;
370	370	int offs;
371	371
372		UINT8 *VROM1 = machine.region("user1")->base();      /* "ag_15.bin" */
373		UINT8 *VROM2 = machine.region("user2")->base();      /* "ag_16.bin" */
	372	UINT8 *VROM1 = machine.root_device().memregion("user1")->base();      /* "ag_15.bin" */
	373	UINT8 *VROM2 = state->memregion("user2")->base();      /* "ag_16.bin" */
374	374
375	375	/* offset in pattern data */
376	376	offs = VROM1[vromoffs] | (VROM1[vromoffs + 1] << 8);

src/mame/video/grchamp.c

r14976	r14977
14	14
15	15	PALETTE_INIT( grchamp )
16	16	{
17		const UINT8 *color_prom = machine.region("proms")->base();
	17	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
18	18	static const int resistances[3] = { 100, 270, 470 };
19	19	double rweights[3], gweights[3], bweights[2];
20	20	grchamp_state *state = machine.driver_data<grchamp_state>();
r14976	r14977
245	245
246	246
247	247	*/
248		const UINT8 *prom = machine.region("proms")->base() + 0x20;
	248	const UINT8 *prom = machine.root_device().memregion("proms")->base() + 0x20;
249	249	const gfx_element *gfx;
250	250	int change = (state->m_cpu0_out[0] & 0x20) << 3;
251	251	int num;
r14976	r14977
364	364	};
365	365
366	366	grchamp_state *state = screen.machine().driver_data<grchamp_state>();
367		const UINT8 *amedata = screen.machine().region("gfx5")->base();
368		const UINT8 *headdata = screen.machine().region("gfx6")->base();
369		const UINT8 *pldata = screen.machine().region("gfx7")->base();
	367	const UINT8 *amedata = screen.machine().root_device().memregion("gfx5")->base();
	368	const UINT8 *headdata = screen.machine().root_device().memregion("gfx6")->base();
	369	const UINT8 *pldata = state->memregion("gfx7")->base();
370	370	bitmap_ind16 &lpixmap = state->m_left_tilemap->pixmap();
371	371	bitmap_ind16 &rpixmap = state->m_right_tilemap->pixmap();
372	372	bitmap_ind16 &cpixmap = state->m_center_tilemap->pixmap();

src/mame/video/zaxxon.c

r14976	r14977
17	17
18	18	PALETTE_INIT( zaxxon )
19	19	{
20		const UINT8 *color_prom = machine.region("proms")->base();
	20	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
21	21	zaxxon_state *state = machine.driver_data<zaxxon_state>();
22	22	static const int resistances[3] = { 1000, 470, 220 };
23	23	double rweights[3], gweights[3], bweights[2];
r14976	r14977
69	69
70	70	static TILE_GET_INFO( get_bg_tile_info )
71	71	{
72		const UINT8 *source = machine.region("tilemap_dat")->base();
73		int size = machine.region("tilemap_dat")->bytes() / 2;
	72	const UINT8 *source = machine.root_device().memregion("tilemap_dat")->base();
	73	int size = machine.root_device().memregion("tilemap_dat")->bytes() / 2;
74	74	int eff_index = tile_index & (size - 1);
75	75	int code = source[eff_index] + 256 * (source[eff_index + size] & 3);
76	76	int color = source[eff_index + size] >> 4;

src/mame/video/shangkid.c

r14976	r14977
43	43	}
44	44
45	45	tileinfo.category =
46		(machine.region( "proms" )->base()[0x800+color*4]==2)?1:0;
	46	(machine.root_device().memregion( "proms" )->base()[0x800+color*4]==2)?1:0;
47	47	}
48	48
49	49	VIDEO_START( shangkid )
r14976	r14977
201	201
202	202	PALETTE_INIT( dynamski )
203	203	{
204		const UINT8 *color_prom = machine.region("proms")->base();
	204	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
205	205	int i;
206	206
207	207	/* allocate the colortable */

src/mame/video/trackfld.c

r14976	r14977
31	31
32	32	PALETTE_INIT( trackfld )
33	33	{
34		const UINT8 *color_prom = machine.region("proms")->base();
	34	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
35	35	static const int resistances_rg[3] = { 1000, 470, 220 };
36	36	static const int resistances_b [2] = { 470, 220 };
37	37	double rweights[3], gweights[3], bweights[2];

src/mame/video/fastfred.c

r14976	r14977
25	25
26	26	PALETTE_INIT( fastfred )
27	27	{
28		const UINT8 *color_prom = machine.region("proms")->base();
	28	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
29	29	static const int resistances[4] = { 1000, 470, 220, 100 };
30	30	double rweights[4], gweights[4], bweights[4];
31	31	int i;

src/mame/video/karnov.c

r14976	r14977
38	38
39	39	PALETTE_INIT( karnov )
40	40	{
41		const UINT8 *color_prom = machine.region("proms")->base();
	41	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
42	42	int i;
43	43
44	44	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/lwings.c

r14976	r14977
63	63	{
64	64	lwings_state *state = machine.driver_data<lwings_state>();
65	65	int code, color;
66		UINT8 *rom = machine.region("gfx5")->base();
67		int mask = machine.region("gfx5")->bytes() - 1;
	66	UINT8 *rom = machine.root_device().memregion("gfx5")->base();
	67	int mask = state->memregion("gfx5")->bytes() - 1;
68	68
69	69	tile_index = (tile_index + state->m_bg2_image * 0x20) & mask;
70	70	code = rom[tile_index];

src/mame/video/punchout.c

r14976	r14977
327	327	{
328	328	punchout_state *state = machine.driver_data<punchout_state>();
329	329	int i;
330		const UINT8 *color_prom = machine.region("proms")->base();
	330	const UINT8 *color_prom = state->memregion("proms")->base();
331	331
332	332	// top monitor palette
333	333	for (i = 0; i < 0x100; i++)
r14976	r14977
347	347	{
348	348	punchout_state *state = machine.driver_data<punchout_state>();
349	349	int i;
350		const UINT8 *color_prom = machine.region("proms")->base() + 0x600;
	350	const UINT8 *color_prom = state->memregion("proms")->base() + 0x600;
351	351
352	352	// bottom monitor palette
353	353	for (i = 0; i < 0x100; i++)

src/mame/video/kopunch.c

r14976	r14977
4	4
5	5	PALETTE_INIT( kopunch )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	color_prom += 24;   /* first 24 colors are black */

src/mame/video/finalizr.c

r14976	r14977
12	12
13	13	PALETTE_INIT( finalizr )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	/* allocate the colortable */

src/mame/video/xorworld.c

r14976	r14977
18	18
19	19	PALETTE_INIT( xorworld )
20	20	{
21		const UINT8 *color_prom = machine.region("proms")->base();
	21	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
22	22	int i;
23	23
24	24	for (i = 0;i < machine.total_colors();i++){

src/mame/video/cclimber.c

r14976	r14977
38	38	***************************************************************************/
39	39	PALETTE_INIT( cclimber )
40	40	{
41		const UINT8 *color_prom = machine.region("proms")->base();
	41	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
42	42	static const int resistances_rg[3] = { 1000, 470, 220 };
43	43	static const int resistances_b [2] = { 470, 220 };
44	44	double weights_rg[3], weights_b[2];
r14976	r14977
115	115
116	116	PALETTE_INIT( swimmer )
117	117	{
118		const UINT8 *color_prom = machine.region("proms")->base();
	118	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
119	119	int i;
120	120
121	121	for (i = 0; i < 0x100; i++)
r14976	r14977
184	184
185	185	PALETTE_INIT( yamato )
186	186	{
187		const UINT8 *color_prom = machine.region("proms")->base();
	187	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
188	188	int i;
189	189
190	190	/* chars - 12 bits RGB */
r14976	r14977
252	252
253	253	PALETTE_INIT( toprollr )
254	254	{
255		const UINT8 *color_prom = machine.region("proms")->base();
	255	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
256	256	int i;
257	257
258	258	for (i = 0; i < 0xa0; i++)
r14976	r14977
692	692	{
693	693	cclimber_state *state = screen.machine().driver_data<cclimber_state>();
694	694	int i;
695		UINT8 *sky_rom = screen.machine().region("user1")->base() + 0x1200;
	695	UINT8 *sky_rom = state->memregion("user1")->base() + 0x1200;
696	696
697	697	for (i = 0; i < 0x100; i++)
698	698	{

src/mame/video/gticlub.c

r14976	r14977
88	88	{
89	89	case 0x0b:      // CG Board ROM read
90	90	{
91		UINT16 *rom = (UINT16*)machine.region("gfx1")->base();
	91	UINT16 *rom = (UINT16*)machine.root_device().memregion("gfx1")->base();
92	92	return rom[K001006_addr[chip] / 2] << 16;
93	93	}
94	94	case 0x0d:      // Palette RAM read
r14976	r14977
239	239	int height = machine.primary_screen->height();
240	240	K001005_zbuffer = auto_bitmap_ind32_alloc(machine, width, height);
241	241
242		gfxrom = machine.region("gfx1")->base();
	242	gfxrom = machine.root_device().memregion("gfx1")->base();
243	243
244	244	K001005_bitmap[0] = auto_bitmap_rgb32_alloc(machine, machine.primary_screen->width(), machine.primary_screen->height());
245	245	K001005_bitmap[1] = auto_bitmap_rgb32_alloc(machine, machine.primary_screen->width(), machine.primary_screen->height());
r14976	r14977
1539	1539	int index = (debug_tex_page - 1) * 0x40000;
1540	1540	int pal = debug_tex_palette & 7;
1541	1541	int tp = (debug_tex_palette >> 3) & 1;
1542		UINT8 *rom = machine.region("gfx1")->base();
	1542	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
1543	1543
1544	1544	for (y=0; y < 384; y++)
1545	1545	{

src/mame/video/dkong.c

r14976	r14977
201	201
202	202	PALETTE_INIT( dkong2b)
203	203	{
204		const UINT8 *color_prom = machine.region("proms")->base();
	204	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
205	205	dkong_state *state = machine.driver_data<dkong_state>();
206	206	rgb_t   *rgb;
207	207	int i;
r14976	r14977
232	232	#ifdef UNUSED_FUNCTION
233	233	PALETTE_INIT( dkong4b )
234	234	{
235		const UINT8 *color_prom = machine.region("proms")->base();
	235	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
236	236	dkong_state *state = machine.driver_data<dkong_state>();
237	237	int i;
238	238	int r,g,b;
r14976	r14977
272	272
273	273	PALETTE_INIT( radarscp )
274	274	{
275		const UINT8 *color_prom = machine.region("proms")->base();
	275	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
276	276	dkong_state *state = machine.driver_data<dkong_state>();
277	277	int i;
278	278	int r,g,b;
r14976	r14977
337	337
338	338	PALETTE_INIT( radarscp1 )
339	339	{
340		const UINT8 *color_prom = machine.region("proms")->base();
	340	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
341	341	dkong_state *state = machine.driver_data<dkong_state>();
342	342	int i;
343	343	int r,g,b;
r14976	r14977
438	438
439	439	PALETTE_INIT( dkong3 )
440	440	{
441		const UINT8 *color_prom = machine.region("proms")->base();
	441	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
442	442	dkong_state *state = machine.driver_data<dkong_state>();
443	443	rgb_t   *rgb;
444	444
r14976	r14977
937	937	{
938	938	case HARDWARE_TRS02:
939	939	machine.primary_screen->register_screen_bitmap(state->m_bg_bits);
940		state->m_gfx3 = machine.region("gfx3")->base();
941		state->m_gfx3_len = machine.region("gfx3")->bytes();
	940	state->m_gfx3 = machine.root_device().memregion("gfx3")->base();
	941	state->m_gfx3_len = machine.root_device().memregion("gfx3")->bytes();
942	942	/* fall through */
943	943	case HARDWARE_TKG04:
944	944	case HARDWARE_TKG02:
r14976	r14977
950	950	state->m_bg_tilemap->set_scrolldx(0, 128);
951	951
952	952	machine.primary_screen->register_screen_bitmap(state->m_bg_bits);
953		state->m_gfx4 = machine.region("gfx4")->base();
954		state->m_gfx3 = machine.region("gfx3")->base();
955		state->m_gfx3_len = machine.region("gfx3")->bytes();
	953	state->m_gfx4 = machine.root_device().memregion("gfx4")->base();
	954	state->m_gfx3 = machine.root_device().memregion("gfx3")->base();
	955	state->m_gfx3_len = state->memregion("gfx3")->bytes();
956	956
957	957	break;
958	958	default:

src/mame/video/appoooh.c

r14976	r14977
22	22
23	23	PALETTE_INIT( appoooh )
24	24	{
25		const UINT8 *color_prom = machine.region("proms")->base();
	25	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
26	26	int i;
27	27
28	28	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
61	61
62	62	PALETTE_INIT( robowres )
63	63	{
64		const UINT8 *color_prom = machine.region("proms")->base();
	64	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
65	65	int i;
66	66
67	67	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
195	195
196	196	/* bit 6 ROM bank select */
197	197	{
198		UINT8 *RAM = machine().region("maincpu")->base();
	198	UINT8 *RAM = memregion("maincpu")->base();
199	199
200		memory_set_bankptr(machine(), "bank1",&RAM[data&0x40 ? 0x10000 : 0x0a000]);
	200	membank("bank1")->set_base(&RAM[data&0x40 ? 0x10000 : 0x0a000]);
201	201	}
202	202
203	203	/* bit 7 unknown (used) */

src/mame/video/skyraid.c

r14976	r14977
39	39	static void draw_terrain(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
40	40	{
41	41	skyraid_state *state = machine.driver_data<skyraid_state>();
42		const UINT8* p = machine.region("user1")->base();
	42	const UINT8* p = state->memregion("user1")->base();
43	43
44	44	int x;
45	45	int y;
r14976	r14977
114	114
115	115	static void draw_trapezoid(running_machine &machine, bitmap_ind16& dst, bitmap_ind16& src)
116	116	{
117		const UINT8* p = machine.region("user2")->base();
	117	const UINT8* p = machine.root_device().memregion("user2")->base();
118	118
119	119	int x;
120	120	int y;

src/mame/video/travrusa.c

r14976	r14977
39	39
40	40	PALETTE_INIT( travrusa )
41	41	{
42		const UINT8 *color_prom = machine.region("proms")->base();
	42	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
43	43	int i;
44	44
45	45	/* allocate the colortable */
r14976	r14977
115	115
116	116	PALETTE_INIT( shtrider )
117	117	{
118		const UINT8 *color_prom = machine.region("proms")->base();
	118	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
119	119	int i;
120	120
121	121	/* allocate the colortable */

src/mame/video/metlclsh.c

r14976	r14977
28	28	if (data & 1)
29	29	{
30	30	m_write_mask = 0;
31		memory_set_bankptr(machine(), "bank1", m_bgram);
	31	membank("bank1")->set_base(m_bgram);
32	32	}
33	33	else
34	34	{
35	35	m_write_mask = 1 << (data >> 1);
36		memory_set_bankptr(machine(), "bank1", m_otherram);
	36	membank("bank1")->set_base(m_otherram);
37	37	}
38	38	}
39	39

src/mame/video/kaneko16.c

r14976	r14977
236	236	{
237	237	kaneko16_state *state = machine.driver_data<kaneko16_state>();
238	238	int sx, x,y;
239		UINT8 *RAM   =   machine.region("gfx3")->base();
	239	UINT8 *RAM   =   state->memregion("gfx3")->base();
240	240
241	241	/* Render the hi-color static backgrounds held in the ROMs */
242	242

src/mame/video/goldstar.c

r14976	r14977
408	408
409	409	if (state->m_cm_enable_reg &0x04)
410	410	{
411		if (screen.machine().region("user1")->base())
	411	if (screen.machine().root_device().memregion("user1")->base())
412	412	{
413	413	const gfx_element *gfx = screen.machine().gfx[2];
414	414	int girlyscroll = (INT8)((state->m_cm_girl_scroll & 0xf0));
r14976	r14977
451	451
452	452	if (state->m_cm_enable_reg &0x04)
453	453	{
454		if (screen.machine().region("user1")->base())
	454	if (screen.machine().root_device().memregion("user1")->base())
455	455	{
456	456	const gfx_element *gfx = screen.machine().gfx[2];
457	457	int girlyscroll = (INT8)((state->m_cm_girl_scroll & 0xf0));

src/mame/video/20pacgal.c

r14976	r14977
25	25	static void get_pens(running_machine &machine, const _20pacgal_state *state, pen_t *pens)
26	26	{
27	27	offs_t offs;
28		UINT8 *color_prom = machine.region("proms")->base() + (NUM_PENS * state->m_game_selected);
	28	UINT8 *color_prom = machine.root_device().memregion("proms")->base() + (NUM_PENS * state->m_game_selected);
29	29
30	30	for (offs = 0; offs < NUM_PENS ;offs++)
31	31	{

src/mame/video/seicross.c

r14976	r14977
27	27	***************************************************************************/
28	28	PALETTE_INIT( seicross )
29	29	{
30		const UINT8 *color_prom = machine.region("proms")->base();
	30	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
31	31	int i;
32	32
33	33

src/mame/video/deniam.c

r14976	r14977
213	213	{
214	214	deniam_state *state = machine.driver_data<deniam_state>();
215	215	int offs;
216		UINT8 *gfx = machine.region("gfx2")->base();
	216	UINT8 *gfx = state->memregion("gfx2")->base();
217	217
218	218	for (offs = state->m_spriteram.bytes() / 2 - 8; offs >= 0; offs -= 8)
219	219	{

src/mame/video/redalert.c

r14976	r14977
51	51	double charmap_b_weights[2];
52	52	double back_r_weight[1];
53	53	double back_gb_weight[1];
54		const UINT8 *prom = machine.region("proms")->base();
	54	const UINT8 *prom = machine.root_device().memregion("proms")->base();
55	55
56	56	scaler = compute_resistor_weights(0, 0xff, -1,
57	57	1, resistances_bitmap,     bitmap_weight,      470, 0,
r14976	r14977
116	116	double charmap_b_weights[2];
117	117	double back_r_weight[1];
118	118	double back_gb_weight[1];
119		const UINT8 *prom = machine.region("proms")->base();
	119	const UINT8 *prom = machine.root_device().memregion("proms")->base();
120	120
121	121	scaler = compute_resistor_weights(0, 0xff, -1,
122	122	1, resistances_bitmap,     bitmap_weight,      470, 0,

src/mame/video/prehisle.c

r14976	r14977
59	59
60	60	static TILE_GET_INFO( get_bg2_tile_info )
61	61	{
62		UINT8 *tilerom = machine.region("gfx5")->base();
	62	UINT8 *tilerom = machine.root_device().memregion("gfx5")->base();
63	63
64	64	int offs = tile_index * 2;
65	65	int attr = tilerom[offs + 1] + (tilerom[offs] << 8);

src/mame/video/simpsons.c

r14976	r14977
99	99	{
100	100	space->install_read_bank(0x0000, 0x0fff, "bank5");
101	101	space->install_write_handler(0x0000, 0x0fff, write8_delegate(FUNC(simpsons_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state));
102		memory_set_bankptr(machine, "bank5", state->m_generic_paletteram_8);
	102	state->membank("bank5")->set_base(state->m_generic_paletteram_8);
103	103	}
104	104	else
105	105	space->install_legacy_readwrite_handler(*state->m_k052109, 0x0000, 0x0fff, FUNC(k052109_r), FUNC(k052109_w));

src/mame/video/polepos.c

r14976	r14977
27	27
28	28	PALETTE_INIT( polepos )
29	29	{
30		const UINT8 *color_prom = machine.region("proms")->base();
	30	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
31	31	polepos_state *state = machine.driver_data<polepos_state>();
32	32	int i, j;
33	33
r14976	r14977
348	348	static void draw_road(running_machine &machine, bitmap_ind16 &bitmap)
349	349	{
350	350	polepos_state *state = machine.driver_data<polepos_state>();
351		const UINT8 *road_control = machine.region("gfx5")->base();
	351	const UINT8 *road_control = state->memregion("gfx5")->base();
352	352	const UINT8 *road_bits1 = road_control + 0x2000;
353	353	const UINT8 *road_bits2 = road_control + 0x4000;
354	354	int x, y, i;
r14976	r14977
427	427	{
428	428	const gfx_element *gfx = machine.gfx[big ? 3 : 2];
429	429	const UINT8 *gfxdata = gfx_element_get_data(gfx, code % gfx->total_elements);
430		UINT8 *scaling_rom = machine.region("gfx6")->base();
	430	UINT8 *scaling_rom = machine.root_device().memregion("gfx6")->base();
431	431	UINT32 transmask = colortable_get_transpen_mask(machine.colortable, gfx, color, 0x1f);
432	432	int coloroffs = gfx->color_base + color * gfx->color_granularity;
433	433	int x,y;

src/mame/video/model1.c

r14976	r14977
1450	1450
1451	1451	state->m_view = auto_alloc_clear(machine, struct view);
1452	1452
1453		state->m_poly_rom = (UINT32 *)machine.region("user1")->base();
	1453	state->m_poly_rom = (UINT32 *)state->memregion("user1")->base();
1454	1454	state->m_poly_ram = auto_alloc_array_clear(machine, UINT32, 0x400000);
1455	1455	state->m_tgp_ram = auto_alloc_array_clear(machine, UINT16, 0x100000-0x40000);
1456	1456	state->m_pointdb = auto_alloc_array_clear(machine, struct point, 1000000*2);

src/mame/video/jackal.c

r14976	r14977
14	14
15	15	PALETTE_INIT( jackal )
16	16	{
17		const UINT8 *color_prom = machine.region("proms")->base();
	17	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
18	18	int i;
19	19
20	20	/* allocate the colortable */
r14976	r14977
64	64
65	65	static TILE_GET_INFO( get_bg_tile_info )
66	66	{
67		UINT8 *RAM = machine.region("master")->base();
	67	UINT8 *RAM = machine.root_device().memregion("master")->base();
68	68
69	69	int attr = RAM[0x2000 + tile_index];
70	70	int code = RAM[0x2400 + tile_index] + ((attr & 0xc0) << 2) + ((attr & 0x30) << 6);
r14976	r14977
83	83	static void draw_background( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
84	84	{
85	85	jackal_state *state = machine.driver_data<jackal_state>();
86		UINT8 *RAM = machine.region("master")->base();
	86	UINT8 *RAM = state->memregion("master")->base();
87	87	int i;
88	88
89	89	state->m_scrollram = &RAM[0x0020];
r14976	r14977
206	206	static void draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
207	207	{
208	208	jackal_state *state = machine.driver_data<jackal_state>();
209		UINT8 *RAM = machine.region("master")->base();
	209	UINT8 *RAM = state->memregion("master")->base();
210	210	UINT8 *sr, *ss;
211	211
212	212	if (state->m_videoctrl[0x03] & 0x08)

src/mame/video/mw8080bw.c

r14976	r14977
229	229
230	230	UINT16 cloud_counter = state->m_phantom2_cloud_counter;
231	231
232		UINT8 *cloud_region = screen.machine().region("proms")->base();
	232	UINT8 *cloud_region = state->memregion("proms")->base();
233	233
234	234	while (1)
235	235	{

src/mame/video/taitoic.c

r14976	r14977
3964	3964	UINT16 roada_line[512], roadb_line[512];
3965	3965	UINT16 *dst16;
3966	3966	UINT16 *roada, *roadb;
3967		UINT16 *roadgfx = (UINT16 *)device->machine().region(tc0150rod->gfx_region)->base();
	3967	UINT16 *roadgfx = (UINT16 *)device->machine().root_device().memregion(tc0150rod->gfx_region)->base();
3968	3968
3969	3969	UINT16 pixel, color, gfx_word;
3970	3970	UINT16 roada_clipl, roada_clipr, roada_bodyctrl;

src/mame/video/namcos86.c

r14976	r14977
34	34
35	35	PALETTE_INIT( namcos86 )
36	36	{
37		const UINT8 *color_prom = machine.region("proms")->base();
	37	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
38	38	namcos86_state *state = machine.driver_data<namcos86_state>();
39	39	int i;
40	40	rgb_t palette[512];

src/mame/video/suna8.c

r14976	r14977
83	83
84	84	if (machine.input().code_pressed(KEYCODE_X))
85	85	{
86		UINT8 *rom = machine.region("maincpu")->base() + 0x10000 + 0x4000 * state->m_trombank;
	86	UINT8 *rom = state->memregion("maincpu")->base() + 0x10000 + 0x4000 * state->m_trombank;
87	87	code = rom[ 2 * tile_index + 0 ];
88	88	attr = rom[ 2 * tile_index + 1 ];
89	89	}
r14976	r14977
416	416	if (screen.machine().input().code_pressed(KEYCODE_Z) || screen.machine().input().code_pressed(KEYCODE_X))
417	417	{
418	418	suna8_state *state = screen.machine().driver_data<suna8_state>();
419		int max_tiles = screen.machine().region("gfx1")->bytes() / (0x400 * 0x20);
	419	int max_tiles = state->memregion("gfx1")->bytes() / (0x400 * 0x20);
420	420
421	421	if (screen.machine().input().code_pressed_once(KEYCODE_Q))   { state->m_page--;   screen.machine().tilemap().mark_all_dirty();   }
422	422	if (screen.machine().input().code_pressed_once(KEYCODE_W))   { state->m_page++;   screen.machine().tilemap().mark_all_dirty();   }

src/mame/video/btime.c

r14976	r14977
30	30
31	31	PALETTE_INIT( btime )
32	32	{
33		const UINT8 *color_prom = machine.region("proms")->base();
	33	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
34	34	int i;
35	35
36	36
r14976	r14977
81	81
82	82	PALETTE_INIT( lnc )
83	83	{
84		const UINT8 *color_prom = machine.region("proms")->base();
	84	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
85	85	int i;
86	86
87	87	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
377	377	{
378	378	btime_state *state = machine.driver_data<btime_state>();
379	379	int i;
380		const UINT8 *gfx = machine.region("bg_map")->base();
	380	const UINT8 *gfx = state->memregion("bg_map")->base();
381	381	int scroll = -(state->m_bnj_scroll2 | ((state->m_bnj_scroll1 & 0x03) << 8));
382	382
383	383	// One extra iteration for wrap around

src/mame/video/nova2001.c

r14976	r14977
10	10
11	11	PALETTE_INIT( nova2001 )
12	12	{
13		const UINT8 *color_prom = machine.region("proms")->base();
	13	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
14	14	int i;
15	15
16	16	/* Color #1 is used for palette animation.          */

src/mame/video/cps1.c

r14976	r14977
1520	1520	if (strcmp(gamename, "sf2rb") == 0)
1521	1521	{
1522	1522	/* Patch out protection check */
1523		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1523	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1524	1524	rom[0xe5464 / 2] = 0x6012;
1525	1525	}
1526	1526
1527	1527	if (strcmp(gamename, "sf2rb2") == 0)
1528	1528	{
1529	1529	/* Patch out protection check */
1530		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1530	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1531	1531	rom[0xe5332 / 2] = 0x6014;
1532	1532	}
1533	1533
r14976	r14977
1538	1538	by the cpu core as a 32-bit branch. This branch would make the
1539	1539	game crash (address error, since it would branch to an odd address)
1540	1540	if location 180ca6 (outside ROM space) isn't 0. Protection check? */
1541		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1541	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1542	1542	rom[0x11756 / 2] = 0x4e71;
1543	1543	}
1544	1544	else if (strcmp(gamename, "ghouls") == 0)
1545	1545	{
1546	1546	/* Patch out self-test... it takes forever */
1547		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1547	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1548	1548	rom[0x61964 / 2] = 0x4ef9;
1549	1549	rom[0x61966 / 2] = 0x0000;
1550	1550	rom[0x61968 / 2] = 0x0400;
r14976	r14977
1716	1716
1717	1717	static void cps1_gfx_decode( running_machine &machine )
1718	1718	{
1719		int size = machine.region("gfx")->bytes();
	1719	int size = machine.root_device().memregion("gfx")->bytes();
1720	1720	int i, j, gfxsize;
1721		UINT8 *cps1_gfx = machine.region("gfx")->base();
	1721	UINT8 *cps1_gfx = machine.root_device().memregion("gfx")->base();
1722	1722
1723	1723	gfxsize = size / 4;
1724	1724
r14976	r14977
1772	1772	static void cps2_gfx_decode( running_machine &machine )
1773	1773	{
1774	1774	const int banksize = 0x200000;
1775		int size = machine.region("gfx")->bytes();
	1775	int size = machine.root_device().memregion("gfx")->bytes();
1776	1776	int i;
1777	1777
1778	1778	for (i = 0; i < size; i += banksize)
1779		unshuffle((UINT64 *)(machine.region("gfx")->base() + i), banksize / 8);
	1779	unshuffle((UINT64 *)(machine.root_device().memregion("gfx")->base() + i), banksize / 8);
1780	1780
1781	1781	cps1_gfx_decode(machine);
1782	1782	}
r14976	r14977
2697	2697	{
2698	2698	cps_state *state = screen.machine().driver_data<cps_state>();
2699	2699	int offs;
2700		UINT8 *stars_rom = screen.machine().region("stars")->base();
	2700	UINT8 *stars_rom = state->memregion("stars")->base();
2701	2701
2702	2702	if (!stars_rom && (state->m_stars_enabled[0] || state->m_stars_enabled[1]))
2703	2703	{

src/mame/video/wiz.c

r14976	r14977
35	35	***************************************************************************/
36	36	PALETTE_INIT( wiz )
37	37	{
38		const UINT8 *color_prom = machine.region("proms")->base();
	38	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
39	39	int i;
40	40
41	41

src/mame/video/stactics.c

r14976	r14977
59	59
60	60	static PALETTE_INIT( stactics )
61	61	{
62		const UINT8 *color_prom = machine.region("proms")->base();
	62	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
63	63	int i;
64	64
65	65	for (i = 0; i < 0x400; i++)
r14976	r14977
306	306	static void update_artwork(running_machine &machine, stactics_state *state)
307	307	{
308	308	int i;
309		UINT8 *beam_region = machine.region("user1")->base();
	309	UINT8 *beam_region = machine.root_device().memregion("user1")->base();
310	310
311	311	/* set the lamps first */
312	312	output_set_indexed_value("base_lamp", 4, state->m_lamps[0] & 0x01);

src/mame/video/mermaid.c

r14976	r14977
4	4
5	5	PALETTE_INIT( mermaid )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	/* allocate the colortable */
r14976	r14977
35	35
36	36	PALETTE_INIT( rougien )
37	37	{
38		const UINT8 *color_prom = machine.region("proms")->base();
	38	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
39	39	int i;
40	40
41	41	/* allocate the colortable */

src/mame/video/gaelco3d.c

r14976	r14977
30	30	m_screenbits(state.machine().primary_screen->width(), state.machine().primary_screen->height()),
31	31	m_zbuffer(state.machine().primary_screen->width(), state.machine().primary_screen->height()),
32	32	m_polygons(0),
33		m_texture_size(state.machine().region("gfx1")->bytes()),
34		m_texmask_size(state.machine().region("gfx2")->bytes() * 8),
	33	m_texture_size(state.machine().root_device().memregion("gfx1")->bytes()),
	34	m_texmask_size(state.machine().root_device().memregion("gfx2")->bytes() * 8),
35	35	m_texture(auto_alloc_array(state.machine(), UINT8, m_texture_size)),
36	36	m_texmask(auto_alloc_array(state.machine(), UINT8, m_texmask_size))
37	37	{
r14976	r14977
39	39	state_save_register_global_bitmap(state.machine(), &m_zbuffer);
40	40
41	41	/* first expand the pixel data */
42		UINT8 *src = state.machine().region("gfx1")->base();
	42	UINT8 *src = state.machine().root_device().memregion("gfx1")->base();
43	43	UINT8 *dst = m_texture;
44	44	for (int y = 0; y < m_texture_size/4096; y += 2)
45	45	for (int x = 0; x < 4096; x += 2)
r14976	r14977
51	51	}
52	52
53	53	/* then expand the mask data */
54		src = state.machine().region("gfx2")->base();
	54	src = state.machine().root_device().memregion("gfx2")->base();
55	55	dst = m_texmask;
56	56	for (int y = 0; y < m_texmask_size/4096; y++)
57	57	for (int x = 0; x < 4096; x++)

src/mame/video/lethalj.c

r14976	r14977
82	82	state->m_screenram = auto_alloc_array(machine, UINT16, BLITTER_DEST_WIDTH * BLITTER_DEST_HEIGHT);
83	83
84	84	/* predetermine blitter info */
85		state->m_blitter_base = (UINT16 *)machine.region("gfx1")->base();
86		state->m_blitter_rows = machine.region("gfx1")->bytes() / (2*BLITTER_SOURCE_WIDTH);
	85	state->m_blitter_base = (UINT16 *)machine.root_device().memregion("gfx1")->base();
	86	state->m_blitter_rows = state->memregion("gfx1")->bytes() / (2*BLITTER_SOURCE_WIDTH);
87	87	}
88	88
89	89

src/mame/video/itech8.c

r14976	r14977
175	175	state->m_page_select = 0xc0;
176	176
177	177	/* fetch the GROM base */
178		state->m_grom_base = machine.region("grom")->base();
179		state->m_grom_size = machine.region("grom")->bytes();
	178	state->m_grom_base = machine.root_device().memregion("grom")->base();
	179	state->m_grom_size = state->memregion("grom")->bytes();
180	180	}
181	181
182	182

src/mame/video/galaxian.c

r14976	r14977
255	255
256	256	PALETTE_INIT( galaxian )
257	257	{
258		const UINT8 *color_prom = machine.region("proms")->base();
	258	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
259	259	galaxian_state *state = machine.driver_data<galaxian_state>();
260	260	static const int rgb_resistances[3] = { 1000, 470, 220 };
261	261	double rweights[3], gweights[3], bweights[2];
r14976	r14977
294	294	2, &rgb_resistances[1], bweights, 470, 0);
295	295
296	296	/* decode the palette first */
297		len = machine.region("proms")->bytes();
	297	len = machine.root_device().memregion("proms")->bytes();
298	298	for (i = 0; i < len; i++)
299	299	{
300	300	UINT8 bit0, bit1, bit2, r, g, b;
r14976	r14977
1077	1077	void amidar_draw_background(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
1078	1078	{
1079	1079	galaxian_state *state = machine.driver_data<galaxian_state>();
1080		const UINT8 *prom = machine.region("user1")->base();
	1080	const UINT8 *prom = state->memregion("user1")->base();
1081	1081	rectangle draw;
1082	1082	int x;
1083	1083

src/mame/video/bbusters.c

r14976	r14977
203	203	static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const UINT16 *source, int bank, int colval, int colmask)
204	204	{
205	205	bbusters_state *state = machine.driver_data<bbusters_state>();
206		const UINT8 *scale_table=machine.region("user1")->base();
	206	const UINT8 *scale_table=state->memregion("user1")->base();
207	207	int offs;
208	208
209	209	for (offs = 0;offs <0x800 ;offs += 4) {

src/mame/video/snk.c

r14976	r14977
27	27
28	28	PALETTE_INIT( tnk3 )
29	29	{
30		const UINT8 *color_prom = machine.region("proms")->base();
	30	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
31	31	int i;
32	32	int num_colors = 0x400;
33	33

src/mame/video/hyprduel.c

r14976	r14977
348	348
349	349	static void expand_gfx1(hyprduel_state &state)
350	350	{
351		UINT8 *base_gfx = state.machine().region("gfx1")->base();
352		UINT32 length = 2 * state.machine().region("gfx1")->bytes();
	351	UINT8 *base_gfx = state.machine().root_device().memregion("gfx1")->base();
	352	UINT32 length = 2 * state.machine().root_device().memregion("gfx1")->bytes();
353	353	state.m_expanded_gfx1 = auto_alloc_array(state.machine(), UINT8, length);
354	354	for (int i = 0; i < length; i += 2)
355	355	{
r14976	r14977
472	472	{
473	473	hyprduel_state *state = machine.driver_data<hyprduel_state>();
474	474	UINT8 *base_gfx4 = state->m_expanded_gfx1;
475		UINT8 *base_gfx8 = machine.region("gfx1")->base();
476		UINT32 gfx_size = machine.region("gfx1")->bytes();
	475	UINT8 *base_gfx8 = machine.root_device().memregion("gfx1")->base();
	476	UINT32 gfx_size = state->memregion("gfx1")->bytes();
477	477
478	478	int max_x = machine.primary_screen->width();
479	479	int max_y = machine.primary_screen->height();

src/mame/video/namconb1.c

r14976	r14977
164	164
165	165	VIDEO_START( namconb1 )
166	166	{
167		namco_tilemap_init( machine, NAMCONB1_TILEGFX, machine.region(NAMCONB1_TILEMASKREGION)->base(), NB1TilemapCB );
	167	namco_tilemap_init( machine, NAMCONB1_TILEGFX, machine.root_device().memregion(NAMCONB1_TILEMASKREGION)->base(), NB1TilemapCB );
168	168	namco_obj_init(machine,NAMCONB1_SPRITEGFX,0x0,NB1objcode2tile);
169	169	} /* namconb1 */
170	170
r14976	r14977
225	225
226	226	VIDEO_START( namconb2 )
227	227	{
228		namco_tilemap_init(machine, NAMCONB1_TILEGFX, machine.region(NAMCONB1_TILEMASKREGION)->base(), NB2TilemapCB );
	228	namco_tilemap_init(machine, NAMCONB1_TILEGFX, machine.root_device().memregion(NAMCONB1_TILEMASKREGION)->base(), NB2TilemapCB );
229	229	namco_obj_init(machine,NAMCONB1_SPRITEGFX,0x0,NB2objcode2tile);
230	230	namco_roz_init(machine, NAMCONB1_ROTGFX,NAMCONB1_ROTMASKREGION);
231	231	} /* namconb2_vh_start */

src/mame/video/calomega.c

r14976	r14977
70	70
71	71	PALETTE_INIT( calomega )
72	72	{
73		const UINT8 *color_prom = machine.region("proms")->base();
	73	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
74	74	/*  prom bits
75	75	7654 3210
76	76	---- ---x   red component.

src/mame/video/strnskil.c

r14976	r14977
14	14
15	15	PALETTE_INIT( strnskil )
16	16	{
17		const UINT8 *color_prom = machine.region("proms")->base();
	17	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
18	18	int i;
19	19
20	20	/* allocate the colortable */
r14976	r14977
126	126	{
127	127	strnskil_state *state = screen.machine().driver_data<strnskil_state>();
128	128	int row;
129		const UINT8 *usr1 = screen.machine().region("user1")->base();
	129	const UINT8 *usr1 = state->memregion("user1")->base();
130	130
131	131	for (row = 0; row < 32; row++)
132	132	{

src/mame/video/cosmic.c

r14976	r14977
20	20	{
21	21	cosmic_state *state = machine.driver_data<cosmic_state>();
22	22	offs_t offs = (state->m_color_registers[0] << 9) | (state->m_color_registers[2] << 10) | ((x >> 4) << 5) | (y >> 3);
23		pen_t pen = machine.region("user1")->base()[offs];
	23	pen_t pen = state->memregion("user1")->base()[offs];
24	24
25	25	if (state->m_color_registers[1])
26	26	pen >>= 4;
r14976	r14977
32	32	{
33	33	cosmic_state *state = machine.driver_data<cosmic_state>();
34	34	offs_t offs = (state->m_color_registers[0] << 9) | ((x >> 4) << 5) | (y >> 3);
35		pen_t pen = machine.region("user1")->base()[offs];
	35	pen_t pen = state->memregion("user1")->base()[offs];
36	36
37	37	if (state->m_color_registers[1]) // 0 according to the schematics, but that breaks alien formation colors
38	38	pen >>= 4;
r14976	r14977
44	44	{
45	45	cosmic_state *state = machine.driver_data<cosmic_state>();
46	46	offs_t offs = (state->m_color_registers[0] << 8) | (state->m_color_registers[1] << 9) | ((y >> 4) << 4) | (x >> 4);
47		pen_t pen = machine.region("user1")->base()[offs];
	47	pen_t pen = state->memregion("user1")->base()[offs];
48	48
49	49	/* the upper 4 bits are for cocktail mode support */
50	50	return pen & 0x0f;
r14976	r14977
54	54	{
55	55	cosmic_state *state = machine.driver_data<cosmic_state>();
56	56	offs_t offs = (state->m_color_registers[0] << 9) | ((x >> 3) << 4) | (y >> 4);
57		pen_t pen = machine.region("user1")->base()[offs];
	57	pen_t pen = state->memregion("user1")->base()[offs];
58	58
59	59	if (state->m_color_registers[1])
60	60	pen >>= 4;
r14976	r14977
77	77
78	78	PALETTE_INIT( panic )
79	79	{
80		const UINT8 *color_prom = machine.region("proms")->base();
	80	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
81	81	cosmic_state *state = machine.driver_data<cosmic_state>();
82	82	int i;
83	83
r14976	r14977
120	120
121	121	PALETTE_INIT( cosmica )
122	122	{
123		const UINT8 *color_prom = machine.region("proms")->base();
	123	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
124	124	cosmic_state *state = machine.driver_data<cosmic_state>();
125	125	int i;
126	126
r14976	r14977
182	182
183	183	PALETTE_INIT( magspot )
184	184	{
185		const UINT8 *color_prom = machine.region("proms")->base();
	185	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
186	186	cosmic_state *state = machine.driver_data<cosmic_state>();
187	187	int i;
188	188
r14976	r14977
217	217
218	218	PALETTE_INIT( nomnlnd )
219	219	{
220		const UINT8 *color_prom = machine.region("proms")->base();
	220	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
221	221	cosmic_state *state = machine.driver_data<cosmic_state>();
222	222	int i;
223	223
r14976	r14977
324	324	cosmic_state *state = screen.machine().driver_data<cosmic_state>();
325	325	UINT8 y = 0;
326	326	UINT8 map = 0;
327		UINT8 *PROM = screen.machine().region("user2")->base();
	327	UINT8 *PROM = state->memregion("user2")->base();
328	328
329	329	while (1)
330	330	{
r14976	r14977
373	373	{
374	374	cosmic_state *state = machine.driver_data<cosmic_state>();
375	375	UINT8 y;
376		UINT8 *horz_PROM = machine.region("user2")->base();
377		UINT8 *vert_PROM = machine.region("user3")->base();
	376	UINT8 *horz_PROM = machine.root_device().memregion("user2")->base();
	377	UINT8 *vert_PROM = state->memregion("user3")->base();
378	378	offs_t horz_addr = 0;
379	379
380	380	UINT8 count = 0;
r14976	r14977
433	433	cosmic_state *state = screen.machine().driver_data<cosmic_state>();
434	434	UINT8 y = 0;
435	435	UINT8 water = screen.frame_number();
436		UINT8 *PROM = screen.machine().region("user2")->base();
	436	UINT8 *PROM = state->memregion("user2")->base();
437	437
438	438	/* all positioning is via logic gates:
439	439

src/mame/video/shaolins.c

r14976	r14977
28	28	***************************************************************************/
29	29	PALETTE_INIT( shaolins )
30	30	{
31		const UINT8 *color_prom = machine.region("proms")->base();
	31	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
32	32	static const int resistances[4] = { 2200, 1000, 470, 220 };
33	33	double rweights[4], gweights[4], bweights[4];
34	34	int i;

src/mame/video/model2.c

r14976	r14977
2713	2713	machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(model2_exit), &machine));
2714	2714
2715	2715	/* initialize the hardware rasterizer */
2716		model2_3d_init( machine, (UINT16*)machine.region("user3")->base() );
	2716	model2_3d_init( machine, (UINT16*)machine.root_device().memregion("user3")->base() );
2717	2717
2718	2718	/* initialize the geometry engine */
2719		geo_init( machine, (UINT32*)machine.region("user2")->base() );
	2719	geo_init( machine, (UINT32*)state->memregion("user2")->base() );
2720	2720	}
2721	2721
2722	2722	SCREEN_UPDATE_RGB32(model2)

src/mame/video/wiping.c

r14976	r14977
19	19
20	20	PALETTE_INIT( wiping )
21	21	{
22		const UINT8 *color_prom = machine.region("proms")->base();
	22	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
23	23	static const int resistances_rg[3] = { 1000, 470, 220 };
24	24	static const int resistances_b [2] = { 470, 220 };
25	25	double rweights[3], gweights[3], bweights[2];

src/mame/video/kyugo.c

r14976	r14977
47	47	{
48	48	kyugo_state *state = machine.driver_data<kyugo_state>();
49	49
50		state->m_color_codes = machine.region("proms")->base() + 0x300;
	50	state->m_color_codes = state->memregion("proms")->base() + 0x300;
51	51
52	52	state->m_fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
53	53	state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);

src/mame/video/leland.c

r14976	r14977
392	392	leland_state *state = screen.machine().driver_data<leland_state>();
393	393	int y;
394	394
395		const UINT8 *bg_prom = screen.machine().region("user1")->base();
396		const UINT8 *bg_gfx = screen.machine().region("gfx1")->base();
397		offs_t bg_gfx_bank_page_size = screen.machine().region("gfx1")->bytes() / 3;
	395	const UINT8 *bg_prom = screen.machine().root_device().memregion("user1")->base();
	396	const UINT8 *bg_gfx = screen.machine().root_device().memregion("gfx1")->base();
	397	offs_t bg_gfx_bank_page_size = state->memregion("gfx1")->bytes() / 3;
398	398	offs_t char_bank = (((state->m_gfxbank >> 4) & 0x03) * 0x2000) & (bg_gfx_bank_page_size - 1);
399	399	offs_t prom_bank = ((state->m_gfxbank >> 3) & 0x01) * 0x2000;
400	400
r14976	r14977
461	461	leland_state *state = screen.machine().driver_data<leland_state>();
462	462	int y;
463	463
464		const UINT8 *bg_gfx = screen.machine().region("gfx1")->base();
465		offs_t bg_gfx_bank_page_size = screen.machine().region("gfx1")->bytes() / 6;
	464	const UINT8 *bg_gfx = screen.machine().root_device().memregion("gfx1")->base();
	465	offs_t bg_gfx_bank_page_size = state->memregion("gfx1")->bytes() / 6;
466	466	offs_t bg_gfx_offs_mask = bg_gfx_bank_page_size - 1;
467	467
468	468	/* for each scanline in the visible region */

src/mame/video/popeye.c

r14976	r14977
115	115
116	116	PALETTE_INIT( popeye )
117	117	{
118		const UINT8 *color_prom = machine.region("proms")->base();
	118	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
119	119	popeye_state *state = machine.driver_data<popeye_state>();
120	120	state->m_invertmask = 0xff;
121	121
r14976	r14977
124	124
125	125	PALETTE_INIT( popeyebl )
126	126	{
127		const UINT8 *color_prom = machine.region("proms")->base();
	127	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
128	128	popeye_state *state = machine.driver_data<popeye_state>();
129	129	state->m_invertmask = 0x00;
130	130
r14976	r14977
135	135	{
136	136	popeye_state *state = machine.driver_data<popeye_state>();
137	137	int i;
138		UINT8 *color_prom = machine.region("proms")->base() + 16 * bank;
	138	UINT8 *color_prom = state->memregion("proms")->base() + 16 * bank;
139	139
140	140	for (i = 0;i < 16;i++)
141	141	{

src/mame/video/compgolf.c

r14976	r14977
11	11
12	12	PALETTE_INIT( compgolf )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	int i;
16	16
17	17	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/pushman.c

r14976	r14977
15	15
16	16	static TILE_GET_INFO( get_back_tile_info )
17	17	{
18		UINT8 *bg_map = machine.region("gfx4")->base();
	18	UINT8 *bg_map = machine.root_device().memregion("gfx4")->base();
19	19	int tile;
20	20
21	21	tile = bg_map[tile_index << 1] + (bg_map[(tile_index << 1) + 1] << 8);

src/mame/video/espial.c

r14976	r14977
31	31
32	32	PALETTE_INIT( espial )
33	33	{
34		const UINT8 *color_prom = machine.region("proms")->base();
	34	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
35	35	int i;
36	36
37	37	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/hyperspt.c

r14976	r14977
31	31
32	32	PALETTE_INIT( hyperspt )
33	33	{
34		const UINT8 *color_prom = machine.region("proms")->base();
	34	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
35	35	static const int resistances_rg[3] = { 1000, 470, 220 };
36	36	static const int resistances_b[2] = { 470, 220 };
37	37	double rweights[3], gweights[3], bweights[2];

src/mame/video/segag80r.c

r14976	r14977
153	153	static TILE_GET_INFO( spaceod_get_tile_info )
154	154	{
155	155	segag80r_state *state = machine.driver_data<segag80r_state>();
156		int code = machine.region("gfx2")->base()[tile_index + 0x1000 * (state->m_spaceod_bg_control >> 6)];
	156	int code = state->memregion("gfx2")->base()[tile_index + 0x1000 * (state->m_spaceod_bg_control >> 6)];
157	157	SET_TILE_INFO(1, code + 0x100 * ((state->m_spaceod_bg_control >> 2) & 1), 0, 0);
158	158	}
159	159
r14976	r14977
169	169	static TILE_GET_INFO( bg_get_tile_info )
170	170	{
171	171	segag80r_state *state = machine.driver_data<segag80r_state>();
172		int code = machine.region("gfx2")->base()[tile_index];
	172	int code = state->memregion("gfx2")->base()[tile_index];
173	173	SET_TILE_INFO(1, code + 0x100 * state->m_bg_char_bank, code >> 4, 0);
174	174	}
175	175
r14976	r14977
216	216
217	217	/* background tilemap is effectively 1 screen x n screens */
218	218	case G80_BACKGROUND_MONSTERB:
219		state->m_bg_tilemap = tilemap_create(machine, bg_get_tile_info, tilemap_scan_rows,  8,8, 32,machine.region("gfx2")->bytes() / 32);
	219	state->m_bg_tilemap = tilemap_create(machine, bg_get_tile_info, tilemap_scan_rows,  8,8, 32,machine.root_device().memregion("gfx2")->bytes() / 32);
220	220	break;
221	221
222	222	/* background tilemap is effectively 4 screens x n screens */
223	223	case G80_BACKGROUND_PIGNEWT:
224	224	case G80_BACKGROUND_SINDBADM:
225		state->m_bg_tilemap = tilemap_create(machine, bg_get_tile_info, tilemap_scan_rows,  8,8, 128,machine.region("gfx2")->bytes() / 128);
	225	state->m_bg_tilemap = tilemap_create(machine, bg_get_tile_info, tilemap_scan_rows,  8,8, 128,machine.root_device().memregion("gfx2")->bytes() / 128);
226	226	break;
227	227	}
228	228

src/mame/video/hnayayoi.c

r14976	r14977
130	130
131	131	WRITE8_MEMBER(hnayayoi_state::dynax_blitter_rev1_start_w)
132	132	{
133		UINT8 *rom = machine().region("gfx1")->base();
134		int romlen = machine().region("gfx1")->bytes();
	133	UINT8 *rom = memregion("gfx1")->base();
	134	int romlen = memregion("gfx1")->bytes();
135	135	int sx = m_blit_dest & 0xff;
136	136	int sy = m_blit_dest >> 8;
137	137	int x, y;

src/mame/video/tmnt.c

r14976	r14977
5	5	static TILE_GET_INFO( glfgreat_get_roz_tile_info )
6	6	{
7	7	tmnt_state *state = machine.driver_data<tmnt_state>();
8		UINT8 *rom = machine.region("user1")->base();
	8	UINT8 *rom = state->memregion("user1")->base();
9	9	int code;
10	10
11	11	tile_index += 0x40000 * state->m_glfgreat_roz_rom_bank;
r14976	r14977
17	17
18	18	static TILE_GET_INFO( prmrsocr_get_roz_tile_info )
19	19	{
20		UINT8 *rom = machine.region("user1")->base();
	20	UINT8 *rom = machine.root_device().memregion("user1")->base();
21	21	int code = rom[tile_index + 0x20000] + 256 * rom[tile_index];
22	22
23	23	SET_TILE_INFO(0, code & 0x1fff, code >> 13, 0);
r14976	r14977
416	416	{
417	417
418	418	if (m_glfgreat_roz_rom_mode)
419		return machine().region("gfx3")->base()[m_glfgreat_roz_char_bank * 0x80000 + offset];
	419	return memregion("gfx3")->base()[m_glfgreat_roz_char_bank * 0x80000 + offset];
420	420	else if (offset < 0x40000)
421	421	{
422		UINT8 *usr = machine().region("user1")->base();
	422	UINT8 *usr = memregion("user1")->base();
423	423	return usr[offset + 0x80000 + m_glfgreat_roz_rom_bank * 0x40000] + 256 * usr[offset + m_glfgreat_roz_rom_bank * 0x40000];
424	424	}
425	425	else
426		return machine().region("user1")->base()[((offset & 0x3ffff) >> 2) + 0x100000 + m_glfgreat_roz_rom_bank * 0x10000];
	426	return memregion("user1")->base()[((offset & 0x3ffff) >> 2) + 0x100000 + m_glfgreat_roz_rom_bank * 0x10000];
427	427	}
428	428
429	429	WRITE16_MEMBER(tmnt_state::glfgreat_122000_w)
r14976	r14977
522	522	{
523	523
524	524	if(m_glfgreat_roz_char_bank)
525		return machine().region("gfx3")->base()[offset];
	525	return memregion("gfx3")->base()[offset];
526	526	else
527	527	{
528		UINT8 *usr = machine().region("user1")->base();
	528	UINT8 *usr = memregion("user1")->base();
529	529	return 256 * usr[offset] + usr[offset + 0x020000];
530	530	}
531	531	}

src/mame/video/zodiack.c

r14976	r14977
48	48
49	49	PALETTE_INIT( zodiack )
50	50	{
51		const UINT8 *color_prom = machine.region("proms")->base();
	51	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
52	52	int i;
53	53
54	54	/* allocate the colortable */

src/mame/video/pitnrun.c

r14976	r14977
100	100	{
101	101	pitnrun_state *state = machine.driver_data<pitnrun_state>();
102	102	int x,y,i,b,datapix;
103		UINT8 *ROM = machine.region("user1")->base();
	103	UINT8 *ROM = state->memregion("user1")->base();
104	104	for(i=0;i<4;i++)
105	105	for(y=0;y<128;y++)
106	106	for(x=0;x<16;x++)
r14976	r14977
117	117
118	118	PALETTE_INIT (pitnrun)
119	119	{
120		const UINT8 *color_prom = machine.region("proms")->base();
	120	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
121	121	int i;
122	122	int bit0,bit1,bit2,r,g,b;
123	123	for (i = 0;i < 32*3; i++)
r14976	r14977
219	219	#ifdef MAME_DEBUG
220	220	if (screen.machine().input().code_pressed_once(KEYCODE_Q))
221	221	{
222		UINT8 *ROM = screen.machine().region("maincpu")->base();
	222	UINT8 *ROM = state->memregion("maincpu")->base();
223	223	ROM[0x84f6]=0; /* lap 0 - normal */
224	224	}
225	225
226	226	if (screen.machine().input().code_pressed_once(KEYCODE_W))
227	227	{
228		UINT8 *ROM = screen.machine().region("maincpu")->base();
	228	UINT8 *ROM = screen.machine().root_device().memregion("maincpu")->base();
229	229	ROM[0x84f6]=6; /* lap 6 = spotlight */
230	230	}
231	231
232	232	if (screen.machine().input().code_pressed_once(KEYCODE_E))
233	233	{
234		UINT8 *ROM = screen.machine().region("maincpu")->base();
	234	UINT8 *ROM = screen.machine().root_device().memregion("maincpu")->base();
235	235	ROM[0x84f6]=2; /* lap 3 (trial 2)= lightnings */
236	236	ROM[0x8102]=1;
237	237	}

src/mame/video/segaic16.c

r14976	r14977
1412	1412	static void segaic16_road_hangon_decode(running_machine &machine, struct road_info *info)
1413	1413	{
1414	1414	int x, y;
1415		const UINT8 *gfx = machine.region("gfx3")->base();
1416		int len = machine.region("gfx3")->bytes();
	1415	const UINT8 *gfx = machine.root_device().memregion("gfx3")->base();
	1416	int len = machine.root_device().memregion("gfx3")->bytes();
1417	1417
1418	1418	/* allocate memory for the unpacked road data */
1419	1419	info->gfx = auto_alloc_array(machine, UINT8, 256 * 512);
r14976	r14977
1673	1673	static void segaic16_road_outrun_decode(running_machine &machine, struct road_info *info)
1674	1674	{
1675	1675	int x, y;
1676		const UINT8 *gfx = machine.region("gfx3")->base();
1677		int len = machine.region("gfx3")->bytes();
	1676	const UINT8 *gfx = machine.root_device().memregion("gfx3")->base();
	1677	int len = machine.root_device().memregion("gfx3")->bytes();
1678	1678
1679	1679	/* allocate memory for the unpacked road data */
1680	1680	info->gfx = auto_alloc_array(machine, UINT8, (256 * 2 + 1) * 512);

src/mame/video/liberatr.c

r14976	r14977
68	68	{
69	69	UINT16 longitude;
70	70
71		const UINT8 *latitude_scale = machine().region("user1")->base();
72		const UINT8 *longitude_scale = machine().region("user2")->base();
	71	const UINT8 *latitude_scale = memregion("user1")->base();
	72	const UINT8 *longitude_scale = memregion("user2")->base();
73	73
74	74	/* for each starting longitude */
75	75	for (longitude = 0; longitude < 0x100; longitude++)
r14976	r14977
212	212	void liberatr_state::video_start()
213	213	{
214	214	// for each planet in the planet ROMs
215		init_planet(m_planets[0], &machine().region("gfx1")->base()[0x2000]);
216		init_planet(m_planets[1], &machine().region("gfx1")->base()[0x0000]);
	215	init_planet(m_planets[0], &machine().root_device().memregion("gfx1")->base()[0x2000]);
	216	init_planet(m_planets[1], &machine().root_device().memregion("gfx1")->base()[0x0000]);
217	217	}
218	218
219	219

src/mame/video/citycon.c

r14976	r14977
35	35	static TILE_GET_INFO( get_bg_tile_info )
36	36	{
37	37	citycon_state *state = machine.driver_data<citycon_state>();
38		UINT8 *rom = machine.region("gfx4")->base();
	38	UINT8 *rom = state->memregion("gfx4")->base();
39	39	int code = rom[0x1000 * state->m_bg_image + tile_index];
40	40	SET_TILE_INFO(
41	41	3 + state->m_bg_image,

src/mame/video/suprridr.c

r14976	r14977
57	57
58	58	PALETTE_INIT( suprridr )
59	59	{
60		const UINT8 *color_prom = machine.region("proms")->base();
	60	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
61	61	int i;
62	62
63	63	for (i = 0; i < 96; i++)

src/mame/video/psikyo.c

r14976	r14977
269	269	static const int pri[] = { 0, 0xfc, 0xff, 0xff };
270	270	int offs;
271	271	UINT16 *spritelist = (UINT16 *)(state->m_spritebuf2 + 0x1800 / 4);
272		UINT8 *TILES = machine.region("spritelut")->base();   // Sprites LUT
273		int TILES_LEN = machine.region("spritelut")->bytes();
	272	UINT8 *TILES = machine.root_device().memregion("spritelut")->base();   // Sprites LUT
	273	int TILES_LEN = machine.root_device().memregion("spritelut")->bytes();
274	274
275	275	int width = machine.primary_screen->width();
276	276	int height = machine.primary_screen->height();
r14976	r14977
388	388	static const int pri[] = { 0, 0xfc, 0xff, 0xff };
389	389	int offs;
390	390	UINT16 *spritelist = (UINT16 *)(state->m_spritebuf2 + 0x1800 / 4);
391		UINT8 *TILES = machine.region("spritelut")->base();   // Sprites LUT
392		int TILES_LEN = machine.region("spritelut")->bytes();
	391	UINT8 *TILES = machine.root_device().memregion("spritelut")->base();   // Sprites LUT
	392	int TILES_LEN = machine.root_device().memregion("spritelut")->bytes();
393	393
394	394	int width = machine.primary_screen->width();
395	395	int height = machine.primary_screen->height();

src/mame/video/ampoker2.c

r14976	r14977
73	73
74	74	PALETTE_INIT( ampoker2 )
75	75	{
76		const UINT8 *color_prom = machine.region("proms")->base();
	76	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
77	77	/*    - bits -
78	78	76543210
79	79	RRRGGGBB

src/mame/video/pgm.c

r14976	r14977
620	620	pgm_state *state = machine.driver_data<pgm_state>();
621	621	int i;
622	622
623		state->m_bdata = machine.region("sprmask")->base();
624		state->m_bdatasize = machine.region("sprmask")->bytes() - 1;
	623	state->m_bdata = machine.root_device().memregion("sprmask")->base();
	624	state->m_bdatasize = state->memregion("sprmask")->bytes() - 1;
625	625	state->m_aoffset = 0;
626	626	state->m_boffset = 0;
627	627

src/mame/video/capbowl.c

r14976	r14977
115	115
116	116	READ8_MEMBER(capbowl_state::bowlrama_blitter_r)
117	117	{
118		UINT8 data = machine().region("gfx1")->base()[m_blitter_addr];
	118	UINT8 data = memregion("gfx1")->base()[m_blitter_addr];
119	119	UINT8 result = 0;
120	120
121	121	switch (offset)

src/mame/video/ikki.c

r14976	r14977
13	13
14	14	PALETTE_INIT( ikki )
15	15	{
16		const UINT8 *color_prom = machine.region("proms")->base();
	16	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
17	17	ikki_state *state = machine.driver_data<ikki_state>();
18	18	int i;
19	19
r14976	r14977
128	128	{
129	129	ikki_state *state = screen.machine().driver_data<ikki_state>();
130	130	offs_t offs;
131		UINT8 *VIDEOATTR = screen.machine().region("user1")->base();
	131	UINT8 *VIDEOATTR = state->memregion("user1")->base();
132	132
133	133	/* draw bg layer */
134	134

src/mame/video/st0016.c

r14976	r14977
186	186	UINT32 srcadr=(st0016_vregs[0xa0]|(st0016_vregs[0xa1]<<8)|(st0016_vregs[0xa2]<<16))<<1;
187	187	UINT32 dstadr=(st0016_vregs[0xa3]|(st0016_vregs[0xa4]<<8)|(st0016_vregs[0xa5]<<16))<<1;
188	188	UINT32 length=((st0016_vregs[0xa6]|(st0016_vregs[0xa7]<<8)|((st0016_vregs[0xa8]&0x1f)<<16))+1)<<1;
189		UINT32 srclen = (machine().region("maincpu")->bytes()-0x10000);
190		UINT8 *mem = machine().region("maincpu")->base();
	189	UINT32 srclen = (machine().root_device().memregion("maincpu")->bytes()-0x10000);
	190	UINT8 *mem = memregion("maincpu")->base();
191	191
192	192	srcadr += macs_cart_slot*0x400000;
193	193

src/mame/video/sbasketb.c

r14976	r14977
28	28
29	29	PALETTE_INIT( sbasketb )
30	30	{
31		const UINT8 *color_prom = machine.region("proms")->base();
	31	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
32	32	static const int resistances[4] = { 2000, 1000, 470, 220 };
33	33	double rweights[4], gweights[4], bweights[4];
34	34	int i;

src/mame/video/ksayakyu.c

r14976	r14977
32	32
33	33	PALETTE_INIT( ksayakyu )
34	34	{
35		const UINT8 *prom = machine.region("proms")->base();
	35	const UINT8 *prom = machine.root_device().memregion("proms")->base();
36	36	int r, g, b, i;
37	37
38	38	for (i = 0; i < 0x100; i++)
r14976	r14977
47	47
48	48	static TILE_GET_INFO( get_ksayakyu_tile_info )
49	49	{
50		int code = machine.region("user1")->base()[tile_index];
51		int attr = machine.region("user1")->base()[tile_index + 0x2000];
	50	int code = machine.root_device().memregion("user1")->base()[tile_index];
	51	int attr = machine.root_device().memregion("user1")->base()[tile_index + 0x2000];
52	52	code += (attr & 3) << 8;
53	53	SET_TILE_INFO(1, code, ((attr >> 2) & 0x0f) * 2, (attr & 0x80) ? TILE_FLIPX : 0);
54	54	}

src/mame/video/atarirle.c

r14976	r14977
273	273	atarirle_data *mo = get_safe_token(device);
274	274	running_machine &machine = device->machine();
275	275	const atarirle_desc *desc = (const atarirle_desc *)device->static_config();
276		const UINT16 *base = (const UINT16 *)machine.region(desc->region)->base();
	276	const UINT16 *base = (const UINT16 *)machine.root_device().memregion(desc->region)->base();
277	277	int i, width, height;
278	278
279	279	/* build and allocate the generic tables */
r14976	r14977
303	303	mo->maxcolors     = desc->maxcolors / 16;
304	304
305	305	mo->rombase       = base;
306		mo->romlength     = machine.region(desc->region)->bytes();
	306	mo->romlength     = machine.root_device().memregion(desc->region)->bytes();
307	307	mo->objectcount   = count_objects(base, mo->romlength);
308	308
309	309	mo->cliprect      = machine.primary_screen->visible_area();

src/mame/video/ironhors.c

r14976	r14977
18	18
19	19	PALETTE_INIT( ironhors )
20	20	{
21		const UINT8 *color_prom = machine.region("proms")->base();
	21	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
22	22	static const int resistances[4] = { 2000, 1000, 470, 220 };
23	23	double rweights[4], gweights[4], bweights[4];
24	24	int i;

src/mame/video/epos.c

r14976	r14977
25	25	static void get_pens( running_machine &machine, pen_t *pens )
26	26	{
27	27	offs_t i;
28		const UINT8 *prom = machine.region("proms")->base();
29		int len = machine.region("proms")->bytes();
	28	const UINT8 *prom = machine.root_device().memregion("proms")->base();
	29	int len = machine.root_device().memregion("proms")->bytes();
30	30
31	31	for (i = 0; i < len; i++)
32	32	{

src/mame/video/glass.c

r14976	r14977
84	84	/* fill the screen bitmap with the current picture */
85	85	{
86	86	int i, j;
87		UINT8 *gfx = (UINT8 *)machine().region("gfx3")->base();
	87	UINT8 *gfx = (UINT8 *)machine().root_device().memregion("gfx3")->base();
88	88
89	89	gfx = gfx + (m_current_command & 0x07) * 0x10000 + (m_current_command & 0x08) * 0x10000 + 0x140;
90	90

src/mame/video/mcatadv.c

r14976	r14977
60	60
61	61	UINT16 *destline;
62	62	UINT8 *priline;
63		UINT8 *sprdata = machine.region("gfx1")->base();
64		int sprmask = machine.region("gfx1")->bytes()-1;
	63	UINT8 *sprdata = machine.root_device().memregion("gfx1")->base();
	64	int sprmask = state->memregion("gfx1")->bytes()-1;
65	65
66	66	int xstart, xend, xinc;
67	67	int ystart, yend, yinc;

src/mame/video/mjkjidai.c

r14976	r14977
49	49
50	50	WRITE8_MEMBER(mjkjidai_state::mjkjidai_ctrl_w)
51	51	{
52		UINT8 *rom = machine().region("maincpu")->base();
	52	UINT8 *rom = memregion("maincpu")->base();
53	53
54	54	//  logerror("%04x: port c0 = %02x\n",cpu_get_pc(&space.device()),data);
55	55
r14976	r14977
68	68	/* bits 6-7 select ROM bank */
69	69	if (data & 0xc0)
70	70	{
71		memory_set_bankptr(machine(), "bank1",rom + 0x10000-0x4000 + ((data & 0xc0) << 8));
	71	membank("bank1")->set_base(rom + 0x10000-0x4000 + ((data & 0xc0) << 8));
72	72	}
73	73	else
74	74	{
75	75	/* there is code flowing from 7fff to this bank so they have to be contiguous in memory */
76		memory_set_bankptr(machine(), "bank1",rom + 0x08000);
	76	membank("bank1")->set_base(rom + 0x08000);
77	77	}
78	78	}
79	79

src/mame/video/jailbrek.c

r14976	r14977
3	3
4	4	PALETTE_INIT( jailbrek )
5	5	{
6		const UINT8 *color_prom = machine.region("proms")->base();
	6	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
7	7	int i;
8	8
9	9	/* allocate the colortable */

src/mame/video/wecleman.c

r14976	r14977
77	77	{
78	78	wecleman_state *state = machine.driver_data<wecleman_state>();
79	79	const pen_t *base_pal = machine.pens;
80		UINT8 *base_gfx = machine.region("gfx1")->base();
81		int gfx_max     = machine.region("gfx1")->bytes();
	80	UINT8 *base_gfx = machine.root_device().memregion("gfx1")->base();
	81	int gfx_max     = state->memregion("gfx1")->bytes();
82	82
83	83	UINT16 *source = state->m_spriteram;
84	84

src/mame/video/bankp.c

r14976	r14977
35	35
36	36	PALETTE_INIT( bankp )
37	37	{
38		const UINT8 *color_prom = machine.region("proms")->base();
	38	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
39	39	int i;
40	40
41	41	/* allocate the colortable */

src/mame/video/crbaloon.c

r14976	r14977
101	101	UINT8 color = state->m_spriteram[0] >> 4;
102	102	UINT8 sy = state->m_spriteram[2] - 32;
103	103
104		UINT8 *gfx = machine.region("gfx2")->base() + (code << 7);
	104	UINT8 *gfx = state->memregion("gfx2")->base() + (code << 7);
105	105
106	106
107	107	if (state->flip_screen())

src/mame/video/pastelg.c

r14976	r14977
21	21	******************************************************************************/
22	22	PALETTE_INIT( pastelg )
23	23	{
24		const UINT8 *color_prom = machine.region("proms")->base();
	24	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
25	25	int i;
26	26	int bit0, bit1, bit2, bit3, r, g, b;
27	27
r14976	r14977
100	100
101	101	READ8_MEMBER(pastelg_state::threeds_rom_readback_r)
102	102	{
103		UINT8 *GFX = machine().region("gfx1")->base();
	103	UINT8 *GFX = memregion("gfx1")->base();
104	104
105	105	return GFX[(m_blitter_src_addr | (m_gfxrom << 16)) & 0x3ffff];
106	106	}
r14976	r14977
108	108
109	109	WRITE8_MEMBER(pastelg_state::pastelg_romsel_w)
110	110	{
111		int gfxlen = machine().region("gfx1")->bytes();
	111	int gfxlen = memregion("gfx1")->bytes();
112	112	m_gfxrom = ((data & 0xc0) >> 6);
113	113	m_palbank = ((data & 0x10) >> 4);
114	114	nb1413m3_sndrombank1_w(&space, 0, data);
r14976	r14977
158	158	static void pastelg_gfxdraw(running_machine &machine)
159	159	{
160	160	pastelg_state *state = machine.driver_data<pastelg_state>();
161		UINT8 *GFX = machine.region("gfx1")->base();
	161	UINT8 *GFX = state->memregion("gfx1")->base();
162	162	int width = machine.primary_screen->width();
163	163
164	164	int x, y;
r14976	r14977
202	202	incy = -1;
203	203	}
204	204
205		gfxlen = machine.region("gfx1")->bytes();
	205	gfxlen = machine.root_device().memregion("gfx1")->bytes();
206	206	gfxaddr = (state->m_gfxrom << 16) + state->m_blitter_src_addr;
207	207
208	208	readflag = 0;

src/mame/video/portrait.c

r14976	r14977
77	77
78	78	PALETTE_INIT( portrait )
79	79	{
80		const UINT8 *color_prom = machine.region("proms")->base();
	80	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
81	81	int i;
82		UINT8* lookup = machine.region("tileattr")->base();
	82	UINT8* lookup = machine.root_device().memregion("tileattr")->base();
83	83
84	84	/* allocate the colortable */
85	85	machine.colortable = colortable_alloc(machine, 0x40);

src/mame/video/bosco.c

r14976	r14977
16	16
17	17	PALETTE_INIT( bosco )
18	18	{
19		const UINT8 *color_prom = machine.region("proms")->base();
	19	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
20	20	int i;
21	21
22	22	machine.colortable = colortable_alloc(machine, 32+64);

src/mame/video/munchmo.c

r14976	r14977
4	4
5	5	PALETTE_INIT( mnchmobl )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
82	82	the tiles in ROM B2.2B
83	83	*/
84	84	munchmo_state *state = machine.driver_data<munchmo_state>();
85		UINT8 *rom = machine.region("gfx2")->base();
	85	UINT8 *rom = state->memregion("gfx2")->base();
86	86	const gfx_element *gfx = machine.gfx[1];
87	87	int offs;
88	88

src/mame/video/funkybee.c

r14976	r14977
11	11
12	12	PALETTE_INIT( funkybee )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	int i;
16	16
17	17	/* first, the character/sprite palette */

src/mame/video/galastrm.c

r14976	r14977
90	90	{
91	91	galastrm_state *state = machine.driver_data<galastrm_state>();
92	92	UINT32 *spriteram32 = state->m_spriteram;
93		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	93	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
94	94	int offs, data, tilenum, color, flipx, flipy;
95	95	int x, y, priority, dblsize, curx, cury;
96	96	int sprites_flipscreen = 0;

src/mame/video/alpha68k.c

r14976	r14977
342	342	alpha68k_state *state = machine.driver_data<alpha68k_state>();
343	343	UINT16 *spriteram = state->m_spriteram;
344	344	int data, offs, mx, my, tile, color, fy, i;
345		UINT8 *color_prom = machine.region("user1")->base();
	345	UINT8 *color_prom = state->memregion("user1")->base();
346	346	gfx_element *gfx = machine.gfx[0];
347	347
348	348	for (offs = 0; offs < 0x400; offs += 0x20)
r14976	r14977
383	383
384	384	PALETTE_INIT( kyros )
385	385	{
386		const UINT8 *color_prom = machine.region("proms")->base();
	386	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
387	387	int i;
388	388
389	389	/* allocate the colortable */
r14976	r14977
411	411
412	412	PALETTE_INIT( paddlem )
413	413	{
414		const UINT8 *color_prom = machine.region("proms")->base();
	414	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
415	415	int i;
416	416
417	417	/* allocate the colortable */
r14976	r14977
453	453	UINT16 *spriteram = state->m_spriteram;
454	454	int offs, mx, my, color, tile, i, bank, fy, fx;
455	455	int data;
456		UINT8 *color_prom = machine.region("user1")->base();
	456	UINT8 *color_prom = state->memregion("user1")->base();
457	457
458	458	//AT
459	459	for (offs = 0; offs < 0x400; offs += 0x20)

src/mame/video/namcos22.c

r14976	r14977
861	861	}
862	862	else
863	863	{ /* system 22 */
864		const UINT8 *rlut = 0x000+(const UINT8 *)machine.region("user1")->base();
	864	const UINT8 *rlut = 0x000+(const UINT8 *)machine.root_device().memregion("user1")->base();
865	865	const UINT8 *glut = 0x100+rlut;
866	866	const UINT8 *blut = 0x200+rlut;
867	867	for( y=0; y<bitmap.height(); y++ )
r14976	r14977
2741	2741	for (code = 0; code < machine.gfx[GFX_TEXTURE_TILE]->total_elements; code++)
2742	2742	gfx_element_decode(machine.gfx[GFX_TEXTURE_TILE], code);
2743	2743
2744		Prepare3dTexture(machine, machine.region("textilemap")->base(), machine.gfx[GFX_TEXTURE_TILE]->gfxdata );
	2744	Prepare3dTexture(machine, machine.root_device().memregion("textilemap")->base(), machine.gfx[GFX_TEXTURE_TILE]->gfxdata );
2745	2745	state->m_dirtypal = auto_alloc_array(machine, UINT8, NAMCOS22_PALETTE_SIZE/4);
2746		state->m_mPtRomSize = machine.region("pointrom")->bytes()/3;
2747		state->m_mpPolyL = machine.region("pointrom")->base();
	2746	state->m_mPtRomSize = machine.root_device().memregion("pointrom")->bytes()/3;
	2747	state->m_mpPolyL = state->memregion("pointrom")->base();
2748	2748	state->m_mpPolyM = state->m_mpPolyL + state->m_mPtRomSize;
2749	2749	state->m_mpPolyH = state->m_mpPolyM + state->m_mPtRomSize;
2750	2750

src/mame/video/redclash.c

r14976	r14977
20	20
21	21	PALETTE_INIT( redclash )
22	22	{
23		const UINT8 *color_prom = machine.region("proms")->base();
	23	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
24	24	int i;
25	25
26	26	/* allocate the colortable */

src/mame/video/vicdual.c

r14976	r14977
82	82	SCREEN_UPDATE_RGB32( vicdual_color )
83	83	{
84	84	vicdual_state *state = screen.machine().driver_data<vicdual_state>();
85		UINT8 *color_prom = (UINT8 *)screen.machine().region("proms")->base();
	85	UINT8 *color_prom = (UINT8 *)state->memregion("proms")->base();
86	86	UINT8 x = 0;
87	87	UINT8 y = cliprect.min_y;
88	88	UINT8 video_data = 0;

src/mame/video/galaxold.c

r14976	r14977
7	7	#include "emu.h"
8	8	#include "includes/galaxold.h"
9	9
10		#define STARS_COLOR_BASE      (machine.region("proms")->bytes())
	10	#define STARS_COLOR_BASE      (machine.root_device().memregion("proms")->bytes())
11	11	#define BULLETS_COLOR_BASE      (STARS_COLOR_BASE + 64)
12	12	#define BACKGROUND_COLOR_BASE   (BULLETS_COLOR_BASE + 2)
13	13
r14976	r14977
94	94	***************************************************************************/
95	95	PALETTE_INIT( galaxold )
96	96	{
97		const UINT8 *color_prom = machine.region("proms")->base();
	97	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
98	98	int i, len;
99	99
100	100
101	101	/* first, the character/sprite palette */
102		len = machine.region("proms")->bytes();
	102	len = machine.root_device().memregion("proms")->bytes();
103	103	for (i = 0;i < len;i++)
104	104	{
105	105	int bit0,bit1,bit2,r,g,b;
r14976	r14977
169	169
170	170	PALETTE_INIT( rockclim )
171	171	{
172		const UINT8 *color_prom = machine.region("proms")->base();
	172	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
173	173	int i, len;
174	174
175	175
176	176	/* first, the character/sprite palette */
177		len = machine.region("proms")->bytes();
	177	len = machine.root_device().memregion("proms")->bytes();
178	178	for (i = 0;i < len;i++)
179	179	{
180	180	int bit0,bit1,bit2,r,g,b;
r14976	r14977
218	218	***************************************************************************/
219	219	PALETTE_INIT( darkplnt )
220	220	{
221		const UINT8 *color_prom = machine.region("proms")->base();
	221	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
222	222	int i;
223	223
224	224
r14976	r14977
338	338	/* swapped r/g/b hook-up */
339	339	PALETTE_INIT( dambustr )
340	340	{
341		const UINT8 *color_prom = machine.region("proms")->base();
	341	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
342	342	int base = BACKGROUND_COLOR_BASE;
343	343	int i, len;
344	344
345	345	/* first, the character/sprite palette */
346		len = machine.region("proms")->bytes();
	346	len = machine.root_device().memregion("proms")->bytes();
347	347
348	348	for (i = 0;i < len;i++)
349	349	{
r14976	r14977
1043	1043
1044	1044	/* bit 0 of the PROM controls character banking */
1045	1045
1046		prom = machine.region("user2")->base();
	1046	prom = machine.root_device().memregion("user2")->base();
1047	1047
1048	1048	*code |= ((prom[x] & 0x01) << 8);
1049	1049	}
r14976	r14977
1230	1230	the green gun if BCG is asserted
1231	1231	bits 2-7 are unconnected */
1232	1232
1233		prom = machine.region("user1")->base();
	1233	prom = state->memregion("user1")->base();
1234	1234
1235	1235	for (x = 0; x < 32; x++)
1236	1236	{
r14976	r14977
1305	1305	line (column) of the screen.  The first 0x20 bytes for unflipped,
1306	1306	and the 2nd 0x20 bytes for flipped screen. */
1307	1307
1308		prom = machine.region("user1")->base();
	1308	prom = state->memregion("user1")->base();
1309	1309
1310	1310	if (state->m_flipscreen_x)
1311	1311	{
r14976	r14977
1606	1606
1607	1607	/* bit 2 of the PROM controls star visibility */
1608	1608
1609		prom = machine.region("user2")->base();
	1609	prom = machine.root_device().memregion("user2")->base();
1610	1610
1611	1611	for (offs = 0;offs < STAR_COUNT;offs++)
1612	1612	{

src/mame/video/centiped.c

r14976	r14977
290	290
291	291	PALETTE_INIT( warlords )
292	292	{
293		const UINT8 *color_prom = machine.region("proms")->base();
	293	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
294	294	int i;
295	295
296	296	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
415	415	m_generic_paletteram_8[offset] = data;
416	416
417	417	/* the value passed in is a look-up index into the color PROM */
418		melliped_mazeinv_set_color(machine(), offset, ~machine().region("proms")->base()[~data & 0x0f]);
	418	melliped_mazeinv_set_color(machine(), offset, ~machine().root_device().memregion("proms")->base()[~data & 0x0f]);
419	419	}
420	420
421	421

src/mame/video/atarisy1.c

r14976	r14977
557	557	static void decode_gfx(running_machine &machine, UINT16 *pflookup, UINT16 *molookup)
558	558	{
559	559	atarisy1_state *state = machine.driver_data<atarisy1_state>();
560		UINT8 *prom1 = &machine.region("proms")->u8(0x000);
561		UINT8 *prom2 = &machine.region("proms")->u8(0x200);
	560	UINT8 *prom1 = &machine.root_device().memregion("proms")->u8(0x000);
	561	UINT8 *prom2 = &state->memregion("proms")->u8(0x200);
562	562	int obj, i;
563	563
564	564	/* reset the globals */
r14976	r14977
649	649	return state->m_bank_gfx[bpp - 4][bank_index];
650	650
651	651	/* if the bank is out of range, call it 0 */
652		const memory_region *tiles = machine.region("tiles");
	652	memory_region *tiles = machine.root_device().memregion("tiles");
653	653	if (0x80000 * (bank_index - 1) >= tiles->bytes())
654	654	return 0;
655	655

src/mame/video/tceptor.c

r14976	r14977
20	20
21	21	PALETTE_INIT( tceptor )
22	22	{
23		const UINT8 *color_prom = machine.region("proms")->base();
	23	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
24	24	tceptor_state *state = machine.driver_data<tceptor_state>();
25	25	int i;
26	26
r14976	r14977
243	243	};
244	244
245	245	int gfx_index = state->m_bg;
246		UINT8 *src = machine.region(region)->base() + 0x8000;
	246	UINT8 *src = machine.root_device().memregion(region)->base() + 0x8000;
247	247	UINT8 *buffer;
248	248	int len = 0x8000;
249	249	int i;
r14976	r14977
261	261	auto_free(machine, buffer);
262	262
263	263	/* decode the graphics */
264		machine.gfx[gfx_index] = gfx_element_alloc(machine, &bg_layout, machine.region(region)->base(), 64, 2048);
	264	machine.gfx[gfx_index] = gfx_element_alloc(machine, &bg_layout, machine.root_device().memregion(region)->base(), 64, 2048);
265	265	}
266	266
267	267	static void decode_sprite(running_machine &machine, int gfx_index, const gfx_layout *layout, const void *data)
r14976	r14977
291	291	2*16*16
292	292	};
293	293
294		UINT8 *src = machine.region(region)->base();
295		int len = machine.region(region)->bytes();
	294	UINT8 *src = machine.root_device().memregion(region)->base();
	295	int len = machine.root_device().memregion(region)->bytes();
296	296	UINT8 *dst;
297	297	int i, y;
298	298
r14976	r14977
343	343	2*32*32
344	344	};
345	345
346		UINT8 *src = machine.region(region)->base();
347		int len = machine.region(region)->bytes();
	346	UINT8 *src = machine.root_device().memregion(region)->base();
	347	int len = machine.root_device().memregion(region)->bytes();
348	348	int total = spr32_layout.total;
349	349	int size = spr32_layout.charincrement / 8;
350	350	UINT8 *dst;

src/mame/video/cop01.c

r14976	r14977
12	12
13	13	PALETTE_INIT( cop01 )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	/* allocate the colortable */

src/mame/video/hanaawas.c

r14976	r14977
17	17
18	18	PALETTE_INIT( hanaawas )
19	19	{
20		const UINT8 *color_prom = machine.region("proms")->base();
	20	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
21	21	int i;
22	22
23	23	/* allocate the colortable */

src/mame/video/metro.c

r14976	r14977
273	273
274	274	static void expand_gfx1(metro_state &state)
275	275	{
276		UINT8 *base_gfx = state.machine().region("gfx1")->base();
277		UINT32 length = 2 * state.machine().region("gfx1")->bytes();
	276	UINT8 *base_gfx = state.machine().root_device().memregion("gfx1")->base();
	277	UINT32 length = 2 * state.machine().root_device().memregion("gfx1")->bytes();
278	278	state.m_expanded_gfx1 = auto_alloc_array(state.machine(), UINT8, length);
279	279	for (int i = 0; i < length; i += 2)
280	280	{
r14976	r14977
446	446	{
447	447	metro_state *state = machine.driver_data<metro_state>();
448	448	UINT8 *base_gfx4 = state->m_expanded_gfx1;
449		UINT8 *base_gfx8 = machine.region("gfx1")->base();
450		UINT32 gfx_size = machine.region("gfx1")->bytes();
	449	UINT8 *base_gfx8 = machine.root_device().memregion("gfx1")->base();
	450	UINT32 gfx_size = state->memregion("gfx1")->bytes();
451	451	const rectangle &visarea = machine.primary_screen->visible_area();
452	452
453	453	int max_x = visarea.max_x + 1;

src/mame/video/circusc.c

r14976	r14977
32	32
33	33	PALETTE_INIT( circusc )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	static const int resistances_rg[3] = { 1000, 470, 220 };
37	37	static const int resistances_b [2] = { 470, 220 };
38	38	double rweights[3], gweights[3], bweights[2];

src/mame/video/mikie.c

r14976	r14977
28	28
29	29	PALETTE_INIT( mikie )
30	30	{
31		const UINT8 *color_prom = machine.region("proms")->base();
	31	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
32	32	static const int resistances[4] = { 2200, 1000, 470, 220 };
33	33	double rweights[4], gweights[4], bweights[4];
34	34	int i;

src/mame/video/zaccaria.c

r14976	r14977
35	35	***************************************************************************/
36	36	PALETTE_INIT( zaccaria )
37	37	{
38		const UINT8 *color_prom = machine.region("proms")->base();
	38	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
39	39	int i, j, k;
40	40	static const int resistances_rg[] = { 1200, 1000, 820 };
41	41	static const int resistances_b[]  = { 1000, 820 };

src/mame/video/tagteam.c

r14976	r14977
34	34
35	35	PALETTE_INIT( tagteam )
36	36	{
37		const UINT8 *color_prom = machine.region("proms")->base();
	37	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
38	38	rgb_t *rgb;
39	39
40	40	rgb = compute_res_net_all(machine, color_prom, &tagteam_decode_info, &tagteam_net_info);

src/mame/video/bagman.c

r14976	r14977
44	44	***************************************************************************/
45	45	PALETTE_INIT( bagman )
46	46	{
47		const UINT8 *color_prom = machine.region("proms")->base();
	47	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
48	48	int i;
49	49	static const int resistances_rg[3] = { 1000, 470, 220 };
50	50	static const int resistances_b [2] = { 470, 220 };

src/mame/video/spacefb.c

r14976	r14977
209	209	{
210	210	spacefb_state *state = machine.driver_data<spacefb_state>();
211	211	static const double fade_weights[] = { 1.0, 1.5, 2.5, 4.0 };
212		const UINT8 *prom = machine.region("proms")->base();
	212	const UINT8 *prom = machine.root_device().memregion("proms")->base();
213	213	int i;
214	214
215	215	for (i = 0; i < NUM_SPRITE_PENS; i++)
r14976	r14977
251	251	spacefb_state *state = machine.driver_data<spacefb_state>();
252	252	UINT8 sy;
253	253
254		UINT8 *gfx = machine.region("gfx2")->base();
	254	UINT8 *gfx = state->memregion("gfx2")->base();
255	255
256	256	UINT8 code = state->m_videoram[offs + 0x0200] & 0x3f;
257	257	UINT8 y = ~state->m_videoram[offs + 0x0100] - 2;
r14976	r14977
303	303	spacefb_state *state = machine.driver_data<spacefb_state>();
304	304	UINT8 sy;
305	305
306		UINT8 *gfx = machine.region("gfx1")->base();
	306	UINT8 *gfx = state->memregion("gfx1")->base();
307	307
308	308	UINT8 code = ~state->m_videoram[offs + 0x0200];
309	309	UINT8 color_base = (~state->m_videoram[offs + 0x0300] & 0x0f) << 2;

src/mame/video/m52.c

r14976	r14977
19	19
20	20	PALETTE_INIT( m52 )
21	21	{
22		const UINT8 *color_prom = machine.region("proms")->base();
	22	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
23	23	const UINT8 *char_pal = color_prom + 0x000;
24	24	const UINT8 *back_pal = color_prom + 0x200;
25	25	const UINT8 *sprite_pal = color_prom + 0x220;

src/mame/video/bfm_adr2.c

r14976	r14977
186	186	adder2_data_to_sc2       = 0;
187	187
188	188	{
189		UINT8 *rom = machine.region("adder2")->base();
	189	UINT8 *rom = machine.root_device().memregion("adder2")->base();
190	190
191		memory_configure_bank(machine, "bank2", 0, 4, &rom[0x00000], 0x08000);
	191	machine.root_device().membank("bank2")->configure_entries(0, 4, &rom[0x00000], 0x08000);
192	192
193		memory_set_bank(machine, "bank2",0&0x03);
	193	machine.root_device().membank("bank2")->set_entry(0&0x03);
194	194	}
195	195	}
196	196
r14976	r14977
323	323
324	324	static WRITE8_HANDLER( adder2_rom_page_w )
325	325	{
326		memory_set_bank(space->machine(), "bank2",data&0x03);
	326	space->machine().root_device().membank("bank2")->set_entry(data&0x03);
327	327	}
328	328
329	329	///////////////////////////////////////////////////////////////////////////
r14976	r14977
452	452	{
453	453	UINT8 *p;
454	454
455		p = machine.region("gfx1")->base();
	455	p = machine.root_device().memregion("gfx1")->base();
456	456
457	457	if ( p )
458	458	{

src/mame/video/ojankohs.c

r14976	r14977
19	19
20	20	PALETTE_INIT( ojankoy )
21	21	{
22		const UINT8 *color_prom = machine.region("proms")->base();
	22	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
23	23	int i;
24	24	int bit0, bit1, bit2, bit3, bit4, r, g, b;
25	25

src/mame/video/n8080.c

r14976	r14977
147	147	int y;
148	148
149	149	const UINT8* pRAM = state->m_videoram;
150		const UINT8* pPROM = screen.machine().region("proms")->base();
	150	const UINT8* pPROM = state->memregion("proms")->base();
151	151
152	152	for (y = 0; y < 256; y++)
153	153	{
r14976	r14977
213	213	n8080_state *state = screen.machine().driver_data<n8080_state>();
214	214	UINT8 mask = state->flip_screen() ? 0xff : 0x00;
215	215
216		const UINT8* pPROM = screen.machine().region("proms")->base();
	216	const UINT8* pPROM = state->memregion("proms")->base();
217	217
218	218	int x;
219	219	int y;

src/mame/video/nbmj8891.c

r14976	r14977
252	252
253	253	WRITE8_MEMBER(nbmj8891_state::nbmj8891_romsel_w)
254	254	{
255		int gfxlen = machine().region("gfx1")->bytes();
	255	int gfxlen = memregion("gfx1")->bytes();
256	256	m_gfxrom = (data & 0x0f);
257	257
258	258	if ((0x20000 * m_gfxrom) > (gfxlen - 1))
r14976	r14977
320	320	static void nbmj8891_gfxdraw(running_machine &machine)
321	321	{
322	322	nbmj8891_state *state = machine.driver_data<nbmj8891_state>();
323		UINT8 *GFX = machine.region("gfx1")->base();
	323	UINT8 *GFX = state->memregion("gfx1")->base();
324	324	int width = machine.primary_screen->width();
325	325
326	326	int x, y;
r14976	r14977
359	359	skipy = -1;
360	360	}
361	361
362		gfxlen = machine.region("gfx1")->bytes();
	362	gfxlen = machine.root_device().memregion("gfx1")->bytes();
363	363	gfxaddr = (state->m_gfxrom << 17) + (state->m_blitter_src_addr << 1);
364	364
365	365	for (y = starty, ctry = sizey; ctry >= 0; y += skipy, ctry--)
r14976	r14977
472	472	VIDEO_START( nbmj8891_1layer )
473	473	{
474	474	nbmj8891_state *state = machine.driver_data<nbmj8891_state>();
475		UINT8 *CLUT = machine.region("protection")->base();
	475	UINT8 *CLUT = state->memregion("protection")->base();
476	476	int i;
477	477	int width = machine.primary_screen->width();
478	478	int height = machine.primary_screen->height();

src/mame/video/kncljoe.c

r14976	r14977
16	16
17	17	PALETTE_INIT( kncljoe )
18	18	{
19		const UINT8 *color_prom = machine.region("proms")->base();
	19	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
20	20	int i;
21	21
22	22	/* allocate the colortable */
r14976	r14977
154	154	if (m_sprite_bank != i)
155	155	{
156	156	m_sprite_bank = i;
157		memset(machine().region("maincpu")->base() + 0xf100, 0, 0x180);
	157	memset(machine().root_device().memregion("maincpu")->base() + 0xf100, 0, 0x180);
158	158	}
159	159	}
160	160

src/mame/video/spdodgeb.c

r14976	r14977
5	5
6	6	PALETTE_INIT( spdodgeb )
7	7	{
8		const UINT8 *color_prom = machine.region("proms")->base();
	8	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
9	9	int i;
10	10
11	11
r14976	r14977
108	108
109	109	WRITE8_MEMBER(spdodgeb_state::spdodgeb_ctrl_w)
110	110	{
111		UINT8 *rom = machine().region("maincpu")->base();
	111	UINT8 *rom = memregion("maincpu")->base();
112	112
113	113	/* bit 0 = flip screen */
114	114	flip_screen_set(data & 0x01);
115	115
116	116	/* bit 1 = ROM bank switch */
117		memory_set_bankptr(machine(), "bank1",rom + 0x10000 + 0x4000 * ((~data & 0x02) >> 1));
	117	membank("bank1")->set_base(rom + 0x10000 + 0x4000 * ((~data & 0x02) >> 1));
118	118
119	119	/* bit 2 = scroll high bit */
120	120	m_lastscroll = (m_lastscroll & 0x0ff) | ((data & 0x04) << 6);

src/mame/video/liberate.c

r14976	r14977
40	40	static TILE_GET_INFO( get_back_tile_info )
41	41	{
42	42	liberate_state *state = machine.driver_data<liberate_state>();
43		const UINT8 *RAM = machine.region("user1")->base();
	43	const UINT8 *RAM = state->memregion("user1")->base();
44	44	int tile, bank;
45	45
46	46	/* Convert tile index of 512x512 to paged format */
r14976	r14977
253	253
254	254	PALETTE_INIT( liberate )
255	255	{
256		const UINT8 *color_prom = machine.region("proms")->base();
	256	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
257	257	int i, bit0, bit1, bit2, g, r, b;
258	258
259	259	for (i = 0;i < 32;i++)

src/mame/video/gunsmoke.c

r14976	r14977
18	18
19	19	PALETTE_INIT( gunsmoke )
20	20	{
21		const UINT8 *color_prom = machine.region("proms")->base();
	21	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
22	22	int i;
23	23
24	24	/* allocate the colortable */
r14976	r14977
79	79	coin_counter_w(machine(), 0, data & 0x02);
80	80
81	81	/* bits 2 and 3 select the ROM bank */
82		memory_set_bank(machine(), "bank1", (data & 0x0c) >> 2);
	82	membank("bank1")->set_entry((data & 0x0c) >> 2);
83	83
84	84	/* bit 5 resets the sound CPU? - we ignore it */
85	85
r14976	r14977
105	105
106	106	static TILE_GET_INFO( get_bg_tile_info )
107	107	{
108		UINT8 *tilerom = machine.region("gfx4")->base();
	108	UINT8 *tilerom = machine.root_device().memregion("gfx4")->base();
109	109
110	110	int offs = tile_index * 2;
111	111	int attr = tilerom[offs + 1];

src/mame/video/turbo.c

r14976	r14977
283	283
284	284	static void turbo_prepare_sprites(running_machine &machine, turbo_state *state, UINT8 y, sprite_info *info)
285	285	{
286		const UINT8 *pr1119 = machine.region("proms")->base() + 0x200;
	286	const UINT8 *pr1119 = machine.root_device().memregion("proms")->base() + 0x200;
287	287	int sprnum;
288	288
289	289	/* initialize the line enable signals to 0 */
r14976	r14977
349	349
350	350	static UINT32 turbo_get_sprite_bits(running_machine &machine, UINT8 road, sprite_info *sprinfo)
351	351	{
352		const UINT8 *sprite_gfxdata = machine.region("gfx1")->base();
	352	const UINT8 *sprite_gfxdata = machine.root_device().memregion("gfx1")->base();
353	353	UINT8 sprlive = sprinfo->lst;
354	354	UINT32 sprdata = 0;
355	355	int level;
r14976	r14977
406	406	{
407	407	turbo_state *state = screen.machine().driver_data<turbo_state>();
408	408	bitmap_ind16 &fgpixmap = state->m_fg_tilemap->pixmap();
409		const UINT8 *road_gfxdata = screen.machine().region("gfx3")->base();
410		const UINT8 *prom_base = screen.machine().region("proms")->base();
	409	const UINT8 *road_gfxdata = screen.machine().root_device().memregion("gfx3")->base();
	410	const UINT8 *prom_base = state->memregion("proms")->base();
411	411	const UINT8 *pr1114 = prom_base + 0x000;
412	412	const UINT8 *pr1115 = prom_base + 0x020;
413	413	const UINT8 *pr1116 = prom_base + 0x040;
r14976	r14977
642	642
643	643	static void subroc3d_prepare_sprites(running_machine &machine, turbo_state *state, UINT8 y, sprite_info *info)
644	644	{
645		const UINT8 *pr1449 = machine.region("proms")->base() + 0x300;
	645	const UINT8 *pr1449 = machine.root_device().memregion("proms")->base() + 0x300;
646	646	int sprnum;
647	647
648	648	/* initialize the line enable signals to 0 */
r14976	r14977
708	708	end is in bit 1, plb in bit 0
709	709	*/
710	710	static const UINT8 plb_end[16] = { 0,1,1,2, 1,1,1,1, 1,1,1,1, 0,1,1,2 };
711		const UINT8 *sprite_gfxdata = machine.region("gfx1")->base();
	711	const UINT8 *sprite_gfxdata = machine.root_device().memregion("gfx1")->base();
712	712	UINT32 sprdata = 0;
713	713	int level;
714	714
r14976	r14977
761	761	{
762	762	turbo_state *state = screen.machine().driver_data<turbo_state>();
763	763	bitmap_ind16 &fgpixmap = state->m_fg_tilemap->pixmap();
764		const UINT8 *prom_base = screen.machine().region("proms")->base();
	764	const UINT8 *prom_base = state->memregion("proms")->base();
765	765	const UINT8 *pr1419 = prom_base + 0x000;
766	766	const UINT8 *pr1620 = prom_base + 0x200;
767	767	const UINT8 *pr1450 = prom_base + 0x500;
r14976	r14977
861	861
862	862	static void buckrog_prepare_sprites(running_machine &machine, turbo_state *state, UINT8 y, sprite_info *info)
863	863	{
864		const UINT8 *pr5196 = machine.region("proms")->base() + 0x100;
	864	const UINT8 *pr5196 = machine.root_device().memregion("proms")->base() + 0x100;
865	865	int sprnum;
866	866
867	867	/* initialize the line enable signals to 0 */
r14976	r14977
928	928	end is in bit 1, plb in bit 0
929	929	*/
930	930	static const UINT8 plb_end[16] = { 0,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,2 };
931		const UINT8 *sprite_gfxdata = machine.region("gfx1")->base();
	931	const UINT8 *sprite_gfxdata = machine.root_device().memregion("gfx1")->base();
932	932	UINT32 sprdata = 0;
933	933	int level;
934	934
r14976	r14977
981	981	{
982	982	turbo_state *state = screen.machine().driver_data<turbo_state>();
983	983	bitmap_ind16 &fgpixmap = state->m_fg_tilemap->pixmap();
984		const UINT8 *bgcolor = screen.machine().region("gfx3")->base();
985		const UINT8 *prom_base = screen.machine().region("proms")->base();
	984	const UINT8 *bgcolor = screen.machine().root_device().memregion("gfx3")->base();
	985	const UINT8 *prom_base = state->memregion("proms")->base();
986	986	const UINT8 *pr5194 = prom_base + 0x000;
987	987	const UINT8 *pr5198 = prom_base + 0x500;
988	988	const UINT8 *pr5199 = prom_base + 0x700;

src/mame/video/cvs.c

r14976	r14977
27	27
28	28	PALETTE_INIT( cvs )
29	29	{
30		const UINT8 *color_prom = machine.region("proms")->base();
	30	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
31	31	int i, attr;
32	32
33	33	/* allocate the colortable */

src/mame/video/seta.c

r14976	r14977
290	290
291	291	if (new_bank != m_samples_bank)
292	292	{
293		UINT8 *rom = machine().region("x1snd")->base();
294		int samples_len = machine().region("x1snd")->bytes();
	293	UINT8 *rom = memregion("x1snd")->base();
	294	int samples_len = memregion("x1snd")->bytes();
295	295	int addr;
296	296
297	297	m_samples_bank = new_bank;
r14976	r14977
665	665	// color prom
666	666	PALETTE_INIT( inttoote )
667	667	{
668		const UINT8 *color_prom = machine.region("proms")->base();
	668	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
669	669	int x;
670	670	for (x = 0; x < 0x200 ; x++)
671	671	{
r14976	r14977
684	684
685	685	PALETTE_INIT( usclssic )
686	686	{
687		const UINT8 *color_prom = machine.region("proms")->base();
	687	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
688	688	int color, pen;
689	689	int x;
690	690

src/mame/video/tnzs.c

r14976	r14977
32	32
33	33	PALETTE_INIT( arknoid2 )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	int i, col;
37	37
38	38	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/tp84.c

r14976	r14977
43	43	*/
44	44	PALETTE_INIT( tp84 )
45	45	{
46		const UINT8 *color_prom = machine.region("proms")->base();
	46	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
47	47	static const int resistances[4] = { 1000, 470, 220, 100 };
48	48	double weights[4];
49	49	int i;

src/mame/video/vball.c

r14976	r14977
76	76
77	77	if (bank==state->m_vb_bgprombank) return;
78	78
79		color_prom = machine.region("proms")->base() + bank*0x80;
	79	color_prom = state->memregion("proms")->base() + bank*0x80;
80	80	for (i=0;i<128;i++, color_prom++) {
81	81	palette_set_color_rgb(machine,i,pal4bit(color_prom[0] >> 0),pal4bit(color_prom[0] >> 4),
82	82	pal4bit(color_prom[0x800] >> 0));
r14976	r14977
93	93
94	94	if (bank==state->m_vb_spprombank) return;
95	95
96		color_prom = machine.region("proms")->base()+0x400 + bank*0x80;
	96	color_prom = state->memregion("proms")->base()+0x400 + bank*0x80;
97	97	for (i=128;i<256;i++,color_prom++)   {
98	98	palette_set_color_rgb(machine,i,pal4bit(color_prom[0] >> 0),pal4bit(color_prom[0] >> 4),
99	99	pal4bit(color_prom[0x800] >> 0));

src/mame/video/higemaru.c

r14976	r14977
21	21
22	22	PALETTE_INIT( higemaru )
23	23	{
24		const UINT8 *color_prom = machine.region("proms")->base();
	24	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
25	25	int i;
26	26
27	27	/* allocate the colortable */

src/mame/video/plygonet.c

r14976	r14977
102	102	assert(state->m_ttl_gfx_index != MAX_GFX_ELEMENTS);
103	103
104	104	/* decode the ttl layer's gfx */
105		machine.gfx[state->m_ttl_gfx_index] = gfx_element_alloc(machine, &charlayout, machine.region("gfx1")->base(), machine.total_colors() / 16, 0);
	105	machine.gfx[state->m_ttl_gfx_index] = gfx_element_alloc(machine, &charlayout, machine.root_device().memregion("gfx1")->base(), machine.total_colors() / 16, 0);
106	106
107	107	/* create the tilemap */
108	108	state->m_ttl_tilemap = tilemap_create(machine, ttl_get_tile_info, plygonet_scan,  8, 8, 64, 32);

src/mame/video/cheekyms.c

r14976	r14977
17	17
18	18	PALETTE_INIT( cheekyms )
19	19	{
20		const UINT8 *color_prom = machine.region("proms")->base();
	20	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
21	21	int i, j, bit, r, g, b;
22	22
23	23	for (i = 0; i < 6; i++)

src/mame/video/magmax.c

r14976	r14977
26	26	***************************************************************************/
27	27	PALETTE_INIT( magmax )
28	28	{
29		const UINT8 *color_prom = machine.region("proms")->base();
	29	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
30	30	int i;
31	31
32	32	/* allocate the colortable */
r14976	r14977
66	66	{
67	67	magmax_state *state = machine.driver_data<magmax_state>();
68	68	int i,v;
69		UINT8 * prom14D = machine.region("user2")->base();
	69	UINT8 * prom14D = state->memregion("user2")->base();
70	70
71	71	/* Set up save state */
72	72	state_save_register_global(machine, state->m_flipscreen);
r14976	r14977
101	101	else
102	102	{
103	103	int v;
104		UINT8 * rom18B = screen.machine().region("user1")->base();
	104	UINT8 * rom18B = state->memregion("user1")->base();
105	105	UINT32 scroll_h = (*state->m_scroll_x) & 0x3fff;
106	106	UINT32 scroll_v = (*state->m_scroll_y) & 0xff;
107	107

src/mame/video/timelimt.c

r14976	r14977
21	21	***************************************************************************/
22	22
23	23	PALETTE_INIT( timelimt ) {
24		const UINT8 *color_prom = machine.region("proms")->base();
	24	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
25	25	int i;
26	26
27	27	for (i = 0;i < machine.total_colors();i++)

src/mame/video/1942.c

r14976	r14977
26	26
27	27	PALETTE_INIT( 1942 )
28	28	{
29		const UINT8 *color_prom = machine.region("proms")->base();
	29	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
30	30	rgb_t palette[256];
31	31	int i, colorbase;
32	32

src/mame/video/bombjack.c

r14976	r14977
43	43	static TILE_GET_INFO( get_bg_tile_info )
44	44	{
45	45	bombjack_state *state = machine.driver_data<bombjack_state>();
46		UINT8 *tilerom = machine.region("gfx4")->base();
	46	UINT8 *tilerom = state->memregion("gfx4")->base();
47	47
48	48	int offs = (state->m_background_image & 0x07) * 0x200 + tile_index;
49	49	int code = (state->m_background_image & 0x10) ? tilerom[offs] : 0;

src/mame/video/trucocl.c

r14976	r14977
38	38
39	39	PALETTE_INIT( trucocl )
40	40	{
41		const UINT8 *color_prom = machine.region("proms")->base();
	41	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
42	42	int i;
43	43
44	44	for (i = 0;i < 32;i++)

src/mame/video/gridlee.c

r14976	r14977
20	20
21	21	PALETTE_INIT( gridlee )
22	22	{
23		const UINT8 *color_prom = machine.region("proms")->base();
	23	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
24	24	int i;
25	25
26	26	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
158	158	}
159	159
160	160	/* draw the sprite images */
161		gfx = screen.machine().region("gfx1")->base();
	161	gfx = screen.machine().root_device().memregion("gfx1")->base();
162	162	for (i = 0; i < 32; i++)
163	163	{
164	164	UINT8 *sprite = state->m_spriteram + i * 4;

src/mame/video/rallyx.c

r14976	r14977
57	57
58	58	PALETTE_INIT( rallyx )
59	59	{
60		const UINT8 *color_prom = machine.region("proms")->base();
	60	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
61	61	static const int resistances_rg[3] = { 1000, 470, 220 };
62	62	static const int resistances_b [2] = { 470, 220 };
63	63	double rweights[3], gweights[3], bweights[2];
r14976	r14977
116	116
117	117	PALETTE_INIT( jungler )
118	118	{
119		const UINT8 *color_prom = machine.region("proms")->base();
	119	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
120	120	static const int resistances_rg[3]   = { 1000, 470, 220 };
121	121	static const int resistances_b [2]   = { 470, 220 };
122	122	static const int resistances_star[3] = { 150, 100 };

src/mame/video/segag80v.c

r14976	r14977
110	110	static void sega_generate_vector_list(running_machine &machine)
111	111	{
112	112	segag80v_state *state = machine.driver_data<segag80v_state>();
113		UINT8 *sintable = machine.region("proms")->base();
	113	UINT8 *sintable = state->memregion("proms")->base();
114	114	double total_time = 1.0 / (double)IRQ_CLOCK;
115	115	UINT16 symaddr = 0;
116	116	UINT8 *vectorram = state->m_vectorram;

src/mame/video/carjmbre.c

r14976	r14977
32	32
33	33	PALETTE_INIT( carjmbre )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	rgb_t *rgb;
37	37
38	38	rgb = compute_res_net_all(machine, color_prom, &carjmbre_decode_info, &carjmbre_net_info);

src/mame/video/superchs.c

r14976	r14977
58	58	{
59	59	superchs_state *state = machine.driver_data<superchs_state>();
60	60	UINT32 *spriteram32 = state->m_spriteram;
61		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	61	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
62	62	int offs, data, tilenum, color, flipx, flipy;
63	63	int x, y, priority, dblsize, curx, cury;
64	64	int sprites_flipscreen = 0;

src/mame/video/flower.c

r14976	r14977
6	6
7	7	PALETTE_INIT( flower )
8	8	{
9		const UINT8 *color_prom = machine.region("proms")->base();
	9	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
10	10	int i;
11	11
12	12	/* allocate the colortable */

src/mame/video/mrdo.c

r14976	r14977
44	44
45	45	PALETTE_INIT( mrdo )
46	46	{
47		const UINT8 *color_prom = machine.region("proms")->base();
	47	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
48	48	int i;
49	49
50	50	const int R1 = 150;

src/mame/video/namcos1.c

r14976	r14977
121	121	namcos1_state *state = machine.driver_data<namcos1_state>();
122	122	int i;
123	123
124		state->m_tilemap_maskdata = (UINT8 *)machine.region("gfx1")->base();
	124	state->m_tilemap_maskdata = (UINT8 *)state->memregion("gfx1")->base();
125	125
126	126	/* allocate videoram */
127	127	state->m_videoram = auto_alloc_array(machine, UINT8, 0x8000);

src/mame/video/m62.c

r14976	r14977
199	199
200	200	PALETTE_INIT( m62 )
201	201	{
202		const UINT8 *color_prom = machine.region("proms")->base();
	202	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
203	203	m62_state *state = machine.driver_data<m62_state>();
204	204	rgb_t *rgb;
205	205
r14976	r14977
220	220
221	221	PALETTE_INIT( lotlot )
222	222	{
223		const UINT8 *color_prom = machine.region("proms")->base();
	223	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
224	224	m62_state *state = machine.driver_data<m62_state>();
225	225	rgb_t *rgb;
226	226
r14976	r14977
241	241
242	242	PALETTE_INIT( battroad )
243	243	{
244		const UINT8 *color_prom = machine.region("proms")->base();
	244	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
245	245	m62_state *state = machine.driver_data<m62_state>();
246	246	rgb_t *rgb;
247	247
r14976	r14977
268	268
269	269	PALETTE_INIT( spelunk2 )
270	270	{
271		const UINT8 *color_prom = machine.region("proms")->base();
	271	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
272	272	m62_state *state = machine.driver_data<m62_state>();
273	273	rgb_t *rgb;
274	274

src/mame/video/megazone.c

r14976	r14977
38	38
39	39	PALETTE_INIT( megazone )
40	40	{
41		const UINT8 *color_prom = machine.region("proms")->base();
	41	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
42	42	static const int resistances_rg[3] = { 1000, 470, 220 };
43	43	static const int resistances_b [2] = { 470, 220 };
44	44	double rweights[3], gweights[3], bweights[2];

src/mame/video/40love.c

r14976	r14977
12	12
13	13	PALETTE_INIT( fortyl )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/galaga.c

r14976	r14977
326	326
327	327	PALETTE_INIT( galaga )
328	328	{
329		const UINT8 *color_prom = machine.region("proms")->base();
	329	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
330	330	int i;
331	331
332	332	machine.colortable = colortable_alloc(machine, 32+64);

src/mame/video/lasso.c

r14976	r14977
66	66
67	67	PALETTE_INIT( lasso )
68	68	{
69		const UINT8 *color_prom = machine.region("proms")->base();
	69	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
70	70	int i;
71	71
72	72	for (i = 0; i < 0x40; i++)
r14976	r14977
76	76
77	77	PALETTE_INIT( wwjgtin )
78	78	{
79		const UINT8 *color_prom = machine.region("proms")->base();
	79	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
80	80	int i;
81	81
82	82	/* allocate the colortable */
r14976	r14977
136	136
137	137	static TILE_GET_INFO( wwjgtin_get_track_tile_info )
138	138	{
139		UINT8 *ROM = machine.region("user1")->base();
	139	UINT8 *ROM = machine.root_device().memregion("user1")->base();
140	140	int code = ROM[tile_index];
141	141	int color = ROM[tile_index + 0x2000];
142	142

src/mame/video/nbmj8688.c

r14976	r14977
162	162
163	163	WRITE8_MEMBER(nbmj8688_state::mjsikaku_romsel_w)
164	164	{
165		int gfxlen = machine().region("gfx1")->bytes();
	165	int gfxlen = memregion("gfx1")->bytes();
166	166	m_mjsikaku_gfxrom = (data & 0x0f);
167	167
168	168	if ((m_mjsikaku_gfxrom << 17) > (gfxlen - 1))
r14976	r14977
176	176
177	177	WRITE8_MEMBER(nbmj8688_state::secolove_romsel_w)
178	178	{
179		int gfxlen = machine().region("gfx1")->bytes();
	179	int gfxlen = memregion("gfx1")->bytes();
180	180	m_mjsikaku_gfxrom = ((data & 0xc0) >> 4) + (data & 0x03);
181	181	mjsikaku_gfxflag2_w(space, 0, data);
182	182
r14976	r14977
191	191
192	192	WRITE8_MEMBER(nbmj8688_state::crystalg_romsel_w)
193	193	{
194		int gfxlen = machine().region("gfx1")->bytes();
	194	int gfxlen = memregion("gfx1")->bytes();
195	195	m_mjsikaku_gfxrom = (data & 0x03);
196	196	mjsikaku_gfxflag2_w(space, 0, data);
197	197
r14976	r14977
206	206
207	207	WRITE8_MEMBER(nbmj8688_state::seiha_romsel_w)
208	208	{
209		int gfxlen = machine().region("gfx1")->bytes();
	209	int gfxlen = memregion("gfx1")->bytes();
210	210	m_mjsikaku_gfxrom = (data & 0x1f);
211	211	mjsikaku_gfxflag3_w(space, 0, data);
212	212
r14976	r14977
274	274	static void mbmj8688_gfxdraw(running_machine &machine, int gfxtype)
275	275	{
276	276	nbmj8688_state *state = machine.driver_data<nbmj8688_state>();
277		UINT8 *GFX = machine.region("gfx1")->base();
	277	UINT8 *GFX = state->memregion("gfx1")->base();
278	278
279	279	int x, y;
280	280	int dx1, dx2, dy;
r14976	r14977
317	317	skipy = -1;
318	318	}
319	319
320		gfxlen = machine.region("gfx1")->bytes();
	320	gfxlen = machine.root_device().memregion("gfx1")->bytes();
321	321	gfxaddr = (state->m_mjsikaku_gfxrom << 17) + (state->m_blitter_src_addr << 1);
322	322	//popmessage("ADDR:%08X DX:%03d DY:%03d SX:%03d SY:%03d", gfxaddr, startx, starty, sizex, sizey);
323	323	//if (state->m_blitter_direction_x|state->m_blitter_direction_y) popmessage("ADDR:%08X FX:%01d FY:%01d", gfxaddr, state->m_blitter_direction_x, state->m_blitter_direction_y);

src/mame/video/8080bw.c

r14976	r14977
122	122
123	123	invadpt2_get_pens(pens);
124	124
125		prom = screen.machine().region("proms")->base();
	125	prom = state->memregion("proms")->base();
126	126	color_map_base = state->m_color_map ? &prom[0x0400] : &prom[0x0000];
127	127
128	128	for (offs = 0; offs < state->m_main_ram.bytes(); offs++)
r14976	r14977
154	154
155	155	invadpt2_get_pens(pens);
156	156
157		prom = screen.machine().region("proms")->base();
	157	prom = state->memregion("proms")->base();
158	158	color_map_base = state->m_color_map ? &prom[0x0400] : &prom[0x0000];
159	159
160	160	for (offs = 0; offs < state->m_main_ram.bytes(); offs++)
r14976	r14977
186	186
187	187	invadpt2_get_pens(pens);
188	188
189		background_map_base = screen.machine().region("proms")->base();
	189	background_map_base = state->memregion("proms")->base();
190	190
191	191	for (offs = 0; offs < state->m_main_ram.bytes(); offs++)
192	192	{
r14976	r14977
279	279
280	280	invadpt2_get_pens(pens);
281	281
282		color_map_base = screen.machine().region("proms")->base();
283		cloud_gfx = screen.machine().region("user1")->base();
	282	color_map_base = screen.machine().root_device().memregion("proms")->base();
	283	cloud_gfx = state->memregion("user1")->base();
284	284
285	285	for (offs = 0; offs < state->m_main_ram.bytes(); offs++)
286	286	{
r14976	r14977
403	403
404	404	cosmo_get_pens(pens);
405	405
406		prom = screen.machine().region("proms")->base();
	406	prom = state->memregion("proms")->base();
407	407	color_map_base = state->m_color_map ? &prom[0x0400] : &prom[0x0000];
408	408
409	409	for (offs = 0; offs < state->m_main_ram.bytes(); offs++)

src/mame/video/othunder.c

r14976	r14977
66	66	static void draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, const int *primasks, int y_offs )
67	67	{
68	68	othunder_state *state = machine.driver_data<othunder_state>();
69		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	69	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
70	70	UINT16 tile_mask = (machine.gfx[0]->total_elements) - 1;
71	71	UINT16 *spriteram16 = state->m_spriteram;
72	72	int offs, data, tilenum, color, flipx, flipy;

src/mame/video/ginganin.c

r14976	r14977
76	76
77	77	static TILE_GET_INFO( get_bg_tile_info )
78	78	{
79		UINT8 *gfx = machine.region("gfx5")->base();
	79	UINT8 *gfx = machine.root_device().memregion("gfx5")->base();
80	80	int code = gfx[2 * tile_index + 0] * 256 + gfx[2 * tile_index + 1];
81	81	SET_TILE_INFO(
82	82	BG_GFX,

src/mame/video/tail2nos.c

r14976	r14977
62	62
63	63	state->m_bg_tilemap->set_transparent_pen(15);
64	64
65		state->m_zoomdata = (UINT16 *)machine.region("gfx3")->base();
	65	state->m_zoomdata = (UINT16 *)state->memregion("gfx3")->base();
66	66
67	67	state->save_pointer(NAME(state->m_zoomdata), 0x20000 / 2);
68	68	machine.save().register_postload(save_prepost_delegate(FUNC(tail2nos_postload), &machine));

src/mame/video/mrjong.c

r14976	r14977
18	18
19	19	PALETTE_INIT( mrjong )
20	20	{
21		const UINT8 *color_prom = machine.region("proms")->base();
	21	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
22	22	int i;
23	23
24	24	/* allocate the colortable */

src/mame/video/quasar.c

r14976	r14977
21	21
22	22	PALETTE_INIT( quasar )
23	23	{
24		const UINT8 *color_prom = machine.region("proms")->base();
	24	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
25	25	int i;
26	26
27	27	/* allocate the colortable */

src/mame/video/xyonix.c

r14976	r14977
3	3
4	4	PALETTE_INIT( xyonix )
5	5	{
6		const UINT8 *color_prom = machine.region("proms")->base();
	6	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
7	7	int i;
8	8
9	9

src/mame/video/1943.c

r14976	r14977
47	47
48	48	PALETTE_INIT( 1943 )
49	49	{
50		const UINT8 *color_prom = machine.region("proms")->base();
	50	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
51	51	int i;
52	52
53	53	/* allocate the colortable */
r14976	r14977
141	141	coin_counter_w(machine(), 1, data & 0x02);
142	142
143	143	/* bits 2, 3 and 4 select the ROM bank */
144		memory_set_bank(machine(), "bank1", (data & 0x1c) >> 2);
	144	membank("bank1")->set_entry((data & 0x1c) >> 2);
145	145
146	146	/* bit 5 resets the sound CPU - we ignore it */
147	147
r14976	r14977
167	167
168	168	static TILE_GET_INFO( c1943_get_bg2_tile_info )
169	169	{
170		UINT8 *tilerom = machine.region("gfx5")->base() + 0x8000;
	170	UINT8 *tilerom = machine.root_device().memregion("gfx5")->base() + 0x8000;
171	171
172	172	int offs = tile_index * 2;
173	173	int attr = tilerom[offs + 1];
r14976	r14977
180	180
181	181	static TILE_GET_INFO( c1943_get_bg_tile_info )
182	182	{
183		UINT8 *tilerom = machine.region("gfx5")->base();
	183	UINT8 *tilerom = machine.root_device().memregion("gfx5")->base();
184	184
185	185	int offs = tile_index * 2;
186	186	int attr = tilerom[offs + 1];

src/mame/video/lucky74.c

r14976	r14977
129	129	We're constructing a double-sized palette with one half for each state.
130	130	*/
131	131	{
132		const UINT8 *color_prom = machine.region("proms")->base();
	132	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
133	133	int i;
134	134	static const int resistances_rgb[4] = { 2000, 1000, 470, 220 };
135	135	double weights_r[4], weights_g[4], weights_b[4];

src/mame/video/pacland.c

r14976	r14977
90	90
91	91	PALETTE_INIT( pacland )
92	92	{
93		const UINT8 *color_prom = machine.region("proms")->base();
	93	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
94	94	pacland_state *state = machine.driver_data<pacland_state>();
95	95	int i;
96	96
r14976	r14977
253	253	WRITE8_MEMBER(pacland_state::pacland_bankswitch_w)
254	254	{
255	255	int bankaddress;
256		UINT8 *RAM = machine().region("maincpu")->base();
	256	UINT8 *RAM = memregion("maincpu")->base();
257	257
258	258	bankaddress = 0x10000 + ((data & 0x07) << 13);
259		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	259	membank("bank1")->set_base(&RAM[bankaddress]);
260	260
261	261	//  pbc = data & 0x20;
262	262

src/mame/video/rollrace.c

r14976	r14977
22	22	***************************************************************************/
23	23	PALETTE_INIT( rollrace )
24	24	{
25		const UINT8 *color_prom = machine.region("proms")->base();
	25	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
26	26	int i;
27	27
28	28
r14976	r14977
103	103	int sx, sy;
104	104	int scroll;
105	105	int col;
106		const UINT8 *mem = screen.machine().region("user1")->base();
	106	const UINT8 *mem = state->memregion("user1")->base();
107	107
108	108	/* fill in background colour*/
109	109	bitmap.fill(state->m_ra_bkgpen, cliprect);

src/mame/video/popper.c

r14976	r14977
46	46
47	47	PALETTE_INIT( popper )
48	48	{
49		const UINT8 *color_prom = machine.region("proms")->base();
	49	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
50	50	rgb_t   *rgb;
51	51
52	52	rgb = compute_res_net_all(machine, color_prom, &popper_decode_info, &popper_net_info);

src/mame/video/sidearms.c

r14976	r14977
143	143	VIDEO_START( sidearms )
144	144	{
145	145	sidearms_state *state = machine.driver_data<sidearms_state>();
146		state->m_tilerom = machine.region("gfx4")->base();
	146	state->m_tilerom = state->memregion("gfx4")->base();
147	147
148	148	if (!state->m_gameid)
149	149	{
r14976	r14977
226	226	_vcount_191 = state->m_vcount_191;
227	227	_hcount_191 = state->m_hcount_191 & 0xff;
228	228
229		sf_rom = machine.region("user1")->base();
	229	sf_rom = machine.root_device().memregion("user1")->base();
230	230
231	231	#if 0 // old loop (for reference; easier to read)
232	232	if (!flipon)

src/mame/video/jack.c

r14976	r14977
110	110
111	111	PALETTE_INIT( joinem )
112	112	{
113		const UINT8 *color_prom = machine.region("proms")->base();
	113	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
114	114	int i;
115	115
116	116	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/dogfgt.c

r14976	r14977
13	13
14	14	PALETTE_INIT( dogfgt )
15	15	{
16		const UINT8 *color_prom = machine.region("proms")->base();
	16	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
17	17	int i;
18	18
19	19	/* first 16 colors are RAM */

src/mame/video/taitosj.c

r14976	r14977
144	144	{
145	145	taitosj_state *state = machine.driver_data<taitosj_state>();
146	146	int i;
147		UINT8 *color_prom = machine.region("proms")->base();
	147	UINT8 *color_prom = state->memregion("proms")->base();
148	148
149	149	/* do a simple conversion of the PROM into layer priority order. Note that */
150	150	/* this is a simplification, which assumes the PROM encodes a sensible priority */
r14976	r14977
204	204	offs_t offs = m_gfxpointer[0] | (m_gfxpointer[1] << 8);
205	205
206	206	if (offs < 0x8000)
207		ret = machine().region("gfx1")->base()[offs];
	207	ret = memregion("gfx1")->base()[offs];
208	208	else
209	209	ret = 0;
210	210

src/mame/video/avgdvg.c

r14976	r14977
484	484
485	485	if (vg->pc & 0x2000)
486	486	{
487		bank = &vg->machine().region("alpha")->base()[0x18000];
	487	bank = &vg->machine().root_device().memregion("alpha")->base()[0x18000];
488	488	vg->data = bank[(vg->map << 13) | ((vg->pc ^ 1) & 0x1fff)];
489	489	}
490	490	else
r14976	r14977
1206	1206	static TIMER_CALLBACK( run_state_machine )
1207	1207	{
1208	1208	int cycles = 0;
1209		UINT8 *state_prom = machine.region("user1")->base();
	1209	UINT8 *state_prom = machine.root_device().memregion("user1")->base();
1210	1210
1211	1211	while (cycles < VGSLICE)
1212	1212	{

src/mame/video/kingobox.c

r14976	r14977
123	123
124	124	PALETTE_INIT( kingofb )
125	125	{
126		const UINT8 *color_prom = machine.region("proms")->base();
	126	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
127	127	palette_init_common(machine, color_prom, kingofb_get_rgb_data);
128	128	}
129	129
130	130	PALETTE_INIT( ringking )
131	131	{
132		const UINT8 *color_prom = machine.region("proms")->base();
	132	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
133	133	palette_init_common(machine, color_prom, ringking_get_rgb_data);
134	134	}
135	135

src/mame/video/galivan.c

r14976	r14977
54	54
55	55	PALETTE_INIT( galivan )
56	56	{
57		const UINT8 *color_prom = machine.region("proms")->base();
	57	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
58	58	int i;
59	59
60	60	/* allocate the colortable */
r14976	r14977
122	122
123	123	static TILE_GET_INFO( get_bg_tile_info )
124	124	{
125		UINT8 *BGROM = machine.region("gfx4")->base();
	125	UINT8 *BGROM = machine.root_device().memregion("gfx4")->base();
126	126	int attr = BGROM[tile_index + 0x4000];
127	127	int code = BGROM[tile_index] | ((attr & 0x03) << 8);
128	128	SET_TILE_INFO(
r14976	r14977
147	147
148	148	static TILE_GET_INFO( ninjemak_get_bg_tile_info )
149	149	{
150		UINT8 *BGROM = machine.region("gfx4")->base();
	150	UINT8 *BGROM = machine.root_device().memregion("gfx4")->base();
151	151	int attr = BGROM[tile_index + 0x4000];
152	152	int code = BGROM[tile_index] | ((attr & 0x03) << 8);
153	153	SET_TILE_INFO(
r14976	r14977
229	229	m_tx_tilemap->set_flip(m_flipscreen ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0);
230	230
231	231	/* bit 7 selects one of two ROM banks for c000-dfff */
232		memory_set_bank(machine(), "bank1", (data & 0x80) >> 7);
	232	membank("bank1")->set_entry((data & 0x80) >> 7);
233	233
234	234	/*  logerror("Address: %04X - port 40 = %02x\n", cpu_get_pc(&space.device()), data); */
235	235	}
r14976	r14977
254	254	/* bit 5 sprite flag ??? */
255	255
256	256	/* bit 6, 7 ROM bank select */
257		memory_set_bank(machine(), "bank1", (data & 0xc0) >> 6);
	257	membank("bank1")->set_entry((data & 0xc0) >> 6);
258	258
259	259	#if 0
260	260	{
r14976	r14977
305	305	static void draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
306	306	{
307	307	galivan_state *state = machine.driver_data<galivan_state>();
308		const UINT8 *spritepalettebank = machine.region("user1")->base();
	308	const UINT8 *spritepalettebank = state->memregion("user1")->base();
309	309	UINT8 *spriteram = state->m_spriteram;
310	310	int offs;
311	311

src/mame/video/esripsys.c

r14976	r14977
225	225
226	226	if (x_flip)
227	227	{
228		rom_l = machine.region("8bpp_r")->base();
229		rom_r = machine.region("8bpp_l")->base();
	228	rom_l = machine.root_device().memregion("8bpp_r")->base();
	229	rom_r = state->memregion("8bpp_l")->base();
230	230	}
231	231	else
232	232	{
233		rom_l = machine.region("8bpp_l")->base();
234		rom_r = machine.region("8bpp_r")->base();
	233	rom_l = machine.root_device().memregion("8bpp_l")->base();
	234	rom_r = machine.root_device().memregion("8bpp_r")->base();
235	235	}
236	236
237	237	for (cnt = 0; cnt <= fig; cnt++)
r14976	r14977
294	294	/* 4bpp case */
295	295	else
296	296	{
297		const UINT8* const rom = machine.region("4bpp")->base();
	297	const UINT8* const rom = machine.root_device().memregion("4bpp")->base();
298	298	int ptr = 0;
299	299	int cnt;
300	300	UINT32 lpos = l;

src/mame/video/nbmj8991.c

r14976	r14977
78	78	******************************************************************************/
79	79	WRITE8_MEMBER(nbmj8991_state::nbmj8991_blitter_w)
80	80	{
81		int gfxlen = machine().region("gfx1")->bytes();
	81	int gfxlen = memregion("gfx1")->bytes();
82	82
83	83	switch (offset)
84	84	{
r14976	r14977
180	180	static void nbmj8991_gfxdraw(running_machine &machine)
181	181	{
182	182	nbmj8991_state *state = machine.driver_data<nbmj8991_state>();
183		UINT8 *GFX = machine.region("gfx1")->base();
	183	UINT8 *GFX = state->memregion("gfx1")->base();
184	184	int width = machine.primary_screen->width();
185	185
186	186	int x, y;
r14976	r14977
220	220	skipy = -1;
221	221	}
222	222
223		gfxlen = machine.region("gfx1")->bytes();
	223	gfxlen = machine.root_device().memregion("gfx1")->bytes();
224	224	gfxaddr = (state->m_gfxrom << 17) + (state->m_blitter_src_addr << 1);
225	225
226	226	for (y = starty, ctry = sizey; ctry >= 0; y += skipy, ctry--)

src/mame/video/f1gp.c

r14976	r14977
52	52
53	53	state->m_fg_tilemap->set_transparent_pen(0xff);
54	54
55		state->m_zoomdata = (UINT16 *)machine.region("gfx4")->base();
	55	state->m_zoomdata = (UINT16 *)machine.root_device().memregion("gfx4")->base();
56	56	gfx_element_set_source(machine.gfx[3], (UINT8 *)state->m_zoomdata);
57	57
58		//  state->save_pointer(NAME(state->m_zoomdata), machine.region("gfx4")->bytes());
	58	//  state->save_pointer(NAME(state->m_zoomdata), state->memregion("gfx4")->bytes());
59	59	}
60	60
61	61
r14976	r14977
68	68
69	69	state->m_fg_tilemap->set_transparent_pen(0xff);
70	70
71		state->m_zoomdata = (UINT16 *)machine.region("gfx4")->base();
	71	state->m_zoomdata = (UINT16 *)machine.root_device().memregion("gfx4")->base();
72	72	gfx_element_set_source(machine.gfx[3], (UINT8 *)state->m_zoomdata);
73	73
74		//  state->save_pointer(NAME(state->m_zoomdata), machine.region("gfx4")->bytes());
	74	//  state->save_pointer(NAME(state->m_zoomdata), state->memregion("gfx4")->bytes());
75	75	}
76	76
77	77	VIDEO_START( f1gp2 )

src/mame/video/lvcards.c

r14976	r14977
12	12
13	13	PALETTE_INIT( ponttehk )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	for ( i = 0; i < machine.total_colors(); i++ )
r14976	r14977
48	48
49	49	PALETTE_INIT( lvcards ) //Ever so slightly different, but different enough.
50	50	{
51		const UINT8 *color_prom = machine.region("proms")->base();
	51	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
52	52	int i;
53	53
54	54	for ( i = 0; i < machine.total_colors(); i++ )

src/mame/video/namcos2.c

r14976	r14977
443	443
444	444	VIDEO_START( namcos2 )
445	445	{
446		namco_tilemap_init(machine,2,machine.region("gfx4")->base(),TilemapCB);
	446	namco_tilemap_init(machine,2,machine.root_device().memregion("gfx4")->base(),TilemapCB);
447	447	tilemap_roz = tilemap_create(machine, get_tile_info_roz,tilemap_scan_rows,8,8,256,256);
448	448	tilemap_roz->set_transparent_pen(0xff);
449	449	DrawSpriteInit(machine);
r14976	r14977
492	492
493	493	VIDEO_START( finallap )
494	494	{
495		namco_tilemap_init(machine,2,machine.region("gfx4")->base(),TilemapCB);
	495	namco_tilemap_init(machine,2,machine.root_device().memregion("gfx4")->base(),TilemapCB);
496	496	DrawSpriteInit(machine);
497	497	namco_road_init(machine, 3);
498	498	}
r14976	r14977
522	522
523	523	VIDEO_START( luckywld )
524	524	{
525		namco_tilemap_init(machine,2,machine.region("gfx4")->base(),TilemapCB);
	525	namco_tilemap_init(machine,2,machine.root_device().memregion("gfx4")->base(),TilemapCB);
526	526	namco_obj_init( machine, 0, 0x0, NULL );
527	527	if( namcos2_gametype==NAMCOS2_LUCKY_AND_WILD )
528	528	{
r14976	r14977
563	563
564	564	VIDEO_START( sgunner )
565	565	{
566		namco_tilemap_init(machine,2,machine.region("gfx4")->base(),TilemapCB);
	566	namco_tilemap_init(machine,2,machine.root_device().memregion("gfx4")->base(),TilemapCB);
567	567	namco_obj_init( machine, 0, 0x0, NULL );
568	568	}
569	569
r14976	r14977
589	589
590	590	VIDEO_START( metlhawk )
591	591	{
592		namco_tilemap_init(machine,2,machine.region("gfx4")->base(),TilemapCB);
	592	namco_tilemap_init(machine,2,machine.root_device().memregion("gfx4")->base(),TilemapCB);
593	593	namco_roz_init( machine, 1, "gfx5" );
594	594	}
595	595

src/mame/video/route16.c

r14976	r14977
73	73	route16_state *state = screen.machine().driver_data<route16_state>();
74	74	offs_t offs;
75	75
76		UINT8 *color_prom1 = &screen.machine().region("proms")->base()[0x000];
77		UINT8 *color_prom2 = &screen.machine().region("proms")->base()[0x100];
	76	UINT8 *color_prom1 = &screen.machine().root_device().memregion("proms")->base()[0x000];
	77	UINT8 *color_prom2 = &state->memregion("proms")->base()[0x100];
78	78
79	79	for (offs = 0; offs < state->m_videoram1.bytes(); offs++)
80	80	{
r14976	r14977
130	130	route16_state *state = machine.driver_data<route16_state>();
131	131	offs_t offs;
132	132
133		UINT8 *color_prom1 = &machine.region("proms")->base()[0x000];
134		UINT8 *color_prom2 = &machine.region("proms")->base()[0x100];
	133	UINT8 *color_prom1 = &machine.root_device().memregion("proms")->base()[0x000];
	134	UINT8 *color_prom2 = &state->memregion("proms")->base()[0x100];
135	135
136	136	for (offs = 0; offs < state->m_videoram1.bytes(); offs++)
137	137	{

src/mame/video/tecmosys.c

r14976	r14977
112	112	static void tecmosys_render_sprites_to_bitmap(running_machine &machine, bitmap_rgb32 &bitmap, UINT16 extrax, UINT16 extray )
113	113	{
114	114	tecmosys_state *state = machine.driver_data<tecmosys_state>();
115		UINT8 *gfxsrc    = machine.region       ( "gfx1" )->base();
	115	UINT8 *gfxsrc    = state->memregion       ( "gfx1" )->base();
116	116	int i;
117	117
118	118	/* render sprites (with priority information) to temp bitmap */

src/mame/video/snk6502.c

r14976	r14977
24	24	***************************************************************************/
25	25	PALETTE_INIT( snk6502 )
26	26	{
27		const UINT8 *color_prom = machine.region("proms")->base();
	27	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
28	28	snk6502_state *state = machine.driver_data<snk6502_state>();
29	29	int i;
30	30
r14976	r14977
210	210
211	211	PALETTE_INIT( satansat )
212	212	{
213		const UINT8 *color_prom = machine.region("proms")->base();
	213	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
214	214	snk6502_state *state = machine.driver_data<snk6502_state>();
215	215	int i;
216	216

src/mame/video/tx1.c

r14976	r14977
112	112
113	113	PALETTE_INIT( tx1 )
114	114	{
115		const UINT8 *color_prom = machine.region("proms")->base();
	115	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
116	116	int i;
117	117
118	118	static const res_net_info tx1_net_info =
r14976	r14977
236	236	UINT8 *chars, *gfx2;
237	237
238	238	/* 2bpp characters */
239		chars = machine.region("char_tiles")->base();
	239	chars = state->memregion("char_tiles")->base();
240	240	gfx2 = chars + 0x4000;
241	241
242	242	/* X scroll value is the last word in char RAM */
r14976	r14977
416	416	UINT8   pix[2][4][3];
417	417
418	418	/* Road slice map ROMs */
419		const UINT8 *const gfx3 = machine.region("gfx3")->base();
	419	const UINT8 *const gfx3 = machine.root_device().memregion("gfx3")->base();
420	420	const UINT8 *const rom_a = gfx3;
421	421	const UINT8 *const rom_b = gfx3 + 0x2000;
422	422	const UINT8 *const rom_c = gfx3 + 0x4000;
423	423
424	424	/* Pixel data */
425		const UINT8 *const proms = machine.region("proms")->base();
	425	const UINT8 *const proms = state->memregion("proms")->base();
426	426	const UINT8 *const prom_a = proms + 0x1100;
427	427	const UINT8 *const prom_b = proms + 0x1300;
428	428	const UINT8 *const prom_c = proms + 0x1500;
r14976	r14977
859	859	UINT32 offs;
860	860
861	861	/* The many lookup table ROMs */
862		const UINT8 *const ic48 = machine.region("user3")->base();
	862	const UINT8 *const ic48 = machine.root_device().memregion("user3")->base();
863	863	const UINT8 *const ic281 = ic48 + 0x2000;
864	864
865		const UINT8 *const proms = machine.region("proms")->base();
	865	const UINT8 *const proms = machine.root_device().memregion("proms")->base();
866	866	const UINT8 *const ic190 = proms + 0xc00;
867	867	const UINT8 *const ic162 = proms + 0xe00;
868	868	const UINT8 *const ic25  = proms + 0x1000;
869	869
870		const UINT8 *const ic106 = machine.region("obj_map")->base();
	870	const UINT8 *const ic106 = machine.root_device().memregion("obj_map")->base();
871	871	const UINT8 *const ic73  = ic106 + 0x4000;
872	872
873		const UINT8 *const pixdata_rgn = machine.region("obj_tiles")->base();
	873	const UINT8 *const pixdata_rgn = state->memregion("obj_tiles")->base();
874	874
875	875	for (offs = 0x0; offs <= 0x300; offs += 8)
876	876	{
r14976	r14977
1136	1136	{
1137	1137	tx1_state *state = machine.driver_data<tx1_state>();
1138	1138	int x, y;
1139		UINT8 *chr_pal = machine.region("proms")->base() + 0x900;
	1139	UINT8 *chr_pal = state->memregion("proms")->base() + 0x900;
1140	1140
1141	1141	int x_offset = screen * 256;
1142	1142
r14976	r14977
1249	1249
1250	1250	PALETTE_INIT( buggyboy )
1251	1251	{
1252		const UINT8 *color_prom = machine.region("proms")->base();
	1252	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
1253	1253	int i;
1254	1254
1255	1255	for (i = 0; i < 0x100; i++)
r14976	r14977
1300	1300	UINT32 x_mask;
1301	1301
1302	1302	/* 2bpp characters */
1303		chars = machine.region("char_tiles")->base();
1304		gfx2 = machine.region("char_tiles")->base() + 0x4000;
	1303	chars = machine.root_device().memregion("char_tiles")->base();
	1304	gfx2 = state->memregion("char_tiles")->base() + 0x4000;
1305	1305
1306	1306	/* X/Y scroll values are the last word in char RAM */
1307	1307	if (wide)
r14976	r14977
1535	1535	UINT32 rva20_6;
1536	1536
1537	1537	/* ROM/PROM lookup tables */
1538		const UINT8 *rcols = (UINT8*)(machine.region("proms")->base() + 0x1500);
1539		const UINT8 *rom   = machine.region("road")->base();
	1538	const UINT8 *rcols = (UINT8*)(machine.root_device().memregion("proms")->base() + 0x1500);
	1539	const UINT8 *rom   = state->memregion("road")->base();
1540	1540	const UINT8 *prom0 = rom + 0x4000;
1541	1541	const UINT8 *prom1 = rom + 0x4200;
1542	1542	const UINT8 *prom2 = rom + 0x4400;
r14976	r14977
2167	2167	UINT32 rva20_6;
2168	2168
2169	2169	/* ROM/PROM lookup tables */
2170		const UINT8 *rcols = (UINT8*)(machine.region("proms")->base() + 0x1500);
2171		const UINT8 *rom   = machine.region("road")->base();
	2170	const UINT8 *rcols = (UINT8*)(machine.root_device().memregion("proms")->base() + 0x1500);
	2171	const UINT8 *rom   = state->memregion("road")->base();
2172	2172	const UINT8 *prom0 = rom + 0x4000;
2173	2173	const UINT8 *prom1 = rom + 0x4200;
2174	2174	const UINT8 *prom2 = rom + 0x4400;
r14976	r14977
2580	2580	UINT32 x_stride;
2581	2581
2582	2582	/* The many lookup table ROMs */
2583		const UINT8 *const bug13  = (UINT8*)machine.region("obj_luts")->base();
	2583	const UINT8 *const bug13  = (UINT8*)machine.root_device().memregion("obj_luts")->base();
2584	2584	const UINT8 *const bug18s = bug13 + 0x2000;
2585		const UINT8 *const bb8    = (UINT8*)machine.region("proms")->base() + 0x1600;
	2585	const UINT8 *const bb8    = (UINT8*)machine.root_device().memregion("proms")->base() + 0x1600;
2586	2586
2587		const UINT8 *const bug16s = (UINT8*)machine.region("obj_map")->base();
	2587	const UINT8 *const bug16s = (UINT8*)machine.root_device().memregion("obj_map")->base();
2588	2588	const UINT8 *const bug17s = bug16s + 0x8000;
2589	2589
2590		const UINT8 *const bb9o = (UINT8*)machine.region("proms")->base() + 0x500;
	2590	const UINT8 *const bb9o = (UINT8*)machine.root_device().memregion("proms")->base() + 0x500;
2591	2591	const UINT8 *const bb9e = bb9o + 0x800;
2592	2592
2593		const UINT8 *const pixdata_rgn = (UINT8*)machine.region("obj_tiles")->base();
	2593	const UINT8 *const pixdata_rgn = (UINT8*)state->memregion("obj_tiles")->base();
2594	2594
2595	2595	if (wide)
2596	2596	{
r14976	r14977
2931	2931	static void bb_combine_layers(running_machine &machine, bitmap_ind16 &bitmap, int screen)
2932	2932	{
2933	2933	tx1_state *state = machine.driver_data<tx1_state>();
2934		UINT8 *chr_pal = machine.region("proms")->base() + 0x400;
	2934	UINT8 *chr_pal = state->memregion("proms")->base() + 0x400;
2935	2935	UINT32 bmp_stride;
2936	2936	UINT32 x_offset;
2937	2937	UINT32 y;

src/mame/video/pingpong.c

r14976	r14977
32	32	***************************************************************************/
33	33	PALETTE_INIT( pingpong )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	int i;
37	37
38	38	/* allocate the colortable */

src/mame/video/gotya.c

r14976	r14977
11	11
12	12	PALETTE_INIT( gotya )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	static const int resistances_rg[3] = { 1000, 470, 220 };
16	16	static const int resistances_b [2] = { 470, 220 };
17	17	double rweights[3], gweights[3], bweights[2];

src/mame/video/tatsumi.c

r14976	r14977
973	973	Each tile (0x4000 of them) has a lookup table in ROM to build an individual 3-bit palette
974	974	from sets of 8 bit palettes!
975	975	*/
976		const UINT8* tile_cluts = machine.region("gfx4")->base();
	976	const UINT8* tile_cluts = machine.root_device().memregion("gfx4")->base();
977	977	const bitmap_ind16 &src_bitmap = src->pixmap();
978	978	int src_y_mask=ysize-1;
979	979	int src_x_mask=xsize-1;
r14976	r14977
1008	1008	{
1009	1009	tatsumi_state *state = machine.driver_data<tatsumi_state>();
1010	1010	int x, y;
1011		const UINT8 *lut = machine.region("proms")->base();
	1011	const UINT8 *lut = state->memregion("proms")->base();
1012	1012
1013	1013	UINT16 gva = 0x180; // TODO
1014	1014	UINT8 sky_val = state->m_apache3_rotate_ctrl[1] & 0xff;

src/mame/video/konamiic.c

r14976	r14977
502	502	1d00     : bits 0 & 1 might enable NMI and FIRQ, not sure
503	503	: bit 2 = IRQ enable
504	504	1d80     : ROM bank selector bits 0-3 = bank 0 bits 4-7 = bank 1
505		1e00     : ROM subbank selector for ROM testing
	505	1e00     : ROM membank selector for ROM testing
506	506	1e80     : bit 0 = flip screen (applies to tilemaps only, not sprites)
507	507	: bit 1 = set by crimfght, mainevt, surpratk, xmen, mia, punkshot, thndrx2, spy
508	508	:         it seems to enable tile flip X, however flip X is handled by the
r14976	r14977
1287	1287	break;
1288	1288	assert(gfx_index != MAX_GFX_ELEMENTS);
1289	1289
1290		K055673_rom = (UINT16 *)machine.region(gfx_memory_region)->base();
	1290	K055673_rom = (UINT16 *)machine.root_device().memregion(gfx_memory_region)->base();
1291	1291
1292	1292	/* decode the graphics */
1293	1293	switch(layout)
1294	1294	{
1295	1295	case K055673_LAYOUT_GX:
1296		size4 = (machine.region(gfx_memory_region)->bytes()/(1024*1024))/5;
	1296	size4 = (machine.root_device().memregion(gfx_memory_region)->bytes()/(1024*1024))/5;
1297	1297	size4 *= 4*1024*1024;
1298	1298	/* set the # of tiles based on the 4bpp section */
1299	1299	K055673_rom = auto_alloc_array(machine, UINT16, size4 * 5 / 2);
1300	1300	d = (UINT8 *)K055673_rom;
1301	1301	// now combine the graphics together to form 5bpp
1302		s1 = machine.region(gfx_memory_region)->base(); // 4bpp area
	1302	s1 = machine.root_device().memregion(gfx_memory_region)->base(); // 4bpp area
1303	1303	s2 = s1 + (size4);    // 1bpp area
1304	1304	for (i = 0; i < size4; i+= 4)
1305	1305	{
r14976	r14977
1315	1315	break;
1316	1316
1317	1317	case K055673_LAYOUT_RNG:
1318		total = machine.region(gfx_memory_region)->bytes() / (16*16/2);
	1318	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (16*16/2);
1319	1319	decode_gfx(machine, gfx_index, (UINT8 *)K055673_rom, total, &spritelayout2, 4);
1320	1320	break;
1321	1321
1322	1322	case K055673_LAYOUT_LE2:
1323		total = machine.region(gfx_memory_region)->bytes() / (16*16);
	1323	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (16*16);
1324	1324	decode_gfx(machine, gfx_index, (UINT8 *)K055673_rom, total, &spritelayout3, 4);
1325	1325	break;
1326	1326
1327	1327	case K055673_LAYOUT_GX6:
1328		total = machine.region(gfx_memory_region)->bytes() / (16*16*6/8);
	1328	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (16*16*6/8);
1329	1329	decode_gfx(machine, gfx_index, (UINT8 *)K055673_rom, total, &spritelayout4, 4);
1330	1330	break;
1331	1331
r14976	r14977
1400	1400	// in this window, +0 = 32 bits from one set of ROMs, and +8 = 32 bits from another set
1401	1401	READ16_HANDLER( K055673_rom_word_r )   // 5bpp
1402	1402	{
1403		UINT8 *ROM8 = (UINT8 *)space->machine().region(K053247_memory_region)->base();
1404		UINT16 *ROM = (UINT16 *)space->machine().region(K053247_memory_region)->base();
1405		int size4 = (space->machine().region(K053247_memory_region)->bytes()/(1024*1024))/5;
	1403	UINT8 *ROM8 = (UINT8 *)space->machine().root_device().memregion(K053247_memory_region)->base();
	1404	UINT16 *ROM = (UINT16 *)space->machine().root_device().memregion(K053247_memory_region)->base();
	1405	int size4 = (space->machine().root_device().memregion(K053247_memory_region)->bytes()/(1024*1024))/5;
1406	1406	int romofs;
1407	1407
1408	1408	size4 *= 4*1024*1024;   // get offset to 5th bit
r14976	r14977
1438	1438
1439	1439	READ16_HANDLER( K055673_GX6bpp_rom_word_r )
1440	1440	{
1441		UINT16 *ROM = (UINT16 *)space->machine().region(K053247_memory_region)->base();
	1441	UINT16 *ROM = (UINT16 *)space->machine().root_device().memregion(K053247_memory_region)->base();
1442	1442	int romofs;
1443	1443
1444	1444	romofs = K053246_regs[6]<<16 | K053246_regs[7]<<8 | K053246_regs[4];
r14976	r14977
2076	2076	switch (bpp)
2077	2077	{
2078	2078	case K056832_BPP_4:
2079		total = machine.region(gfx_memory_region)->bytes() / (i*4);
2080		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout4, 4);
	2079	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*4);
	2080	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout4, 4);
2081	2081	break;
2082	2082
2083	2083	case K056832_BPP_5:
2084		total = machine.region(gfx_memory_region)->bytes() / (i*5);
2085		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout5, 4);
	2084	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*5);
	2085	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout5, 4);
2086	2086	break;
2087	2087
2088	2088	case K056832_BPP_6:
2089		total = machine.region(gfx_memory_region)->bytes() / (i*6);
2090		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout6, 4);
	2089	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*6);
	2090	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout6, 4);
2091	2091	break;
2092	2092
2093	2093	case K056832_BPP_8:
2094		total = machine.region(gfx_memory_region)->bytes() / (i*8);
2095		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout8, 4);
	2094	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*8);
	2095	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout8, 4);
2096	2096	break;
2097	2097
2098	2098	case K056832_BPP_8LE:
2099		total = machine.region(gfx_memory_region)->bytes() / (i*8);
2100		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout8le, 4);
	2099	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*8);
	2100	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout8le, 4);
2101	2101	break;
2102	2102
2103	2103	case K056832_BPP_8TASMAN:
2104		total = machine.region(gfx_memory_region)->bytes() / (i*8);
2105		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout8_tasman, 4);
	2104	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*8);
	2105	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout8_tasman, 4);
2106	2106	break;
2107	2107
2108	2108	case K056832_BPP_4dj:
2109		total = machine.region(gfx_memory_region)->bytes() / (i*4);
2110		decode_gfx(machine, gfx_index, machine.region(gfx_memory_region)->base(), total, &charlayout4dj, 4);
	2109	total = machine.root_device().memregion(gfx_memory_region)->bytes() / (i*4);
	2110	decode_gfx(machine, gfx_index, machine.root_device().memregion(gfx_memory_region)->base(), total, &charlayout4dj, 4);
2111	2111	break;
2112	2112
2113	2113	default:
r14976	r14977
2120	2120	K056832_gfxnum = gfx_index;
2121	2121	K056832_callback = callback;
2122	2122
2123		K056832_rombase = machine.region(gfx_memory_region)->base();
2124		K056832_NumGfxBanks = machine.region(gfx_memory_region)->bytes() / 0x2000;
	2123	K056832_rombase = machine.root_device().memregion(gfx_memory_region)->base();
	2124	K056832_NumGfxBanks = machine.root_device().memregion(gfx_memory_region)->bytes() / 0x2000;
2125	2125	K056832_CurGfxBank = 0;
2126	2126	K056832_use_ext_linescroll = 0;
2127	2127	K056832_uses_tile_banks = 0;
r14976	r14977
2215	2215	UINT8 *rombase;
2216	2216	int base, ret;
2217	2217
2218		rombase = (UINT8 *)machine.region(K056832_memory_region)->base();
	2218	rombase = (UINT8 *)machine.root_device().memregion(K056832_memory_region)->base();
2219	2219
2220	2220	if ((K056832_rom_half) && (zerosec))
2221	2221	{
r14976	r14977
2305	2305
2306	2306	if (!K056832_rombase)
2307	2307	{
2308		K056832_rombase = space->machine().region(K056832_memory_region)->base();
	2308	K056832_rombase = space->machine().root_device().memregion(K056832_memory_region)->base();
2309	2309	}
2310	2310
2311	2311	if (K056832_regsb[2] & 0x8)

src/mame/video/retofinv.c

r14976	r14977
12	12
13	13	PALETTE_INIT( retofinv )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	/* allocate the colortable */

src/mame/video/bogeyman.c

r14976	r14977
4	4
5	5	PALETTE_INIT( bogeyman )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	/* first 16 colors are RAM */

src/mame/video/srmp2.c

r14976	r14977
11	11
12	12	PALETTE_INIT( srmp2 )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	int i;
16	16
17	17	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
26	26
27	27	PALETTE_INIT( srmp3 )
28	28	{
29		const UINT8 *color_prom = machine.region("proms")->base();
	29	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
30	30	int i;
31	31
32	32	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/madalien.c

r14976	r14977
16	16
17	17	static PALETTE_INIT( madalien )
18	18	{
19		const UINT8 *color_prom = machine.region("proms")->base();
	19	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
20	20	int i;
21	21
22	22	/* allocate the colortable */
r14976	r14977
92	92	static TILE_GET_INFO( get_tile_info_BG_1 )
93	93	{
94	94	madalien_state *state = machine.driver_data<madalien_state>();
95		UINT8 *map = machine.region("user1")->base() + ((*state->m_video_flags & 0x08) << 6);
	95	UINT8 *map = state->memregion("user1")->base() + ((*state->m_video_flags & 0x08) << 6);
96	96
97	97	SET_TILE_INFO(1, map[tile_index], BIT(*state->m_video_flags, 2) ? 2 : 0, 0);
98	98	}
r14976	r14977
101	101	static TILE_GET_INFO( get_tile_info_BG_2 )
102	102	{
103	103	madalien_state *state = machine.driver_data<madalien_state>();
104		UINT8 *map = machine.region("user1")->base() + ((*state->m_video_flags & 0x08) << 6) + 0x80;
	104	UINT8 *map = state->memregion("user1")->base() + ((*state->m_video_flags & 0x08) << 6) + 0x80;
105	105
106	106	SET_TILE_INFO(1, map[tile_index], BIT(*state->m_video_flags, 2) ? 2 : 0, 0);
107	107	}

src/mame/video/crgolf.c

r14976	r14977
51	51	static void get_pens( running_machine &machine, pen_t *pens )
52	52	{
53	53	offs_t offs;
54		const UINT8 *prom = machine.region("proms")->base();
	54	const UINT8 *prom = machine.root_device().memregion("proms")->base();
55	55
56	56	for (offs = 0; offs < NUM_PENS; offs++)
57	57	{

src/mame/video/firetrap.c

r14976	r14977
36	36
37	37	PALETTE_INIT( firetrap )
38	38	{
39		const UINT8 *color_prom = machine.region("proms")->base();
	39	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
40	40	int i;
41	41
42	42

src/mame/video/thedeep.c

r14976	r14977
88	88
89	89	PALETTE_INIT( thedeep )
90	90	{
91		const UINT8 *color_prom = machine.region("proms")->base();
	91	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
92	92	int i;
93	93	for (i = 0;i < 512;i++)
94	94	palette_set_color_rgb(machine,i,pal4bit(color_prom[0x400 + i] >> 0),pal4bit(color_prom[0x400 + i] >> 4),pal4bit(color_prom[0x200 + i] >> 0));

src/mame/video/bladestl.c

r14976	r14977
5	5
6	6	PALETTE_INIT( bladestl )
7	7	{
8		const UINT8 *color_prom = machine.region("proms")->base();
	8	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
9	9	int i;
10	10
11	11	/* allocate the colortable */

src/mame/video/mcr68.c

r14976	r14977
71	71	VIDEO_START( zwackery )
72	72	{
73	73	mcr68_state *state = machine.driver_data<mcr68_state>();
74		const UINT8 *colordatabase = (const UINT8 *)machine.region("gfx3")->base();
	74	const UINT8 *colordatabase = (const UINT8 *)state->memregion("gfx3")->base();
75	75	gfx_element *gfx0 = machine.gfx[0];
76	76	gfx_element *gfx2 = machine.gfx[2];
77	77	UINT8 *srcdata0, *dest0;

src/mame/video/funworld.c

r14976	r14977
107	107
108	108	PALETTE_INIT(funworld)
109	109	{
110		const UINT8 *color_prom = machine.region("proms")->base();
	110	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
111	111	int i;
112	112	static const int resistances_rb[3] = { 1000, 470, 220 };
113	113	static const int resistances_g [2] = { 470, 220 };

src/mame/video/gsword.c

r14976	r14977
11	11
12	12	static PALETTE_INIT( common )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	int i;
16	16
17	17	/* characters */
r14976	r14977
29	29
30	30	PALETTE_INIT( josvolly )
31	31	{
32		const UINT8 *color_prom = machine.region("proms")->base();
	32	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
33	33	int i;
34	34
35	35	/* allocate the colortable */
r14976	r14977
54	54
55	55	PALETTE_INIT( gsword )
56	56	{
57		const UINT8 *color_prom = machine.region("proms")->base();
	57	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
58	58	int i;
59	59
60	60	/* allocate the colortable */

src/mame/video/nbmj8900.c

r14976	r14977
147	147	{
148	148	m_gfxrom = (data & 0x0f);
149	149
150		if ((0x20000 * m_gfxrom) > (machine().region("gfx")->bytes() - 1))
	150	if ((0x20000 * m_gfxrom) > (machine().root_device().memregion("gfx")->bytes() - 1))
151	151	{
152	152	#ifdef MAME_DEBUG
153	153	popmessage("GFXROM BANK OVER!!");
154	154	#endif
155		m_gfxrom &= (machine().region("gfx")->bytes() / 0x20000 - 1);
	155	m_gfxrom &= (machine().root_device().memregion("gfx")->bytes() / 0x20000 - 1);
156	156	}
157	157	}
158	158
r14976	r14977
211	211	static void nbmj8900_gfxdraw(running_machine &machine)
212	212	{
213	213	nbmj8900_state *state = machine.driver_data<nbmj8900_state>();
214		unsigned char *GFX = machine.region("gfx")->base();
	214	unsigned char *GFX = state->memregion("gfx")->base();
215	215
216	216	int x, y;
217	217	int dx1, dx2, dy1, dy2;
r14976	r14977
255	255	{
256	256	for (x = startx, ctrx = sizex; ctrx >= 0; x += skipx, ctrx--)
257	257	{
258		if ((gfxaddr > (machine.region("gfx")->bytes() - 1)))
	258	if ((gfxaddr > (machine.root_device().memregion("gfx")->bytes() - 1)))
259	259	{
260	260	#ifdef MAME_DEBUG
261	261	popmessage("GFXROM ADDRESS OVER!!");
262	262	#endif
263		gfxaddr &= (machine.region("gfx")->bytes() - 1);
	263	gfxaddr &= (machine.root_device().memregion("gfx")->bytes() - 1);
264	264	}
265	265
266	266	color = GFX[gfxaddr++];

src/mame/video/mario.c

r14976	r14977
64	64	***************************************************************************/
65	65	PALETTE_INIT( mario )
66	66	{
67		const UINT8 *color_prom = machine.region("proms")->base();
	67	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
68	68	rgb_t   *rgb;
69	69
70	70	rgb = compute_res_net_all(machine, color_prom, &mario_decode_info, &mario_net_info);

src/mame/video/exprraid.c

r14976	r14977
45	45	static TILE_GET_INFO( get_bg_tile_info )
46	46	{
47	47	exprraid_state *state = machine.driver_data<exprraid_state>();
48		UINT8 *tilerom = machine.region("gfx4")->base();
	48	UINT8 *tilerom = state->memregion("gfx4")->base();
49	49
50	50	int data, attr, bank, code, color, flags;
51	51	int quadrant = 0, offs;

src/mame/video/naughtyb.c

r14976	r14977
58	58
59	59	PALETTE_INIT( naughtyb )
60	60	{
61		const UINT8 *color_prom = machine.region("proms")->base();
	61	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
62	62	static const int resistances[2] = { 270, 130 };
63	63	double weights[2];
64	64	int i;

src/mame/video/toypop.c

r14976	r14977
20	20
21	21	PALETTE_INIT( toypop )
22	22	{
23		const UINT8 *color_prom = machine.region("proms")->base();
	23	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
24	24	/* allocate the colortable */
25	25	machine.colortable = colortable_alloc(machine, 256);
26	26

src/mame/video/momoko.c

r14976	r14977
71	71	int xx, sx, sy, px, py, dot;
72	72	UINT32 gfxadr;
73	73	UINT8 d0, d1;
74		UINT8 *BG_GFX = machine.region("gfx2")->base();
	74	UINT8 *BG_GFX = machine.root_device().memregion("gfx2")->base();
75	75
76	76	for (sy = 0; sy < 8; sy++)
77	77	{
r14976	r14977
107	107	int x, y, dx, dy, rx, ry, radr, chr, sy, fx, fy, px, py, offs, col, pri, flip ;
108	108	UINT8 *spriteram = state->m_spriteram;
109	109
110		UINT8 *BG_MAP     = screen.machine().region("user1")->base();
111		UINT8 *BG_COL_MAP = screen.machine().region("user2")->base();
112		UINT8 *FG_MAP     = screen.machine().region("user3")->base();
113		UINT8 *TEXT_COLOR = screen.machine().region("proms")->base();
	110	UINT8 *BG_MAP     = screen.machine().root_device().memregion("user1")->base();
	111	UINT8 *BG_COL_MAP = screen.machine().root_device().memregion("user2")->base();
	112	UINT8 *FG_MAP     = screen.machine().root_device().memregion("user3")->base();
	113	UINT8 *TEXT_COLOR = state->memregion("proms")->base();
114	114
115	115
116	116	flip = state->m_flipscreen ^ (input_port_read(screen.machine(), "FAKE") & 0x01);

src/mame/video/kchamp.c

r14976	r14977
12	12
13	13	PALETTE_INIT( kchamp )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i, red, green, blue;
17	17
18	18	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/digdug.c

r14976	r14977
23	23
24	24	PALETTE_INIT( digdug )
25	25	{
26		const UINT8 *color_prom = machine.region("proms")->base();
	26	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
27	27	int i;
28	28
29	29	machine.colortable = colortable_alloc(machine, 32);
r14976	r14977
90	90
91	91	static TILE_GET_INFO( bg_get_tile_info )
92	92	{
93		UINT8 *rom = machine.region("gfx4")->base();
	93	UINT8 *rom = machine.root_device().memregion("gfx4")->base();
94	94	digdug_state *state =  machine.driver_data<digdug_state>();
95	95
96	96	int code = rom[tile_index | (state->m_bg_select << 10)];

src/mame/video/ultratnk.c

r14976	r14977
11	11
12	12	PALETTE_INIT( ultratnk )
13	13	{
14		const UINT8 *color_prom = machine.region("proms")->base();
	14	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
15	15	/* allocate the colortable */
16	16	machine.colortable = colortable_alloc(machine, 4);
17	17

src/mame/video/gunbustr.c

r14976	r14977
60	60	{
61	61	gunbustr_state *state = machine.driver_data<gunbustr_state>();
62	62	UINT32 *spriteram32 = state->m_spriteram;
63		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	63	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
64	64	int offs, data, tilenum, color, flipx, flipy;
65	65	int x, y, priority, dblsize, curx, cury;
66	66	int sprites_flipscreen = 0;

src/mame/video/scotrsht.c

r14976	r14977
5	5	/* Similar as Iron Horse */
6	6	PALETTE_INIT( scotrsht )
7	7	{
8		const UINT8 *color_prom = machine.region("proms")->base();
	8	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
9	9	int i;
10	10
11	11	/* allocate the colortable */

src/mame/video/taito_z.c

r14976	r14977
147	147	static void contcirc_draw_sprites_16x8( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offs )
148	148	{
149	149	taitoz_state *state = machine.driver_data<taitoz_state>();
150		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	150	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
151	151	UINT16 *spriteram = state->m_spriteram;
152	152	int offs, data, tilenum, color, flipx, flipy;
153	153	int x, y, priority, curx, cury;
r14976	r14977
242	242	static void chasehq_draw_sprites_16x16( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offs )
243	243	{
244	244	taitoz_state *state = machine.driver_data<taitoz_state>();
245		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	245	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
246	246	UINT16 *spriteram = state->m_spriteram;
247	247	int offs, data, tilenum, color, flipx, flipy;
248	248	int x, y, priority, curx, cury;
r14976	r14977
428	428	static void bshark_draw_sprites_16x8( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offs )
429	429	{
430	430	taitoz_state *state = machine.driver_data<taitoz_state>();
431		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	431	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
432	432	UINT16 *spriteram = state->m_spriteram;
433	433	int offs, data, tilenum, color, flipx, flipy;
434	434	int x, y, priority, curx, cury;
r14976	r14977
524	524	static void sci_draw_sprites_16x8( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offs )
525	525	{
526	526	taitoz_state *state = machine.driver_data<taitoz_state>();
527		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	527	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
528	528	UINT16 *spriteram = state->m_spriteram;
529	529	int offs, start_offs, data, tilenum, color, flipx, flipy;
530	530	int x, y, priority, curx, cury;
r14976	r14977
629	629	static void aquajack_draw_sprites_16x8(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int y_offs)
630	630	{
631	631	taitoz_state *state = machine.driver_data<taitoz_state>();
632		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	632	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
633	633	UINT16 *spriteram = state->m_spriteram;
634	634	int offs, data, tilenum, color, flipx, flipy;
635	635	int x, y, priority, curx, cury;
r14976	r14977
724	724	static void spacegun_draw_sprites_16x8(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int y_offs)
725	725	{
726	726	taitoz_state *state = machine.driver_data<taitoz_state>();
727		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	727	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
728	728	UINT16 *spriteram = state->m_spriteram;
729	729	int offs, data, tilenum, color, flipx, flipy;
730	730	int x, y, priority, curx, cury;

src/mame/video/phoenix.c

r14976	r14977
78	78
79	79	PALETTE_INIT( phoenix )
80	80	{
81		const UINT8 *color_prom = machine.region("proms")->base();
	81	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
82	82	int i;
83	83	rgb_t   *rgb;
84	84
r14976	r14977
96	96
97	97	PALETTE_INIT( survival )
98	98	{
99		const UINT8 *color_prom = machine.region("proms")->base();
	99	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
100	100	int i;
101	101	rgb_t   *rgb;
102	102
r14976	r14977
114	114
115	115	PALETTE_INIT( pleiads )
116	116	{
117		const UINT8 *color_prom = machine.region("proms")->base();
	117	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
118	118	int i;
119	119	rgb_t   *rgb;
120	120
r14976	r14977
178	178	state->m_videoram_pg[0] = auto_alloc_array(machine, UINT8, 0x1000);
179	179	state->m_videoram_pg[1] = auto_alloc_array(machine, UINT8, 0x1000);
180	180
181		memory_configure_bank(machine, "bank1", 0, 1, state->m_videoram_pg[0], 0);
182		memory_configure_bank(machine, "bank1", 1, 1, state->m_videoram_pg[1], 0);
183		memory_set_bank(machine, "bank1", 0);
	181	state->membank("bank1")->configure_entry(0, state->m_videoram_pg[0]);
	182	state->membank("bank1")->configure_entry(1, state->m_videoram_pg[1]);
	183	state->membank("bank1")->set_entry(0);
184	184
185	185	state->m_videoram_pg_index = 0;
186	186	state->m_palette_bank = 0;
r14976	r14977
226	226
227	227	WRITE8_MEMBER(phoenix_state::phoenix_videoram_w)
228	228	{
229		UINT8 *rom = machine().region("maincpu")->base();
	229	UINT8 *rom = memregion("maincpu")->base();
230	230
231	231	m_videoram_pg[m_videoram_pg_index][offset] = data;
232	232
r14976	r14977
249	249	{
250	250	/* set memory bank */
251	251	m_videoram_pg_index = data & 1;
252		memory_set_bank(machine(), "bank1", m_videoram_pg_index);
	252	membank("bank1")->set_entry(m_videoram_pg_index);
253	253
254	254	m_cocktail_mode = m_videoram_pg_index && (input_port_read(machine(), "CAB") & 0x01);
255	255
r14976	r14977
272	272	{
273	273	/* set memory bank */
274	274	m_videoram_pg_index = data & 1;
275		memory_set_bank(machine(), "bank1", m_videoram_pg_index);
	275	membank("bank1")->set_entry(m_videoram_pg_index);
276	276
277	277	m_cocktail_mode = m_videoram_pg_index && (input_port_read(machine(), "CAB") & 0x01);
278	278

src/mame/video/markham.c

r14976	r14977
13	13
14	14	PALETTE_INIT( markham )
15	15	{
16		const UINT8 *color_prom = machine.region("proms")->base();
	16	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
17	17	int i;
18	18
19	19	/* allocate the colortable */

src/mame/video/superqix.c

r14976	r14977
127	127	coin_counter_w(machine(), 0,data & 0x02);
128	128	coin_counter_w(machine(), 1,data & 0x04);
129	129
130		memory_set_bank(machine(), "bank1", (data & 0x08) >> 3);
	130	membank("bank1")->set_entry((data & 0x08) >> 3);
131	131
132	132	m_nmi_mask = data & 0x10;
133	133	flip_screen_set(data & 0x20);
r14976	r14977
149	149	m_nmi_mask = data & 0x08;
150	150
151	151	/* bits 4-5 control ROM bank */
152		memory_set_bank(machine(), "bank1", (data & 0x30) >> 4);
	152	membank("bank1")->set_entry((data & 0x30) >> 4);
153	153	}
154	154
155	155

src/mame/video/playch10.c

r14976	r14977
16	16
17	17	PALETTE_INIT( playch10 )
18	18	{
19		const UINT8 *color_prom = machine.region("proms")->base();
	19	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
20	20	ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
21	21	int i;
22	22
r14976	r14977
93	93	VIDEO_START( playch10 )
94	94	{
95	95	playch10_state *state = machine.driver_data<playch10_state>();
96		const UINT8 *bios = machine.region("maincpu")->base();
	96	const UINT8 *bios = state->memregion("maincpu")->base();
97	97	state->m_pc10_bios = (bios[3] == 0x2a) ? 1 : 2;
98	98
99	99	state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,
r14976	r14977
103	103	VIDEO_START( playch10_hboard )
104	104	{
105	105	playch10_state *state = machine.driver_data<playch10_state>();
106		const UINT8 *bios = machine.region("maincpu")->base();
	106	const UINT8 *bios = state->memregion("maincpu")->base();
107	107	state->m_pc10_bios = (bios[3] == 0x2a) ? 1 : 2;
108	108
109	109	state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,

src/mame/video/dday.c

r14976	r14977
50	50
51	51	PALETTE_INIT( dday )
52	52	{
53		const UINT8 *color_prom = machine.region("proms")->base();
	53	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
54	54	int i;
55	55
56	56	palette_set_shadow_factor(machine, 1.0 / 8);
r14976	r14977
187	187	int code, sl_flipx, flipx;
188	188	UINT8* sl_map;
189	189
190		sl_map = &machine.region("user1")->base()[(state->m_sl_image & 0x07) * 0x0200];
	190	sl_map = &state->memregion("user1")->base()[(state->m_sl_image & 0x07) * 0x0200];
191	191
192	192	flipx = (tile_index >> 4) & 0x01;
193	193	sl_flipx = (state->m_sl_image >> 3) & 0x01;

src/mame/video/lockon.c

r14976	r14977
100	100
101	101	PALETTE_INIT( lockon )
102	102	{
103		const UINT8 *color_prom = machine.region("proms")->base();
	103	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
104	104	int i;
105	105
106	106	for (i = 0; i < 1024; ++i)
r14976	r14977
172	172	UINT32 y;
173	173
174	174	/* 3bpp characters */
175		const UINT8 *const gfx1 = machine.region("gfx2")->base();
	175	const UINT8 *const gfx1 = state->memregion("gfx2")->base();
176	176	const UINT8 *const gfx2 = gfx1 + 0x10000;
177	177	const UINT8 *const gfx3 = gfx1 + 0x20000;
178	178	const UINT8 *const clut = gfx1 + 0x30000;
r14976	r14977
308	308	lockon_state *state = machine.driver_data<lockon_state>();
309	309
310	310	/* ROM pointers */
311		const UINT8 *const gfx_rom  = machine.region("gfx4")->base();
	311	const UINT8 *const gfx_rom  = state->memregion("gfx4")->base();
312	312	const UINT8 *const lut_rom  = gfx_rom + 0x30000 + ((state->m_ground_ctrl >> 2) & 0x3 ? 0x10000 : 0);
313	313	const UINT8 *const clut_rom = gfx_rom + 0x50000;
314	314
r14976	r14977
435	435	UINT32 offs;
436	436	lockon_state *state = machine.driver_data<lockon_state>();
437	437
438		const UINT8  *const romlut = machine.region("user1")->base();
439		const UINT16 *const chklut = (UINT16*)machine.region("user2")->base();
440		const UINT8  *const gfxrom = machine.region("gfx5")->base();
441		const UINT8  *const sproms = machine.region("proms")->base() + 0x800;
	438	const UINT8  *const romlut = state->memregion("user1")->base();
	439	const UINT16 *const chklut = (UINT16*)state->memregion("user2")->base();
	440	const UINT8  *const gfxrom = state->memregion("gfx5")->base();
	441	const UINT8  *const sproms = state->memregion("proms")->base() + 0x800;
442	442
443	443	for (offs = 0; offs < state->m_objectram_size; offs += 4)
444	444	{
r14976	r14977
799	799	static void hud_draw( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
800	800	{
801	801	lockon_state *state = machine.driver_data<lockon_state>();
802		UINT8   *tile_rom = machine.region("gfx3")->base();
	802	UINT8   *tile_rom = state->memregion("gfx3")->base();
803	803	UINT32 offs;
804	804
805	805	for (offs = 0x0; offs <= state->m_hudram_size; offs += 2)

src/mame/video/mappy.c

r14976	r14977
32	32
33	33	PALETTE_INIT( superpac )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	static const int resistances[3] = { 1000, 470, 220 };
37	37	double rweights[3], gweights[3], bweights[2];
38	38	int i;
r14976	r14977
92	92
93	93	PALETTE_INIT( mappy )
94	94	{
95		const UINT8 *color_prom = machine.region("proms")->base();
	95	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
96	96	static const int resistances[3] = { 1000, 470, 220 };
97	97	double rweights[3], gweights[3], bweights[2];
98	98	int i;
r14976	r14977
164	164
165	165	PALETTE_INIT( phozon )
166	166	{
167		const UINT8 *color_prom = machine.region("proms")->base();
	167	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
168	168	static const int resistances[4] = { 2200, 1000, 470, 220 };
169	169	double rweights[4], gweights[4], bweights[4];
170	170	int i;

src/mame/video/tigeroad.c

r14976	r14977
112	112	static TILE_GET_INFO( get_bg_tile_info )
113	113	{
114	114	tigeroad_state *state = machine.driver_data<tigeroad_state>();
115		UINT8 *tilerom = machine.region("gfx4")->base();
	115	UINT8 *tilerom = state->memregion("gfx4")->base();
116	116
117	117	int data = tilerom[tile_index];
118	118	int attr = tilerom[tile_index + 1];

src/mame/video/segas32.c

r14976	r14977
1665	1665	};
1666	1666
1667	1667	bitmap_ind16 &bitmap = *state->m_layer_data[(!state->m_is_multi32 || !(data[3] & 0x0800)) ? MIXER_LAYER_SPRITES_2 : MIXER_LAYER_MULTISPR_2].bitmap;
1668		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x400000;
1669		const UINT32 *spritebase = (const UINT32 *)machine.region("gfx2")->base();
	1668	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x400000;
	1669	const UINT32 *spritebase = (const UINT32 *)machine.root_device().memregion("gfx2")->base();
1670	1670
1671	1671	int indirect = data[0] & 0x2000;
1672	1672	int indlocal = data[0] & 0x1000;

src/mame/video/quizdna.c

r14976	r14977
29	29	{
30	30	quizdna_state *state = machine.driver_data<quizdna_state>();
31	31	int code,col,x,y;
32		UINT8 *FG = machine.region("user1")->base();
	32	UINT8 *FG = state->memregion("user1")->base();
33	33
34	34	x = tile_index & 0x1f;
35	35	y = FG[(tile_index >> 5) & 0x1f] & 0x3f;
r14976	r14977
65	65
66	66	WRITE8_MEMBER(quizdna_state::quizdna_bg_ram_w)
67	67	{
68		UINT8 *RAM = machine().region("maincpu")->base();
	68	UINT8 *RAM = memregion("maincpu")->base();
69	69	m_bg_ram[offset] = data;
70	70	RAM[0x12000+offset] = data;
71	71
r14976	r14977
76	76	{
77	77	int i;
78	78	int offs = offset & 0xfff;
79		UINT8 *RAM = machine().region("maincpu")->base();
	79	UINT8 *RAM = memregion("maincpu")->base();
80	80
81	81	RAM[0x10000+offs] = data;
82	82	RAM[0x11000+offs] = data; /* mirror */

src/mame/video/equites.c

r14976	r14977
10	10
11	11	PALETTE_INIT( equites )
12	12	{
13		const UINT8 *color_prom = machine.region("proms")->base();
	13	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
14	14	int i;
15	15
16	16	machine.colortable = colortable_alloc(machine, 256);
r14976	r14977
30	30
31	31	PALETTE_INIT( splndrbt )
32	32	{
33		const UINT8 *color_prom = machine.region("proms")->base();
	33	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
34	34	int i;
35	35
36	36	machine.colortable = colortable_alloc(machine, 256);
r14976	r14977
327	327	static void splndrbt_draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect )
328	328	{
329	329	equites_state *state = machine.driver_data<equites_state>();
330		const UINT8 * const xrom = machine.region("user2")->base();
	330	const UINT8 * const xrom = state->memregion("user2")->base();
331	331	const UINT8 * const yrom = xrom + 0x100;
332	332	const gfx_element* const gfx = machine.gfx[2];
333	333	int offs;
r14976	r14977
405	405	equites_state *state = machine.driver_data<equites_state>();
406	406	bitmap_ind16 &src_bitmap = state->m_bg_tilemap->pixmap();
407	407	bitmap_ind8 &flags_bitmap = state->m_bg_tilemap->flagsmap();
408		const UINT8 * const xrom = machine.region("user1")->base();
	408	const UINT8 * const xrom = state->memregion("user1")->base();
409	409	const UINT8 * const yrom = xrom + 0x2000;
410	410	int scroll_x = state->m_splndrbt_bg_scrollx;
411	411	int scroll_y = state->m_splndrbt_bg_scrolly;

src/mame/video/gradius3.c

r14976	r14977
101	101
102	102	READ16_MEMBER(gradius3_state::gradius3_gfxrom_r)
103	103	{
104		UINT8 *gfxdata = machine().region("gfx2")->base();
	104	UINT8 *gfxdata = memregion("gfx2")->base();
105	105
106	106	return (gfxdata[2 * offset + 1] << 8) | gfxdata[2 * offset];
107	107	}

src/mame/video/mystwarr.c

r14976	r14977
15	15	// reading the original raw data
16	16	static void mystwarr_decode_tiles(running_machine &machine)
17	17	{
18		UINT8 *s = machine.region("gfx1")->base();
19		int len = machine.region("gfx1")->bytes();
	18	UINT8 *s = machine.root_device().memregion("gfx1")->base();
	19	int len = machine.root_device().memregion("gfx1")->bytes();
20	20	UINT8 *pFinish = s+len-3;
21	21	UINT8 *d, *decoded;
22	22	int gfxnum;
r14976	r14977
144	144	{
145	145	mystwarr_state *state = machine.driver_data<mystwarr_state>();
146	146	int tileno, colour;
147		UINT8 *ROM = machine.region("gfx4")->base();
	147	UINT8 *ROM = state->memregion("gfx4")->base();
148	148	UINT8 *dat1 = ROM, *dat2 = ROM + 0x20000, *dat3 = ROM + 0x60000;
149	149
150	150	tileno = dat3[tile_index] | ((dat2[tile_index]&0x3f)<<8);
r14976	r14977
193	193	{
194	194	mystwarr_state *state = machine.driver_data<mystwarr_state>();
195	195	int tileno, colour;
196		UINT8 *ROM = machine.region("gfx4")->base();
	196	UINT8 *ROM = state->memregion("gfx4")->base();
197	197	UINT8 *dat1 = ROM, *dat2 = ROM + 0x40000;
198	198
199	199	tileno = dat2[tile_index] | ((dat1[tile_index]&0x1f)<<8);
r14976	r14977
449	449	// reference: 223e5c in gaiapolis (ROMs 34j and 36m)
450	450	READ16_MEMBER(mystwarr_state::gai_053936_tilerom_0_r)
451	451	{
452		UINT8 *ROM1 = (UINT8 *)machine().region("gfx4")->base();
453		UINT8 *ROM2 = (UINT8 *)machine().region("gfx4")->base();
	452	UINT8 *ROM1 = (UINT8 *)machine().root_device().memregion("gfx4")->base();
	453	UINT8 *ROM2 = (UINT8 *)machine().root_device().memregion("gfx4")->base();
454	454
455	455	ROM1 += 0x20000;
456	456	ROM2 += 0x20000+0x40000;
r14976	r14977
460	460
461	461	READ16_MEMBER(mystwarr_state::ddd_053936_tilerom_0_r)
462	462	{
463		UINT8 *ROM1 = (UINT8 *)machine().region("gfx4")->base();
464		UINT8 *ROM2 = (UINT8 *)machine().region("gfx4")->base();
	463	UINT8 *ROM1 = (UINT8 *)machine().root_device().memregion("gfx4")->base();
	464	UINT8 *ROM2 = (UINT8 *)machine().root_device().memregion("gfx4")->base();
465	465
466	466	ROM2 += 0x40000;
467	467
r14976	r14977
471	471	// reference: 223e1a in gaiapolis (ROM 36j)
472	472	READ16_MEMBER(mystwarr_state::ddd_053936_tilerom_1_r)
473	473	{
474		UINT8 *ROM = (UINT8 *)machine().region("gfx4")->base();
	474	UINT8 *ROM = (UINT8 *)machine().root_device().memregion("gfx4")->base();
475	475
476	476	return ROM[offset/2];
477	477	}
r14976	r14977
479	479	// reference: 223db0 in gaiapolis (ROMs 32n, 29n, 26n)
480	480	READ16_MEMBER(mystwarr_state::gai_053936_tilerom_2_r)
481	481	{
482		UINT8 *ROM = (UINT8 *)machine().region("gfx3")->base();
	482	UINT8 *ROM = (UINT8 *)machine().root_device().memregion("gfx3")->base();
483	483
484	484	offset += (m_roz_rombank * 0x100000);
485	485
r14976	r14977
488	488
489	489	READ16_MEMBER(mystwarr_state::ddd_053936_tilerom_2_r)
490	490	{
491		UINT8 *ROM = (UINT8 *)machine().region("gfx3")->base();
	491	UINT8 *ROM = (UINT8 *)machine().root_device().memregion("gfx3")->base();
492	492
493	493	offset += (m_roz_rombank * 0x100000);
494	494

src/mame/video/sega16sp.c

r14976	r14977
78	78
79	79	void segaic16_sprites_hangon_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
80	80	{
81		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x10000;
82		const UINT16 *spritebase = (const UINT16 *)machine.region("gfx2")->base();
83		const UINT8 *zoom = (const UINT8 *)machine.region("proms")->base();
	81	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x10000;
	82	const UINT16 *spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
	83	const UINT8 *zoom = (const UINT8 *)machine.root_device().memregion("proms")->base();
84	84	sega16sp_state *sega16sp = get_safe_token(device);
85	85	UINT16* data = sega16sp->spriteram;
86	86
r14976	r14977
243	243
244	244	void segaic16_sprites_sharrier_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
245	245	{
246		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x20000;
247		const UINT32 *spritebase = (const UINT32 *)machine.region("gfx2")->base();
248		const UINT8 *zoom = (const UINT8 *)machine.region("proms")->base();
	246	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x20000;
	247	const UINT32 *spritebase = (const UINT32 *)machine.root_device().memregion("gfx2")->base();
	248	const UINT8 *zoom = (const UINT8 *)machine.root_device().memregion("proms")->base();
249	249	sega16sp_state *sega16sp = get_safe_token(device);
250	250	UINT16* data = sega16sp->spriteram;
251	251
r14976	r14977
414	414
415	415	void segaic16_sprites_16a_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
416	416	{
417		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x10000;
418		const UINT16 *spritebase = (const UINT16 *)machine.region("gfx2")->base();
	417	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x10000;
	418	const UINT16 *spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
419	419	sega16sp_state *sega16sp = get_safe_token(device);
420	420	UINT16* data = sega16sp->spriteram;
421	421
r14976	r14977
580	580	sega16sp_state *sega16sp = get_safe_token(device);
581	581	UINT16* data = sega16sp->spriteram;
582	582
583		spritebase = (const UINT16 *)machine.region("gfx2")->base();
	583	spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
584	584	if (!spritebase)
585	585	return;
586	586
587		numbanks = machine.region("gfx2")->bytes() / 0x20000;
	587	numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x20000;
588	588
589	589	/* first scan forward to find the end of the list */
590	590	for (data = sega16sp->spriteram; data < sega16sp->spriteram + sega16sp->ramsize/2; data += 8)
r14976	r14977
741	741
742	742	void segaic16_sprites_yboard_16b_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
743	743	{
744		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x20000;
745		const UINT16 *spritebase = (const UINT16 *)machine.region("gfx2")->base();
	744	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x20000;
	745	const UINT16 *spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
746	746	sega16sp_state *sega16sp = get_safe_token(device);
747	747	UINT16* data = sega16sp->spriteram;
748	748
r14976	r14977
919	919
920	920	static void segaic16_sprites_xboard_outrun_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int type)
921	921	{
922		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x40000;
923		const UINT32 *spritebase = (const UINT32 *)machine.region("gfx2")->base();
	922	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x40000;
	923	const UINT32 *spritebase = (const UINT32 *)machine.root_device().memregion("gfx2")->base();
924	924	sega16sp_state *sega16sp = get_safe_token(device);
925	925	UINT16* data = sega16sp->spriteram;
926	926
r14976	r14977
1090	1090
1091	1091	void segaic16_sprites_yboard_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
1092	1092	{
1093		UINT8 numbanks = machine.region("gfx1")->bytes() / 0x80000;
1094		const UINT64 *spritebase = (const UINT64 *)machine.region("gfx1")->base();
	1093	UINT8 numbanks = machine.root_device().memregion("gfx1")->bytes() / 0x80000;
	1094	const UINT64 *spritebase = (const UINT64 *)machine.root_device().memregion("gfx1")->base();
1095	1095	const UINT16 *rotatebase = segaic16_rotate[0].buffer ? segaic16_rotate[0].buffer : segaic16_rotate[0].rotateram;
1096	1096	UINT8 visited[0x1000];
1097	1097	sega16sp_state *sega16sp = get_safe_token(device);
r14976	r14977
1384	1384
1385	1385	void segaic16_sprites_16a_bootleg_wb3bl_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
1386	1386	{
1387		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x10000;
1388		const UINT16 *spritebase = (const UINT16 *)machine.region("gfx2")->base();
	1387	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x10000;
	1388	const UINT16 *spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
1389	1389	sega16sp_state *sega16sp = get_safe_token(device);
1390	1390	UINT16* data = sega16sp->spriteram;
1391	1391
r14976	r14977
1407	1407	/* 4 player passing shot is different to this.. */
1408	1408	void segaic16_sprites_16a_bootleg_passhtb_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
1409	1409	{
1410		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x10000;
1411		const UINT16 *spritebase = (const UINT16 *)machine.region("gfx2")->base();
	1410	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x10000;
	1411	const UINT16 *spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
1412	1412	sega16sp_state *sega16sp = get_safe_token(device);
1413	1413	UINT16* data = sega16sp->spriteram;
1414	1414
r14976	r14977
1429	1429
1430	1430	void segaic16_sprites_16a_bootleg_shinobld_draw(running_machine &machine, device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect)
1431	1431	{
1432		UINT8 numbanks = machine.region("gfx2")->bytes() / 0x10000;
1433		const UINT16 *spritebase = (const UINT16 *)machine.region("gfx2")->base();
	1432	UINT8 numbanks = machine.root_device().memregion("gfx2")->bytes() / 0x10000;
	1433	const UINT16 *spritebase = (const UINT16 *)machine.root_device().memregion("gfx2")->base();
1434	1434	sega16sp_state *sega16sp = get_safe_token(device);
1435	1435	UINT16* data = sega16sp->spriteram;
1436	1436

src/mame/video/irobot.c

r14976	r14977
39	39
40	40	PALETTE_INIT( irobot )
41	41	{
42		const UINT8 *color_prom = machine.region("proms")->base();
	42	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
43	43	int i;
44	44
45	45	/* convert the color prom for the text palette */

src/mame/video/skykid.c

r14976	r14977
17	17
18	18	PALETTE_INIT( skykid )
19	19	{
20		const UINT8 *color_prom = machine.region("proms")->base();
	20	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
21	21	int i;
22	22
23	23	/* allocate the colortable */

src/mame/video/gomoku.c

r14976	r14977
20	20
21	21	PALETTE_INIT( gomoku )
22	22	{
23		const UINT8 *color_prom = machine.region("proms")->base();
	23	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
24	24	int i;
25	25	int bit0, bit1, bit2, r, g, b;
26	26
r14976	r14977
106	106	VIDEO_START( gomoku )
107	107	{
108	108	gomoku_state *state = machine.driver_data<gomoku_state>();
109		UINT8 *GOMOKU_BG_X = machine.region( "user1" )->base();
110		UINT8 *GOMOKU_BG_Y = machine.region( "user2" )->base();
111		UINT8 *GOMOKU_BG_D = machine.region( "user3" )->base();
	109	UINT8 *GOMOKU_BG_X = machine.root_device().memregion( "user1" )->base();
	110	UINT8 *GOMOKU_BG_Y = machine.root_device().memregion( "user2" )->base();
	111	UINT8 *GOMOKU_BG_D = state->memregion( "user3" )->base();
112	112	int x, y;
113	113	int bgdata;
114	114	int color;
r14976	r14977
149	149	SCREEN_UPDATE_IND16( gomoku )
150	150	{
151	151	gomoku_state *state = screen.machine().driver_data<gomoku_state>();
152		UINT8 *GOMOKU_BG_X = screen.machine().region( "user1" )->base();
153		UINT8 *GOMOKU_BG_Y = screen.machine().region( "user2" )->base();
154		UINT8 *GOMOKU_BG_D = screen.machine().region( "user3" )->base();
	152	UINT8 *GOMOKU_BG_X = screen.machine().root_device().memregion( "user1" )->base();
	153	UINT8 *GOMOKU_BG_Y = screen.machine().root_device().memregion( "user2" )->base();
	154	UINT8 *GOMOKU_BG_D = state->memregion( "user3" )->base();
155	155	int x, y;
156	156	int bgram;
157	157	int bgoffs;

src/mame/video/konicdev.c

r14976	r14977
502	502	1d00     : bits 0 & 1 might enable NMI and FIRQ, not sure
503	503	: bit 2 = IRQ enable
504	504	1d80     : ROM bank selector bits 0-3 = bank 0 bits 4-7 = bank 1
505		1e00     : ROM subbank selector for ROM testing
	505	1e00     : ROM membank selector for ROM testing
506	506	1e80     : bit 0 = flip screen (applies to tilemaps only, not sprites)
507	507	: bit 1 = set by crimfght, mainevt, surpratk, xmen, mia, punkshot, thndrx2, spy
508	508	:         it seems to enable tile flip X, however flip X is handled by the
r14976	r14977
1213	1213	/* helper function to join two 16-bit ROMs and form a 32-bit data stream */
1214	1214	void konamid_rom_deinterleave_2(running_machine &machine, const char *mem_region)
1215	1215	{
1216		konami_shuffle_16((UINT16 *)machine.region(mem_region)->base(),machine.region(mem_region)->bytes()/2);
	1216	konami_shuffle_16((UINT16 *)machine.root_device().memregion(mem_region)->base(),machine.root_device().memregion(mem_region)->bytes()/2);
1217	1217	}
1218	1218
1219	1219	/* hacked version of rom_deinterleave_2_half for Lethal Enforcers */
1220	1220	void konamid_rom_deinterleave_2_half(running_machine &machine, const char *mem_region)
1221	1221	{
1222		UINT8 *rgn = machine.region(mem_region)->base();
	1222	UINT8 *rgn = machine.root_device().memregion(mem_region)->base();
1223	1223
1224		konami_shuffle_16((UINT16 *)rgn,machine.region(mem_region)->bytes()/4);
1225		konami_shuffle_16((UINT16 *)(rgn+machine.region(mem_region)->bytes()/2),machine.region(mem_region)->bytes()/4);
	1224	konami_shuffle_16((UINT16 *)rgn,machine.root_device().memregion(mem_region)->bytes()/4);
	1225	konami_shuffle_16((UINT16 *)(rgn+machine.root_device().memregion(mem_region)->bytes()/2),machine.root_device().memregion(mem_region)->bytes()/4);
1226	1226	}
1227	1227
1228	1228	/* helper function to join four 16-bit ROMs and form a 64-bit data stream */
r14976	r14977
1259	1259	konamid_rom_deinterleave_4(machine, gfx_memory_region);
1260	1260	break;
1261	1261	case KONAMI_ROM_SHUFFLE8:
1262		konami_shuffle_8(machine.region(gfx_memory_region)->base(), machine.region(gfx_memory_region)->bytes());
	1262	konami_shuffle_8(machine.root_device().memregion(gfx_memory_region)->base(), machine.root_device().memregion(gfx_memory_region)->bytes());
1263	1263	break;
1264	1264	}
1265	1265	}
r14976	r14977
2228	2228	k052109->callback(device->machine(), 0, bank, &code, &color, &flags, &priority);
2229	2229
2230	2230	addr = (code << 5) + (offset & 0x1f);
2231		addr &= device->machine().region(k052109->memory_region)->bytes() - 1;
	2231	addr &= device->machine().root_device().memregion(k052109->memory_region)->bytes() - 1;
2232	2232
2233	2233	//      logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n", cpu_get_pc(&space->device()), offset, k052109->romsubbank, bank, addr);
2234	2234
2235		return device->machine().region(k052109->memory_region)->base()[addr];
	2235	return device->machine().root_device().memregion(k052109->memory_region)->base()[addr];
2236	2236	}
2237	2237	}
2238	2238
r14976	r14977
2696	2696	switch (intf->plane_order)
2697	2697	{
2698	2698	case NORMAL_PLANE_ORDER:
2699		total = machine.region(intf->gfx_memory_region)->bytes() / 32;
2700		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout, 4);
	2699	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 32;
	2700	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout, 4);
2701	2701	break;
2702	2702
2703	2703	case GRADIUS3_PLANE_ORDER:
2704	2704	total = 0x1000;
2705		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout_gradius3, 4);
	2705	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout_gradius3, 4);
2706	2706	break;
2707	2707
2708	2708	default:
r14976	r14977
2835	2835	k051960->callback(device->machine(), &code, &color, &pri, &shadow);
2836	2836
2837	2837	addr = (code << 7) | (off1 << 2) | byte;
2838		addr &= device->machine().region(k051960->memory_region)->bytes() - 1;
	2838	addr &= device->machine().root_device().memregion(k051960->memory_region)->bytes() - 1;
2839	2839
2840	2840	//  popmessage("%s: addr %06x", device->machine().describe_context(), addr);
2841	2841
2842		return device->machine().region(k051960->memory_region)->base()[addr];
	2842	return device->machine().root_device().memregion(k051960->memory_region)->base()[addr];
2843	2843	}
2844	2844
2845	2845	READ8_DEVICE_HANDLER( k051960_r )
r14976	r14977
3248	3248	switch (intf->plane_order)
3249	3249	{
3250	3250	case NORMAL_PLANE_ORDER:
3251		total = machine.region(intf->gfx_memory_region)->bytes() / 128;
3252		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &spritelayout, 4);
	3251	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 128;
	3252	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &spritelayout, 4);
3253	3253	break;
3254	3254
3255	3255	case REVERSE_PLANE_ORDER:
3256		total = machine.region(intf->gfx_memory_region)->bytes() / 128;
3257		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &spritelayout_reverse, 4);
	3256	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 128;
	3257	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &spritelayout_reverse, 4);
3258	3258	break;
3259	3259
3260	3260	case GRADIUS3_PLANE_ORDER:
3261	3261	total = 0x4000;
3262		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &spritelayout_gradius3, 4);
	3262	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &spritelayout_gradius3, 4);
3263	3263	break;
3264	3264
3265	3265	default:
r14976	r14977
3430	3430	addr = (k053244->rombank << 19) | ((k053244->regs[11] & 0x7) << 18)
3431	3431	| (k053244->regs[8] << 10) | (k053244->regs[9] << 2)
3432	3432	| ((offset & 3) ^ 1);
3433		addr &= machine.region(k053244->memory_region)->bytes() - 1;
	3433	addr &= machine.root_device().memregion(k053244->memory_region)->bytes() - 1;
3434	3434
3435	3435	//  popmessage("%s: offset %02x addr %06x", machine.describe_context(), offset & 3, addr);
3436	3436
3437		return machine.region(k053244->memory_region)->base()[addr];
	3437	return machine.root_device().memregion(k053244->memory_region)->base()[addr];
3438	3438	}
3439	3439	else if (offset == 0x06)
3440	3440	{
r14976	r14977
4059	4059	switch (intf->plane_order)
4060	4060	{
4061	4061	case NORMAL_PLANE_ORDER:
4062		total = machine.region(intf->gfx_memory_region)->bytes() / 128;
4063		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &spritelayout, 4);
	4062	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 128;
	4063	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &spritelayout, 4);
4064	4064	break;
4065	4065
4066	4066	default:
r14976	r14977
4284	4284	READ16_DEVICE_HANDLER( k055673_rom_word_r )   // 5bpp
4285	4285	{
4286	4286	k053247_state *k053246 = k053247_get_safe_token(device);
4287		UINT8 *ROM8 = (UINT8 *)device->machine().region(k053246->memory_region)->base();
4288		UINT16 *ROM = (UINT16 *)device->machine().region(k053246->memory_region)->base();
4289		int size4 = (device->machine().region(k053246->memory_region)->bytes() / (1024 * 1024)) / 5;
	4287	UINT8 *ROM8 = (UINT8 *)device->machine().root_device().memregion(k053246->memory_region)->base();
	4288	UINT16 *ROM = (UINT16 *)device->machine().root_device().memregion(k053246->memory_region)->base();
	4289	int size4 = (device->machine().root_device().memregion(k053246->memory_region)->bytes() / (1024 * 1024)) / 5;
4290	4290	int romofs;
4291	4291
4292	4292	size4 *= 4 * 1024 * 1024;   // get offset to 5th bit
r14976	r14977
4323	4323	READ16_DEVICE_HANDLER( k055673_GX6bpp_rom_word_r )
4324	4324	{
4325	4325	k053247_state *k053246 = k053247_get_safe_token(device);
4326		UINT16 *ROM = (UINT16 *)device->machine().region(k053246->memory_region)->base();
	4326	UINT16 *ROM = (UINT16 *)device->machine().root_device().memregion(k053246->memory_region)->base();
4327	4327	int romofs;
4328	4328
4329	4329	romofs = k053246->kx46_regs[6] << 16 | k053246->kx46_regs[7] << 8 | k053246->kx46_regs[4];
r14976	r14977
4363	4363	int addr;
4364	4364
4365	4365	addr = (k053246->kx46_regs[6] << 17) | (k053246->kx46_regs[7] << 9) | (k053246->kx46_regs[4] << 1) | ((offset & 1) ^ 1);
4366		addr &= device->machine().region(k053246->memory_region)->bytes() - 1;
	4366	addr &= device->machine().root_device().memregion(k053246->memory_region)->bytes() - 1;
4367	4367	//      if (VERBOSE)
4368	4368	//          popmessage("%04x: offset %02x addr %06x", cpu_get_pc(&space->device()), offset, addr);
4369		return device->machine().region(k053246->memory_region)->base()[addr];
	4369	return device->machine().root_device().memregion(k053246->memory_region)->base()[addr];
4370	4370	}
4371	4371	else
4372	4372	{
r14976	r14977
4895	4895	switch (intf->plane_order)
4896	4896	{
4897	4897	case NORMAL_PLANE_ORDER:
4898		total = machine.region(intf->gfx_memory_region)->bytes() / 128;
4899		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &spritelayout, 4);
	4898	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 128;
	4899	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &spritelayout, 4);
4900	4900	break;
4901	4901
4902	4902	case TASMAN_PLANE_ORDER:
4903		total = machine.region(intf->gfx_memory_region)->bytes() / 128;
4904		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &tasman_16x16_layout, 4);
	4903	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 128;
	4904	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &tasman_16x16_layout, 4);
4905	4905	break;
4906	4906
4907	4907	default:
r14976	r14977
4999	4999
5000	5000	k053247->screen = machine.device<screen_device>(intf->screen);
5001	5001
5002		K055673_rom = (UINT16 *)machine.region(intf->gfx_memory_region)->base();
	5002	K055673_rom = (UINT16 *)machine.root_device().memregion(intf->gfx_memory_region)->base();
5003	5003
5004	5004	/* decode the graphics */
5005	5005	switch (intf->plane_order)   /* layout would be more correct than plane_order, but we use k053247_interface */
5006	5006	{
5007	5007	case K055673_LAYOUT_GX:
5008		size4 = (machine.region(intf->gfx_memory_region)->bytes() / (1024 * 1024)) / 5;
	5008	size4 = (machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (1024 * 1024)) / 5;
5009	5009	size4 *= 4 * 1024 * 1024;
5010	5010	/* set the # of tiles based on the 4bpp section */
5011	5011	K055673_rom = auto_alloc_array(machine, UINT16, size4 * 5 / 2);
5012	5012	d = (UINT8 *)K055673_rom;
5013	5013	// now combine the graphics together to form 5bpp
5014		s1 = machine.region(intf->gfx_memory_region)->base(); // 4bpp area
	5014	s1 = machine.root_device().memregion(intf->gfx_memory_region)->base(); // 4bpp area
5015	5015	s2 = s1 + (size4);    // 1bpp area
5016	5016	for (i = 0; i < size4; i+= 4)
5017	5017	{
r14976	r14977
5027	5027	break;
5028	5028
5029	5029	case K055673_LAYOUT_RNG:
5030		total = machine.region(intf->gfx_memory_region)->bytes() / (16 * 16 / 2);
	5030	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (16 * 16 / 2);
5031	5031	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout2, 4);
5032	5032	break;
5033	5033
5034	5034	case K055673_LAYOUT_LE2:
5035		total = machine.region(intf->gfx_memory_region)->bytes() / (16 * 16);
	5035	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (16 * 16);
5036	5036	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout3, 4);
5037	5037	break;
5038	5038
5039	5039	case K055673_LAYOUT_GX6:
5040		total = machine.region(intf->gfx_memory_region)->bytes() / (16 * 16 * 6 / 8);
	5040	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (16 * 16 * 6 / 8);
5041	5041	decode_gfx(machine, intf->gfx_num, (UINT8 *)K055673_rom, total, &spritelayout4, 4);
5042	5042	break;
5043	5043
r14976	r14977
5175	5175	int addr = offset + (k051316->ctrlram[0x0c] << 11) + (k051316->ctrlram[0x0d] << 19);
5176	5176	if (k051316->bpp <= 4)
5177	5177	addr /= 2;
5178		addr &= device->machine().region(k051316->memory_region)->bytes() - 1;
	5178	addr &= device->machine().root_device().memregion(k051316->memory_region)->bytes() - 1;
5179	5179
5180	5180	//  popmessage("%s: offset %04x addr %04x", device->machine().describe_context(), offset, addr);
5181	5181
5182		return device->machine().region(k051316->memory_region)->base()[addr];
	5182	return device->machine().root_device().memregion(k051316->memory_region)->base()[addr];
5183	5183	}
5184	5184	else
5185	5185	{
r14976	r14977
5345	5345	case -4:
5346	5346	total = 0x400;
5347	5347	is_tail2nos = 1;
5348		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout_tail2nos, 4);
	5348	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout_tail2nos, 4);
5349	5349	break;
5350	5350
5351	5351	case 4:
5352		total = machine.region(intf->gfx_memory_region)->bytes() / 128;
5353		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout4, 4);
	5352	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 128;
	5353	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout4, 4);
5354	5354	break;
5355	5355
5356	5356	case 7:
5357		total = machine.region(intf->gfx_memory_region)->bytes() / 256;
5358		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout7, 7);
	5357	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 256;
	5358	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout7, 7);
5359	5359	break;
5360	5360
5361	5361	case 8:
5362		total = machine.region(intf->gfx_memory_region)->bytes() / 256;
5363		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout8, 8);
	5362	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 256;
	5363	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout8, 8);
5364	5364	break;
5365	5365
5366	5366	default:
r14976	r14977
6381	6381	UINT8 *rombase;
6382	6382	int base, ret;
6383	6383
6384		rombase = (UINT8 *)device->machine().region(k056832->memory_region)->base();
	6384	rombase = (UINT8 *)device->machine().root_device().memregion(k056832->memory_region)->base();
6385	6385
6386	6386	if ((k056832->rom_half) && (zerosec))
6387	6387	{
r14976	r14977
6463	6463	int addr = 0x2000 * k056832->cur_gfx_banks + 2 * offset;
6464	6464
6465	6465	if (!k056832->rombase)
6466		k056832->rombase = device->machine().region(k056832->memory_region)->base();
	6466	k056832->rombase = device->machine().root_device().memregion(k056832->memory_region)->base();
6467	6467
6468	6468	return k056832->rombase[addr + 1] | (k056832->rombase[addr] << 8);
6469	6469	}
r14976	r14977
6477	6477	int addr;
6478	6478
6479	6479	if (!k056832->rombase)
6480		k056832->rombase = device->machine().region(k056832->memory_region)->base();
	6480	k056832->rombase = device->machine().root_device().memregion(k056832->memory_region)->base();
6481	6481
6482	6482	if (k056832->regsb[2] & 0x8)
6483	6483	{
r14976	r14977
6540	6540	int addr = 0x4000 * k056832->cur_gfx_banks + offset;
6541	6541
6542	6542	if (!k056832->rombase)
6543		k056832->rombase = device->machine().region(k056832->memory_region)->base();
	6543	k056832->rombase = device->machine().root_device().memregion(k056832->memory_region)->base();
6544	6544
6545	6545	return k056832->rombase[addr + 2] | (k056832->rombase[addr] << 8);
6546	6546	}
r14976	r14977
6551	6551	int addr = 0x8000 * k056832->cur_gfx_banks + 2 * offset;
6552	6552
6553	6553	if (!k056832->rombase)
6554		k056832->rombase = device->machine().region(k056832->memory_region)->base();
	6554	k056832->rombase = device->machine().root_device().memregion(k056832->memory_region)->base();
6555	6555
6556	6556	return k056832->rombase[addr + 2] | (k056832->rombase[addr] << 8);
6557	6557	}
r14976	r14977
6562	6562	int addr = 0x2000 * k056832->cur_gfx_banks + 2 * offset;
6563	6563
6564	6564	if (!k056832->rombase)
6565		k056832->rombase = device->machine().region(k056832->memory_region)->base();
	6565	k056832->rombase = device->machine().root_device().memregion(k056832->memory_region)->base();
6566	6566
6567	6567	return k056832->rombase[addr + 1] | (k056832->rombase[addr] << 8);
6568	6568	}
r14976	r14977
7849	7849	switch (intf->bpp)
7850	7850	{
7851	7851	case K056832_BPP_4:
7852		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 4);
7853		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout4, 4);
	7852	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 4);
	7853	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout4, 4);
7854	7854	break;
7855	7855
7856	7856	case K056832_BPP_5:
7857		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 5);
7858		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout5, 4);
	7857	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 5);
	7858	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout5, 4);
7859	7859	break;
7860	7860
7861	7861	case K056832_BPP_6:
7862		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 6);
7863		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout6, 4);
	7862	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 6);
	7863	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout6, 4);
7864	7864	break;
7865	7865
7866	7866	case K056832_BPP_8:
7867		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 8);
7868		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout8, 4);
	7867	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 8);
	7868	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout8, 4);
7869	7869	break;
7870	7870
7871	7871	case K056832_BPP_8LE:
7872		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 8);
7873		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout8le, 4);
	7872	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 8);
	7873	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout8le, 4);
7874	7874	break;
7875	7875
7876	7876	case K056832_BPP_8TASMAN:
7877		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 8);
7878		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout8_tasman, 4);
	7877	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 8);
	7878	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout8_tasman, 4);
7879	7879	break;
7880	7880
7881	7881	case K056832_BPP_4dj:
7882		total = machine.region(intf->gfx_memory_region)->bytes() / (i * 4);
7883		decode_gfx(machine, intf->gfx_num, machine.region(intf->gfx_memory_region)->base(), total, &charlayout4dj, 4);
	7882	total = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / (i * 4);
	7883	decode_gfx(machine, intf->gfx_num, machine.root_device().memregion(intf->gfx_memory_region)->base(), total, &charlayout4dj, 4);
7884	7884	break;
7885	7885
7886	7886	default:
r14976	r14977
7896	7896	k056832->gfxnum = intf->gfx_num;
7897	7897	k056832->callback = intf->callback;
7898	7898
7899		k056832->rombase = machine.region(intf->gfx_memory_region)->base();
7900		k056832->num_gfx_banks = machine.region(intf->gfx_memory_region)->bytes() / 0x2000;
	7899	k056832->rombase = machine.root_device().memregion(intf->gfx_memory_region)->base();
	7900	k056832->num_gfx_banks = machine.root_device().memregion(intf->gfx_memory_region)->bytes() / 0x2000;
7901	7901	k056832->djmain_hack = intf->djmain_hack;
7902	7902
7903	7903	k056832->cur_gfx_banks = 0;
r14976	r14977
8495	8495	{
8496	8496	case 0x0b:      // CG Board ROM read
8497	8497	{
8498		UINT16 *rom = (UINT16*)device->machine().region(k001006->gfx_region)->base();
	8498	UINT16 *rom = (UINT16*)device->machine().root_device().memregion(k001006->gfx_region)->base();
8499	8499	return rom[k001006->addr / 2] << 16;
8500	8500	}
8501	8501	case 0x0d:      // Palette RAM read
r14976	r14977
9472	9472	height = k001005->screen->height();
9473	9473	k001005->zbuffer = auto_bitmap_ind32_alloc(device->machine(), width, height);
9474	9474
9475		k001005->gfxrom = device->machine().region(intf->gfx_memory_region)->base();
	9475	k001005->gfxrom = device->machine().root_device().memregion(intf->gfx_memory_region)->base();
9476	9476
9477	9477	k001005->bitmap[0] = auto_bitmap_rgb32_alloc(device->machine(), k001005->screen->width(), k001005->screen->height());
9478	9478	k001005->bitmap[1] = auto_bitmap_rgb32_alloc(device->machine(), k001005->screen->width(), k001005->screen->height());

src/mame/video/firetrk.c

r14976	r14977
65	65
66	66	PALETTE_INIT( montecar )
67	67	{
68		const UINT8 *color_prom = machine.region("proms")->base();
	68	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
69	69	firetrk_state *state = machine.driver_data<firetrk_state>();
70	70	int i;
71	71

src/mame/video/m57.c

r14976	r14977
32	32
33	33	PALETTE_INIT( m57 )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	int i;
37	37
38	38	machine.colortable = colortable_alloc(machine, 32 * 8 + 16);

src/mame/video/mustache.c

r14976	r14977
12	12
13	13	PALETTE_INIT(mustache)
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	for (i = 0;i < 256;i++)

src/mame/video/neogeo.c

r14976	r14977
271	271	neogeo_state *state = machine.driver_data<neogeo_state>();
272	272	int x;
273	273
274		UINT8* gfx_base = machine.region(state->m_fixed_layer_source ? "fixed" : "fixedbios")->base();
275		UINT32 addr_mask = machine.region(state->m_fixed_layer_source ? "fixed" : "fixedbios")->bytes() - 1;
	274	UINT8* gfx_base = machine.root_device().memregion(state->m_fixed_layer_source ? "fixed" : "fixedbios")->base();
	275	UINT32 addr_mask = state->memregion(state->m_fixed_layer_source ? "fixed" : "fixedbios")->bytes() - 1;
276	276	UINT16 *video_data = &state->m_videoram[0x7000 | (scanline >> 3)];
277	277	UINT32 *pixel_addr = &bitmap.pix32(scanline, NEOGEO_HBEND);
278	278
r14976	r14977
689	689	power of 2 */
690	690	state->m_sprite_gfx_address_mask = 0xffffffff;
691	691
692		len = machine.region("sprites")->bytes();
	692	len = state->memregion("sprites")->bytes();
693	693
694	694	for (bit = 0x80000000; bit != 0; bit >>= 1)
695	695	{
r14976	r14977
701	701
702	702	state->m_sprite_gfx = auto_alloc_array_clear(machine, UINT8, state->m_sprite_gfx_address_mask + 1);
703	703
704		src = machine.region("sprites")->base();
	704	src = machine.root_device().memregion("sprites")->base();
705	705	dest = state->m_sprite_gfx;
706	706
707	707	for (i = 0; i < len; i += 0x80, src += 0x80)
r14976	r14977
892	892
893	893	machine.save().register_postload(save_prepost_delegate(FUNC(regenerate_pens), &machine));
894	894
895		state->m_region_zoomy = machine.region("zoomy")->base();
	895	state->m_region_zoomy = state->memregion("zoomy")->base();
896	896	}
897	897
898	898

src/mame/video/snookr10.c

r14976	r14977
57	57
58	58	PALETTE_INIT( snookr10 )
59	59	{
60		const UINT8 *color_prom = machine.region("proms")->base();
	60	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
61	61	/* GGBBBRRR */
62	62
63	63	int i;
r14976	r14977
118	118
119	119	PALETTE_INIT( apple10 )
120	120	{
121		const UINT8 *color_prom = machine.region("proms")->base();
	121	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
122	122	/* GGBBBRRR */
123	123
124	124	int i, cn;

src/mame/video/konamigx.c

r14976	r14977
1863	1863	static TILE_GET_INFO( get_gx_psac3_tile_info )
1864	1864	{
1865	1865	int tileno, colour, flip;
1866		UINT8 *tmap = machine.region("gfx4")->base();
	1866	UINT8 *tmap = machine.root_device().memregion("gfx4")->base();
1867	1867
1868	1868	int base_index = tile_index;
1869	1869
r14976	r14977
1884	1884	static TILE_GET_INFO( get_gx_psac3_alt_tile_info )
1885	1885	{
1886	1886	int tileno, colour, flip;
1887		UINT8 *tmap = machine.region("gfx4")->base()+0x20000;
	1887	UINT8 *tmap = machine.root_device().memregion("gfx4")->base()+0x20000;
1888	1888
1889	1889	int base_index = tile_index;
1890	1890

src/mame/video/sprcros2.c

r14976	r14977
9	9
10	10	PALETTE_INIT( sprcros2 )
11	11	{
12		const UINT8 *color_prom = machine.region("proms")->base();
	12	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
13	13	int i;
14	14
15	15	/* allocate the colortable */

src/mame/video/ladybug.c

r14976	r14977
95	95
96	96	PALETTE_INIT( ladybug )
97	97	{
98		const UINT8 *color_prom = machine.region("proms")->base();
	98	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
99	99	palette_init_common(machine, color_prom, 0x20, 0, 5, 2, 6, 4, 7);
100	100	}
101	101
102	102	PALETTE_INIT( sraider )
103	103	{
104		const UINT8 *color_prom = machine.region("proms")->base();
	104	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
105	105	int i;
106	106
107	107	/* the resistor net may be probably different than Lady Bug */

src/mame/video/combatsc.c

r14976	r14977
12	12
13	13	PALETTE_INIT( combatsc )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int pal;
17	17
18	18	/* allocate the colortable */
r14976	r14977
63	63
64	64	PALETTE_INIT( combatscb )
65	65	{
66		const UINT8 *color_prom = machine.region("proms")->base();
	66	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
67	67	int pal;
68	68
69	69	/* allocate the colortable */

src/mame/video/rockrage.c

r14976	r14977
4	4
5	5	PALETTE_INIT( rockrage )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	/* allocate the colortable */

src/mame/video/ppu2c0x.c

r14976	r14977
410	410
411	411	int R, G, B;
412	412
413		UINT8 *palette_data = machine.region("palette")->base();
	413	UINT8 *palette_data = machine.root_device().memregion("palette")->base();
414	414
415	415	/* Loop through the emphasis modes (8 total) */
416	416	for (color_emphasis = 0; color_emphasis < 8; color_emphasis++)

src/mame/video/buggychl.c

r14976	r14977
166	166
167	167	g_profiler.start(PROFILER_USER1);
168	168
169		gfx = machine.region("gfx2")->base();
	169	gfx = state->memregion("gfx2")->base();
170	170	for (offs = 0; offs < state->m_spriteram.bytes(); offs += 4)
171	171	{
172	172	int sx, sy, flipy, zoom, ch, x, px, y;

src/mame/video/pandoras.c

r14976	r14977
23	23
24	24	PALETTE_INIT( pandoras )
25	25	{
26		const UINT8 *color_prom = machine.region("proms")->base();
	26	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
27	27	static const int resistances_rg[3] = { 1000, 470, 220 };
28	28	static const int resistances_b [2] = { 470, 220 };
29	29	double rweights[3], gweights[3], bweights[2];

src/mame/video/gberet.c

r14976	r14977
23	23
24	24	PALETTE_INIT( gberet )
25	25	{
26		const UINT8 *color_prom = machine.region("proms")->base();
	26	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
27	27	int i;
28	28
29	29	/* allocate the colortable */

src/mame/video/stfight.c

r14976	r14977
32	32
33	33	PALETTE_INIT( stfight )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	int i;
37	37
38	38	/* allocate the colortable */
r14976	r14977
97	97
98	98	static TILE_GET_INFO( get_fg_tile_info )
99	99	{
100		UINT8   *fgMap = machine.region("gfx5")->base();
	100	UINT8   *fgMap = machine.root_device().memregion("gfx5")->base();
101	101	int attr,tile_base;
102	102
103	103	attr = fgMap[0x8000+tile_index];
r14976	r14977
120	120
121	121	static TILE_GET_INFO( get_bg_tile_info )
122	122	{
123		UINT8   *bgMap = machine.region("gfx6")->base();
	123	UINT8   *bgMap = machine.root_device().memregion("gfx6")->base();
124	124	int attr,tile_bank,tile_base;
125	125
126	126	attr = bgMap[0x8000+tile_index];

src/mame/video/n64.h

r14976	r14977
418	418	m_tmem = auto_alloc_array(machine(), UINT8, 0x1000);
419	419	memset(m_tmem, 0, 0x1000);
420	420
421		UINT8 *normpoint = machine().region("normpoint")->base();
422		UINT8 *normslope = machine().region("normslope")->base();
	421	UINT8 *normpoint = machine().root_device().memregion("normpoint")->base();
	422	UINT8 *normslope = machine().root_device().memregion("normslope")->base();
423	423
424	424	for(INT32 i = 0; i < 64; i++)
425	425	{

src/mame/video/tubep.c

r14976	r14977
133	133
134	134	PALETTE_INIT( tubep )
135	135	{
136		const UINT8 *color_prom = machine.region("proms")->base();
	136	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
137	137	tubep_state *state = machine.driver_data<tubep_state>();
138	138	int i,r,g,b;
139	139
r14976	r14977
437	437	tubep_state *state = machine.driver_data<tubep_state>();
438	438	UINT32   XDOT;
439	439	UINT32   YDOT;
440		UINT8 * romCxx  = machine.region("user2")->base()+0x00000;
	440	UINT8 * romCxx  = state->memregion("user2")->base()+0x00000;
441	441	UINT8 * romD10  = romCxx+0x10000;
442	442	UINT8 * romEF13 = romCxx+0x12000;
443	443	UINT8 * romHI2  = romCxx+0x14000;
r14976	r14977
588	588	pen_t pen_base = 32; //change it later
589	589
590	590	UINT32 v;
591		UINT8 *text_gfx_base = screen.machine().region("gfx1")->base();
592		UINT8 *romBxx = screen.machine().region("user1")->base() + 0x2000*state->m_background_romsel;
	591	UINT8 *text_gfx_base = screen.machine().root_device().memregion("gfx1")->base();
	592	UINT8 *romBxx = state->memregion("user1")->base() + 0x2000*state->m_background_romsel;
593	593
594	594	/* logerror(" update: from DISP=%i y_min=%3i y_max=%3i\n", DISP_, cliprect.min_y, cliprect.max_y+1); */
595	595
r14976	r14977
686	686
687	687	PALETTE_INIT( rjammer )
688	688	{
689		const UINT8 *color_prom = machine.region("proms")->base();
	689	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
690	690	int i;
691	691
692	692	static const int resistors_rg[3] = { 1000, 470, 220 };
r14976	r14977
743	743	int DISP_ = state->m_DISP^1;
744	744
745	745	UINT32 v;
746		UINT8 *text_gfx_base = screen.machine().region("gfx1")->base();
747		UINT8 *rom13D  = screen.machine().region("user1")->base();
	746	UINT8 *text_gfx_base = screen.machine().root_device().memregion("gfx1")->base();
	747	UINT8 *rom13D  = state->memregion("user1")->base();
748	748	UINT8 *rom11BD = rom13D+0x1000;
749	749	UINT8 *rom19C  = rom13D+0x5000;
750	750

src/mame/video/homedata.c

r14976	r14977
41	41	int dest_addr;
42	42	int base_addr;
43	43	int opcode, data, num_tiles;
44		UINT8 *pBlitData = space->machine().region("user1")->base() + rom_base;
	44	UINT8 *pBlitData = state->memregion("user1")->base() + rom_base;
45	45
46	46	dest_param = state->m_blitter_param[(state->m_blitter_param_count - 4) & 3] * 256 +
47	47	state->m_blitter_param[(state->m_blitter_param_count - 3) & 3];
r14976	r14977
127	127	int flipx;
128	128	int source_addr, base_addr;
129	129	int dest_addr;
130		UINT8 *pBlitData = space->machine().region("user1")->base() + rom_base;
	130	UINT8 *pBlitData = state->memregion("user1")->base() + rom_base;
131	131
132	132	int opcode, data, num_tiles;
133	133
r14976	r14977
225	225	int source_addr;
226	226	int dest_addr, base_addr;
227	227	int opcode, data, num_tiles;
228		UINT8 *pBlitData = space->machine().region("user1")->base() + rom_base;
	228	UINT8 *pBlitData = state->memregion("user1")->base() + rom_base;
229	229
230	230	dest_param = state->m_blitter_param[(state->m_blitter_param_count - 4) & 3] * 256 +
231	231	state->m_blitter_param[(state->m_blitter_param_count - 3) & 3];
r14976	r14977
315	315
316	316	PALETTE_INIT( mrokumei )
317	317	{
318		const UINT8 *color_prom = machine.region("proms")->base();
	318	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
319	319	int i;
320	320
321	321	/* initialize 555 RGB palette */
r14976	r14977
338	338
339	339	PALETTE_INIT( reikaids )
340	340	{
341		const UINT8 *color_prom = machine.region("proms")->base();
	341	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
342	342	int i;
343	343
344	344	/* initialize 555 RGB palette */
r14976	r14977
361	361
362	362	PALETTE_INIT( pteacher )
363	363	{
364		const UINT8 *color_prom = machine.region("proms")->base();
	364	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
365	365	int i;
366	366
367	367	/* initialize 555 RGB palette */
r14976	r14977
384	384
385	385	PALETTE_INIT( mirderby )
386	386	{
387		const UINT8 *color_prom = machine.region("proms")->base();
	387	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
388	388	int i;
389	389
390	390	for (i = 0; i < 0x100; i++)
r14976	r14977
819	819
820	820	WRITE8_MEMBER(homedata_state::pteacher_blitter_start_w)
821	821	{
822		pteacher_handleblit(&space, (m_blitter_bank >> 5) * 0x10000 & (machine().region("user1")->bytes() - 1));
	822	pteacher_handleblit(&space, (m_blitter_bank >> 5) * 0x10000 & (machine().root_device().memregion("user1")->bytes() - 1));
823	823	}
824	824
825	825

src/mame/video/pcktgal.c

r14976	r14977
4	4
5	5	PALETTE_INIT( pcktgal )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	for (i = 0;i < machine.total_colors();i++)

src/mame/video/hyhoo.c

r14976	r14977
41	41
42	42	WRITE8_MEMBER(hyhoo_state::hyhoo_romsel_w)
43	43	{
44		int gfxlen = machine().region("gfx1")->bytes();
	44	int gfxlen = memregion("gfx1")->bytes();
45	45	m_gfxrom = (((data & 0xc0) >> 4) + (data & 0x03));
46	46	m_highcolorflag = data;
47	47	nb1413m3_gfxrombank_w(&space, 0, data);
r14976	r14977
64	64	static void hyhoo_gfxdraw(running_machine &machine)
65	65	{
66	66	hyhoo_state *state = machine.driver_data<hyhoo_state>();
67		UINT8 *GFX = machine.region("gfx1")->base();
	67	UINT8 *GFX = state->memregion("gfx1")->base();
68	68
69	69	int x, y;
70	70	int dx1, dx2, dy;
r14976	r14977
106	106	skipy = -1;
107	107	}
108	108
109		gfxlen = machine.region("gfx1")->bytes();
	109	gfxlen = machine.root_device().memregion("gfx1")->bytes();
110	110	gfxaddr = (state->m_gfxrom << 17) + (state->m_blitter_src_addr << 1);
111	111
112	112	for (y = starty, ctry = sizey; ctry >= 0; y += skipy, ctry--)

src/mame/video/hng64.c

r14976	r14977
2056	2056	//////////////////////////////////////////////*/
2057	2057
2058	2058	// 3d ROM Offset
2059		UINT16* threeDRoms = (UINT16*)(machine.region("verts")->base());
	2059	UINT16* threeDRoms = (UINT16*)(machine.root_device().memregion("verts")->base());
2060	2060	UINT32  threeDOffset = (((UINT32)packet[2]) << 16) | ((UINT32)packet[3]);
2061	2061	UINT16* threeDPointer = &threeDRoms[threeDOffset * 3];
2062	2062
2063		if (threeDOffset >= machine.region("verts")->bytes())
	2063	if (threeDOffset >= machine.root_device().memregion("verts")->bytes())
2064	2064	{
2065	2065	printf("Strange geometry packet: (ignoring)\n");
2066	2066	printPacket(packet, 1);
r14976	r14977
3015	3015
3016	3016	UINT8 paletteEntry = 0;
3017	3017	float t_coord, s_coord;
3018		const UINT8 *gfx = machine.region("textures")->base();
	3018	const UINT8 *gfx = state->memregion("textures")->base();
3019	3019	const UINT8 *textureOffset = &gfx[prOptions.texIndex * 1024 * 1024];
3020	3020
3021	3021	for (; x_start <= x_end; x_start++)

src/mame/video/gyruss.c

r14976	r14977
31	31
32	32	PALETTE_INIT( gyruss )
33	33	{
34		const UINT8 *color_prom = machine.region("proms")->base();
	34	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
35	35	static const int resistances_rg[3] = { 1000, 470, 220 };
36	36	static const int resistances_b [2] = { 470, 220 };
37	37	double weights_rg[3], weights_b[2];

src/mame/video/groundfx.c

r14976	r14977
64	64	{
65	65	groundfx_state *state = machine.driver_data<groundfx_state>();
66	66	UINT32 *spriteram32 = state->m_spriteram;
67		UINT16 *spritemap = (UINT16 *)machine.region("user1")->base();
	67	UINT16 *spritemap = (UINT16 *)state->memregion("user1")->base();
68	68	int offs, data, tilenum, color, flipx, flipy;
69	69	int x, y, priority, dblsize, curx, cury;
70	70	int sprites_flipscreen = 0;

src/mame/video/fastlane.c

r14976	r14977
5	5
6	6	PALETTE_INIT( fastlane )
7	7	{
8		const UINT8 *color_prom = machine.region("proms")->base();
	8	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
9	9	int pal;
10	10
11	11	/* allocate the colortable */

src/mame/video/kangaroo.c

r14976	r14977
85	85	break;
86	86
87	87	case 8:   /* bank select */
88		memory_set_bank(machine(), "bank1", (data & 0x05) ? 0 : 1);
	88	membank("bank1")->set_entry((data & 0x05) ? 0 : 1);
89	89	break;
90	90	}
91	91	}
r14976	r14977
101	101	static void blitter_execute( running_machine &machine )
102	102	{
103	103	kangaroo_state *state = machine.driver_data<kangaroo_state>();
104		UINT32 gfxhalfsize = machine.region("gfx1")->bytes() / 2;
105		const UINT8 *gfxbase = machine.region("gfx1")->base();
	104	UINT32 gfxhalfsize = machine.root_device().memregion("gfx1")->bytes() / 2;
	105	const UINT8 *gfxbase = state->memregion("gfx1")->base();
106	106	UINT16 src = state->m_video_control[0] + 256 * state->m_video_control[1];
107	107	UINT16 dst = state->m_video_control[2] + 256 * state->m_video_control[3];
108	108	UINT8 height = state->m_video_control[5];

src/mame/video/suprloco.c

r14976	r14977
30	30	***************************************************************************/
31	31	PALETTE_INIT( suprloco )
32	32	{
33		const UINT8 *color_prom = machine.region("proms")->base();
	33	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
34	34	int i;
35	35
36	36
r14976	r14977
203	203	dy = -1;
204	204	}
205	205
206		gfx2 = machine.region("gfx2")->base();
	206	gfx2 = machine.root_device().memregion("gfx2")->base();
207	207	for (row = 0;row < height;row++,adjy+=dy)
208	208	{
209	209	int color1,color2,flipx;

src/mame/video/m58.c

r14976	r14977
21	21
22	22	PALETTE_INIT( yard )
23	23	{
24		const UINT8 *color_prom = machine.region("proms")->base();
	24	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
25	25	const UINT8 *char_lopal = color_prom + 0x000;
26	26	const UINT8 *char_hipal = color_prom + 0x100;
27	27	const UINT8 *sprite_pal = color_prom + 0x200;

src/mame/video/fcombat.c

r14976	r14977
14	14
15	15	//palno = (tile_index - (tile_index / 32 * 16) * 32 * 16) / 32;
16	16
17		tileno = machine.region("user1")->base()[tile_index];
18		palno = 0x18; //machine.region("user2")->base()[tile_index] >> 3;
	17	tileno = machine.root_device().memregion("user1")->base()[tile_index];
	18	palno = 0x18; //machine.root_device().memregion("user2")->base()[tile_index] >> 3;
19	19	SET_TILE_INFO(2, tileno, palno, 0);
20	20	}
21	21
r14976	r14977
39	39
40	40	PALETTE_INIT( fcombat )
41	41	{
42		const UINT8 *color_prom = machine.region("proms")->base();
	42	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
43	43	int i;
44	44
45	45	/* allocate the colortable */

src/mame/video/marineb.c

r14976	r14977
12	12
13	13	PALETTE_INIT( marineb )
14	14	{
15		const UINT8 *color_prom = machine.region("proms")->base();
	15	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
16	16	int i;
17	17
18	18	for (i = 0; i < machine.total_colors(); i++)

src/mame/video/timeplt.c

r14976	r14977
39	39
40	40	PALETTE_INIT( timeplt )
41	41	{
42		const UINT8 *color_prom = machine.region("proms")->base();
	42	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
43	43	rgb_t palette[32];
44	44	int i;
45	45

src/mame/video/fuukifg2.c

r14976	r14977
82	82	#if 0
83	83	PALETTE_INIT( fuuki16 )
84	84	{
85		const UINT8 *color_prom = machine.region("proms")->base();
	85	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
86	86	int pen;
87	87
88	88	/* The game does not initialise the palette at startup. It should

src/mame/video/vulgus.c

r14976	r14977
18	18
19	19	PALETTE_INIT( vulgus )
20	20	{
21		const UINT8 *color_prom = machine.region("proms")->base();
	21	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
22	22	int i;
23	23
24	24	machine.colortable = colortable_alloc(machine, 256);

src/mame/video/homerun.c

r14976	r14977
15	15	state->m_tilemap->mark_all_dirty();
16	16
17	17	data >>= 5;
18		memory_set_bank(device->machine(), "bank1", data & 0x07);
	18	state->membank("bank1")->set_entry(data & 0x07);
19	19	}
20	20
21	21	WRITE8_MEMBER(homerun_state::homerun_videoram_w)

src/mame/video/champbas.c

r14976	r14977
22	22
23	23	PALETTE_INIT( champbas )
24	24	{
25		const UINT8 *color_prom = machine.region("proms")->base();
	25	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
26	26	static const int resistances_rg[3] = { 1000, 470, 220 };
27	27	static const int resistances_b [2] = { 470, 220 };
28	28	double rweights[3], gweights[3], bweights[2];
r14976	r14977
75	75
76	76	PALETTE_INIT( exctsccr )
77	77	{
78		const UINT8 *color_prom = machine.region("proms")->base();
	78	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
79	79	int i;
80	80
81	81	/* allocate the colortable */

src/mame/video/baraduke.c

r14976	r14977
17	17
18	18	PALETTE_INIT( baraduke )
19	19	{
20		const UINT8 *color_prom = machine.region("proms")->base();
	20	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
21	21	int i;
22	22	int bit0,bit1,bit2,bit3,r,g,b;
23	23

src/mame/video/ssozumo.c

r14976	r14977
14	14
15	15	PALETTE_INIT( ssozumo )
16	16	{
17		const UINT8 *color_prom = machine.region("proms")->base();
	17	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
18	18	int   bit0, bit1, bit2, bit3, r, g, b;
19	19	int   i;
20	20

src/mame/video/m107.c

r14976	r14977
153	153	m107_state *state = machine.driver_data<m107_state>();
154	154	UINT16 *spriteram = state->m_buffered_spriteram;
155	155	int offs;
156		UINT8 *rom = machine.region("user1")->base();
	156	UINT8 *rom = state->memregion("user1")->base();
157	157
158	158	for (offs = 0;offs < 0x800;offs += 4)
159	159	{

src/mame/video/matmania.c

r14976	r14977
43	43	***************************************************************************/
44	44	PALETTE_INIT( matmania )
45	45	{
46		const UINT8 *color_prom = machine.region("proms")->base();
	46	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
47	47	int i;
48	48
49	49	for (i = 0; i < 64; i++)

src/mame/video/arkanoid.c

r14976	r14977
137	137	/* bit 2 - 3 unknown */
138	138
139	139	/* bit 4 could be the ROM bank selector for 8000-bfff (not sure) */
140		memory_set_bank(machine(), "bank1", ((data & 0x10) >> 4));
	140	membank("bank1")->set_entry(((data & 0x10) >> 4));
141	141
142	142	/* bit 5 = gfx bank */
143	143	if (m_gfxbank != ((data & 0x20) >> 5))

src/mame/video/megasys1.c

r14976	r14977
753	753
754	754	PALETTE_INIT( megasys1 )
755	755	{
756		const UINT8 *color_prom = machine.region("proms")->base();
	756	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
757	757	megasys1_state *state = machine.driver_data<megasys1_state>();
758	758	int pri_code, offset, i, order;
759	759

src/mame/video/archimds.c

r14976	r14977
43	43	int count;
44	44	int x,y,xi;
45	45	UINT8 pen;
46		static UINT8 *vram = screen.machine().region("vram")->base();
	46	static UINT8 *vram = screen.machine().root_device().memregion("vram")->base();
47	47
48	48	count = (0);
49	49

src/mame/video/pacman.c

r14976	r14977
63	63
64	64	PALETTE_INIT( pacman )
65	65	{
66		const UINT8 *color_prom = machine.region("proms")->base();
	66	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
67	67	static const int resistances[3] = { 1000, 470, 220 };
68	68	double rweights[3], gweights[3], bweights[2];
69	69	int i;

src/mame/video/clshroad.c

r14976	r14977
42	42
43	43	PALETTE_INIT( clshroad )
44	44	{
45		const UINT8 *color_prom = machine.region("proms")->base();
	45	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
46	46	int i;
47	47	for (i = 0;i < 256;i++)
48	48	palette_set_color_rgb(machine,i,   pal4bit(color_prom[i + 256 * 0]),
r14976	r14977
52	52
53	53	PALETTE_INIT( firebatl )
54	54	{
55		const UINT8 *color_prom = machine.region("proms")->base();
	55	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
56	56	int i;
57	57
58	58	/* allocate the colortable */

src/mame/video/dcheese.c

r14976	r14977
27	27
28	28	PALETTE_INIT( dcheese )
29	29	{
30		const UINT16 *src = (UINT16 *)machine.region("user1")->base();
	30	const UINT16 *src = (UINT16 *)machine.root_device().memregion("user1")->base();
31	31	int i;
32	32
33	33	/* really 65536 colors, but they don't use the later ones so we can stay */
r14976	r14977
168	168	INT32 dxdy = (INT32)(((state->m_blitter_xparam[6] & 0x0fff) | ((state->m_blitter_xparam[7] & 0x0fff) << 12)) << 12) >> 12;
169	169	INT32 dydx = (INT32)(((state->m_blitter_yparam[4] & 0x0fff) | ((state->m_blitter_yparam[5] & 0x0fff) << 12)) << 12) >> 12;
170	170	INT32 dydy = (INT32)(((state->m_blitter_yparam[6] & 0x0fff) | ((state->m_blitter_yparam[7] & 0x0fff) << 12)) << 12) >> 12;
171		UINT8 *src = machine.region("gfx1")->base();
172		UINT32 pagemask = (machine.region("gfx1")->bytes() - 1) / 0x40000;
	171	UINT8 *src = machine.root_device().memregion("gfx1")->base();
	172	UINT32 pagemask = (state->memregion("gfx1")->bytes() - 1) / 0x40000;
173	173	int xstart = state->m_blitter_xparam[14];
174	174	int xend = state->m_blitter_xparam[15] + 1;
175	175	int ystart = state->m_blitter_yparam[14];

src/mame/video/bwing.c

r14976	r14977
125	125	}
126	126
127	127	#if BW_DEBUG
128		(machine().region(REGION_CPU1)->base())[0x1b10 + offset] = data;
	128	(machine().root_device().memregion(REGION_CPU1)->base())[0x1b10 + offset] = data;
129	129	#endif
130	130	}
131	131
r14976	r14977
214	214
215	215	fill_srxlat(state->m_srxlat);
216	216
217		state->m_fgdata = machine.region("gpu")->base();
	217	state->m_fgdata = state->memregion("gpu")->base();
218	218	state->m_bgdata = state->m_fgdata + 0x1000;
219	219
220	220	for (i = 0; i < 4; i++)

src/mame/video/sf.c

r14976	r14977
9	9
10	10	static TILE_GET_INFO( get_bg_tile_info )
11	11	{
12		UINT8 *base = machine.region("gfx5")->base() + 2 * tile_index;
	12	UINT8 *base = machine.root_device().memregion("gfx5")->base() + 2 * tile_index;
13	13	int attr = base[0x10000];
14	14	int color = base[0];
15	15	int code = (base[0x10000 + 1] << 8) | base[1];
r14976	r14977
22	22
23	23	static TILE_GET_INFO( get_fg_tile_info )
24	24	{
25		UINT8 *base = machine.region("gfx5")->base() + 0x20000 + 2 * tile_index;
	25	UINT8 *base = machine.root_device().memregion("gfx5")->base() + 0x20000 + 2 * tile_index;
26	26	int attr = base[0x10000];
27	27	int color = base[0];
28	28	int code = (base[0x10000 + 1] << 8) | base[1];

src/mame/video/cave.c

r14976	r14977
515	515	{
516	516	cave_state *state = machine.driver_data<cave_state>();
517	517	pen_t base_pal = 0;
518		const UINT8 *base_gfx = machine.region("sprites")->base();
519		int code_max = machine.region("sprites")->bytes() / (16*16);
	518	const UINT8 *base_gfx = machine.root_device().memregion("sprites")->base();
	519	int code_max = state->memregion("sprites")->bytes() / (16*16);
520	520
521	521	UINT16 *source;
522	522	UINT16 *finish;
r14976	r14977
644	644	{
645	645	cave_state *state = machine.driver_data<cave_state>();
646	646	pen_t base_pal = 0;
647		const UINT8 *base_gfx = machine.region("sprites")->base();
648		int code_max = machine.region("sprites")->bytes() / (16*16);
	647	const UINT8 *base_gfx = machine.root_device().memregion("sprites")->base();
	648	int code_max = state->memregion("sprites")->bytes() / (16*16);
649	649
650	650	UINT16 *source;
651	651	UINT16 *finish;

src/mame/video/dooyong.c

r14976	r14977
139	139	WRITE8_MEMBER(dooyong_state::primella_ctrl_w)
140	140	{
141	141	/* bits 0-2 select ROM bank */
142		memory_set_bank(machine(), "bank1", data & 0x07);
	142	membank("bank1")->set_entry(data & 0x07);
143	143
144	144	/* bit 3 disables tx layer */
145	145	m_tx_pri = data & 0x08;
r14976	r14977
629	629	{
630	630	dooyong_state *state = machine.driver_data<dooyong_state>();
631	631	/* Configure tilemap callbacks */
632		state->m_bg_tilerom = machine.region("gfx5")->base();
633		state->m_fg_tilerom = machine.region("gfx6")->base();
	632	state->m_bg_tilerom = machine.root_device().memregion("gfx5")->base();
	633	state->m_fg_tilerom = state->memregion("gfx6")->base();
634	634	state->m_bg_tilerom2 = NULL;
635	635	state->m_fg_tilerom2 = NULL;
636	636	state->m_bg_gfx = 2;
r14976	r14977
669	669	{
670	670	dooyong_state *state = machine.driver_data<dooyong_state>();
671	671	/* Configure tilemap callbacks */
672		state->m_bg_tilerom = machine.region("gfx5")->base();
673		state->m_fg_tilerom = machine.region("gfx6")->base();
	672	state->m_bg_tilerom = machine.root_device().memregion("gfx5")->base();
	673	state->m_fg_tilerom = state->memregion("gfx6")->base();
674	674	state->m_bg_tilerom2 = NULL;
675	675	state->m_fg_tilerom2 = NULL;
676	676	state->m_bg_gfx = 2;
r14976	r14977
708	708	{
709	709	dooyong_state *state = machine.driver_data<dooyong_state>();
710	710	/* Configure tilemap callbacks */
711		state->m_bg_tilerom = machine.region("gfx5")->base();
712		state->m_fg_tilerom = machine.region("gfx6")->base();
	711	state->m_bg_tilerom = machine.root_device().memregion("gfx5")->base();
	712	state->m_fg_tilerom = state->memregion("gfx6")->base();
713	713	state->m_bg_tilerom2 = NULL;
714	714	state->m_fg_tilerom2 = NULL;
715	715	state->m_bg_gfx = 2;
r14976	r14977
744	744	{
745	745	dooyong_state *state = machine.driver_data<dooyong_state>();
746	746	/* Configure tilemap callbacks */
747		state->m_bg_tilerom = machine.region("gfx3")->base() + 0x78000;
748		state->m_fg_tilerom = machine.region("gfx4")->base() + 0x78000;
749		state->m_fg2_tilerom = machine.region("gfx5")->base() + 0x38000;
	747	state->m_bg_tilerom = machine.root_device().memregion("gfx3")->base() + 0x78000;
	748	state->m_fg_tilerom = machine.root_device().memregion("gfx4")->base() + 0x78000;
	749	state->m_fg2_tilerom = state->memregion("gfx5")->base() + 0x38000;
750	750	state->m_bg_tilerom2 = NULL;
751	751	state->m_fg_tilerom2 = NULL;
752	752	state->m_fg2_tilerom2 = NULL;
r14976	r14977
785	785	{
786	786	dooyong_state *state = machine.driver_data<dooyong_state>();
787	787	/* Configure tilemap callbacks */
788		state->m_bg_tilerom = machine.region("gfx3")->base() + 0x78000;
789		state->m_fg_tilerom = machine.region("gfx4")->base() + 0x78000;
	788	state->m_bg_tilerom = machine.root_device().memregion("gfx3")->base() + 0x78000;
	789	state->m_fg_tilerom = state->memregion("gfx4")->base() + 0x78000;
790	790	state->m_bg_tilerom2 = NULL;
791	791	state->m_fg_tilerom2 = NULL;
792	792	state->m_bg_gfx = 2;
r14976	r14977
821	821	{
822	822	dooyong_state *state = machine.driver_data<dooyong_state>();
823	823	/* Configure tilemap callbacks */
824		state->m_bg_tilerom = machine.region("gfx2")->base() + machine.region("gfx2")->bytes() - 0x8000;
825		state->m_fg_tilerom = machine.region("gfx3")->base() + machine.region("gfx3")->bytes() - 0x8000;
	824	state->m_bg_tilerom = machine.root_device().memregion("gfx2")->base() + machine.root_device().memregion("gfx2")->bytes() - 0x8000;
	825	state->m_fg_tilerom = machine.root_device().memregion("gfx3")->base() + state->memregion("gfx3")->bytes() - 0x8000;
826	826	state->m_bg_tilerom2 = NULL;
827	827	state->m_fg_tilerom2 = NULL;
828	828	state->m_bg_gfx = 1;
r14976	r14977
856	856	{
857	857	dooyong_state *state = machine.driver_data<dooyong_state>();
858	858	/* Configure tilemap callbacks */
859		state->m_bg_tilerom = machine.region("gfx5")->base();
860		state->m_bg2_tilerom = machine.region("gfx4")->base();
861		state->m_fg_tilerom = machine.region("gfx3")->base();
862		state->m_fg2_tilerom = machine.region("gfx2")->base();
863		state->m_bg_tilerom2 = machine.region("gfx6")->base() + 0x60000;
864		state->m_bg2_tilerom2 = machine.region("gfx6")->base() + 0x40000;
865		state->m_fg_tilerom2 = machine.region("gfx6")->base() + 0x20000;
866		state->m_fg2_tilerom2 = machine.region("gfx6")->base() + 0x00000;
	859	state->m_bg_tilerom = machine.root_device().memregion("gfx5")->base();
	860	state->m_bg2_tilerom = machine.root_device().memregion("gfx4")->base();
	861	state->m_fg_tilerom = machine.root_device().memregion("gfx3")->base();
	862	state->m_fg2_tilerom = machine.root_device().memregion("gfx2")->base();
	863	state->m_bg_tilerom2 = machine.root_device().memregion("gfx6")->base() + 0x60000;
	864	state->m_bg2_tilerom2 = machine.root_device().memregion("gfx6")->base() + 0x40000;
	865	state->m_fg_tilerom2 = machine.root_device().memregion("gfx6")->base() + 0x20000;
	866	state->m_fg2_tilerom2 = state->memregion("gfx6")->base() + 0x00000;
867	867	state->m_bg_gfx = 4;
868	868	state->m_bg2_gfx = 3;
869	869	state->m_fg_gfx = 2;
r14976	r14977
901	901	{
902	902	dooyong_state *state = machine.driver_data<dooyong_state>();
903	903	/* Configure tilemap callbacks */
904		state->m_bg_tilerom = machine.region("gfx2")->base();
	904	state->m_bg_tilerom = state->memregion("gfx2")->base();
905	905	state->m_bg_gfx = 1;
906	906
907	907	/* Create tilemaps */

src/mame/video/brkthru.c

r14976	r14977
34	34
35	35	PALETTE_INIT( brkthru )
36	36	{
37		const UINT8 *color_prom = machine.region("proms")->base();
	37	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
38	38	int i;
39	39
40	40	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
129	129	else if (offset == 1)
130	130	{
131	131	/* bit 0-2 = ROM bank select */
132		memory_set_bank(machine(), "bank1", data & 0x07);
	132	membank("bank1")->set_entry(data & 0x07);
133	133
134	134	/* bit 3-5 = background tiles color code */
135	135	if (((data & 0x38) >> 2) != m_bgbasecolor)

src/mame/video/williams.c

r14976	r14977
142	142	VIDEO_START( blaster )
143	143	{
144	144	williams_state *state = machine.driver_data<williams_state>();
145		blitter_init(machine, state->m_blitter_config, machine.region("proms")->base());
	145	blitter_init(machine, state->m_blitter_config, state->memregion("proms")->base());
146	146	create_palette_lookup(machine);
147	147	state_save_register(machine);
148	148	}

src/mame/video/dec8.c

r14976	r14977
77	77
78	78	PALETTE_INIT( ghostb )
79	79	{
80		const UINT8 *color_prom = machine.region("proms")->base();
	80	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
81	81	int i;
82	82
83	83	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
140	140	switch (offset)
141	141	{
142	142	case 0: /* Top 3 bits - bank switch, bottom 4 - scroll MSB */
143		memory_set_bank(machine(), "bank1", (data >> 5));
	143	membank("bank1")->set_entry((data >> 5));
144	144	m_scroll2[0] = data & 0xf;
145	145	return;
146	146
r14976	r14977
160	160	Bit 0x40 - Y scroll MSB
161	161	Bit 0x80 - Hold subcpu reset line high if clear, else low
162	162	*/
163		memory_set_bank(machine(), "bank1", data & 0x0f);
	163	membank("bank1")->set_entry(data & 0x0f);
164	164
165	165	m_scroll2[0] = (data >> 5) & 1;
166	166	m_scroll2[2] = (data >> 6) & 1;
r14976	r14977
175	175	{
176	176
177	177	/* Bottom 4 bits - bank switch, Bits 4 & 5 - Scroll MSBs */
178		memory_set_bank(machine(), "bank1", data & 0x0f);
	178	membank("bank1")->set_entry(data & 0x0f);
179	179
180	180	m_scroll2[0] = (data >> 5) & 1;
181	181	m_scroll2[2] = (data >> 6) & 1;

src/mame/video/thepit.c

r14976	r14977
28	28
29	29	PALETTE_INIT( thepit )
30	30	{
31		const UINT8 *color_prom = machine.region("proms")->base();
	31	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
32	32	int i;
33	33
34	34	for (i = 0; i < 32; i++)
r14976	r14977
69	69
70	70	PALETTE_INIT( suprmous )
71	71	{
72		const UINT8 *color_prom = machine.region("proms")->base();
	72	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
73	73	int i;
74	74
75	75	for (i = 0; i < 32; i++)

src/mame/video/cloud9.c

r14976	r14977
22	22
23	23	/* allocate second bank of videoram */
24	24	state->m_videoram = auto_alloc_array(machine, UINT8, 0x8000);
25		memory_set_bankptr(machine, "bank1", state->m_videoram);
	25	state->membank("bank1")->set_base(state->m_videoram);
26	26
27	27	/* get pointers to our PROMs */
28		state->m_syncprom = machine.region("proms")->base() + 0x000;
29		state->m_wpprom = machine.region("proms")->base() + 0x200;
30		state->m_priprom = machine.region("proms")->base() + 0x300;
	28	state->m_syncprom = machine.root_device().memregion("proms")->base() + 0x000;
	29	state->m_wpprom = machine.root_device().memregion("proms")->base() + 0x200;
	30	state->m_priprom = machine.root_device().memregion("proms")->base() + 0x300;
31	31
32	32	/* compute the color output resistor weights at startup */
33	33	compute_resistor_weights(0,   255, -1.0,

src/mame/video/changela.c

r14976	r14977
47	47	changela_state *state = machine.driver_data<changela_state>();
48	48	int sx, i;
49	49
50		UINT8* ROM = machine.region("user1")->base();
	50	UINT8* ROM = state->memregion("user1")->base();
51	51	UINT8* RAM = state->m_spriteram;
52	52
53	53	for (sx = 0; sx < 256; sx++)
r14976	r14977
110	110	changela_state *state = machine.driver_data<changela_state>();
111	111	int sx, sy;
112	112
113		UINT8* ROM = machine.region("gfx2")->base();
	113	UINT8* ROM = state->memregion("gfx2")->base();
114	114	UINT8* RAM = state->m_videoram;
115	115
116	116	UINT8 reg[4] = { 0 }; /* 4x4-bit registers (U58, U59) */
r14976	r14977
175	175	changela_state *state = machine.driver_data<changela_state>();
176	176	int sx, i, j;
177	177
178		UINT8* ROM = machine.region("user2")->base();
	178	UINT8* ROM = machine.root_device().memregion("user2")->base();
179	179	UINT8* RAM = state->m_memory_devices + 0x800;
180		UINT8* TILE_ROM = machine.region("gfx1")->base();
	180	UINT8* TILE_ROM = machine.root_device().memregion("gfx1")->base();
181	181	UINT8* TILE_RAM = state->m_memory_devices + 0x1000;
182		UINT8* PROM = machine.region("proms")->base();
	182	UINT8* PROM = state->memregion("proms")->base();
183	183
184	184	int preload = ((sy < 32) ? 1 : 0);
185	185
r14976	r14977
355	355	int sx, i, j;
356	356
357	357	/* State machine */
358		UINT8* ROM = machine.region("user2")->base();
	358	UINT8* ROM = machine.root_device().memregion("user2")->base();
359	359	UINT8* RAM = state->m_memory_devices + 0x840 + 0x40 * tree_num;
360		UINT8* PROM = machine.region("proms")->base();
	360	UINT8* PROM = machine.root_device().memregion("proms")->base();
361	361
362	362	/* Tree Data */
363	363	UINT8* RAM2 = state->m_tree_ram + 0x20 * tree_num;
364		UINT8* TILE_ROM = (tree_num ? (machine.region("user3")->base() + 0x1000) : (machine.region("gfx1")->base() + 0x2000));
365		UINT8* TILE_RAM = (tree_num ? (machine.region("user3")->base()) : (state->m_memory_devices + 0x1800));
	364	UINT8* TILE_ROM = (tree_num ? (machine.root_device().memregion("user3")->base() + 0x1000) : (machine.root_device().memregion("gfx1")->base() + 0x2000));
	365	UINT8* TILE_RAM = (tree_num ? (state->memregion("user3")->base()) : (state->m_memory_devices + 0x1800));
366	366
367	367	int preload = ((sy < 32) ? 1 : 0);
368	368

src/mame/video/pooyan.c

r14976	r14977
29	29
30	30	PALETTE_INIT( pooyan )
31	31	{
32		const UINT8 *color_prom = machine.region("proms")->base();
	32	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
33	33	static const int resistances_rg[3] = { 1000, 470, 220 };
34	34	static const int resistances_b [2] = { 470, 220 };
35	35	double rweights[3], gweights[3], bweights[2];

src/mame/video/sidepckt.c

r14976	r14977
4	4
5	5	PALETTE_INIT( sidepckt )
6	6	{
7		const UINT8 *color_prom = machine.region("proms")->base();
	7	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
8	8	int i;
9	9
10	10	for (i = 0;i < machine.total_colors();i++)

src/mame/video/tankbatt.c

r14976	r14977
17	17	***************************************************************************/
18	18	PALETTE_INIT( tankbatt )
19	19	{
20		const UINT8 *color_prom = machine.region("proms")->base();
	20	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
21	21	int i;
22	22
23	23	#define RES_1   0xc0 /* this is a guess */

src/mame/video/exerion.c

r14976	r14977
36	36
37	37	PALETTE_INIT( exerion )
38	38	{
39		const UINT8 *color_prom = machine.region("proms")->base();
	39	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
40	40	static const int resistances_rg[3] = { 1000, 470, 220 };
41	41	static const int resistances_b [2] = { 470, 220 };
42	42	double rweights[3], gweights[3], bweights[2];
r14976	r14977
111	111	UINT8 *gfx;
112	112
113	113	/* get pointers to the mixing and lookup PROMs */
114		state->m_background_mixer = machine.region("proms")->base() + 0x320;
	114	state->m_background_mixer = machine.root_device().memregion("proms")->base() + 0x320;
115	115
116	116	/* allocate memory for the decoded background graphics */
117	117	state->m_background_gfx[0] = auto_alloc_array(machine, UINT16, 256 * 256 * 4);
r14976	r14977
136	136	* Where AA,BB,CC,DD are the 2bpp data for the pixel,and a,b,c,d are the OR
137	137	* of these two bits together.
138	138	*/
139		gfx = machine.region("gfx3")->base();
	139	gfx = state->memregion("gfx3")->base();
140	140	for (i = 0; i < 4; i++)
141	141	{
142	142	int y;

src/mame/video/darkmist.c

r14976	r14977
15	15	{
16	16	int code,attr,pal;
17	17
18		code=machine.region("user1")->base()[tile_index]; /* TTTTTTTT */
19		attr=machine.region("user2")->base()[tile_index]; /* -PPP--TT - FIXED BITS (0xxx00xx) */
	18	code=machine.root_device().memregion("user1")->base()[tile_index]; /* TTTTTTTT */
	19	attr=machine.root_device().memregion("user2")->base()[tile_index]; /* -PPP--TT - FIXED BITS (0xxx00xx) */
20	20	code+=(attr&3)<<8;
21	21	pal=(attr>>4);
22	22
r14976	r14977
31	31	{
32	32	int code,attr,pal;
33	33
34		code=machine.region("user3")->base()[tile_index]; /* TTTTTTTT */
35		attr=machine.region("user4")->base()[tile_index]; /* -PPP--TT - FIXED BITS (0xxx00xx) */
	34	code=machine.root_device().memregion("user3")->base()[tile_index]; /* TTTTTTTT */
	35	attr=machine.root_device().memregion("user4")->base()[tile_index]; /* -PPP--TT - FIXED BITS (0xxx00xx) */
36	36	pal=attr>>4;
37	37
38	38	code+=(attr&3)<<8;
r14976	r14977
71	71
72	72	PALETTE_INIT(darkmist)
73	73	{
74		const UINT8 *color_prom = machine.region("proms")->base();
	74	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
75	75	int i;
76	76
77	77	/* allocate the colortable */

src/mame/video/shisen.c

r14976	r14977
12	12	{
13	13	int bankaddress;
14	14	int bank;
15		UINT8 *RAM = machine().region("maincpu")->base();
	15	UINT8 *RAM = memregion("maincpu")->base();
16	16
17	17	if (data & 0xc0) logerror("bank switch %02x\n",data);
18	18
19	19	/* bits 0-2 select ROM bank */
20	20	bankaddress = 0x10000 + (data & 0x07) * 0x4000;
21		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress]);
	21	membank("bank1")->set_base(&RAM[bankaddress]);
22	22
23	23	/* bits 3-5 select gfx bank */
24	24	bank = (data & 0x38) >> 3;

src/mame/video/nmk16.c

r14976	r14977
638	638	int nmk16_bioshipbg_sprflip_tx_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
639	639	{
640	640	nmk16_state *state = screen.machine().driver_data<nmk16_state>();
641		UINT16 *tilerom = (UINT16 *)screen.machine().region("gfx5")->base();
	641	UINT16 *tilerom = (UINT16 *)state->memregion("gfx5")->base();
642	642	int scrollx=-(state->m_bioship_scroll[1] + state->m_bioship_scroll[0]*256);
643	643	int scrolly=-(state->m_bioship_scroll[3] + state->m_bioship_scroll[2]*256);
644	644

src/mame/drivers/bfcobra.c

r14976	r14977
420	420	if (addr < 0x10000)
421	421	{
422	422	/* Is this region fixed? */
423		return (UINT8*)(machine.region("user1")->base() + addr);
	423	return (UINT8*)(state->memregion("user1")->base() + addr);
424	424	}
425	425	else if(addr < 0x20000)
426	426	{
427	427	addr &= 0xffff;
428	428	addr += (state->m_bank_data[0] & 1) ? 0x10000 : 0;
429	429
430		return (UINT8*)(machine.region("user1")->base() + addr + ((state->m_bank_data[0] >> 1) * 0x20000));
	430	return (UINT8*)(machine.root_device().memregion("user1")->base() + addr + ((state->m_bank_data[0] >> 1) * 0x20000));
431	431	}
432	432	else if (addr >= 0x20000 && addr < 0x40000)
433	433	{
r14976	r14977
1023	1023	{
1024	1024	UINT32 offset = ((state->m_bank_data[0] >> 1) * 0x20000) + ((0x4000 * data) ^ ((state->m_bank_data[0] & 1) ? 0 : 0x10000));
1025	1025
1026		memory_set_bankptr(machine, bank_names[num - 1], machine.region("user1")->base() + offset);
	1026	state->membank(bank_names[num - 1])->set_base(machine.root_device().memregion("user1")->base() + offset);
1027	1027	}
1028	1028	else if (data < 0x10)
1029	1029	{
1030		memory_set_bankptr(machine, bank_names[num - 1], &state->m_video_ram[(data - 0x08) * 0x4000]);
	1030	state->membank(bank_names[num - 1])->set_base(&state->m_video_ram[(data - 0x08) * 0x4000]);
1031	1031	}
1032	1032	else
1033	1033	{
1034		memory_set_bankptr(machine, bank_names[num - 1], &state->m_work_ram[(data - 0x10) * 0x4000]);
	1034	state->membank(bank_names[num - 1])->set_base(&state->m_work_ram[(data - 0x10) * 0x4000]);
1035	1035	}
1036	1036	}
1037	1037
r14976	r14977
1138	1138	}
1139	1139
1140	1140	fdc.offset = (BPT * fdc.track*2) + (fdc.side ? BPT : 0) + (BPS * (fdc.sector-1)) + fdc.byte_pos++;
1141		val = *(machine().region("user2")->base() + fdc.offset);
	1141	val = *(machine().root_device().memregion("user2")->base() + fdc.offset);
1142	1142
1143	1143	/* Move on to next sector? */
1144	1144	if (fdc.byte_pos == 1024)
r14976	r14977
1706	1706	UINT8 *tmp;
1707	1707
1708	1708	tmp = auto_alloc_array(machine, UINT8, 0x8000);
1709		rom = machine.region("audiocpu")->base() + 0x8000;
	1709	rom = machine.root_device().memregion("audiocpu")->base() + 0x8000;
1710	1710	memcpy(tmp, rom, 0x8000);
1711	1711
1712	1712	for (i = 0; i < 0x8000; i++)
r14976	r14977
1735	1735	state->m_bank_data[3] = 0;
1736	1736
1737	1737	/* Fixed 16kB ROM region */
1738		memory_set_bankptr(machine, "bank4", machine.region("user1")->base());
	1738	state->membank("bank4")->set_base(machine.root_device().memregion("user1")->base());
1739	1739
1740	1740	/* TODO: Properly sort out the data ACIA */
1741	1741	state->m_data_r = 1;

src/mame/drivers/nycaptor.c

r14976	r14977
331	331	WRITE8_MEMBER(nycaptor_state::nycaptor_generic_control_w)
332	332	{
333	333	m_generic_control_reg = data;
334		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x10000 + ((data&0x08)>>3)*0x4000 );
	334	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000 + ((data&0x08)>>3)*0x4000 );
335	335	}
336	336
337	337	static ADDRESS_MAP_START( nycaptor_master_map, AS_PROGRAM, 8, nycaptor_state )
r14976	r14977
436	436	int bank = (data >> 2) & 3;
437	437
438	438	m_generic_control_reg = data;
439		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x10000 + bank*0x4000 );
	439	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000 + bank*0x4000 );
440	440	}
441	441
442	442
r14976	r14977
1354	1354	{
1355	1355	nycaptor_state *state = machine.driver_data<nycaptor_state>();
1356	1356	int i;
1357		UINT8 *rom = machine.region("maincpu")->base();
	1357	UINT8 *rom = state->memregion("maincpu")->base();
1358	1358
1359	1359	for (i = 0; i < 0x20000; i++)
1360	1360	rom[i] = BITSWAP8(rom[i], 0, 1, 2, 3, 4, 5, 6, 7);
r14976	r14977
1366	1366	{
1367	1367	nycaptor_state *state = machine.driver_data<nycaptor_state>();
1368	1368	int i;
1369		UINT8 *rom = machine.region("maincpu")->base();
	1369	UINT8 *rom = state->memregion("maincpu")->base();
1370	1370
1371	1371	for (i = 0; i < 0x20000; i++)
1372	1372	rom[i] = BITSWAP8(rom[i], 0, 1, 2, 3, 4, 5, 6, 7);

src/mame/drivers/mitchell.c

r14976	r14977
150	150
151	151	WRITE8_MEMBER(mitchell_state::pang_bankswitch_w)
152	152	{
153		memory_set_bank(machine(), "bank1", data & 0x0f);
	153	membank("bank1")->set_entry(data & 0x0f);
154	154	}
155	155
156	156	/*************************************
r14976	r14977
2105	2105	static void bootleg_decode( running_machine &machine )
2106	2106	{
2107	2107	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2108		space->set_decrypted_region(0x0000, 0x7fff, machine.region("maincpu")->base() + 0x50000);
2109		memory_configure_bank_decrypted(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x60000, 0x4000);
	2108	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x50000);
	2109	machine.root_device().membank("bank1")->configure_decrypted_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x60000, 0x4000);
2110	2110	}
2111	2111
2112	2112
2113	2113	static void configure_banks( running_machine &machine )
2114	2114	{
2115		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	2115	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
2116	2116	}
2117	2117
2118	2118
r14976	r14977
2161	2161	mitchell_state *state = machine.driver_data<mitchell_state>();
2162	2162	state->m_input_type = 3;
2163	2163	state->m_nvram_size = 0x80;
2164		state->m_nvram = &machine.region("maincpu")->base()[0xe000];   /* NVRAM */
	2164	state->m_nvram = &state->memregion("maincpu")->base()[0xe000];   /* NVRAM */
2165	2165	spang_decode(machine);
2166	2166	configure_banks(machine);
2167	2167	}
r14976	r14977
2171	2171	mitchell_state *state = machine.driver_data<mitchell_state>();
2172	2172	state->m_input_type = 3;
2173	2173	state->m_nvram_size = 0x80;
2174		state->m_nvram = &machine.region("maincpu")->base()[0xe000];   /* NVRAM */
	2174	state->m_nvram = &state->memregion("maincpu")->base()[0xe000];   /* NVRAM */
2175	2175	bootleg_decode(machine);
2176	2176	configure_banks(machine);
2177	2177	}
r14976	r14977
2181	2181	mitchell_state *state = machine.driver_data<mitchell_state>();
2182	2182	state->m_input_type = 3;
2183	2183	state->m_nvram_size = 0x80;
2184		state->m_nvram = &machine.region("maincpu")->base()[0xe000];   /* NVRAM */
	2184	state->m_nvram = &state->memregion("maincpu")->base()[0xe000];   /* NVRAM */
2185	2185	spangj_decode(machine);
2186	2186	configure_banks(machine);
2187	2187	}
r14976	r14977
2190	2190	mitchell_state *state = machine.driver_data<mitchell_state>();
2191	2191	state->m_input_type = 3;
2192	2192	state->m_nvram_size = 0x80;
2193		state->m_nvram = &machine.region("maincpu")->base()[0xe000];   /* NVRAM */
	2193	state->m_nvram = &state->memregion("maincpu")->base()[0xe000];   /* NVRAM */
2194	2194	sbbros_decode(machine);
2195	2195	configure_banks(machine);
2196	2196	}
r14976	r14977
2255	2255	mitchell_state *state = machine.driver_data<mitchell_state>();
2256	2256	state->m_input_type = 2;
2257	2257	state->m_nvram_size = 0x80;
2258		state->m_nvram = &machine.region("maincpu")->base()[0xff80];   /* NVRAM */
	2258	state->m_nvram = &state->memregion("maincpu")->base()[0xff80];   /* NVRAM */
2259	2259	block_decode(machine);
2260	2260	configure_banks(machine);
2261	2261	}
r14976	r14977
2264	2264	mitchell_state *state = machine.driver_data<mitchell_state>();
2265	2265	state->m_input_type = 2;
2266	2266	state->m_nvram_size = 0x80;
2267		state->m_nvram = &machine.region("maincpu")->base()[0xff80];   /* NVRAM */
	2267	state->m_nvram = &state->memregion("maincpu")->base()[0xff80];   /* NVRAM */
2268	2268	bootleg_decode(machine);
2269	2269	configure_banks(machine);
2270	2270	}
r14976	r14977
2272	2272	static DRIVER_INIT( mstworld )
2273	2273	{
2274	2274	/* descramble the program rom .. */
2275		int len = machine.region("maincpu")->bytes();
	2275	int len = machine.root_device().memregion("maincpu")->bytes();
2276	2276	UINT8* source = auto_alloc_array(machine, UINT8, len);
2277		UINT8* dst = machine.region("maincpu")->base() ;
	2277	UINT8* dst = machine.root_device().memregion("maincpu")->base() ;
2278	2278	int x;
2279	2279
2280	2280	static const int tablebank[]=

src/mame/drivers/blktiger.c

r14976	r14977
54	54
55	55	WRITE8_MEMBER(blktiger_state::blktiger_bankswitch_w)
56	56	{
57		memory_set_bank(machine(), "bank1", data & 0x0f);
	57	membank("bank1")->set_entry(data & 0x0f);
58	58	}
59	59
60	60	WRITE8_MEMBER(blktiger_state::blktiger_coinlockout_w)
r14976	r14977
283	283	state->m_mcu = machine.device("mcu");
284	284
285	285	/* configure bankswitching */
286		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	286	state->membank("bank1")->configure_entries(0, 16, state->memregion("maincpu")->base() + 0x10000, 0x4000);
287	287
288	288	state->save_item(NAME(state->m_scroll_bank));
289	289	state->save_item(NAME(state->m_screen_layout));
r14976	r14977
301	301	blktiger_state *state = machine.driver_data<blktiger_state>();
302	302
303	303	/* configure bankswitching */
304		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	304	state->membank("bank1")->configure_entries(0, 16, state->memregion("maincpu")->base() + 0x10000, 0x4000);
305	305
306	306	state->m_scroll_x[0] = 0;
307	307	state->m_scroll_x[1] = 0;

src/mame/drivers/deco_mlc.c

r14976	r14977
693	693	static void descramble_sound( running_machine &machine )
694	694	{
695	695	/* the same as simpl156 / heavy smash? */
696		UINT8 *rom = machine.region("ymz")->base();
697		int length = machine.region("ymz")->bytes();
	696	UINT8 *rom = machine.root_device().memregion("ymz")->base();
	697	int length = machine.root_device().memregion("ymz")->bytes();
698	698	UINT8 *buf1 = auto_alloc_array(machine, UINT8, length);
699	699
700	700	UINT32 x;

src/mame/drivers/pasha2.c

r14976	r14977
127	127	case 0xb000:
128	128	case 0xc000:
129	129	case 0xd000:
130		memory_set_bankptr(machine(), "bank1", machine().region("user2")->base() + 0x400 * (bank - 0x8000)); break;
	130	membank("bank1")->set_base(machine().root_device().memregion("user2")->base() + 0x400 * (bank - 0x8000)); break;
131	131	}
132	132	}
133	133	}
r14976	r14977
476	476	pasha2_state *state = machine.driver_data<pasha2_state>();
477	477	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x95744, 0x95747, read16_delegate(FUNC(pasha2_state::pasha2_speedup_r), state));
478	478
479		memory_set_bankptr(machine, "bank1", machine.region("user2")->base());
	479	state->membank("bank1")->set_base(state->memregion("user2")->base());
480	480	}
481	481
482	482	GAME( 1998, pasha2, 0, pasha2, pasha2, pasha2, ROT0, "Dong Sung", "Pasha Pasha 2", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )

src/mame/drivers/bublbobl.c

r14976	r14977
1552	1552
1553	1553	static void configure_banks( running_machine& machine )
1554	1554	{
1555		UINT8 *ROM = machine.region("maincpu")->base();
1556		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	1555	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	1556	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
1557	1557	}
1558	1558
1559	1559	static DRIVER_INIT( bublbobl )
r14976	r14977
1588	1588	{
1589	1589	// rearrange gfx to original format
1590	1590	int i;
1591		UINT8* src = machine.region("gfx1")->base();
	1591	UINT8* src = machine.root_device().memregion("gfx1")->base();
1592	1592	for (i = 0; i < 0x40000; i++)
1593	1593	src[i] = BITSWAP8(src[i],7,6,5,4,0,1,2,3);
1594	1594

src/mame/drivers/skyfox.c

r14976	r14977
432	432	/* Untangle the graphics: cut each 32x32x8 tile in 16 8x8x8 tiles */
433	433	static DRIVER_INIT( skyfox )
434	434	{
435		UINT8 *RAM = machine.region("gfx1")->base();
436		UINT8 *end = RAM + machine.region("gfx1")->bytes();
	435	UINT8 *RAM = machine.root_device().memregion("gfx1")->base();
	436	UINT8 *end = RAM + machine.root_device().memregion("gfx1")->bytes();
437	437	UINT8 buf[32 * 32];
438	438
439	439	while (RAM < end)

src/mame/drivers/fgoal.c

r14976	r14977
47	47
48	48	static PALETTE_INIT( fgoal )
49	49	{
50		const UINT8 *color_prom = machine.region("proms")->base();
	50	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
51	51	int i;
52	52
53	53	/* for B/W screens PCB can be jumpered to use lower half of PROM */

src/mame/drivers/docastle.c

r14976	r14977
164	164	{
165	165	docastle_state *state = device->machine().driver_data<docastle_state>();
166	166
167		if (state->m_adpcm_pos >= device->machine().region("adpcm")->bytes())
	167	if (state->m_adpcm_pos >= state->memregion("adpcm")->bytes())
168	168	{
169	169	state->m_adpcm_idle = 1;
170	170	msm5205_reset_w(device, 1);
r14976	r14977
176	176	}
177	177	else
178	178	{
179		state->m_adpcm_data = device->machine().region("adpcm")->base()[state->m_adpcm_pos++];
	179	state->m_adpcm_data = device->machine().root_device().memregion("adpcm")->base()[state->m_adpcm_pos++];
180	180	msm5205_data_w(device, state->m_adpcm_data >> 4);
181	181	}
182	182	}

src/mame/drivers/coinmstr.c

r14976	r14977
141	141	READ8_MEMBER(coinmstr_state::question_r)
142	142	{
143	143	int address;
144		UINT8 *questions = machine().region("user1")->base();
	144	UINT8 *questions = memregion("user1")->base();
145	145
146	146	switch(m_question_adr[2])
147	147	{
r14976	r14977
1225	1225
1226	1226	static DRIVER_INIT( coinmstr )
1227	1227	{
1228		UINT8 *rom = machine.region("user1")->base();
1229		int length = machine.region("user1")->bytes();
	1228	UINT8 *rom = machine.root_device().memregion("user1")->base();
	1229	int length = machine.root_device().memregion("user1")->bytes();
1230	1230	UINT8 *buf = auto_alloc_array(machine, UINT8, length);
1231	1231	int i;
1232	1232

src/mame/drivers/expro02.c

r14976	r14977
314	314	{
315	315	if (ACCESSING_BITS_8_15)
316	316	{
317		UINT8 *rom = machine().region("oki")->base();
	317	UINT8 *rom = memregion("oki")->base();
318	318	memcpy(&rom[0x30000],&rom[0x40000 + ((data >> 8) & 0x0f) * 0x10000],0x10000);
319	319	}
320	320	}
r14976	r14977
751	751
752	752	static DRIVER_INIT(galsnew)
753	753	{
754		UINT32 *src = (UINT32 *)machine.region("gfx3" )->base();
755		UINT32 *dst = (UINT32 *)machine.region("gfx2" )->base();
	754	UINT32 *src = (UINT32 *)machine.root_device().memregion("gfx3" )->base();
	755	UINT32 *dst = (UINT32 *)machine.root_device().memregion("gfx2" )->base();
756	756	int x, offset;
757	757
758	758

src/mame/drivers/rampart.c

r14976	r14977
479	479
480	480	static DRIVER_INIT( rampart )
481	481	{
482		UINT8 *rom = machine.region("maincpu")->base();
	482	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
483	483
484	484	memcpy(&rom[0x140000], &rom[0x40000], 0x8000);
485	485	atarigen_slapstic_init(machine.device("maincpu"), 0x140000, 0x438000, 118);

src/mame/drivers/magicard.c

r14976	r14977
693	693	static MACHINE_RESET( magicard )
694	694	{
695	695	magicard_state *state = machine.driver_data<magicard_state>();
696		UINT16 *src    = (UINT16*)machine.region("maincpu" )->base();
	696	UINT16 *src    = (UINT16*)state->memregion("maincpu" )->base();
697	697	UINT16 *dst    = state->m_magicram;
698	698	memcpy (dst, src, 0x80000);
699	699	machine.device("maincpu")->reset();

src/mame/drivers/bfm_sc1.c

r14976	r14977
192	192	WRITE8_MEMBER(bfm_sc1_state::bankswitch_w)
193	193	{
194	194	//  printf("bankswitch %02x\n", data);
195		memory_set_bank(machine(),"bank1",data & 0x03);
	195	membank("bank1")->set_entry(data & 0x03);
196	196	}
197	197
198	198	///////////////////////////////////////////////////////////////////////////
r14976	r14977
668	668
669	669	// init rom bank ////////////////////////////////////////////////////////////////////
670	670	{
671		UINT8 *rom = machine.region("maincpu")->base();
	671	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
672	672
673		memory_configure_bank(machine,"bank1", 0, 4, &rom[0x0000], 0x02000);
674		memory_set_bank(machine,"bank1",state->m_defaultbank);
	673	state->membank("bank1")->configure_entries(0, 4, &rom[0x0000], 0x02000);
	674	state->membank("bank1")->set_entry(state->m_defaultbank);
675	675	}
676	676	}
677	677

src/mame/drivers/snowbros.c

r14976	r14977
418	418	{
419	419	case 0x23:
420	420	case 0x26:
421		snd = machine.region("oki")->base();
	421	snd = machine.root_device().memregion("oki")->base();
422	422	memcpy(snd+0x20000, snd+0x80000+0x00000, 0x20000);
423	423	state->m_sb3_music_is_playing = 1;
424	424	break;
425	425
426	426	case 0x24:
427		snd = machine.region("oki")->base();
	427	snd = machine.root_device().memregion("oki")->base();
428	428	memcpy(snd+0x20000, snd+0x80000+0x20000, 0x20000);
429	429	state->m_sb3_music_is_playing = 1;
430	430	break;
r14976	r14977
437	437	case 0x2b:
438	438	case 0x2c:
439	439	case 0x2d:
440		snd = machine.region("oki")->base();
	440	snd = state->memregion("oki")->base();
441	441	memcpy(snd+0x20000, snd+0x80000+0x40000, 0x20000);
442	442	state->m_sb3_music_is_playing = 1;
443	443	break;
r14976	r14977
1516	1516	static MACHINE_RESET (semiprot)
1517	1517	{
1518	1518	snowbros_state *state = machine.driver_data<snowbros_state>();
1519		UINT16 *PROTDATA = (UINT16*)machine.region("user1")->base();
	1519	UINT16 *PROTDATA = (UINT16*)state->memregion("user1")->base();
1520	1520	int i;
1521	1521
1522	1522	for (i = 0;i < 0x200/2;i++)
r14976	r14977
1526	1526	static MACHINE_RESET (finalttr)
1527	1527	{
1528	1528	snowbros_state *state = machine.driver_data<snowbros_state>();
1529		UINT16 *PROTDATA = (UINT16*)machine.region("user1")->base();
	1529	UINT16 *PROTDATA = (UINT16*)state->memregion("user1")->base();
1530	1530	int i;
1531	1531
1532	1532	for (i = 0;i < 0x200/2;i++)
r14976	r14977
2337	2337	static DRIVER_INIT( moremorp )
2338	2338	{
2339	2339	//snowbros_state *state = machine.driver_data<snowbros_state>();
2340		//  UINT16 *PROTDATA = (UINT16*)machine.region("user1")->base();
	2340	//  UINT16 *PROTDATA = (UINT16*)state->memregion("user1")->base();
2341	2341	//  int i;
2342	2342
2343	2343	//  for (i = 0;i < 0x200/2;i++)
r14976	r14977
2352	2352	static DRIVER_INIT( cookbib2 )
2353	2353	{
2354	2354	//snowbros_state *state = machine.driver_data<snowbros_state>();
2355		//  UINT16 *HCROM = (UINT16*)machine.region("maincpu")->base();
2356		//  UINT16 *PROTDATA = (UINT16*)machine.region("user1")->base();
	2355	//  UINT16 *HCROM = (UINT16*)machine.root_device().memregion("maincpu")->base();
	2356	//  UINT16 *PROTDATA = (UINT16*)state->memregion("user1")->base();
2357	2357	//  int i;
2358	2358	//  state->m_hyperpac_ram[0xf000/2] = 0x46fc;
2359	2359	//  state->m_hyperpac_ram[0xf002/2] = 0x2700;
r14976	r14977
2719	2719	static DRIVER_INIT(4in1boot)
2720	2720	{
2721	2721	UINT8 *buffer;
2722		UINT8 *src = machine.region("maincpu")->base();
2723		int len = machine.region("maincpu")->bytes();
	2722	UINT8 *src = machine.root_device().memregion("maincpu")->base();
	2723	int len = machine.root_device().memregion("maincpu")->bytes();
2724	2724
2725	2725	/* strange order */
2726	2726	buffer = auto_alloc_array(machine, UINT8, len);
r14976	r14977
2734	2734	auto_free(machine, buffer);
2735	2735	}
2736	2736
2737		src = machine.region("soundcpu")->base();
2738		len = machine.region("soundcpu")->bytes();
	2737	src = machine.root_device().memregion("soundcpu")->base();
	2738	len = machine.root_device().memregion("soundcpu")->bytes();
2739	2739
2740	2740	/* strange order */
2741	2741	buffer = auto_alloc_array(machine, UINT8, len);
r14976	r14977
2753	2753	static DRIVER_INIT(snowbro3)
2754	2754	{
2755	2755	UINT8 *buffer;
2756		UINT8 *src = machine.region("maincpu")->base();
2757		int len = machine.region("maincpu")->bytes();
	2756	UINT8 *src = machine.root_device().memregion("maincpu")->base();
	2757	int len = machine.root_device().memregion("maincpu")->bytes();
2758	2758
2759	2759	/* strange order */
2760	2760	buffer = auto_alloc_array(machine, UINT8, len);

src/mame/drivers/nbmj9195.c

r14976	r14977
40	40
41	41	WRITE8_MEMBER(nbmj9195_state::nbmj9195_soundbank_w)
42	42	{
43		UINT8 *SNDROM = machine().region("audiocpu")->base();
	43	UINT8 *SNDROM = memregion("audiocpu")->base();
44	44
45		memory_set_bankptr(machine(), "bank1", &SNDROM[0x08000 + (0x8000 * (data & 0x03))]);
	45	membank("bank1")->set_base(&SNDROM[0x08000 + (0x8000 * (data & 0x03))]);
46	46	}
47	47
48	48	READ8_MEMBER(nbmj9195_state::nbmj9195_sound_r)
r14976	r14977
662	662	{
663	663	nbmj9195_state *state = machine.driver_data<nbmj9195_state>();
664	664	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
665		UINT8 *ROM = machine.region("audiocpu")->base();
	665	UINT8 *ROM = state->memregion("audiocpu")->base();
666	666
667	667	// sound program patch
668	668	ROM[0x0213] = 0x00;         // DI -> NOP

src/mame/drivers/hcastle.c

r14976	r14977
19	19
20	20	WRITE8_MEMBER(hcastle_state::hcastle_bankswitch_w)
21	21	{
22		memory_set_bank(machine(), "bank1", data & 0x1f);
	22	membank("bank1")->set_entry(data & 0x1f);
23	23	}
24	24
25	25	WRITE8_MEMBER(hcastle_state::hcastle_soundirq_w)
r14976	r14977
179	179	static MACHINE_START( hcastle )
180	180	{
181	181	hcastle_state *state = machine.driver_data<hcastle_state>();
182		UINT8 *ROM = machine.region("maincpu")->base();
	182	UINT8 *ROM = state->memregion("maincpu")->base();
183	183
184		memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x2000);
	184	state->membank("bank1")->configure_entries(0, 16, &ROM[0x10000], 0x2000);
185	185
186	186	state->m_audiocpu = machine.device("audiocpu");
187	187	state->m_k007121_1 = machine.device("k007121_1");

src/mame/drivers/cntsteer.c

r14976	r14977
85	85
86	86	static PALETTE_INIT( zerotrgt )
87	87	{
88		const UINT8 *color_prom = machine.region("proms")->base();
	88	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
89	89	int i;
90	90	for (i = 0; i < machine.total_colors(); i++)
91	91	{
r14976	r14977
1144	1144
1145	1145	static void zerotrgt_rearrange_gfx( running_machine &machine, int romsize, int romarea )
1146	1146	{
1147		UINT8 *src = machine.region("gfx4")->base();
1148		UINT8 *dst = machine.region("gfx3")->base();
	1147	UINT8 *src = machine.root_device().memregion("gfx4")->base();
	1148	UINT8 *dst = machine.root_device().memregion("gfx3")->base();
1149	1149	int rm;
1150	1150	int cnt1;
1151	1151
r14976	r14977
1164	1164	#if 0
1165	1165	static DRIVER_INIT( cntsteer )
1166	1166	{
1167		UINT8 *RAM = machine.region("subcpu")->base();
	1167	UINT8 *RAM = machine.root_device().memregion("subcpu")->base();
1168	1168
1169	1169	RAM[0xc2cf] = 0x43; /* Patch out Cpu 1 ram test - it never ends..?! */
1170	1170	RAM[0xc2d0] = 0x43;

src/mame/drivers/csplayh5.c

r14976	r14977
167	167
168	168	static void csplayh5_soundbank_w(running_machine &machine, int data)
169	169	{
170		UINT8 *SNDROM = machine.region("audiocpu")->base();
	170	UINT8 *SNDROM = machine.root_device().memregion("audiocpu")->base();
171	171
172		memory_set_bankptr(machine, "bank1", &SNDROM[0x08000 + (0x8000 * (data & 0x03))]);
	172	machine.root_device().membank("bank1")->set_base(&SNDROM[0x08000 + (0x8000 * (data & 0x03))]);
173	173	}
174	174
175	175	READ8_MEMBER(csplayh5_state::csplayh5_sound_r)
r14976	r14977
670	670
671	671	void general_init(running_machine &machine, int patchaddress)
672	672	{
673		UINT16 *MAINROM = (UINT16 *)machine.region("maincpu")->base();
674		UINT8 *SNDROM = machine.region("audiocpu")->base();
	673	UINT16 *MAINROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
	674	UINT8 *SNDROM = machine.root_device().memregion("audiocpu")->base();
675	675
676	676	// initialize sound rom bank
677	677	csplayh5_soundbank_w(machine, 0);

src/mame/drivers/nexus3d.c

r14976	r14977
263	263	{
264	264	nexus3d_state *state = machine.driver_data<nexus3d_state>();
265	265	// the first part of the flash ROM automatically gets copied to RAM
266		memcpy( state->m_mainram, machine.region("user1")->base(), 4 * 1024);
267		state->m_flash_region = machine.region("user1")->base();
	266	memcpy( state->m_mainram, machine.root_device().memregion("user1")->base(), 4 * 1024);
	267	state->m_flash_region = state->memregion("user1")->base();
268	268	}
269	269
270	270	GAME( 2005, acheart,  0, nexus3d, nexus3d, nexus3d, ROT0, "Examu", "Arcana Heart",GAME_IS_SKELETON )

src/mame/drivers/bking.c

r14976	r14977
59	59
60	60	READ8_MEMBER(bking_state::bking3_extrarom_r)
61	61	{
62		UINT8 *rom = machine().region("user2")->base();
	62	UINT8 *rom = memregion("user2")->base();
63	63	return rom[m_addr_h * 256 + m_addr_l];
64	64	}
65	65

src/mame/drivers/labyrunr.c

r14976	r14977
32	32	if (data & 0xe0) popmessage("bankswitch %02x", data);
33	33
34	34	/* bits 0-2 = bank number */
35		memory_set_bank(machine(), "bank1", data & 0x07);   // shall we check if data&7 > #banks?
	35	membank("bank1")->set_entry(data & 0x07);   // shall we check if data&7 > #banks?
36	36
37	37	/* bits 3 and 4 are coin counters */
38	38	coin_counter_w(machine(), 0, data & 0x08);
r14976	r14977
180	180	static MACHINE_START( labyrunr )
181	181	{
182	182	labyrunr_state *state = machine.driver_data<labyrunr_state>();
183		UINT8 *ROM = machine.region("maincpu")->base();
	183	UINT8 *ROM = state->memregion("maincpu")->base();
184	184
185		memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
	185	state->membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x4000);
186	186
187	187	state->m_k007121 = machine.device("k007121");
188	188	}

src/mame/drivers/shougi.c

r14976	r14977
133	133
134	134	static PALETTE_INIT( shougi )
135	135	{
136		const UINT8 *color_prom = machine.region("proms")->base();
	136	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
137	137	int i;
138	138	static const int resistances_b[2]  = { 470, 220 };
139	139	static const int resistances_rg[3] = { 1000, 470, 220 };

src/mame/drivers/thief.c

r14976	r14977
636	636
637	637	static DRIVER_INIT( thief )
638	638	{
639		UINT8 *dest = machine.region( "maincpu" )->base();
640		const UINT8 *source = machine.region( "cpu1" )->base();
	639	UINT8 *dest = machine.root_device().memregion( "maincpu" )->base();
	640	const UINT8 *source = machine.root_device().memregion( "cpu1" )->base();
641	641
642	642	/* C8 is mapped (banked) in CPU1's address space; it contains Z80 code */
643	643	memcpy( &dest[0xe010], &source[0x290], 0x20 );

src/mame/drivers/hornet.c

r14976	r14977
597	597	WRITE32_MEMBER(hornet_state::comm_rombank_w)
598	598	{
599	599	int bank = data >> 24;
600		UINT8 *usr3 = machine().region("user3")->base();
	600	UINT8 *usr3 = memregion("user3")->base();
601	601	if (usr3 != NULL)
602		memory_set_bank(machine(), "bank1", bank & 0x7f);
	602	membank("bank1")->set_entry(bank & 0x7f);
603	603	}
604	604
605	605	READ32_MEMBER(hornet_state::comm0_unk_r)
r14976	r14977
893	893
894	894	static MACHINE_RESET( hornet )
895	895	{
896		UINT8 *usr3 = machine.region("user3")->base();
897		UINT8 *usr5 = machine.region("user5")->base();
	896	UINT8 *usr3 = machine.root_device().memregion("user3")->base();
	897	UINT8 *usr5 = machine.root_device().memregion("user5")->base();
898	898	if (usr3 != NULL)
899	899	{
900		memory_configure_bank(machine, "bank1", 0, machine.region("user3")->bytes() / 0x40000, usr3, 0x40000);
901		memory_set_bank(machine, "bank1", 0);
	900	machine.root_device().membank("bank1")->configure_entries(0, machine.root_device().memregion("user3")->bytes() / 0x40000, usr3, 0x40000);
	901	machine.root_device().membank("bank1")->set_entry(0);
902	902	}
903	903
904	904	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
905	905
906	906	if (usr5)
907		memory_set_bankptr(machine, "bank5", usr5);
	907	machine.root_device().membank("bank5")->set_base(usr5);
908	908	}
909	909
910	910	static double adc12138_input_callback( device_t *device, UINT8 input )
r14976	r14977
1014	1014
1015	1015	static MACHINE_RESET( hornet_2board )
1016	1016	{
1017		UINT8 *usr3 = machine.region("user3")->base();
1018		UINT8 *usr5 = machine.region("user5")->base();
	1017	UINT8 *usr3 = machine.root_device().memregion("user3")->base();
	1018	UINT8 *usr5 = machine.root_device().memregion("user5")->base();
1019	1019
1020	1020	if (usr3 != NULL)
1021	1021	{
1022		memory_configure_bank(machine, "bank1", 0, machine.region("user3")->bytes() / 0x40000, usr3, 0x40000);
1023		memory_set_bank(machine, "bank1", 0);
	1022	machine.root_device().membank("bank1")->configure_entries(0, machine.root_device().memregion("user3")->bytes() / 0x40000, usr3, 0x40000);
	1023	machine.root_device().membank("bank1")->set_entry(0);
1024	1024	}
1025	1025	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
1026	1026	cputag_set_input_line(machine, "dsp2", INPUT_LINE_RESET, ASSERT_LINE);
1027	1027
1028	1028	if (usr5)
1029		memory_set_bankptr(machine, "bank5", usr5);
	1029	machine.root_device().membank("bank5")->set_base(usr5);
1030	1030	}
1031	1031
1032	1032	static MACHINE_CONFIG_DERIVED( hornet_2board, hornet )
r14976	r14977
1244	1244	{
1245	1245	hornet_state *state = machine.driver_data<hornet_state>();
1246	1246	init_konami_cgboard(machine, 1, CGBOARD_TYPE_HORNET);
1247		set_cgboard_texture_bank(machine, 0, "bank5", machine.region("user5")->base());
	1247	set_cgboard_texture_bank(machine, 0, "bank5", state->memregion("user5")->base());
1248	1248
1249	1249	state->m_led_reg0 = state->m_led_reg1 = 0x7f;
1250	1250
r14976	r14977
1255	1255	{
1256	1256	hornet_state *state = machine.driver_data<hornet_state>();
1257	1257	init_konami_cgboard(machine, 2, CGBOARD_TYPE_HORNET);
1258		set_cgboard_texture_bank(machine, 0, "bank5", machine.region("user5")->base());
1259		set_cgboard_texture_bank(machine, 1, "bank6", machine.region("user5")->base());
	1258	set_cgboard_texture_bank(machine, 0, "bank5", machine.root_device().memregion("user5")->base());
	1259	set_cgboard_texture_bank(machine, 1, "bank6", state->memregion("user5")->base());
1260	1260
1261	1261	state->m_led_reg0 = state->m_led_reg1 = 0x7f;
1262	1262

src/mame/drivers/pipedrm.c

r14976	r14977
188	188	*/
189	189
190	190	/* set the memory bank on the Z80 using the low 3 bits */
191		memory_set_bank(space->machine(), "bank1", data & 0x7);
	191	state->membank("bank1")->set_entry(data & 0x7);
192	192
193	193	/* map to the fromance gfx register */
194	194	state->fromance_gfxreg_w(*space, offset, ((data >> 6) & 0x01) |    /* flipscreen */
r14976	r14977
198	198
199	199	static WRITE8_HANDLER( sound_bankswitch_w )
200	200	{
201		memory_set_bank(space->machine(), "bank2", data & 0x01);
	201	space->machine().root_device().membank("bank2")->set_entry(data & 0x01);
202	202	}
203	203
204	204
r14976	r14977
595	595	state->m_subcpu = machine.device("sub");
596	596
597	597	/* initialize main Z80 bank */
598		memory_configure_bank(machine, "bank1", 0, 8, machine.region("maincpu")->base() + 0x10000, 0x2000);
599		memory_set_bank(machine, "bank1", 0);
	598	state->membank("bank1")->configure_entries(0, 8, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x2000);
	599	state->membank("bank1")->set_entry(0);
600	600
601	601	/* initialize sound bank */
602		memory_configure_bank(machine, "bank2", 0, 2, machine.region("sub")->base() + 0x10000, 0x8000);
603		memory_set_bank(machine, "bank2", 0);
	602	state->membank("bank2")->configure_entries(0, 2, state->memregion("sub")->base() + 0x10000, 0x8000);
	603	state->membank("bank2")->set_entry(0);
604	604
605	605	/* state save */
606	606	state->save_item(NAME(state->m_pending_command));

src/mame/drivers/ccastles.c

r14976	r14977
191	191	rectangle visarea;
192	192
193	193	/* initialize globals */
194		state->m_syncprom = machine.region("proms")->base() + 0x000;
	194	state->m_syncprom = machine.root_device().memregion("proms")->base() + 0x000;
195	195
196	196	/* find the start of VBLANK in the SYNC PROM */
197	197	for (state->m_vblank_start = 0; state->m_vblank_start < 256; state->m_vblank_start++)
r14976	r14977
213	213	machine.primary_screen->configure(320, 256, visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL);
214	214
215	215	/* configure the ROM banking */
216		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0xa000, 0x6000);
	216	state->membank("bank1")->configure_entries(0, 2, state->memregion("maincpu")->base() + 0xa000, 0x6000);
217	217
218	218	/* create a timer for IRQs and set up the first callback */
219	219	state->m_irq_timer = machine.scheduler().timer_alloc(FUNC(clock_irq));
r14976	r14977
265	265
266	266	WRITE8_MEMBER(ccastles_state::bankswitch_w)
267	267	{
268		memory_set_bank(machine(), "bank1", data & 1);
	268	membank("bank1")->set_entry(data & 1);
269	269	}
270	270
271	271

src/mame/drivers/discoboy.c

r14976	r14977
199	199	#ifdef UNUSED_FUNCTION
200	200	void discoboy_setrombank( running_machine &machine, UINT8 data )
201	201	{
202		UINT8 *ROM = machine.region("maincpu")->base();
	202	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
203	203	data &= 0x2f;
204		memory_set_bankptr(space->machine(), "bank1", &ROM[0x6000 + (data * 0x1000)] );
	204	space->machine().root_device().membank("bank1")->set_base(&ROM[0x6000 + (data * 0x1000)] );
205	205	}
206	206	#endif
207	207
r14976	r14977
225	225	// discoboy gfxbank
226	226	m_gfxbank = data & 0xf0;
227	227
228		memory_set_bank(machine(), "bank1", data & 0x07);
	228	membank("bank1")->set_entry(data & 0x07);
229	229	}
230	230
231	231	WRITE8_MEMBER(discoboy_state::discoboy_port_03_w)// sfx? (to sound cpu)
r14976	r14977
329	329	/* Note: this is bit 5 on yunsung8.c */
330	330	msm5205_reset_w(device, (data & 0x08) >> 3);
331	331
332		memory_set_bank(device->machine(), "sndbank", data & 0x07);
	332	device->machine().root_device().membank("sndbank")->set_entry(data & 0x07);
333	333
334	334	if (data != (data & (~0x0f)))
335	335	logerror("%s: Bank %02X\n", device->machine().describe_context(), data);
r14976	r14977
560	560	static DRIVER_INIT( discoboy )
561	561	{
562	562	discoboy_state *state = machine.driver_data<discoboy_state>();
563		UINT8 *ROM = machine.region("maincpu")->base();
564		UINT8 *AUDIO = machine.region("audiocpu")->base();
	563	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	564	UINT8 *AUDIO = state->memregion("audiocpu")->base();
565	565
566	566	memset(state->m_ram_1, 0, sizeof(state->m_ram_1));
567	567	memset(state->m_ram_2, 0, sizeof(state->m_ram_2));
r14976	r14977
575	575	state->save_item(NAME(state->m_ram_3));
576	576	state->save_item(NAME(state->m_ram_4));
577	577
578		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
579		memory_set_bank(machine, "bank1", 0);
580		memory_configure_bank(machine, "sndbank", 0, 8, &AUDIO[0x00000], 0x4000);
581		memory_set_bank(machine, "sndbank", 0);
	578	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
	579	state->membank("bank1")->set_entry(0);
	580	state->membank("sndbank")->configure_entries(0, 8, &AUDIO[0x00000], 0x4000);
	581	state->membank("sndbank")->set_entry(0);
582	582	}
583	583
584	584

src/mame/drivers/mediagx.c

r14976	r14977
1045	1045	static MACHINE_RESET(mediagx)
1046	1046	{
1047	1047	mediagx_state *state = machine.driver_data<mediagx_state>();
1048		UINT8 *rom = machine.region("bios")->base();
	1048	UINT8 *rom = state->memregion("bios")->base();
1049	1049
1050	1050	device_set_irq_callback(machine.device("maincpu"), irq_callback);
1051	1051

src/mame/drivers/policetr.c

r14976	r14977
186	186
187	187	READ32_MEMBER(policetr_state::bsmt2000_data_r)
188	188	{
189		return machine().region("bsmt")->base()[m_bsmt_data_bank * 0x10000 + m_bsmt_data_offset] << 8;
	189	return memregion("bsmt")->base()[m_bsmt_data_bank * 0x10000 + m_bsmt_data_offset] << 8;
190	190	}
191	191
192	192

src/mame/drivers/skimaxx.c

r14976	r14977
138	138	static VIDEO_START( skimaxx )
139	139	{
140	140	skimaxx_state *state = machine.driver_data<skimaxx_state>();
141		state->m_blitter_gfx = (UINT16 *) machine.region( "blitter" )->base();
142		state->m_blitter_gfx_len = machine.region( "blitter" )->bytes() / 2;
	141	state->m_blitter_gfx = (UINT16 *) machine.root_device().memregion( "blitter" )->base();
	142	state->m_blitter_gfx_len = state->memregion( "blitter" )->bytes() / 2;
143	143
144	144	state->m_bg_buffer = auto_alloc_array(machine, UINT32, 0x400 * 0x100 * sizeof(UINT16) / sizeof(UINT32) * 2);   // 2 buffers
145	145	state->m_bg_buffer_back  = state->m_bg_buffer + 0x400 * 0x100 * sizeof(UINT16) / sizeof(UINT32) * 0;
146	146	state->m_bg_buffer_front = state->m_bg_buffer + 0x400 * 0x100 * sizeof(UINT16) / sizeof(UINT32) * 1;
147		memory_configure_bank(machine, "bank1", 0, 1, state->m_bg_buffer_back,  0);
148		memory_configure_bank(machine, "bank1", 1, 1, state->m_bg_buffer_front, 0);
	147	state->membank("bank1")->configure_entry(0, state->m_bg_buffer_back);
	148	state->membank("bank1")->configure_entry(1, state->m_bg_buffer_front);
149	149	}
150	150
151	151	static SCREEN_UPDATE_IND16( skimaxx )
r14976	r14977
265	265	m_bg_buffer_back  = m_bg_buffer + 0x400 * 0x100 * sizeof(UINT16) / sizeof(UINT32) * bank_bg_buffer;
266	266	m_bg_buffer_front = m_bg_buffer + 0x400 * 0x100 * sizeof(UINT16) / sizeof(UINT32) * (1 - bank_bg_buffer);
267	267
268		memory_set_bank(machine(), "bank1", bank_bg_buffer);
	268	membank("bank1")->set_entry(bank_bg_buffer);
269	269	}
270	270	}
271	271

src/mame/drivers/megadrvb.c

r14976	r14977
659	659	* Game does a check @ 1afc00 with work RAM fff57c that makes it play like the original console version (i.e. 8 energy hits instead of 2)
660	660	*/
661	661	#if ENERGY_CONSOLE_MODE
662		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	662	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
663	663	rom[0x1afc08/2] = 0x6600;
664	664	#endif
665	665
r14976	r14977
675	675	// after this decode look like intentional changes
676	676	static DRIVER_INIT( mk3mdb )
677	677	{
678		UINT8 *rom = machine.region("maincpu")->base();
	678	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
679	679
680	680	for (int x = 0x000001; x < 0x100001; x += 2)
681	681	{
r14976	r14977
726	726	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x400000, 0x5fffff, "bank5");
727	727	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x400000, 0x5fffff);
728	728
729		memory_set_bankptr(machine,  "bank5", machine.region( "maincpu" )->base() + 0x400000 );
	729	machine.root_device().membank("bank5")->set_base(machine.root_device().memregion( "maincpu" )->base() + 0x400000 );
730	730
731	731	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x770070, 0x770075, FUNC(ssf2mdb_dsw_r) );
732	732
r14976	r14977
736	736
737	737	static DRIVER_INIT( srmdb )
738	738	{
739		UINT8* rom = machine.region("maincpu")->base();
	739	UINT8* rom = machine.root_device().memregion("maincpu")->base();
740	740
741	741	/* todo, reduce bitswaps to single swap */
742	742	for (int x = 0x00001; x < 0x40000; x += 2)

src/mame/drivers/gaplus.c

r14976	r14977
872	872	UINT8 *rom;
873	873	int i;
874	874
875		rom = machine.region("gfx1")->base();
	875	rom = machine.root_device().memregion("gfx1")->base();
876	876	for (i = 0;i < 0x2000;i++)
877	877	rom[i + 0x2000] = rom[i] >> 4;
878	878
879		rom = machine.region("gfx2")->base() + 0x6000;
	879	rom = machine.root_device().memregion("gfx2")->base() + 0x6000;
880	880	for (i = 0;i < 0x2000;i++)
881	881	rom[i + 0x2000] = rom[i] << 4;
882	882	}

src/mame/drivers/carpolo.c

r14976	r14977
331	331
332	332
333	333	/* invert gfx PROM since the bits are active LO */
334		ROM = machine.region("gfx2")->base();
335		len = machine.region("gfx2")->bytes();
	334	ROM = machine.root_device().memregion("gfx2")->base();
	335	len = machine.root_device().memregion("gfx2")->bytes();
336	336	for (i = 0;i < len; i++)
337	337	ROM[i] ^= 0x0f;
338	338	}

src/mame/drivers/coinmvga.c

r14976	r14977
872	872	static DRIVER_INIT( colorama )
873	873	{
874	874	UINT16 *ROM;
875		ROM = (UINT16 *)machine.region("maincpu")->base();
	875	ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
876	876
877	877	// rte in non-irq routines? wtf? patch them to rts...
878	878	ROM[0x02B476/2] = 0x5470;
r14976	r14977
889	889	static DRIVER_INIT( cmrltv75 )
890	890	{
891	891	UINT16 *ROM;
892		ROM = (UINT16 *)machine.region("maincpu")->base();
	892	ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
893	893
894	894	// rte in non-irq routines? wtf? patch them to rts...
895	895	ROM[0x056fd6/2] = 0x5470;

src/mame/drivers/powerins.c

r14976	r14977
48	48	{
49	49	if (ACCESSING_BITS_0_7)
50	50	{
51		UINT8 *RAM = machine().region("oki1")->base();
	51	UINT8 *RAM = memregion("oki1")->base();
52	52	int new_bank = data & 0x7;
53	53
54	54	if (new_bank != m_oki_bank)

src/mame/drivers/cultures.c

r14976	r14977
57	57	static TILE_GET_INFO( get_bg1_tile_info )
58	58	{
59	59	cultures_state *state = machine.driver_data<cultures_state>();
60		UINT8 *region = machine.region("gfx3")->base() + 0x200000 + 0x80000 * state->m_bg1_bank;
	60	UINT8 *region = state->memregion("gfx3")->base() + 0x200000 + 0x80000 * state->m_bg1_bank;
61	61	int code = region[tile_index * 2] + (region[tile_index * 2 + 1] << 8);
62	62	SET_TILE_INFO(2, code, code >> 12, 0);
63	63	}
r14976	r14977
65	65	static TILE_GET_INFO( get_bg2_tile_info )
66	66	{
67	67	cultures_state *state = machine.driver_data<cultures_state>();
68		UINT8 *region = machine.region("gfx2")->base() + 0x200000 + 0x80000 * state->m_bg2_bank;
	68	UINT8 *region = state->memregion("gfx2")->base() + 0x200000 + 0x80000 * state->m_bg2_bank;
69	69	int code = region[tile_index * 2] + (region[tile_index * 2 + 1] << 8);
70	70	SET_TILE_INFO(1, code, code >> 12, 0);
71	71	}
r14976	r14977
128	128
129	129	WRITE8_MEMBER(cultures_state::cpu_bankswitch_w)
130	130	{
131		memory_set_bank(machine(), "bank1", data & 0x0f);
	131	membank("bank1")->set_entry(data & 0x0f);
132	132	m_video_bank = ~data & 0x20;
133	133	}
134	134
r14976	r14977
161	161	if (m_old_bank != new_bank)
162	162	{
163	163	// oki banking
164		UINT8 *src = machine().region("oki")->base() + 0x40000 + 0x20000 * new_bank;
165		UINT8 *dst = machine().region("oki")->base() + 0x20000;
	164	UINT8 *src = memregion("oki")->base() + 0x40000 + 0x20000 * new_bank;
	165	UINT8 *dst = memregion("oki")->base() + 0x20000;
166	166	memcpy(dst, src, 0x20000);
167	167
168	168	m_old_bank = new_bank;
r14976	r14977
370	370	static MACHINE_START( cultures )
371	371	{
372	372	cultures_state *state = machine.driver_data<cultures_state>();
373		UINT8 *ROM = machine.region("maincpu")->base();
	373	UINT8 *ROM = state->memregion("maincpu")->base();
374	374
375		memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x0000], 0x4000);
	375	state->membank("bank1")->configure_entries(0, 16, &ROM[0x0000], 0x4000);
376	376
377	377	state->save_item(NAME(state->m_paletteram));
378	378	state->save_item(NAME(state->m_old_bank));

src/mame/drivers/5clown.c

r14976	r14977
537	537
538	538	static PALETTE_INIT( fclown )
539	539	{
540		const UINT8 *color_prom = machine.region("proms")->base();
	540	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
541	541	/*
542	542	7654 3210
543	543	---- ---x   RED component.
r14976	r14977
1205	1205	/* Decrypting main program */
1206	1206
1207	1207	int x;
1208		UINT8 *src = machine.region( "maincpu" )->base();
	1208	UINT8 *src = state->memregion( "maincpu" )->base();
1209	1209
1210	1210	for (x = 0x0000; x < 0x10000; x++)
1211	1211	{
r14976	r14977
1215	1215
1216	1216	/* Decrypting GFX by segments */
1217	1217
1218		UINT8 *gfx1_src = machine.region( "gfx1" )->base();
1219		UINT8 *gfx2_src = machine.region( "gfx2" )->base();
	1218	UINT8 *gfx1_src = machine.root_device().memregion( "gfx1" )->base();
	1219	UINT8 *gfx2_src = machine.root_device().memregion( "gfx2" )->base();
1220	1220
1221	1221	for (x = 0x2000; x < 0x3000; x++)
1222	1222	{
r14976	r14977
1236	1236
1237	1237	/* Decrypting sound samples */
1238	1238
1239		UINT8 *samples_src = machine.region( "oki6295" )->base();
	1239	UINT8 *samples_src = machine.root_device().memregion( "oki6295" )->base();
1240	1240
1241	1241	for (x = 0x0000; x < 0x10000; x++)
1242	1242	{

src/mame/drivers/jedi.c

r14976	r14977
162	162	state->m_interrupt_timer->adjust(machine.primary_screen->time_until_pos(32), 32);
163	163
164	164	/* configure the banks */
165		memory_configure_bank(machine, "bank1", 0, 3, machine.region("maincpu")->base() + 0x10000, 0x4000);
	165	state->membank("bank1")->configure_entries(0, 3, state->memregion("maincpu")->base() + 0x10000, 0x4000);
166	166
167	167	/* set up save state */
168	168	state->save_item(NAME(state->m_nvram_enabled));
r14976	r14977
195	195
196	196	WRITE8_MEMBER(jedi_state::rom_banksel_w)
197	197	{
198		if (data & 0x01) memory_set_bank(machine(), "bank1", 0);
199		if (data & 0x02) memory_set_bank(machine(), "bank1", 1);
200		if (data & 0x04) memory_set_bank(machine(), "bank1", 2);
	198	if (data & 0x01) membank("bank1")->set_entry(0);
	199	if (data & 0x02) membank("bank1")->set_entry(1);
	200	if (data & 0x04) membank("bank1")->set_entry(2);
201	201	}
202	202
203	203

src/mame/drivers/seta2.c

r14976	r14977
122	122	{
123	123	if (ACCESSING_BITS_0_7)
124	124	{
125		UINT8 *ROM = machine().region( "x1snd" )->base();
126		int banks = (machine().region( "x1snd" )->bytes() - 0x100000) / 0x20000;
	125	UINT8 *ROM = memregion( "x1snd" )->base();
	126	int banks = (machine().root_device().memregion( "x1snd" )->bytes() - 0x100000) / 0x20000;
127	127	if (data >= banks)
128	128	{
129	129	logerror("CPU #0 PC %06X: invalid sound bank %04X\n",cpu_get_pc(&space.device()),data);
r14976	r14977
325	325	READ16_MEMBER(seta2_state::pzlbowl_protection_r)
326	326	{
327	327	UINT32 address = (space.read_word(0x20ba16) << 16) | space.read_word(0x20ba18);
328		return machine().region("maincpu")->base()[address - 2];
	328	return memregion("maincpu")->base()[address - 2];
329	329	}
330	330
331	331	READ16_MEMBER(seta2_state::pzlbowl_coins_r)
r14976	r14977
2408	2408
2409	2409	static DRIVER_INIT( funcube2 )
2410	2410	{
2411		UINT32 *main_cpu = (UINT32 *) machine.region("maincpu")->base();
2412		UINT16 *sub_cpu  = (UINT16 *) machine.region("sub")->base();
	2411	UINT32 *main_cpu = (UINT32 *) machine.root_device().memregion("maincpu")->base();
	2412	UINT16 *sub_cpu  = (UINT16 *) machine.root_device().memregion("sub")->base();
2413	2413
2414	2414	main_cpu[0xa5c/4] = 0x4e713e3c;       // PIC protection?
2415	2415	main_cpu[0xa74/4] = 0x4e713e3c;
r14976	r14977
2421	2421
2422	2422	static DRIVER_INIT( funcube3 )
2423	2423	{
2424		UINT32 *main_cpu = (UINT32 *) machine.region("maincpu")->base();
2425		UINT16 *sub_cpu  = (UINT16 *) machine.region("sub")->base();
	2424	UINT32 *main_cpu = (UINT32 *) machine.root_device().memregion("maincpu")->base();
	2425	UINT16 *sub_cpu  = (UINT16 *) machine.root_device().memregion("sub")->base();
2426	2426
2427	2427	main_cpu[0x008bc/4] = 0x4a804e71;
2428	2428	main_cpu[0x19f0c/4] = 0x4e714e71;

src/mame/drivers/flkatck.c

r14976	r14977
36	36
37	37	/* bits 0-1: bank # */
38	38	if ((data & 0x03) != 0x03)   /* for safety */
39		memory_set_bank(machine(), "bank1", data & 0x03);
	39	membank("bank1")->set_entry(data & 0x03);
40	40	}
41	41
42	42	READ8_MEMBER(flkatck_state::flkatck_ls138_r)
r14976	r14977
195	195	static MACHINE_START( flkatck )
196	196	{
197	197	flkatck_state *state = machine.driver_data<flkatck_state>();
198		UINT8 *ROM = machine.region("maincpu")->base();
	198	UINT8 *ROM = state->memregion("maincpu")->base();
199	199
200		memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x10000], 0x2000);
	200	state->membank("bank1")->configure_entries(0, 3, &ROM[0x10000], 0x2000);
201	201
202	202	state->m_audiocpu = machine.device("audiocpu");
203	203	state->m_k007121 = machine.device("k007121");

src/mame/drivers/contra.c

r14976	r14977
34	34
35	35	WRITE8_MEMBER(contra_state::contra_bankswitch_w)
36	36	{
37		memory_set_bank(machine(), "bank1", data & 0x0f);
	37	membank("bank1")->set_entry(data & 0x0f);
38	38	}
39	39
40	40	WRITE8_MEMBER(contra_state::contra_sh_irqtrigger_w)
r14976	r14977
178	178	static MACHINE_START( contra )
179	179	{
180	180	contra_state *state = machine.driver_data<contra_state>();
181		UINT8 *ROM = machine.region("maincpu")->base();
	181	UINT8 *ROM = state->memregion("maincpu")->base();
182	182
183		memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x2000);
	183	state->membank("bank1")->configure_entries(0, 16, &ROM[0x10000], 0x2000);
184	184
185	185	state->m_audiocpu = machine.device("audiocpu");
186	186	state->m_k007121_1 = machine.device("k007121_1");

src/mame/drivers/zn.c

r14976	r14977
684	684
685	685	WRITE32_MEMBER(zn_state::bank_coh1000c_w)
686	686	{
687		memory_set_bankptr( machine(), "bank2", machine().region( "user2" )->base() + 0x400000 + ( data * 0x400000 ) );
	687	membank( "bank2" )->set_base( memregion( "user2" )->base() + 0x400000 + ( data * 0x400000 ) );
688	688	}
689	689
690	690	WRITE8_MEMBER(zn_state::qsound_bankswitch_w)
691	691	{
692		memory_set_bankptr( machine(), "bank10", machine().region( "audiocpu" )->base() + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) );
	692	membank( "bank10" )->set_base( memregion( "audiocpu" )->base() + 0x10000 + ( ( data & 0x0f ) * 0x4000 ) );
693	693	}
694	694
695	695	static INTERRUPT_GEN( qsound_interrupt )
r14976	r14977
728	728
729	729	static MACHINE_RESET( coh1000c )
730	730	{
731		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* fixed game rom */
732		memory_set_bankptr( machine, "bank2", machine.region( "user2" )->base() + 0x400000 ); /* banked game rom */
733		memory_set_bankptr( machine, "bank3", machine.region( "user3" )->base() ); /* country rom */
	731	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* fixed game rom */
	732	machine.root_device().membank( "bank2" )->set_base( machine.root_device().memregion( "user2" )->base() + 0x400000 ); /* banked game rom */
	733	machine.root_device().membank( "bank3" )->set_base( machine.root_device().memregion( "user3" )->base() ); /* country rom */
734	734	zn_machine_init(machine);
735	735	}
736	736
r14976	r14977
918	918
919	919	WRITE32_MEMBER(zn_state::bank_coh3002c_w)
920	920	{
921		memory_set_bankptr( machine(), "bank2", machine().region( "user2" )->base() + 0x400000 + ( data * 0x400000 ) );
	921	membank( "bank2" )->set_base( memregion( "user2" )->base() + 0x400000 + ( data * 0x400000 ) );
922	922	}
923	923
924	924	static DRIVER_INIT( coh3002c )
r14976	r14977
937	937
938	938	static MACHINE_RESET( coh3002c )
939	939	{
940		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* fixed game rom */
941		memory_set_bankptr( machine, "bank2", machine.region( "user2" )->base() + 0x400000 ); /* banked game rom */
942		memory_set_bankptr( machine, "bank3", machine.region( "user3" )->base() ); /* country rom */
	940	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* fixed game rom */
	941	machine.root_device().membank( "bank2" )->set_base( machine.root_device().memregion( "user2" )->base() + 0x400000 ); /* banked game rom */
	942	machine.root_device().membank( "bank3" )->set_base( machine.root_device().memregion( "user3" )->base() ); /* country rom */
943	943	zn_machine_init(machine);
944	944	}
945	945
r14976	r14977
1180	1180	device_t *mb3773 = machine().device("mb3773");
1181	1181	mb3773_set_ck(mb3773, (data & 0x20) >> 5);
1182	1182	verboselog( machine(), 1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
1183		memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) );
	1183	membank( "bank1" )->set_base( memregion( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) );
1184	1184	}
1185	1185
1186	1186	WRITE8_MEMBER(zn_state::fx1a_sound_bankswitch_w)
1187	1187	{
1188		memory_set_bankptr( machine(), "bank10", machine().region( "audiocpu" )->base() + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) );
	1188	membank( "bank10" )->set_base( memregion( "audiocpu" )->base() + 0x10000 + ( ( ( data - 1 ) & 0x07 ) * 0x4000 ) );
1189	1189	}
1190	1190
1191	1191	READ32_MEMBER(zn_state::taitofx1a_ymsound_r)
r14976	r14977
1225	1225	static MACHINE_RESET( coh1000ta )
1226	1226	{
1227	1227	zn_state *state = machine.driver_data<zn_state>();
1228		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* banked game rom */
1229		memory_set_bankptr( machine, "bank2", state->m_taitofx1_eeprom1 );
	1228	state->membank( "bank1" )->set_base( state->memregion( "user2" )->base() ); /* banked game rom */
	1229	state->membank( "bank2" )->set_base( state->m_taitofx1_eeprom1 );
1230	1230	zn_machine_init(machine);
1231	1231	}
1232	1232
r14976	r14977
1320	1320	{
1321	1321	zn_state *state = machine.driver_data<zn_state>();
1322	1322
1323		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* banked game rom */
1324		memory_set_bankptr( machine, "bank2", state->m_taitofx1_eeprom1 );
1325		memory_set_bankptr( machine, "bank3", state->m_taitofx1_eeprom2 );
	1323	state->membank( "bank1" )->set_base( state->memregion( "user2" )->base() ); /* banked game rom */
	1324	state->membank( "bank2" )->set_base( state->m_taitofx1_eeprom1 );
	1325	state->membank( "bank3" )->set_base( state->m_taitofx1_eeprom2 );
1326	1326	zn_machine_init(machine);
1327	1327	}
1328	1328
r14976	r14977
1505	1505
1506	1506	static MACHINE_RESET( coh1000w )
1507	1507	{
1508		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* fixed game rom */
	1508	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* fixed game rom */
1509	1509	zn_machine_init(machine);
1510	1510
1511	1511	devtag_reset(machine, "ide");
r14976	r14977
1670	1670	{
1671	1671	znsecsel_w( space, offset, data, mem_mask );
1672	1672
1673		memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) );
	1673	membank( "bank1" )->set_base( memregion( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) );
1674	1674	}
1675	1675
1676	1676	WRITE32_MEMBER(zn_state::coh1002e_latch_w)
r14976	r14977
1693	1693
1694	1694	static MACHINE_RESET( coh1002e )
1695	1695	{
1696		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* banked game rom */
	1696	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* banked game rom */
1697	1697	zn_machine_init(machine);
1698	1698	}
1699	1699
r14976	r14977
1784	1784	{
1785	1785	if (ACCESSING_BITS_0_15)
1786	1786	{
1787		memory_set_bankptr( machine(), "bank2", machine().region( "user2" )->base() + ( ( data & 0xf ) * 0x400000 ) );
	1787	membank( "bank2" )->set_base( memregion( "user2" )->base() + ( ( data & 0xf ) * 0x400000 ) );
1788	1788	}
1789	1789	else if (ACCESSING_BITS_16_31)
1790	1790	{
r14976	r14977
1839	1839
1840	1840	static MACHINE_RESET( bam2 )
1841	1841	{
1842		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* fixed game rom */
1843		memory_set_bankptr( machine, "bank2", machine.region( "user2" )->base() + 0x400000 ); /* banked game rom */
	1842	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* fixed game rom */
	1843	machine.root_device().membank( "bank2" )->set_base( machine.root_device().memregion( "user2" )->base() + 0x400000 ); /* banked game rom */
1844	1844
1845	1845	zn_machine_init(machine);
1846	1846	}
r14976	r14977
2158	2158	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler     ( 0x1fbfff08, 0x1fbfff0b, read32_delegate(FUNC(zn_state::nbajamex_08_r),state));
2159	2159	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler( 0x1fbfff80, 0x1fbfff83, read32_delegate(FUNC(zn_state::nbajamex_80_r),state), write32_delegate(FUNC(zn_state::nbajamex_80_w),state));
2160	2160
2161		memory_set_bankptr( machine, "bank2", state->m_nbajamex_eeprom ); /* ram/eeprom/?? */
	2161	state->membank( "bank2" )->set_base( state->m_nbajamex_eeprom ); /* ram/eeprom/?? */
2162	2162	}
2163	2163
2164	2164	if( ( !strcmp( machine.system().name, "jdredd" ) ) ||
r14976	r14977
2176	2176
2177	2177	static MACHINE_RESET( coh1000a )
2178	2178	{
2179		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* fixed game rom */
	2179	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* fixed game rom */
2180	2180	zn_machine_init(machine);
2181	2181	if( ( !strcmp( machine.system().name, "jdredd" ) ) ||
2182	2182	( !strcmp( machine.system().name, "jdreddb" ) ) )
r14976	r14977
2318	2318
2319	2319	WRITE32_MEMBER(zn_state::coh1001l_bnk_w)
2320	2320	{
2321		memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ( ( ( data >> 16 ) & 3 ) * 0x800000 ) );
	2321	membank( "bank1" )->set_base( memregion( "user2" )->base() + ( ( ( data >> 16 ) & 3 ) * 0x800000 ) );
2322	2322	}
2323	2323
2324	2324	static DRIVER_INIT( coh1001l )
r14976	r14977
2332	2332
2333	2333	static MACHINE_RESET( coh1001l )
2334	2334	{
2335		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* banked rom */
	2335	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* banked rom */
2336	2336	zn_machine_init(machine);
2337	2337	}
2338	2338
r14976	r14977
2361	2361
2362	2362	WRITE32_MEMBER(zn_state::coh1002v_bnk_w)
2363	2363	{
2364		memory_set_bankptr( machine(), "bank2", machine().region( "user3" )->base() + ( data * 0x100000 ) );
	2364	membank( "bank2" )->set_base( memregion( "user3" )->base() + ( data * 0x100000 ) );
2365	2365	}
2366	2366
2367	2367	static DRIVER_INIT( coh1002v )
r14976	r14977
2376	2376
2377	2377	static MACHINE_RESET( coh1002v )
2378	2378	{
2379		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() ); /* fixed game rom */
2380		memory_set_bankptr( machine, "bank2", machine.region( "user3" )->base() ); /* banked rom */
	2379	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() ); /* fixed game rom */
	2380	machine.root_device().membank( "bank2" )->set_base( machine.root_device().memregion( "user3" )->base() ); /* banked rom */
2381	2381	zn_machine_init(machine);
2382	2382	}
2383	2383
r14976	r14977
2546	2546	WRITE32_MEMBER(zn_state::coh1002m_bank_w)
2547	2547	{
2548	2548	verboselog( machine(), 1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
2549		memory_set_bankptr( machine(), "bank1", machine().region( "user2" )->base() + ((data>>16) * 0x800000) );
	2549	membank( "bank1" )->set_base( memregion( "user2" )->base() + ((data>>16) * 0x800000) );
2550	2550	}
2551	2551
2552	2552	READ32_MEMBER(zn_state::cbaj_z80_r)
r14976	r14977
2580	2580
2581	2581	static MACHINE_RESET( coh1002m )
2582	2582	{
2583		memory_set_bankptr( machine, "bank1", machine.region( "user2" )->base() );
	2583	machine.root_device().membank( "bank1" )->set_base( machine.root_device().memregion( "user2" )->base() );
2584	2584	zn_machine_init(machine);
2585	2585	}
2586	2586

src/mame/drivers/paradise.c

r14976	r14977
47	47	WRITE8_MEMBER(paradise_state::paradise_rombank_w)
48	48	{
49	49	int bank = data;
50		int bank_n = machine().region("maincpu")->bytes() / 0x4000 - 1;
	50	int bank_n = memregion("maincpu")->bytes() / 0x4000 - 1;
51	51
52	52	if (bank >= bank_n)
53	53	{
r14976	r14977
55	55	bank %= bank_n;
56	56	}
57	57
58		memory_set_bank(machine(), "bank1", bank);
	58	membank("bank1")->set_entry(bank);
59	59	}
60	60
61	61	static WRITE8_DEVICE_HANDLER( paradise_okibank_w )
r14976	r14977
629	629	static MACHINE_START( paradise )
630	630	{
631	631	paradise_state *state = machine.driver_data<paradise_state>();
632		int bank_n = machine.region("maincpu")->bytes() / 0x4000 - 1;
633		UINT8 *ROM = machine.region("maincpu")->base();
	632	int bank_n = machine.root_device().memregion("maincpu")->bytes() / 0x4000 - 1;
	633	UINT8 *ROM = state->memregion("maincpu")->base();
634	634
635		memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x00000], 0x4000);
636		memory_configure_bank(machine, "bank1", 3, bank_n - 3, &ROM[0x10000], 0x4000);
	635	state->membank("bank1")->configure_entries(0, 3, &ROM[0x00000], 0x4000);
	636	state->membank("bank1")->configure_entries(3, bank_n - 3, &ROM[0x10000], 0x4000);
637	637
638	638	state->save_item(NAME(state->m_palbank));
639	639	state->save_item(NAME(state->m_priority));

src/mame/drivers/balsente.c

r14976	r14977
2079	2079
2080	2080	UINT8 *temp = auto_alloc_array(machine, UINT8, 0x20000);
2081	2081	{
2082		UINT8 *rom = machine.region("maincpu")->base();
2083		UINT32 len = machine.region("maincpu")->bytes();
	2082	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	2083	UINT32 len = machine.root_device().memregion("maincpu")->bytes();
2084	2084	UINT32 base;
2085	2085
2086	2086	for (base = 0x10000; base < len; base += 0x30000)
r14976	r14977
2154	2154	static DRIVER_INIT( triviag1 ) { expand_roms(machine, EXPAND_ALL);  config_shooter_adc(machine, FALSE, 0 /* noanalog */); }
2155	2155	static DRIVER_INIT( triviag2 )
2156	2156	{
2157		UINT8 *rom = machine.region("maincpu")->base();
	2157	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2158	2158	memcpy(&rom[0x20000], &rom[0x28000], 0x4000);
2159	2159	memcpy(&rom[0x24000], &rom[0x28000], 0x4000);
2160	2160	expand_roms(machine, EXPAND_NONE); config_shooter_adc(machine, FALSE, 0 /* noanalog */);

src/mame/drivers/galpani3.c

r14976	r14977
400	400
401	401	state->m_sprite_bitmap_1.fill(0x0000, cliprect);
402	402
403		state->m_spritegen->skns_draw_sprites(screen.machine(), state->m_sprite_bitmap_1, cliprect, &state->m_spriteram32[0], 0x4000, screen.machine().region("gfx1")->base(), screen.machine().region ("gfx1")->bytes(), state->m_spc_regs );
	403	state->m_spritegen->skns_draw_sprites(screen.machine(), state->m_sprite_bitmap_1, cliprect, &state->m_spriteram32[0], 0x4000, screen.machine().root_device().memregion("gfx1")->base(), screen.machine().root_device().memregion ("gfx1")->bytes(), state->m_spc_regs );
404	404
405	405	// ignoring priority bits for now..
406	406	for (y=0;y<240;y++)
r14976	r14977
748	748	{
749	749
750	750	UINT32 address = m_regs1_address_regs[1]| (m_regs1_address_regs[0]<<16);
751		UINT8* rledata = machine().region("gfx2")->base();
	751	UINT8* rledata = memregion("gfx2")->base();
752	752
753	753	printf("galpani3_regs1_go_w? %08x\n",address );
754	754	if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, m_framebuffer1, rledata);
r14976	r14977
766	766	{
767	767
768	768	UINT32 address = m_regs2_address_regs[1]| (m_regs2_address_regs[0]<<16);
769		UINT8* rledata = machine().region("gfx2")->base();
	769	UINT8* rledata = memregion("gfx2")->base();
770	770
771	771	printf("galpani3_regs2_go_w? %08x\n", address );
772	772
r14976	r14977
788	788	{
789	789
790	790	UINT32 address =  m_regs3_address_regs[1]| (m_regs3_address_regs[0]<<16);
791		UINT8* rledata = machine().region("gfx2")->base();
	791	UINT8* rledata = memregion("gfx2")->base();
792	792
793	793	printf("galpani3_regs3_go_w? %08x\n",address );
794	794

src/mame/drivers/itgambl2.c

r14976	r14977
86	86	{
87	87	itgambl2_state *state = screen.machine().driver_data<itgambl2_state>();
88	88	int x,y,count;
89		const UINT8 *blit_ram = screen.machine().region("gfx1")->base();
	89	const UINT8 *blit_ram = state->memregion("gfx1")->base();
90	90
91	91	if(screen.machine().input().code_pressed(KEYCODE_Z))
92	92	state->m_test_x++;

src/mame/drivers/fitfight.c

r14976	r14977
1002	1002
1003	1003	static DRIVER_INIT( fitfight )
1004	1004	{
1005		//  UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	1005	//  UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1006	1006	//  mem16[0x0165B2/2] = 0x4e71; // for now so it boots
1007	1007	fitfight_state *state = machine.driver_data<fitfight_state>();
1008	1008	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x700000, 0x700001, read16_delegate(FUNC(fitfight_state::fitfight_700000_r),state));
r14976	r14977
1011	1011
1012	1012	static DRIVER_INIT( histryma )
1013	1013	{
1014		//  UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
	1014	//  UINT16 *mem16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1015	1015	//  mem16[0x017FDC/2] = 0x4e71; // for now so it boots
1016	1016	fitfight_state *state = machine.driver_data<fitfight_state>();
1017	1017	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x700000, 0x700001, read16_delegate(FUNC(fitfight_state::histryma_700000_r),state));

src/mame/drivers/ddribble.c

r14976	r14977
35	35
36	36	WRITE8_MEMBER(ddribble_state::ddribble_bankswitch_w)
37	37	{
38		memory_set_bank(machine(), "bank1", data & 0x0f);
	38	membank("bank1")->set_entry(data & 0x0f);
39	39	}
40	40
41	41
r14976	r14977
82	82	static WRITE8_DEVICE_HANDLER( ddribble_vlm5030_ctrl_w )
83	83	{
84	84	ddribble_state *state = device->machine().driver_data<ddribble_state>();
85		UINT8 *SPEECH_ROM = device->machine().region("vlm")->base();
	85	UINT8 *SPEECH_ROM = state->memregion("vlm")->base();
86	86
87	87	/* b7 : vlm data bus OE   */
88	88
r14976	r14977
247	247	static MACHINE_START( ddribble )
248	248	{
249	249	ddribble_state *state = machine.driver_data<ddribble_state>();
250		UINT8 *ROM = machine.region("maincpu")->base();
251		memory_configure_bank(machine, "bank1", 0, 5, &ROM[0x10000], 0x2000);
	250	UINT8 *ROM = state->memregion("maincpu")->base();
	251	state->membank("bank1")->configure_entries(0, 5, &ROM[0x10000], 0x2000);
252	252
253	253	state->m_filter1 = machine.device("filter1");
254	254	state->m_filter2 = machine.device("filter2");

src/mame/drivers/malzak.c

r14976	r14977
153	153	//  Bit 6 is used only in Malzak II, and is set high after checking
154	154	//        the selected version
155	155	//  logerror("S2650 [0x%04x]: port 0x40 write: 0x%02x\n", cpu_get_pc(machine().device("maincpu")), data);
156		memory_set_bank(machine(), "bank1", (data & 0x40) >> 6);
	156	membank("bank1")->set_entry((data & 0x40) >> 6);
157	157	}
158	158
159	159	WRITE8_MEMBER(malzak_state::port60_w)
r14976	r14977
370	370	{
371	371	malzak_state *state = machine.driver_data<malzak_state>();
372	372
373		memory_configure_bank(machine, "bank1", 0, 2, machine.region("user2")->base(), 0x400);
	373	state->membank("bank1")->configure_entries(0, 2, state->memregion("user2")->base(), 0x400);
374	374
375	375	state->m_s2636_0 = machine.device("s2636_0");
376	376	state->m_s2636_1 = machine.device("s2636_1");

src/mame/drivers/deco32.c

r14976	r14977
3246	3246	extern void process_dvi_data(UINT8* dvi_data, int offset, int regionsize);
3247	3247	static DRIVER_INIT( dragngun )
3248	3248	{
3249		UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
3250		const UINT8 *SRC_RAM = machine.region("gfx1")->base();
3251		UINT8 *DST_RAM = machine.region("gfx2")->base();
	3249	UINT32 *ROM = (UINT32 *)machine.root_device().memregion("maincpu")->base();
	3250	const UINT8 *SRC_RAM = machine.root_device().memregion("gfx1")->base();
	3251	UINT8 *DST_RAM = machine.root_device().memregion("gfx2")->base();
3252	3252
3253	3253	deco74_decrypt_gfx(machine, "gfx1");
3254	3254	deco74_decrypt_gfx(machine, "gfx2");
r14976	r14977
3261	3261
3262	3262	#if 0
3263	3263	{
3264		UINT8 *ROM = machine.region("dvi")->base();
	3264	UINT8 *ROM = machine.root_device().memregion("dvi")->base();
3265	3265
3266	3266	FILE *fp;
3267	3267	char filename[256];
r14976	r14977
3276	3276	#endif
3277	3277
3278	3278	// there are DVI headers at 0x000000, 0x580000, 0x800000, 0xB10000, 0xB80000
3279		process_dvi_data(machine.region("dvi")->base(),0x000000, 0x1000000);
3280		process_dvi_data(machine.region("dvi")->base(),0x580000, 0x1000000);
3281		process_dvi_data(machine.region("dvi")->base(),0x800000, 0x1000000);
3282		process_dvi_data(machine.region("dvi")->base(),0xB10000, 0x1000000);
3283		process_dvi_data(machine.region("dvi")->base(),0xB80000, 0x1000000);
	3279	process_dvi_data(machine.root_device().memregion("dvi")->base(),0x000000, 0x1000000);
	3280	process_dvi_data(machine.root_device().memregion("dvi")->base(),0x580000, 0x1000000);
	3281	process_dvi_data(machine.root_device().memregion("dvi")->base(),0x800000, 0x1000000);
	3282	process_dvi_data(machine.root_device().memregion("dvi")->base(),0xB10000, 0x1000000);
	3283	process_dvi_data(machine.root_device().memregion("dvi")->base(),0xB80000, 0x1000000);
3284	3284
3285	3285	}
3286	3286
r14976	r14977
3294	3294
3295	3295	static DRIVER_INIT( lockload )
3296	3296	{
3297		UINT8 *RAM = machine.region("maincpu")->base();
3298		//  UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
	3297	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	3298	//  UINT32 *ROM = (UINT32 *)machine.root_device().memregion("maincpu")->base();
3299	3299
3300	3300	deco74_decrypt_gfx(machine, "gfx1");
3301	3301	deco74_decrypt_gfx(machine, "gfx2");
r14976	r14977
3311	3311
3312	3312	static DRIVER_INIT( tattass )
3313	3313	{
3314		UINT8 *RAM = machine.region("gfx1")->base();
	3314	UINT8 *RAM = machine.root_device().memregion("gfx1")->base();
3315	3315	UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
3316	3316
3317	3317	/* Reorder bitplanes to make decoding easier */
r14976	r14977
3319	3319	memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3320	3320	memcpy(RAM+0x100000,tmp,0x80000);
3321	3321
3322		RAM = machine.region("gfx2")->base();
	3322	RAM = machine.root_device().memregion("gfx2")->base();
3323	3323	memcpy(tmp,RAM+0x80000,0x80000);
3324	3324	memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3325	3325	memcpy(RAM+0x100000,tmp,0x80000);
r14976	r14977
3332	3332
3333	3333	static DRIVER_INIT( nslasher )
3334	3334	{
3335		UINT8 *RAM = machine.region("gfx1")->base();
	3335	UINT8 *RAM = machine.root_device().memregion("gfx1")->base();
3336	3336	UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
3337	3337
3338	3338	/* Reorder bitplanes to make decoding easier */
r14976	r14977
3340	3340	memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3341	3341	memcpy(RAM+0x100000,tmp,0x80000);
3342	3342
3343		RAM = machine.region("gfx2")->base();
	3343	RAM = machine.root_device().memregion("gfx2")->base();
3344	3344	memcpy(tmp,RAM+0x80000,0x80000);
3345	3345	memcpy(RAM+0x80000,RAM+0x100000,0x80000);
3346	3346	memcpy(RAM+0x100000,tmp,0x80000);

src/mame/drivers/midzeus.c

r14976	r14977
92	92
93	93	static MACHINE_RESET( midzeus )
94	94	{
95		memcpy(ram_base, machine.region("user1")->base(), 0x40000*4);
	95	memcpy(ram_base, machine.root_device().memregion("user1")->base(), 0x40000*4);
96	96	*ram_base <<= 1;
97	97	machine.device("maincpu")->reset();
98	98
r14976	r14977
268	268
269	269	/* ROM bank selection on Zeus 2 */
270	270	case 5:
271		memory_set_bank(machine(), "bank1", bitlatch[offset] & 3);
	271	membank("bank1")->set_entry(bitlatch[offset] & 3);
272	272	break;
273	273
274	274	/* unknown purpose; crusnexo/thegrid write 1 at startup */
r14976	r14977
1441	1441	{
1442	1442	dcs2_init(machine, 0, 0);
1443	1443	midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 472/* or 476,477,478,110 */, 99, NULL);
1444		memory_configure_bank(machine, "bank1", 0, 3, machine.region("user2")->base(), 0x400000*4);
	1444	machine.root_device().membank("bank1")->configure_entries(0, 3, machine.root_device().memregion("user2")->base(), 0x400000*4);
1445	1445	midzeus_state *state = machine.driver_data<midzeus_state>();
1446	1446	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x9b0004, 0x9b0007, read32_delegate(FUNC(midzeus_state::crusnexo_leds_r),state), write32_delegate(FUNC(midzeus_state::crusnexo_leds_w),state));
1447	1447	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler    (0x8d0009, 0x8d000a, write32_delegate(FUNC(midzeus_state::keypad_select_w),state));
r14976	r14977
1452	1452	{
1453	1453	dcs2_init(machine, 0, 0);
1454	1454	midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 474/* or 491 */, 99, NULL);
1455		memory_configure_bank(machine, "bank1", 0, 3, machine.region("user2")->base(), 0x400000*4);
	1455	machine.root_device().membank("bank1")->configure_entries(0, 3, machine.root_device().memregion("user2")->base(), 0x400000*4);
1456	1456	}
1457	1457
1458	1458

src/mame/drivers/argus.c

r14976	r14977
176	176
177	177	WRITE8_MEMBER(argus_state::argus_bankselect_w)
178	178	{
179		UINT8 *RAM = machine().region("maincpu")->base();
	179	UINT8 *RAM = memregion("maincpu")->base();
180	180	int bankaddress;
181	181
182	182	bankaddress = 0x10000 + ((data & 7) * 0x4000);
183		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress]);    /* Select 8 banks of 16k */
	183	membank("bank1")->set_base(&RAM[bankaddress]);    /* Select 8 banks of 16k */
184	184	}
185	185
186	186

src/mame/drivers/drw80pkr.c

r14976	r14977
116	116	{
117	117	m_active_bank = m_active_bank ^ 0x01;
118	118
119		memory_set_bank(machine(), "bank1", m_active_bank);
	119	membank("bank1")->set_entry(m_active_bank);
120	120	}
121	121	}
122	122
r14976	r14977
347	347
348	348	static PALETTE_INIT( drw80pkr )
349	349	{
350		const UINT8 *color_prom = machine.region("proms")->base();
	350	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
351	351	int j;
352	352
353	353	for (j = 0; j < machine.total_colors(); j++)
r14976	r14977
405	405
406	406	static DRIVER_INIT( drw80pkr )
407	407	{
408		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base(), 0x1000);
	408	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base(), 0x1000);
409	409	}
410	410
411	411

src/mame/drivers/superdq.c

r14976	r14977
82	82
83	83	static PALETTE_INIT( superdq )
84	84	{
85		const UINT8 *color_prom = machine.region("proms")->base();
	85	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
86	86	int i;
87	87	static const int resistances[3] = { 820, 390, 200 };
88	88	double rweights[3], gweights[3], bweights[2];

src/mame/drivers/zaxxon.c

r14976	r14977
1430	1430
1431	1431	int A;
1432	1432	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
1433		UINT8 *rom = machine.region(cputag)->base();
1434		int size = machine.region(cputag)->bytes();
	1433	UINT8 *rom = machine.root_device().memregion(cputag)->base();
	1434	int size = machine.root_device().memregion(cputag)->bytes();
1435	1435	UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
1436	1436
1437	1437	space->set_decrypted_region(0x0000, size - 1, decrypt);

src/mame/drivers/shangkid.c

r14976	r14977
58	58
59	59	WRITE8_MEMBER(shangkid_state::shangkid_maincpu_bank_w)
60	60	{
61		memory_set_bank(machine(), "bank1", data & 1);
	61	membank("bank1")->set_entry(data & 1);
62	62	}
63	63
64	64	WRITE8_MEMBER(shangkid_state::shangkid_bbx_enable_w)
r14976	r14977
104	104	cputag_set_input_line(device->machine(), "audiocpu", 0, HOLD_LINE );
105	105	}
106	106	else
107		memory_set_bank(device->machine(), "bank2", data ? 0 : 1);
	107	state->membank("bank2")->set_entry(data ? 0 : 1);
108	108	}
109	109
110	110	static WRITE8_DEVICE_HANDLER( ay8910_portb_w )
r14976	r14977
134	134	state->m_gfx_type = 1;
135	135
136	136	/* set up banking */
137		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x8000, 0x8000);
138		memory_configure_bank(machine, "bank2", 0, 2, machine.region("audiocpu")->base() + 0x0000, 0x10000);
	137	state->membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x8000, 0x8000);
	138	state->membank("bank2")->configure_entries(0, 2, state->memregion("audiocpu")->base() + 0x0000, 0x10000);
139	139	}
140	140
141	141	/***************************************************************************************/
r14976	r14977
149	149	{
150	150	cputag_set_input_line(machine, "bbx", INPUT_LINE_HALT, 1 );
151	151
152		memory_set_bank(machine, "bank1", 0);
153		memory_set_bank(machine, "bank2", 0);
	152	machine.root_device().membank("bank1")->set_entry(0);
	153	machine.root_device().membank("bank2")->set_entry(0);
154	154	}
155	155
156	156	/***************************************************************************************/

src/mame/drivers/norautp.c

r14976	r14977
3395	3395	*/
3396	3396	//static DRIVER_INIT( norautrh )
3397	3397	//{
3398		//  UINT8 *ROM = machine.region("maincpu")->base();
	3398	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3399	3399	//  ROM[0x1110] = 0x00;
3400	3400	//  ROM[0x1111] = 0x00;
3401	3401	//}
3402	3402
3403	3403	//static DRIVER_INIT( norautpn )
3404	3404	//{
3405		//  UINT8 *ROM = machine.region("maincpu")->base();
	3405	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3406	3406	//  ROM[0x0827] = 0x00;
3407	3407	//  ROM[0x0828] = 0x00;
3408	3408	//}
3409	3409
3410	3410	//static DRIVER_INIT( norautu )
3411	3411	//{
3412		//  UINT8 *ROM = machine.region("maincpu")->base();
	3412	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3413	3413	//  ROM[0x083c] = 0x00;
3414	3414	//  ROM[0x083d] = 0x00;
3415	3415	//  ROM[0x083e] = 0x00;
r14976	r14977
3417	3417
3418	3418	//static DRIVER_INIT( gtipoker )
3419	3419	//{
3420		//  UINT8 *ROM = machine.region("maincpu")->base();
	3420	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3421	3421	//  ROM[0x0cc6] = 0x00;
3422	3422	//  ROM[0x0cc7] = 0x00;
3423	3423	//  ROM[0x0cc8] = 0x00;
r14976	r14977
3428	3428
3429	3429	//static DRIVER_INIT( dphl )
3430	3430	//{
3431		//  UINT8 *ROM = machine.region("maincpu")->base();
	3431	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3432	3432	//  ROM[0x1510] = 0x00;
3433	3433	//  ROM[0x1511] = 0x00;
3434	3434	//  ROM[0x1512] = 0x00;
r14976	r14977
3436	3436
3437	3437	//static DRIVER_INIT( dphla )
3438	3438	//{
3439		//  UINT8 *ROM = machine.region("maincpu")->base();
	3439	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3440	3440	//  ROM[0x0b09] = 0x00;
3441	3441	//  ROM[0x0b0a] = 0x00;
3442	3442	//  ROM[0x0b0b] = 0x00;
r14976	r14977
3446	3446	{
3447	3447	/* Attempt to decrypt the program ROM */
3448	3448
3449		//  UINT8 *rom = machine.region("maincpu")->base();
	3449	//  UINT8 *rom = machine.root_device().memregion("maincpu")->base();
3450	3450	//  UINT8 *buffer;
3451		//  int size = 0x2000; //machine.region("maincpu")->bytes();
	3451	//  int size = 0x2000; //machine.root_device().memregion("maincpu")->bytes();
3452	3452	//  int start = 0;
3453	3453	//  int i;
3454	3454
r14976	r14977
3485	3485	/* Just for debugging purposes */
3486	3486	/*   Should be removed soon    */
3487	3487	{
3488		UINT8 *ROM = machine.region("maincpu")->base();
	3488	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3489	3489	ROM[0x02f7] = 0xca;
3490	3490	ROM[0x02f8] = 0x18;
3491	3491	ROM[0x206c] = 0xff;
r14976	r14977
3495	3495	/* Passing the video PPI handshaking lines */
3496	3496	/* Just for debugging purposes */
3497	3497	{
3498		//  UINT8 *ROM = machine.region("maincpu")->base();
	3498	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
3499	3499
3500	3500	//  ROM[0x073b] = 0x00;
3501	3501	//  ROM[0x073c] = 0x00;

src/mame/drivers/acesp.c

r14976	r14977
1237	1237
1238	1238	DRIVER_INIT( ace_cr )
1239	1239	{
1240		descramble_crystal(machine.region( "maincpu" )->base(), 0x0000, 0x10000, 0x00);
	1240	descramble_crystal(machine.root_device().memregion( "maincpu" )->base(), 0x0000, 0x10000, 0x00);
1241	1241	}
1242	1242
1243	1243	DRIVER_INIT( ace_sp )

src/mame/drivers/fastfred.c

r14976	r14977
142	142
143	143	WRITE8_MEMBER(fastfred_state::imago_sprites_dma_w)
144	144	{
145		UINT8 *rom = (UINT8 *)machine().region("gfx2")->base();
	145	UINT8 *rom = (UINT8 *)machine().root_device().memregion("gfx2")->base();
146	146	UINT8 sprites_data;
147	147
148	148	sprites_data = rom[m_imago_sprites_address + 0x2000*0 + m_imago_sprites_bank * 0x1000];

src/mame/drivers/karnov.c

r14976	r14977
1153	1153	static DRIVER_INIT( chelnov )
1154	1154	{
1155	1155	karnov_state *state = machine.driver_data<karnov_state>();
1156		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	1156	UINT16 *RAM = (UINT16 *)state->memregion("maincpu")->base();
1157	1157
1158	1158	state->m_microcontroller_id = CHELNOV;
1159	1159	state->m_coin_mask = 0xe0;
r14976	r14977
1164	1164	static DRIVER_INIT( chelnovu )
1165	1165	{
1166	1166	karnov_state *state = machine.driver_data<karnov_state>();
1167		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	1167	UINT16 *RAM = (UINT16 *)state->memregion("maincpu")->base();
1168	1168
1169	1169	state->m_microcontroller_id = CHELNOVU;
1170	1170	state->m_coin_mask = 0xe0;
r14976	r14977
1175	1175	static DRIVER_INIT( chelnovj )
1176	1176	{
1177	1177	karnov_state *state = machine.driver_data<karnov_state>();
1178		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	1178	UINT16 *RAM = (UINT16 *)state->memregion("maincpu")->base();
1179	1179
1180	1180	state->m_microcontroller_id = CHELNOVJ;
1181	1181	state->m_coin_mask = 0xe0;

src/mame/drivers/lwings.c

r14976	r14977
77	77	flip_screen_set(~data & 0x01);
78	78
79	79	/* bits 1 and 2 select ROM bank */
80		memory_set_bank(machine(), "bank1", (data & 0x06) >> 1);
	80	membank("bank1")->set_entry((data & 0x06) >> 1);
81	81
82	82	/* bit 3 enables NMI */
83	83	m_nmi_mask = data & 8;
r14976	r14977
748	748	static MACHINE_START( lwings )
749	749	{
750	750	lwings_state *state = machine.driver_data<lwings_state>();
751		UINT8 *ROM = machine.region("maincpu")->base();
	751	UINT8 *ROM = state->memregion("maincpu")->base();
752	752
753		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	753	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
754	754
755	755	state->save_item(NAME(state->m_bg2_image));
756	756	state->save_item(NAME(state->m_scroll_x));

src/mame/drivers/maxaflex.c

r14976	r14977
503	503
504	504	static DRIVER_INIT( a600xl )
505	505	{
506		UINT8 *rom = machine.region("maincpu")->base();
	506	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
507	507	memcpy( rom + 0x5000, rom + 0xd000, 0x800 );
508	508	}
509	509

src/mame/drivers/atvtrack.c

r14976	r14977
60	60	#include "cpu/sh4/sh4.h"
61	61	#include "debugger.h"
62	62
63		const memory_region *nandregion;
	63	memory_region *nandregion;
64	64	int nandcommand[4], nandoffset[4], nandaddressstep, nandaddress[4];
65	65	UINT32 area1_data[4];
66	66
r14976	r14977
326	326	address_space *as;
327	327
328	328	nandaddressstep = 0;
329		nandregion = machine.region("maincpu");
	329	nandregion = machine.root_device().memregion("maincpu");
330	330	as = machine.device("maincpu")->memory().space(AS_PROGRAM);
331	331	dst = (UINT8 *)(as->get_write_ptr(0x0c7f0000));
332	332	src = nandregion->base()+0x10;

src/mame/drivers/cclimber.c

r14976	r14977
248	248	m_toprollr_rombank |= (data & 1) << offset;
249	249
250	250	if (m_toprollr_rombank < 3)
251		memory_set_bank(machine(), "bank1", m_toprollr_rombank);
	251	membank("bank1")->set_entry(m_toprollr_rombank);
252	252	}
253	253
254	254	static MACHINE_RESET( cclimber )

src/mame/drivers/xorworld.c

r14976	r14977
223	223	/*  patch some strange protection (without this, strange characters appear
224	224	after level 5 and some pieces don't rotate properly some times) */
225	225
226		UINT16 *rom = (UINT16 *)(machine.region("maincpu")->base() + 0x1390);
	226	UINT16 *rom = (UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x1390);
227	227
228	228	PATCH(0x4239); PATCH(0x00ff); PATCH(0xe196);   /* clr.b $ffe196 */
229	229	PATCH(0x4239); PATCH(0x00ff); PATCH(0xe197);   /* clr.b $ffe197 */

src/mame/drivers/forte2.c

r14976	r14977
144	144	static DRIVER_INIT(pesadelo)
145	145	{
146	146	int i;
147		UINT8 *mem = machine.region("maincpu")->base();
148		int memsize = machine.region("maincpu")->bytes();
	147	UINT8 *mem = machine.root_device().memregion("maincpu")->base();
	148	int memsize = machine.root_device().memregion("maincpu")->bytes();
149	149	UINT8 *buf;
150	150
151	151	// data swap

src/mame/drivers/aliens.c

r14976	r14977
230	230	static MACHINE_START( aliens )
231	231	{
232	232	aliens_state *state = machine.driver_data<aliens_state>();
233		UINT8 *ROM = machine.region("maincpu")->base();
	233	UINT8 *ROM = state->memregion("maincpu")->base();
234	234
235		memory_configure_bank(machine, "bank1", 0, 20, &ROM[0x10000], 0x2000);
236		memory_set_bank(machine, "bank1", 0);
	235	state->membank("bank1")->configure_entries(0, 20, &ROM[0x10000], 0x2000);
	236	state->membank("bank1")->set_entry(0);
237	237
238	238	state->m_maincpu = machine.device("maincpu");
239	239	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
545	545	bank -= 4;
546	546
547	547	bank += (lines & 0x0f);
548		memory_set_bank(device->machine(), "bank1", bank);
	548	device->machine().root_device().membank("bank1")->set_entry(bank);
549	549	}
550	550
551	551	GAME( 1990, aliens,   0,      aliens, aliens, 0, ROT0, "Konami", "Aliens (World set 1)", GAME_SUPPORTS_SAVE )

src/mame/drivers/88games.c

r14976	r14977
266	266	static KONAMI_SETLINES_CALLBACK( k88games_banking )
267	267	{
268	268	_88games_state *state = device->machine().driver_data<_88games_state>();
269		UINT8 *RAM = device->machine().region("maincpu")->base();
	269	UINT8 *RAM = state->memregion("maincpu")->base();
270	270	int offs;
271	271
272	272	logerror("%04x: bank select %02x\n", cpu_get_pc(device), lines);
r14976	r14977
330	330	_88games_state *state = machine.driver_data<_88games_state>();
331	331
332	332	konami_configure_set_lines(machine.device("maincpu"), k88games_banking);
333		state->m_generic_paletteram_8.set_target(&machine.region("maincpu")->base()[0x20000], 0x1000);
	333	state->m_generic_paletteram_8.set_target(&state->memregion("maincpu")->base()[0x20000], 0x1000);
334	334
335	335	state->m_videobank = 0;
336	336	state->m_zoomreadroms = 0;

src/mame/drivers/ddenlovr.c

r14976	r14977
430	430	static int blit_draw( running_machine &machine, int src, int sx )
431	431	{
432	432	dynax_state *state = machine.driver_data<dynax_state>();
433		UINT8 *src_data = machine.region("blitter")->base();
434		int src_len = machine.region("blitter")->bytes();
	433	UINT8 *src_data = machine.root_device().memregion("blitter")->base();
	434	int src_len = state->memregion("blitter")->bytes();
435	435	int bit_addr = (src & 0xffffff) * state->m_ddenlovr_blit_rom_bits;   /* convert to bit address */
436	436	int pen_size, arg_size, cmd;
437	437	int x;
r14976	r14977
1235	1235
1236	1236	READ8_MEMBER(dynax_state::rongrong_gfxrom_r)
1237	1237	{
1238		UINT8 *rom  = machine().region("blitter")->base();
1239		size_t size = machine().region("blitter")->bytes();
	1238	UINT8 *rom  = memregion("blitter")->base();
	1239	size_t size = memregion("blitter")->bytes();
1240	1240	int address = m_ddenlovr_blit_address;
1241	1241
1242	1242	if (address >= size)
r14976	r14977
1309	1309
1310	1310	#if 0
1311	1311	static int base = 0x0;
1312		const UINT8 *gfx = screen.machine().region("blitter")->base();
	1312	const UINT8 *gfx = screen.machine().root_device().memregion("blitter")->base();
1313	1313	int next;
1314	1314	memset(state->m_ddenlovr_pixmap[0], 0, 512 * 512);
1315	1315	memset(state->m_ddenlovr_pixmap[1], 0, 512 * 512);
r14976	r14977
1985	1985	//logerror("%04x: rongrong_select_w %02x\n",cpu_get_pc(&space.device()),data);
1986	1986
1987	1987	/* bits 0-4 = **both** ROM bank **AND** input select */
1988		memory_set_bank(machine(), "bank1", data & 0x1f);
	1988	membank("bank1")->set_entry(data & 0x1f);
1989	1989	m_dsw_sel = data;
1990	1990
1991	1991	/* bits 5-7 = RAM bank */
1992		memory_set_bank(machine(), "bank2", ((data & 0xe0) >> 5));
	1992	membank("bank2")->set_entry(((data & 0xe0) >> 5));
1993	1993	}
1994	1994
1995	1995
r14976	r14977
2083	2083
2084	2084	WRITE8_MEMBER(dynax_state::mmpanic_rombank_w)
2085	2085	{
2086		memory_set_bank(machine(), "bank1", data & 0x7);
	2086	membank("bank1")->set_entry(data & 0x7);
2087	2087	/* Bit 4? */
2088	2088	}
2089	2089
r14976	r14977
2244	2244
2245	2245	m_dsw_sel = data;
2246	2246
2247		memory_set_bank(machine(), "bank1", data & 0x0f);
	2247	membank("bank1")->set_entry(data & 0x0f);
2248	2248	// bit 4 selects palette ram at 8000?
2249		memory_set_bank(machine(), "bank2", ((data & 0xe0) >> 5));
	2249	membank("bank2")->set_entry(((data & 0xe0) >> 5));
2250	2250	}
2251	2251
2252	2252	READ8_MEMBER(dynax_state::funkyfig_dsw_r)
r14976	r14977
2352	2352
2353	2353	WRITE8_MEMBER(dynax_state::hanakanz_rombank_w)
2354	2354	{
2355		memory_set_bank(machine(), "bank1", data & 0x0f);
2356		memory_set_bank(machine(), "bank2", ((data & 0xf0) >> 4));
	2355	membank("bank1")->set_entry(data & 0x0f);
	2356	membank("bank2")->set_entry(((data & 0xf0) >> 4));
2357	2357	}
2358	2358
2359	2359	static ADDRESS_MAP_START( hanakanz_map, AS_PROGRAM, 8, dynax_state )
r14976	r14977
2407	2407
2408	2408	READ8_MEMBER(dynax_state::hanakanz_gfxrom_r)
2409	2409	{
2410		UINT8 *rom  = machine().region("blitter")->base();
2411		size_t size = machine().region("blitter")->bytes();
	2410	UINT8 *rom  = memregion("blitter")->base();
	2411	size_t size = memregion("blitter")->bytes();
2412	2412	int address = (m_ddenlovr_blit_address & 0xffffff) * 2;
2413	2413
2414	2414	if (address >= size)
r14976	r14977
2585	2585	static void mjchuuka_get_romdata(running_machine &machine)
2586	2586	{
2587	2587	dynax_state *state = machine.driver_data<dynax_state>();
2588		UINT8 *rom = machine.region("blitter")->base();
2589		size_t size = machine.region("blitter")->bytes();
	2588	UINT8 *rom = machine.root_device().memregion("blitter")->base();
	2589	size_t size = state->memregion("blitter")->bytes();
2590	2590	int address = (state->m_ddenlovr_blit_address & 0xffffff) * 2;
2591	2591
2592	2592	if (address >= size)
r14976	r14977
2699	2699
2700	2700	WRITE8_MEMBER(dynax_state::mjmyster_rambank_w)
2701	2701	{
2702		memory_set_bank(machine(), "bank2", data & 0x07);
	2702	membank("bank2")->set_entry(data & 0x07);
2703	2703	//logerror("%04x: rambank = %02x\n", cpu_get_pc(&space.device()), data);
2704	2704	}
2705	2705
r14976	r14977
2813	2813
2814	2814	WRITE8_MEMBER(dynax_state::hginga_rombank_w)
2815	2815	{
2816		memory_set_bank(machine(), "bank1", data & 0x7);
	2816	membank("bank1")->set_entry(data & 0x7);
2817	2817	m_hginga_rombank = data;
2818	2818	}
2819	2819
2820	2820	// similar to rongrong
2821	2821	READ8_MEMBER(dynax_state::hginga_protection_r)
2822	2822	{
2823		UINT8 *rom = machine().region("maincpu")->base();
	2823	UINT8 *rom = memregion("maincpu")->base();
2824	2824
2825	2825	if (m_hginga_rombank & 0x10)
2826	2826	return hanakanz_rand_r(space, 0);
r14976	r14977
3046	3046	// similar to rongrong
3047	3047	READ8_MEMBER(dynax_state::hgokou_protection_r)
3048	3048	{
3049		UINT8 *rom = machine().region("maincpu")->base();
	3049	UINT8 *rom = memregion("maincpu")->base();
3050	3050
3051	3051	if (m_hginga_rombank == 0)
3052	3052	return hanakanz_rand_r(space, 0);
r14976	r14977
3158	3158	m_dsw_sel = data;
3159	3159	m_keyb = 0;
3160	3160
3161		memory_set_bank(machine(), "bank1", data & 0x07);
3162		memory_set_bank(machine(), "bank2", ((data & 0xe0) >> 5));
	3161	membank("bank1")->set_entry(data & 0x07);
	3162	membank("bank2")->set_entry(((data & 0xe0) >> 5));
3163	3163	}
3164	3164
3165	3165
r14976	r14977
3383	3383
3384	3384	WRITE8_MEMBER(dynax_state::mjflove_rombank_w)
3385	3385	{
3386		memory_set_bank(machine(), "bank1", data & 0xf);
	3386	membank("bank1")->set_entry(data & 0xf);
3387	3387	}
3388	3388
3389	3389	static WRITE8_DEVICE_HANDLER( mjflove_okibank_w )
r14976	r14977
3556	3556
3557	3557	WRITE8_MEMBER(dynax_state::sryudens_rambank_w)
3558	3558	{
3559		memory_set_bank(machine(), "bank2", data & 0x0f);
	3559	membank("bank2")->set_entry(data & 0x0f);
3560	3560	//logerror("%04x: rambank = %02x\n", cpu_get_pc(&space.device()), data);
3561	3561	}
3562	3562
r14976	r14977
7613	7613
7614	7614	static MACHINE_START( rongrong )
7615	7615	{
7616		UINT8 *ROM = machine.region("maincpu")->base();
7617		memory_configure_bank(machine, "bank1", 0, 0x20, &ROM[0x010000], 0x8000);
7618		memory_configure_bank(machine, "bank2", 0, 8,    &ROM[0x110000], 0x1000);
	7616	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7617	machine.root_device().membank("bank1")->configure_entries(0, 0x20, &ROM[0x010000], 0x8000);
	7618	machine.root_device().membank("bank2")->configure_entries(0, 8,    &ROM[0x110000], 0x1000);
7619	7619
7620	7620	MACHINE_START_CALL(ddenlovr);
7621	7621	}
7622	7622
7623	7623	static MACHINE_START( mmpanic )
7624	7624	{
7625		UINT8 *ROM = machine.region("maincpu")->base();
7626		memory_configure_bank(machine, "bank1", 0, 8,    &ROM[0x10000], 0x8000);
	7625	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7626	machine.root_device().membank("bank1")->configure_entries(0, 8,    &ROM[0x10000], 0x8000);
7627	7627
7628	7628	MACHINE_START_CALL(ddenlovr);
7629	7629	}
7630	7630
7631	7631	static MACHINE_START( funkyfig )
7632	7632	{
7633		UINT8 *ROM = machine.region("maincpu")->base();
7634		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x10000], 0x8000);
7635		memory_configure_bank(machine, "bank2", 0, 8,    &ROM[0x90000], 0x1000);
	7633	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7634	machine.root_device().membank("bank1")->configure_entries(0, 0x10, &ROM[0x10000], 0x8000);
	7635	machine.root_device().membank("bank2")->configure_entries(0, 8,    &ROM[0x90000], 0x1000);
7636	7636
7637	7637	MACHINE_START_CALL(ddenlovr);
7638	7638	}
7639	7639
7640	7640	static MACHINE_START( hanakanz )
7641	7641	{
7642		UINT8 *ROM = machine.region("maincpu")->base();
7643		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x10000], 0x8000);
7644		memory_configure_bank(machine, "bank2", 0, 0x10, &ROM[0x90000], 0x1000);
	7642	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7643	machine.root_device().membank("bank1")->configure_entries(0, 0x10, &ROM[0x10000], 0x8000);
	7644	machine.root_device().membank("bank2")->configure_entries(0, 0x10, &ROM[0x90000], 0x1000);
7645	7645
7646	7646	MACHINE_START_CALL(ddenlovr);
7647	7647	}
7648	7648
7649	7649	static MACHINE_START( mjmyster )
7650	7650	{
7651		UINT8 *ROM = machine.region("maincpu")->base();
7652		memory_configure_bank(machine, "bank1", 0, 8,    &ROM[0x10000], 0x8000);
7653		memory_configure_bank(machine, "bank2", 0, 8,    &ROM[0x90000], 0x1000);
	7651	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7652	machine.root_device().membank("bank1")->configure_entries(0, 8,    &ROM[0x10000], 0x8000);
	7653	machine.root_device().membank("bank2")->configure_entries(0, 8,    &ROM[0x90000], 0x1000);
7654	7654
7655	7655	MACHINE_START_CALL(ddenlovr);
7656	7656	}
7657	7657
7658	7658	static MACHINE_START( hparadis )
7659	7659	{
7660		UINT8 *ROM = machine.region("maincpu")->base();
7661		memory_configure_bank(machine, "bank1", 0, 8,    &ROM[0x10000], 0x8000);
7662		memory_configure_bank(machine, "bank2", 0, 8,    &ROM[0x50000], 0x1000);
	7660	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7661	machine.root_device().membank("bank1")->configure_entries(0, 8,    &ROM[0x10000], 0x8000);
	7662	machine.root_device().membank("bank2")->configure_entries(0, 8,    &ROM[0x50000], 0x1000);
7663	7663
7664	7664	MACHINE_START_CALL(ddenlovr);
7665	7665	}
7666	7666
7667	7667	static MACHINE_START( mjflove )
7668	7668	{
7669		UINT8 *ROM = machine.region("maincpu")->base();
7670		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x10000], 0x8000);
7671		memory_configure_bank(machine, "bank2", 0, 8,    &ROM[0x90000], 0x1000);
	7669	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7670	machine.root_device().membank("bank1")->configure_entries(0, 0x10, &ROM[0x10000], 0x8000);
	7671	machine.root_device().membank("bank2")->configure_entries(0, 8,    &ROM[0x90000], 0x1000);
7672	7672
7673	7673	MACHINE_START_CALL(ddenlovr);
7674	7674	}
7675	7675
7676	7676	static MACHINE_START( sryudens )
7677	7677	{
7678		UINT8 *ROM = machine.region("maincpu")->base();
7679		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x10000], 0x8000);
7680		memory_configure_bank(machine, "bank2", 0, 0x10, &ROM[0x90000], 0x1000);
	7678	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	7679	machine.root_device().membank("bank1")->configure_entries(0, 0x10, &ROM[0x10000], 0x8000);
	7680	machine.root_device().membank("bank2")->configure_entries(0, 0x10, &ROM[0x90000], 0x1000);
7681	7681
7682	7682	MACHINE_START_CALL(ddenlovr);
7683	7683	}

src/mame/drivers/chinagat.c

r14976	r14977
180	180
181	181	static WRITE8_HANDLER( chinagat_bankswitch_w )
182	182	{
183		memory_set_bank(space->machine(), "bank1", data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
	183	space->machine().root_device().membank("bank1")->set_entry(data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
184	184	}
185	185
186	186	static WRITE8_HANDLER( chinagat_sub_bankswitch_w )
187	187	{
188		memory_set_bank(space->machine(), "bank4", data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
	188	space->machine().root_device().membank("bank4")->set_entry(data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
189	189	}
190	190
191	191	static READ8_HANDLER( saiyugoub1_mcu_command_r )
r14976	r14977
224	224	ddragon_state *state = device->machine().driver_data<ddragon_state>();
225	225
226	226	/* i8748 Port 2 write */
227		UINT8 *saiyugoub1_adpcm_rom = device->machine().region("adpcm")->base();
	227	UINT8 *saiyugoub1_adpcm_rom = state->memregion("adpcm")->base();
228	228
229	229	if (data & 0x80)   /* Reset m5205 and disable ADPCM ROM outputs */
230	230	{
r14976	r14977
531	531	state->m_snd_cpu = machine.device("audiocpu");
532	532
533	533	/* configure banks */
534		memory_configure_bank(machine, "bank1", 0, 8, machine.region("maincpu")->base() + 0x10000, 0x4000);
	534	state->membank("bank1")->configure_entries(0, 8, state->memregion("maincpu")->base() + 0x10000, 0x4000);
535	535
536	536	/* register for save states */
537	537	state->save_item(NAME(state->m_scrollx_hi));
r14976	r14977
912	912	static DRIVER_INIT( chinagat )
913	913	{
914	914	ddragon_state *state = machine.driver_data<ddragon_state>();
915		UINT8 *MAIN = machine.region("maincpu")->base();
916		UINT8 *SUB = machine.region("sub")->base();
	915	UINT8 *MAIN = machine.root_device().memregion("maincpu")->base();
	916	UINT8 *SUB = state->memregion("sub")->base();
917	917
918	918	state->m_technos_video_hw = 1;
919	919	state->m_sprite_irq = M6809_IRQ_LINE;
920	920	state->m_sound_irq = INPUT_LINE_NMI;
921	921
922		memory_configure_bank(machine, "bank1", 0, 6, &MAIN[0x10000], 0x4000);
923		memory_configure_bank(machine, "bank4", 0, 6, &SUB[0x10000], 0x4000);
	922	state->membank("bank1")->configure_entries(0, 6, &MAIN[0x10000], 0x4000);
	923	state->membank("bank4")->configure_entries(0, 6, &SUB[0x10000], 0x4000);
924	924	}
925	925
926	926

src/mame/drivers/kaneko16.c

r14976	r14977
807	807	static void kaneko16_common_oki_bank_w( running_machine& machine, const char *bankname, const char* tag, int bank, size_t fixedsize, size_t bankedsize )
808	808	{
809	809	UINT32 bankaddr;
810		UINT8* samples = machine.region(tag)->base();
811		size_t length = machine.region(tag)->bytes();
	810	UINT8* samples = machine.root_device().memregion(tag)->base();
	811	size_t length = machine.root_device().memregion(tag)->bytes();
812	812
813	813	bankaddr = fixedsize + (bankedsize * bank);
814	814
815	815	if (bankaddr <= (length-bankedsize))
816	816	{
817		memory_set_bankptr(machine, bankname, samples + bankaddr);
	817	machine.root_device().membank(bankname)->set_base(samples + bankaddr);
818	818	}
819	819	}
820	820
r14976	r14977
2235	2235	*/
2236	2236	static void kaneko16_unscramble_tiles(running_machine &machine, const char *region)
2237	2237	{
2238		UINT8 *RAM   =   machine.region(region)->base();
2239		int size         =   machine.region(region)->bytes();
	2238	UINT8 *RAM   =   machine.root_device().memregion(region)->base();
	2239	int size         =   machine.root_device().memregion(region)->bytes();
2240	2240	int i;
2241	2241
2242	2242	if (RAM == NULL)   return;
r14976	r14977
2261	2261	int bank;
2262	2262	UINT8 *src0;
2263	2263
2264		if (machine.region(region)->bytes() < 0x40000 * 16)
	2264	if (machine.root_device().memregion(region)->bytes() < 0x40000 * 16)
2265	2265	fatalerror("gtmr SOUND1 region too small");
2266	2266
2267	2267	/* bank 0 maps to itself, so we just leave it alone */
2268		src0 = machine.region(region)->base();
	2268	src0 = machine.root_device().memregion(region)->base();
2269	2269	for (bank = 15; bank > 0; bank--)
2270	2270	{
2271	2271	UINT8 *srcn = src0 + 0x10000 * (bank < 3 ? 3 : bank);

src/mame/drivers/cybertnk.c

r14976	r14977
294	294	/* non-tile based spriteram (BARE-BONES, looks pretty complex) */
295	295	if(1)
296	296	{
297		const UINT8 *blit_ram = screen.machine().region("spr_gfx")->base();
	297	const UINT8 *blit_ram = screen.machine().root_device().memregion("spr_gfx")->base();
298	298	int offs,x,y,z,xsize,ysize,yi,xi,col_bank,fx,zoom;
299	299	UINT32 spr_offs,spr_offs_helper;
300	300	int xf,yf,xz,yz;
r14976	r14977
426	426	if(0) //sprite gfx debug viewer
427	427	{
428	428	int x,y,count;
429		const UINT8 *blit_ram = screen.machine().region("spr_gfx")->base();
	429	const UINT8 *blit_ram = screen.machine().root_device().memregion("spr_gfx")->base();
430	430
431	431	if(screen.machine().input().code_pressed(KEYCODE_Z))
432	432	state->m_test_x++;
r14976	r14977
1014	1014	UINT8* road_data;
1015	1015	int i;
1016	1016
1017		road_data = machine.region("road_data")->base();
	1017	road_data = machine.root_device().memregion("road_data")->base();
1018	1018	for (i=0;i < 0x40000;i++)
1019	1019	{
1020	1020	road_data[i] = BITSWAP8(road_data[i],3,2,1,0,7,6,5,4);

src/mame/drivers/namcos10.c

r14976	r14977
339	339
340	340	READ32_MEMBER(namcos10_state::range_r)
341	341	{
342		UINT32 data32 = ((const UINT32 *)(machine().region("user1")->base()))[offset+bank_base];
	342	UINT32 data32 = ((const UINT32 *)(machine().root_device().memregion("user1")->base()))[offset+bank_base];
343	343
344	344	UINT16 d16;
345	345	if(ACCESSING_BITS_16_31)
r14976	r14977
491	491	static void memn_driver_init( running_machine &machine )
492	492	{
493	493	namcos10_state *state = machine.driver_data<namcos10_state>();
494		UINT8 *BIOS = (UINT8 *)machine.region( "user1" )->base();
495		state->nand_base = (UINT8 *)machine.region( "user2" )->base();
	494	UINT8 *BIOS = (UINT8 *)machine.root_device().memregion( "user1" )->base();
	495	state->nand_base = (UINT8 *)state->memregion( "user2" )->base();
496	496
497	497	state->nand_copy( (UINT32 *)( BIOS + 0x0000000 ), 0x08000, 0x001c000 );
498	498	state->nand_copy( (UINT32 *)( BIOS + 0x0020000 ), 0x24000, 0x03e0000 );
r14976	r14977
503	503	static void decrypt_bios( running_machine &machine, const char *regionName, int start, int b15, int b14, int b13, int b12, int b11, int b10, int b9, int b8,
504	504	int b7, int b6, int b5, int b4, int b3, int b2, int b1, int b0 )
505	505	{
506		const memory_region *region = machine.region( regionName );
	506	memory_region *region = machine.root_device().memregion( regionName );
507	507	UINT16 *BIOS = (UINT16 *)( region->base() + start );
508	508	int len = (region->bytes()-start)/2;
509	509

src/mame/drivers/wc90.c

r14976	r14977
83	83	WRITE8_MEMBER(wc90_state::wc90_bankswitch_w)
84	84	{
85	85	int bankaddress;
86		UINT8 *RAM = machine().region("maincpu")->base();
	86	UINT8 *RAM = memregion("maincpu")->base();
87	87
88	88
89	89	bankaddress = 0x10000 + ( ( data & 0xf8 ) << 8 );
90		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress] );
	90	membank("bank1")->set_base(&RAM[bankaddress] );
91	91	}
92	92
93	93	WRITE8_MEMBER(wc90_state::wc90_bankswitch1_w)
94	94	{
95	95	int bankaddress;
96		UINT8 *RAM = machine().region("sub")->base();
	96	UINT8 *RAM = memregion("sub")->base();
97	97
98	98
99	99	bankaddress = 0x10000 + ( ( data & 0xf8 ) << 8 );
100		memory_set_bankptr(machine(), "bank2", &RAM[bankaddress] );
	100	membank("bank2")->set_base(&RAM[bankaddress] );
101	101	}
102	102
103	103	WRITE8_MEMBER(wc90_state::wc90_sound_command_w)

src/mame/drivers/gauntlet.c

r14976	r14977
1621	1621	static void gauntlet_common_init(running_machine &machine, int slapstic, int vindctr2)
1622	1622	{
1623	1623	gauntlet_state *state = machine.driver_data<gauntlet_state>();
1624		UINT8 *rom = machine.region("maincpu")->base();
	1624	UINT8 *rom = state->memregion("maincpu")->base();
1625	1625	state->m_eeprom_default = NULL;
1626	1626	atarigen_slapstic_init(machine.device("maincpu"), 0x038000, 0, slapstic);
1627	1627
r14976	r14977
1657	1657
1658	1658	static DRIVER_INIT( vindctr2 )
1659	1659	{
1660		UINT8 *gfx2_base = machine.region("gfx2")->base();
	1660	UINT8 *gfx2_base = machine.root_device().memregion("gfx2")->base();
1661	1661	UINT8 *data = auto_alloc_array(machine, UINT8, 0x8000);
1662	1662	int i;
1663	1663

src/mame/drivers/ms32.c

r14976	r14977
1352	1352
1353	1353	WRITE8_MEMBER(ms32_state::ms32_snd_bank_w)
1354	1354	{
1355		memory_set_bank(machine(), "bank4", (data >> 0) & 0x0F);
1356		memory_set_bank(machine(), "bank5", (data >> 4) & 0x0F);
	1355	membank("bank4")->set_entry((data >> 0) & 0x0F);
	1356	membank("bank5")->set_entry((data >> 4) & 0x0F);
1357	1357	}
1358	1358
1359	1359	WRITE8_MEMBER(ms32_state::to_main_w)
r14976	r14977
1381	1381
1382	1382	static MACHINE_RESET( ms32 )
1383	1383	{
1384		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base());
1385		memory_set_bank(machine, "bank4", 0);
1386		memory_set_bank(machine, "bank5", 1);
	1384	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
	1385	machine.root_device().membank("bank4")->set_entry(0);
	1386	machine.root_device().membank("bank5")->set_entry(1);
1387	1387	irq_init(machine);
1388	1388	}
1389	1389
r14976	r14977
2202	2202	{
2203	2203	ms32_state *state = machine.driver_data<ms32_state>();
2204	2204	state_save_register_global(machine, state->m_to_main);
2205		memory_configure_bank(machine, "bank4", 0, 16, machine.region("audiocpu")->base() + 0x14000, 0x4000);
2206		memory_configure_bank(machine, "bank5", 0, 16, machine.region("audiocpu")->base() + 0x14000, 0x4000);
	2205	state->membank("bank4")->configure_entries(0, 16, machine.root_device().memregion("audiocpu")->base() + 0x14000, 0x4000);
	2206	state->membank("bank5")->configure_entries(0, 16, state->memregion("audiocpu")->base() + 0x14000, 0x4000);
2207	2207	}
2208	2208
2209	2209	static DRIVER_INIT( ms32_common )
r14976	r14977
2262	2262	static DRIVER_INIT (f1superb)
2263	2263	{
2264	2264	#if 0 // we shouldn't need this hack, something else is wrong, and the x offsets are never copied either, v70 problems??
2265		UINT32 *pROM = (UINT32 *)machine.region("maincpu")->base();
	2265	UINT32 *pROM = (UINT32 *)machine.root_device().memregion("maincpu")->base();
2266	2266	pROM[0x19d04/4]=0x167a021a; // bne->br  : sprite Y offset table is always copied to RAM
2267	2267	#endif
2268	2268	DRIVER_INIT_CALL(ss92046_01);

src/mame/drivers/mpu4.c

r14976	r14977
464	464
465	465	/* init rom bank, some games don't set this, and will assume bank 0,set 0 */
466	466	{
467		UINT8 *rom = machine.region("maincpu")->base();
	467	UINT8 *rom = state->memregion("maincpu")->base();
468	468
469		memory_configure_bank(machine, "bank1", 0, 8, &rom[0x01000], 0x10000);
	469	state->membank("bank1")->configure_entries(0, 8, &rom[0x01000], 0x10000);
470	470
471		memory_set_bank(machine, "bank1", 0);
	471	state->membank("bank1")->set_entry(0);
472	472	machine.device("maincpu")->reset();
473	473	}
474	474	}
r14976	r14977
522	522	//  printf("bank %02x\n", data);
523	523
524	524	m_pageval = (data & 0x03);
525		memory_set_bank(machine(), "bank1", (m_pageval + (m_pageset ? 4 : 0)) & 0x07);
	525	membank("bank1")->set_entry((m_pageval + (m_pageset ? 4 : 0)) & 0x07);
526	526	}
527	527
528	528
529	529	READ8_MEMBER(mpu4_state::bankswitch_r)
530	530	{
531		return machine().memory().bank("bank1")->entry();
	531	return membank("bank1")->entry();
532	532	}
533	533
534	534
535	535	WRITE8_MEMBER(mpu4_state::bankset_w)
536	536	{
537	537	m_pageval = (data - 2);//writes 2 and 3, to represent 0 and 1 - a hangover from the half page design?
538		memory_set_bank(machine(), "bank1", (m_pageval + (m_pageset ? 4 : 0)) & 0x07);
	538	membank("bank1")->set_entry((m_pageval + (m_pageset ? 4 : 0)) & 0x07);
539	539	}
540	540
541	541
r14976	r14977
1560	1560	if (mstate->m_bwb_bank)
1561	1561	{
1562	1562	mstate->m_pageval = state;
1563		memory_set_bank(device->machine(), "bank1", (mstate->m_pageval + (mstate->m_pageset ? 4 : 0)) & 0x07);
	1563	mstate->membank("bank1")->set_entry((mstate->m_pageval + (mstate->m_pageset ? 4 : 0)) & 0x07);
1564	1564	}
1565	1565	}
1566	1566
r14976	r14977
15233	15233	DRIVER_INIT( crystal )
15234	15234	{
15235	15235	DRIVER_INIT_CALL(m_frkstn);
15236		descramble_crystal(machine.region( "maincpu" )->base(), 0x0000, 0x10000, 0x00);
	15236	descramble_crystal(machine.root_device().memregion( "maincpu" )->base(), 0x0000, 0x10000, 0x00);
15237	15237	}
15238	15238
15239	15239	DRIVER_INIT( crystali )
15240	15240	{
15241	15241	DRIVER_INIT_CALL(m_frkstn);
15242		descramble_crystal(machine.region( "maincpu" )->base(), 0x0000, 0x10000, 0xff); // invert after decrypt?!
	15242	descramble_crystal(machine.root_device().memregion( "maincpu" )->base(), 0x0000, 0x10000, 0xff); // invert after decrypt?!
15243	15243	}
15244	15244
15245	15245

src/mame/drivers/darkseal.c

r14976	r14977
471	471
472	472	static DRIVER_INIT( darkseal )
473	473	{
474		UINT8 *RAM = machine.region("maincpu")->base();
	474	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
475	475	int i;
476	476
477	477	for (i=0x00000; i<0x80000; i++)

src/mame/drivers/mcr3.c

r14976	r14977
1388	1388
1389	1389	ROM_REGION( 0x01000, "gfx3", 0 )
1390	1390	ROM_LOAD( "cpu_alph.10g", 0x00000, 0x1000, CRC(936dc87f) SHA1(cdf73bea82481fbc300ec5a1fbbe8d662007c56b) )
1391
1392		ROM_REGION( 0x0020, "proms", 0 )
1393		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1394	1391	ROM_END
1395	1392
1396	1393
r14976	r14977
1431	1428
1432	1429	ROM_REGION( 0x01000, "gfx3", 0 )
1433	1430	ROM_LOAD( "sh_mb_1.bin",  0x00000, 0x0800, CRC(5c74c9f0) SHA1(e42789d14e5510d1dcf4a30f6bd40a40ab46f7f3) )
1434
1435		ROM_REGION( 0x0020, "proms", 0 )
1436		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1437	1431	ROM_END
1438	1432
1439	1433
r14976	r14977
1469	1463
1470	1464	ROM_REGION( 0x01000, "gfx3", 0 )
1471	1465	ROM_LOAD( "crcpu.10g",    0x00000, 0x1000, CRC(6fe53c8d) SHA1(ceb04916af42d58f3173e5986756a0db8be11999) )
1472
1473		ROM_REGION( 0x0020, "proms", 0 )
1474		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1475	1466	ROM_END
1476	1467
1477	1468
r14976	r14977
1511	1502
1512	1503	ROM_REGION( 0x01000, "gfx3", 0 )
1513	1504	ROM_LOAD( "ttan.bin",     0x00000, 0x1000, CRC(aa0b1471) SHA1(e3dd69f1a14926c6b709d6b19d9e90a1f0867465) )
1514
1515		ROM_REGION( 0x0020, "proms", 0 )
1516		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1517	1505	ROM_END
1518	1506
1519	1507

src/mame/drivers/pipeline.c

r14976	r14977
367	367	static PALETTE_INIT(pipeline)
368	368	{
369	369	int r,g,b,i,c;
370		UINT8 *prom1 = &machine.region("proms")->base()[0x000];
371		UINT8 *prom2 = &machine.region("proms")->base()[0x100];
	370	UINT8 *prom1 = &machine.root_device().memregion("proms")->base()[0x000];
	371	UINT8 *prom2 = &machine.root_device().memregion("proms")->base()[0x100];
372	372
373	373	for(i=0;i<0x100;i++)
374	374	{

src/mame/drivers/taito_b.c

r14976	r14977
193	193
194	194	WRITE8_MEMBER(taitob_state::bankswitch_w)
195	195	{
196		memory_set_bank(machine(), "bank1", (data - 1) & 3);
	196	membank("bank1")->set_entry((data - 1) & 3);
197	197	}
198	198
199	199	static TIMER_CALLBACK( rsaga2_interrupt2 )
r14976	r14977
2794	2794	#if 0
2795	2795	static void ryujin_patch(void)
2796	2796	{
2797		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	2797	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
2798	2798	rom[ 0x62/2 ] = 1;
2799	2799	//0 (already in rom) - Taito Corporation 1993
2800	2800	//1 - Taito America corp with blue FBI logo
r14976	r14977
2849	2849	#if 0
2850	2850	static void sbm_patch(void)
2851	2851	{
2852		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	2852	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
2853	2853	rom[ 0x7ffff/2 ] = 2; //US version
2854	2854	}
2855	2855	#endif
r14976	r14977
3707	3707
3708	3708	static DRIVER_INIT( taito_b )
3709	3709	{
3710		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	3710	machine.root_device().membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
3711	3711	}
3712	3712
3713	3713	GAME( 1989, masterw,  0,       masterw,  masterw,  taito_b, ROT270, "Taito Corporation Japan", "Master of Weapon (World)", GAME_SUPPORTS_SAVE )

src/mame/drivers/kungfur.c

r14976	r14977
191	191	static void kfr_adpcm1_int(device_t *device)
192	192	{
193	193	kungfur_state *state = device->machine().driver_data<kungfur_state>();
194		UINT8 *ROM = device->machine().region("adpcm1")->base();
	194	UINT8 *ROM = state->memregion("adpcm1")->base();
195	195	UINT8 data = ROM[state->m_adpcm_pos[0] & 0x1ffff];
196	196
197	197	msm5205_data_w(device, state->m_adpcm_sel[0] ? data & 0xf : data >> 4 & 0xf);
r14976	r14977
202	202	static void kfr_adpcm2_int(device_t *device)
203	203	{
204	204	kungfur_state *state = device->machine().driver_data<kungfur_state>();
205		UINT8 *ROM = device->machine().region("adpcm2")->base();
	205	UINT8 *ROM = state->memregion("adpcm2")->base();
206	206	UINT8 data = ROM[state->m_adpcm_pos[1] & 0x3ffff];
207	207
208	208	msm5205_data_w(device, state->m_adpcm_sel[1] ? data & 0xf : data >> 4 & 0xf);

src/mame/drivers/viper.c

r14976	r14977
1929	1929	/* configure fast RAM regions for DRC */
1930	1930	ppcdrc_add_fastram(machine.device("maincpu"), 0x00000000, 0x00ffffff, FALSE, workram);
1931	1931
1932		ds2430_rom = (UINT8*)machine.region("ds2430")->base();
	1932	ds2430_rom = (UINT8*)machine.root_device().memregion("ds2430")->base();
1933	1933	}
1934	1934
1935	1935	static MACHINE_RESET(viper)

src/mame/drivers/jackal.c

r14976	r14977
114	114
115	115	WRITE8_MEMBER(jackal_state::jackal_rambank_w)
116	116	{
117		UINT8 *rgn = machine().region("master")->base();
	117	UINT8 *rgn = memregion("master")->base();
118	118
119	119	if (data & 0x04)
120	120	popmessage("jackal_rambank_w %02x", data);
r14976	r14977
124	124
125	125	m_spritebank = &rgn[((data & 0x08) << 13)];
126	126	m_rambank = &rgn[((data & 0x10) << 12)];
127		memory_set_bank(machine(), "bank1", (data & 0x20) ? 1 : 0);
	127	membank("bank1")->set_entry((data & 0x20) ? 1 : 0);
128	128	}
129	129
130	130
r14976	r14977
328	328	static MACHINE_START( jackal )
329	329	{
330	330	jackal_state *state = machine.driver_data<jackal_state>();
331		UINT8 *ROM = machine.region("master")->base();
	331	UINT8 *ROM = state->memregion("master")->base();
332	332
333		memory_configure_bank(machine, "bank1", 0, 1, &ROM[0x04000], 0x8000);
334		memory_configure_bank(machine, "bank1", 1, 1, &ROM[0x14000], 0x8000);
335		memory_set_bank(machine, "bank1", 0);
	333	state->membank("bank1")->configure_entry(0, &ROM[0x04000]);
	334	state->membank("bank1")->configure_entry(1, &ROM[0x14000]);
	335	state->membank("bank1")->set_entry(0);
336	336
337	337	state->m_mastercpu = machine.device("master");
338	338	state->m_slavecpu = machine.device("slave");
r14976	r14977
343	343	static MACHINE_RESET( jackal )
344	344	{
345	345	jackal_state *state = machine.driver_data<jackal_state>();
346		UINT8 *rgn = machine.region("master")->base();
	346	UINT8 *rgn = state->memregion("master")->base();
347	347
348	348	// HACK: running at the nominal clock rate, music stops working
349	349	// at the beginning of the game. This fixes it.

src/mame/drivers/vaportra.c

r14976	r14977
855	855
856	856	static DRIVER_INIT( vaportra )
857	857	{
858		UINT8 *RAM = machine.region("maincpu")->base();
	858	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
859	859	int i;
860	860
861	861	for (i = 0x00000; i < 0x80000; i++)

src/mame/drivers/namcos86.c

r14976	r14977
184	184
185	185	WRITE8_MEMBER(namcos86_state::bankswitch1_w)
186	186	{
187		UINT8 *base = machine().region("cpu1")->base() + 0x10000;
	187	UINT8 *base = memregion("cpu1")->base() + 0x10000;
188	188
189	189	/* if the ROM expansion module is available, don't do anything. This avoids conflict */
190	190	/* with bankswitch1_ext_w() in wndrmomo */
191		if (machine().region("user1")->base()) return;
	191	if (machine().root_device().memregion("user1")->base()) return;
192	192
193		memory_set_bankptr(machine(), "bank1",base + ((data & 0x03) * 0x2000));
	193	membank("bank1")->set_base(base + ((data & 0x03) * 0x2000));
194	194	}
195	195
196	196	WRITE8_MEMBER(namcos86_state::bankswitch1_ext_w)
197	197	{
198		UINT8 *base = machine().region("user1")->base();
	198	UINT8 *base = memregion("user1")->base();
199	199
200	200	if (base == 0) return;
201	201
202		memory_set_bankptr(machine(), "bank1",base + ((data & 0x1f) * 0x2000));
	202	membank("bank1")->set_base(base + ((data & 0x1f) * 0x2000));
203	203	}
204	204
205	205	WRITE8_MEMBER(namcos86_state::bankswitch2_w)
206	206	{
207		UINT8 *base = machine().region("cpu2")->base() + 0x10000;
	207	UINT8 *base = memregion("cpu2")->base() + 0x10000;
208	208
209		memory_set_bankptr(machine(), "bank2",base + ((data & 0x03) * 0x2000));
	209	membank("bank2")->set_base(base + ((data & 0x03) * 0x2000));
210	210	}
211	211
212	212	/* Stubs to pass the correct Dip Switch setup to the MCU */
r14976	r14977
294	294	WRITE8_MEMBER(namcos86_state::cus115_w)
295	295	{
296	296	/* make sure the expansion board is present */
297		if (!machine().region("user1")->base())
	297	if (!machine().root_device().memregion("user1")->base())
298	298	{
299	299	popmessage("expansion board not present");
300	300	return;
r14976	r14977
324	324
325	325	static MACHINE_RESET( namco86 )
326	326	{
327		UINT8 *base = machine.region("cpu1")->base() + 0x10000;
	327	UINT8 *base = machine.root_device().memregion("cpu1")->base() + 0x10000;
328	328
329		memory_set_bankptr(machine, "bank1",base);
	329	machine.root_device().membank("bank1")->set_base(base);
330	330	}
331	331
332	332
r14976	r14977
1471	1471	UINT8 *buffer;
1472	1472
1473	1473	/* shuffle tile ROMs so regular gfx unpack routines can be used */
1474		gfx = machine.region("gfx1")->base();
1475		size = machine.region("gfx1")->bytes() * 2 / 3;
	1474	gfx = machine.root_device().memregion("gfx1")->base();
	1475	size = machine.root_device().memregion("gfx1")->bytes() * 2 / 3;
1476	1476	buffer = auto_alloc_array(machine, UINT8,  size );
1477	1477
1478	1478	{
r14976	r14977
1496	1496	auto_free( machine, buffer );
1497	1497	}
1498	1498
1499		gfx = machine.region("gfx2")->base();
1500		size = machine.region("gfx2")->bytes() * 2 / 3;
	1499	gfx = machine.root_device().memregion("gfx2")->base();
	1500	size = machine.root_device().memregion("gfx2")->bytes() * 2 / 3;
1501	1501	buffer = auto_alloc_array(machine, UINT8,  size );
1502	1502
1503	1503	{

src/mame/drivers/suna8.c

r14976	r14977
60	60
61	61	static DRIVER_INIT( hardhead )
62	62	{
63		UINT8 *rom = machine.region("maincpu")->base();
	63	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
64	64	int i;
65	65
66	66	for (i = 0; i < 0x8000; i++)
r14976	r14977
75	75	rom[i] = BITSWAP8(rom[i], 7,6,5,3,4,2,1,0) ^ 0x58;
76	76	}
77	77
78		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	78	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
79	79	}
80	80
81	81	/* Non encrypted bootleg */
82	82	static DRIVER_INIT( hardhedb )
83	83	{
84	84	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
85		space->set_decrypted_region(0x0000, 0x7fff, machine.region("maincpu")->base() + 0x48000);
86		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	85	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x48000);
	86	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
87	87	}
88	88
89	89	/***************************************************************************
r14976	r14977
95	95	static UINT8 *brickzn_decrypt(running_machine &machine)
96	96	{
97	97	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
98		UINT8   *RAM   =   machine.region("maincpu")->base();
99		size_t   size   =   machine.region("maincpu")->bytes();
	98	UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
	99	size_t   size   =   machine.root_device().memregion("maincpu")->bytes();
100	100	UINT8   *decrypt = auto_alloc_array(machine, UINT8, size);
101	101	int i;
102	102
r14976	r14977
137	137
138	138	static DRIVER_INIT( brickzn )
139	139	{
140		UINT8   *RAM   =   machine.region("maincpu")->base();
	140	UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
141	141	UINT8   *decrypt = brickzn_decrypt(machine);
142	142	int i;
143	143
r14976	r14977
162	162	decrypt[0x24b5] = 0x00;   // HALT -> NOP
163	163	decrypt[0x2583] = 0x00;   // HALT -> NOP
164	164
165		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
166		memory_configure_bank_decrypted(machine, "bank1", 0, 16, decrypt + 0x10000, 0x4000);
	165	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
	166	machine.root_device().membank("bank1")->configure_decrypted_entries(0, 16, decrypt + 0x10000, 0x4000);
167	167	}
168	168
169	169	static DRIVER_INIT( brickzn3 )
170	170	{
171		UINT8   *RAM   =   machine.region("maincpu")->base();
	171	UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
172	172	UINT8   *decrypt = brickzn_decrypt(machine);
173	173	int i;
174	174
r14976	r14977
193	193	decrypt[0x2487] = 0x00;   // HALT -> NOP
194	194	decrypt[0x256c] = 0x00;   // HALT -> NOP
195	195
196		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
197		memory_configure_bank_decrypted(machine, "bank1", 0, 16, decrypt + 0x10000, 0x4000);
	196	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
	197	machine.root_device().membank("bank1")->configure_decrypted_entries(0, 16, decrypt + 0x10000, 0x4000);
198	198	}
199	199
200	200
r14976	r14977
205	205	static DRIVER_INIT( hardhea2 )
206	206	{
207	207	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
208		UINT8   *RAM   =   machine.region("maincpu")->base();
209		size_t   size   =   machine.region("maincpu")->bytes();
	208	UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
	209	size_t   size   =   machine.root_device().memregion("maincpu")->bytes();
210	210	UINT8   *decrypt =   auto_alloc_array(machine, UINT8, size);
211	211	UINT8 x;
212	212	int i;
r14976	r14977
280	280	RAM[i] = BITSWAP8(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x41;
281	281	}
282	282
283		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
284		memory_configure_bank(machine, "bank2", 0, 2, auto_alloc_array(machine, UINT8, 0x2000 * 2), 0x2000);
	283	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
	284	machine.root_device().membank("bank2")->configure_entries(0, 2, auto_alloc_array(machine, UINT8, 0x2000 * 2), 0x2000);
285	285	}
286	286
287	287
r14976	r14977
292	292	static DRIVER_INIT( starfigh )
293	293	{
294	294	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
295		UINT8   *RAM   =   machine.region("maincpu")->base();
296		size_t   size   =   machine.region("maincpu")->bytes();
	295	UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
	296	size_t   size   =   machine.root_device().memregion("maincpu")->bytes();
297	297	UINT8   *decrypt =   auto_alloc_array(machine, UINT8, size);
298	298	UINT8 x;
299	299	int i;
r14976	r14977
349	349	RAM[i] = BITSWAP8(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x45;
350	350	}
351	351
352		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	352	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
353	353	}
354	354
355	355
r14976	r14977
360	360	static DRIVER_INIT( sparkman )
361	361	{
362	362	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
363		UINT8   *RAM   =   machine.region("maincpu")->base();
364		size_t   size   =   machine.region("maincpu")->bytes();
	363	UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
	364	size_t   size   =   machine.root_device().memregion("maincpu")->bytes();
365	365	UINT8   *decrypt =   auto_alloc_array(machine, UINT8, size);
366	366	UINT8 x;
367	367	int i;
r14976	r14977
417	417	RAM[i] = BITSWAP8(RAM[i], 5,6,7,4,3,2,1,0) ^ 0x44;
418	418	}
419	419
420		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	420	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
421	421	}
422	422
423	423	/***************************************************************************
r14976	r14977
490	490	int bank = data & 0x0f;
491	491
492	492	if (data & ~0xef)   logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(&space.device()),data);
493		memory_set_bank(machine(), "bank1", bank);
	493	membank("bank1")->set_entry(bank);
494	494	}
495	495
496	496
r14976	r14977
547	547
548	548	if (data & ~0xf7)   logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(&space.device()),data);
549	549
550		memory_set_bank(machine(), "bank1", bank);
	550	membank("bank1")->set_entry(bank);
551	551
552	552	flip_screen_set(data & 0x20);
553	553	coin_lockout_w ( machine(), 0,   data & 0x40);
r14976	r14977
651	651
652	652	if (data & ~0x0f)   logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(&space.device()),data);
653	653
654		memory_set_bank(machine(), "bank1", bank);
	654	membank("bank1")->set_entry(bank);
655	655	m_rombank = data;
656	656	}
657	657
r14976	r14977
727	727
728	728	if (data & ~0x0f)   logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(&space.device()),data);
729	729
730		memory_set_bank(machine(), "bank1", bank);
	730	membank("bank1")->set_entry(bank);
731	731
732	732	m_rombank = data;
733	733	}
r14976	r14977
745	745
746	746	WRITE8_MEMBER(suna8_state::hardhea2_rambank_0_w)
747	747	{
748		memory_set_bank(machine(), "bank2", 0);
	748	membank("bank2")->set_entry(0);
749	749	}
750	750
751	751	WRITE8_MEMBER(suna8_state::hardhea2_rambank_1_w)
752	752	{
753		memory_set_bank(machine(), "bank2", 1);
	753	membank("bank2")->set_entry(1);
754	754	}
755	755
756	756
r14976	r14977
925	925
926	926	//if (data & ~0x0f)     logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(&space.device()),data);
927	927
928		memory_set_bank(machine(), "bank1", bank);
	928	membank("bank1")->set_entry(bank);
929	929	m_rombank = data;
930	930	}
931	931
r14976	r14977
2355	2355
2356	2356	static DRIVER_INIT( suna8 )
2357	2357	{
2358		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	2358	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
2359	2359	}
2360	2360
2361	2361	/* Working Games */

src/mame/drivers/chanbara.c

r14976	r14977
88	88
89	89	static PALETTE_INIT( chanbara )
90	90	{
91		const UINT8 *color_prom = machine.region("proms")->base();
	91	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
92	92	int i, red, green, blue;
93	93
94	94	for (i = 0; i < machine.total_colors(); i++)
r14976	r14977
357	357
358	358	state->flip_screen_set(data & 0x02);
359	359
360		memory_set_bank(device->machine(), "bank1", (data & 0x04) >> 2);
	360	state->membank("bank1")->set_entry((data & 0x04) >> 2);
361	361
362	362	//if (data & 0xf8)    printf("chanbara_ay_out_1_w unused bits set %02x\n", data & 0xf8);
363	363	}
r14976	r14977
471	471
472	472	static DRIVER_INIT(chanbara )
473	473	{
474		UINT8   *src = machine.region("gfx4")->base();
475		UINT8   *dst = machine.region("gfx3")->base() + 0x4000;
476		UINT8   *bg = machine.region("user1")->base();
	474	UINT8   *src = machine.root_device().memregion("gfx4")->base();
	475	UINT8   *dst = machine.root_device().memregion("gfx3")->base() + 0x4000;
	476	UINT8   *bg = machine.root_device().memregion("user1")->base();
477	477
478	478	int i;
479	479	for (i = 0; i < 0x1000; i++)
r14976	r14977
484	484	dst[i + 0x2000] = (src[i + 0x1000] & 0x0f) << 4;
485	485	}
486	486
487		memory_configure_bank(machine, "bank1", 0, 2, &bg[0x0000], 0x4000);
	487	machine.root_device().membank("bank1")->configure_entries(0, 2, &bg[0x0000], 0x4000);
488	488	}
489	489
490	490	GAME( 1985, chanbara, 0,  chanbara, chanbara, chanbara, ROT270, "Data East", "Chanbara", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL )

src/mame/drivers/btime.c

r14976	r14977
223	223	/* however if the previous instruction was JSR (which caused a write to */
224	224	/* the stack), fetch the address of the next instruction. */
225	225	addr1 = cpu_get_previouspc(&space->device());
226		src1 = (addr1 < 0x9000) ? state->m_rambase : space->machine().region("maincpu")->base();
	226	src1 = (addr1 < 0x9000) ? state->m_rambase : space->machine().root_device().memregion("maincpu")->base();
227	227	if (decrypted[addr1] == 0x20)   /* JSR $xxxx */
228	228	addr = src1[addr1 + 1] + 256 * src1[addr1 + 2];
229	229
230	230	/* If the address of the next instruction is xxxx xxx1 xxxx x1xx, decode it. */
231		src = (addr < 0x9000) ? state->m_rambase : space->machine().region("maincpu")->base();
	231	src = (addr < 0x9000) ? state->m_rambase : state->memregion("maincpu")->base();
232	232	if ((addr & 0x0104) == 0x0104)
233	233	{
234	234	/* 76543210 -> 65342710 bit rotation */
r14976	r14977
2060	2060	{
2061	2061	address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
2062	2062	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
2063		UINT8 *rom = machine.region(cputag)->base();
	2063	UINT8 *rom = machine.root_device().memregion(cputag)->base();
2064	2064	offs_t addr;
2065	2065
2066	2066	space->set_decrypted_region(0x0000, 0xffff, decrypt);
r14976	r14977
2075	2075
2076	2076	READ8_MEMBER(btime_state::wtennis_reset_hack_r)
2077	2077	{
2078		UINT8 *RAM = machine().region("maincpu")->base();
	2078	UINT8 *RAM = memregion("maincpu")->base();
2079	2079
2080	2080	/* Otherwise the game goes into test mode and there is no way out that I
2081	2081	can see.  I'm not sure how it can work, it probably somehow has to do
r14976	r14977
2089	2089	static void init_rom1(running_machine &machine)
2090	2090	{
2091	2091	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2092		UINT8 *rom = machine.region("maincpu")->base();
	2092	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2093	2093
2094	2094	decrypted = auto_alloc_array(machine, UINT8, 0x10000);
2095	2095	space->set_decrypted_region(0x0000, 0xffff, decrypted);
r14976	r14977
2110	2110	static DRIVER_INIT( zoar )
2111	2111	{
2112	2112	btime_state *state = machine.driver_data<btime_state>();
2113		UINT8 *rom = machine.region("maincpu")->base();
	2113	UINT8 *rom = state->memregion("maincpu")->base();
2114	2114
2115	2115	/* At location 0xD50A is what looks like an undocumented opcode. I tried
2116	2116	implementing it given what opcode 0x23 should do, but it still didn't
r14976	r14977
2125	2125	static DRIVER_INIT( tisland )
2126	2126	{
2127	2127	btime_state *state = machine.driver_data<btime_state>();
2128		UINT8 *rom = machine.region("maincpu")->base();
	2128	UINT8 *rom = state->memregion("maincpu")->base();
2129	2129
2130	2130	/* At location 0xa2b6 there's a strange RLA followed by a BPL that reads from an
2131	2131	unmapped area that causes the game to fail in several circumstances.On the Cassette
r14976	r14977
2164	2164	decrypt_C10707_cpu(machine, "maincpu");
2165	2165
2166	2166	machine.device("audiocpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0200, 0x0fff, "bank10");
2167		memory_set_bankptr(machine, "bank10", machine.region("audiocpu")->base() + 0xe200);
	2167	state->membank("bank10")->set_base(state->memregion("audiocpu")->base() + 0xe200);
2168	2168	state->m_audio_nmi_enable_type = AUDIO_ENABLE_DIRECT;
2169	2169	}
2170	2170
r14976	r14977
2183	2183	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0xc15f, 0xc15f, read8_delegate(FUNC(btime_state::wtennis_reset_hack_r),state));
2184	2184
2185	2185	machine.device("audiocpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0200, 0x0fff, "bank10");
2186		memory_set_bankptr(machine, "bank10", machine.region("audiocpu")->base() + 0xe200);
	2186	state->membank("bank10")->set_base(state->memregion("audiocpu")->base() + 0xe200);
2187	2187	state->m_audio_nmi_enable_type = AUDIO_ENABLE_AY8910;
2188	2188	}
2189	2189

src/mame/drivers/nova2001.c

r14976	r14977
980	980
981	981	static void lineswap_gfx_roms(running_machine &machine, const char *region, const int bit)
982	982	{
983		const int length = machine.region(region)->bytes();
	983	const int length = machine.root_device().memregion(region)->bytes();
984	984
985		UINT8* const src = machine.region(region)->base();
	985	UINT8* const src = machine.root_device().memregion(region)->base();
986	986
987	987	UINT8* const temp = auto_alloc_array(machine, UINT8, length);
988	988

src/mame/drivers/jantotsu.c

r14976	r14977
200	200
201	201	static PALETTE_INIT( jantotsu )
202	202	{
203		const UINT8 *color_prom = machine.region("proms")->base();
	203	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
204	204	int   bit0, bit1, bit2, r, g, b;
205	205	int   i;
206	206
r14976	r14977
300	300	}
301	301	else
302	302	{
303		UINT8 *ROM = device->machine().region("adpcm")->base();
	303	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base();
304	304
305	305	state->m_adpcm_data = ((state->m_adpcm_trigger ? (ROM[state->m_adpcm_pos] & 0x0f) : (ROM[state->m_adpcm_pos] & 0xf0) >> 4));
306	306	msm5205_data_w(device, state->m_adpcm_data & 0xf);

src/mame/drivers/chsuper.c

r14976	r14977
267	267	{
268	268	chsuper_state *state = machine.driver_data<chsuper_state>();
269	269	UINT8 *buffer;
270		UINT8 *rom = machine.region("gfx1")->base();
	270	UINT8 *rom = state->memregion("gfx1")->base();
271	271	int i;
272	272
273	273	state->m_tilexor = 0x7f00;
r14976	r14977
290	290	{
291	291	chsuper_state *state = machine.driver_data<chsuper_state>();
292	292	UINT8 *buffer;
293		UINT8 *rom = machine.region("gfx1")->base();
	293	UINT8 *rom = state->memregion("gfx1")->base();
294	294	int i;
295	295
296	296	state->m_tilexor = 0x0e00;
r14976	r14977
313	313	{
314	314	chsuper_state *state = machine.driver_data<chsuper_state>();
315	315	UINT8 *buffer;
316		UINT8 *rom = machine.region("gfx1")->base();
	316	UINT8 *rom = state->memregion("gfx1")->base();
317	317	int i;
318	318
319	319	state->m_tilexor = 0x1800;

src/mame/drivers/mermaid.c

r14976	r14977
419	419	}
420	420	else
421	421	{
422		UINT8 *ROM = device->machine().region("adpcm")->base();
	422	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base();
423	423
424	424	state->m_adpcm_data = ((state->m_adpcm_trigger ? (ROM[state->m_adpcm_pos] & 0x0f) : (ROM[state->m_adpcm_pos] & 0xf0) >> 4));
425	425	msm5205_data_w(device, state->m_adpcm_data & 0xf);

src/mame/drivers/gaelco3d.c

r14976	r14977
206	206	state->m_framenum = 0;
207	207
208	208	/* boot the ADSP chip */
209		src = (UINT16 *)machine.region("user1")->base();
	209	src = (UINT16 *)state->memregion("user1")->base();
210	210	for (i = 0; i < (src[3] & 0xff) * 8; i++)
211	211	{
212	212	UINT32 opcode = ((src[i*4+0] & 0xff) << 16) | ((src[i*4+1] & 0xff) << 8) | (src[i*4+2] & 0xff);
r14976	r14977
216	216	/* allocate a timer for feeding the autobuffer */
217	217	state->m_adsp_autobuffer_timer = machine.device<timer_device>("adsp_timer");
218	218
219		memory_configure_bank(machine, "bank1", 0, 256, machine.region("user1")->base(), 0x4000);
220		memory_set_bank(machine, "bank1", 0);
	219	state->membank("bank1")->configure_entries(0, 256, machine.root_device().memregion("user1")->base(), 0x4000);
	220	state->membank("bank1")->set_entry(0);
221	221
222	222	/* keep the TMS32031 halted until the code is ready to go */
223	223	cputag_set_input_line(machine, "tms", INPUT_LINE_RESET, ASSERT_LINE);
r14976	r14977
613	613	{
614	614	if (LOG)
615	615	logerror("adsp_rombank_w(%d) = %04X\n", offset, data);
616		memory_set_bank(machine(), "bank1", (offset & 1) * 0x80 + (data & 0x7f));
	616	membank("bank1")->set_entry((offset & 1) * 0x80 + (data & 0x7f));
617	617	}
618	618
619	619

src/mame/drivers/dcon.c

r14976	r14977
375	375	/***************************************************************************/
376	376	static DRIVER_INIT( sdgndmps )
377	377	{
378		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	378	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
379	379	RAM[0x1356/2] = 0x4e71; /* beq -> nop */
380	380	RAM[0x1358/2] = 0x4e71;
381	381

src/mame/drivers/photon2.c

r14976	r14977
198	198	logerror( "Unknown banking write: %02X\n", data);
199	199	}
200	200
201		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x4000*bank );
	201	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x4000*bank );
202	202	}
203	203
204	204	READ8_MEMBER(photon2_state::photon2_fe_r)
r14976	r14977
312	312
313	313	static MACHINE_RESET( photon2 )
314	314	{
315		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base());
	315	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
316	316	}
317	317
318	318	static MACHINE_CONFIG_START( photon2, photon2_state )

src/mame/drivers/gstriker.c

r14976	r14977
213	213
214	214	WRITE8_MEMBER(gstriker_state::gs_sh_bankswitch_w)
215	215	{
216		UINT8 *RAM = machine().region("audiocpu")->base();
	216	UINT8 *RAM = memregion("audiocpu")->base();
217	217	int bankaddress;
218	218
219	219	bankaddress = 0x10000 + (data & 0x03) * 0x8000;
220		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	220	membank("bank1")->set_base(&RAM[bankaddress]);
221	221	}
222	222
223	223	/*** GFX DECODE **************************************************************/

src/mame/drivers/snk.c

r14976	r14977
89	89	a bug. The service mode functionality is very limited anyway. To get past the
90	90	failed ROM test and see the service mode, use this ROM patch:
91	91
92		UINT8 *mem = machine.region("maincpu")->base();
	92	UINT8 *mem = machine.root_device().memregion("maincpu")->base();
93	93	mem[0x3a5d] = mem[0x3a5e] = mem[0x3a5f] = 0;
94	94
95	95	- The "SNK Wave" custom sound circuitry is only actually used by marvins and

src/mame/drivers/highvdeo.c

r14976	r14977
243	243	WRITE16_MEMBER(highvdeo_state::tv_vcf_bankselect_w)
244	244	{
245	245	UINT32 bankaddress;
246		UINT8 *ROM = machine().region("user1")->base();
	246	UINT8 *ROM = memregion("user1")->base();
247	247
248	248	/* bits 0, 1 select the ROM bank */
249	249	bankaddress = (data & 0x03) * 0x40000;
250	250
251		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	251	membank("bank1")->set_base(&ROM[bankaddress]);
252	252	}
253	253
254	254
r14976	r14977
378	378	WRITE16_MEMBER(highvdeo_state::tv_tcf_bankselect_w)
379	379	{
380	380	UINT32 bankaddress;
381		UINT8 *ROM = machine().region("user1")->base();
	381	UINT8 *ROM = memregion("user1")->base();
382	382
383	383	/* bits 0, 1, 2 select the ROM bank */
384	384	bankaddress = (data & 0x07) * 0x40000;
385	385
386		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	386	membank("bank1")->set_base(&ROM[bankaddress]);
387	387	}
388	388
389	389	static ADDRESS_MAP_START( tv_tcf_map, AS_PROGRAM, 16, highvdeo_state )
r14976	r14977
494	494	WRITE16_MEMBER(highvdeo_state::brasil_status_w)
495	495	{
496	496	UINT32 bankaddress;
497		UINT8 *ROM = machine().region("user1")->base();
	497	UINT8 *ROM = memregion("user1")->base();
498	498
499	499	switch(data & 3) //data & 7?
500	500	{
r14976	r14977
505	505
506	506	bankaddress = (data & 0x07) * 0x40000;
507	507
508		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	508	membank("bank1")->set_base(&ROM[bankaddress]);
509	509
510	510	//  popmessage("%04x",data);
511	511	}

src/mame/drivers/namconb1.c

r14976	r14977
608	608
609	609	static DRIVER_INIT( nebulray )
610	610	{
611		UINT8 *pMem = (UINT8 *)machine.region(NAMCONB1_TILEMASKREGION)->base();
	611	UINT8 *pMem = (UINT8 *)machine.root_device().memregion(NAMCONB1_TILEMASKREGION)->base();
612	612	size_t numBytes = (0xfe7-0xe6f)*8;
613	613	memset( &pMem[0xe6f*8], 0, numBytes );
614	614

src/mame/drivers/fcrash.c

r14976	r14977
58	58	state->m_msm_1->set_output_gain(0, (data & 0x08) ? 0.0 : 1.0);
59	59	state->m_msm_2->set_output_gain(0, (data & 0x10) ? 0.0 : 1.0);
60	60
61		memory_set_bank(space->machine(), "bank1", data & 0x07);
	61	state->membank("bank1")->set_entry(data & 0x07);
62	62	}
63	63
64	64	static void m5205_int1( device_t *device )
r14976	r14977
693	693	static MACHINE_START( fcrash )
694	694	{
695	695	cps_state *state = machine.driver_data<cps_state>();
696		UINT8 *ROM = machine.region("soundcpu")->base();
	696	UINT8 *ROM = state->memregion("soundcpu")->base();
697	697
698		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	698	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
699	699
700	700	state->m_maincpu = machine.device("maincpu");
701	701	state->m_audiocpu = machine.device("soundcpu");

src/mame/drivers/othello.c

r14976	r14977
100	100	UINT32 data_address;
101	101	UINT32 tmp;
102	102
103		const UINT8 *gfx = device->machine().region("gfx")->base();
	103	const UINT8 *gfx = state->memregion("gfx")->base();
104	104
105	105	for(cx = 0; cx < x_count; ++cx)
106	106	{
r14976	r14977
283	283
284	284	READ8_MEMBER(othello_state::n7751_rom_r)
285	285	{
286		return machine().region("n7751data")->base()[m_sound_addr];
	286	return memregion("n7751data")->base()[m_sound_addr];
287	287	}
288	288
289	289	READ8_MEMBER(othello_state::n7751_command_r)

src/mame/drivers/cosmic.c

r14976	r14977
1512	1512	cosmic_state *state = machine.driver_data<cosmic_state>();
1513	1513	offs_t offs, len;
1514	1514	UINT8 *rom;
1515		len = machine.region("maincpu")->bytes();
1516		rom = machine.region("maincpu")->base();
	1515	len = machine.root_device().memregion("maincpu")->bytes();
	1516	rom = state->memregion("maincpu")->base();
1517	1517	for (offs = 0; offs < len; offs++)
1518	1518	{
1519	1519	UINT8 scrambled = rom[offs];

src/mame/drivers/bfm_sc5.c

r14976	r14977
11791	11791	DRIVER_INIT( sc5 )
11792	11792	{
11793	11793	// sc5 roms always start with SC5
11794		UINT8 *src = machine.region( "maincpu" )->base();
	11794	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
11795	11795	//  printf("%02x %02x %02x %02x\n", src[0], src[1], src[2], src[3]);
11796	11796	if (((src[0] == 0x20) && (src[2] == 0x43)) || ((src[1] == 0x35) && (src[3] == 0x53)))
11797	11797	{

src/mame/drivers/model2.c

r14976	r14977
356	356	static MACHINE_RESET(model2_scsp)
357	357	{
358	358	model2_state *state = machine.driver_data<model2_state>();
359		memory_set_bankptr(machine, "bank4", machine.region("scsp")->base() + 0x200000);
360		memory_set_bankptr(machine, "bank5", machine.region("scsp")->base() + 0x600000);
	359	state->membank("bank4")->set_base(machine.root_device().memregion("scsp")->base() + 0x200000);
	360	state->membank("bank5")->set_base(machine.root_device().memregion("scsp")->base() + 0x600000);
361	361
362	362	// copy the 68k vector table into RAM
363		memcpy(state->m_soundram, machine.region("audiocpu")->base() + 0x80000, 16);
	363	memcpy(state->m_soundram, state->memregion("audiocpu")->base() + 0x80000, 16);
364	364	machine.device("audiocpu")->reset();
365	365	scsp_set_ram_base(machine.device("scsp"), state->m_soundram);
366	366	}
r14976	r14977
1153	1153
1154	1154	READ32_MEMBER(model2_state::maxx_r)
1155	1155	{
1156		UINT32 *ROM = (UINT32 *)machine().region("maincpu")->base();
	1156	UINT32 *ROM = (UINT32 *)machine().root_device().memregion("maincpu")->base();
1157	1157
1158	1158	if (offset <= 0x1f/4)
1159	1159	{
r14976	r14977
1844	1844	WRITE16_MEMBER(model2_state::model2snd_ctrl)
1845	1845	{
1846	1846	// handle sample banking
1847		if (machine().region("scsp")->bytes() > 0x800000)
	1847	if (machine().root_device().memregion("scsp")->bytes() > 0x800000)
1848	1848	{
1849		UINT8 *snd = machine().region("scsp")->base();
	1849	UINT8 *snd = memregion("scsp")->base();
1850	1850	if (data & 0x20)
1851	1851	{
1852		memory_set_bankptr(machine(), "bank4", snd + 0x200000);
1853		memory_set_bankptr(machine(), "bank5", snd + 0x600000);
	1852	membank("bank4")->set_base(snd + 0x200000);
	1853	membank("bank5")->set_base(snd + 0x600000);
1854	1854	}
1855	1855	else
1856	1856	{
1857		memory_set_bankptr(machine(), "bank4", snd + 0x800000);
1858		memory_set_bankptr(machine(), "bank5", snd + 0xa00000);
	1857	membank("bank4")->set_base(snd + 0x800000);
	1858	membank("bank5")->set_base(snd + 0xa00000);
1859	1859	}
1860	1860	}
1861	1861	}
r14976	r14977
5117	5117	static DRIVER_INIT( pltkids )
5118	5118	{
5119	5119	model2_state *state = machine.driver_data<model2_state>();
5120		UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
	5120	UINT32 *ROM = (UINT32 *)state->memregion("maincpu")->base();
5121	5121
5122	5122	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x01d80000, 0x01dfffff, read32_delegate(FUNC(model2_state::model2_prot_r),state), write32_delegate(FUNC(model2_state::model2_prot_w),state));
5123	5123	state->m_protstate = state->m_protpos = 0;
r14976	r14977
5129	5129	static DRIVER_INIT( zerogun )
5130	5130	{
5131	5131	model2_state *state = machine.driver_data<model2_state>();
5132		UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
	5132	UINT32 *ROM = (UINT32 *)state->memregion("maincpu")->base();
5133	5133
5134	5134	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x01d80000, 0x01dfffff, read32_delegate(FUNC(model2_state::model2_prot_r),state), write32_delegate(FUNC(model2_state::model2_prot_w),state));
5135	5135	state->m_protstate = state->m_protpos = 0;
r14976	r14977
5173	5173	static DRIVER_INIT( sgt24h )
5174	5174	{
5175	5175	model2_state *state = machine.driver_data<model2_state>();
5176		UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
	5176	UINT32 *ROM = (UINT32 *)state->memregion("maincpu")->base();
5177	5177
5178	5178	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x01d80000, 0x01dfffff, read32_delegate(FUNC(model2_state::model2_prot_r),state), write32_delegate(FUNC(model2_state::model2_prot_w),state));
5179	5179	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x01a10000, 0x01a1ffff, read32_delegate(FUNC(model2_state::jaleco_network_r),state), write32_delegate(FUNC(model2_state::jaleco_network_w),state));
r14976	r14977
5196	5196	static DRIVER_INIT( doa )
5197	5197	{
5198	5198	model2_state *state = machine.driver_data<model2_state>();
5199		UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
	5199	UINT32 *ROM = (UINT32 *)state->memregion("maincpu")->base();
5200	5200
5201	5201	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x01d80000, 0x01dfffff, read32_delegate(FUNC(model2_state::model2_prot_r),state), write32_delegate(FUNC(model2_state::model2_prot_w),state));
5202	5202	state->m_protstate = state->m_protpos = 0;

src/mame/drivers/majorpkr.c

r14976	r14977
566	566
567	567	WRITE8_MEMBER(majorpkr_state::rom_bank_w)
568	568	{
569		memory_set_bank(machine(), "rom_bank", data & 0x3);
	569	membank("rom_bank")->set_entry(data & 0x3);
570	570	}
571	571
572	572
r14976	r14977
1083	1083
1084	1084	static DRIVER_INIT( majorpkr )
1085	1085	{
1086		UINT8 * ROM = (UINT8 *)machine.region("maincpu")->base();
1087		memory_configure_bank(machine, "rom_bank", 0, 4, &ROM[0x10000], 0x800);
	1086	UINT8 * ROM = (UINT8 *)machine.root_device().memregion("maincpu")->base();
	1087	machine.root_device().membank("rom_bank")->configure_entries(0, 4, &ROM[0x10000], 0x800);
1088	1088	}
1089	1089
1090	1090

src/mame/drivers/sshangha.c

r14976	r14977
492	492	#if SSHANGHA_HACK
493	493	/* This is a hack to allow you to use the extra features
494	494	of the first "Unused" Dip Switch (see notes above). */
495		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	495	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
496	496	RAM[0x000384/2] = 0x4e71;
497	497	RAM[0x000386/2] = 0x4e71;
498	498	RAM[0x000388/2] = 0x4e71;

src/mame/drivers/ichiban.c

r14976	r14977
104	104
105	105	void ichibanjyan_state::machine_start()
106	106	{
107		UINT8 *ROM = machine().region("code")->base();
	107	UINT8 *ROM = memregion("code")->base();
108	108
109		memory_configure_bank(machine(), "bank1", 0, 4, ROM, 0x8000);
	109	membank("bank1")->configure_entries(0, 4, ROM, 0x8000);
110	110	}
111	111
112	112	void ichibanjyan_state::machine_reset()

src/mame/drivers/popeye.c

r14976	r14977
620	620	{
621	621	popeye_state *state = machine.driver_data<popeye_state>();
622	622	UINT8 *buffer;
623		UINT8 *rom = machine.region("maincpu")->base();
	623	UINT8 *rom = state->memregion("maincpu")->base();
624	624	int len = 0x10000;
625	625
626	626	/* decrypt the program ROMs */
r14976	r14977
642	642	{
643	643	popeye_state *state = machine.driver_data<popeye_state>();
644	644	UINT8 *buffer;
645		UINT8 *rom = machine.region("maincpu")->base();
	645	UINT8 *rom = state->memregion("maincpu")->base();
646	646	int len = 0x10000;
647	647
648	648	/* decrypt the program ROMs */

src/mame/drivers/4enraya.c

r14976	r14977
79	79
80	80	READ8_MEMBER(_4enraya_state::fenraya_custom_map_r)
81	81	{
82		UINT8 *prom = machine().region("pal_prom")->base();
	82	UINT8 *prom = memregion("pal_prom")->base();
83	83	UINT8 prom_routing = (prom[offset >> 12] & 0xf) ^ 0xf;
84	84	UINT8 res;
85	85
r14976	r14977
87	87
88	88	if(prom_routing & 1) //ROM5
89	89	{
90		UINT8 *rom = machine().region("maincpu")->base();
	90	UINT8 *rom = memregion("maincpu")->base();
91	91	res |= rom[offset & 0x7fff];
92	92	}
93	93
94	94	if(prom_routing & 2) //ROM4
95	95	{
96		UINT8 *rom = machine().region("maincpu")->base();
	96	UINT8 *rom = memregion("maincpu")->base();
97	97	res |= rom[(offset & 0x7fff) | 0x8000];
98	98	}
99	99
r14976	r14977
112	112
113	113	WRITE8_MEMBER(_4enraya_state::fenraya_custom_map_w)
114	114	{
115		UINT8 *prom = machine().region("pal_prom")->base();
	115	UINT8 *prom = memregion("pal_prom")->base();
116	116	UINT8 prom_routing = (prom[offset >> 12] & 0xf) ^ 0xf;
117	117
118	118	if(prom_routing & 1) //ROM5
r14976	r14977
392	392	static DRIVER_INIT( unkpacg )
393	393	{
394	394	_4enraya_state *state = machine.driver_data<_4enraya_state>();
395		UINT8 *rom = machine.region("maincpu")->base();
	395	UINT8 *rom = state->memregion("maincpu")->base();
396	396
397	397	state->m_snd_latch_bit = 2;
398	398

src/mame/drivers/compgolf.c

r14976	r14977
44	44	if (m_bank != new_bank)
45	45	{
46	46	m_bank = new_bank;
47		memory_set_bank(machine(), "bank1", m_bank);
	47	membank("bank1")->set_entry(m_bank);
48	48	}
49	49
50	50	m_scrollx_hi = (data & 1) << 8;
r14976	r14977
346	346
347	347	static void compgolf_expand_bg(running_machine &machine)
348	348	{
349		UINT8 *GFXDST = machine.region("gfx2")->base();
350		UINT8 *GFXSRC = machine.region("gfx4")->base();
	349	UINT8 *GFXDST = machine.root_device().memregion("gfx2")->base();
	350	UINT8 *GFXSRC = machine.root_device().memregion("gfx4")->base();
351	351
352	352	int x;
353	353
r14976	r14977
360	360
361	361	static DRIVER_INIT( compgolf )
362	362	{
363		memory_configure_bank(machine, "bank1", 0, 2, machine.region("user1")->base(), 0x4000);
	363	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("user1")->base(), 0x4000);
364	364	compgolf_expand_bg(machine);
365	365	}
366	366

src/mame/drivers/cps2.c

r14976	r14977
1217	1217	state->m_audiocpu = machine.device("audiocpu");
1218	1218
1219	1219	if (state->m_audiocpu != NULL)   // gigaman2 has no audiocpu
1220		memory_configure_bank(machine, "bank1", 0, (QSOUND_SIZE - 0x10000) / 0x4000, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	1220	state->membank("bank1")->configure_entries(0, (QSOUND_SIZE - 0x10000) / 0x4000, state->memregion("audiocpu")->base() + 0x10000, 0x4000);
1221	1221	}
1222	1222
1223	1223
r14976	r14977
8164	8164	static void gigaman2_gfx_reorder(running_machine &machine)
8165	8165	{
8166	8166	int i;
8167		int length = machine.region( "gfx" )->bytes();
8168		UINT16 *rom = (UINT16 *)machine.region("gfx")->base();
	8167	int length = machine.root_device().memregion( "gfx" )->bytes();
	8168	UINT16 *rom = (UINT16 *)machine.root_device().memregion("gfx")->base();
8169	8169	UINT16 *buf = auto_alloc_array(machine, UINT16, length );
8170	8170
8171	8171	memcpy (buf, rom, length);
r14976	r14977
8181	8181	{
8182	8182	cps_state *state = machine.driver_data<cps_state>();
8183	8183	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
8184		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
8185		int length = machine.region("maincpu")->bytes();
	8184	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
	8185	int length = state->memregion("maincpu")->bytes();
8186	8186
8187	8187	gigaman2_gfx_reorder(machine);
8188	8188

src/mame/drivers/igs017.c

r14976	r14977
219	219	static void expand_sprites(running_machine &machine)
220	220	{
221	221	igs017_state *state = machine.driver_data<igs017_state>();
222		UINT8 *rom   =   machine.region("sprites")->base();
223		int size   =   machine.region("sprites")->bytes();
	222	UINT8 *rom   =   machine.root_device().memregion("sprites")->base();
	223	int size   =   state->memregion("sprites")->bytes();
224	224	int i;
225	225
226	226	state->m_sprites_gfx_size   =   size / 2 * 3;
r14976	r14977
421	421
422	422	static void decrypt_program_rom(running_machine &machine, int mask, int a7, int a6, int a5, int a4, int a3, int a2, int a1, int a0)
423	423	{
424		int length = machine.region("maincpu")->bytes();
425		UINT8 *rom = machine.region("maincpu")->base();
	424	int length = machine.root_device().memregion("maincpu")->bytes();
	425	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
426	426	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
427	427	int i;
428	428
r14976	r14977
474	474
475	475	static void iqblocka_patch_rom(running_machine &machine)
476	476	{
477		UINT8 *rom = machine.region("maincpu")->base();
	477	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
478	478
479	479	//  rom[0x7b64] = 0xc9;
480	480
r14976	r14977
515	515
516	516	static void tjsb_decrypt_sprites(running_machine &machine)
517	517	{
518		int length = machine.region("sprites")->bytes();
519		UINT8 *rom = machine.region("sprites")->base();
	518	int length = machine.root_device().memregion("sprites")->bytes();
	519	UINT8 *rom = machine.root_device().memregion("sprites")->base();
520	520	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
521	521	int i, addr;
522	522
r14976	r14977
551	551	static void mgcs_decrypt_program_rom(running_machine &machine)
552	552	{
553	553	int i;
554		UINT16 *src = (UINT16 *)machine.region("maincpu")->base();
	554	UINT16 *src = (UINT16 *)machine.root_device().memregion("maincpu")->base();
555	555
556	556	int rom_size = 0x80000;
557	557
r14976	r14977
600	600
601	601	static void mgcs_decrypt_tiles(running_machine &machine)
602	602	{
603		int length = machine.region("tilemaps")->bytes();
604		UINT8 *rom = machine.region("tilemaps")->base();
	603	int length = machine.root_device().memregion("tilemaps")->bytes();
	604	UINT8 *rom = machine.root_device().memregion("tilemaps")->base();
605	605	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
606	606	int i;
607	607
r14976	r14977
617	617
618	618	static void mgcs_flip_sprites(running_machine &machine)
619	619	{
620		int length = machine.region("sprites")->bytes();
621		UINT8 *rom = machine.region("sprites")->base();
	620	int length = machine.root_device().memregion("sprites")->bytes();
	621	UINT8 *rom = machine.root_device().memregion("sprites")->base();
622	622	int i;
623	623
624	624	for (i = 0;i < length;i+=2)
r14976	r14977
638	638
639	639	static void mgcs_patch_rom(running_machine &machine)
640	640	{
641		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	641	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
642	642
643	643	rom[0x4e036/2] = 0x6006;
644	644
r14976	r14977
664	664	// decryption is incomplete, the first part of code doesn't seem right.
665	665	static DRIVER_INIT( tarzan )
666	666	{
667		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	667	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
668	668	int i;
669	669	int size = 0x40000;
670	670
r14976	r14977
690	690	// by iq_132
691	691	static DRIVER_INIT( tarzana )
692	692	{
693		UINT8 *ROM = machine.region("maincpu")->base();
	693	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
694	694	int i;
695	695	int size = 0x80000;
696	696
r14976	r14977
763	763	{
764	764	int size = 0x040000;
765	765
766		UINT8 *data = machine.region("maincpu")->base();
	766	UINT8 *data = machine.root_device().memregion("maincpu")->base();
767	767	UINT8 *code = auto_alloc_array(machine, UINT8, size);
768	768	memcpy(code, data, size);
769	769
r14976	r14977
781	781	static DRIVER_INIT( sdmg2 )
782	782	{
783	783	int i;
784		UINT16 *src = (UINT16 *)machine.region("maincpu")->base();
	784	UINT16 *src = (UINT16 *)machine.root_device().memregion("maincpu")->base();
785	785
786	786	int rom_size = 0x80000;
787	787
r14976	r14977
838	838	static DRIVER_INIT( mgdha )
839	839	{
840	840	int i;
841		UINT16 *src = (UINT16 *)machine.region("maincpu")->base();
	841	UINT16 *src = (UINT16 *)machine.root_device().memregion("maincpu")->base();
842	842
843	843	int rom_size = 0x80000;
844	844
r14976	r14977
873	873	{
874	874	DRIVER_INIT_CALL( mgdha );
875	875
876		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	876	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
877	877
878	878	// additional protection
879	879	rom[0x4ad50/2] = 0x4e71;
r14976	r14977
885	885
886	886	static void lhzb2_patch_rom(running_machine &machine)
887	887	{
888		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	888	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
889	889
890	890	// Prot. checks:
891	891	rom[0x14786/2] = 0x6044;   // 014786: 6744    beq $147cc
r14976	r14977
896	896
897	897	static void lhzb2_decrypt_tiles(running_machine &machine)
898	898	{
899		int length = machine.region("tilemaps")->bytes();
900		UINT8 *rom = machine.region("tilemaps")->base();
	899	int length = machine.root_device().memregion("tilemaps")->bytes();
	900	UINT8 *rom = machine.root_device().memregion("tilemaps")->base();
901	901	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
902	902	int i;
903	903
r14976	r14977
914	914
915	915	static void lhzb2_decrypt_sprites(running_machine &machine)
916	916	{
917		int length = machine.region("sprites")->bytes();
918		UINT8 *rom = machine.region("sprites")->base();
	917	int length = machine.root_device().memregion("sprites")->bytes();
	918	UINT8 *rom = machine.root_device().memregion("sprites")->base();
919	919	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
920	920	int i, addr;
921	921
r14976	r14977
940	940	static DRIVER_INIT( lhzb2 )
941	941	{
942	942	int i;
943		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	943	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
944	944
945	945	int rom_size = 0x80000;
946	946
r14976	r14977
1033	1033
1034	1034	static void lhzb2a_patch_rom(running_machine &machine)
1035	1035	{
1036		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1036	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1037	1037
1038	1038	// Prot. checks:
1039	1039	rom[0x09c52/2] = 0x6026;   // 009C52: 6726    beq $9c7a
r14976	r14977
1049	1049	static DRIVER_INIT( lhzb2a )
1050	1050	{
1051	1051	int i;
1052		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	1052	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
1053	1053
1054	1054	int rom_size = 0x80000;
1055	1055
r14976	r14977
1114	1114
1115	1115	static void slqz2_patch_rom(running_machine &machine)
1116	1116	{
1117		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1117	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1118	1118
1119	1119	// Prot. checks:
1120	1120	rom[0x1489c/2] = 0x6044;   // 01489C: 6744    beq $148e2
r14976	r14977
1125	1125
1126	1126	static void slqz2_decrypt_tiles(running_machine &machine)
1127	1127	{
1128		int length = machine.region("tilemaps")->bytes();
1129		UINT8 *rom = machine.region("tilemaps")->base();
	1128	int length = machine.root_device().memregion("tilemaps")->bytes();
	1129	UINT8 *rom = machine.root_device().memregion("tilemaps")->base();
1130	1130	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
1131	1131	int i;
1132	1132
r14976	r14977
1143	1143	static DRIVER_INIT( slqz2 )
1144	1144	{
1145	1145	int i;
1146		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	1146	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
1147	1147
1148	1148	int rom_size = 0x80000;
1149	1149

src/mame/drivers/hnayayoi.c

r14976	r14977
674	674
675	675	static DRIVER_INIT( hnfubuki )
676	676	{
677		UINT8 *rom = machine.region("gfx1")->base();
678		int len = machine.region("gfx1")->bytes();
	677	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	678	int len = machine.root_device().memregion("gfx1")->bytes();
679	679	int i, j;
680	680
681	681	/* interestingly, the blitter data has a slight encryption */

src/mame/drivers/amaticmg.c

r14976	r14977
413	413
414	414	static PALETTE_INIT( amaticmg )
415	415	{
416		const UINT8 *color_prom = machine.region("proms")->base();
	416	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
417	417	int   bit0, bit1, bit2 , r, g, b;
418	418	int   i;
419	419
r14976	r14977
440	440
441	441	static PALETTE_INIT( amaticmg3 )
442	442	{
443		const UINT8 *color_prom = machine.region("proms")->base();
	443	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
444	444	int   r, g, b;
445	445	int   i;
446	446

src/mame/drivers/jpmimpct.c

r14976	r14977
5449	5449
5450	5450	int i;
5451	5451
5452		UINT8 *src1 = machine.region( "maincpu" )->base();
5453		UINT8 *src2 = machine.region( "encrypted" )->base();
	5452	UINT8 *src1 = machine.root_device().memregion( "maincpu" )->base();
	5453	UINT8 *src2 = machine.root_device().memregion( "encrypted" )->base();
5454	5454
5455	5455	for (i=0;i<0x040000;i++)
5456	5456	{

src/mame/drivers/namcos12.c

r14976	r14977
1159	1159	m_n_bankoffset = data;
1160	1160	}
1161	1161
1162		memory_set_bank( machine(), "bank1", m_n_bankoffset );
	1162	membank( "bank1" )->set_entry( m_n_bankoffset );
1163	1163
1164	1164	verboselog( machine(), 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset );
1165	1165	}
r14976	r14977
1208	1208	verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) game %08x\n", n_address, n_size, n_offset );
1209	1209	}
1210	1210
1211		source = (UINT16 *) state->machine().region( n_region )->base();
1212		n_romleft = ( state->machine().region( n_region )->bytes() - n_offset ) / 4;
	1211	source = (UINT16 *) state->machine().root_device().memregion( n_region )->base();
	1212	n_romleft = ( state->machine().root_device().memregion( n_region )->bytes() - n_offset ) / 4;
1213	1213	if( n_size > n_romleft )
1214	1214	{
1215	1215	verboselog( state->machine(), 1, "namcos12_rom_read dma truncated %d to %d passed end of rom\n", n_size, n_romleft );
r14976	r14977
1321	1321
1322	1322	WRITE32_MEMBER(namcos12_state::kcoff_w)
1323	1323	{
1324		memory_set_bankptr( machine(), "bank2", machine().region( "user1" )->base() + 0x20280 );
	1324	membank( "bank2" )->set_base( memregion( "user1" )->base() + 0x20280 );
1325	1325	}
1326	1326
1327	1327	WRITE32_MEMBER(namcos12_state::kcon_w)
1328	1328	{
1329	1329
1330		memory_set_bankptr( machine(), "bank2", m_kcram );
	1330	membank( "bank2" )->set_base( m_kcram );
1331	1331	}
1332	1332
1333	1333	WRITE32_MEMBER(namcos12_state::tektagt_protection_1_w)
r14976	r14977
1429	1429	space->install_write_handler(0x1f018000, 0x1f018003, write32_delegate(FUNC(namcos12_state::kcoff_w),state));
1430	1430
1431	1431	memset( state->m_kcram, 0, sizeof( state->m_kcram ) );
1432		memory_set_bankptr( space->machine(), "bank2", state->m_kcram );
	1432	state->membank( "bank2" )->set_base( state->m_kcram );
1433	1433	}
1434	1434	}
1435	1435
r14976	r14977
1627	1627
1628	1628	psx_driver_init(machine);
1629	1629
1630		memory_configure_bank(machine, "bank1", 0, machine.region( "user2" )->bytes() / 0x200000, machine.region( "user2" )->base(), 0x200000 );
	1630	state->membank("bank1")->configure_entries(0, machine.root_device().memregion( "user2" )->bytes() / 0x200000, state->memregion( "user2" )->base(), 0x200000 );
1631	1631
1632	1632	state->m_s12_porta = 0;
1633	1633	state->m_s12_rtcstate = 0;
r14976	r14977
1640	1640	state->m_n_dmaoffset = 0;
1641	1641	state->m_n_dmabias = 0;
1642	1642	state->m_n_bankoffset = 0;
1643		memory_set_bank( machine, "bank1", 0 );
	1643	state->membank( "bank1" )->set_entry( 0 );
1644	1644
1645	1645	state->save_item( NAME(state->m_n_dmaoffset) );
1646	1646	state->save_item( NAME(state->m_n_dmabias) );
r14976	r14977
1652	1652	DRIVER_INIT_CALL(namcos12);
1653	1653
1654	1654	/* patch out wait for dma 5 to complete */
1655		*( (UINT32 *)( machine.region( "user1" )->base() + 0x331c4 ) ) = 0;
	1655	*( (UINT32 *)( machine.root_device().memregion( "user1" )->base() + 0x331c4 ) ) = 0;
1656	1656
1657	1657	system11gun_install(machine);
1658	1658	}

src/mame/drivers/avt.c

r14976	r14977
531	531
532	532	static PALETTE_INIT( avt )
533	533	{
534		const UINT8 *color_prom = machine.region("proms")->base();
	534	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
535	535	/*  prom bits
536	536	7654 3210
537	537	---- ---x   Intensity?.

src/mame/drivers/missb2.c

r14976	r14977
72	72
73	73	sx = 0;
74	74
75		prom = screen.machine().region("proms")->base();
	75	prom = screen.machine().root_device().memregion("proms")->base();
76	76	for (offs = 0; offs < state->m_objectram.bytes(); offs += 4)
77	77	{
78	78	/* skip empty sprites */
r14976	r14977
154	154	// I don't know how this is really connected, bit 1 is always high afaik...
155	155	bank = ((data & 2) ? 1 : 0) | ((data & 1) ? 4 : 0);
156	156
157		memory_set_bank(machine(), "bank2", bank);
158		memory_set_bank(machine(), "bank3", bank);
	157	membank("bank2")->set_entry(bank);
	158	membank("bank3")->set_entry(bank);
159	159	}
160	160
161	161	/* Memory Maps */
r14976	r14977
573	573
574	574	static void configure_banks( running_machine& machine )
575	575	{
576		UINT8 *ROM = machine.region("maincpu")->base();
577		UINT8 *SLAVE = machine.region("slave")->base();
	576	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	577	UINT8 *SLAVE = machine.root_device().memregion("slave")->base();
578	578
579		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	579	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
580	580
581	581	/* 2009-11 FP: isn't there a way to configure both at once? */
582		memory_configure_bank(machine, "bank2", 0, 7, &SLAVE[0x8000], 0x1000);
583		memory_configure_bank(machine, "bank3", 0, 7, &SLAVE[0x9000], 0x1000);
	582	machine.root_device().membank("bank2")->configure_entries(0, 7, &SLAVE[0x8000], 0x1000);
	583	machine.root_device().membank("bank3")->configure_entries(0, 7, &SLAVE[0x9000], 0x1000);
584	584	}
585	585
586	586	static DRIVER_INIT( missb2 )

src/mame/drivers/tehkanwc.c

r14976	r14977
195	195	{
196	196	tehkanwc_state *state = device->machine().driver_data<tehkanwc_state>();
197	197
198		UINT8 *SAMPLES = device->machine().region("adpcm")->base();
	198	UINT8 *SAMPLES = state->memregion("adpcm")->base();
199	199	int msm_data = SAMPLES[state->m_msm_data_offs & 0x7fff];
200	200
201	201	if (state->m_toggle == 0)
r14976	r14977
707	707	023A: 00          nop
708	708	*/
709	709
710		UINT8 *ROM = machine.region("maincpu")->base();
	710	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
711	711
712	712	ROM[0x0238] = 0x00;
713	713	ROM[0x0239] = 0x00;

src/mame/drivers/photon.c

r14976	r14977
33	33
34	34	static void pk8000_set_bank(running_machine &machine,UINT8 data)
35	35	{
36		UINT8 *rom = machine.region("maincpu")->base();
37		UINT8 *ram = machine.region("maincpu")->base();
	36	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	37	UINT8 *ram = machine.root_device().memregion("maincpu")->base();
38	38	UINT8 block1 = data & 3;
39	39	UINT8 block2 = (data >> 2) & 3;
40	40	UINT8 block3 = (data >> 4) & 3;
r14976	r14977
42	42
43	43	switch(block1) {
44	44	case 0:
45		memory_set_bankptr(machine, "bank1", rom + 0x10000);
46		memory_set_bankptr(machine, "bank5", ram);
	45	machine.root_device().membank("bank1")->set_base(rom + 0x10000);
	46	machine.root_device().membank("bank5")->set_base(ram);
47	47	break;
48	48	case 1: break;
49	49	case 2: break;
50	50	case 3:
51		memory_set_bankptr(machine, "bank1", ram);
52		memory_set_bankptr(machine, "bank5", ram);
	51	machine.root_device().membank("bank1")->set_base(ram);
	52	machine.root_device().membank("bank5")->set_base(ram);
53	53	break;
54	54	}
55	55
56	56	switch(block2) {
57	57	case 0:
58		memory_set_bankptr(machine, "bank2", rom + 0x14000);
59		memory_set_bankptr(machine, "bank6", ram + 0x4000);
	58	machine.root_device().membank("bank2")->set_base(rom + 0x14000);
	59	machine.root_device().membank("bank6")->set_base(ram + 0x4000);
60	60	break;
61	61	case 1: break;
62	62	case 2: break;
63	63	case 3:
64		memory_set_bankptr(machine, "bank2", ram + 0x4000);
65		memory_set_bankptr(machine, "bank6", ram + 0x4000);
	64	machine.root_device().membank("bank2")->set_base(ram + 0x4000);
	65	machine.root_device().membank("bank6")->set_base(ram + 0x4000);
66	66	break;
67	67	}
68	68	switch(block3) {
69	69	case 0:
70		memory_set_bankptr(machine, "bank3", rom + 0x18000);
71		memory_set_bankptr(machine, "bank7", ram + 0x8000);
	70	machine.root_device().membank("bank3")->set_base(rom + 0x18000);
	71	machine.root_device().membank("bank7")->set_base(ram + 0x8000);
72	72	break;
73	73	case 1: break;
74	74	case 2: break;
75	75	case 3:
76		memory_set_bankptr(machine, "bank3", ram + 0x8000);
77		memory_set_bankptr(machine, "bank7", ram + 0x8000);
	76	machine.root_device().membank("bank3")->set_base(ram + 0x8000);
	77	machine.root_device().membank("bank7")->set_base(ram + 0x8000);
78	78	break;
79	79	}
80	80	switch(block4) {
81	81	case 0:
82		memory_set_bankptr(machine, "bank4", rom + 0x1c000);
83		memory_set_bankptr(machine, "bank8", ram + 0xc000);
	82	machine.root_device().membank("bank4")->set_base(rom + 0x1c000);
	83	machine.root_device().membank("bank8")->set_base(ram + 0xc000);
84	84	break;
85	85	case 1: break;
86	86	case 2: break;
87	87	case 3:
88		memory_set_bankptr(machine, "bank4", ram + 0xc000);
89		memory_set_bankptr(machine, "bank8", ram + 0xc000);
	88	machine.root_device().membank("bank4")->set_base(ram + 0xc000);
	89	machine.root_device().membank("bank8")->set_base(ram + 0xc000);
90	90	break;
91	91	}
92	92	}
r14976	r14977
199	199
200	200	static SCREEN_UPDATE_IND16( photon )
201	201	{
202		return pk8000_video_update(screen, bitmap, cliprect, screen.machine().region("maincpu")->base());
	202	return pk8000_video_update(screen, bitmap, cliprect, screen.machine().root_device().memregion("maincpu")->base());
203	203	}
204	204
205	205	static MACHINE_CONFIG_START( photon, photon_state )

src/mame/drivers/citycon.c

r14976	r14977
338	338
339	339	static DRIVER_INIT( citycon )
340	340	{
341		UINT8 *rom = machine.region("gfx1")->base();
	341	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
342	342	int i;
343	343
344	344	/*

src/mame/drivers/sigmab52.c

r14976	r14977
294	294
295	295	WRITE8_MEMBER(sigmab52_state::unk_f710_w)
296	296	{
297		memory_set_bankptr(machine(), "bank1" ,&machine().region("maincpu")->base()[0x10000 + ((data&0x80)?0x4000:0x0000)]);
	297	membank("bank1" )->set_base(&machine().root_device().memregion("maincpu")->base()[0x10000 + ((data&0x80)?0x4000:0x0000)]);
298	298	}
299	299
300	300	READ8_MEMBER(sigmab52_state::unk_f721_r)
r14976	r14977
542	542
543	543	static MACHINE_START(jwildb52)
544	544	{
545		memory_set_bankptr(machine, "bank1", &machine.region("maincpu")->base()[0x10000 + 0x0000]);
	545	machine.root_device().membank("bank1")->set_base(&machine.root_device().memregion("maincpu")->base()[0x10000 + 0x0000]);
546	546
547		memory_set_bankptr(machine, "bank2", &machine.region("maincpu")->base()[0x10000 + 0xf800]);
	547	machine.root_device().membank("bank2")->set_base(&machine.root_device().memregion("maincpu")->base()[0x10000 + 0xf800]);
548	548
549		memory_set_bankptr(machine, "bank3", &machine.region("maincpu")->base()[0x10000 + 0x8000]);
	549	machine.root_device().membank("bank3")->set_base(&machine.root_device().memregion("maincpu")->base()[0x10000 + 0x8000]);
550	550
551	551	/*
552	552
r14976	r14977
560	560	*/
561	561
562	562	{
563		UINT16 *rom = (UINT16*)machine.region("gfx1")->base();
	563	UINT16 *rom = (UINT16*)machine.root_device().memregion("gfx1")->base();
564	564	int i;
565	565
566	566	device_t *hd63484 = machine.device("hd63484");

src/mame/drivers/dynadice.c

r14976	r14977
294	294	static DRIVER_INIT( dynadice )
295	295	{
296	296	int i, j;
297		UINT8 *usr1 = machine.region("user1")->base();
298		UINT8 *cpu2 = machine.region("audiocpu")->base();
299		UINT8 *gfx1 = machine.region("gfx1")->base();
300		UINT8 *gfx2 = machine.region("gfx2")->base();
	297	UINT8 *usr1 = machine.root_device().memregion("user1")->base();
	298	UINT8 *cpu2 = machine.root_device().memregion("audiocpu")->base();
	299	UINT8 *gfx1 = machine.root_device().memregion("gfx1")->base();
	300	UINT8 *gfx2 = machine.root_device().memregion("gfx2")->base();
301	301
302	302	cpu2[0x0b] = 0x23;   /* bug in game code  Dec HL -> Inc HL*/
303	303

src/mame/drivers/ampoker2.c

r14976	r14977
1405	1405	static DRIVER_INIT( rabbitpk )
1406	1406	{
1407	1407
1408		UINT8 *rom = machine.region("maincpu")->base();
1409		int size = machine.region("maincpu")->bytes();
	1408	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	1409	int size = machine.root_device().memregion("maincpu")->bytes();
1410	1410	int start = 0;
1411	1411	int i;
1412	1412
r14976	r14977
1457	1457
1458	1458	*/
1459	1459
1460		UINT8 *rom = machine.region("maincpu")->base();
	1460	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1461	1461
1462	1462	/* NOP'ing the mortal jump... */
1463	1463	rom[0x154b] = 0x00;

src/mame/drivers/playmark.c

r14976	r14977
167	167	{
168	168	state->m_old_oki_bank = data & 7;
169	169
170		if (((state->m_old_oki_bank - 1) * 0x40000) < device->machine().region("oki")->bytes())
	170	if (((state->m_old_oki_bank - 1) * 0x40000) < state->memregion("oki")->bytes())
171	171	{
172	172	downcast<okim6295_device *>(device)->set_bank_base(0x40000 * (state->m_old_oki_bank - 1));
173	173	}
r14976	r14977
1678	1678	static DRIVER_INIT( bigtwin )
1679	1679	{
1680	1680	playmark_state *state = machine.driver_data<playmark_state>();
1681		UINT8 *playmark_PICROM_HEX = machine.region("user1")->base();
1682		UINT16 *playmark_PICROM = (UINT16 *)machine.region("audiocpu")->base();
	1681	UINT8 *playmark_PICROM_HEX = machine.root_device().memregion("user1")->base();
	1682	UINT16 *playmark_PICROM = (UINT16 *)state->memregion("audiocpu")->base();
1683	1683	INT32 offs, data;
1684	1684	UINT16 src_pos = 0;
1685	1685	UINT16 dst_pos = 0;

src/mame/drivers/jangou.c

r14976	r14977
89	89	/* guess: use the same resistor values as Crazy Climber (needs checking on the real HW) */
90	90	static PALETTE_INIT( jangou )
91	91	{
92		const UINT8 *color_prom = machine.region("proms")->base();
	92	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
93	93	static const int resistances_rg[3] = { 1000, 470, 220 };
94	94	static const int resistances_b [2] = { 470, 220 };
95	95	double weights_rg[3], weights_b[2];
r14976	r14977
168	168
169	169	static UINT8 jangou_gfx_nibble( running_machine &machine, UINT16 niboffset )
170	170	{
171		const UINT8 *const blit_rom = machine.region("gfx")->base();
	171	const UINT8 *const blit_rom = machine.root_device().memregion("gfx")->base();
172	172
173	173	if (niboffset & 1)
174	174	return (blit_rom[(niboffset >> 1) & 0xffff] & 0xf0) >> 4;
r14976	r14977
1371	1371	{
1372	1372	// this is WRONG
1373	1373	int A;
1374		UINT8 *ROM = machine.region("cpu0")->base();
	1374	UINT8 *ROM = machine.root_device().memregion("cpu0")->base();
1375	1375
1376	1376	unsigned char patn1[32] = {
1377	1377	0x00, 0xA0, 0x00, 0xA0, 0x00, 0xA0, 0x00, 0xA0, 0x00, 0xA0, 0x00, 0xA0, 0x00, 0xA0, 0x00, 0xA0,

src/mame/drivers/namcos21.c

r14976	r14977
313	313	static INT32
314	314	ReadPointROMData( running_machine &machine, unsigned offset )
315	315	{
316		const INT32 *pPointData = (INT32 *)machine.region( "user2" )->base();
	316	const INT32 *pPointData = (INT32 *)machine.root_device().memregion( "user2" )->base();
317	317	INT32 result = pPointData[offset];
318	318	return result;
319	319	}
r14976	r14977
590	590	InitDSP( running_machine &machine )
591	591	{
592	592	namcos21_state *state = machine.driver_data<namcos21_state>();
593		UINT16 *pMem = (UINT16 *)machine.region("dspmaster")->base();
	593	UINT16 *pMem = (UINT16 *)state->memregion("dspmaster")->base();
594	594	/**
595	595	* DSP BIOS tests "CPU ID" on startup
596	596	* "JAPAN (C)1990 NAMCO LTD. by H.F "
r14976	r14977
1222	1222
1223	1223	READ16_MEMBER(namcos21_state::winrun_dsp_pointrom_data_r)
1224	1224	{
1225		UINT16 *ptrom = (UINT16 *)machine().region("user2")->base();
	1225	UINT16 *ptrom = (UINT16 *)machine().root_device().memregion("user2")->base();
1226	1226	return ptrom[m_winrun_pointrom_addr++];
1227	1227	} /* winrun_dsp_pointrom_data_r */
1228	1228
r14976	r14977
1264	1264
1265	1265	READ16_MEMBER(namcos21_state::gpu_data_r)
1266	1266	{
1267		const UINT16 *pSrc = (UINT16 *)machine().region( "user3" )->base();
	1267	const UINT16 *pSrc = (UINT16 *)machine().root_device().memregion( "user3" )->base();
1268	1268	return pSrc[offset];
1269	1269	}
1270	1270
r14976	r14977
1282	1282	COMBINE_DATA( &m_winrun_dspbios[offset] );
1283	1283	if( offset==0xfff )
1284	1284	{
1285		UINT16 *mem = (UINT16 *)machine().region("dsp")->base();
	1285	UINT16 *mem = (UINT16 *)machine().root_device().memregion("dsp")->base();
1286	1286	memcpy( mem, m_winrun_dspbios, 0x2000 );
1287	1287	m_winrun_dsp_alive = 1;
1288	1288	}
r14976	r14977
2245	2245	namcos21_state *state = machine.driver_data<namcos21_state>();
2246	2246	namcos2_gametype = game_type;
2247	2247	state->m_pointram = auto_alloc_array(machine, UINT8, PTRAM_SIZE);
2248		state->m_mpDataROM = (UINT16 *)machine.region( "user1" )->base();
	2248	state->m_mpDataROM = (UINT16 *)state->memregion( "user1" )->base();
2249	2249	InitDSP(machine);
2250	2250	state->m_mbNeedsKickstart = 20;
2251	2251	if( game_type==NAMCOS21_CYBERSLED )
r14976	r14977
2257	2257	static DRIVER_INIT( winrun )
2258	2258	{
2259	2259	namcos21_state *state = machine.driver_data<namcos21_state>();
2260		UINT16 *pMem = (UINT16 *)machine.region("dsp")->base();
	2260	UINT16 *pMem = (UINT16 *)machine.root_device().memregion("dsp")->base();
2261	2261	int pc = 0;
2262	2262	pMem[pc++] = 0xff80; /* b */
2263	2263	pMem[pc++] = 0;
r14976	r14977
2265	2265	state->m_winrun_dspcomram = auto_alloc_array(machine, UINT16, 0x1000*2);
2266	2266
2267	2267	namcos2_gametype = NAMCOS21_WINRUN91;
2268		state->m_mpDataROM = (UINT16 *)machine.region( "user1" )->base();
	2268	state->m_mpDataROM = (UINT16 *)state->memregion( "user1" )->base();
2269	2269	state->m_pointram = auto_alloc_array(machine, UINT8, PTRAM_SIZE);
2270	2270	state->m_pointram_idx = 0;
2271	2271	state->m_mbNeedsKickstart = 0;
r14976	r14977
2289	2289
2290	2290	static DRIVER_INIT( solvalou )
2291	2291	{
2292		UINT16 *mem = (UINT16 *)machine.region("maincpu")->base();
	2292	UINT16 *mem = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2293	2293	mem[0x20ce4/2+1] = 0x0000; // $200128
2294	2294	mem[0x20cf4/2+0] = 0x4e71; // 2nd ptr_booting
2295	2295	mem[0x20cf4/2+1] = 0x4e71;
r14976	r14977
2301	2301	static DRIVER_INIT( driveyes )
2302	2302	{
2303	2303	namcos21_state *state = machine.driver_data<namcos21_state>();
2304		UINT16 *pMem = (UINT16 *)machine.region("dsp")->base();
	2304	UINT16 *pMem = (UINT16 *)machine.root_device().memregion("dsp")->base();
2305	2305	int pc = 0;
2306	2306	pMem[pc++] = 0xff80; /* b */
2307	2307	pMem[pc++] = 0;
2308	2308	state->m_winrun_dspcomram = auto_alloc_array(machine, UINT16, 0x1000*2);
2309	2309	namcos2_gametype = NAMCOS21_DRIVERS_EYES;
2310		state->m_mpDataROM = (UINT16 *)machine.region( "user1" )->base();
	2310	state->m_mpDataROM = (UINT16 *)state->memregion( "user1" )->base();
2311	2311	state->m_pointram = auto_alloc_array(machine, UINT8, PTRAM_SIZE);
2312	2312	state->m_pointram_idx = 0;
2313	2313	state->m_mbNeedsKickstart = 0;

src/mame/drivers/pgm.c

r14976	r14977
3570	3570
3571	3571	static void expand_32x32x5bpp(running_machine &machine)
3572	3572	{
3573		UINT8 *src = machine.region( "tiles" )->base();
	3573	UINT8 *src = machine.root_device().memregion( "tiles" )->base();
3574	3574	gfx_layout glcopy;
3575	3575	glcopy = *(&pgm32_charlayout);
3576	3576
3577		size_t  srcsize = machine.region( "tiles" )->bytes();
	3577	size_t  srcsize = machine.root_device().memregion( "tiles" )->bytes();
3578	3578	int cnt, pix;
3579	3579	size_t gfx2_size_needed = ((srcsize/5)*8)+0x1000;
3580	3580	UINT8 *dst = auto_alloc_array(machine, UINT8, gfx2_size_needed);
r14976	r14977
3613	3613	static void expand_colourdata( running_machine &machine )
3614	3614	{
3615	3615	pgm_state *state = machine.driver_data<pgm_state>();
3616		UINT8 *src = machine.region( "sprcol" )->base();
3617		size_t srcsize = machine.region( "sprcol" )->bytes();
	3616	UINT8 *src = machine.root_device().memregion( "sprcol" )->base();
	3617	size_t srcsize = state->memregion( "sprcol" )->bytes();
3618	3618	int cnt;
3619	3619	size_t needed = srcsize / 2 * 3;
3620	3620
r14976	r14977
3645	3645	{
3646	3646	pgm_state *state = machine.driver_data<pgm_state>();
3647	3647
3648		UINT8 *ROM = machine.region("maincpu")->base();
3649		if (set_bank) memory_set_bankptr(machine, "bank1", &ROM[0x100000]);
	3648	UINT8 *ROM = state->memregion("maincpu")->base();
	3649	if (set_bank) state->membank("bank1")->set_base(&ROM[0x100000]);
3650	3650
3651	3651	expand_32x32x5bpp(machine);
3652	3652	expand_colourdata(machine);

src/mame/drivers/pengadvb.c

r14976	r14977
60	60	case 0:
61	61	// BIOS
62	62	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x3fff, "bank1" );
63		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base());
	63	state->membank("bank1")->set_base(state->memregion("maincpu")->base());
64	64	break;
65	65
66	66	default:
r14976	r14977
75	75	// BIOS
76	76	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x4000, 0x5fff, "bank21" );
77	77	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x6000, 0x7fff, "bank22" );
78		memory_set_bankptr(machine, "bank21", machine.region("maincpu")->base() + 0x4000);
79		memory_set_bankptr(machine, "bank22", machine.region("maincpu")->base() + 0x4000 + 0x2000);
	78	state->membank("bank21")->set_base(machine.root_device().memregion("maincpu")->base() + 0x4000);
	79	state->membank("bank22")->set_base(machine.root_device().memregion("maincpu")->base() + 0x4000 + 0x2000);
80	80	break;
81	81
82	82	case 1:
83	83	// game
84	84	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x4000, 0x5fff, "bank21" );
85	85	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x6000, 0x7fff, "bank22" );
86		memory_set_bankptr(machine, "bank21", machine.region("game")->base() + state->m_mem_banks[0]*0x2000);
87		memory_set_bankptr(machine, "bank22", machine.region("game")->base() + state->m_mem_banks[1]*0x2000);
	86	state->membank("bank21")->set_base(machine.root_device().memregion("game")->base() + state->m_mem_banks[0]*0x2000);
	87	state->membank("bank22")->set_base(machine.root_device().memregion("game")->base() + state->m_mem_banks[1]*0x2000);
88	88	break;
89	89
90	90	default:
r14976	r14977
99	99	// game
100	100	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0x9fff, "bank31" );
101	101	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xa000, 0xbfff, "bank32" );
102		memory_set_bankptr(machine, "bank31", machine.region("game")->base() + state->m_mem_banks[2]*0x2000);
103		memory_set_bankptr(machine, "bank32", machine.region("game")->base() + state->m_mem_banks[3]*0x2000);
	102	state->membank("bank31")->set_base(machine.root_device().memregion("game")->base() + state->m_mem_banks[2]*0x2000);
	103	state->membank("bank32")->set_base(machine.root_device().memregion("game")->base() + state->m_mem_banks[3]*0x2000);
104	104	break;
105	105
106	106	default:
r14976	r14977
114	114	case 3:
115	115	// RAM
116	116	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xc000, 0xffff, "bank4" );
117		memory_set_bankptr(machine, "bank4", state->m_main_mem);
	117	state->membank("bank4")->set_base(state->m_main_mem);
118	118	break;
119	119
120	120	default:
r14976	r14977
289	289
290	290	static void pengadvb_decrypt(running_machine &machine, const char* region)
291	291	{
292		UINT8 *mem = machine.region(region)->base();
293		int memsize = machine.region(region)->bytes();
	292	UINT8 *mem = machine.root_device().memregion(region)->base();
	293	int memsize = machine.root_device().memregion(region)->bytes();
294	294	UINT8 *buf;
295	295	int i;
296	296

src/mame/drivers/capbowl.c

r14976	r14977
139	139	WRITE8_MEMBER(capbowl_state::capbowl_rom_select_w)
140	140	{
141	141	// 2009-11 FP: shall we add a check to be sure that bank < 6?
142		memory_set_bank(machine(), "bank1", ((data & 0x0c) >> 1) + (data & 0x01));
	142	membank("bank1")->set_entry(((data & 0x0c) >> 1) + (data & 0x01));
143	143	}
144	144
145	145
r14976	r14977
499	499
500	500	static DRIVER_INIT( capbowl )
501	501	{
502		UINT8 *ROM = machine.region("maincpu")->base();
	502	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
503	503
504	504	/* configure ROM banks in 0x0000-0x3fff */
505		memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
	505	machine.root_device().membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x4000);
506	506	}
507	507
508	508

src/mame/drivers/darius.c

r14976	r14977
274	274	static void reset_sound_region( running_machine &machine )
275	275	{
276	276	darius_state *state = machine.driver_data<darius_state>();
277		memory_set_bank(machine, "bank1", state->m_banknum);
	277	state->membank("bank1")->set_entry(state->m_banknum);
278	278	}
279	279
280	280	WRITE8_MEMBER(darius_state::sound_bankswitch_w)
r14976	r14977
842	842	{
843	843	darius_state *state = machine.driver_data<darius_state>();
844	844
845		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000, 0x8000);
846		memory_configure_bank(machine, "bank1", 4, 1, machine.region("audiocpu")->base(), 0x8000);
847		memory_set_bank(machine, "bank1", 4);
	845	state->membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x8000);
	846	state->membank("bank1")->configure_entry(4, state->memregion("audiocpu")->base());
	847	state->membank("bank1")->set_entry(4);
848	848
849	849	state->m_maincpu = machine.device("maincpu");
850	850	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
1275	1275	static DRIVER_INIT( darius )
1276	1276	{
1277	1277	/**** setup sound bank image ****/
1278		UINT8 *RAM = machine.region("audiocpu")->base();
	1278	UINT8 *RAM = machine.root_device().memregion("audiocpu")->base();
1279	1279	int  i;
1280	1280
1281	1281	for (i = 3; i >= 0; i--)

src/mame/drivers/ssingles.c

r14976	r14977
193	193	UINT32 tile_address;
194	194	UINT16 cell,palette;
195	195	UINT8 b0,b1;
196		const UINT8 *gfx = device->machine().region("gfx1")->base();
	196	const UINT8 *gfx = state->memregion("gfx1")->base();
197	197
198	198	for(cx=0;cx<x_count;++cx)
199	199	{
r14976	r14977
231	231	UINT32 tile_address;
232	232	UINT16 cell,palette;
233	233	UINT8 b0,b1;
234		const UINT8 *gfx = device->machine().region("gfx1")->base();
	234	const UINT8 *gfx = state->memregion("gfx1")->base();
235	235
236	236	for(cx=0;cx<x_count;++cx)
237	237	{
r14976	r14977
293	293
294	294	WRITE8_MEMBER(ssingles_state::ssingles_videoram_w)
295	295	{
296		UINT8 *vram = machine().region("vram")->base();
	296	UINT8 *vram = memregion("vram")->base();
297	297	vram[offset] = data;
298	298	m_videoram[offset]=data;
299	299	}
300	300
301	301	WRITE8_MEMBER(ssingles_state::ssingles_colorram_w)
302	302	{
303		UINT8 *cram = machine().region("cram")->base();
	303	UINT8 *cram = memregion("cram")->base();
304	304	cram[offset] = data;
305	305	m_colorram[offset]=data;
306	306	}

src/mame/drivers/sub.c

r14976	r14977
386	386
387	387	static PALETTE_INIT( sub )
388	388	{
389		const UINT8 *color_prom = machine.region("proms")->base();
	389	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
390	390	int i;
391		UINT8* lookup = machine.region("proms2")->base();
	391	UINT8* lookup = machine.root_device().memregion("proms2")->base();
392	392
393	393	/* allocate the colortable */
394	394	machine.colortable = colortable_alloc(machine, 0x100);

src/mame/drivers/cbasebal.c

r14976	r14977
32	32
33	33	/* bits 0-4 select ROM bank */
34	34	//logerror("%04x: bankswitch %02x\n", cpu_get_pc(&space.device()), data);
35		memory_set_bank(machine(), "bank1", data & 0x1f);
	35	membank("bank1")->set_entry(data & 0x1f);
36	36
37	37	/* bit 5 used but unknown */
38	38
r14976	r14977
243	243	{
244	244	cbasebal_state *state = machine.driver_data<cbasebal_state>();
245	245
246		memory_configure_bank(machine, "bank1", 0, 32, machine.region("maincpu")->base() + 0x10000, 0x4000);
	246	state->membank("bank1")->configure_entries(0, 32, state->memregion("maincpu")->base() + 0x10000, 0x4000);
247	247
248	248	state->save_item(NAME(state->m_rambank));
249	249	state->save_item(NAME(state->m_tilebank));

src/mame/drivers/st0016.c

r14976	r14977
70	70
71	71	WRITE8_MEMBER(st0016_state::st0016_rom_bank_w)
72	72	{
73		memory_set_bankptr(machine(),  "bank1", machine().region("maincpu")->base() + (data* 0x4000) + 0x10000 );
	73	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + (data* 0x4000) + 0x10000 );
74	74	st0016_rom_bank=data;
75	75	}
76	76
r14976	r14977
681	681	static DRIVER_INIT(mayjinsn)
682	682	{
683	683	st0016_game=4|0x80;
684		memory_set_bankptr(machine, "bank2", machine.region("user1")->base());
	684	machine.root_device().membank("bank2")->set_base(machine.root_device().memregion("user1")->base());
685	685	}
686	686
687	687	static DRIVER_INIT(mayjisn2)
688	688	{
689	689	st0016_game=4;
690		memory_set_bankptr(machine, "bank2", machine.region("user1")->base());
	690	machine.root_device().membank("bank2")->set_base(machine.root_device().memregion("user1")->base());
691	691	}
692	692
693	693	/*************************************

src/mame/drivers/skyarmy.c

r14976	r14977
87	87
88	88	static PALETTE_INIT( skyarmy )
89	89	{
90		const UINT8 *color_prom = machine.region("proms")->base();
	90	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
91	91	int i;
92	92
93	93	for (i = 0;i < 32;i++)

src/mame/drivers/suprgolf.c

r14976	r14977
257	257	static WRITE8_DEVICE_HANDLER( rom_bank_select_w )
258	258	{
259	259	suprgolf_state *state = device->machine().driver_data<suprgolf_state>();
260		UINT8 *region_base = device->machine().region("user1")->base();
	260	UINT8 *region_base = state->memregion("user1")->base();
261	261
262	262	state->m_rom_bank = data;
263	263
264	264	//popmessage("%08x %02x",((data & 0x3f) * 0x4000),data);
265	265
266	266	//  mame_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,cpu_get_previouspc(&space->device()));
267		memory_set_bankptr(device->machine(), "bank2", region_base + (data&0x3f ) * 0x4000);
	267	state->membank("bank2")->set_base(region_base + (data&0x3f ) * 0x4000);
268	268
269	269	state->m_msm_nmi_mask = data & 0x40;
270	270	state->flip_screen_set(data & 0x80);
r14976	r14977
272	272
273	273	WRITE8_MEMBER(suprgolf_state::rom2_bank_select_w)
274	274	{
275		UINT8 *region_base = machine().region("user2")->base();
	275	UINT8 *region_base = memregion("user2")->base();
276	276	//  mame_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,cpu_get_previouspc(&space.device()));
277	277
278		memory_set_bankptr(machine(), "bank1", region_base + (data&0x0f) * 0x4000);
	278	membank("bank1")->set_base(region_base + (data&0x0f) * 0x4000);
279	279
280	280	if(data & 0xf0)
281	281	printf("Rom bank select 2 with data %02x activated\n",data);
r14976	r14977
638	638
639	639	static DRIVER_INIT( suprgolf )
640	640	{
641		UINT8 *ROM = machine.region("user2")->base();
	641	UINT8 *ROM = machine.root_device().memregion("user2")->base();
642	642
643	643	ROM[0x74f4-0x4000] = 0x00;
644	644	ROM[0x74f5-0x4000] = 0x00;

src/mame/drivers/ksayakyu.c

r14976	r14977
81	81	xxxxxxx  - unused ?
82	82
83	83	*/
84		memory_set_bank(machine(), "bank1", data & 0x01);
	84	membank("bank1")->set_entry(data & 0x01);
85	85	}
86	86
87	87	WRITE8_MEMBER(ksayakyu_state::latch_w)
r14976	r14977
250	250	static MACHINE_START( ksayakyu )
251	251	{
252	252	ksayakyu_state *state = machine.driver_data<ksayakyu_state>();
253		UINT8 *ROM = machine.region("maincpu")->base();
	253	UINT8 *ROM = state->memregion("maincpu")->base();
254	254
255		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x4000);
	255	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
256	256
257	257	state->save_item(NAME(state->m_sound_status));
258	258	state->save_item(NAME(state->m_video_ctrl));

src/mame/drivers/qix.c

r14976	r14977
1278	1278	********************************/
1279	1279
1280	1280	i = 0;
1281		//patch = machine.region("user1")->base();
1282		rom = machine.region("maincpu")->base();
	1281	//patch = machine.root_device().memregion("user1")->base();
	1282	rom = machine.root_device().memregion("maincpu")->base();
1283	1283	decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1284	1284
1285	1285	mainspace->set_decrypted_region(0xa000, 0xffff, decrypted);
r14976	r14977
1291	1291	}
1292	1292
1293	1293	i = 0;
1294		//patch = machine.region("user2")->base();
1295		rom = machine.region("videocpu")->base();
	1294	//patch = machine.root_device().memregion("user2")->base();
	1295	rom = machine.root_device().memregion("videocpu")->base();
1296	1296	decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1297	1297
1298	1298	videospace->set_decrypted_region(0xa000, 0xffff, decrypted);
r14976	r14977
1308	1308	static DRIVER_INIT( zookeep )
1309	1309	{
1310	1310	/* configure the banking */
1311		memory_configure_bank(machine, "bank1", 0, 1, machine.region("videocpu")->base() + 0xa000, 0);
1312		memory_configure_bank(machine, "bank1", 1, 1, machine.region("videocpu")->base() + 0x10000, 0);
1313		memory_set_bank(machine, "bank1", 0);
	1311	machine.root_device().membank("bank1")->configure_entry(0, machine.root_device().memregion("videocpu")->base() + 0xa000);
	1312	machine.root_device().membank("bank1")->configure_entry(1, machine.root_device().memregion("videocpu")->base() + 0x10000);
	1313	machine.root_device().membank("bank1")->set_entry(0);
1314	1314	}
1315	1315
1316	1316

src/mame/drivers/himesiki.c

r14976	r14977
91	91
92	92	WRITE8_MEMBER(himesiki_state::himesiki_rombank_w)
93	93	{
94		memory_set_bank(machine(), "bank1", ((data & 0x08) >> 3));
	94	membank("bank1")->set_entry(((data & 0x08) >> 3));
95	95
96	96	if (data & 0xf7)
97	97	logerror("p06_w %02x\n", data);
r14976	r14977
269	269	static MACHINE_START( himesiki )
270	270	{
271	271	himesiki_state *state = machine.driver_data<himesiki_state>();
272		UINT8 *ROM = machine.region("maincpu")->base();
	272	UINT8 *ROM = state->memregion("maincpu")->base();
273	273
274		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x4000);
	274	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
275	275
276	276	state->m_subcpu = machine.device("sub");
277	277

src/mame/drivers/battlex.c

r14976	r14977
315	315
316	316	static DRIVER_INIT( battlex )
317	317	{
318		UINT8 *colormask = machine.region("user1")->base();
319		UINT8 *gfxdata = machine.region("user2")->base();
320		UINT8 *dest = machine.region("gfx1")->base();
	318	UINT8 *colormask = machine.root_device().memregion("user1")->base();
	319	UINT8 *gfxdata = machine.root_device().memregion("user2")->base();
	320	UINT8 *dest = machine.root_device().memregion("gfx1")->base();
321	321
322	322	int tile, line, bit;
323	323

src/mame/drivers/adp.c

r14976	r14977
319	319
320	320	// hack to handle acrt rom
321	321	{
322		UINT16 *rom = (UINT16*)machine.region("gfx1")->base();
	322	UINT16 *rom = (UINT16*)state->memregion("gfx1")->base();
323	323	int i;
324	324
325	325	device_t *hd63484 = machine.device("hd63484");
r14976	r14977
637	637
638	638	READ8_MEMBER(adp_state::h63484_rom_r)
639	639	{
640		UINT8 *rom = machine().region("gfx1")->base();
	640	UINT8 *rom = memregion("gfx1")->base();
641	641
642	642	return rom[offset];
643	643	}

src/mame/drivers/konamigq.c

r14976	r14977
321	321
322	322	psx_driver_init(machine);
323	323
324		state->m_p_n_pcmram = machine.region( "shared" )->base() + 0x80000;
	324	state->m_p_n_pcmram = state->memregion( "shared" )->base() + 0x80000;
325	325	}
326	326
327	327	static void konamigq_exit(running_machine &machine)

src/mame/drivers/snesb.c

r14976	r14977
650	650	{
651	651	snesb_state *state = machine.driver_data<snesb_state>();
652	652	INT32 i;
653		UINT8 *rom = machine.region("user3")->base();
	653	UINT8 *rom = state->memregion("user3")->base();
654	654
655	655	for (i = 0; i < 0x400000; i++)
656	656	{
r14976	r14977
671	671	static DRIVER_INIT( ffight2b )
672	672	{
673	673	INT32 i;
674		UINT8 *rom = machine.region("user3")->base();
	674	UINT8 *rom = machine.root_device().memregion("user3")->base();
675	675
676	676	for(i = 0; i < 0x200000; i++)
677	677	{
r14976	r14977
715	715	static DRIVER_INIT( iron )
716	716	{
717	717	INT32 i;
718		UINT8 *rom = machine.region("user3")->base();
	718	UINT8 *rom = machine.root_device().memregion("user3")->base();
719	719
720	720	for (i = 0; i < 0x140000; i++)
721	721	{
r14976	r14977
740	740
741	741	static DRIVER_INIT( denseib )
742	742	{
743		UINT8 *rom = machine.region("user3")->base();
	743	UINT8 *rom = machine.root_device().memregion("user3")->base();
744	744	INT32 i;
745	745
746	746	for (i = 0; i < 0x200000; i++)
r14976	r14977
790	790	static DRIVER_INIT( sblast2b )
791	791	{
792	792	int i, cipherText, plainText, newAddress;
793		UINT8 *src = machine.region("user7")->base();
794		UINT8 *dst = machine.region("user3")->base();
	793	UINT8 *src = machine.root_device().memregion("user7")->base();
	794	UINT8 *dst = machine.root_device().memregion("user3")->base();
795	795
796	796	for (i =0; i < 0x80000 * 3; i++)
797	797	{
r14976	r14977
841	841	static DRIVER_INIT( endless )
842	842	{
843	843	INT32 i;
844		UINT8 *rom = machine.region("user3")->base();
	844	UINT8 *rom = machine.root_device().memregion("user3")->base();
845	845
846	846	/* there is more to this, 0x800 based block swaps? */
847	847	for (i = 0; i < 0x200000; i++)

src/mame/drivers/pcxt.c

r14976	r14977
109	109	pcxt_state *state = screen.machine().driver_data<pcxt_state>();
110	110	int x,y;
111	111	int yi;
112		const UINT8 *bg_rom = screen.machine().region("gfx2")->base();
	112	const UINT8 *bg_rom = state->memregion("gfx2")->base();
113	113
114	114	//popmessage("%04x",m_start_offs);
115	115
r14976	r14977
199	199	if (newbank != m_bank)
200	200	{
201	201	m_bank = newbank;
202		memory_set_bankptr(machine(),  "bank1",machine().region("game_prg")->base() + 0x10000 * m_bank );
	202	membank("bank1")->set_base(machine().root_device().memregion("game_prg")->base() + 0x10000 * m_bank );
203	203	}
204	204
205	205	m_lastvalue = data;

src/mame/drivers/mcatadv.c

r14976	r14977
206	206
207	207	WRITE8_MEMBER(mcatadv_state::mcatadv_sound_bw_w)
208	208	{
209		memory_set_bank(machine(), "bank1", data);
	209	membank("bank1")->set_entry(data);
210	210	}
211	211
212	212
r14976	r14977
428	428	static MACHINE_START( mcatadv )
429	429	{
430	430	mcatadv_state *state = machine.driver_data<mcatadv_state>();
431		UINT8 *ROM = machine.region("soundcpu")->base();
	431	UINT8 *ROM = state->memregion("soundcpu")->base();
432	432
433		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
434		memory_set_bank(machine, "bank1", 1);
	433	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
	434	state->membank("bank1")->set_entry(1);
435	435
436	436	state->m_maincpu = machine.device("maincpu");
437	437	state->m_soundcpu = machine.device("soundcpu");

src/mame/drivers/toaplan2.c

r14976	r14977
431	431
432	432	static DRIVER_INIT( fixeightbl )
433	433	{
434		UINT8 *ROM = machine.region("oki")->base();
	434	UINT8 *ROM = machine.root_device().memregion("oki")->base();
435	435
436		memory_configure_bank(machine, "bank1", 0, 5, &ROM[0x30000], 0x10000);
	436	machine.root_device().membank("bank1")->configure_entries(0, 5, &ROM[0x30000], 0x10000);
437	437	}
438	438
439	439
r14976	r14977
447	447
448	448	static DRIVER_INIT( pipibibsbl )
449	449	{
450		UINT16 *ROM = (UINT16 *)(machine.region("maincpu")->base());
	450	UINT16 *ROM = (UINT16 *)(machine.root_device().memregion("maincpu")->base());
451	451
452	452	for (int i = 0; i < (0x040000/2); i += 4)
453	453	{
r14976	r14977
461	461
462	462	static DRIVER_INIT( bgaregga )
463	463	{
464		UINT8 *Z80 = machine.region("audiocpu")->base();
	464	UINT8 *Z80 = machine.root_device().memregion("audiocpu")->base();
465	465
466	466	// seems to only use banks 0x0a to 0x0f
467		memory_configure_bank(machine, "bank1", 8, 8, Z80, 0x4000);
	467	machine.root_device().membank("bank1")->configure_entries(8, 8, Z80, 0x4000);
468	468	}
469	469
470	470
471	471	static DRIVER_INIT( batrider )
472	472	{
473	473	toaplan2_state *state = machine.driver_data<toaplan2_state>();
474		UINT8 *Z80 = machine.region("audiocpu")->base();
	474	UINT8 *Z80 = state->memregion("audiocpu")->base();
475	475
476		memory_configure_bank(machine, "bank1", 0, 16, Z80, 0x4000);
	476	state->membank("bank1")->configure_entries(0, 16, Z80, 0x4000);
477	477	state->m_sndirq_line = 4;
478	478	}
479	479
r14976	r14977
781	781	if (ACCESSING_BITS_0_7)
782	782	{
783	783	data &= 7;
784		if (data <= 4) memory_set_bank(machine(), "bank1", data);
	784	if (data <= 4) membank("bank1")->set_entry(data);
785	785	}
786	786	}
787	787
r14976	r14977
840	840
841	841	WRITE8_MEMBER(toaplan2_state::raizing_z80_bankswitch_w)
842	842	{
843		memory_set_bank(machine(), "bank1", data & 0x0f);
	843	membank("bank1")->set_entry(data & 0x0f);
844	844	}
845	845
846	846
r14976	r14977
909	909
910	910	READ16_MEMBER(toaplan2_state::batrider_z80rom_r)
911	911	{
912		UINT8 *Z80 = machine().region("audiocpu")->base();
	912	UINT8 *Z80 = memregion("audiocpu")->base();
913	913
914	914	return Z80[offset];
915	915	}

src/mame/drivers/cinemat.c

r14976	r14977
273	273
274	274	WRITE8_MEMBER(cinemat_state::qb3_ram_bank_w)
275	275	{
276		memory_set_bank(machine(), "bank1", cpu_get_reg(machine().device("maincpu"), CCPU_P) & 3);
	276	membank("bank1")->set_entry(cpu_get_reg(machine().device("maincpu"), CCPU_P) & 3);
277	277	}
278	278
279	279
r14976	r14977
1487	1487	machine.device("maincpu")->memory().space(AS_IO)->install_read_handler(0x0f, 0x0f, read8_delegate(FUNC(cinemat_state::qb3_frame_r),state));
1488	1488	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x00, 0x00, write8_delegate(FUNC(cinemat_state::qb3_ram_bank_w),state));
1489	1489
1490		memory_configure_bank(machine, "bank1", 0, 4, state->m_rambase, 0x100*2);
	1490	state->membank("bank1")->configure_entries(0, 4, state->m_rambase, 0x100*2);
1491	1491	}
1492	1492
1493	1493

src/mame/drivers/mjkjidai.c

r14976	r14977
74	74
75	75	state->m_playing = 0;
76	76	state->m_stream = device->machine().sound().stream_alloc(*device, 0, 1, device->clock(), state, mjkjidai_adpcm_callback);
77		state->m_base = machine.region("adpcm")->base();
	77	state->m_base = machine.root_device().memregion("adpcm")->base();
78	78	state->m_adpcm.reset();
79	79	}
80	80

src/mame/drivers/jailbrek.c

r14976	r14977
404	404
405	405	static DRIVER_INIT( jailbrek )
406	406	{
407		UINT8 *SPEECH_ROM = machine.region("vlm")->base();
	407	UINT8 *SPEECH_ROM = machine.root_device().memregion("vlm")->base();
408	408	int ind;
409	409
410	410	/*
r14976	r14977
416	416	represents address line A13.)
417	417	*/
418	418
419		if (machine.region("vlm")->bytes() == 0x4000)
	419	if (machine.root_device().memregion("vlm")->bytes() == 0x4000)
420	420	{
421	421	for (ind = 0; ind < 0x2000; ++ind)
422	422	{

src/mame/drivers/su2000.c

r14976	r14977
270	270	state->m_pc_ram = auto_alloc_array_clear(machine, UINT32, PC_RAM_SIZE);
271	271
272	272	/* Conventional memory */
273		memory_set_bankptr(machine, "mem_bank", state->m_pc_ram);
	273	state->membank("mem_bank")->set_base(state->m_pc_ram);
274	274
275	275	/* HMA */
276	276	offs_t ram_limit = 0x100000 + PC_RAM_SIZE - 0x0a0000;
277	277	space->install_read_bank(0x100000, ram_limit - 1, "hma_bank");
278	278	space->install_write_bank(0x100000, ram_limit - 1, "hma_bank");
279		memory_set_bankptr(machine, "hma_bank", state->m_pc_ram + 0xa0000);
	279	state->membank("hma_bank")->set_base(state->m_pc_ram + 0xa0000);
280	280
281	281	device_set_irq_callback(machine.device("maincpu"), pc_irq_callback);
282	282

src/mame/drivers/gaelco.c

r14976	r14977
61	61
62	62	WRITE16_MEMBER(gaelco_state::OKIM6295_bankswitch_w)
63	63	{
64		UINT8 *RAM = machine().region("oki")->base();
	64	UINT8 *RAM = memregion("oki")->base();
65	65
66	66	if (ACCESSING_BITS_0_7)
67	67	{

src/mame/drivers/wecleman.c

r14976	r14977
1218	1218	{
1219	1219	const char *region       = "gfx1";   // sprites
1220	1220
1221		const UINT32 len = machine.region(region)->bytes();
1222		UINT8 *src     = machine.region(region)->base() + len / 2 - 1;
1223		UINT8 *dst     = machine.region(region)->base() + len - 1;
	1221	const UINT32 len = machine.root_device().memregion(region)->bytes();
	1222	UINT8 *src     = machine.root_device().memregion(region)->base() + len / 2 - 1;
	1223	UINT8 *dst     = machine.root_device().memregion(region)->base() + len - 1;
1224	1224
1225	1225	while(dst > src)
1226	1226	{
r14976	r14977
1251	1251	wecleman_state *state = machine.driver_data<wecleman_state>();
1252	1252	int i, len;
1253	1253	UINT8 *RAM;
1254		//  UINT16 *RAM1 = (UINT16 *) machine.region("maincpu")->base();   /* Main CPU patches */
	1254	//  UINT16 *RAM1 = (UINT16 *) machine.root_device().memregion("maincpu")->base();   /* Main CPU patches */
1255	1255	//  RAM1[0x08c2/2] = 0x601e;    // faster self test
1256	1256
1257	1257	/* Decode GFX Roms - Compensate for the address lines scrambling */
r14976	r14977
1261	1261	I hope you'll appreciate this effort!  */
1262	1262
1263	1263	/* let's swap even and odd *pixels* of the sprites */
1264		RAM = machine.region("gfx1")->base();
1265		len = machine.region("gfx1")->bytes();
	1264	RAM = machine.root_device().memregion("gfx1")->base();
	1265	len = state->memregion("gfx1")->bytes();
1266	1266	for (i = 0; i < len; i ++)
1267	1267	{
1268	1268	/* TODO: could be wrong, colors have to be fixed.       */
r14976	r14977
1271	1271	RAM[i] = BITSWAP8(RAM[i],7,0,1,2,3,4,5,6);
1272	1272	}
1273	1273
1274		bitswap(machine, machine.region("gfx1")->base(), machine.region("gfx1")->bytes(),
	1274	bitswap(machine, machine.root_device().memregion("gfx1")->base(), machine.root_device().memregion("gfx1")->bytes(),
1275	1275	0,1,20,19,18,17,14,9,16,6,4,7,8,15,10,11,13,5,12,3,2);
1276	1276
1277	1277	/* Now we can unpack each nibble of the sprites into a pixel (one byte) */
1278	1278	wecleman_unpack_sprites(machine);
1279	1279
1280	1280	/* Bg & Fg & Txt */
1281		bitswap(machine, machine.region("gfx2")->base(), machine.region("gfx2")->bytes(),
	1281	bitswap(machine, machine.root_device().memregion("gfx2")->base(), machine.root_device().memregion("gfx2")->bytes(),
1282	1282	20,19,18,17,16,15,12,7,14,4,2,5,6,13,8,9,11,3,10,1,0);
1283	1283
1284	1284	/* Road */
1285		bitswap(machine, machine.region("gfx3")->base(), machine.region("gfx3")->bytes(),
	1285	bitswap(machine, machine.root_device().memregion("gfx3")->base(), machine.root_device().memregion("gfx3")->bytes(),
1286	1286	20,19,18,17,16,15,14,7,12,4,2,5,6,13,8,9,11,3,10,1,0);
1287	1287
1288	1288	state->m_spr_color_offs = 0x40;
r14976	r14977
1347	1347	UINT8 *base, *temp;
1348	1348	int i;
1349	1349
1350		base = machine.region("gfx1")->base();   // sprites
	1350	base = machine.root_device().memregion("gfx1")->base();   // sprites
1351	1351	temp = auto_alloc_array(machine, UINT8,  bank_size );
1352	1352
1353	1353	for( i = num16_banks; i >0; i-- ){
r14976	r14977
1393	1393	static DRIVER_INIT( hotchase )
1394	1394	{
1395	1395	wecleman_state *state = machine.driver_data<wecleman_state>();
1396		//  UINT16 *RAM1 = (UINT16) machine.region("maincpu")->base(); /* Main CPU patches */
	1396	//  UINT16 *RAM1 = (UINT16) machine.root_device().memregion("maincpu")->base(); /* Main CPU patches */
1397	1397	//  RAM[0x1140/2] = 0x0015; RAM[0x195c/2] = 0x601A; // faster self test
1398	1398
1399	1399	UINT8 *RAM;
r14976	r14977
1401	1401	/* Decode GFX Roms */
1402	1402
1403	1403	/* Let's swap even and odd bytes of the sprites gfx roms */
1404		RAM = machine.region("gfx1")->base();
	1404	RAM = machine.root_device().memregion("gfx1")->base();
1405	1405
1406	1406	/* Now we can unpack each nibble of the sprites into a pixel (one byte) */
1407	1407	hotchase_sprite_decode(machine,3,0x80000*2);   // num banks, bank len
1408	1408
1409	1409	/* Let's copy the second half of the fg layer gfx (charset) over the first */
1410		RAM = machine.region("gfx3")->base();
	1410	RAM = state->memregion("gfx3")->base();
1411	1411	memcpy(&RAM[0], &RAM[0x10000/2], 0x10000/2);
1412	1412
1413	1413	state->m_spr_color_offs = 0;

src/mame/drivers/kas89.c

r14976	r14977
865	865	static DRIVER_INIT(kas89)
866	866	{
867	867	int i;
868		UINT8 *mem = machine.region("maincpu")->base();
869		int memsize = machine.region("maincpu")->bytes();
	868	UINT8 *mem = machine.root_device().memregion("maincpu")->base();
	869	int memsize = machine.root_device().memregion("maincpu")->bytes();
870	870	UINT8 *buf;
871	871
872	872	/* Unscrambling data lines */

src/mame/drivers/dmndrby.c

r14976	r14977
338	338	static VIDEO_START(dderby)
339	339	{
340	340	dmndrby_state *state = machine.driver_data<dmndrby_state>();
341		state->m_racetrack_tilemap_rom = machine.region("user1")->base();
	341	state->m_racetrack_tilemap_rom = state->memregion("user1")->base();
342	342	state->m_racetrack_tilemap = tilemap_create(machine,get_dmndrby_tile_info,tilemap_scan_rows,16,16, 16, 512);
343	343	state->m_racetrack_tilemap->mark_all_dirty();
344	344
r14976	r14977
444	444	// copied from elsewhere. surely incorrect
445	445	static PALETTE_INIT( dmnderby )
446	446	{
447		const UINT8 *color_prom = machine.region("proms")->base();
	447	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
448	448	static const int resistances_rg[3] = { 1000, 470, 220 };
449	449	static const int resistances_b [2] = { 470, 220 };
450	450	double rweights[3], gweights[3], bweights[2];
r14976	r14977
486	486	}
487	487
488	488	/* color_prom now points to the beginning of the lookup table */
489		color_prom = machine.region("proms2")->base();
	489	color_prom = machine.root_device().memregion("proms2")->base();
490	490
491	491	/* normal tiles use colors 0-15 */
492	492	for (i = 0x000; i < 0x300; i++)

src/mame/drivers/voyager.c

r14976	r14977
234	234	//if (data & 0x10)     // enable RAM access to region 0xf0000 - 0xfffff
235	235	if ((data & 0x50) | (data & 0xA0))
236	236	{
237		memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
	237	state->membank("bank1")->set_base(state->m_bios_ram);
238	238	}
239	239	else            // disable RAM access (reads go to BIOS ROM)
240	240	{
r14976	r14977
247	247	}
248	248	#endif
249	249
250		//memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base() + 0x10000);
251		memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base());
	250	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("bios")->base() + 0x10000);
	251	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("bios")->base());
252	252	}
253	253	break;
254	254	}
r14976	r14977
720	720
721	721	static MACHINE_RESET(voyager)
722	722	{
723		//memory_set_bankptr(machine, "bank1", machine.region("bios")->base() + 0x10000);
724		memory_set_bankptr(machine, "bank1", machine.region("bios")->base());
	723	//machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base() + 0x10000);
	724	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base());
725	725	}
726	726
727	727	static void set_gate_a20(running_machine &machine, int a20)

src/mame/drivers/lastduel.c

r14976	r14977
175	175
176	176	WRITE8_MEMBER(lastduel_state::mg_bankswitch_w)
177	177	{
178		memory_set_bank(machine(), "bank1", data & 0x01);
	178	membank("bank1")->set_entry(data & 0x01);
179	179	}
180	180
181	181	static ADDRESS_MAP_START( madgear_sound_map, AS_PROGRAM, 8, lastduel_state )
r14976	r14977
479	479
480	480	static MACHINE_START( madgear )
481	481	{
482		UINT8 *ROM = machine.region("audiocpu")->base();
	482	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
483	483
484		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x4000);
	484	machine.root_device().membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
485	485
486	486	MACHINE_START_CALL(lastduel);
487	487	}

src/mame/drivers/cmmb.c

r14976	r14977
95	95
96	96	READ8_MEMBER(cmmb_state::cmmb_charram_r)
97	97	{
98		UINT8 *GFX = machine().region("gfx")->base();
	98	UINT8 *GFX = memregion("gfx")->base();
99	99
100	100	return GFX[offset];
101	101	}
102	102
103	103	WRITE8_MEMBER(cmmb_state::cmmb_charram_w)
104	104	{
105		UINT8 *GFX = machine().region("gfx")->base();
	105	UINT8 *GFX = memregion("gfx")->base();
106	106
107	107	GFX[offset] = data;
108	108
r14976	r14977
137	137
138	138	/*
139	139	{
140		UINT8 *ROM = space->machine().region("maincpu")->base();
	140	UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
141	141	UINT32 bankaddress;
142	142
143	143	bankaddress = 0x10000 + (0x10000 * (data & 0x03));
144		memory_set_bankptr(space->machine(), "bank1", &ROM[bankaddress]);
	144	space->machine().root_device().membank("bank1")->set_base(&ROM[bankaddress]);
145	145	}
146	146	*/
147	147
r14976	r14977
152	152	{
153	153	case 0x01:
154	154	{
155		UINT8 *ROM = machine().region("maincpu")->base();
	155	UINT8 *ROM = memregion("maincpu")->base();
156	156	UINT32 bankaddress;
157	157
158	158	bankaddress = 0x1c000 + (0x10000 * (data & 0x03));
159		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	159	membank("bank1")->set_base(&ROM[bankaddress]);
160	160	}
161	161	break;
162	162	case 0x03:

src/mame/drivers/drgnmst.c

r14976	r14977
486	486
487	487	static DRIVER_INIT( drgnmst )
488	488	{
489		UINT8 *drgnmst_PICROM_HEX = machine.region("user1")->base();
490		UINT16 *drgnmst_PICROM = (UINT16 *)machine.region("audiocpu")->base();
491		UINT8 *drgnmst_PCM = machine.region("oki1")->base();
	489	UINT8 *drgnmst_PICROM_HEX = machine.root_device().memregion("user1")->base();
	490	UINT16 *drgnmst_PICROM = (UINT16 *)machine.root_device().memregion("audiocpu")->base();
	491	UINT8 *drgnmst_PCM = machine.root_device().memregion("oki1")->base();
492	492	INT32   offs, data;
493	493	UINT16  src_pos = 0;
494	494	UINT16  dst_pos = 0;

src/mame/drivers/boxer.c

r14976	r14977
126	126
127	127	for (n = 0; n < 2; n++)
128	128	{
129		const UINT8* p = machine.region(n == 0 ? "user1" : "user2")->base();
	129	const UINT8* p = state->memregion(n == 0 ? "user1" : "user2")->base();
130	130
131	131	int i, j;
132	132

src/mame/drivers/roul.c

r14976	r14977
88	88
89	89	static PALETTE_INIT( roul )
90	90	{
91		const UINT8 *color_prom = machine.region("proms")->base();
	91	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
92	92	int bit6, bit7, bit0, bit1, r, g, b;
93	93	int i;
94	94

src/mame/drivers/cischeat.c

r14976	r14977
1776	1776	*/
1777	1777	static void cischeat_untangle_sprites(running_machine &machine, const char *region)
1778	1778	{
1779		UINT8      *src = machine.region(region)->base();
1780		const UINT8   *end = src + machine.region(region)->bytes();
	1779	UINT8      *src = machine.root_device().memregion(region)->base();
	1780	const UINT8   *end = src + machine.root_device().memregion(region)->bytes();
1781	1781
1782	1782	while (src < end)
1783	1783	{

src/mame/drivers/freekick.c

r14976	r14977
68	68
69	69	WRITE8_MEMBER(freekick_state::pbillrd_bankswitch_w)
70	70	{
71		memory_set_bank(machine(), "bank1", data & 1);
	71	membank("bank1")->set_entry(data & 1);
72	72	}
73	73
74	74	WRITE8_MEMBER(freekick_state::nmi_enable_w)
r14976	r14977
509	509	static READ8_DEVICE_HANDLER( snd_rom_r )
510	510	{
511	511	freekick_state *state = device->machine().driver_data<freekick_state>();
512		return device->machine().region("user1")->base()[state->m_romaddr & 0x7fff];
	512	return state->memregion("user1")->base()[state->m_romaddr & 0x7fff];
513	513	}
514	514
515	515	static const ppi8255_interface ppi8255_intf[2] =
r14976	r14977
599	599
600	600	static MACHINE_START( pbillrd )
601	601	{
602		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x4000);
	602	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
603	603
604	604	MACHINE_START_CALL(freekick);
605	605	}
r14976	r14977
1100	1100	static DRIVER_INIT(gigasb)
1101	1101	{
1102	1102	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1103		space->set_decrypted_region(0x0000, 0xbfff, machine.region("maincpu")->base() + 0x10000);
	1103	space->set_decrypted_region(0x0000, 0xbfff, machine.root_device().memregion("maincpu")->base() + 0x10000);
1104	1104	}
1105	1105
1106	1106

src/mame/drivers/redclash.c

r14976	r14977
539	539	static DRIVER_INIT( redclash )
540	540	{
541	541	int i,j;
542		const UINT8 *src = machine.region("gfx2")->base();
543		UINT8 *dst = machine.region("gfx3")->base();
544		int len = machine.region("gfx3")->bytes();
	542	const UINT8 *src = machine.root_device().memregion("gfx2")->base();
	543	UINT8 *dst = machine.root_device().memregion("gfx3")->base();
	544	int len = machine.root_device().memregion("gfx3")->bytes();
545	545
546	546	/* rearrange the sprite graphics */
547	547	for (i = 0;i < len;i++)

src/mame/drivers/wgp.c

r14976	r14977
608	608	static void reset_sound_region( running_machine &machine )   /* assumes Z80 sandwiched between the 68Ks */
609	609	{
610	610	wgp_state *state = machine.driver_data<wgp_state>();
611		memory_set_bank(machine, "bank10", state->m_banknum);
	611	state->membank("bank10")->set_entry(state->m_banknum);
612	612	}
613	613
614	614	WRITE8_MEMBER(wgp_state::sound_bankswitch_w)
r14976	r14977
946	946	{
947	947	wgp_state *state = machine.driver_data<wgp_state>();
948	948
949		memory_configure_bank(machine, "bank10", 0, 4, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	949	state->membank("bank10")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0xc000, 0x4000);
950	950
951	951	state->m_maincpu = machine.device("maincpu");
952	952	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
1262	1262	#if 0
1263	1263	/* Patch for coding error that causes corrupt data in
1264	1264	sprite tilemapping area from $4083c0-847f */
1265		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	1265	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1266	1266	ROM[0x25dc / 2] = 0x0602;   // faulty value is 0x0206
1267	1267	#endif
1268	1268	}
r14976	r14977
1270	1270	static DRIVER_INIT( wgp2 )
1271	1271	{
1272	1272	/* Code patches to prevent failure in memory checks */
1273		UINT16 *ROM = (UINT16 *)machine.region("sub")->base();
	1273	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("sub")->base();
1274	1274	ROM[0x8008 / 2] = 0x0;
1275	1275	ROM[0x8010 / 2] = 0x0;
1276	1276	}

src/mame/drivers/welltris.c

r14976	r14977
322	322
323	323	WRITE8_MEMBER(welltris_state::welltris_sh_bankswitch_w)
324	324	{
325		UINT8 *rom = machine().region("audiocpu")->base() + 0x10000;
	325	UINT8 *rom = memregion("audiocpu")->base() + 0x10000;
326	326
327		memory_set_bankptr(machine(), "bank1",rom + (data & 0x03) * 0x8000);
	327	membank("bank1")->set_base(rom + (data & 0x03) * 0x8000);
328	328	}
329	329
330	330
r14976	r14977
689	689	{
690	690	#if WELLTRIS_4P_HACK
691	691	/* A Hack which shows 4 player mode in code which is disabled */
692		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	692	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
693	693	RAM[0xB91C/2] = 0x4e71;
694	694	RAM[0xB91E/2] = 0x4e71;
695	695	#endif

src/mame/drivers/scregg.c

r14976	r14977
396	396	{
397	397	// rd2.rdh and rd1.rdj are bitswapped, but not rd3.rdg .. are they really from the same board?
398	398	int x;
399		UINT8 *src = machine.region( "gfx1" )->base();
	399	UINT8 *src = machine.root_device().memregion( "gfx1" )->base();
400	400
401	401	for (x = 0x2000; x < 0x6000; x++)
402	402	{

src/mame/drivers/taitoair.c

r14976	r14977
378	378	static void reset_sound_region( running_machine &machine )
379	379	{
380	380	taitoair_state *state = machine.driver_data<taitoair_state>();
381		memory_set_bank(machine, "bank1", state->m_banknum);
	381	state->membank("bank1")->set_entry(state->m_banknum);
382	382	}
383	383
384	384	WRITE8_MEMBER(taitoair_state::sound_bankswitch_w)
r14976	r14977
669	669	static MACHINE_START( taitoair )
670	670	{
671	671	taitoair_state *state = machine.driver_data<taitoair_state>();
672		UINT8 *ROM = machine.region("audiocpu")->base();
	672	UINT8 *ROM = state->memregion("audiocpu")->base();
673	673	int i;
674	674
675		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0xc000], 0x4000);
	675	state->membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
676	676
677	677	state->m_audiocpu = machine.device("audiocpu");
678	678	state->m_dsp = machine.device("dsp");

src/mame/drivers/aquarium.c

r14976	r14977
68	68
69	69	WRITE8_MEMBER(aquarium_state::aquarium_z80_bank_w)
70	70	{
71		memory_set_bank(machine(), "bank1", data & 0x07);
	71	membank("bank1")->set_entry(data & 0x07);
72	72	}
73	73
74	74	static UINT8 aquarium_snd_bitswap( UINT8 scrambled_data )
r14976	r14977
239	239
240	240	static DRIVER_INIT( aquarium )
241	241	{
242		UINT8 *Z80 = machine.region("audiocpu")->base();
	242	UINT8 *Z80 = machine.root_device().memregion("audiocpu")->base();
243	243
244	244	/* The BG tiles are 5bpp, this rearranges the data from
245	245	the roms containing the 1bpp data so we can decode it
246	246	correctly */
247		UINT8 *DAT2 = machine.region("gfx1")->base() + 0x080000;
248		UINT8 *DAT = machine.region("user1")->base();
	247	UINT8 *DAT2 = machine.root_device().memregion("gfx1")->base() + 0x080000;
	248	UINT8 *DAT = machine.root_device().memregion("user1")->base();
249	249	int len = 0x0200000;
250	250
251	251	for (len = 0; len < 0x020000; len++)
r14976	r14977
260	260	DAT2[len * 4 + 2] |= (DAT[len] & 0x01) << 3;
261	261	}
262	262
263		DAT2 = machine.region("gfx4")->base() + 0x080000;
264		DAT = machine.region("user2")->base();
	263	DAT2 = machine.root_device().memregion("gfx4")->base() + 0x080000;
	264	DAT = machine.root_device().memregion("user2")->base();
265	265
266	266	for (len = 0; len < 0x020000; len++)
267	267	{
r14976	r14977
276	276	}
277	277
278	278	/* configure and set up the sound bank */
279		memory_configure_bank(machine, "bank1", 0, 7, &Z80[0x18000], 0x8000);
280		memory_set_bank(machine, "bank1", 1);
	279	machine.root_device().membank("bank1")->configure_entries(0, 7, &Z80[0x18000], 0x8000);
	280	machine.root_device().membank("bank1")->set_entry(1);
281	281	}
282	282
283	283

src/mame/drivers/metro.c

r14976	r14977
397	397	WRITE8_MEMBER(metro_state::metro_sound_rombank_w)
398	398	{
399	399	int bankaddress;
400		UINT8 *ROM = machine().region("audiocpu")->base();
	400	UINT8 *ROM = memregion("audiocpu")->base();
401	401
402	402	bankaddress = 0x10000-0x4000 + ((data >> 4) & 0x03) * 0x4000;
403	403	if (bankaddress < 0x10000) bankaddress = 0x0000;
404	404
405		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	405	membank("bank1")->set_base(&ROM[bankaddress]);
406	406	}
407	407
408	408	WRITE8_MEMBER(metro_state::daitorid_sound_rombank_w)
409	409	{
410	410	int bankaddress;
411		UINT8 *ROM = machine().region("audiocpu")->base();
	411	UINT8 *ROM = memregion("audiocpu")->base();
412	412
413	413	bankaddress = 0x10000-0x4000 + ((data >> 4) & 0x07) * 0x4000;
414	414	if (bankaddress < 0x10000) bankaddress = 0x10000;
415	415
416		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	416	membank("bank1")->set_base(&ROM[bankaddress]);
417	417	}
418	418
419	419
r14976	r14977
590	590
591	591	READ16_MEMBER(metro_state::metro_bankedrom_r)
592	592	{
593		UINT8 *ROM = machine().region("gfx1")->base();
594		size_t len = machine().region("gfx1")->bytes();
	593	UINT8 *ROM = memregion("gfx1")->base();
	594	size_t len = memregion("gfx1")->bytes();
595	595
596	596	offset = offset * 2 + 0x10000 * (*m_rombank);
597	597
r14976	r14977
680	680
681	681	if (offset == 0x0c / 2)
682	682	{
683		UINT8 *src     = machine().region("gfx1")->base();
684		size_t src_len = machine().region("gfx1")->bytes();
	683	UINT8 *src     = memregion("gfx1")->base();
	684	size_t src_len = memregion("gfx1")->bytes();
685	685
686	686	UINT32 tmap     = (m_blitter_regs[0x00 / 2] << 16) + m_blitter_regs[0x02 / 2];
687	687	UINT32 src_offs = (m_blitter_regs[0x04 / 2] << 16) + m_blitter_regs[0x06 / 2];
r14976	r14977
1692	1692
1693	1693	WRITE8_MEMBER(metro_state::blzntrnd_sh_bankswitch_w)
1694	1694	{
1695		UINT8 *RAM = machine().region("audiocpu")->base();
	1695	UINT8 *RAM = memregion("audiocpu")->base();
1696	1696	int bankaddress;
1697	1697
1698	1698	bankaddress = 0x10000 + (data & 0x03) * 0x4000;
1699		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress]);
	1699	membank("bank1")->set_base(&RAM[bankaddress]);
1700	1700	}
1701	1701
1702	1702	static void blzntrnd_irqhandler(device_t *device, int irq)
r14976	r14977
5995	5995	{
5996	5996	metro_state *state = machine.driver_data<metro_state>();
5997	5997
5998		const size_t len = machine.region("gfx1")->bytes();
5999		UINT8 *src       = machine.region("gfx1")->base();
	5998	const size_t len = machine.root_device().memregion("gfx1")->bytes();
	5999	UINT8 *src       = state->memregion("gfx1")->base();
6000	6000	UINT8 *end       = src + len;
6001	6001
6002	6002	while (src < end)
r14976	r14977
6016	6016
6017	6017	static DRIVER_INIT( dharmak )
6018	6018	{
6019		UINT8 *src = machine.region( "gfx1" )->base();
	6019	UINT8 *src = machine.root_device().memregion( "gfx1" )->base();
6020	6020	int i;
6021	6021
6022	6022	for (i = 0; i < 0x200000; i += 4)

src/mame/drivers/angelkds.c

r14976	r14977
140	140
141	141	WRITE8_MEMBER(angelkds_state::angelkds_cpu_bank_write)
142	142	{
143		memory_set_bank(machine(), "bank1", data & 0x0f);   // shall we check (data & 0x0f) < # of available banks (8 or 10 resp.)?
	143	membank("bank1")->set_entry(data & 0x0f);   // shall we check (data & 0x0f) < # of available banks (8 or 10 resp.)?
144	144	}
145	145
146	146
r14976	r14977
744	744
745	745	static DRIVER_INIT( angelkds )
746	746	{
747		UINT8 *RAM = machine.region("user1")->base();
748		memory_configure_bank(machine, "bank1", 0, 8, &RAM[0x0000], 0x4000);
	747	UINT8 *RAM = machine.root_device().memregion("user1")->base();
	748	machine.root_device().membank("bank1")->configure_entries(0, 8, &RAM[0x0000], 0x4000);
749	749	}
750	750
751	751	static DRIVER_INIT( spcpostn )
752	752	{
753		UINT8 *RAM = machine.region("user1")->base();
	753	UINT8 *RAM = machine.root_device().memregion("user1")->base();
754	754
755	755	sega_317_0005_decode(machine, "maincpu");
756		memory_configure_bank(machine, "bank1", 0, 10, &RAM[0x0000], 0x4000);
	756	machine.root_device().membank("bank1")->configure_entries(0, 10, &RAM[0x0000], 0x4000);
757	757	}
758	758
759	759

src/mame/drivers/hshavoc.c

r14976	r14977
119	119	{
120	120
121	121	int x;
122		UINT16 *src = (UINT16 *)machine.region("maincpu")->base();
	122	UINT16 *src = (UINT16 *)machine.root_device().memregion("maincpu")->base();
123	123
124	124	static const UINT16 typedat[16] = {
125	125	1,1,1,1, 1,1,1,1,

src/mame/drivers/jrpacman.c

r14976	r14977
392	392	{ 0,0 }
393	393	};
394	394
395		UINT8 *RAM = machine.region("maincpu")->base();
	395	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
396	396	int i, j, A;
397	397
398	398	for (i = A = 0; table[i].count; i++)

src/mame/drivers/nightgal.c

r14976	r14977
112	112
113	113	static UINT8 nightgal_gfx_nibble( running_machine &machine, int niboffset )
114	114	{
115		UINT8 *blit_rom = machine.region("gfx1")->base();
	115	UINT8 *blit_rom = machine.root_device().memregion("gfx1")->base();
116	116
117	117	if (niboffset & 1)
118	118	{
r14976	r14977
250	250	/* guess: use the same resistor values as Crazy Climber (needs checking on the real HW) */
251	251	static PALETTE_INIT( nightgal )
252	252	{
253		const UINT8 *color_prom = machine.region("proms")->base();
	253	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
254	254	static const int resistances_rg[3] = { 1000, 470, 220 };
255	255	static const int resistances_b [2] = { 470, 220 };
256	256	double weights_rg[3], weights_b[2];
r14976	r14977
1226	1226
1227	1227	static DRIVER_INIT( royalqn )
1228	1228	{
1229		UINT8 *ROM = machine.region("sub")->base();
	1229	UINT8 *ROM = machine.root_device().memregion("sub")->base();
1230	1230
1231	1231	/* patch open bus / protection */
1232	1232	ROM[0xc27e] = 0x02;
r14976	r14977
1235	1235
1236	1236	static DRIVER_INIT( ngalsumr )
1237	1237	{
1238		UINT8 *ROM = machine.region("sub")->base();
	1238	UINT8 *ROM = machine.root_device().memregion("sub")->base();
1239	1239
1240	1240	/* patch protection */
1241	1241	ROM[0xd6ce] = 0x02;

src/mame/drivers/surpratk.c

r14976	r14977
191	191	static MACHINE_START( surpratk )
192	192	{
193	193	surpratk_state *state = machine.driver_data<surpratk_state>();
194		UINT8 *ROM = machine.region("maincpu")->base();
	194	UINT8 *ROM = state->memregion("maincpu")->base();
195	195
196		memory_configure_bank(machine, "bank1", 0, 28, &ROM[0x10000], 0x2000);
197		memory_configure_bank(machine, "bank1", 28, 4, &ROM[0x08000], 0x2000);
198		memory_set_bank(machine, "bank1", 0);
	196	state->membank("bank1")->configure_entries(0, 28, &ROM[0x10000], 0x2000);
	197	state->membank("bank1")->configure_entries(28, 4, &ROM[0x08000], 0x2000);
	198	state->membank("bank1")->set_entry(0);
199	199
200	200	state->m_generic_paletteram_8.allocate(0x1000);
201	201
r14976	r14977
323	323	static KONAMI_SETLINES_CALLBACK( surpratk_banking )
324	324	{
325	325	logerror("%04x: setlines %02x\n",cpu_get_pc(device), lines);
326		memory_set_bank(device->machine(), "bank1", lines & 0x1f);
	326	device->machine().root_device().membank("bank1")->set_entry(lines & 0x1f);
327	327	}
328	328
329	329

src/mame/drivers/jongkyo.c

r14976	r14977
124	124	if (offset & 1)
125	125	m_rom_bank |= mask;
126	126
127		memory_set_bank(machine(), "bank1", m_rom_bank);
	127	membank("bank1")->set_entry(m_rom_bank);
128	128	}
129	129
130	130	WRITE8_MEMBER(jongkyo_state::mux_w)
r14976	r14977
430	430	static PALETTE_INIT(jongkyo)
431	431	{
432	432	int i;
433		UINT8* proms = machine.region("proms")->base();
	433	UINT8* proms = machine.root_device().memregion("proms")->base();
434	434	for (i = 0; i < 0x40; i++)
435	435	{
436	436	int data = proms[i];
r14976	r14977
550	550	static DRIVER_INIT( jongkyo )
551	551	{
552	552	int i;
553		UINT8 *rom = machine.region("maincpu")->base();
	553	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
554	554
555	555	/* first of all, do a simple bitswap */
556	556	for (i = 0x6000; i < 0x9000; ++i)

src/mame/drivers/littlerb.c

r14976	r14977
503	503	if((scanline % 2) == 0)
504	504	{
505	505	UINT8 res;
506		UINT8 *sample_rom = timer.machine().region("samples")->base();
	506	UINT8 *sample_rom = state->memregion("samples")->base();
507	507
508	508	res = sample_rom[state->m_sound_pointer_l|(state->m_sound_index_l<<10)|0x40000];
509	509	dac_signed_w(state->m_dacl, 0, res);

src/mame/drivers/eolith.c

r14976	r14977
1309	1309	//it fails compares with memories:
1310	1310	//$4002d338 -> $4002d348 .... $4002d33f -> $4002d34f
1311	1311	//related with bits 0x100 - 0x200 read at startup from input(0) ?
1312		UINT32 *rombase = (UINT32*)machine.region("maincpu")->base();
	1312	UINT32 *rombase = (UINT32*)state->memregion("maincpu")->base();
1313	1313	rombase[0x14f00/4] = (rombase[0x14f00/4] & 0xffff) | 0x03000000; /* Change BR to NOP */
1314	1314
1315	1315	state->m_coin_counter_bit = 0x2000;
r14976	r14977
1319	1319	static DRIVER_INIT( hidctch2 )
1320	1320	{
1321	1321	//it fails compares in memory like in landbrka
1322		UINT32 *rombase = (UINT32*)machine.region("maincpu")->base();
	1322	UINT32 *rombase = (UINT32*)machine.root_device().memregion("maincpu")->base();
1323	1323	rombase[0xbcc8/4] = (rombase[0xbcc8/4] & 0xffff) | 0x03000000; /* Change BR to NOP */
1324	1324	init_eolith_speedup(machine);
1325	1325	}

src/mame/drivers/namcos23.c

r14976	r14977
3070	3070	{
3071	3071	namcos23_state *state = machine.driver_data<namcos23_state>();
3072	3072	render_t &render = state->m_render;
3073		state->m_ptrom  = (const UINT32 *)machine.region("pointrom")->base();
3074		state->m_tmlrom = (const UINT16 *)machine.region("textilemapl")->base();
3075		state->m_tmhrom = machine.region("textilemaph")->base();
3076		state->m_texrom = machine.region("textile")->base();
	3073	state->m_ptrom  = (const UINT32 *)machine.root_device().memregion("pointrom")->base();
	3074	state->m_tmlrom = (const UINT16 *)machine.root_device().memregion("textilemapl")->base();
	3075	state->m_tmhrom = machine.root_device().memregion("textilemaph")->base();
	3076	state->m_texrom = machine.root_device().memregion("textile")->base();
3077	3077
3078		state->m_tileid_mask = (machine.region("textilemapl")->bytes()/2 - 1) & ~0xff; // Used for y masking
3079		state->m_tile_mask = machine.region("textile")->bytes()/256 - 1;
3080		state->m_ptrom_limit = machine.region("pointrom")->bytes()/4;
	3078	state->m_tileid_mask = (machine.root_device().memregion("textilemapl")->bytes()/2 - 1) & ~0xff; // Used for y masking
	3079	state->m_tile_mask = machine.root_device().memregion("textile")->bytes()/256 - 1;
	3080	state->m_ptrom_limit = state->memregion("pointrom")->bytes()/4;
3081	3081
3082	3082	state->m_mi_rd = state->m_mi_wr = state->m_im_rd = state->m_im_wr = 0;
3083	3083	state->m_jvssense = 1;

src/mame/drivers/chihiro.c

r14976	r14977
884	884
885	885	logerror("baseboard: read sector lba %08x\n",lba);
886	886	off=(lba&0x7ff)*512;
887		data=machine().region("others")->base();
	887	data=machine().root_device().memregion("others")->base();
888	888	memcpy(buffer,data+off,512);
889	889	return 1;
890	890	}

src/mame/drivers/commando.c

r14976	r14977
517	517	static DRIVER_INIT( commando )
518	518	{
519	519	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
520		UINT8 *rom = machine.region("maincpu")->base();
	520	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
521	521	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0xc000);
522	522	int A;
523	523
r14976	r14977
537	537	static DRIVER_INIT( spaceinv )
538	538	{
539	539	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
540		UINT8 *rom = machine.region("maincpu")->base();
	540	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
541	541	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0xc000);
542	542	int A;
543	543

src/mame/drivers/atarisy2.c

r14976	r14977
336	336	COMBINE_DATA(&newword);
337	337	m_bankselect[offset] = newword;
338	338
339		base = &machine().region("maincpu")->base()[bankoffset[(newword >> 10) & 0x3f]];
	339	base = &machine().root_device().memregion("maincpu")->base()[bankoffset[(newword >> 10) & 0x3f]];
340	340	memcpy(offset ? m_rombank2 : m_rombank1, base, 0x2000);
341	341	}
342	342
r14976	r14977
3180	3180	{
3181	3181	int i;
3182	3182	atarisy2_state *state = machine.driver_data<atarisy2_state>();
3183		UINT8 *cpu1 = machine.region("maincpu")->base();
	3183	UINT8 *cpu1 = state->memregion("maincpu")->base();
3184	3184
3185	3185	slapstic_init(machine, 105);
3186	3186
r14976	r14977
3216	3216	{
3217	3217	atarisy2_state *state = machine.driver_data<atarisy2_state>();
3218	3218	int i;
3219		UINT8 *cpu1 = machine.region("maincpu")->base();
	3219	UINT8 *cpu1 = state->memregion("maincpu")->base();
3220	3220
3221	3221	slapstic_init(machine, 108);
3222	3222
r14976	r14977
3233	3233	{
3234	3234	int i;
3235	3235	atarisy2_state *state = machine.driver_data<atarisy2_state>();
3236		UINT8 *cpu1 = machine.region("maincpu")->base();
	3236	UINT8 *cpu1 = state->memregion("maincpu")->base();
3237	3237
3238	3238	slapstic_init(machine, 109);
3239	3239

src/mame/drivers/ninjakd2.c

r14976	r14977
175	175	static MACHINE_RESET( ninjakd2 )
176	176	{
177	177	/* initialize main Z80 bank */
178		memory_configure_bank(machine, "bank1", 0, 8, machine.region("maincpu")->base() + 0x10000, 0x4000);
179		memory_set_bank(machine, "bank1", 0);
	178	machine.root_device().membank("bank1")->configure_entries(0, 8, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
	179	machine.root_device().membank("bank1")->set_entry(0);
180	180	}
181	181
182	182	static void robokid_init_banks(running_machine &machine)
183	183	{
184	184	/* initialize main Z80 bank */
185		memory_configure_bank(machine, "bank1", 0,  2, machine.region("maincpu")->base(), 0x4000);
186		memory_configure_bank(machine, "bank1", 2, 14, machine.region("maincpu")->base() + 0x10000, 0x4000);
187		memory_set_bank(machine, "bank1", 0);
	185	machine.root_device().membank("bank1")->configure_entries(0,  2, machine.root_device().memregion("maincpu")->base(), 0x4000);
	186	machine.root_device().membank("bank1")->configure_entries(2, 14, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
	187	machine.root_device().membank("bank1")->set_entry(0);
188	188	}
189	189
190	190	static MACHINE_RESET( robokid )
r14976	r14977
202	202
203	203	WRITE8_MEMBER(ninjakd2_state::ninjakd2_bankselect_w)
204	204	{
205		memory_set_bank(machine(), "bank1", data & 0x7);
	205	membank("bank1")->set_entry(data & 0x7);
206	206	}
207	207
208	208	WRITE8_MEMBER(ninjakd2_state::robokid_bankselect_w)
209	209	{
210		memory_set_bank(machine(), "bank1", data & 0xf);
	210	membank("bank1")->set_entry(data & 0xf);
211	211	}
212	212
213	213
r14976	r14977
228	228	{
229	229	ninjakd2_state *state = device.machine().driver_data<ninjakd2_state>();
230	230	running_machine &machine = device.machine();
231		const UINT8* const rom = machine.region("pcm")->base();
232		const int length = machine.region("pcm")->bytes();
	231	const UINT8* const rom = machine.root_device().memregion("pcm")->base();
	232	const int length = state->memregion("pcm")->bytes();
233	233	INT16* sampledata = auto_alloc_array(machine, INT16, length);
234	234
235	235	int i;
r14976	r14977
244	244	WRITE8_MEMBER(ninjakd2_state::ninjakd2_pcm_play_w)
245	245	{
246	246	samples_device *samples = machine().device<samples_device>("pcm");
247		const UINT8* const rom = machine().region("pcm")->base();
	247	const UINT8* const rom = memregion("pcm")->base();
248	248
249	249	// only Ninja Kid II uses this
250	250	if (rom)
251	251	{
252		const int length = machine().region("pcm")->bytes();
	252	const int length = memregion("pcm")->bytes();
253	253
254	254	const int start = data << 8;
255	255
r14976	r14977
1425	1425
1426	1426	static void lineswap_gfx_roms(running_machine &machine, const char *region, const int bit)
1427	1427	{
1428		const int length = machine.region(region)->bytes();
	1428	const int length = machine.root_device().memregion(region)->bytes();
1429	1429
1430		UINT8* const src = machine.region(region)->base();
	1430	UINT8* const src = machine.root_device().memregion(region)->base();
1431	1431
1432	1432	UINT8* const temp = auto_alloc_array(machine, UINT8, length);
1433	1433
r14976	r14977
1472	1472	static DRIVER_INIT( bootleg )
1473	1473	{
1474	1474	address_space *space = machine.device("soundcpu")->memory().space(AS_PROGRAM);
1475		space->set_decrypted_region(0x0000, 0x7fff, machine.region("soundcpu")->base() + 0x10000);
	1475	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("soundcpu")->base() + 0x10000);
1476	1476
1477	1477	gfx_unscramble(machine);
1478	1478	}

src/mame/drivers/mjsister.c

r14976	r14977
166	166	static TIMER_CALLBACK( dac_callback )
167	167	{
168	168	mjsister_state *state = machine.driver_data<mjsister_state>();
169		UINT8 *DACROM = machine.region("samples")->base();
	169	UINT8 *DACROM = state->memregion("samples")->base();
170	170
171	171	dac_data_w(state->m_dac, DACROM[(state->m_dac_bank * 0x10000 + state->m_dac_adr++) & 0x1ffff]);
172	172
r14976	r14977
224	224	if (tmp != m_colorbank)
225	225	m_screen_redraw = 1;
226	226
227		memory_set_bank(machine(), "bank1", m_rombank0 * 2 + m_rombank1);
	227	membank("bank1")->set_entry(m_rombank0 * 2 + m_rombank1);
228	228	}
229	229
230	230	WRITE8_MEMBER(mjsister_state::mjsister_banksel2_w)
r14976	r14977
242	242	logerror("%04x p31_w:%02x\n", cpu_get_pc(&space.device()), data);
243	243	}
244	244
245		memory_set_bank(machine(), "bank1", m_rombank0 * 2 + m_rombank1);
	245	membank("bank1")->set_entry(m_rombank0 * 2 + m_rombank1);
246	246	}
247	247
248	248	WRITE8_MEMBER(mjsister_state::mjsister_input_sel1_w)
r14976	r14977
449	449	static MACHINE_START( mjsister )
450	450	{
451	451	mjsister_state *state = machine.driver_data<mjsister_state>();
452		UINT8 *ROM = machine.region("maincpu")->base();
	452	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
453	453
454		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x8000);
	454	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x8000);
455	455
456	456	state->m_maincpu = machine.device("maincpu");
457	457	state->m_dac = machine.device("dac");

src/mame/drivers/yunsung8.c

r14976	r14977
49	49
50	50	m_layers_ctrl = data & 0x30;   // Layers enable
51	51
52		memory_set_bank(machine(), "bank1", data & 0x07);
	52	membank("bank1")->set_entry(data & 0x07);
53	53
54	54	if (data & ~0x37)
55	55	logerror("CPU #0 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
r14976	r14977
98	98	{
99	99	msm5205_reset_w(device, data & 0x20);
100	100
101		memory_set_bank(device->machine(), "bank2", data & 0x07);
	101	device->machine().root_device().membank("bank2")->set_entry(data & 0x07);
102	102
103	103	if (data != (data & (~0x27)))
104	104	logerror("%s: Bank %02X\n", device->machine().describe_context(), data);
r14976	r14977
466	466	static MACHINE_START( yunsung8 )
467	467	{
468	468	yunsung8_state *state = machine.driver_data<yunsung8_state>();
469		UINT8 *MAIN = machine.region("maincpu")->base();
470		UINT8 *AUDIO = machine.region("audiocpu")->base();
	469	UINT8 *MAIN = machine.root_device().memregion("maincpu")->base();
	470	UINT8 *AUDIO = machine.root_device().memregion("audiocpu")->base();
471	471
472	472	state->m_videoram_0 = state->m_videoram + 0x0000;   // Ram is banked
473	473	state->m_videoram_1 = state->m_videoram + 0x2000;
474	474
475		memory_configure_bank(machine, "bank1", 0, 3, &MAIN[0x00000], 0x4000);
476		memory_configure_bank(machine, "bank1", 3, 5, &MAIN[0x10000], 0x4000);
477		memory_configure_bank(machine, "bank2", 0, 3, &AUDIO[0x00000], 0x4000);
478		memory_configure_bank(machine, "bank2", 3, 5, &AUDIO[0x10000], 0x4000);
	475	state->membank("bank1")->configure_entries(0, 3, &MAIN[0x00000], 0x4000);
	476	state->membank("bank1")->configure_entries(3, 5, &MAIN[0x10000], 0x4000);
	477	state->membank("bank2")->configure_entries(0, 3, &AUDIO[0x00000], 0x4000);
	478	state->membank("bank2")->configure_entries(3, 5, &AUDIO[0x10000], 0x4000);
479	479
480	480	state->m_audiocpu = machine.device("audiocpu");
481	481

src/mame/drivers/wheelfir.c

r14976	r14977
378	378	cputag_set_input_line(machine(), "maincpu", 1, HOLD_LINE);
379	379
380	380	{
381		UINT8 *rom = machine().region("gfx1")->base();
	381	UINT8 *rom = memregion("gfx1")->base();
382	382
383	383	int width = machine().primary_screen->width();
384	384	int height = machine().primary_screen->height();
r14976	r14977
788	788	state->m_zoom_table[i]=-1;
789	789	}
790	790
791		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	791	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
792	792
793	793	for(int j=0;j<400;++j)
794	794	{
r14976	r14977
870	870
871	871	static DRIVER_INIT(wheelfir)
872	872	{
873		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	873	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
874	874	RAM[0xdd3da/2] = 0x4e71; //hack
875	875	}
876	876

src/mame/drivers/jaguar.c

r14976	r14977
491	491	static MACHINE_RESET( cojag )
492	492	{
493	493	cojag_state *state = machine.driver_data<cojag_state>();
494		UINT8 *rom = machine.region("user2")->base();
	494	UINT8 *rom = state->memregion("user2")->base();
495	495
496	496	/* 68020 only: copy the interrupt vectors into RAM */
497	497	if (!cojag_is_r3000)
r14976	r14977
503	503	/* graphics banks */
504	504	if (cojag_is_r3000)
505	505	{
506		memory_configure_bank(machine, "bank1", 0, 2, rom + 0x800000, 0x400000);
507		memory_set_bank(machine, "bank1", 0);
	506	state->membank("bank1")->configure_entries(0, 2, rom + 0x800000, 0x400000);
	507	state->membank("bank1")->set_entry(0);
508	508	}
509		memory_configure_bank(machine, "bank8", 0, 2, rom + 0x800000, 0x400000);
510		memory_set_bank(machine, "bank8", 0);
	509	state->membank("bank8")->configure_entries(0, 2, rom + 0x800000, 0x400000);
	510	state->membank("bank8")->set_entry(0);
511	511
512	512	/* sound banks */
513		memory_configure_bank(machine, "bank2", 0, 8, rom + 0x000000, 0x200000);
514		memory_configure_bank(machine, "bank9", 0, 8, rom + 0x000000, 0x200000);
515		memory_set_bank(machine, "bank2", 0);
516		memory_set_bank(machine, "bank9", 0);
	513	state->membank("bank2")->configure_entries(0, 8, rom + 0x000000, 0x200000);
	514	state->membank("bank9")->configure_entries(0, 8, rom + 0x000000, 0x200000);
	515	state->membank("bank2")->set_entry(0);
	516	state->membank("bank9")->set_entry(0);
517	517	}
518	518
519	519	/* clear any spinuntil stuff */
r14976	r14977
719	719	}
720	720
721	721	/* adjust banking */
722		if (machine().region("user2")->base())
	722	if (machine().root_device().memregion("user2")->base())
723	723	{
724		memory_set_bank(machine(), "bank2", (data >> 1) & 7);
725		memory_set_bank(machine(), "bank9", (data >> 1) & 7);
	724	membank("bank2")->set_entry((data >> 1) & 7);
	725	membank("bank9")->set_entry((data >> 1) & 7);
726	726	}
727	727
728	728	COMBINE_DATA(&m_misc_control_data);
r14976	r14977
899	899	logerror("%08X:latch_w(%X)\n", cpu_get_previouspc(&space.device()), data);
900	900
901	901	/* adjust banking */
902		if (machine().region("user2")->base())
	902	if (machine().root_device().memregion("user2")->base())
903	903	{
904	904	if (cojag_is_r3000)
905		memory_set_bank(machine(), "bank1", data & 1);
906		memory_set_bank(machine(), "bank8", data & 1);
	905	membank("bank1")->set_entry(data & 1);
	906	membank("bank8")->set_entry(data & 1);
907	907	}
908	908	}
909	909
r14976	r14977
1831	1831
1832	1832	static void jaguar_fix_endian( running_machine &machine, UINT32 addr, UINT32 size )
1833	1833	{
1834		UINT8 j[4], *RAM = machine.region("maincpu")->base();
	1834	UINT8 j[4], *RAM = machine.root_device().memregion("maincpu")->base();
1835	1835	UINT32 i;
1836	1836	size += addr;
1837	1837	logerror("File Loaded to address range %X to %X\n",addr,size-1);
r14976	r14977
1871	1871	memset(jaguar_shared_ram, 0, 0x200000);
1872	1872	quickload_size = MIN(quickload_size, 0x200000 - quickload_begin);
1873	1873
1874		image.fread( &image.device().machine().region("maincpu")->base()[quickload_begin], quickload_size);
	1874	image.fread( &image.device().machine().root_device().memregion("maincpu")->base()[quickload_begin], quickload_size);
1875	1875
1876	1876	jaguar_fix_endian(image.device().machine(), quickload_begin, quickload_size);
1877	1877
r14976	r14977
1916	1916	{
1917	1917	memset(jaguar_shared_ram, 0, 0x200000);
1918	1918	image.fseek(0, SEEK_SET);
1919		image.fread( &image.device().machine().region("maincpu")->base()[start-skip], quickload_size);
	1919	image.fread( &image.device().machine().root_device().memregion("maincpu")->base()[start-skip], quickload_size);
1920	1920	quickload_begin = start;
1921	1921	jaguar_fix_endian(image.device().machine(), (start-skip)&0xfffffc, quickload_size);
1922	1922	}
r14976	r14977
1955	1955	}
1956	1956
1957	1957	/* Load cart into memory */
1958		image.fread( &image.device().machine().region("maincpu")->base()[0x800000+load_offset], size);
	1958	image.fread( &image.device().machine().root_device().memregion("maincpu")->base()[0x800000+load_offset], size);
1959	1959	}
1960	1960	else
1961	1961	{

src/mame/drivers/onetwo.c

r14976	r14977
120	120
121	121	WRITE8_MEMBER(onetwo_state::onetwo_cpubank_w)
122	122	{
123		memory_set_bank(machine(), "bank1", data);
	123	membank("bank1")->set_entry(data);
124	124	}
125	125
126	126	WRITE8_MEMBER(onetwo_state::onetwo_coin_counters_w)
r14976	r14977
348	348	static MACHINE_START( onetwo )
349	349	{
350	350	onetwo_state *state = machine.driver_data<onetwo_state>();
351		UINT8 *ROM = machine.region("maincpu")->base();
	351	UINT8 *ROM = state->memregion("maincpu")->base();
352	352
353		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	353	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
354	354
355	355	state->m_maincpu = machine.device("maincpu");
356	356	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/gng.c

r14976	r14977
30	30	WRITE8_MEMBER(gng_state::gng_bankswitch_w)
31	31	{
32	32	if (data == 4)
33		memory_set_bank(machine(), "bank1", 4);
	33	membank("bank1")->set_entry(4);
34	34	else
35		memory_set_bank(machine(), "bank1", (data & 0x03));
	35	membank("bank1")->set_entry((data & 0x03));
36	36	}
37	37
38	38	WRITE8_MEMBER(gng_state::gng_coin_counter_w)
r14976	r14977
304	304	{
305	305	gng_state *state = machine.driver_data<gng_state>();
306	306
307		UINT8 *rombase = machine.region("maincpu")->base();
308		memory_configure_bank(machine, "bank1", 0, 4, &rombase[0x10000], 0x2000);
309		memory_configure_bank(machine, "bank1", 4, 1, &rombase[0x4000], 0x2000);
	307	UINT8 *rombase = state->memregion("maincpu")->base();
	308	state->membank("bank1")->configure_entries(0, 4, &rombase[0x10000], 0x2000);
	309	state->membank("bank1")->configure_entry(4, &rombase[0x4000]);
310	310
311	311	state->save_item(NAME(state->m_scrollx));
312	312	state->save_item(NAME(state->m_scrolly));

src/mame/drivers/nbmj8891.c

r14976	r14977
61	61
62	62	static DRIVER_INIT( gionbana )
63	63	{
64		UINT8 *prot = machine.region("protection")->base();
	64	UINT8 *prot = machine.root_device().memregion("protection")->base();
65	65	int i;
66	66
67	67	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
85	85	static DRIVER_INIT( omotesnd )
86	86	{
87	87	#if 0
88		UINT8 *prot = machine.region("protection")->base();
	88	UINT8 *prot = machine.root_device().memregion("protection")->base();
89	89	int i;
90	90
91	91	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
100	100	#endif
101	101
102	102	#if 1
103		UINT8 *ROM = machine.region("maincpu")->base();
	103	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
104	104
105	105	// Protection ROM check skip
106	106	ROM[0x0106] = 0x00;
r14976	r14977
135	135
136	136	static DRIVER_INIT( telmahjn )
137	137	{
138		UINT8 *prot = machine.region("protection")->base();
	138	UINT8 *prot = machine.root_device().memregion("protection")->base();
139	139	int i;
140	140
141	141	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
153	153
154	154	static DRIVER_INIT( mgmen89 )
155	155	{
156		UINT8 *prot = machine.region("protection")->base();
	156	UINT8 *prot = machine.root_device().memregion("protection")->base();
157	157	int i;
158	158
159	159	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
171	171
172	172	static DRIVER_INIT( mjfocus )
173	173	{
174		UINT8 *prot = machine.region("protection")->base();
175		UINT8 *ram = machine.region("maincpu")->base() + 0xf800;
	174	UINT8 *prot = machine.root_device().memregion("protection")->base();
	175	UINT8 *ram = machine.root_device().memregion("maincpu")->base() + 0xf800;
176	176	int i;
177	177
178	178	/* need to clear RAM otherwise it doesn't boot... */
r14976	r14977
194	194	static DRIVER_INIT( mjfocusm )
195	195	{
196	196	#if 1
197		UINT8 *ROM = machine.region("maincpu")->base();
	197	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
198	198
199	199	// Protection ROM check skip
200	200	ROM[0x014e] = 0x00;
r14976	r14977
206	206
207	207	static DRIVER_INIT( scandal )
208	208	{
209		UINT8 *ROM = machine.region("maincpu")->base();
	209	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
210	210	int i;
211	211
212	212	for (i = 0xf800; i < 0x10000; i++) ROM[i] = 0x00;
r14976	r14977
223	223	{
224	224	/* they forgot to enable the protection check in this game... */
225	225	#if 0
226		UINT8 *prot = machine.region("protection")->base();
	226	UINT8 *prot = machine.root_device().memregion("protection")->base();
227	227	int i;
228	228
229		machine.region("maincpu")->base()[0x003d] = 0x01;   // force the protection check to be executed
	229	machine.root_device().memregion("maincpu")->base()[0x003d] = 0x01;   // force the protection check to be executed
230	230
231	231	/* this is one possible way to rearrange the protection ROM data to get the
232	232	expected 0xfe1a checksum. It's probably completely wrong! But since the
r14976	r14977
284	284
285	285	static DRIVER_INIT( pairsnb )
286	286	{
287		UINT8 *prot = machine.region("protection")->base();
	287	UINT8 *prot = machine.root_device().memregion("protection")->base();
288	288	int i;
289	289
290	290	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
302	302
303	303	static DRIVER_INIT( pairsten )
304	304	{
305		UINT8 *prot = machine.region("protection")->base();
	305	UINT8 *prot = machine.root_device().memregion("protection")->base();
306	306	int i;
307	307
308	308	/* this is one possible way to rearrange the protection ROM data to get the

src/mame/drivers/wc90b.c

r14976	r14977
99	99	WRITE8_MEMBER(wc90b_state::wc90b_bankswitch_w)
100	100	{
101	101	int bankaddress;
102		UINT8 *ROM = machine().region("maincpu")->base();
	102	UINT8 *ROM = memregion("maincpu")->base();
103	103
104	104	bankaddress = 0x10000 + ((data & 0xf8) << 8);
105		memory_set_bankptr(machine(), "bank1",&ROM[bankaddress]);
	105	membank("bank1")->set_base(&ROM[bankaddress]);
106	106	}
107	107
108	108	WRITE8_MEMBER(wc90b_state::wc90b_bankswitch1_w)
109	109	{
110	110	int bankaddress;
111		UINT8 *ROM = machine().region("sub")->base();
	111	UINT8 *ROM = memregion("sub")->base();
112	112
113	113	bankaddress = 0x10000 + ((data & 0xf8) << 8);
114		memory_set_bankptr(machine(), "bank2",&ROM[bankaddress]);
	114	membank("bank2")->set_base(&ROM[bankaddress]);
115	115	}
116	116
117	117	WRITE8_MEMBER(wc90b_state::wc90b_sound_command_w)
r14976	r14977
123	123	static WRITE8_DEVICE_HANDLER( adpcm_control_w )
124	124	{
125	125	int bankaddress;
126		UINT8 *ROM = device->machine().region("audiocpu")->base();
	126	UINT8 *ROM = device->machine().root_device().memregion("audiocpu")->base();
127	127
128	128	/* the code writes either 2 or 3 in the bottom two bits */
129	129	bankaddress = 0x10000 + (data & 0x01) * 0x4000;
130		memory_set_bankptr(device->machine(), "bank3",&ROM[bankaddress]);
	130	device->machine().root_device().membank("bank3")->set_base(&ROM[bankaddress]);
131	131
132	132	msm5205_reset_w(device,data & 0x08);
133	133	}

src/mame/drivers/liberate.c

r14976	r14977
27	27
28	28	READ8_MEMBER(liberate_state::deco16_bank_r)
29	29	{
30		const UINT8 *ROM = machine().region("user1")->base();
	30	const UINT8 *ROM = memregion("user1")->base();
31	31
32	32	/* The tilemap bank can be swapped into main memory */
33	33	if (m_bank)
r14976	r14977
76	76
77	77	READ8_MEMBER(liberate_state::prosoccr_bank_r)
78	78	{
79		const UINT8 *ROM = machine().region("user1")->base();
	79	const UINT8 *ROM = memregion("user1")->base();
80	80
81	81	/* The tilemap bank can be swapped into main memory */
82	82	if (m_bank)
r14976	r14977
105	105
106	106	READ8_MEMBER(liberate_state::prosoccr_charram_r)
107	107	{
108		UINT8 *SRC_GFX = machine().region("shared_gfx")->base();
	108	UINT8 *SRC_GFX = memregion("shared_gfx")->base();
109	109
110	110	if (m_gfx_rom_readback)
111	111	{
r14976	r14977
126	126
127	127	WRITE8_MEMBER(liberate_state::prosoccr_charram_w)
128	128	{
129		UINT8 *FG_GFX = machine().region("fg_gfx")->base();
	129	UINT8 *FG_GFX = memregion("fg_gfx")->base();
130	130
131	131	if (m_bank)
132	132	{
r14976	r14977
182	182
183	183	READ8_MEMBER(liberate_state::prosport_charram_r)
184	184	{
185		UINT8 *FG_GFX = machine().region("progolf_fg_gfx")->base();
	185	UINT8 *FG_GFX = memregion("progolf_fg_gfx")->base();
186	186
187	187	switch (offset & 0x1800)
188	188	{
r14976	r14977
202	202
203	203	WRITE8_MEMBER(liberate_state::prosport_charram_w)
204	204	{
205		UINT8 *FG_GFX = machine().region("progolf_fg_gfx")->base();
	205	UINT8 *FG_GFX = memregion("progolf_fg_gfx")->base();
206	206
207	207	switch (offset & 0x1800)
208	208	{
r14976	r14977
1350	1350	{
1351	1351	address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
1352	1352	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
1353		UINT8 *rom = machine.region("audiocpu")->base();
	1353	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
1354	1354	int i;
1355	1355
1356	1356	/* Bit swapping on sound cpu - Opcodes only */
r14976	r14977
1362	1362
1363	1363	static DRIVER_INIT( prosport )
1364	1364	{
1365		UINT8 *RAM = machine.region("maincpu")->base();
	1365	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
1366	1366	int i;
1367	1367
1368	1368	/* Main cpu has the nibbles swapped */
r14976	r14977
1384	1384	int A;
1385	1385	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1386	1386	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
1387		UINT8 *ROM = machine.region("maincpu")->base();
	1387	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1388	1388
1389	1389	space->set_decrypted_region(0x0000, 0xffff, decrypted);
1390	1390
r14976	r14977
1395	1395	decrypted[A] = (decrypted[A] & 0x7d) | ((decrypted[A] & 0x02) << 6) | ((decrypted[A] & 0x80) >> 6);
1396	1396	}
1397	1397
1398		memory_configure_bank_decrypted(machine, "bank1", 0, 1, decrypted + 0x8000, 0x10);
	1398	machine.root_device().membank("bank1")->configure_decrypted_entry(0, decrypted + 0x8000);
1399	1399
1400	1400	sound_cpu_decrypt(machine);
1401	1401	}

src/mame/drivers/gunsmoke.c

r14976	r14977
274	274	static MACHINE_START( gunsmoke )
275	275	{
276	276	gunsmoke_state *state = machine.driver_data<gunsmoke_state>();
277		UINT8 *rombase = machine.region("maincpu")->base();
	277	UINT8 *rombase = state->memregion("maincpu")->base();
278	278
279		memory_configure_bank(machine, "bank1", 0, 4, &rombase[0x10000], 0x4000);
	279	state->membank("bank1")->configure_entries(0, 4, &rombase[0x10000], 0x4000);
280	280
281	281	state->save_item(NAME(state->m_chon));
282	282	state->save_item(NAME(state->m_objon));

src/mame/drivers/seta.c

r14976	r14977
2975	2975
2976	2976	WRITE8_MEMBER(seta_state::sub_bankswitch_w)
2977	2977	{
2978		UINT8 *rom = machine().region("sub")->base();
	2978	UINT8 *rom = memregion("sub")->base();
2979	2979	int bank = data >> 4;
2980	2980
2981		memory_set_bankptr(machine(), "bank1", &rom[bank * 0x4000 + 0xc000]);
	2981	membank("bank1")->set_base(&rom[bank * 0x4000 + 0xc000]);
2982	2982	}
2983	2983
2984	2984	WRITE8_MEMBER(seta_state::sub_bankswitch_lockout_w)
r14976	r14977
10533	10533
10534	10534	static DRIVER_INIT( metafox )
10535	10535	{
10536		UINT16 *RAM = (UINT16 *) machine.region("maincpu")->base();
	10536	UINT16 *RAM = (UINT16 *) machine.root_device().memregion("maincpu")->base();
10537	10537
10538	10538	/* This game uses the 21c000-21ffff area for protection? */
10539	10539	//  machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_readwrite(0x21c000, 0x21ffff);
r14976	r14977
10556	10556	rom_size = 0x80000;
10557	10557	buf = auto_alloc_array(machine, UINT8, rom_size);
10558	10558
10559		rom = machine.region("gfx2")->base() + 0x40000;
	10559	rom = machine.root_device().memregion("gfx2")->base() + 0x40000;
10560	10560
10561	10561	for (rpos = 0; rpos < rom_size/2; rpos++) {
10562	10562	buf[rpos+0x40000] = rom[rpos*2];
r14976	r14977
10565	10565
10566	10566	memcpy( rom, buf, rom_size );
10567	10567
10568		rom = machine.region("gfx3")->base() + 0x40000;
	10568	rom = machine.root_device().memregion("gfx3")->base() + 0x40000;
10569	10569
10570	10570	for (rpos = 0; rpos < rom_size/2; rpos++) {
10571	10571	buf[rpos+0x40000] = rom[rpos*2];
r14976	r14977
10594	10594
10595	10595	static DRIVER_INIT( kiwame )
10596	10596	{
10597		UINT16 *RAM = (UINT16 *) machine.region("maincpu")->base();
	10597	UINT16 *RAM = (UINT16 *) machine.root_device().memregion("maincpu")->base();
10598	10598
10599	10599	/* WARNING: This game writes to the interrupt vector
10600	10600	table. Lev 1 routine address is stored at $100 */
r14976	r14977
10616	10616	UINT8 temp[16];
10617	10617	int i,j;
10618	10618
10619		src = machine.region("maincpu")->base();
10620		len = machine.region("maincpu")->bytes();
	10619	src = machine.root_device().memregion("maincpu")->base();
	10620	len = machine.root_device().memregion("maincpu")->bytes();
10621	10621	for (i = 0;i < len;i += 16)
10622	10622	{
10623	10623	memcpy(temp,&src[i],16);
r14976	r14977
10647	10647	static DRIVER_INIT( crazyfgt )
10648	10648	{
10649	10649	//seta_state *state = machine.driver_data<seta_state>();
10650		UINT16 *RAM = (UINT16 *) machine.region("maincpu")->base();
	10650	UINT16 *RAM = (UINT16 *) machine.root_device().memregion("maincpu")->base();
10651	10651
10652	10652	// protection check at boot
10653	10653	RAM[0x1078/2] = 0x4e71;
r14976	r14977
10666	10666	static DRIVER_INIT( inttoote )
10667	10667	{
10668	10668	//seta_state *state = machine.driver_data<seta_state>();
10669		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	10669	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
10670	10670
10671	10671	// missing / unused video regs
10672	10672	seta_state *state = machine.driver_data<seta_state>();
r14976	r14977
10682	10682	static DRIVER_INIT( inttootea )
10683	10683	{
10684	10684	//seta_state *state = machine.driver_data<seta_state>();
10685		//UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	10685	//UINT16 *ROM = (UINT16 *)state->memregion( "maincpu" )->base();
10686	10686
10687	10687	// missing / unused video regs
10688	10688	seta_state *state = machine.driver_data<seta_state>();

src/mame/drivers/vball.c

r14976	r14977
157	157	*/
158	158	WRITE8_MEMBER(vball_state::vb_bankswitch_w)
159	159	{
160		UINT8 *RAM = machine().region("maincpu")->base();
161		memory_set_bankptr(machine(), "bank1", &RAM[0x10000 + (0x4000 * (data & 1))]);
	160	UINT8 *RAM = memregion("maincpu")->base();
	161	membank("bank1")->set_base(&RAM[0x10000 + (0x4000 * (data & 1))]);
162	162
163	163	if (m_gfxset != ((data  & 0x20) ^ 0x20))
164	164	{

src/mame/drivers/naomi.c

r14976	r14977
7388	7388
7389	7389	static DRIVER_INIT( atomiswave )
7390	7390	{
7391		UINT64 *ROM = (UINT64 *)machine.region("awflash")->base();
	7391	UINT64 *ROM = (UINT64 *)machine.root_device().memregion("awflash")->base();
7392	7392
7393	7393	// patch out long startup delay
7394	7394	ROM[0x98e/8] = (ROM[0x98e/8] & U64(0xffffffffffff)) | (UINT64)0x0009<<48;

src/mame/drivers/stv.c

r14976	r14977
401	401
402	402	/* Program ROM patches, don't understand how to avoid these two checks ... */
403	403	{
404		UINT32 *ROM = (UINT32 *)machine.region("game0")->base();
	404	UINT32 *ROM = (UINT32 *)state->memregion("game0")->base();
405	405
406	406	ROM[0x90054/4] = 0x00e00001; // END error
407	407
r14976	r14977
1098	1098
1099	1099	static DRIVER_INIT( sanjeon )
1100	1100	{
1101		UINT8 *src    = machine.region       ( "game0" )->base();
	1101	UINT8 *src    = machine.root_device().memregion       ( "game0" )->base();
1102	1102	int x;
1103	1103
1104	1104	for (x=0;x<0x3000000;x++)

src/mame/drivers/queen.c

r14976	r14977
141	141	case 0x59: // PAM0
142	142	{
143	143	if (data & 0x10)      // enable RAM access to region 0xf0000 - 0xfffff
144		memory_set_bankptr(busdevice->machine(), "bios_bank", state->m_bios_ram);
	144	state->membank("bios_bank")->set_base(state->m_bios_ram);
145	145	else               // disable RAM access (reads go to BIOS ROM)
146		memory_set_bankptr(busdevice->machine(), "bios_bank", busdevice->machine().region("bios")->base() + 0x10000);
	146	state->membank("bios_bank")->set_base(state->memregion("bios")->base() + 0x10000);
147	147	break;
148	148	}
149	149	case 0x5a: // PAM1
150	150	{
151	151	if (data & 0x1)
152		memory_set_bankptr(busdevice->machine(), "video_bank1", state->m_isa_ram1);
	152	state->membank("video_bank1")->set_base(state->m_isa_ram1);
153	153	else
154		memory_set_bankptr(busdevice->machine(), "video_bank1", busdevice->machine().region("video_bios")->base() + 0);
	154	state->membank("video_bank1")->set_base(state->memregion("video_bios")->base() + 0);
155	155
156	156	if (data & 0x10)
157		memory_set_bankptr(busdevice->machine(), "video_bank2", state->m_isa_ram2);
	157	state->membank("video_bank2")->set_base(state->m_isa_ram2);
158	158	else
159		memory_set_bankptr(busdevice->machine(), "video_bank2", busdevice->machine().region("video_bios")->base() + 0x4000);
	159	state->membank("video_bank2")->set_base(state->memregion("video_bios")->base() + 0x4000);
160	160
161	161	break;
162	162	}
163	163	case 0x5e: // PAM5
164	164	{
165	165	if (data & 0x1)
166		memory_set_bankptr(busdevice->machine(), "bios_ext1", state->m_bios_ext1_ram);
	166	state->membank("bios_ext1")->set_base(state->m_bios_ext1_ram);
167	167	else
168		memory_set_bankptr(busdevice->machine(), "bios_ext1", busdevice->machine().region("bios")->base() + 0);
	168	state->membank("bios_ext1")->set_base(state->memregion("bios")->base() + 0);
169	169
170	170	if (data & 0x10)
171		memory_set_bankptr(busdevice->machine(), "bios_ext2", state->m_bios_ext2_ram);
	171	state->membank("bios_ext2")->set_base(state->m_bios_ext2_ram);
172	172	else
173		memory_set_bankptr(busdevice->machine(), "bios_ext2", busdevice->machine().region("bios")->base() + 0x4000);
	173	state->membank("bios_ext2")->set_base(state->memregion("bios")->base() + 0x4000);
174	174
175	175	break;
176	176	}
177	177	case 0x5f: // PAM6
178	178	{
179	179	if (data & 0x1)
180		memory_set_bankptr(busdevice->machine(), "bios_ext3", state->m_bios_ext3_ram);
	180	state->membank("bios_ext3")->set_base(state->m_bios_ext3_ram);
181	181	else
182		memory_set_bankptr(busdevice->machine(), "bios_ext3", busdevice->machine().region("bios")->base() + 0x8000);
	182	state->membank("bios_ext3")->set_base(state->memregion("bios")->base() + 0x8000);
183	183
184	184	if (data & 0x10)
185		memory_set_bankptr(busdevice->machine(), "bios_ext4", state->m_bios_ext4_ram);
	185	state->membank("bios_ext4")->set_base(state->m_bios_ext4_ram);
186	186	else
187		memory_set_bankptr(busdevice->machine(), "bios_ext4", busdevice->machine().region("bios")->base() + 0xc000);
	187	state->membank("bios_ext4")->set_base(state->memregion("bios")->base() + 0xc000);
188	188
189	189	break;
190	190	}
r14976	r14977
658	658
659	659	static MACHINE_RESET( queen )
660	660	{
661		memory_set_bankptr(machine, "bios_bank", machine.region("bios")->base() + 0x30000);
662		memory_set_bankptr(machine, "bios_ext1", machine.region("bios")->base() + 0x20000);
663		memory_set_bankptr(machine, "bios_ext2", machine.region("bios")->base() + 0x24000);
664		memory_set_bankptr(machine, "bios_ext3", machine.region("bios")->base() + 0x28000);
665		memory_set_bankptr(machine, "bios_ext4", machine.region("bios")->base() + 0x2c000);
666		memory_set_bankptr(machine, "video_bank1", machine.region("video_bios")->base() + 0);
667		memory_set_bankptr(machine, "video_bank2", machine.region("video_bios")->base() + 0x4000);
	661	machine.root_device().membank("bios_bank")->set_base(machine.root_device().memregion("bios")->base() + 0x30000);
	662	machine.root_device().membank("bios_ext1")->set_base(machine.root_device().memregion("bios")->base() + 0x20000);
	663	machine.root_device().membank("bios_ext2")->set_base(machine.root_device().memregion("bios")->base() + 0x24000);
	664	machine.root_device().membank("bios_ext3")->set_base(machine.root_device().memregion("bios")->base() + 0x28000);
	665	machine.root_device().membank("bios_ext4")->set_base(machine.root_device().memregion("bios")->base() + 0x2c000);
	666	machine.root_device().membank("video_bank1")->set_base(machine.root_device().memregion("video_bios")->base() + 0);
	667	machine.root_device().membank("video_bank2")->set_base(machine.root_device().memregion("video_bios")->base() + 0x4000);
668	668	}
669	669
670	670

src/mame/drivers/megatech.c

r14976	r14977
222	222	UINT8* game_region;
223	223
224	224	sprintf(tempname, "game%d", param);
225		game_region = machine.region(tempname)->base();
	225	game_region = machine.root_device().memregion(tempname)->base();
226	226
227		memcpy(machine.region("maincpu")->base(), game_region, 0x400000);
	227	memcpy(state->memregion("maincpu")->base(), game_region, 0x400000);
228	228
229	229	if (!state->m_cart_is_genesis[param])
230	230	{
r14976	r14977
252	252	printf("megatech_select_game %d\n", param+1);
253	253
254	254	sprintf(tempname, "game%d", param);
255		game_region = machine.region(tempname)->base();
	255	game_region = machine.root_device().memregion(tempname)->base();
256	256
257	257	cputag_set_input_line(machine, "maincpu", INPUT_LINE_RESET, ASSERT_LINE);
258	258	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_RESET, ASSERT_LINE);
r14976	r14977
274	274	else
275	275	{
276	276	/* no cart.. */
277		memset(machine.region("mtbios")->base() + 0x8000, 0x00, 0x8000);
278		memset(machine.region("maincpu")->base(), 0x00, 0x400000);
	277	memset(machine.root_device().memregion("mtbios")->base() + 0x8000, 0x00, 0x8000);
	278	memset(machine.root_device().memregion("maincpu")->base(), 0x00, 0x400000);
279	279	}
280	280
281	281	return;
r14976	r14977
436	436	static DRIVER_INIT(mt_crt)
437	437	{
438	438	mtech_state *state = machine.driver_data<mtech_state>();
439		UINT8* pin = machine.region("sms_pin")->base();
	439	UINT8* pin = state->memregion("sms_pin")->base();
440	440	DRIVER_INIT_CALL(mt_slot);
441	441
442	442	state->m_cart_is_genesis[0] = !pin[0] ? 1 : 0;;
r14976	r14977
556	556	return IMAGE_INIT_FAIL;
557	557
558	558	//printf("load list\n");
559		UINT8 *ROM = image.device().machine().region(this_cart->region)->base();
	559	UINT8 *ROM = image.device().machine().root_device().memregion(this_cart->region)->base();
560	560	//printf("load list2\n");
561	561	UINT32 length = image.get_software_region_length("rom");
562	562	memcpy(ROM, image.get_software_region("rom"), length);

src/mame/drivers/champbwl.c

r14976	r14977
194	194	coin_lockout_w(machine(), 0, ~data & 8);
195	195	coin_lockout_w(machine(), 1, ~data & 4);
196	196
197		memory_set_bank(machine(), "bank1", (data & 0x30) >> 4);
	197	membank("bank1")->set_entry((data & 0x30) >> 4);
198	198	}
199	199
200	200	static ADDRESS_MAP_START( champbwl_map, AS_PROGRAM, 8, champbwl_state )
r14976	r14977
231	231	coin_lockout_w(machine(), 0, ~data & 8);   // coin lockout
232	232	machine().device<ticket_dispenser_device>("hopper")->write(*&space, 0, (data & 0x04) ? 0x00 : 0x80);   // gift out motor
233	233
234		memory_set_bank(machine(), "bank1", (data & 0x30) >> 4);
	234	membank("bank1")->set_entry((data & 0x30) >> 4);
235	235
236	236	//  popmessage("%02x", data);
237	237	}
r14976	r14977
430	430	static MACHINE_START( champbwl )
431	431	{
432	432	champbwl_state *state = machine.driver_data<champbwl_state>();
433		UINT8 *ROM = machine.region("maincpu")->base();
	433	UINT8 *ROM = state->memregion("maincpu")->base();
434	434
435	435	state->m_mcu = NULL;
436	436
437		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	437	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
438	438
439	439	state->save_item(NAME(state->m_screenflip));
440	440	state->save_item(NAME(state->m_last_trackball_val));
r14976	r14977
530	530
531	531	static MACHINE_START( doraemon )
532	532	{
533		UINT8 *ROM = machine.region("maincpu")->base();
534		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	533	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	534	machine.root_device().membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
535	535	}
536	536
537	537	static MACHINE_CONFIG_START( doraemon, tnzs_state )

src/mame/drivers/1942.c

r14976	r14977
71	71
72	72	WRITE8_MEMBER(_1942_state::c1942_bankswitch_w)
73	73	{
74		memory_set_bank(machine(), "bank1", data & 0x03);
	74	membank("bank1")->set_entry(data & 0x03);
75	75	}
76	76
77	77	static TIMER_DEVICE_CALLBACK( c1942_scanline )
r14976	r14977
505	505
506	506	static DRIVER_INIT( 1942 )
507	507	{
508		UINT8 *ROM = machine.region("maincpu")->base();
509		memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x10000], 0x4000);
	508	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	509	machine.root_device().membank("bank1")->configure_entries(0, 3, &ROM[0x10000], 0x4000);
510	510	}
511	511
512	512

src/mame/drivers/poolshrk.c

r14976	r14977
14	14
15	15	static DRIVER_INIT( poolshrk )
16	16	{
17		UINT8* pSprite = machine.region("gfx1")->base();
18		UINT8* pOffset = machine.region("proms")->base();
	17	UINT8* pSprite = machine.root_device().memregion("gfx1")->base();
	18	UINT8* pOffset = machine.root_device().memregion("proms")->base();
19	19
20	20	int i;
21	21	int j;

src/mame/drivers/mayumi.c

r14976	r14977
96	96	{
97	97	int bank = BIT(data, 7) | (BIT(data, 6) << 1);
98	98
99		memory_set_bank(machine(), "bank1", bank);
	99	membank("bank1")->set_entry(bank);
100	100
101	101	m_int_enable = data & 1;
102	102
r14976	r14977
351	351	static MACHINE_START( mayumi )
352	352	{
353	353	mayumi_state *state = machine.driver_data<mayumi_state>();
354		UINT8 *ROM = machine.region("maincpu")->base();
	354	UINT8 *ROM = state->memregion("maincpu")->base();
355	355
356		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
357		memory_set_bank(machine, "bank1", 0);
	356	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
	357	state->membank("bank1")->set_entry(0);
358	358
359	359	state->save_item(NAME(state->m_int_enable));
360	360	state->save_item(NAME(state->m_input_sel));

src/mame/drivers/raiden.c

r14976	r14977
548	548	static void common_decrypt(running_machine &machine)
549	549	{
550	550
551		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	551	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
552	552	int i;
553	553
554	554	for (i = 0; i < 0x20000; i++)
r14976	r14977
560	560	RAM[0xc0000/2 + i] = data;
561	561	}
562	562
563		RAM = (UINT16 *)machine.region("sub")->base();
	563	RAM = (UINT16 *)machine.root_device().memregion("sub")->base();
564	564
565	565	for (i = 0; i < 0x20000; i++)
566	566	{

src/mame/drivers/fromanc2.c

r14976	r14977
159	159	WRITE8_MEMBER(fromanc2_state::fromanc2_subcpu_rombank_w)
160	160	{
161	161	// Change ROM BANK
162		memory_set_bank(machine(), "bank1", data & 0x03);
	162	membank("bank1")->set_entry(data & 0x03);
163	163
164	164	// Change RAM BANK
165		memory_set_bank(machine(), "bank2", (data & 0x0c) >> 2);
	165	membank("bank2")->set_entry((data & 0x0c) >> 2);
166	166	}
167	167
168	168
r14976	r14977
524	524	{
525	525	fromanc2_state *state = machine.driver_data<fromanc2_state>();
526	526
527		memory_configure_bank(machine, "bank1", 0, 4, machine.region("sub")->base(), 0x4000);
528		memory_configure_bank(machine, "bank2", 0, 1, machine.region("sub")->base() + 0x08000, 0x4000);
529		memory_configure_bank(machine, "bank2", 1, 3, machine.region("sub")->base() + 0x14000, 0x4000);
	527	state->membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("sub")->base(), 0x4000);
	528	state->membank("bank2")->configure_entry(0, machine.root_device().memregion("sub")->base() + 0x08000);
	529	state->membank("bank2")->configure_entries(1, 3, state->memregion("sub")->base() + 0x14000, 0x4000);
530	530
531	531	MACHINE_START_CALL(fromanc4);
532	532

src/mame/drivers/bnstars.c

r14976	r14977
1487	1487	decrypt_ms32_tx(machine, 0x00020,0x7e, "gfx7");
1488	1488	decrypt_ms32_bg(machine, 0x00001,0x9b, "gfx6");
1489	1489
1490		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base());
	1490	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
1491	1491	}
1492	1492
1493	1493	GAME( 1997, bnstars1, 0,        bnstars, bnstars, bnstars, ROT0,   "Jaleco", "Vs. Janshi Brandnew Stars", GAME_IMPERFECT_GRAPHICS | GAME_NO_SOUND )

src/mame/drivers/arcadia.c

r14976	r14977
104	104	static WRITE8_DEVICE_HANDLER( arcadia_cia_0_porta_w )
105	105	{
106	106	/* switch banks as appropriate */
107		memory_set_bank(device->machine(), "bank1", data & 1);
	107	device->machine().root_device().membank("bank1")->set_entry(data & 1);
108	108
109	109	/* swap the write handlers between ROM and bank 1 based on the bit */
110	110	if ((data & 1) == 0)
r14976	r14977
757	757
758	758	INLINE void generic_decode(running_machine &machine, const char *tag, int bit7, int bit6, int bit5, int bit4, int bit3, int bit2, int bit1, int bit0)
759	759	{
760		UINT16 *rom = (UINT16 *)machine.region(tag)->base();
	760	UINT16 *rom = (UINT16 *)machine.root_device().memregion(tag)->base();
761	761	int i;
762	762
763	763	/* only the low byte of ROMs are encrypted in these games */
r14976	r14977
766	766
767	767	#if 0
768	768	{
769		UINT8 *ROM = machine.region(tag)->base();
770		int size = machine.region(tag)->bytes();
	769	UINT8 *ROM = machine.root_device().memregion(tag)->base();
	770	int size = machine.root_device().memregion(tag)->bytes();
771	771
772	772	FILE *fp;
773	773	char filename[256];
r14976	r14977
808	808	amiga_machine_config(machine, &arcadia_intf);
809	809
810	810	/* set up memory */
811		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
812		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	811	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	812	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
813	813
814	814	/* OnePlay bios is encrypted, TenPlay is not */
815		biosrom = (UINT16 *)machine.region("user2")->base();
	815	biosrom = (UINT16 *)machine.root_device().memregion("user2")->base();
816	816	if (biosrom[0] != 0x4afc)
817	817	generic_decode(machine, "user2", 6, 1, 0, 2, 3, 4, 5, 7);
818	818	}

src/mame/drivers/vmetal.c

r14976	r14977
119	119	/* game reads the cgrom, result is 7772, verified to be correct on the real board */
120	120
121	121
122		UINT8 *cgrom = machine().region("gfx1")->base();
	122	UINT8 *cgrom = memregion("gfx1")->base();
123	123	UINT16 retdat;
124	124
125	125	offset = offset << 1;
r14976	r14977
423	423	static void expand_gfx1(running_machine &machine)
424	424	{
425	425	metro_state *state = machine.driver_data<metro_state>();
426		UINT8 *base_gfx = machine.region("gfx1")->base();
427		UINT32 length = 2 * machine.region("gfx1")->bytes();
	426	UINT8 *base_gfx = machine.root_device().memregion("gfx1")->base();
	427	UINT32 length = 2 * state->memregion("gfx1")->bytes();
428	428	state->m_expanded_gfx1 = auto_alloc_array(machine, UINT8, length);
429	429	for (int i = 0; i < length; i += 2)
430	430	{

src/mame/drivers/xain.c

r14976	r14977
213	213	WRITE8_MEMBER(xain_state::xainCPUA_bankswitch_w)
214	214	{
215	215	m_pri = data & 0x7;
216		memory_set_bank(machine(), "bank1", (data >> 3) & 1);
	216	membank("bank1")->set_entry((data >> 3) & 1);
217	217	}
218	218
219	219	WRITE8_MEMBER(xain_state::xainCPUB_bankswitch_w)
220	220	{
221		memory_set_bank(machine(), "bank2", data & 1);
	221	membank("bank2")->set_entry(data & 1);
222	222	}
223	223
224	224	WRITE8_MEMBER(xain_state::xain_sound_command_w)
r14976	r14977
568	568
569	569	static MACHINE_START( xsleena )
570	570	{
571		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x4000, 0xc000);
572		memory_configure_bank(machine, "bank2", 0, 2, machine.region("sub")->base()  + 0x4000, 0xc000);
573		memory_set_bank(machine, "bank1", 0);
574		memory_set_bank(machine, "bank2", 0);
	571	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x4000, 0xc000);
	572	machine.root_device().membank("bank2")->configure_entries(0, 2, machine.root_device().memregion("sub")->base()  + 0x4000, 0xc000);
	573	machine.root_device().membank("bank1")->set_entry(0);
	574	machine.root_device().membank("bank2")->set_entry(0);
575	575	}
576	576
577	577	static MACHINE_CONFIG_START( xsleena, xain_state )

src/mame/drivers/mrdo.c

r14976	r14977
34	34	/* if a read from this address doesn't return the value it expects. */
35	35	READ8_MEMBER(mrdo_state::mrdo_SECRE_r)
36	36	{
37		UINT8 *RAM = machine().region("maincpu")->base();
	37	UINT8 *RAM = memregion("maincpu")->base();
38	38	return RAM[cpu_get_reg(&space.device(), Z80_HL)];
39	39	}
40	40

src/mame/drivers/gundealr.c

r14976	r14977
53	53
54	54	WRITE8_MEMBER(gundealr_state::yamyam_bankswitch_w)
55	55	{
56		memory_set_bank(machine(), "bank1", data & 0x07);
	56	membank("bank1")->set_entry(data & 0x07);
57	57	}
58	58
59	59
r14976	r14977
364	364	static MACHINE_START( gundealr )
365	365	{
366	366	gundealr_state *state = machine.driver_data<gundealr_state>();
367		UINT8 *ROM = machine.region("maincpu")->base();
	367	UINT8 *ROM = state->memregion("maincpu")->base();
368	368
369		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	369	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
370	370
371	371	state->save_item(NAME(state->m_flipscreen));
372	372	state->save_item(NAME(state->m_scroll));

src/mame/drivers/firefox.c

r14976	r14977
433	433
434	434	WRITE8_MEMBER(firefox_state::rom_bank_w)
435	435	{
436		memory_set_bank(machine(), "bank1", data & 0x1f);
	436	membank("bank1")->set_entry(data & 0x1f);
437	437	}
438	438
439	439	WRITE8_MEMBER(firefox_state::main_irq_clear_w)
r14976	r14977
481	481	static MACHINE_START( firefox )
482	482	{
483	483	firefox_state *state = machine.driver_data<firefox_state>();
484		memory_configure_bank(machine, "bank1", 0, 32, machine.region("maincpu")->base() + 0x10000, 0x1000);
	484	state->membank("bank1")->configure_entries(0, 32, state->memregion("maincpu")->base() + 0x10000, 0x1000);
485	485	state->m_nvram_1c = machine.device<x2212_device>("nvram_1c");
486	486	state->m_nvram_1d = machine.device<x2212_device>("nvram_1d");
487	487

src/mame/drivers/mainevt.c

r14976	r14977
57	57	{
58	58
59	59	/* bit 0-1 ROM bank select */
60		memory_set_bank(machine(), "bank1", data & 0x03);
	60	membank("bank1")->set_entry(data & 0x03);
61	61
62	62	/* TODO: bit 5 = select work RAM or palette? */
63	63	//palette_selected = data & 0x20;
r14976	r14977
412	412	static MACHINE_START( mainevt )
413	413	{
414	414	mainevt_state *state = machine.driver_data<mainevt_state>();
415		UINT8 *ROM = machine.region("maincpu")->base();
	415	UINT8 *ROM = state->memregion("maincpu")->base();
416	416
417		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
	417	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x2000);
418	418
419	419	state->m_maincpu = machine.device("maincpu");
420	420	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/deco156.c

r14976	r14977
613	613
614	614	static void descramble_sound( running_machine &machine, const char *tag )
615	615	{
616		UINT8 *rom = machine.region(tag)->base();
617		int length = machine.region(tag)->bytes();
	616	UINT8 *rom = machine.root_device().memregion(tag)->base();
	617	int length = machine.root_device().memregion(tag)->bytes();
618	618	UINT8 *buf1 = auto_alloc_array(machine, UINT8, length);
619	619	UINT32 x;
620	620

src/mame/drivers/toki.c

r14976	r14977
71	71	static WRITE8_DEVICE_HANDLER( toki_adpcm_control_w )
72	72	{
73	73	int bankaddress;
74		UINT8 *RAM = device->machine().region("audiocpu")->base();
	74	UINT8 *RAM = device->machine().root_device().memregion("audiocpu")->base();
75	75
76	76
77	77	/* the code writes either 2 or 3 in the bottom two bits */
78	78	bankaddress = 0x10000 + (data & 0x01) * 0x4000;
79		memory_set_bankptr(device->machine(), "bank1",&RAM[bankaddress]);
	79	device->machine().root_device().membank("bank1")->set_base(&RAM[bankaddress]);
80	80
81	81	msm5205_reset_w(device,data & 0x08);
82	82	}
r14976	r14977
738	738
739	739	static DRIVER_INIT( toki )
740	740	{
741		UINT8 *ROM = machine.region("oki")->base();
	741	UINT8 *ROM = machine.root_device().memregion("oki")->base();
742	742	UINT8 *buffer = auto_alloc_array(machine, UINT8, 0x20000);
743	743	int i;
744	744
r14976	r14977
761	761	UINT8 *rom;
762	762
763	763	/* invert the sprite data in the ROMs */
764		len = machine.region("gfx2")->bytes();
765		rom = machine.region("gfx2")->base();
	764	len = machine.root_device().memregion("gfx2")->bytes();
	765	rom = machine.root_device().memregion("gfx2")->base();
766	766	for (i = 0; i < len; i++)
767	767	rom[i] ^= 0xff;
768	768
769	769	/* merge background tile graphics together */
770		len = machine.region("gfx3")->bytes();
771		rom = machine.region("gfx3")->base();
	770	len = machine.root_device().memregion("gfx3")->bytes();
	771	rom = machine.root_device().memregion("gfx3")->base();
772	772	for (offs = 0; offs < len; offs += 0x20000)
773	773	{
774	774	UINT8 *base = &rom[offs];
r14976	r14977
781	781	memcpy (&base[0x18000 + i * 0x800], &temp[0x1800 + i * 0x2000], 0x800);
782	782	}
783	783	}
784		len = machine.region("gfx4")->bytes();
785		rom = machine.region("gfx4")->base();
	784	len = machine.root_device().memregion("gfx4")->bytes();
	785	rom = machine.root_device().memregion("gfx4")->base();
786	786	for (offs = 0; offs < len; offs += 0x20000)
787	787	{
788	788	UINT8 *base = &rom[offs];
r14976	r14977
804	804	/* Program ROMs are bitswapped */
805	805	{
806	806	int i;
807		UINT16 *prgrom = (UINT16*)machine.region("maincpu")->base();
	807	UINT16 *prgrom = (UINT16*)machine.root_device().memregion("maincpu")->base();
808	808
809	809	for (i = 0; i < 0x60000/2; i++)
810	810	{
r14976	r14977
819	819	{
820	820	address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
821	821	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x20000);
822		UINT8 *rom = machine.region("audiocpu")->base();
	822	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
823	823	int i;
824	824
825	825	memcpy(decrypt,rom,0x20000);
r14976	r14977
834	834	}
835	835
836	836	{
837		UINT8 *ROM = machine.region("oki")->base();
	837	UINT8 *ROM = machine.root_device().memregion("oki")->base();
838	838	UINT8 *buffer = auto_alloc_array(machine, UINT8, 0x20000);
839	839	int i;
840	840

src/mame/drivers/dwarfd.c

r14976	r14977
1290	1290	UINT8 *src, *dst;
1291	1291
1292	1292	/* expand gfx roms */
1293		src = machine.region("gfx1")->base();
1294		dst = machine.region("gfx2")->base();
	1293	src = machine.root_device().memregion("gfx1")->base();
	1294	dst = state->memregion("gfx2")->base();
1295	1295
1296	1296	for (i = 0; i < 0x4000; i++)
1297	1297	{
r14976	r14977
1304	1304	}
1305	1305
1306	1306	/* use low bit as 'interpolation' bit */
1307		src = machine.region("gfx2")->base();
	1307	src = machine.root_device().memregion("gfx2")->base();
1308	1308	for (i = 0; i < 0x8000; i++)
1309	1309	{
1310	1310	if (src[i] & 0x10)
r14976	r14977
1335	1335	DRIVER_INIT_CALL(dwarfd);
1336	1336
1337	1337	// hacks for program to proceed
1338		machine.region("maincpu")->base()[0x6564] = 0x00;
1339		machine.region("maincpu")->base()[0x6565] = 0x00;
	1338	machine.root_device().memregion("maincpu")->base()[0x6564] = 0x00;
	1339	machine.root_device().memregion("maincpu")->base()[0x6565] = 0x00;
1340	1340
1341		machine.region("maincpu")->base()[0x59b2] = 0x00;
1342		machine.region("maincpu")->base()[0x59b3] = 0x00;
1343		machine.region("maincpu")->base()[0x59b4] = 0x00;
	1341	machine.root_device().memregion("maincpu")->base()[0x59b2] = 0x00;
	1342	machine.root_device().memregion("maincpu")->base()[0x59b3] = 0x00;
	1343	machine.root_device().memregion("maincpu")->base()[0x59b4] = 0x00;
1344	1344
1345	1345	}
1346	1346

src/mame/drivers/renegade.c

r14976	r14977
165	165	renegade_adpcm_state *state = get_safe_token(device);
166	166	state->m_playing = 0;
167	167	state->m_stream = device->machine().sound().stream_alloc(*device, 0, 1, device->clock(), state, renegade_adpcm_callback);
168		state->m_base = device->machine().region("adpcm")->base();
	168	state->m_base = device->machine().root_device().memregion("adpcm")->base();
169	169	state->m_adpcm.reset();
170	170	}
171	171
r14976	r14977
240	240	static void setbank(running_machine &machine)
241	241	{
242	242	renegade_state *state = machine.driver_data<renegade_state>();
243		UINT8 *RAM = machine.region("maincpu")->base();
244		memory_set_bankptr(machine, "bank1", &RAM[state->m_bank ? 0x10000 : 0x4000]);
	243	UINT8 *RAM = state->memregion("maincpu")->base();
	244	state->membank("bank1")->set_base(&RAM[state->m_bank ? 0x10000 : 0x4000]);
245	245	}
246	246
247	247	static MACHINE_START( renegade )

src/mame/drivers/junofrst.c

r14976	r14977
143	143	if (offset == 3)
144	144	{
145	145	int i;
146		UINT8 *gfx_rom = machine().region("gfx1")->base();
	146	UINT8 *gfx_rom = memregion("gfx1")->base();
147	147
148	148	offs_t src = ((m_blitterdata[2] << 8) | m_blitterdata[3]) & 0xfffc;
149	149	offs_t dest = (m_blitterdata[0] << 8) | m_blitterdata[1];
r14976	r14977
190	190
191	191	WRITE8_MEMBER(junofrst_state::junofrst_bankselect_w)
192	192	{
193		memory_set_bank(machine(), "bank1", data & 0x0f);
	193	membank("bank1")->set_entry(data & 0x0f);
194	194	}
195	195
196	196
r14976	r14977
529	529	{
530	530	UINT8 *decrypted = konami1_decode(machine, "maincpu");
531	531
532		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x1000);
533		memory_configure_bank_decrypted(machine, "bank1", 0, 16, decrypted + 0x10000, 0x1000);
	532	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x1000);
	533	machine.root_device().membank("bank1")->configure_decrypted_entries(0, 16, decrypted + 0x10000, 0x1000);
534	534	}
535	535
536	536

src/mame/drivers/nbmj8688.c

r14976	r14977
67	67
68	68	static DRIVER_INIT( mjcamera )
69	69	{
70		UINT8 *rom = machine.region("voice")->base() + 0x20000;
71		UINT8 *prot = machine.region("user1")->base();
	70	UINT8 *rom = machine.root_device().memregion("voice")->base() + 0x20000;
	71	UINT8 *prot = machine.root_device().memregion("user1")->base();
72	72	int i;
73	73
74	74	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
87	87	static DRIVER_INIT( kanatuen )
88	88	{
89	89	/* uses the same protection data as mjcamer, but a different check */
90		UINT8 *rom = machine.region("voice")->base() + 0x30000;
	90	UINT8 *rom = machine.root_device().memregion("voice")->base() + 0x30000;
91	91
92	92	rom[0x0004] = 0x09;
93	93	rom[0x0103] = 0x0e;
r14976	r14977
101	101	{
102	102	#if 1
103	103	/* uses the same protection data as ????, but a different check */
104		UINT8 *rom = machine.region("maincpu")->base();
	104	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
105	105
106	106	rom[0x0149] = 0x00;
107	107	rom[0x014a] = 0x00;
r14976	r14977
113	113
114	114	static DRIVER_INIT( idhimitu )
115	115	{
116		UINT8 *rom = machine.region("voice")->base() + 0x20000;
117		UINT8 *prot = machine.region("user1")->base();
	116	UINT8 *rom = machine.root_device().memregion("voice")->base() + 0x20000;
	117	UINT8 *prot = machine.root_device().memregion("user1")->base();
118	118	int i;
119	119
120	120	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
138	138
139	139	static DRIVER_INIT( kaguya2 )
140	140	{
141		UINT8 *rom = machine.region("voice")->base() + 0x20000;
142		UINT8 *prot = machine.region("user1")->base();
	141	UINT8 *rom = machine.root_device().memregion("voice")->base() + 0x20000;
	142	UINT8 *prot = machine.root_device().memregion("user1")->base();
143	143	int i;
144	144
145	145	/* this is one possible way to rearrange the protection ROM data to get the

src/mame/drivers/caswin.c

r14976	r14977
274	274
275	275	static PALETTE_INIT( caswin )
276	276	{
277		const UINT8 *color_prom = machine.region("proms")->base();
	277	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
278	278	int   bit0, bit1, bit2 , r, g, b;
279	279	int   i;
280	280

src/mame/drivers/hitpoker.c

r14976	r14977
117	117
118	118	READ8_MEMBER(hitpoker_state::hitpoker_vram_r)
119	119	{
120		UINT8 *ROM = machine().region("maincpu")->base();
	120	UINT8 *ROM = memregion("maincpu")->base();
121	121
122	122	if(m_pic_data & 0x10)
123	123	return m_videoram[offset];
r14976	r14977
127	127
128	128	WRITE8_MEMBER(hitpoker_state::hitpoker_vram_w)
129	129	{
130		//  UINT8 *ROM = machine().region("maincpu")->base();
	130	//  UINT8 *ROM = memregion("maincpu")->base();
131	131
132	132	//  if(m_sys_regs[0x00] & 0x10)
133	133	m_videoram[offset] = data;
r14976	r14977
135	135
136	136	READ8_MEMBER(hitpoker_state::hitpoker_cram_r)
137	137	{
138		UINT8 *ROM = machine().region("maincpu")->base();
	138	UINT8 *ROM = memregion("maincpu")->base();
139	139
140	140	if(m_pic_data & 0x10)
141	141	return m_colorram[offset];
r14976	r14977
150	150
151	151	READ8_MEMBER(hitpoker_state::hitpoker_paletteram_r)
152	152	{
153		UINT8 *ROM = machine().region("maincpu")->base();
	153	UINT8 *ROM = memregion("maincpu")->base();
154	154
155	155	if(m_pic_data & 0x10)
156	156	return m_paletteram[offset];
r14976	r14977
517	517
518	518	static DRIVER_INIT(hitpoker)
519	519	{
520		UINT8 *ROM = machine.region("maincpu")->base();
	520	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
521	521
522	522	ROM[0x1220] = 0x01; //patch eeprom write?
523	523	ROM[0x1221] = 0x01;

src/mame/drivers/taito_h.c

r14976	r14977
231	231	static void reset_sound_region(running_machine &machine)
232	232	{
233	233	taitoh_state *state = machine.driver_data<taitoh_state>();
234		memory_set_bank(machine, "bank1", state->m_banknum);
	234	state->membank("bank1")->set_entry(state->m_banknum);
235	235	}
236	236
237	237	WRITE8_MEMBER(taitoh_state::sound_bankswitch_w)
r14976	r14977
518	518	static MACHINE_START( taitoh )
519	519	{
520	520	taitoh_state *state = machine.driver_data<taitoh_state>();
521		UINT8 *ROM = machine.region("audiocpu")->base();
	521	UINT8 *ROM = state->memregion("audiocpu")->base();
522	522
523		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0xc000], 0x4000);
	523	state->membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
524	524
525	525	state->m_audiocpu = machine.device("audiocpu");
526	526	state->m_tc0220ioc = machine.device("tc0220ioc");

src/mame/drivers/ginganin.c

r14976	r14977
380	380	UINT16 *rom;
381	381
382	382	/* main cpu patches */
383		rom = (UINT16 *)machine.region("maincpu")->base();
	383	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
384	384	/* avoid writes to rom getting to the log */
385	385	rom[0x408 / 2] = 0x6000;
386	386	rom[0x40a / 2] = 0x001c;
r14976	r14977
388	388
389	389	/* sound cpu patches */
390	390	/* let's clear the RAM: ROM starts at 0x4000 */
391		memset(machine.region("audiocpu")->base(), 0, 0x800);
	391	memset(machine.root_device().memregion("audiocpu")->base(), 0, 0x800);
392	392	}
393	393
394	394

src/mame/drivers/tail2nos.c

r14976	r14977
29	29
30	30	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
31	31	{
32		memory_set_bank(device->machine(), "bank3", data & 0x01);
	32	device->machine().root_device().membank("bank3")->set_entry(data & 0x01);
33	33	}
34	34
35	35	static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, tail2nos_state )
r14976	r14977
208	208	static MACHINE_START( tail2nos )
209	209	{
210	210	tail2nos_state *state = machine.driver_data<tail2nos_state>();
211		UINT8 *ROM = machine.region("audiocpu")->base();
	211	UINT8 *ROM = state->memregion("audiocpu")->base();
212	212
213		memory_configure_bank(machine, "bank3", 0, 2, &ROM[0x10000], 0x8000);
214		memory_set_bank(machine, "bank3", 0);
	213	state->membank("bank3")->configure_entries(0, 2, &ROM[0x10000], 0x8000);
	214	state->membank("bank3")->set_entry(0);
215	215
216	216	state->m_maincpu = machine.device("maincpu");
217	217	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
227	227	tail2nos_state *state = machine.driver_data<tail2nos_state>();
228	228
229	229	/* point to the extra ROMs */
230		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
231		memory_set_bankptr(machine, "bank2", machine.region("user2")->base());
	230	state->membank("bank1")->set_base(machine.root_device().memregion("user1")->base());
	231	state->membank("bank2")->set_base(state->memregion("user2")->base());
232	232
233	233	state->m_charbank = 0;
234	234	state->m_charpalette = 0;

src/mame/drivers/m79amb.c

r14976	r14977
290	290	static DRIVER_INIT( m79amb )
291	291	{
292	292	m79amb_state *state = machine.driver_data<m79amb_state>();
293		UINT8 *rom = machine.region("maincpu")->base();
	293	UINT8 *rom = state->memregion("maincpu")->base();
294	294	int i, j;
295	295
296	296	/* PROM data is active low */

src/mame/drivers/slapshot.c

r14976	r14977
242	242	static void reset_sound_region( running_machine &machine )
243	243	{
244	244	slapshot_state *state = machine.driver_data<slapshot_state>();
245		memory_set_bank(machine, "bank10", state->m_banknum);
	245	state->membank("bank10")->set_entry(state->m_banknum);
246	246	}
247	247
248	248	WRITE8_MEMBER(slapshot_state::sound_bankswitch_w)
r14976	r14977
524	524	{
525	525	slapshot_state *state = machine.driver_data<slapshot_state>();
526	526
527		memory_configure_bank(machine, "bank10", 0, 4, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	527	state->membank("bank10")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0xc000, 0x4000);
528	528
529	529	state->m_maincpu = machine.device("maincpu");
530	530	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
730	730	static DRIVER_INIT( slapshot )
731	731	{
732	732	UINT32 offset,i;
733		UINT8 *gfx = machine.region("gfx2")->base();
734		int size = machine.region("gfx2")->bytes();
	733	UINT8 *gfx = machine.root_device().memregion("gfx2")->base();
	734	int size = machine.root_device().memregion("gfx2")->bytes();
735	735	int data;
736	736
737	737	offset = size / 2;

src/mame/drivers/meritm.c

r14976	r14977
419	419	int rombank = (state->m_bank & 0x07) ^ 0x07;
420	420
421	421	//logerror( "CRT250: Switching banks: rom = %0x (bank = %x)\n", rombank, state->m_bank );
422		memory_set_bank(machine, "bank1", rombank );
	422	state->membank("bank1")->set_entry(rombank );
423	423	};
424	424
425	425	WRITE8_MEMBER(meritm_state::meritm_crt250_bank_w)
r14976	r14977
437	437	(state->m_psd_a15 & 0x1);
438	438
439	439	//logerror( "Switching banks: rom = %0x (bank = %x), ram = %0x\n", rombank, state->m_bank, rambank);
440		memory_set_bank(machine, "bank1", rombank );
441		memory_set_bank(machine, "bank2", rombank | 0x01);
442		memory_set_bank(machine, "bank3", rambank);
	440	state->membank("bank1")->set_entry(rombank );
	441	state->membank("bank2")->set_entry(rombank | 0x01);
	442	state->membank("bank3")->set_entry(rambank);
443	443	};
444	444
445	445	WRITE8_MEMBER(meritm_state::meritm_psd_a15_w)
r14976	r14977
484	484	return;
485	485	}
486	486
487		dst = machine().region("maincpu")->base() + 0x70000 + 2;
	487	dst = memregion("maincpu")->base() + 0x70000 + 2;
488	488
489	489	if (data == 0)
490	490	{
r14976	r14977
513	513	default: logerror( "meritm_crt250_questions_bank_w: unknown data = %02x\n", data ); return;
514	514	}
515	515	logerror( "Reading question byte at %06X\n", questions_address | m_questions_loword_address);
516		*dst = machine().region("extra")->base()[questions_address | m_questions_loword_address];
	516	*dst = memregion("extra")->base()[questions_address | m_questions_loword_address];
517	517	}
518	518	};
519	519
r14976	r14977
989	989	static MACHINE_START(meritm_crt250)
990	990	{
991	991	meritm_state *state = machine.driver_data<meritm_state>();
992		memory_configure_bank(machine, "bank1", 0, 8, machine.region("maincpu")->base(), 0x10000);
	992	state->membank("bank1")->configure_entries(0, 8, state->memregion("maincpu")->base(), 0x10000);
993	993	state->m_bank = 0xff;
994	994	meritm_crt250_switch_banks(machine);
995	995	MACHINE_START_CALL(merit_common);
r14976	r14977
1016	1016	state->m_ram = auto_alloc_array(machine, UINT8,  0x8000 );
1017	1017	machine.device<nvram_device>("nvram")->set_base(state->m_ram, 0x8000);
1018	1018	memset(state->m_ram, 0x00, 0x8000);
1019		memory_configure_bank(machine, "bank1", 0, 128, machine.region("maincpu")->base(), 0x8000);
1020		memory_configure_bank(machine, "bank2", 0, 128, machine.region("maincpu")->base(), 0x8000);
1021		memory_configure_bank(machine, "bank3", 0, 4, state->m_ram, 0x2000);
	1019	state->membank("bank1")->configure_entries(0, 128, machine.root_device().memregion("maincpu")->base(), 0x8000);
	1020	state->membank("bank2")->configure_entries(0, 128, state->memregion("maincpu")->base(), 0x8000);
	1021	state->membank("bank3")->configure_entries(0, 4, state->m_ram, 0x2000);
1022	1022	state->m_bank = 0xff;
1023	1023	state->m_psd_a15 = 0;
1024	1024	meritm_switch_banks(machine);

src/mame/drivers/atarisy4.c

r14976	r14977
583	583	}
584	584
585	585	data &= 0x3800;
586		memory_set_bankptr(machine(), "dsp0_bank1", &m_shared_ram[0][data]);
	586	membank("dsp0_bank1")->set_base(&m_shared_ram[0][data]);
587	587	m_dsp_bank[0] = data;
588	588	}
589	589
r14976	r14977
617	617	}
618	618
619	619	data &= 0x3800;
620		memory_set_bankptr(machine(), "dsp1_bank1", &m_shared_ram[1][data]);
	620	membank("dsp1_bank1")->set_base(&m_shared_ram[1][data]);
621	621	m_dsp_bank[1] = data;
622	622	}
623	623
r14976	r14977
969	969	state->m_shared_ram[0] = auto_alloc_array_clear(machine, UINT16, 0x2000);
970	970
971	971	/* Populate the 68000 address space with data from the HEX files */
972		load_hexfile(main, machine.region("code")->base());
973		load_hexfile(main, machine.region("data")->base());
	972	load_hexfile(main, machine.root_device().memregion("code")->base());
	973	load_hexfile(main, machine.root_device().memregion("data")->base());
974	974
975	975	/* Set up the DSP */
976		memory_set_bankptr(machine, "dsp0_bank0", state->m_shared_ram[0]);
977		memory_set_bankptr(machine, "dsp0_bank1", &state->m_shared_ram[0][0x800]);
978		load_ldafile(machine.device("dsp0")->memory().space(AS_PROGRAM), machine.region("dsp")->base());
	976	state->membank("dsp0_bank0")->set_base(state->m_shared_ram[0]);
	977	state->membank("dsp0_bank1")->set_base(&state->m_shared_ram[0][0x800]);
	978	load_ldafile(machine.device("dsp0")->memory().space(AS_PROGRAM), state->memregion("dsp")->base());
979	979	}
980	980
981	981	static DRIVER_INIT( airrace )
r14976	r14977
986	986	state->m_shared_ram[1] = auto_alloc_array_clear(machine, UINT16, 0x4000);
987	987
988	988	/* Populate RAM with data from the HEX files */
989		load_hexfile(machine.device("maincpu")->memory().space(AS_PROGRAM), machine.region("code")->base());
	989	load_hexfile(machine.device("maincpu")->memory().space(AS_PROGRAM), machine.root_device().memregion("code")->base());
990	990
991	991	/* Set up the first DSP */
992		memory_set_bankptr(machine, "dsp0_bank0", state->m_shared_ram[0]);
993		memory_set_bankptr(machine, "dsp0_bank1", &state->m_shared_ram[0][0x800]);
994		load_ldafile(machine.device("dsp0")->memory().space(AS_PROGRAM), machine.region("dsp")->base());
	992	state->membank("dsp0_bank0")->set_base(state->m_shared_ram[0]);
	993	state->membank("dsp0_bank1")->set_base(&state->m_shared_ram[0][0x800]);
	994	load_ldafile(machine.device("dsp0")->memory().space(AS_PROGRAM), machine.root_device().memregion("dsp")->base());
995	995
996	996	/* Set up the second DSP */
997		memory_set_bankptr(machine, "dsp1_bank0", state->m_shared_ram[1]);
998		memory_set_bankptr(machine, "dsp1_bank1", &state->m_shared_ram[1][0x800]);
999		load_ldafile(machine.device("dsp1")->memory().space(AS_PROGRAM), machine.region("dsp")->base());
	997	state->membank("dsp1_bank0")->set_base(state->m_shared_ram[1]);
	998	state->membank("dsp1_bank1")->set_base(&state->m_shared_ram[1][0x800]);
	999	load_ldafile(machine.device("dsp1")->memory().space(AS_PROGRAM), state->memregion("dsp")->base());
1000	1000	}
1001	1001
1002	1002	static MACHINE_RESET( atarisy4 )

src/mame/drivers/lucky74.c

r14976	r14977
1130	1130	if (state->m_adpcm_data == -1)
1131	1131	{
1132	1132	/* transferring 1st nibble */
1133		state->m_adpcm_data = device->machine().region("adpcm")->base()[state->m_adpcm_pos];
	1133	state->m_adpcm_data = device->machine().root_device().memregion("adpcm")->base()[state->m_adpcm_pos];
1134	1134	state->m_adpcm_pos = (state->m_adpcm_pos + 1) & 0xffff;
1135	1135	msm5205_data_w(device, state->m_adpcm_data >> 4);
1136	1136

src/mame/drivers/cninja.c

r14976	r14977
2068	2068
2069	2069	static void cninja_patch( running_machine &machine )
2070	2070	{
2071		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	2071	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2072	2072	int i;
2073	2073
2074	2074	for (i = 0; i < 0x80000 / 2; i++)
r14976	r14977
2109	2109
2110	2110	static DRIVER_INIT( mutantf )
2111	2111	{
2112		const UINT8 *src = machine.region("gfx2")->base();
2113		UINT8 *dst = machine.region("gfx1")->base();
	2112	const UINT8 *src = machine.root_device().memregion("gfx2")->base();
	2113	UINT8 *dst = machine.root_device().memregion("gfx1")->base();
2114	2114
2115	2115	/* The 16x16 graphic has some 8x8 chars in it - decode them in GFX1 */
2116	2116	memcpy(dst + 0x50000, dst + 0x10000, 0x10000);

src/mame/drivers/wardner.c

r14976	r14977
152	152	int bankaddress = 0;
153	153
154	154	address_space *mainspace;
155		UINT8 *RAM = machine().region("maincpu")->base();
	155	UINT8 *RAM = memregion("maincpu")->base();
156	156
157	157	mainspace = machine().device("maincpu")->memory().space(AS_PROGRAM);
158	158	m_wardner_membank = data;
r14976	r14977
171	171	case 6:  bankaddress = 0x30000; break; /* not used */
172	172	default: bankaddress = 0x00000; break; /* not used */
173	173	}
174		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	174	membank("bank1")->set_base(&RAM[bankaddress]);
175	175	}
176	176	else
177	177	{
r14976	r14977
179	179	mainspace->install_read_bank(0xa000, 0xadff, "bank4");
180	180	mainspace->install_read_bank(0xae00, 0xafff, "bank2");
181	181	mainspace->install_read_bank(0xc000, 0xc7ff, "bank3");
182		memory_set_bankptr(machine(), "bank1", &RAM[0x0000]);
183		memory_set_bankptr(machine(), "bank2", m_rambase_ae00);
184		memory_set_bankptr(machine(), "bank3", m_rambase_c000);
185		memory_set_bankptr(machine(), "bank4", m_generic_paletteram_8);
	182	membank("bank1")->set_base(&RAM[0x0000]);
	183	membank("bank2")->set_base(m_rambase_ae00);
	184	membank("bank3")->set_base(m_rambase_c000);
	185	membank("bank4")->set_base(m_generic_paletteram_8);
186	186	}
187	187	}
188	188	}

src/mame/drivers/missile.c

r14976	r14977
501	501	/* ROM? */
502	502	else if (address >= 0x5000)
503	503	{
504		direct.explicit_configure(0x5000 | offset, 0x7fff | offset, 0x7fff, direct.space().machine().region("maincpu")->base() + 0x5000);
	504	direct.explicit_configure(0x5000 | offset, 0x7fff | offset, 0x7fff, direct.space().machine().root_device().memregion("maincpu")->base() + 0x5000);
505	505	return ~0;
506	506	}
507	507
r14976	r14977
514	514	{
515	515	missile_state *state = machine.driver_data<missile_state>();
516	516	/* initialize globals */
517		state->m_writeprom = machine.region("proms")->base();
	517	state->m_writeprom = state->memregion("proms")->base();
518	518	state->m_flipscreen = 0;
519	519
520	520	/* set up an opcode base handler since we use mapped handlers for RAM */
r14976	r14977
786	786
787	787	/* ROM */
788	788	else if (offset >= 0x5000)
789		result = machine().region("maincpu")->base()[offset];
	789	result = memregion("maincpu")->base()[offset];
790	790
791	791	/* POKEY */
792	792	else if (offset < 0x4800)
r14976	r14977
1199	1199	static DRIVER_INIT( suprmatk )
1200	1200	{
1201	1201	int i;
1202		UINT8 *rom = machine.region("maincpu")->base();
	1202	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1203	1203
1204	1204	for (i = 0; i < 0x40; i++)
1205	1205	{

src/mame/drivers/go2000.c

r14976	r14977
76	76
77	77	WRITE8_MEMBER(go2000_state::go2000_pcm_1_bankswitch_w)
78	78	{
79		memory_set_bank(machine(), "bank1", data & 0x07);
	79	membank("bank1")->set_entry(data & 0x07);
80	80	}
81	81
82	82	static ADDRESS_MAP_START( go2000_sound_map, AS_PROGRAM, 8, go2000_state )
r14976	r14977
310	310	static MACHINE_START( go2000 )
311	311	{
312	312	go2000_state *state = machine.driver_data<go2000_state>();
313		UINT8 *SOUND = machine.region("soundcpu")->base();
	313	UINT8 *SOUND = state->memregion("soundcpu")->base();
314	314	int i;
315	315
316	316	for (i = 0; i < 8; i++)
317		memory_configure_bank(machine, "bank1", i, 1, &SOUND[0x00400 + i * 0x10000], 0x10000 - 0x400);
	317	state->membank("bank1")->configure_entry(i, &SOUND[0x00400 + i * 0x10000]);
318	318
319		memory_set_bank(machine, "bank1", 0);
	319	state->membank("bank1")->set_entry(0);
320	320
321	321	state->m_soundcpu = machine.device("soundcpu");
322	322	}

src/mame/drivers/jack.c

r14976	r14977
109	109	// Read the actual byte from question roms
110	110	else
111	111	{
112		UINT8 *ROM = machine().region("user1")->base();
	112	UINT8 *ROM = memregion("user1")->base();
113	113	int real_address;
114	114
115	115	real_address = m_question_address | (offset & 0x3f0) | m_remap_address[offset & 0x0f];
r14976	r14977
1298	1298	{
1299	1299	int A;
1300	1300	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1301		UINT8 *rom = machine.region("maincpu")->base();
	1301	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1302	1302	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x4000);
1303	1303	int data;
1304	1304
r14976	r14977
1373	1373	code, the protection device is disabled or changes behaviour via
1374	1374	writes at 0xf000 and 0xf008. -AS
1375	1375	*/
1376		UINT8 *ROM = machine.region("maincpu")->base();
	1376	UINT8 *ROM = state->memregion("maincpu")->base();
1377	1377	ROM[0x13] = 0x01;
1378	1378	ROM[0x12] = 0x9d;
1379	1379
r14976	r14977
1384	1384	static DRIVER_INIT( striv )
1385	1385	{
1386	1386	jack_state *state = machine.driver_data<jack_state>();
1387		UINT8 *ROM = machine.region("maincpu")->base();
	1387	UINT8 *ROM = state->memregion("maincpu")->base();
1388	1388	UINT8 data;
1389	1389	int A;
1390	1390

src/mame/drivers/vigilant.c

r14976	r14977
26	26	WRITE8_MEMBER(vigilant_state::vigilant_bank_select_w)
27	27	{
28	28	int bankaddress;
29		UINT8 *RAM = machine().region("maincpu")->base();
	29	UINT8 *RAM = memregion("maincpu")->base();
30	30
31	31	bankaddress = 0x10000 + (data & 0x07) * 0x4000;
32		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	32	membank("bank1")->set_base(&RAM[bankaddress]);
33	33	}
34	34
35	35	/***************************************************************************

src/mame/drivers/nbmj8991.c

r14976	r14977
49	49	WRITE8_MEMBER(nbmj8991_state::nbmj8991_soundbank_w)
50	50	{
51	51	if (!(data & 0x80)) soundlatch_clear_byte_w(space, 0, 0);
52		memory_set_bank(machine(), "bank1", data & 0x03);
	52	membank("bank1")->set_entry(data & 0x03);
53	53	}
54	54
55	55	WRITE8_MEMBER(nbmj8991_state::nbmj8991_sound_w)
r14976	r14977
70	70	device_t *audiocpu = machine.device("audiocpu");
71	71	if (audiocpu != NULL && audiocpu->type() == Z80)
72	72	{
73		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x8000, 0x8000);
74		memory_set_bank(machine, "bank1", 0);
	73	machine.root_device().membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("audiocpu")->base() + 0x8000, 0x8000);
	74	machine.root_device().membank("bank1")->set_entry(0);
75	75	}
76	76	MACHINE_RESET_CALL(nb1413m3);
77	77	}
r14976	r14977
108	108
109	109	static DRIVER_INIT( finalbny )
110	110	{
111		UINT8 *ROM = machine.region("maincpu")->base();
	111	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
112	112	int i;
113	113
114	114	for (i = 0xf800; i < 0x10000; i++) ROM[i] = 0x00;
r14976	r14977
134	134	static DRIVER_INIT( galkaika )
135	135	{
136	136	#if 1
137		UINT8 *ROM = machine.region("maincpu")->base();
	137	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
138	138
139	139	// Patch to IM2 -> IM1
140	140	ROM[0x0002] = 0x56;
r14976	r14977
145	145	static DRIVER_INIT( tokyogal )
146	146	{
147	147	#if 1
148		UINT8 *ROM = machine.region("maincpu")->base();
	148	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
149	149
150	150	// Patch to IM2 -> IM1
151	151	ROM[0x0002] = 0x56;
r14976	r14977
156	156	static DRIVER_INIT( tokimbsj )
157	157	{
158	158	#if 1
159		UINT8 *ROM = machine.region("maincpu")->base();
	159	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
160	160
161	161	// Patch to IM2 -> IM1
162	162	ROM[0x0002] = 0x56;

src/mame/drivers/galivan.c

r14976	r14977
380	380	galivan_state *state = machine.driver_data<galivan_state>();
381	381
382	382	/* configure ROM banking */
383		UINT8 *rombase = machine.region("maincpu")->base();
384		memory_configure_bank(machine, "bank1", 0, 2, &rombase[0x10000], 0x2000);
385		memory_set_bank(machine, "bank1", 0);
	383	UINT8 *rombase = state->memregion("maincpu")->base();
	384	state->membank("bank1")->configure_entries(0, 2, &rombase[0x10000], 0x2000);
	385	state->membank("bank1")->set_entry(0);
386	386
387	387	/* register for saving */
388	388	state->save_item(NAME(state->m_scrollx));
r14976	r14977
397	397	galivan_state *state = machine.driver_data<galivan_state>();
398	398
399	399	/* configure ROM banking */
400		UINT8 *rombase = machine.region("maincpu")->base();
401		memory_configure_bank(machine, "bank1", 0, 4, &rombase[0x10000], 0x2000);
402		memory_set_bank(machine, "bank1", 0);
	400	UINT8 *rombase = state->memregion("maincpu")->base();
	401	state->membank("bank1")->configure_entries(0, 4, &rombase[0x10000], 0x2000);
	402	state->membank("bank1")->set_entry(0);
403	403
404	404	/* register for saving */
405	405	state->save_item(NAME(state->m_scrollx));
r14976	r14977
1034	1034	WRITE8_MEMBER(galivan_state::youmab_extra_bank_w)
1035	1035	{
1036	1036	if (data == 0xff)
1037		memory_set_bank(machine(), "bank2", 1);
	1037	membank("bank2")->set_entry(1);
1038	1038	else if (data == 0x00)
1039		memory_set_bank(machine(), "bank2", 0);
	1039	membank("bank2")->set_entry(0);
1040	1040	else
1041	1041	printf("data %03x\n", data);
1042	1042	}
r14976	r14977
1085	1085	galivan_state *state = machine.driver_data<galivan_state>();
1086	1086	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x82, 0x82, write8_delegate(FUNC(galivan_state::youmab_extra_bank_w),state)); // banks rom at 0x8000? writes 0xff and 0x00 before executing code there
1087	1087	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x7fff, "bank3");
1088		memory_set_bankptr(machine,  "bank3", machine.region("maincpu")->base());
	1088	state->membank("bank3")->set_base(machine.root_device().memregion("maincpu")->base());
1089	1089
1090	1090	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0xbfff, "bank2");
1091		memory_configure_bank(machine, "bank2", 0, 2, machine.region("user2")->base(), 0x4000);
1092		memory_set_bank(machine, "bank2", 0);
	1091	state->membank("bank2")->configure_entries(0, 2, state->memregion("user2")->base(), 0x4000);
	1092	state->membank("bank2")->set_entry(0);
1093	1093
1094	1094	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x81, 0x81, write8_delegate(FUNC(galivan_state::youmab_81_w),state)); // ?? often, alternating values
1095	1095	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x84, 0x84, write8_delegate(FUNC(galivan_state::youmab_84_w),state)); // ?? often, sequence..

src/mame/drivers/deshoros.c

r14976	r14977
67	67	deshoros_state *state = machine.driver_data<deshoros_state>();
68	68	if(state->m_bank!=new_bank)
69	69	{
70		UINT8 *ROM = machine.region("data")->base();
	70	UINT8 *ROM = state->memregion("data")->base();
71	71	UINT32 bankaddress;
72	72
73	73	state->m_bank = new_bank;
74	74	bankaddress = 0 + 0x6000 * state->m_bank;
75		memory_set_bankptr(machine, "bank1", &ROM[bankaddress]);
	75	state->membank("bank1")->set_base(&ROM[bankaddress]);
76	76	}
77	77	}
78	78

src/mame/drivers/igs_m027.c

r14976	r14977
254	254	{
255	255	int i;
256	256	unsigned rom_size = 0x80000;
257		UINT8 *src = (UINT8 *) (machine.region("gfx1")->base());
	257	UINT8 *src = (UINT8 *) (machine.root_device().memregion("gfx1")->base());
258	258	UINT8 *result_data = auto_alloc_array(machine, UINT8, rom_size);
259	259
260	260	for (i=0; i<rom_size; i++)
r14976	r14977
758	758
759	759	static void pgm_create_dummy_internal_arm_region(running_machine &machine)
760	760	{
761		UINT16 *temp16 = (UINT16 *)machine.region("maincpu")->base();
	761	UINT16 *temp16 = (UINT16 *)machine.root_device().memregion("maincpu")->base();
762	762
763	763	// fill with RX 14
764	764	int i;
r14976	r14977
785	785	{
786	786
787	787	int i;
788		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	788	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
789	789
790	790	int rom_size = 0x80000;
791	791
r14976	r14977
831	831	static void hauntedh_decrypt(running_machine &machine)
832	832	{
833	833	int i;
834		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	834	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
835	835
836	836	int rom_size = 0x080000;
837	837
r14976	r14977
876	876	static void chessc2_decrypt(running_machine &machine)
877	877	{
878	878	int i;
879		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	879	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
880	880
881	881	int rom_size = 0x80000;
882	882
r14976	r14977
921	921	static void klxyj_decrypt(running_machine &machine)
922	922	{
923	923	int i;
924		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	924	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
925	925
926	926	int rom_size = 0x80000;
927	927
r14976	r14977
965	965	static void big2_decrypt(running_machine &machine)
966	966	{
967	967	int i;
968		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	968	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
969	969
970	970	int rom_size = 0x80000;
971	971
r14976	r14977
1009	1009	static void gonefsh2_decrypt(running_machine &machine)
1010	1010	{
1011	1011	int i;
1012		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	1012	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
1013	1013
1014	1014	int rom_size = 0x80000;
1015	1015
r14976	r14977
1053	1053	static void sddz_decrypt(running_machine &machine)
1054	1054	{
1055	1055	int i;
1056		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	1056	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
1057	1057
1058	1058	int rom_size = 0x80000;
1059	1059
r14976	r14977
1097	1097	static void lhzb3_decrypt(running_machine &machine)
1098	1098	{
1099	1099	int i;
1100		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	1100	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
1101	1101
1102	1102	int rom_size = 0x80000;
1103	1103
r14976	r14977
1141	1141	static void mgfx_decrypt(running_machine &machine)
1142	1142	{
1143	1143	int i;
1144		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	1144	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
1145	1145
1146	1146	int rom_size = 0x80000;
1147	1147
r14976	r14977
1185	1185	static void lhzb4_decrypt(running_machine &machine)
1186	1186	{
1187	1187	int i;
1188		UINT16 *src = (UINT16 *) machine.region("user1")->base();
	1188	UINT16 *src = (UINT16 *) machine.root_device().memregion("user1")->base();
1189	1189
1190	1190	int rom_size = 0x80000;
1191	1191

src/mame/drivers/splash.c

r14976	r14977
140	140
141	141	WRITE8_MEMBER(splash_state::sound_bank_w)
142	142	{
143		memory_set_bank(machine(), "sound_bank", data & 0xf);
	143	membank("sound_bank")->set_entry(data & 0xf);
144	144	}
145	145
146	146
r14976	r14977
1016	1016	static DRIVER_INIT( roldfrog )
1017	1017	{
1018	1018	splash_state *state = machine.driver_data<splash_state>();
1019		UINT8 * ROM = (UINT8 *)machine.region("audiocpu")->base();
1020		memory_configure_bank(machine, "sound_bank", 0, 16, &ROM[0x10000], 0x8000);
	1019	UINT8 * ROM = (UINT8 *)state->memregion("audiocpu")->base();
	1020	state->membank("sound_bank")->configure_entries(0, 16, &ROM[0x10000], 0x8000);
1021	1021
1022	1022	state->m_bitmap_type = 1;
1023	1023	state->m_sprite_attr2_shift = 8;
r14976	r14977
1026	1026	static DRIVER_INIT( rebus )
1027	1027	{
1028	1028	splash_state *state = machine.driver_data<splash_state>();
1029		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	1029	UINT16 *ROM = (UINT16 *)state->memregion("maincpu")->base();
1030	1030
1031	1031	state->m_bitmap_type = 1;
1032	1032	state->m_sprite_attr2_shift = 0;
r14976	r14977
1056	1056	static DRIVER_INIT( funystrp )
1057	1057	{
1058	1058	splash_state *state = machine.driver_data<splash_state>();
1059		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	1059	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1060	1060
1061	1061	state->m_bitmap_type = 0;
1062	1062	state->m_sprite_attr2_shift = 0;
r14976	r14977
1095	1095	ROM[0x11730/2] = 0x7001;
1096	1096	ROM[0x11f80/2] = 0x7001;
1097	1097
1098		ROM = (UINT16 *)machine.region("audiocpu")->base();
	1098	ROM = (UINT16 *)state->memregion("audiocpu")->base();
1099	1099
1100		memory_configure_bank(machine, "sound_bank", 0, 16, &ROM[0x00000], 0x8000);
	1100	state->membank("sound_bank")->configure_entries(0, 16, &ROM[0x00000], 0x8000);
1101	1101
1102	1102	}
1103	1103

src/mame/drivers/subsino2.c

r14976	r14977
2362	2362
2363	2363	static DRIVER_INIT( bishjan )
2364	2364	{
2365		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	2365	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
2366	2366
2367	2367	// patch serial protection test (it always enters test mode on boot otherwise)
2368	2368	rom[0x042EA/2] = 0x4008;
r14976	r14977
2426	2426
2427	2427	static DRIVER_INIT( expcard )
2428	2428	{
2429		UINT8 *rom = machine.region("maincpu")->base();
	2429	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2430	2430
2431	2431	// patch protection test (it always enters test mode on boot otherwise)
2432	2432	rom[0xed4dc-0xc0000] = 0xeb;
r14976	r14977
2524	2524	subsino_decrypt(machine, crsbingo_bitswaps, crsbingo_xors, 0x8000);
2525	2525
2526	2526	// patch serial protection test (it always enters test mode on boot otherwise)
2527		UINT8 *rom = machine.region("maincpu")->base();
	2527	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2528	2528	rom[0x0cec] = 0x18;
2529	2529	rom[0xb037] = 0x18;
2530	2530
r14976	r14977
2578	2578
2579	2579	static DRIVER_INIT( saklove )
2580	2580	{
2581		UINT8 *rom = machine.region("maincpu")->base();
	2581	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2582	2582
2583	2583	// patch serial protection test (it always enters test mode on boot otherwise)
2584	2584	rom[0x0e029] = 0xeb;
r14976	r14977
2638	2638
2639	2639	static DRIVER_INIT( xplan )
2640	2640	{
2641		UINT8 *rom = machine.region("maincpu")->base();
	2641	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2642	2642
2643	2643	// patch protection test (it always enters test mode on boot otherwise)
2644	2644	rom[0xeded9-0xc0000] = 0xeb;
r14976	r14977
2698	2698
2699	2699	static DRIVER_INIT( xtrain )
2700	2700	{
2701		UINT8 *rom = machine.region("maincpu")->base();
	2701	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2702	2702
2703	2703	// patch protection test (it always enters test mode on boot otherwise)
2704	2704	rom[0xe190f-0xc0000] = 0xeb;
r14976	r14977
2743	2743	subsino_decrypt(machine, victor5_bitswaps, victor5_xors, 0x8000);
2744	2744
2745	2745	// patch serial protection test (it always enters test mode on boot otherwise)
2746		UINT8 *rom = machine.region("maincpu")->base();
	2746	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2747	2747	rom[0x0d79] = 0x18;
2748	2748	rom[0xc1cf] = 0x18;
2749	2749	rom[0xc2a9] = 0x18;

src/mame/drivers/route16.c

r14976	r14977
957	957
958	958	static DRIVER_INIT( route16 )
959	959	{
960		UINT8 *ROM = machine.region("cpu1")->base();
	960	UINT8 *ROM = machine.root_device().memregion("cpu1")->base();
961	961	/* Is this actually a bootleg? some of the protection has
962	962	been removed */
963	963
r14976	r14977
972	972
973	973	static DRIVER_INIT( route16a )
974	974	{
975		UINT8 *ROM = machine.region("cpu1")->base();
	975	UINT8 *ROM = machine.root_device().memregion("cpu1")->base();
976	976	/* TO DO : Replace these patches with simulation of the protection device */
977	977
978	978	/* patch the protection */

src/mame/drivers/pgm2.c

r14976	r14977
286	286
287	287	static DRIVER_INIT( orleg2 )
288	288	{
289		UINT16 *src = (UINT16 *)machine.region("spritesa")->base();
	289	UINT16 *src = (UINT16 *)machine.root_device().memregion("spritesa")->base();
290	290
291	291	iga_u12_decode(src, 0x2000000, 0x4761);
292	292	iga_u16_decode(src, 0x2000000, 0xc79f);
r14976	r14977
294	294
295	295	static DRIVER_INIT( kov2nl )
296	296	{
297		UINT16 *src = (UINT16 *)machine.region("spritesa")->base();
	297	UINT16 *src = (UINT16 *)machine.root_device().memregion("spritesa")->base();
298	298
299	299	iga_u12_decode(src, 0x2000000, 0xa193);
300	300	iga_u16_decode(src, 0x2000000, 0xb780);

src/mame/drivers/m63.c

r14976	r14977
180	180
181	181	static PALETTE_INIT( m63 )
182	182	{
183		const UINT8 *color_prom = machine.region("proms")->base();
	183	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
184	184	int i;
185	185
186	186	for (i = 0; i < 256; i++)
r14976	r14977
432	432	switch (m_p2 & 0xf0)
433	433	{
434	434	case 0x60:   return soundlatch_byte_r(space, 0); ;
435		case 0x70:   return machine().region("user1")->base()[((m_p1 & 0x1f) << 8) | offset];
	435	case 0x70:   return memregion("user1")->base()[((m_p1 & 0x1f) << 8) | offset];
436	436	}
437	437	return 0xff;
438	438	}
r14976	r14977
696	696	{
697	697	running_machine &machine = device.machine();
698	698	m63_state *state = machine.driver_data<m63_state>();
699		int i, len = machine.region("samples")->bytes();
700		UINT8 *ROM = machine.region("samples")->base();
	699	int i, len = machine.root_device().memregion("samples")->bytes();
	700	UINT8 *ROM = state->memregion("samples")->base();
701	701
702	702	state->m_samplebuf = auto_alloc_array(machine, INT16, len);
703	703	state->save_pointer(NAME(state->m_samplebuf), len);

src/mame/drivers/tecmosys.c

r14976	r14977
326	326
327	327	WRITE8_MEMBER(tecmosys_state::tecmosys_z80_bank_w)
328	328	{
329		memory_set_bank(machine(), "bank1", data);
	329	membank("bank1")->set_entry(data);
330	330	}
331	331
332	332	WRITE8_MEMBER(tecmosys_state::tecmosys_oki_bank_w)
333	333	{
334	334	UINT8 upperbank = (data & 0x30) >> 4;
335	335	UINT8 lowerbank = (data & 0x03) >> 0;
336		UINT8* region = machine().region("oki")->base();
	336	UINT8* region = memregion("oki")->base();
337	337
338	338	memcpy( region+0x00000, region+0x80000 + lowerbank * 0x20000, 0x20000  );
339	339	memcpy( region+0x20000, region+0x80000 + upperbank * 0x20000, 0x20000  );
r14976	r14977
448	448	static MACHINE_START( tecmosys )
449	449	{
450	450	//  tecmosys_state *state = machine.driver_data<tecmosys_state>();
451		memory_configure_bank(machine, "bank1", 0, 16, machine.region("audiocpu")->base(), 0x4000);
	451	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("audiocpu")->base(), 0x4000);
452	452	}
453	453
454	454	static MACHINE_CONFIG_START( deroon, tecmosys_state )
r14976	r14977
631	631
632	632	static void tecmosys_descramble(running_machine &machine)
633	633	{
634		UINT8 *gfxsrc  = machine.region( "gfx1" )->base();
635		size_t srcsize = machine.region( "gfx1" )->bytes();
	634	UINT8 *gfxsrc  = machine.root_device().memregion( "gfx1" )->base();
	635	size_t srcsize = machine.root_device().memregion( "gfx1" )->bytes();
636	636	int i;
637	637
638	638	for (i=0; i < srcsize; i+=4)

src/mame/drivers/exidy440.c

r14976	r14977
308	308
309	309	/* select the bank and update the bank pointer */
310	310	state->m_bank = bank;
311		memory_set_bankptr(machine, "bank1", &machine.region("maincpu")->base()[0x10000 + state->m_bank * 0x4000]);
	311	state->membank("bank1")->set_base(&machine.root_device().memregion("maincpu")->base()[0x10000 + state->m_bank * 0x4000]);
312	312	}
313	313
314	314
r14976	r14977
317	317	/* EEROM lives in the upper 8k of bank 15 */
318	318	if (m_bank == 15 && offset >= 0x2000)
319	319	{
320		machine().region("maincpu")->base()[0x10000 + 15 * 0x4000 + offset] = data;
	320	memregion("maincpu")->base()[0x10000 + 15 * 0x4000 + offset] = data;
321	321	logerror("W EEROM[%04X] = %02X\n", offset - 0x2000, data);
322	322	}
323	323
r14976	r14977
445	445	{
446	446	exidy440_state *state = machine.driver_data<exidy440_state>();
447	447	/* the EEROM lives in the uppermost 8k of the top bank */
448		UINT8 *rom = machine.region("maincpu")->base();
	448	UINT8 *rom = state->memregion("maincpu")->base();
449	449
450	450	state->m_custom = machine.device("custom");
451	451	machine.device<nvram_device>("nvram")->set_base(&rom[0x10000 + 15 * 0x4000 + 0x2000], 0x2000);

src/mame/drivers/dassault.c

r14976	r14977
830	830
831	831	static DRIVER_INIT( dassault )
832	832	{
833		const UINT8 *src = machine.region("gfx1")->base();
834		UINT8 *dst = machine.region("gfx2")->base();
	833	const UINT8 *src = machine.root_device().memregion("gfx1")->base();
	834	UINT8 *dst = machine.root_device().memregion("gfx2")->base();
835	835	UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
836	836
837	837	/* Playfield 4 also has access to the char graphics, make things easier
r14976	r14977
847	847
848	848	static DRIVER_INIT( thndzone )
849	849	{
850		const UINT8 *src = machine.region("gfx1")->base();
851		UINT8 *dst = machine.region("gfx2")->base();
	850	const UINT8 *src = machine.root_device().memregion("gfx1")->base();
	851	UINT8 *dst = machine.root_device().memregion("gfx2")->base();
852	852	UINT8 *tmp = auto_alloc_array(machine, UINT8, 0x80000);
853	853
854	854	/* Playfield 4 also has access to the char graphics, make things easier

src/mame/drivers/dambustr.c

r14976	r14977
205	205	{
206	206	int i, j, tmp;
207	207	int tmpram[16];
208		UINT8 *rom = machine.region("maincpu")->base();
209		UINT8 *usr = machine.region("user1")->base();
210		UINT8 *gfx = machine.region("gfx1")->base();
	208	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	209	UINT8 *usr = machine.root_device().memregion("user1")->base();
	210	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
211	211
212	212	// Bit swap addresses
213	213	for(i=0; i<4096*4; i++) {

src/mame/drivers/tatsumi.c

r14976	r14977
1284	1284	static DRIVER_INIT( apache3 )
1285	1285	{
1286	1286	tatsumi_state *state = machine.driver_data<tatsumi_state>();
1287		UINT8 *dst = machine.region("gfx1")->base();
1288		UINT8 *src1 = machine.region("gfx2")->base();
1289		UINT8 *src2 = machine.region("gfx3")->base();
	1287	UINT8 *dst = machine.root_device().memregion("gfx1")->base();
	1288	UINT8 *src1 = machine.root_device().memregion("gfx2")->base();
	1289	UINT8 *src2 = state->memregion("gfx3")->base();
1290	1290	int i;
1291	1291
1292	1292	for (i=0; i<0x100000; i+=32) {
r14976	r14977
1299	1299	}
1300	1300
1301	1301	// Copy sprite & palette data out of GFX rom area
1302		state->m_rom_sprite_lookup1 = machine.region("gfx2")->base();
1303		state->m_rom_sprite_lookup2 = machine.region("gfx3")->base();
1304		state->m_rom_clut0 = machine.region("gfx2")->base()+ 0x100000 - 0x800;
1305		state->m_rom_clut1 = machine.region("gfx3")->base()+ 0x100000 - 0x800;
	1302	state->m_rom_sprite_lookup1 = machine.root_device().memregion("gfx2")->base();
	1303	state->m_rom_sprite_lookup2 = machine.root_device().memregion("gfx3")->base();
	1304	state->m_rom_clut0 = machine.root_device().memregion("gfx2")->base()+ 0x100000 - 0x800;
	1305	state->m_rom_clut1 = machine.root_device().memregion("gfx3")->base()+ 0x100000 - 0x800;
1306	1306
1307	1307	tatsumi_reset(machine);
1308	1308
r14976	r14977
1312	1312	static DRIVER_INIT( roundup5 )
1313	1313	{
1314	1314	tatsumi_state *state = machine.driver_data<tatsumi_state>();
1315		UINT8 *dst = machine.region("gfx1")->base();
1316		UINT8 *src1 = machine.region("gfx2")->base();
1317		UINT8 *src2 = machine.region("gfx3")->base();
	1315	UINT8 *dst = machine.root_device().memregion("gfx1")->base();
	1316	UINT8 *src1 = machine.root_device().memregion("gfx2")->base();
	1317	UINT8 *src2 = state->memregion("gfx3")->base();
1318	1318	int i;
1319	1319
1320	1320	for (i=0; i<0xc0000; i+=32) {
r14976	r14977
1327	1327	}
1328	1328
1329	1329	// Copy sprite & palette data out of GFX rom area
1330		state->m_rom_sprite_lookup1 = machine.region("gfx2")->base();
1331		state->m_rom_sprite_lookup2 = machine.region("gfx3")->base();
1332		state->m_rom_clut0 = machine.region("gfx2")->base()+ 0xc0000 - 0x800;
1333		state->m_rom_clut1 = machine.region("gfx3")->base()+ 0xc0000 - 0x800;
	1330	state->m_rom_sprite_lookup1 = machine.root_device().memregion("gfx2")->base();
	1331	state->m_rom_sprite_lookup2 = machine.root_device().memregion("gfx3")->base();
	1332	state->m_rom_clut0 = machine.root_device().memregion("gfx2")->base()+ 0xc0000 - 0x800;
	1333	state->m_rom_clut1 = machine.root_device().memregion("gfx3")->base()+ 0xc0000 - 0x800;
1334	1334
1335	1335	tatsumi_reset(machine);
1336	1336	}
r14976	r14977
1338	1338	static DRIVER_INIT( cyclwarr )
1339	1339	{
1340	1340	tatsumi_state *state = machine.driver_data<tatsumi_state>();
1341		UINT8 *dst = machine.region("gfx1")->base();
1342		UINT8 *src1 = machine.region("gfx2")->base();
1343		int len1 = machine.region("gfx2")->bytes();
1344		UINT8 *src2 = machine.region("gfx3")->base();
1345		int len2 = machine.region("gfx3")->bytes();
	1341	UINT8 *dst = machine.root_device().memregion("gfx1")->base();
	1342	UINT8 *src1 = machine.root_device().memregion("gfx2")->base();
	1343	int len1 = machine.root_device().memregion("gfx2")->bytes();
	1344	UINT8 *src2 = machine.root_device().memregion("gfx3")->base();
	1345	int len2 = state->memregion("gfx3")->bytes();
1346	1346	int i;
1347	1347	for (i=0; i<len1; i+=32) {
1348	1348	memcpy(dst,src1,32);
r14976	r14977
1353	1353	src2+=32;
1354	1354	}
1355	1355
1356		dst = machine.region("maincpu")->base();
	1356	dst = machine.root_device().memregion("maincpu")->base();
1357	1357	memcpy(state->m_cyclwarr_cpua_ram,dst,8);
1358		memory_set_bankptr(machine, "bank1", dst);
	1358	state->membank("bank1")->set_base(dst);
1359	1359
1360		dst = machine.region("sub")->base();
	1360	dst = machine.root_device().memregion("sub")->base();
1361	1361	memcpy(state->m_cyclwarr_cpub_ram,dst,8);
1362		memory_set_bankptr(machine, "bank2", dst);
	1362	state->membank("bank2")->set_base(dst);
1363	1363
1364	1364	// Copy sprite & palette data out of GFX rom area
1365		state->m_rom_sprite_lookup1 = machine.region("gfx2")->base();
1366		state->m_rom_sprite_lookup2 = machine.region("gfx3")->base();
1367		state->m_rom_clut0 = machine.region("gfx2")->base() + len1 - 0x1000;
1368		state->m_rom_clut1 = machine.region("gfx3")->base() + len2 - 0x1000;
	1365	state->m_rom_sprite_lookup1 = machine.root_device().memregion("gfx2")->base();
	1366	state->m_rom_sprite_lookup2 = machine.root_device().memregion("gfx3")->base();
	1367	state->m_rom_clut0 = machine.root_device().memregion("gfx2")->base() + len1 - 0x1000;
	1368	state->m_rom_clut1 = machine.root_device().memregion("gfx3")->base() + len2 - 0x1000;
1369	1369
1370	1370	tatsumi_reset(machine);
1371	1371	}

src/mame/drivers/blmbycar.c

r14976	r14977
43	43	{
44	44	if (ACCESSING_BITS_0_7)
45	45	{
46		UINT8 *RAM = machine().region("oki")->base();
	46	UINT8 *RAM = memregion("oki")->base();
47	47	memcpy(&RAM[0x30000], &RAM[0x40000 + 0x10000 * (data & 0xf)], 0x10000);
48	48	}
49	49	}
r14976	r14977
521	521
522	522	static DRIVER_INIT( blmbycar )
523	523	{
524		UINT16 *RAM  = (UINT16 *) machine.region("maincpu")->base();
525		size_t size = machine.region("maincpu")->bytes() / 2;
	524	UINT16 *RAM  = (UINT16 *) machine.root_device().memregion("maincpu")->base();
	525	size_t size = machine.root_device().memregion("maincpu")->bytes() / 2;
526	526	int i;
527	527
528	528	for (i = 0; i < size; i++)

src/mame/drivers/gbusters.c

r14976	r14977
268	268	static MACHINE_START( gbusters )
269	269	{
270	270	gbusters_state *state = machine.driver_data<gbusters_state>();
271		UINT8 *ROM = machine.region("maincpu")->base();
	271	UINT8 *ROM = state->memregion("maincpu")->base();
272	272
273		memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x2000);
274		memory_set_bank(machine, "bank1", 0);
	273	state->membank("bank1")->configure_entries(0, 16, &ROM[0x10000], 0x2000);
	274	state->membank("bank1")->set_entry(0);
275	275
276	276	state->m_generic_paletteram_8.allocate(0x800);
277	277
r14976	r14977
288	288	static MACHINE_RESET( gbusters )
289	289	{
290	290	gbusters_state *state = machine.driver_data<gbusters_state>();
291		UINT8 *RAM = machine.region("maincpu")->base();
	291	UINT8 *RAM = state->memregion("maincpu")->base();
292	292
293	293	konami_configure_set_lines(machine.device("maincpu"), gbusters_banking);
294	294
r14976	r14977
425	425	static KONAMI_SETLINES_CALLBACK( gbusters_banking )
426	426	{
427	427	/* bits 0-3 ROM bank */
428		memory_set_bank(device->machine(),  "bank1", lines & 0x0f);
	428	device->machine().root_device().membank("bank1")->set_entry(lines & 0x0f);
429	429
430	430	if (lines & 0xf0)
431	431	{

src/mame/drivers/megaplay.c

r14976	r14977
427	427	static READ8_HANDLER( bank_r )
428	428	{
429	429	mplay_state *state = space->machine().driver_data<mplay_state>();
430		UINT8* bank = space->machine().region("mtbios")->base();
	430	UINT8* bank = state->memregion("mtbios")->base();
431	431	UINT32 fulladdress = state->m_mp_bios_bank_addr + offset;
432	432
433	433	if ((fulladdress >= 0x000000) && (fulladdress <= 0x3fffff)) // ROM Addresses
r14976	r14977
450	450	}
451	451	else
452	452	{
453		return space->machine().region("maincpu")->base()[fulladdress ^ 1];
	453	return space->machine().root_device().memregion("maincpu")->base()[fulladdress ^ 1];
454	454	}
455	455	}
456	456	else if (fulladdress >= 0xa10000 && fulladdress <= 0xa1001f) // IO Acess
r14976	r14977
828	828
829	829	static void mplay_start(running_machine &machine)
830	830	{
831		UINT8 *src = machine.region("mtbios")->base();
832		UINT8 *instruction_rom = machine.region("user1")->base();
833		UINT8 *game_rom = machine.region("maincpu")->base();
	831	UINT8 *src = machine.root_device().memregion("mtbios")->base();
	832	UINT8 *instruction_rom = machine.root_device().memregion("user1")->base();
	833	UINT8 *game_rom = machine.root_device().memregion("maincpu")->base();
834	834	int offs;
835	835
836	836	memmove(src + 0x10000, src + 0x8000, 0x18000); // move bios..

src/mame/drivers/m72.c

r14976	r14977
299	299	READ8_MEMBER(m72_state::m72_mcu_sample_r)
300	300	{
301	301	UINT8 sample;
302		sample = machine().region("samples")->base()[m_mcu_sample_addr++];
	302	sample = memregion("samples")->base()[m_mcu_sample_addr++];
303	303	return sample;
304	304	}
305	305
r14976	r14977
366	366	state->m_protection_ram = auto_alloc_array(machine, UINT16, 0x10000/2);
367	367	program->install_read_bank(0xb0000, 0xbffff, "bank1");
368	368	program->install_write_handler(0xb0000, 0xb0fff, write16_delegate(FUNC(m72_state::m72_main_mcu_w),state));
369		memory_set_bankptr(machine, "bank1", state->m_protection_ram);
	369	state->membank("bank1")->set_base(state->m_protection_ram);
370	370
371	371	//io->install_legacy_write_handler(0xc0, 0xc1, FUNC(loht_sample_trigger_w));
372	372	io->install_write_handler(0xc0, 0xc1, write16_delegate(FUNC(m72_state::m72_main_mcu_sound_w),state));
r14976	r14977
383	383	* prefetching on the V30.
384	384	*/
385	385	{
386		UINT8 *rom=machine.region("mcu")->base();
	386	UINT8 *rom=state->memregion("mcu")->base();
387	387
388	388	rom[0x12d+5] += 1; printf(" 5: %d\n", rom[0x12d+5]);
389	389	rom[0x12d+8] += 5;  printf(" 8: %d\n", rom[0x12d+8]);
r14976	r14977
423	423	#if 0
424	424	static int find_sample(int num)
425	425	{
426		UINT8 *rom = machine.region("samples")->base();
427		int len = machine.region("samples")->bytes();
	426	UINT8 *rom = machine.root_device().memregion("samples")->base();
	427	int len = machine.root_device().memregion("samples")->bytes();
428	428	int addr = 0;
429	429
430	430	while (num--)
r14976	r14977
740	740	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xb0000, 0xb0fff, "bank1");
741	741	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0xb0ffa, 0xb0ffb, read16_delegate(FUNC(m72_state::protection_r),state));
742	742	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xb0000, 0xb0fff, write16_delegate(FUNC(m72_state::protection_w),state));
743		memory_set_bankptr(machine, "bank1", state->m_protection_ram);
	743	state->membank("bank1")->set_base(state->m_protection_ram);
744	744	}
745	745
746	746	static DRIVER_INIT( bchopper )

src/mame/drivers/pokechmp.c

r14976	r14977
53	53
54	54	WRITE8_MEMBER(pokechmp_state::pokechmp_bank_w)
55	55	{
56		UINT8 *RAM = machine().region("maincpu")->base();
	56	UINT8 *RAM = memregion("maincpu")->base();
57	57
58	58	if (data == 0x00)
59	59	{
60		memory_set_bankptr(machine(), "bank1",&RAM[0x10000]);
61		memory_set_bankptr(machine(), "bank2",&RAM[0x12000]);
	60	membank("bank1")->set_base(&RAM[0x10000]);
	61	membank("bank2")->set_base(&RAM[0x12000]);
62	62	}
63	63	if (data == 0x01)
64	64	{
65		memory_set_bankptr(machine(), "bank1",&RAM[0x14000]);
66		memory_set_bankptr(machine(), "bank2",&RAM[0x16000]);
	65	membank("bank1")->set_base(&RAM[0x14000]);
	66	membank("bank2")->set_base(&RAM[0x16000]);
67	67	}
68	68	if (data == 0x02)
69	69	{
70		memory_set_bankptr(machine(), "bank1",&RAM[0x20000]);
71		memory_set_bankptr(machine(), "bank2",&RAM[0x22000]);
	70	membank("bank1")->set_base(&RAM[0x20000]);
	71	membank("bank2")->set_base(&RAM[0x22000]);
72	72	}
73	73
74	74	if (data == 0x03)
75	75	{
76		memory_set_bankptr(machine(), "bank1",&RAM[0x04000]);
77		memory_set_bankptr(machine(), "bank2",&RAM[0x06000]);
	76	membank("bank1")->set_base(&RAM[0x04000]);
	77	membank("bank2")->set_base(&RAM[0x06000]);
78	78	}
79	79	}
80	80
81	81	#ifdef UNUSED_FUNCTION
82	82	WRITE8_MEMBER(pokechmp_state::pokechmp_sound_bank_w)
83	83	{
84		memory_set_bank(machine(), "bank3", (data >> 2) & 1);
	84	membank("bank3")->set_entry((data >> 2) & 1);
85	85	}
86	86	#endif
87	87
r14976	r14977
262	262
263	263	static DRIVER_INIT( pokechmp )
264	264	{
265		memory_configure_bank(machine, "bank3", 0, 2, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	265	machine.root_device().membank("bank3")->configure_entries(0, 2, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
266	266	}
267	267
268	268

src/mame/drivers/crgolf.c

r14976	r14977
44	44
45	45	WRITE8_MEMBER(crgolf_state::rom_bank_select_w)
46	46	{
47		memory_set_bank(machine(), "bank1", data & 15);
	47	membank("bank1")->set_entry(data & 15);
48	48	}
49	49
50	50
r14976	r14977
56	56	state->m_audiocpu = machine.device("audiocpu");
57	57
58	58	/* configure the banking */
59		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x2000);
60		memory_set_bank(machine, "bank1", 0);
	59	state->membank("bank1")->configure_entries(0, 16, state->memregion("maincpu")->base() + 0x10000, 0x2000);
	60	state->membank("bank1")->set_entry(0);
61	61
62	62	/* register for save states */
63	63	state->save_item(NAME(state->m_port_select));
r14976	r14977
193	193	/* only play back if we have data remaining */
194	194	if (state->m_sample_count != 0xff)
195	195	{
196		UINT8 data = device->machine().region("adpcm")->base()[state->m_sample_offset >> 1];
	196	UINT8 data = state->memregion("adpcm")->base()[state->m_sample_offset >> 1];
197	197
198	198	/* write the next nibble and advance */
199	199	msm5205_data_w(device, (data >> (4 * (~state->m_sample_offset & 1))) & 0x0f);

src/mame/drivers/mastboy.c

r14976	r14977
542	542
543	543	if (bank>0x3) // ROM access
544	544	{
545		UINT8 *src    = machine().region( "gfx1" )->base();
	545	UINT8 *src    = memregion( "gfx1" )->base();
546	546	bank &=0x3;
547	547	return src[offset+(bank*0x4000)];
548	548	}
r14976	r14977
558	558	UINT8 *src;
559	559	int bank;
560	560	bank = m_bank & 0x7f;
561		src = machine().region       ( "user1" )->base() + bank * 0x4000;
	561	src = memregion       ( "user1" )->base() + bank * 0x4000;
562	562	return src[offset];
563	563	}
564	564	}
r14976	r14977
997	997	static DRIVER_INIT( mastboy )
998	998	{
999	999	mastboy_state *state = machine.driver_data<mastboy_state>();
1000		state->m_vram = machine.region( "gfx1" )->base(); // makes decoding the RAM based tiles easier this way
	1000	state->m_vram = state->memregion( "gfx1" )->base(); // makes decoding the RAM based tiles easier this way
1001	1001	}
1002	1002
1003	1003	GAME( 1991, mastboy,  0,          mastboy, mastboy, mastboy, ROT0, "Gaelco", "Master Boy (Spanish, PCB Rev A)", 0 )

src/mame/drivers/rmhaihai.c

r14976	r14977
155	155
156	156	READ8_MEMBER(rmhaihai_state::samples_r)
157	157	{
158		return machine().region("adpcm")->base()[offset];
	158	return memregion("adpcm")->base()[offset];
159	159	}
160	160
161	161	static WRITE8_DEVICE_HANDLER( adpcm_w )
r14976	r14977
181	181
182	182	WRITE8_MEMBER(rmhaihai_state::themj_rombank_w)
183	183	{
184		UINT8 *rom = machine().region("maincpu")->base() + 0x10000;
	184	UINT8 *rom = memregion("maincpu")->base() + 0x10000;
185	185	int bank = data & 0x03;
186	186	logerror("banksw %d\n",bank);
187		memory_set_bankptr(machine(), "bank1", rom + bank*0x4000);
188		memory_set_bankptr(machine(), "bank2", rom + bank*0x4000 + 0x2000);
	187	membank("bank1")->set_base(rom + bank*0x4000);
	188	membank("bank2")->set_base(rom + bank*0x4000 + 0x2000);
189	189	}
190	190
191	191	static MACHINE_RESET( themj )
r14976	r14977
665	665
666	666	static DRIVER_INIT( rmhaihai )
667	667	{
668		UINT8 *rom = machine.region("gfx1")->base();
669		int size = machine.region("gfx1")->bytes();
	668	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	669	int size = machine.root_device().memregion("gfx1")->bytes();
670	670	int a,b;
671	671
672	672	size /= 2;

src/mame/drivers/topspeed.c

r14976	r14977
392	392	static void reset_sound_region( running_machine &machine )
393	393	{
394	394	topspeed_state *state = machine.driver_data<topspeed_state>();
395		memory_set_bank(machine,  "bank10", state->m_banknum);
	395	state->membank("bank10")->set_entry(state->m_banknum);
396	396	}
397	397
398	398	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )   /* assumes Z80 sandwiched between 68Ks */
r14976	r14977
412	412	}
413	413	else
414	414	{
415		state->m_adpcm_data = device->machine().region("adpcm")->base()[state->m_adpcm_pos];
	415	state->m_adpcm_data = device->machine().root_device().memregion("adpcm")->base()[state->m_adpcm_pos];
416	416	state->m_adpcm_pos = (state->m_adpcm_pos + 1) & 0x1ffff;
417	417	msm5205_data_w(device, state->m_adpcm_data >> 4);
418	418	}
r14976	r14977
646	646	{
647	647	topspeed_state *state = machine.driver_data<topspeed_state>();
648	648
649		memory_configure_bank(machine, "bank10", 0, 4, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	649	state->membank("bank10")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0xc000, 0x4000);
650	650
651	651	state->m_maincpu = machine.device("maincpu");
652	652	state->m_subcpu = machine.device("sub");

src/mame/drivers/segae.c

r14976	r14977
427	427	{
428	428	m_f7_bank_value = data;
429	429
430		memory_set_bankptr(machine(), "vdp1_bank", m_vdp1_vram->base() + ( ( data & 0x80 ) ? 0x4000 : 0 ) );
431		memory_set_bankptr(machine(), "vdp2_bank", m_vdp2_vram->base() + ( ( data & 0x40 ) ? 0x4000 : 0 ) );
	430	membank("vdp1_bank")->set_base(m_vdp1_vram->base() + ( ( data & 0x80 ) ? 0x4000 : 0 ) );
	431	membank("vdp2_bank")->set_base(m_vdp2_vram->base() + ( ( data & 0x40 ) ? 0x4000 : 0 ) );
432	432
433		memory_set_bank(machine(), "bank1", data & 0x0f);
	433	membank("bank1")->set_entry(data & 0x0f);
434	434	}
435	435
436	436
437	437	void systeme_state::driver_start()
438	438	{
439	439	/* Allocate video RAM */
440		m_vdp1_vram = machine().region_alloc("vdp1_vram", 2 * 0x4000, 1, ENDIANNESS_LITTLE);
441		m_vdp2_vram = machine().region_alloc("vdp2_vram", 2 * 0x4000, 1, ENDIANNESS_LITTLE);
	440	m_vdp1_vram = machine().memory().region_alloc("vdp1_vram", 2 * 0x4000, 1, ENDIANNESS_LITTLE);
	441	m_vdp2_vram = machine().memory().region_alloc("vdp2_vram", 2 * 0x4000, 1, ENDIANNESS_LITTLE);
442	442
443		memory_configure_bank(machine(), "bank1", 0, 16, machine().region("maincpu")->base() + 0x10000, 0x4000);
	443	membank("bank1")->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x4000);
444	444
445	445	if ( !strcmp( system().name, "ridleofp" ) )
446	446	{

src/mame/drivers/amspdwy.c

r14976	r14977
93	93
94	94	READ8_MEMBER(amspdwy_state::amspdwy_port_r)
95	95	{
96		UINT8 *tracks = machine().region("maincpu")->base() + 0x10000;
	96	UINT8 *tracks = memregion("maincpu")->base() + 0x10000;
97	97	return tracks[offset];
98	98	}
99	99

src/mame/drivers/fantland.c

r14976	r14977
368	368	if (!state->m_adpcm_playing[voice])
369	369	return;
370	370
371		rom = device->machine().region("adpcm")->base();
372		len = device->machine().region("adpcm")->bytes() * 2;
	371	rom = device->machine().root_device().memregion("adpcm")->base();
	372	len = state->memregion("adpcm")->bytes() * 2;
373	373
374	374	start = state->m_adpcm_addr[0][voice] + state->m_adpcm_nibble[voice];
375	375	stop = state->m_adpcm_addr[1][voice];

src/mame/drivers/legionna.c

r14976	r14977
2188	2188	static DRIVER_INIT( cupsoc )
2189	2189	{
2190	2190	#if CUPSOC_DEBUG_MODE
2191		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2191	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2192	2192
2193	2193	/*Press p1 button 3 to enter into debug mode during gameplay*/
2194	2194	ROM[0xffffb/2] = 0x0000;
r14976	r14977
2200	2200	static DRIVER_INIT( denjinmk )
2201	2201	{
2202	2202	/* problem with audio comms? */
2203		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2203	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2204	2204	ROM[0x5fe4/2] = 0x4e71;
2205	2205	}
2206	2206
2207	2207	static DRIVER_INIT( legiongfx )
2208	2208	{
2209		descramble_legionnaire_gfx( machine, machine.region("gfx5")->base() );
	2209	descramble_legionnaire_gfx( machine, machine.root_device().memregion("gfx5")->base() );
2210	2210	}
2211	2211
2212	2212

src/mame/drivers/albazc.c

r14976	r14977
40	40
41	41	static PALETTE_INIT( hanaroku )
42	42	{
43		const UINT8 *color_prom = machine.region("proms")->base();
	43	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
44	44	int i;
45	45	int r, g, b;
46	46

src/mame/drivers/midas.c

r14976	r14977
870	870
871	871	static DRIVER_INIT( livequiz )
872	872	{
873		UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	873	UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
874	874
875	875	// PROTECTION CHECKS
876	876	rom[0x13345a/2]   =   0x4e75;

src/mame/drivers/aristmk4.c

r14976	r14977
1587	1587	/* same as Casino Winner HW */
1588	1588	static PALETTE_INIT( aristmk4 )
1589	1589	{
1590		const UINT8 *color_prom = machine.region("proms")->base();
	1590	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
1591	1591	int i;
1592	1592
1593	1593	for (i = 0;i < machine.total_colors();i++)
r14976	r14977
1614	1614	static DRIVER_INIT( aristmk4 )
1615	1615	{
1616	1616	aristmk4_state *state = machine.driver_data<aristmk4_state>();
1617		state->m_shapeRomPtr = (UINT8 *)machine.region("tile_gfx")->base();
	1617	state->m_shapeRomPtr = (UINT8 *)state->memregion("tile_gfx")->base();
1618	1618	memcpy(state->m_shapeRom,state->m_shapeRomPtr,sizeof(state->m_shapeRom)); // back up
1619	1619	state->m_nvram = auto_alloc_array(machine, UINT8, 0x1000);
1620	1620	}

src/mame/drivers/thunderx.c

r14976	r14977
315	315
316	316	WRITE8_MEMBER(thunderx_state::scontra_bankswitch_w)
317	317	{
318		UINT8 *RAM = machine().region("maincpu")->base();
	318	UINT8 *RAM = memregion("maincpu")->base();
319	319	int offs;
320	320
321	321	//logerror("%04x: bank switch %02x\n",cpu_get_pc(&space.device()),data);
322	322
323	323	/* bits 0-3 ROM bank */
324	324	offs = 0x10000 + (data & 0x0f)*0x2000;
325		memory_set_bankptr(machine(),  "bank1", &RAM[offs] );
	325	membank("bank1")->set_base(&RAM[offs] );
326	326
327	327	/* bit 4 select work RAM or palette RAM at 5800-5fff */
328	328	m_palette_selected = ~data & 0x10;
r14976	r14977
624	624	static MACHINE_START( thunderx )
625	625	{
626	626	thunderx_state *state = machine.driver_data<thunderx_state>();
627		UINT8 *ROM = machine.region("maincpu")->base();
	627	UINT8 *ROM = state->memregion("maincpu")->base();
628	628
629		memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x2000);
630		memory_configure_bank(machine, "bank1", 12, 4, &ROM[0x08000], 0x2000);
631		memory_set_bank(machine, "bank1", 0);
	629	state->membank("bank1")->configure_entries(0, 12, &ROM[0x10000], 0x2000);
	630	state->membank("bank1")->configure_entries(12, 4, &ROM[0x08000], 0x2000);
	631	state->membank("bank1")->set_entry(0);
632	632
633	633	memset(state->m_pmcram, 0, sizeof(state->m_pmcram));
634	634
r14976	r14977
991	991	static KONAMI_SETLINES_CALLBACK( thunderx_banking )
992	992	{
993	993	//logerror("thunderx %04x: bank select %02x\n", cpu_get_pc(device->cpu), lines);
994		memory_set_bank(device->machine(),  "bank1", ((lines & 0x0f) ^ 0x08));
	994	device->machine().root_device().membank("bank1")->set_entry(((lines & 0x0f) ^ 0x08));
995	995	}
996	996
997	997	GAME( 1988, scontra,   0,        scontra,  scontra,  0, ROT90, "Konami", "Super Contra", GAME_SUPPORTS_SAVE )

src/mame/drivers/murogmbl.c

r14976	r14977
51	51
52	52	static PALETTE_INIT( murogmbl )
53	53	{
54		const UINT8 *color_prom = machine.region("proms")->base();
	54	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
55	55	int   bit0, bit1, bit2 , r, g, b;
56	56	int   i;
57	57

src/mame/drivers/sothello.c

r14976	r14977
80	80
81	81	WRITE8_MEMBER(sothello_state::bank_w)
82	82	{
83		UINT8 *RAM = machine().region("maincpu")->base();
	83	UINT8 *RAM = memregion("maincpu")->base();
84	84	int bank=0;
85	85	switch(data^0xff)
86	86	{
r14976	r14977
89	89	case 4: bank=2; break;
90	90	case 8: bank=3; break;
91	91	}
92		memory_set_bankptr(machine(),"bank1",&RAM[bank*0x4000+0x10000]);
	92	membank("bank1")->set_base(&RAM[bank*0x4000+0x10000]);
93	93	}
94	94
95	95	static TIMER_CALLBACK( subcpu_suspend )

src/mame/drivers/tumbleb.c

r14976	r14977
490	490	/* we use channels 1,2,3 for sound effects, and channel 4 for music */
491	491	static void tumbleb2_set_music_bank( running_machine &machine, int bank )
492	492	{
493		UINT8 *oki = machine.region("oki")->base();
	493	UINT8 *oki = machine.root_device().memregion("oki")->base();
494	494	memcpy(&oki[0x38000], &oki[0x80000 + 0x38000 + 0x8000 * bank], 0x8000);
495	495	}
496	496
r14976	r14977
783	783
784	784	WRITE8_MEMBER(tumbleb_state::oki_sound_bank_w)
785	785	{
786		UINT8 *oki = machine().region("oki")->base();
	786	UINT8 *oki = memregion("oki")->base();
787	787	memcpy(&oki[0x30000], &oki[(data * 0x10000) + 0x40000], 0x10000);
788	788	}
789	789
r14976	r14977
808	808
809	809	WRITE8_MEMBER(tumbleb_state::jumppop_z80_bank_w)
810	810	{
811		memory_set_bankptr(machine(), "bank1", machine().region("audiocpu")->base() + 0x10000 + (0x4000 * data));
	811	membank("bank1")->set_base(machine().root_device().memregion("audiocpu")->base() + 0x10000 + (0x4000 * data));
812	812	}
813	813
814	814	static ADDRESS_MAP_START( jumppop_sound_map, AS_PROGRAM, 8, tumbleb_state )
r14976	r14977
856	856
857	857	WRITE8_MEMBER(tumbleb_state::jumpkids_oki_bank_w)
858	858	{
859		UINT8* sound1 = machine().region("oki")->base();
860		UINT8* sound2 = machine().region("oki2")->base();
	859	UINT8* sound1 = memregion("oki")->base();
	860	UINT8* sound2 = memregion("oki2")->base();
861	861	int bank = data & 0x03;
862	862
863	863	memcpy(sound1 + 0x20000, sound2 + bank * 0x20000, 0x20000);
r14976	r14977
2227	2227	tumbleb_state *state = machine.driver_data<tumbleb_state>();
2228	2228
2229	2229	/* copy protection data every reset */
2230		UINT16 *PROTDATA = (UINT16*)machine.region("user1")->base();
2231		int i, len = machine.region("user1")->bytes();
	2230	UINT16 *PROTDATA = (UINT16*)machine.root_device().memregion("user1")->base();
	2231	int i, len = state->memregion("user1")->bytes();
2232	2232
2233	2233	for (i = 0; i < len / 2; i++)
2234	2234	state->m_mainram[0x000/2 + i] = PROTDATA[i];
r14976	r14977
3362	3362	void tumblepb_patch_code(running_machine &machine, UINT16 offset)
3363	3363	{
3364	3364	/* A hack which enables all Dip Switches effects */
3365		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	3365	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
3366	3366	RAM[(offset + 0)/2] = 0x0240;
3367	3367	RAM[(offset + 2)/2] = 0xffff;   // andi.w  #$f3ff, D0
3368	3368	}
r14976	r14977
3371	3371
3372	3372	static void tumblepb_gfx1_rearrange(running_machine &machine)
3373	3373	{
3374		UINT8 *rom = machine.region("gfx1")->base();
3375		int len = machine.region("gfx1")->bytes();
	3374	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	3375	int len = machine.root_device().memregion("gfx1")->bytes();
3376	3376	int i;
3377	3377
3378	3378	/* gfx data is in the wrong order */
r14976	r14977
3429	3429	#if FNCYWLD_HACK
3430	3430	/* This is a hack to allow you to use the extra features
3431	3431	of the 2 first "Unused" Dip Switch (see notes above). */
3432		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	3432	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
3433	3433	RAM[0x0005fa/2] = 0x4e71;
3434	3434	RAM[0x00060a/2] = 0x4e71;
3435	3435	#endif
r14976	r14977
3456	3456	{
3457	3457
3458	3458	tumbleb_state *state = machine.driver_data<tumbleb_state>();
3459		//  UINT16 *HCROM = (UINT16*)machine.region("maincpu")->base();
3460		UINT16 *PROTDATA = (UINT16*)machine.region("user1")->base();
3461		int i, len = machine.region("user1")->bytes();
	3459	//  UINT16 *HCROM = (UINT16*)machine.root_device().memregion("maincpu")->base();
	3460	UINT16 *PROTDATA = (UINT16*)machine.root_device().memregion("user1")->base();
	3461	int i, len = state->memregion("user1")->bytes();
3462	3462	/* simulate RAM initialization done by the protection MCU */
3463	3463	/* verified on real hardware */
3464	3464	//  static const UINT16 htchctch_mcu68k[] =
r14976	r14977
3710	3710
3711	3711	static void suprtrio_decrypt_code(running_machine &machine)
3712	3712	{
3713		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	3713	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
3714	3714	UINT16 *buf = auto_alloc_array(machine, UINT16, 0x80000/2);
3715	3715	int i;
3716	3716
r14976	r14977
3728	3728
3729	3729	static void suprtrio_decrypt_gfx(running_machine &machine)
3730	3730	{
3731		UINT16 *rom = (UINT16 *)machine.region("gfx1")->base();
	3731	UINT16 *rom = (UINT16 *)machine.root_device().memregion("gfx1")->base();
3732	3732	UINT16 *buf = auto_alloc_array(machine, UINT16, 0x100000/2);
3733	3733	int i;
3734	3734

src/mame/drivers/cd32.c

r14976	r14977
56	56	data = (data >> 16) & 1;
57	57
58	58	/* switch banks as appropriate */
59		memory_set_bank(machine(), "bank1", data & 1);
	59	membank("bank1")->set_entry(data & 1);
60	60
61	61	/* swap the write handlers between ROM and bank 1 based on the bit */
62	62	if ((data & 1) == 0)
r14976	r14977
853	853	amiga_machine_config(machine, &cd32_intf);
854	854
855	855	/* set up memory */
856		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
857		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	856	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	857	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
858	858
859	859	/* input hack */
860	860	state->m_input_hack = NULL;
r14976	r14977
1472	1472	amiga_machine_config(machine, &cd32_intf);
1473	1473
1474	1474	/* set up memory */
1475		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
1476		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	1475	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	1476	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
1477	1477
1478	1478	/* input hack */
1479	1479	state->m_input_hack = NULL;

src/mame/drivers/momoko.c

r14976	r14977
49	49
50	50	WRITE8_MEMBER(momoko_state::momoko_bg_read_bank_w)
51	51	{
52		memory_set_bank(machine(), "bank1", data & 0x1f);
	52	membank("bank1")->set_entry(data & 0x1f);
53	53	}
54	54
55	55	/****************************************************************************/
r14976	r14977
228	228	static MACHINE_START( momoko )
229	229	{
230	230	momoko_state *state = machine.driver_data<momoko_state>();
231		UINT8 *BG_MAP = machine.region("user1")->base();
	231	UINT8 *BG_MAP = state->memregion("user1")->base();
232	232
233		memory_configure_bank(machine, "bank1", 0, 32, &BG_MAP[0x0000], 0x1000);
	233	state->membank("bank1")->configure_entries(0, 32, &BG_MAP[0x0000], 0x1000);
234	234
235	235	state->save_item(NAME(state->m_fg_scrollx));
236	236	state->save_item(NAME(state->m_fg_scrolly));

src/mame/drivers/cabaret.c

r14976	r14977
361	361
362	362	static DRIVER_INIT( cabaret )
363	363	{
364		UINT8 *rom = machine.region("maincpu")->base();
	364	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
365	365	int i;
366	366
367	367	/* decrypt the program ROM */

src/mame/drivers/kchamp.c

r14976	r14977
724	724	{
725	725	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
726	726	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
727		UINT8 *rom = machine.region("maincpu")->base();
	727	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
728	728	int A;
729	729
730	730	space->set_decrypted_region(0x0000, 0xffff, decrypted);
r14976	r14977
739	739	static DRIVER_INIT( kchampvs )
740	740	{
741	741	kchamp_state *state = machine.driver_data<kchamp_state>();
742		UINT8 *rom = machine.region("maincpu")->base();
	742	UINT8 *rom = state->memregion("maincpu")->base();
743	743	UINT8 *decrypted = decrypt_code(machine);
744	744	int A;
745	745

src/mame/drivers/olibochu.c

r14976	r14977
87	87
88	88	static PALETTE_INIT( olibochu )
89	89	{
90		const UINT8 *color_prom = machine.region("proms")->base();
	90	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
91	91	int i;
92	92
93	93	for (i = 0; i < machine.total_colors(); i++)

src/mame/drivers/m90.c

r14976	r14977
51	51	WRITE16_MEMBER(m90_state::quizf1_bankswitch_w)
52	52	{
53	53	if (ACCESSING_BITS_0_7)
54		memory_set_bank(machine(), "bank1", data & 0xf);
	54	membank("bank1")->set_entry(data & 0xf);
55	55	}
56	56
57	57	WRITE16_MEMBER(m90_state::dynablsb_sound_command_w)
r14976	r14977
1186	1186	static DRIVER_INIT( quizf1 )
1187	1187	{
1188	1188	m90_state *state = machine.driver_data<m90_state>();
1189		memory_configure_bank(machine, "bank1", 0, 16, machine.region("user1")->base(), 0x10000);
	1189	state->membank("bank1")->configure_entries(0, 16, state->memregion("user1")->base(), 0x10000);
1190	1190	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x04, 0x05, write16_delegate(FUNC(m90_state::quizf1_bankswitch_w),state));
1191	1191	}
1192	1192
r14976	r14977
1194	1194
1195	1195	static DRIVER_INIT( bomblord )
1196	1196	{
1197		UINT16 *ROM = (UINT16 *)(machine.region("maincpu")->base());
	1197	UINT16 *ROM = (UINT16 *)(machine.root_device().memregion("maincpu")->base());
1198	1198
1199	1199	for (int i = 0; i < 0x100000 / 2; i += 4)
1200	1200	{

src/mame/drivers/tugboat.c

r14976	r14977
51	51	just four 1k resistors. */
52	52	static PALETTE_INIT( tugboat )
53	53	{
54		const UINT8 *color_prom = machine.region("proms")->base();
	54	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
55	55	int i;
56	56
57	57

src/mame/drivers/kingdrby.c

r14976	r14977
954	954
955	955	static PALETTE_INIT(kingdrby)
956	956	{
957		const UINT8 *color_prom = machine.region("proms")->base();
	957	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
958	958	int   bit0, bit1, bit2 , r, g, b;
959	959	int   i;
960	960
r14976	r14977
980	980
981	981	static PALETTE_INIT(kingdrbb)
982	982	{
983		UINT8 *raw_prom = machine.region("raw_prom")->base();
984		UINT8 *prom = machine.region("proms")->base();
	983	UINT8 *raw_prom = machine.root_device().memregion("raw_prom")->base();
	984	UINT8 *prom = machine.root_device().memregion("proms")->base();
985	985	int   bit0, bit1, bit2 , r, g, b;
986	986	int   i;
987	987

src/mame/drivers/r2dx_v33.c

r14976	r14977
227	227	if(frame == 5)
228	228	{
229	229	int i,data;
230		static UINT8 *rom = space->machine().region("mainprg")->base();
	230	static UINT8 *rom = space->machine().root_device().memregion("mainprg")->base();
231	231
232	232	for(i=0;i<0x800;i+=2)
233	233	{
r14976	r14977
733	733
734	734	static DRIVER_INIT(rdx_v33)
735	735	{
736		memory_configure_bank(machine, "bank1", 0, 0x20, machine.region("mainprg")->base(), 0x20000);
	736	machine.root_device().membank("bank1")->configure_entries(0, 0x20, machine.root_device().memregion("mainprg")->base(), 0x20000);
737	737
738	738	raiden2_decrypt_sprites(machine);
739	739
740		memory_set_bank(machine, "bank1", 1);
	740	machine.root_device().membank("bank1")->set_entry(1);
741	741	}
742	742
743	743	static DRIVER_INIT(nzerotea)
744	744	{
745		memory_configure_bank(machine, "bank1", 0, 2, machine.region("mainprg")->base(), 0x20000);
	745	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("mainprg")->base(), 0x20000);
746	746
747	747	zeroteam_decrypt_sprites(machine);
748	748
749		memory_set_bank(machine, "bank1", 1);
	749	machine.root_device().membank("bank1")->set_entry(1);
750	750
751	751	}
752	752

src/mame/drivers/phoenix.c

r14976	r14977
446	446
447	447	static MACHINE_RESET( phoenix )
448	448	{
449		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x4000);
	449	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x4000);
450	450	}
451	451
452	452

src/mame/drivers/lastfght.c

r14976	r14977
148	148	#if 1
149	149	// gfx roms viewer (toggle with enter, use pgup/down to browse)
150	150	int x, y, count = 0;
151		UINT8 *gfxdata = screen.machine().region("gfx1")->base();
	151	UINT8 *gfxdata = screen.machine().root_device().memregion("gfx1")->base();
152	152	UINT8 data;
153	153
154	154	if (screen.machine().input().code_pressed_once(KEYCODE_ENTER))   state->m_view_roms ^= 1;
r14976	r14977
156	156	{
157	157	if (screen.machine().input().code_pressed_once(KEYCODE_PGDN))   state->m_base += 512 * 256;
158	158	if (screen.machine().input().code_pressed_once(KEYCODE_PGUP))   state->m_base -= 512 * 256;
159		state->m_base %= screen.machine().region("gfx1")->bytes();
	159	state->m_base %= state->memregion("gfx1")->bytes();
160	160
161	161	count = state->m_base;
162	162
r14976	r14977
330	330	if (ACCESSING_BITS_8_15)
331	331	{
332	332	int x, y, addr;
333		UINT8 *gfxdata = machine().region( "gfx1" )->base();
	333	UINT8 *gfxdata = memregion( "gfx1" )->base();
334	334	bitmap_ind16 &dest = m_bitmap[m_dest];
335	335
336	336	#if 0
r14976	r14977
621	621
622	622	static DRIVER_INIT(lastfght)
623	623	{
624		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	624	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
625	625
626	626	// pass initial check (protection ? hw?)
627	627	rom[0x00354 / 2] = 0x403e;

src/mame/drivers/superqix.c

r14976	r14977
112	112	{
113	113	superqix_state *state = device.machine().driver_data<superqix_state>();
114	114	running_machine &machine = device.machine();
115		UINT8 *src = machine.region("samples")->base();
116		int i, len = machine.region("samples")->bytes();
	115	UINT8 *src = machine.root_device().memregion("samples")->base();
	116	int i, len = state->memregion("samples")->bytes();
117	117
118	118	/* convert 8-bit unsigned samples to 8-bit signed */
119	119	state->m_samplebuf = auto_alloc_array(machine, INT16, len);
r14976	r14977
124	124	WRITE8_MEMBER(superqix_state::pbillian_sample_trigger_w)
125	125	{
126	126	samples_device *samples = machine().device<samples_device>("samples");
127		UINT8 *src = machine().region("samples")->base();
128		int len = machine().region("samples")->bytes();
	127	UINT8 *src = memregion("samples")->base();
	128	int len = memregion("samples")->bytes();
129	129	int start,end;
130	130
131	131	start = data << 7;
r14976	r14977
548	548	static MACHINE_START( superqix )
549	549	{
550	550	/* configure the banks */
551		memory_configure_bank(machine, "bank1", 0, 4, machine.region("maincpu")->base() + 0x10000, 0x4000);
	551	machine.root_device().membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
552	552
553	553	machine_init_common(machine);
554	554	}
r14976	r14977
556	556	static MACHINE_START( pbillian )
557	557	{
558	558	/* configure the banks */
559		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x4000);
	559	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
560	560
561	561	machine_init_common(machine);
562	562	}
r14976	r14977
1363	1363	int i,j;
1364	1364
1365	1365	/* decrypt program code; the address lines are shuffled around in a non-trivial way */
1366		src = machine.region("maincpu")->base();
1367		len = machine.region("maincpu")->bytes();
	1366	src = machine.root_device().memregion("maincpu")->base();
	1367	len = machine.root_device().memregion("maincpu")->bytes();
1368	1368	for (i = 0;i < len;i += 16)
1369	1369	{
1370	1370	memcpy(temp,&src[i],16);
r14976	r14977
1383	1383	}
1384	1384
1385	1385	/* decrypt gfx ROMs; simple bit swap on the address lines */
1386		src = machine.region("gfx1")->base();
1387		len = machine.region("gfx1")->bytes();
	1386	src = machine.root_device().memregion("gfx1")->base();
	1387	len = machine.root_device().memregion("gfx1")->bytes();
1388	1388	for (i = 0;i < len;i += 16)
1389	1389	{
1390	1390	memcpy(temp,&src[i],16);
r14976	r14977
1394	1394	}
1395	1395	}
1396	1396
1397		src = machine.region("gfx2")->base();
1398		len = machine.region("gfx2")->bytes();
	1397	src = machine.root_device().memregion("gfx2")->base();
	1398	len = machine.root_device().memregion("gfx2")->bytes();
1399	1399	for (i = 0;i < len;i += 16)
1400	1400	{
1401	1401	memcpy(temp,&src[i],16);
r14976	r14977
1405	1405	}
1406	1406	}
1407	1407
1408		src = machine.region("gfx3")->base();
1409		len = machine.region("gfx3")->bytes();
	1408	src = machine.root_device().memregion("gfx3")->base();
	1409	len = machine.root_device().memregion("gfx3")->bytes();
1410	1410	for (i = 0;i < len;i += 16)
1411	1411	{
1412	1412	memcpy(temp,&src[i],16);

src/mame/drivers/vega.c

r14976	r14977
106	106	DRIVER_INIT(vegaa)
107	107	{
108	108	UINT8* buf = (UINT8*)malloc(0x10000);
109		UINT8* rom = machine.region("maincpu")->base();
	109	UINT8* rom = machine.root_device().memregion("maincpu")->base();
110	110	int i;
111	111	int count = 0;
112	112	// last 0xc bytes of file are just some settings, ignore

src/mame/drivers/bfm_sc4h.c

r14976	r14977
568	568	static MACHINE_START( sc4 )
569	569	{
570	570	sc4_state *state = machine.driver_data<sc4_state>();
571		state->m_cpuregion = (UINT16*)machine.region( "maincpu" )->base();
	571	state->m_cpuregion = (UINT16*)state->memregion( "maincpu" )->base();
572	572	state->m_mainram = (UINT16*)auto_alloc_array_clear(machine, UINT16, 0x10000);
573	573	state->m_duart = machine.device("duart68681");
574	574	state->m_ymz = machine.device("ymz");

src/mame/drivers/warpsped.c

r14976	r14977
121	121	UINT8 code = 0x3f;
122	122	if ( tile_index & 1 )
123	123	{
124		code = machine.region("starfield")->base()[tile_index >> 1] & 0x3f;
	124	code = machine.root_device().memregion("starfield")->base()[tile_index >> 1] & 0x3f;
125	125	}
126	126	SET_TILE_INFO(1, code, 0, 0);
127	127	}

src/mame/drivers/rltennis.c

r14976	r14977
162	162	state->m_screen = machine.device(  "screen");
163	163	state->m_dac_1 = machine.device("dac1");
164	164	state->m_dac_2 = machine.device("dac2");
165		state->m_samples_1 = machine.region("samples1")->base();
166		state->m_samples_2 = machine.region("samples2")->base();
167		state->m_gfx =  machine.region("gfx1")->base();
	165	state->m_samples_1 = machine.root_device().memregion("samples1")->base();
	166	state->m_samples_2 = machine.root_device().memregion("samples2")->base();
	167	state->m_gfx =  state->memregion("gfx1")->base();
168	168	state->m_timer = machine.scheduler().timer_alloc(FUNC(sample_player));
169	169	}
170	170

src/mame/drivers/gei.c

r14976	r14977
269	269
270	270	WRITE8_MEMBER(gei_state::banksel_main_w)
271	271	{
272		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x8000);
	272	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x8000);
273	273	}
274	274	WRITE8_MEMBER(gei_state::banksel_1_w)
275	275	{
276		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x10000);
	276	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
277	277	}
278	278	WRITE8_MEMBER(gei_state::banksel_2_w)
279	279	{
280		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x18000);
	280	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x18000);
281	281	}
282	282	WRITE8_MEMBER(gei_state::banksel_3_w)
283	283	{
284		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x20000);
	284	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x20000);
285	285	}
286	286	WRITE8_MEMBER(gei_state::banksel_4_w)
287	287	{
288		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x28000);
	288	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x28000);
289	289	}
290	290	WRITE8_MEMBER(gei_state::banksel_5_w)
291	291	{
292		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x30000);
	292	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x30000);
293	293	}
294	294
295	295	WRITE8_MEMBER(gei_state::banksel_1_1_w)
296	296	{
297		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x10000);
	297	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
298	298	}
299	299	WRITE8_MEMBER(gei_state::banksel_2_1_w)
300	300	{
301		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x14000);
	301	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x14000);
302	302	}
303	303	WRITE8_MEMBER(gei_state::banksel_3_1_w)
304	304	{
305		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x18000);
	305	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x18000);
306	306	}
307	307	WRITE8_MEMBER(gei_state::banksel_4_1_w)
308	308	{
309		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x1c000);
	309	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x1c000);
310	310	}
311	311	WRITE8_MEMBER(gei_state::banksel_5_1_w)
312	312	{
313		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x20000);
	313	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x20000);
314	314	}
315	315	WRITE8_MEMBER(gei_state::banksel_1_2_w)
316	316	{
317		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x12000);
	317	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x12000);
318	318	}
319	319	WRITE8_MEMBER(gei_state::banksel_2_2_w)
320	320	{
321		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x16000);
	321	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x16000);
322	322	}
323	323	WRITE8_MEMBER(gei_state::banksel_3_2_w)
324	324	{
325		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x1a000);
	325	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x1a000);
326	326	}
327	327	WRITE8_MEMBER(gei_state::banksel_4_2_w)
328	328	{
329		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x1e000);
	329	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x1e000);
330	330	}
331	331	WRITE8_MEMBER(gei_state::banksel_5_2_w)
332	332	{
333		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x22000);
	333	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x22000);
334	334	}
335	335
336	336	WRITE8_MEMBER(gei_state::geimulti_bank_w)
r14976	r14977
358	358	}
359	359
360	360	if (bank != -1)
361		memory_set_bankptr(machine(), "bank1", machine().region("bank")->base() + bank*0x8000);
	361	membank("bank1")->set_base(machine().root_device().memregion("bank")->base() + bank*0x8000);
362	362	}
363	363
364	364	READ8_MEMBER(gei_state::banksel_1_r)
365	365	{
366		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x10000);
	366	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
367	367	return 0x03;
368	368	};
369	369
370	370	READ8_MEMBER(gei_state::banksel_2_r)
371	371	{
372		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x18000);
	372	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x18000);
373	373	return 0x03;
374	374	}
375	375
376	376	READ8_MEMBER(gei_state::banksel_3_r)
377	377	{
378		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x20000);
	378	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x20000);
379	379	return 0x03;
380	380	}
381	381
382	382	READ8_MEMBER(gei_state::banksel_4_r)
383	383	{
384		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x28000);
	384	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x28000);
385	385	return 0x03;
386	386	}
387	387
388	388	READ8_MEMBER(gei_state::banksel_5_r)
389	389	{
390		memory_set_bankptr(machine(), "bank1",machine().region("maincpu")->base() + 0x30000);
	390	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x30000);
391	391	return 0x03;
392	392	}
393	393
r14976	r14977
1873	1873
1874	1874	static DRIVER_INIT( setbank )
1875	1875	{
1876		memory_set_bankptr(machine, "bank1",machine.region("maincpu")->base() + 0x2000);
	1876	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x2000);
1877	1877	}
1878	1878
1879	1879	static DRIVER_INIT( geimulti )
1880	1880	{
1881		memory_set_bankptr(machine, "bank1",machine.region("bank")->base() + 0x0000);
	1881	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bank")->base() + 0x0000);
1882	1882	}
1883	1883
1884	1884	GAME( 1982, jokpoker, 0,        gselect,  gselect,  setbank, ROT0, "Greyhound Electronics", "Joker Poker (Version 16.03B)",            GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )

src/mame/drivers/segas32.c

r14976	r14977
1130	1130	WRITE8_MEMBER(segas32_state::sound_bank_lo_w)
1131	1131	{
1132	1132	m_sound_bank = (m_sound_bank & ~0x3f) | (data & 0x3f);
1133		memory_set_bankptr(machine(), "bank1", machine().region("soundcpu")->base() + 0x100000 + 0x2000 * m_sound_bank);
	1133	membank("bank1")->set_base(machine().root_device().memregion("soundcpu")->base() + 0x100000 + 0x2000 * m_sound_bank);
1134	1134	}
1135	1135
1136	1136
1137	1137	WRITE8_MEMBER(segas32_state::sound_bank_hi_w)
1138	1138	{
1139	1139	m_sound_bank = (m_sound_bank & 0x3f) | ((data & 0x04) << 4) | ((data & 0x03) << 7);
1140		memory_set_bankptr(machine(), "bank1", machine().region("soundcpu")->base() + 0x100000 + 0x2000 * m_sound_bank);
	1140	membank("bank1")->set_base(machine().root_device().memregion("soundcpu")->base() + 0x100000 + 0x2000 * m_sound_bank);
1141	1141	}
1142	1142
1143	1143
r14976	r14977
4145	4145	{
4146	4146	segas32_state *state = machine.driver_data<segas32_state>();
4147	4147	/* Temp. Patch until we emulate the 'Drive Board', thanks to Malice */
4148		UINT16 *pROM = (UINT16 *)machine.region("maincpu")->base();
	4148	UINT16 *pROM = (UINT16 *)state->memregion("maincpu")->base();
4149	4149
4150	4150	segas32_common_init(machine, read16_delegate(FUNC(segas32_state::analog_custom_io_r),state), write16_delegate(FUNC(segas32_state::analog_custom_io_w),state));
4151	4151

src/mame/drivers/looping.c

r14976	r14977
145	145
146	146	static PALETTE_INIT( looping )
147	147	{
148		const UINT8 *color_prom = machine.region("proms")->base();
	148	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
149	149	static const int resistances[3] = { 1000, 470, 220 };
150	150	double rweights[3], gweights[3], bweights[2];
151	151	int i;
r14976	r14977
900	900	static DRIVER_INIT( looping )
901	901	{
902	902	looping_state *state = machine.driver_data<looping_state>();
903		int length = machine.region("maincpu")->bytes();
904		UINT8 *rom = machine.region("maincpu")->base();
	903	int length = machine.root_device().memregion("maincpu")->bytes();
	904	UINT8 *rom = state->memregion("maincpu")->base();
905	905	int i;
906	906
907	907	state->m_cop_io = auto_alloc_array(machine, UINT8, 0x08);

src/mame/drivers/slapfght.c

r14976	r14977
1829	1829	static DRIVER_INIT( gtstarb1 )
1830	1830	{
1831	1831	slapfght_state *state = machine.driver_data<slapfght_state>();
1832		UINT8 *ROM = machine.region("maincpu")->base();
	1832	UINT8 *ROM = state->memregion("maincpu")->base();
1833	1833
1834	1834	state->m_getstar_id = GTSTARB1;
1835	1835	getstar_init(machine);

src/mame/drivers/badlands.c

r14976	r14977
586	586	badlands_state *state = machine.driver_data<badlands_state>();
587	587
588	588	/* initialize the audio system */
589		state->m_bank_base = &machine.region("audiocpu")->base()[0x03000];
590		state->m_bank_source_data = &machine.region("audiocpu")->base()[0x10000];
	589	state->m_bank_base = &machine.root_device().memregion("audiocpu")->base()[0x03000];
	590	state->m_bank_source_data = &state->memregion("audiocpu")->base()[0x10000];
591	591	}
592	592
593	593

src/mame/drivers/psikyosh.c

r14976	r14977
380	380	if (offset == 4) /* Configure bank for gfx test */
381	381	{
382	382	if (ACCESSING_BITS_0_15)   // Bank
383		memory_set_bank(machine(), "bank2", m_vidregs[offset] & 0xfff);
	383	membank("bank2")->set_entry(m_vidregs[offset] & 0xfff);
384	384	}
385	385	}
386	386
r14976	r14977
799	799
800	800	state->m_maincpu = machine.device("maincpu");
801	801
802		memory_configure_bank(machine, "bank2", 0, 0x1000, machine.region("gfx1")->base(), 0x20000);
	802	state->membank("bank2")->configure_entries(0, 0x1000, state->memregion("gfx1")->base(), 0x20000);
803	803	}
804	804
805	805
r14976	r14977
1218	1218
1219	1219	static DRIVER_INIT( daraku )
1220	1220	{
1221		UINT8 *RAM = machine.region("maincpu")->base();
1222		memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
	1221	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	1222	machine.root_device().membank("bank1")->set_base(&RAM[0x100000]);
1223	1223	sh2drc_set_options(machine.device("maincpu"), SH2DRC_FASTEST_OPTIONS);
1224	1224	}
1225	1225
r14976	r14977
1230	1230
1231	1231	static DRIVER_INIT( gunbird2 )
1232	1232	{
1233		UINT8 *RAM = machine.region("maincpu")->base();
1234		memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
	1233	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	1234	machine.root_device().membank("bank1")->set_base(&RAM[0x100000]);
1235	1235	sh2drc_set_options(machine.device("maincpu"), SH2DRC_FASTEST_OPTIONS);
1236	1236	}
1237	1237
1238	1238	static DRIVER_INIT( s1945iii )
1239	1239	{
1240		UINT8 *RAM = machine.region("maincpu")->base();
1241		memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
	1240	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	1241	machine.root_device().membank("bank1")->set_base(&RAM[0x100000]);
1242	1242	sh2drc_set_options(machine.device("maincpu"), SH2DRC_FASTEST_OPTIONS);
1243	1243	}
1244	1244

src/mame/drivers/astinvad.c

r14976	r14977
159	159	static SCREEN_UPDATE_RGB32( astinvad )
160	160	{
161	161	astinvad_state *state = screen.machine().driver_data<astinvad_state>();
162		const UINT8 *color_prom = screen.machine().region("proms")->base();
	162	const UINT8 *color_prom = state->memregion("proms")->base();
163	163	UINT8 yoffs = state->m_flip_yoffs & state->m_screen_flip;
164	164	int x, y;
165	165
r14976	r14977
179	179	static SCREEN_UPDATE_RGB32( spaceint )
180	180	{
181	181	astinvad_state *state = screen.machine().driver_data<astinvad_state>();
182		const UINT8 *color_prom = screen.machine().region("proms")->base();
	182	const UINT8 *color_prom = state->memregion("proms")->base();
183	183	int offs;
184	184
185	185	for (offs = 0; offs < state->m_videoram.bytes(); offs++)

src/mame/drivers/quizdna.c

r14976	r14977
18	18
19	19	WRITE8_MEMBER(quizdna_state::quizdna_rombank_w)
20	20	{
21		UINT8 *ROM = machine().region("maincpu")->base();
22		memory_set_bankptr(machine(), "bank1",&ROM[0x10000+0x4000*(data & 0x3f)]);
	21	UINT8 *ROM = memregion("maincpu")->base();
	22	membank("bank1")->set_base(&ROM[0x10000+0x4000*(data & 0x3f)]);
23	23	}
24	24
25	25	WRITE8_MEMBER(quizdna_state::gekiretu_rombank_w)
26	26	{
27		UINT8 *ROM = machine().region("maincpu")->base();
28		memory_set_bankptr(machine(), "bank1",&ROM[0x10000+0x4000*((data & 0x3f) ^ 0x0a)]);
	27	UINT8 *ROM = memregion("maincpu")->base();
	28	membank("bank1")->set_base(&ROM[0x10000+0x4000*((data & 0x3f) ^ 0x0a)]);
29	29	}
30	30
31	31	/****************************************************************************/

src/mame/drivers/boogwing.c

r14976	r14977
573	573
574	574	static DRIVER_INIT( boogwing )
575	575	{
576		const UINT8* src = machine.region("gfx6")->base();
577		UINT8* dst = machine.region("tiles2")->base() + 0x200000;
	576	const UINT8* src = machine.root_device().memregion("gfx6")->base();
	577	UINT8* dst = machine.root_device().memregion("tiles2")->base() + 0x200000;
578	578
579	579	deco56_decrypt_gfx(machine, "tiles1");
580	580	deco56_decrypt_gfx(machine, "tiles2");

src/mame/drivers/supertnk.c

r14976	r14977
140	140
141	141	bank_address = 0x10000 + (m_rom_bank * 0x1000);
142	142
143		memory_set_bankptr(machine(), "bank1", &machine().region("maincpu")->base()[bank_address]);
	143	membank("bank1")->set_base(&machine().root_device().memregion("maincpu")->base()[bank_address]);
144	144	}
145	145
146	146
r14976	r14977
152	152
153	153	bank_address = 0x10000 + (m_rom_bank * 0x1000);
154	154
155		memory_set_bankptr(machine(), "bank1", &machine().region("maincpu")->base()[bank_address]);
	155	membank("bank1")->set_base(&machine().root_device().memregion("maincpu")->base()[bank_address]);
156	156	}
157	157
158	158
r14976	r14977
187	187	{
188	188	supertnk_state *state = machine.driver_data<supertnk_state>();
189	189	offs_t i;
190		const UINT8 *prom = machine.region("proms")->base();
	190	const UINT8 *prom = state->memregion("proms")->base();
191	191
192	192	for (i = 0; i < NUM_PENS; i++)
193	193	{
r14976	r14977
490	490	{
491	491	/* decode the TMS9980 ROMs */
492	492	offs_t offs;
493		UINT8 *rom = machine.region("maincpu")->base();
494		size_t len = machine.region("maincpu")->bytes();
	493	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	494	size_t len = machine.root_device().memregion("maincpu")->bytes();
495	495
496	496	for (offs = 0; offs < len; offs++)
497	497	{

src/mame/drivers/neodrvr.c

r14976	r14977
9456	9456	kof2002_decrypt_68k(machine);
9457	9457	neo_pcm2_swap(machine, 0);
9458	9458	neogeo_cmc50_m1_decrypt(machine);
9459		kof2002b_gfx_decrypt(machine, machine.region("sprites")->base(),0x4000000);
9460		kof2002b_gfx_decrypt(machine, machine.region("fixed")->base(),0x20000);
	9459	kof2002b_gfx_decrypt(machine, machine.root_device().memregion("sprites")->base(),0x4000000);
	9460	kof2002b_gfx_decrypt(machine, machine.root_device().memregion("fixed")->base(),0x20000);
9461	9461	}
9462	9462
9463	9463	static DRIVER_INIT( kf2k2pls )
r14976	r14977
9560	9560	static TIMER_CALLBACK( ms5pcb_bios_timer_callback )
9561	9561	{
9562	9562	int harddip3 = input_port_read(machine, "HARDDIP") & 1;
9563		memory_set_bankptr(machine, NEOGEO_BANK_BIOS, machine.region("mainbios")->base() + 0x20000 + harddip3 * 0x20000);
	9563	machine.root_device().membank(NEOGEO_BANK_BIOS)->set_base(machine.root_device().memregion("mainbios")->base() + 0x20000 + harddip3 * 0x20000);
9564	9564	}
9565	9565
9566	9566	static DRIVER_INIT( ms5pcb )
r14976	r14977
9597	9597	static TIMER_CALLBACK( svcpcb_bios_timer_callback )
9598	9598	{
9599	9599	int harddip3 = input_port_read(machine, "HARDDIP") & 1;
9600		memory_set_bankptr(machine, NEOGEO_BANK_BIOS, machine.region("mainbios")->base() + 0x20000 + harddip3 * 0x20000);
	9600	machine.root_device().membank(NEOGEO_BANK_BIOS)->set_base(machine.root_device().memregion("mainbios")->base() + 0x20000 + harddip3 * 0x20000);
9601	9601	}
9602	9602
9603	9603	static DRIVER_INIT( svcpcb )
r14976	r14977
9700	9700	incorrect */
9701	9701	{
9702	9702	int i;
9703		UINT8* rom = machine.region("audiocpu")->base();
	9703	UINT8* rom = state->memregion("audiocpu")->base();
9704	9704	for (i = 0; i < 0x90000; i++)
9705	9705	{
9706	9706	rom[i] = BITSWAP8(rom[i], 5, 6, 1, 4, 3, 0, 7, 2);
r14976	r14977
9835	9835
9836	9836	static READ16_HANDLER( sbp_lowerrom_r )
9837	9837	{
9838		UINT16* rom = (UINT16*)space->machine().region("maincpu")->base();
	9838	UINT16* rom = (UINT16*)space->machine().root_device().memregion("maincpu")->base();
9839	9839	UINT16 origdata = rom[(offset+(0x200/2))];
9840	9840	UINT16 data =  BITSWAP16(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4);
9841	9841	int realoffset = 0x200+(offset*2);
r14976	r14977
9881	9881
9882	9882	/* the game code clears the text overlay used ingame immediately after writing it.. why? protection? sloppy code that the hw ignores? imperfect emulation? */
9883	9883	{
9884		UINT16* rom = (UINT16*)machine.region("maincpu")->base();
	9884	UINT16* rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
9885	9885
9886	9886	rom[0x2a6f8/2] = 0x4e71;
9887	9887	rom[0x2a6fa/2] = 0x4e71;

src/mame/drivers/esh.c

r14976	r14977
224	224
225	225	static PALETTE_INIT( esh )
226	226	{
227		const UINT8 *color_prom = machine.region("proms")->base();
	227	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
228	228	int i;
229	229
230	230	/* Oddly enough, the top 4 bits of each byte is 0 */

src/mame/drivers/fromance.c

r14976	r14977
112	112
113	113	WRITE8_MEMBER(fromance_state::fromance_rombank_w)
114	114	{
115		memory_set_bank(machine(), "bank1", data);
	115	membank("bank1")->set_entry(data);
116	116	}
117	117
118	118
r14976	r14977
954	954	static MACHINE_START( fromance )
955	955	{
956	956	fromance_state *state = machine.driver_data<fromance_state>();
957		UINT8 *ROM = machine.region("sub")->base();
	957	UINT8 *ROM = state->memregion("sub")->base();
958	958
959		memory_configure_bank(machine, "bank1", 0, 0x100, &ROM[0x10000], 0x4000);
	959	state->membank("bank1")->configure_entries(0, 0x100, &ROM[0x10000], 0x4000);
960	960
961	961	state->m_subcpu = machine.device("sub");
962	962

src/mame/drivers/skykid.c

r14976	r14977
69	69
70	70	WRITE8_MEMBER(skykid_state::skykid_bankswitch_w)
71	71	{
72		memory_set_bank(machine(), "bank1", !BIT(offset,11));
	72	membank("bank1")->set_entry(!BIT(offset,11));
73	73	}
74	74
75	75	WRITE8_MEMBER(skykid_state::skykid_irq_1_ctrl_w)
r14976	r14977
92	92	{
93	93	skykid_state *state = machine.driver_data<skykid_state>();
94	94	/* configure the banks */
95		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x2000);
	95	state->membank("bank1")->configure_entries(0, 2, state->memregion("maincpu")->base() + 0x10000, 0x2000);
96	96
97	97	state_save_register_global(machine, state->m_inputport_selected);
98	98	}
r14976	r14977
638	638	int i;
639	639
640	640	/* unpack the third sprite ROM */
641		rom = machine.region("gfx3")->base() + 0x4000;
	641	rom = machine.root_device().memregion("gfx3")->base() + 0x4000;
642	642	for (i = 0;i < 0x2000;i++)
643	643	{
644	644	rom[i + 0x4000] = rom[i];      // sprite set #1, plane 3

src/mame/drivers/halleys.c

r14976	r14977
1167	1167	sram_189 = state->m_generic_paletteram_8;
1168	1168
1169	1169	// each of the three 32-byte 6330 PROM is wired to an RGB component output
1170		prom_6330 = machine.region("proms")->base();
	1170	prom_6330 = state->memregion("proms")->base();
1171	1171
1172	1172	// latch1 holds 8 bits from the selected palette RAM address
1173	1173	latch1_273 = sram_189[addr];
r14976	r14977
2187	2187
2188	2188
2189	2189	// decrypt main program ROM
2190		rom = state->m_cpu1_base = machine.region("maincpu")->base();
	2190	rom = state->m_cpu1_base = state->memregion("maincpu")->base();
2191	2191	buf = state->m_gfx1_base;
2192	2192
2193	2193	for (i=0; i<0x10000; i++)
r14976	r14977
2200	2200
2201	2201
2202	2202	// swap graphics ROM addresses and unpack each pixel
2203		rom = machine.region("gfx1")->base();
	2203	rom = machine.root_device().memregion("gfx1")->base();
2204	2204	buf = state->m_gfx_plane02;
2205	2205
2206	2206	for (i=0xffff; i>=0; i--)

src/mame/drivers/djmain.c

r14976	r14977
104	104	static void sndram_set_bank(running_machine &machine)
105	105	{
106	106	djmain_state *state = machine.driver_data<djmain_state>();
107		state->m_sndram = machine.region("shared")->base() + 0x80000 * state->m_sndram_bank;
	107	state->m_sndram = state->memregion("shared")->base() + 0x80000 * state->m_sndram_bank;
108	108	}
109	109
110	110	WRITE32_MEMBER(djmain_state::sndram_bank_w)
r14976	r14977
170	170
171	171	READ32_MEMBER(djmain_state::obj_rom_r)
172	172	{
173		UINT8 *mem8 = machine().region("gfx1")->base();
	173	UINT8 *mem8 = memregion("gfx1")->base();
174	174	int bank = m_obj_regs[0x28/4] >> 16;
175	175
176	176	offset += bank * 0x200;
r14976	r14977
207	207	READ32_MEMBER(djmain_state::v_rom_r)
208	208	{
209	209	device_t *k056832 = machine().device("k056832");
210		UINT8 *mem8 = machine().region("gfx2")->base();
	210	UINT8 *mem8 = memregion("gfx2")->base();
211	211	int bank = k056832_word_r(k056832, 0x34/2, 0xffff);
212	212
213	213	offset *= 2;

src/mame/drivers/mustache.c

r14976	r14977
252	252	{
253	253	int i;
254	254
255		int G1 = machine.region("gfx1")->bytes()/3;
256		int G2 = machine.region("gfx2")->bytes()/2;
257		UINT8 *gfx1 = machine.region("gfx1")->base();
258		UINT8 *gfx2 = machine.region("gfx2")->base();
	255	int G1 = machine.root_device().memregion("gfx1")->bytes()/3;
	256	int G2 = machine.root_device().memregion("gfx2")->bytes()/2;
	257	UINT8 *gfx1 = machine.root_device().memregion("gfx1")->base();
	258	UINT8 *gfx2 = machine.root_device().memregion("gfx2")->base();
259	259	UINT8 *buf=auto_alloc_array(machine, UINT8, G2*2);
260	260
261	261	/* BG data lines */

src/mame/drivers/namcoic.c

r14976	r14977
1101	1101	break;
1102	1102	}
1103	1103	SET_TILE_INFO( mRozGfxBank,mangle,0/*color*/,0/*flag*/ );
1104		tileinfo.mask_data = 32*tile + (UINT8 *)machine.region( mRozMaskRegion )->base();
	1104	tileinfo.mask_data = 32*tile + (UINT8 *)machine.root_device().memregion( mRozMaskRegion )->base();
1105	1105	} /* roz_get_info */
1106	1106
1107	1107	static
r14976	r14977
1604	1604	void
1605	1605	namco_road_draw(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri )
1606	1606	{
1607		const UINT8 *clut = (const UINT8 *)machine.region("user3")->base();
	1607	const UINT8 *clut = (const UINT8 *)machine.root_device().memregion("user3")->base();
1608	1608	unsigned yscroll;
1609	1609	int i;
1610	1610

src/mame/drivers/segas16a.c

r14976	r14977
451	451	*/
452	452	segas1x_state *state = space->machine().driver_data<segas1x_state>();
453	453
454		int numroms = space->machine().region("n7751data")->bytes() / 0x8000;
	454	int numroms = state->memregion("n7751data")->bytes() / 0x8000;
455	455	state->m_n7751_rom_address &= 0x3fff;
456	456	state->m_n7751_rom_address |= (data & 0x01) << 14;
457	457	if (!(data & 0x02) && numroms >= 1) state->m_n7751_rom_address |= 0x00000;
r14976	r14977
496	496	{
497	497	/* read from BUS */
498	498	segas1x_state *state = space->machine().driver_data<segas1x_state>();
499		return space->machine().region("n7751data")->base()[state->m_n7751_rom_address];
	499	return state->memregion("n7751data")->base()[state->m_n7751_rom_address];
500	500	}
501	501
502	502
r14976	r14977
973	973	return maincpu_byte_r(space->machine(), 0x840001 ^ offset);
974	974
975	975	case 5:
976		return space->machine().region("maincpu")->base()[0x00000 + offset];
	976	return space->machine().root_device().memregion("maincpu")->base()[0x00000 + offset];
977	977	case 6:
978		return space->machine().region("maincpu")->base()[0x10000 + offset];
	978	return space->machine().root_device().memregion("maincpu")->base()[0x10000 + offset];
979	979	case 7:
980		return space->machine().region("maincpu")->base()[0x20000 + offset];
	980	return state->memregion("maincpu")->base()[0x20000 + offset];
981	981
982	982	default:
983	983	logerror("%03X: MCU movx read mode %02X offset %04X\n",

src/mame/drivers/neogeo.c

r14976	r14977
625	625	static void _set_main_cpu_vector_table_source( running_machine &machine )
626	626	{
627	627	neogeo_state *state = machine.driver_data<neogeo_state>();
628		memory_set_bank(machine, NEOGEO_BANK_VECTORS, state->m_main_cpu_vector_table_source);
	628	state->membank(NEOGEO_BANK_VECTORS)->set_entry(state->m_main_cpu_vector_table_source);
629	629	}
630	630
631	631
r14976	r14977
641	641	static void _set_main_cpu_bank_address( running_machine &machine )
642	642	{
643	643	neogeo_state *state = machine.driver_data<neogeo_state>();
644		memory_set_bankptr(machine, NEOGEO_BANK_CARTRIDGE, &machine.region("maincpu")->base()[state->m_main_cpu_bank_address]);
	644	state->membank(NEOGEO_BANK_CARTRIDGE)->set_base(&state->memregion("maincpu")->base()[state->m_main_cpu_bank_address]);
645	645	}
646	646
647	647
r14976	r14977
660	660	WRITE16_MEMBER(neogeo_state::main_cpu_bank_select_w)
661	661	{
662	662	UINT32 bank_address;
663		UINT32 len = machine().region("maincpu")->bytes();
	663	UINT32 len = memregion("maincpu")->bytes();
664	664
665	665	if ((len <= 0x100000) && (data & 0x07))
666	666	logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", cpu_get_pc(&space.device()), data);
r14976	r14977
684	684	address_space *mainspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
685	685
686	686	/* create vector banks */
687		memory_configure_bank(machine, NEOGEO_BANK_VECTORS, 0, 1, machine.region("mainbios")->base(), 0);
688		memory_configure_bank(machine, NEOGEO_BANK_VECTORS, 1, 1, machine.region("maincpu")->base(), 0);
	687	machine.root_device().membank(NEOGEO_BANK_VECTORS)->configure_entry(0, machine.root_device().memregion("mainbios")->base());
	688	machine.root_device().membank(NEOGEO_BANK_VECTORS)->configure_entry(1, machine.root_device().memregion("maincpu")->base());
689	689
690	690	/* set initial main CPU bank */
691		if (machine.region("maincpu")->bytes() > 0x100000)
	691	if (machine.root_device().memregion("maincpu")->bytes() > 0x100000)
692	692	neogeo_set_main_cpu_bank_address(mainspace, 0x100000);
693	693	else
694	694	neogeo_set_main_cpu_bank_address(mainspace, 0x000000);
r14976	r14977
708	708	int region;
709	709
710	710	for (region = 0; region < 4; region++)
711		memory_set_bank(machine, NEOGEO_BANK_AUDIO_CPU_CART_BANK + region, state->m_audio_cpu_banks[region]);
	711	state->membank(NEOGEO_BANK_AUDIO_CPU_CART_BANK + region)->set_entry(state->m_audio_cpu_banks[region]);
712	712	}
713	713
714	714
r14976	r14977
760	760	{
761	761	neogeo_state *state = space->machine().driver_data<neogeo_state>();
762	762
763		/*  if (!machine.region("audiobios")->base())   */
	763	/*  if (!state->memregion("audiobios")->base())   */
764	764	state->m_audio_cpu_rom_source = 1;
765	765
766		memory_set_bank(space->machine(), NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, state->m_audio_cpu_rom_source);
	766	state->membank(NEOGEO_BANK_AUDIO_CPU_MAIN_BANK)->set_entry(state->m_audio_cpu_rom_source);
767	767
768	768	/* reset CPU if the source changed -- this is a guess */
769	769	if (state->m_audio_cpu_rom_source != state->m_audio_cpu_rom_source_last)
r14976	r14977
795	795	UINT32 address_mask;
796	796
797	797	/* audio bios/cartridge selection */
798		if (machine.region("audiobios")->base())
799		memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, 0, 1, machine.region("audiobios")->base(), 0);
800		memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, 1, 1, machine.region("audiocpu")->base(), 0);
	798	if (machine.root_device().memregion("audiobios")->base())
	799	state->membank(NEOGEO_BANK_AUDIO_CPU_MAIN_BANK)->configure_entry(0, machine.root_device().memregion("audiobios")->base());
	800	state->membank(NEOGEO_BANK_AUDIO_CPU_MAIN_BANK)->configure_entry(1, machine.root_device().memregion("audiocpu")->base());
801	801
802	802	/* audio banking */
803		address_mask = machine.region("audiocpu")->bytes() - 0x10000 - 1;
	803	address_mask = machine.root_device().memregion("audiocpu")->bytes() - 0x10000 - 1;
804	804
805		rgn = machine.region("audiocpu")->base();
	805	rgn = state->memregion("audiocpu")->base();
806	806	for (region = 0; region < 4; region++)
807	807	{
808	808	for (bank = 0; bank < 0x100; bank++)
809	809	{
810	810	UINT32 bank_address = 0x10000 + (((bank << (11 + region)) & 0x3ffff) & address_mask);
811		memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_CART_BANK + region, bank, 1, &rgn[bank_address], 0);
	811	state->membank(NEOGEO_BANK_AUDIO_CPU_CART_BANK + region)->configure_entry(bank, &rgn[bank_address]);
812	812	}
813	813	}
814	814
r14976	r14977
990	990	machine.device<nvram_device>("saveram")->set_base(save_ram, 0x10000);
991	991
992	992	/* set the BIOS bank */
993		memory_set_bankptr(machine, NEOGEO_BANK_BIOS, machine.region("mainbios")->base());
	993	state->membank(NEOGEO_BANK_BIOS)->set_base(state->memregion("mainbios")->base());
994	994
995	995	/* set the initial main CPU bank */
996	996	main_cpu_banking_init(machine);
r14976	r14977
1279	1279	{
1280	1280	// create memory regions
1281	1281	size = image.get_software_region_length("maincpu");
1282		image.device().machine().region_free(":maincpu");
1283		image.device().machine().region_alloc(":maincpu",size, 2, ENDIANNESS_BIG);
1284		memcpy(image.device().machine().region("maincpu")->base(),image.get_software_region("maincpu"),size);
	1282	image.device().machine().memory().region_free(":maincpu");
	1283	image.device().machine().memory().region_alloc(":maincpu",size, 2, ENDIANNESS_BIG);
	1284	memcpy(image.device().machine().root_device().memregion("maincpu")->base(),image.get_software_region("maincpu"),size);
1285	1285
1286	1286	// for whatever reason (intentional, or design flaw) software loaded via software lists is swapped in endianess vs. the standard ROM loading, regardless of the above.  Swap it to keep consistency
1287	1287	for (int i=0; i<size/2;i++)
1288	1288	{
1289		UINT16* ROM = (UINT16*)image.device().machine().region("maincpu")->base();
	1289	UINT16* ROM = (UINT16*)image.device().machine().root_device().memregion("maincpu")->base();
1290	1290	ROM[i] = ((ROM[i]&0xff00)>>8) | ((ROM[i]&0x00ff)<<8);
1291	1291	}
1292	1292
1293	1293	size = image.get_software_region_length("fixed");
1294		image.device().machine().region_free(":fixed");
1295		image.device().machine().region_alloc(":fixed",size,1, ENDIANNESS_LITTLE);
1296		memcpy(image.device().machine().region("fixed")->base(),image.get_software_region("fixed"),size);
	1294	image.device().machine().memory().region_free(":fixed");
	1295	image.device().machine().memory().region_alloc(":fixed",size,1, ENDIANNESS_LITTLE);
	1296	memcpy(image.device().machine().root_device().memregion("fixed")->base(),image.get_software_region("fixed"),size);
1297	1297
1298	1298	if(image.get_software_region("audiocpu") != NULL)
1299	1299	{
1300	1300	size = image.get_software_region_length("audiocpu");
1301		image.device().machine().region_free(":audiocpu");
1302		image.device().machine().region_alloc(":audiocpu",size+0x10000,1, ENDIANNESS_LITTLE);
1303		memcpy(image.device().machine().region("audiocpu")->base(),image.get_software_region("audiocpu"),size);
1304		memcpy(image.device().machine().region("audiocpu")->base()+0x10000,image.get_software_region("audiocpu"),size); // avoid reloading in XML, should just improve banking instead tho?
	1301	image.device().machine().memory().region_free(":audiocpu");
	1302	image.device().machine().memory().region_alloc(":audiocpu",size+0x10000,1, ENDIANNESS_LITTLE);
	1303	memcpy(image.device().machine().root_device().memregion("audiocpu")->base(),image.get_software_region("audiocpu"),size);
	1304	memcpy(image.device().machine().root_device().memregion("audiocpu")->base()+0x10000,image.get_software_region("audiocpu"),size); // avoid reloading in XML, should just improve banking instead tho?
1305	1305	}
1306	1306
1307	1307
1308	1308	size = image.get_software_region_length("ymsnd");
1309		image.device().machine().region_free(":ymsnd");
1310		image.device().machine().region_alloc(":ymsnd",size,1, ENDIANNESS_LITTLE);
1311		memcpy(image.device().machine().region("ymsnd")->base(),image.get_software_region("ymsnd"),size);
	1309	image.device().machine().memory().region_free(":ymsnd");
	1310	image.device().machine().memory().region_alloc(":ymsnd",size,1, ENDIANNESS_LITTLE);
	1311	memcpy(image.device().machine().root_device().memregion("ymsnd")->base(),image.get_software_region("ymsnd"),size);
1312	1312	if(image.get_software_region("ymsnd.deltat") != NULL)
1313	1313	{
1314	1314	size = image.get_software_region_length("ymsnd.deltat");
1315		image.device().machine().region_free(":ymsnd.deltat");
1316		image.device().machine().region_alloc(":ymsnd.deltat",size,1, ENDIANNESS_LITTLE);
1317		memcpy(image.device().machine().region("ymsnd.deltat")->base(),image.get_software_region("ymsnd.deltat"),size);
	1315	image.device().machine().memory().region_free(":ymsnd.deltat");
	1316	image.device().machine().memory().region_alloc(":ymsnd.deltat",size,1, ENDIANNESS_LITTLE);
	1317	memcpy(image.device().machine().root_device().memregion("ymsnd.deltat")->base(),image.get_software_region("ymsnd.deltat"),size);
1318	1318	}
1319	1319	else
1320		image.device().machine().region_free(":ymsnd.deltat");  // removing the region will fix sound glitches in non-Delta-T games
	1320	image.device().machine().memory().region_free(":ymsnd.deltat");  // removing the region will fix sound glitches in non-Delta-T games
1321	1321	ym->reset();
1322	1322	size = image.get_software_region_length("sprites");
1323		image.device().machine().region_free(":sprites");
1324		image.device().machine().region_alloc(":sprites",size,1, ENDIANNESS_LITTLE);
1325		memcpy(image.device().machine().region("sprites")->base(),image.get_software_region("sprites"),size);
	1323	image.device().machine().memory().region_free(":sprites");
	1324	image.device().machine().memory().region_alloc(":sprites",size,1, ENDIANNESS_LITTLE);
	1325	memcpy(image.device().machine().root_device().memregion("sprites")->base(),image.get_software_region("sprites"),size);
1326	1326	if(image.get_software_region("audiocrypt") != NULL)  // encrypted Z80 code
1327	1327	{
1328	1328	size = image.get_software_region_length("audiocrypt");
1329		image.device().machine().region_alloc(":audiocrypt",size,1, ENDIANNESS_LITTLE);
1330		memcpy(image.device().machine().region("audiocrypt")->base(),image.get_software_region("audiocrypt"),size);
	1329	image.device().machine().memory().region_alloc(":audiocrypt",size,1, ENDIANNESS_LITTLE);
	1330	memcpy(image.device().machine().root_device().memregion("audiocrypt")->base(),image.get_software_region("audiocrypt"),size);
1331	1331	// allocate the audiocpu region to decrypt data into
1332		image.device().machine().region_free(":audiocpu");
1333		image.device().machine().region_alloc(":audiocpu",size+0x10000,1, ENDIANNESS_LITTLE);
	1332	image.device().machine().memory().region_free(":audiocpu");
	1333	image.device().machine().memory().region_alloc(":audiocpu",size+0x10000,1, ENDIANNESS_LITTLE);
1334	1334	}
1335	1335
1336	1336	// setup cartridge ROM area
1337	1337	image.device().machine().device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x000080,0x0fffff,"cart_rom");
1338		memory_set_bankptr(image.device().machine(),"cart_rom",&image.device().machine().region("maincpu")->base()[0x80]);
	1338	image.device().machine().root_device().membank("cart_rom")->set_base(&image.device().machine().root_device().memregion("maincpu")->base()[0x80]);
1339	1339
1340	1340	// handle possible protection
1341	1341	mvs_install_protection(image);

src/mame/drivers/segahang.c

r14976	r14977
1762	1762	static DRIVER_INIT( endurobl )
1763	1763	{
1764	1764	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1765		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1765	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1766	1766	UINT16 *decrypt = auto_alloc_array(machine, UINT16, 0x40000/2);
1767	1767
1768	1768	hangon_generic_init(machine);
r14976	r14977
1776	1776	static DRIVER_INIT( endurob2 )
1777	1777	{
1778	1778	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1779		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	1779	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
1780	1780	UINT16 *decrypt = auto_alloc_array(machine, UINT16, 0x40000/2);
1781	1781
1782	1782	hangon_generic_init(machine);

src/mame/drivers/statriv2.c

r14976	r14977
224	224
225	225	READ8_MEMBER(statriv2_state::question_data_r)
226	226	{
227		const UINT8 *qrom = machine().region("questions")->base();
228		UINT32 qromsize = machine().region("questions")->bytes();
	227	const UINT8 *qrom = memregion("questions")->base();
	228	UINT32 qromsize = memregion("questions")->bytes();
229	229	UINT32 address;
230	230
231	231	if (m_question_offset_high == 0xff)
r14976	r14977
1102	1102	*                                                   *
1103	1103	\***************************************************/
1104	1104
1105		UINT8 *qrom = machine.region("questions")->base();
1106		UINT32 length = machine.region("questions")->bytes();
	1105	UINT8 *qrom = machine.root_device().memregion("questions")->base();
	1106	UINT32 length = machine.root_device().memregion("questions")->bytes();
1107	1107	UINT32 address;
1108	1108
1109	1109	for (address = 0; address < length; address++)

src/mame/drivers/carrera.c

r14976	r14977
283	283
284	284	static PALETTE_INIT(carrera)
285	285	{
286		const UINT8 *color_prom = machine.region("proms")->base();
	286	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
287	287	int br_bit0, br_bit1, bit0, bit1, r, g, b;
288	288	int   i;
289	289

src/mame/drivers/d9final.c

r14976	r14977
92	92
93	93	WRITE8_MEMBER(d9final_state::d9final_bank_w)
94	94	{
95		UINT8 *ROM = machine().region("maincpu")->base();
	95	UINT8 *ROM = memregion("maincpu")->base();
96	96	UINT32 bankaddress;
97	97
98	98	bankaddress = 0x10000+(0x4000 * (data & 0x7));
99		memory_set_bankptr(machine(), "bank1", &ROM[bankaddress]);
	99	membank("bank1")->set_base(&ROM[bankaddress]);
100	100	}
101	101
102	102	/* game checks this after three attract cycles, otherwise coin inputs stop to work. */
r14976	r14977
273	273
274	274	static MACHINE_RESET( d9final )
275	275	{
276		UINT8 *ROM = machine.region("maincpu")->base();
	276	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
277	277
278		memory_set_bankptr(machine, "bank1", &ROM[0x10000]);
	278	machine.root_device().membank("bank1")->set_base(&ROM[0x10000]);
279	279	}
280	280
281	281	static MACHINE_CONFIG_START( d9final, d9final_state )

src/mame/drivers/ladybug.c

r14976	r14977
1045	1045	offs_t i;
1046	1046	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1047	1047	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1048		UINT8 *rom = machine.region("maincpu")->base();
1049		UINT8 *table = machine.region("user1")->base();
	1048	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	1049	UINT8 *table = machine.root_device().memregion("user1")->base();
1050	1050
1051	1051	space->set_decrypted_region(0x0000, 0x5fff, decrypted);
1052	1052

src/mame/drivers/ttchamp.c

r14976	r14977
109	109	WRITE16_MEMBER(ttchamp_state::pcup_prgbank_w)
110	110	{
111	111	int bank;
112		UINT8 *ROM1 = machine().region("user1")->base();
	112	UINT8 *ROM1 = memregion("user1")->base();
113	113
114	114	if (ACCESSING_BITS_0_7)
115	115	{
116	116	bank = (data>>4) &0x07;
117		memory_set_bankptr(machine(), "bank2",&ROM1[0x80000*(bank)]);
	117	membank("bank2")->set_base(&ROM1[0x80000*(bank)]);
118	118	}
119	119	}
120	120	#endif
r14976	r14977
337	337
338	338	static DRIVER_INIT (ttchamp)
339	339	{
340		UINT8 *ROM1 = machine.region("user1")->base();
341		memory_set_bankptr(machine, "bank1",&ROM1[0x120000]);
342		memory_set_bankptr(machine, "bank2",&ROM1[0x180000]);
	340	UINT8 *ROM1 = machine.root_device().memregion("user1")->base();
	341	machine.root_device().membank("bank1")->set_base(&ROM1[0x120000]);
	342	machine.root_device().membank("bank2")->set_base(&ROM1[0x180000]);
343	343	}
344	344
345	345	GAME( 199?, ttchamp, 0,        ttchamp, ttchamp, ttchamp, ROT0,  "Gamart?", "Table Tennis Champions (set 1)", GAME_NOT_WORKING|GAME_NO_SOUND )

src/mame/drivers/aristmk6.c

r14976	r14977
33	33	aristmk6_state *state = screen.machine().driver_data<aristmk6_state>();
34	34
35	35	int x,y,count;
36		const UINT8 *blit_ram = screen.machine().region("maincpu")->base();
	36	const UINT8 *blit_ram = state->memregion("maincpu")->base();
37	37
38	38	if(screen.machine().input().code_pressed(KEYCODE_Z))
39	39	state->m_test_x++;

src/mame/drivers/buggychl.c

r14976	r14977
88	88
89	89	WRITE8_MEMBER(buggychl_state::bankswitch_w)
90	90	{
91		memory_set_bank(machine(), "bank1", data & 0x07);   // shall we check if data&7 < # banks?
	91	membank("bank1")->set_entry(data & 0x07);   // shall we check if data&7 < # banks?
92	92	}
93	93
94	94	static TIMER_CALLBACK( nmi_callback )
r14976	r14977
359	359	static MACHINE_START( buggychl )
360	360	{
361	361	buggychl_state *state = machine.driver_data<buggychl_state>();
362		UINT8 *ROM = machine.region("maincpu")->base();
	362	UINT8 *ROM = state->memregion("maincpu")->base();
363	363
364		memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x2000);
	364	state->membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x2000);
365	365
366	366	state->m_audiocpu = machine.device("audiocpu");
367	367

src/mame/drivers/taito_f2.c

r14976	r14977
591	591
592	592	WRITE8_MEMBER(taitof2_state::sound_bankswitch_w)
593	593	{
594		memory_set_bank(machine(), "bank2", (data - 1) & 7);
	594	membank("bank2")->set_entry((data - 1) & 7);
595	595
596	596	#ifdef MAME_DEBUG
597	597	if (((data - 1) & 7) > 2)
r14976	r14977
3013	3013	static MACHINE_START( f2 )
3014	3014	{
3015	3015	MACHINE_START_CALL(common);
3016		memory_configure_bank(machine, "bank2", 0, 8, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	3016	machine.root_device().membank("bank2")->configure_entries(0, 8, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
3017	3017	}
3018	3018
3019	3019	static MACHINE_CONFIG_START( taito_f2, taitof2_state )
r14976	r14977
5274	5274	int i;
5275	5275	UINT8 data;
5276	5276	UINT32 offset;
5277		UINT8 *gfx = machine.region("gfx2")->base();
	5277	UINT8 *gfx = machine.root_device().memregion("gfx2")->base();
5278	5278
5279	5279	offset = 0x100000;
5280	5280	for (i = 0x180000; i < 0x200000; i++)
r14976	r14977
5310	5310	static DRIVER_INIT( mjnquest )
5311	5311	{
5312	5312	taitof2_state *state = machine.driver_data<taitof2_state>();
5313		int i, len = machine.region("gfx2")->bytes();
5314		UINT8 *gfx = machine.region("gfx2")->base();
	5313	int i, len = machine.root_device().memregion("gfx2")->bytes();
	5314	UINT8 *gfx = state->memregion("gfx2")->base();
5315	5315
5316	5316	/* the bytes in each longword are in reversed order, put them in the
5317	5317	order used by the other games. */

src/mame/drivers/ddragon.c

r14976	r14977
150	150	ddragon_state *state = machine.driver_data<ddragon_state>();
151	151
152	152	/* configure banks */
153		memory_configure_bank(machine, "bank1", 0, 8, machine.region("maincpu")->base() + 0x10000, 0x4000);
	153	state->membank("bank1")->configure_entries(0, 8, state->memregion("maincpu")->base() + 0x10000, 0x4000);
154	154
155	155	state->m_maincpu = machine.device("maincpu");
156	156	state->m_sub_cpu = machine.device("sub");
r14976	r14977
203	203	else if (m_dd_sub_cpu_busy == 0)
204	204	device_set_input_line(m_sub_cpu, m_sprite_irq, (m_sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
205	205
206		memory_set_bank(machine(), "bank1", (data & 0xe0) >> 5);
	206	membank("bank1")->set_entry((data & 0xe0) >> 5);
207	207	}
208	208
209	209
r14976	r14977
217	217	/* bit 3 unknown */
218	218
219	219	/* I don't know ... */
220		memory_set_bank(machine(), "bank1", (data & 0x20) >> 5);
	220	membank("bank1")->set_entry((data & 0x20) >> 5);
221	221	}
222	222
223	223
r14976	r14977
263	263
264	264	WRITE8_MEMBER(ddragon_state::darktowr_bankswitch_w)
265	265	{
266		int oldbank = machine().memory().bank("bank1")->entry();
	266	int oldbank = membank("bank1")->entry();
267	267	int newbank = (data & 0xe0) >> 5;
268	268
269	269	m_scrollx_hi = (data & 0x01);
r14976	r14977
278	278	else if (m_dd_sub_cpu_busy == 0)
279	279	device_set_input_line(m_sub_cpu, m_sprite_irq, (m_sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
280	280
281		memory_set_bank(machine(), "bank1", newbank);
	281	membank("bank1")->set_entry(newbank);
282	282	if (newbank == 4 && oldbank != 4)
283	283	space.install_readwrite_handler(0x4000, 0x7fff, read8_delegate(FUNC(ddragon_state::darktowr_mcu_bank_r),this), write8_delegate(FUNC(ddragon_state::darktowr_mcu_bank_w),this));
284	284	else if (newbank != 4 && oldbank == 4)
r14976	r14977
465	465	}
466	466	else
467	467	{
468		UINT8 *ROM = device->machine().region("adpcm")->base() + 0x10000 * chip;
	468	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base() + 0x10000 * chip;
469	469
470	470	state->m_adpcm_data[chip] = ROM[state->m_adpcm_pos[chip]++];
471	471	msm5205_data_w(device, state->m_adpcm_data[chip] >> 4);
r14976	r14977
2023	2023	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x3808, 0x3808, write8_delegate(FUNC(ddragon_state::toffy_bankswitch_w),state));
2024	2024
2025	2025	/* the program rom has a simple bitswap encryption */
2026		rom = machine.region("maincpu")->base();
2027		length = machine.region("maincpu")->bytes();
	2026	rom = machine.root_device().memregion("maincpu")->base();
	2027	length = machine.root_device().memregion("maincpu")->bytes();
2028	2028	for (i = 0; i < length; i++)
2029	2029	rom[i] = BITSWAP8(rom[i], 6,7,5,4,3,2,1,0);
2030	2030
2031	2031	/* and the fg gfx ... */
2032		rom = machine.region("gfx1")->base();
2033		length = machine.region("gfx1")->bytes();
	2032	rom = machine.root_device().memregion("gfx1")->base();
	2033	length = machine.root_device().memregion("gfx1")->bytes();
2034	2034	for (i = 0; i < length; i++)
2035	2035	rom[i] = BITSWAP8(rom[i], 7,6,5,3,4,2,1,0);
2036	2036
2037	2037	/* and the sprites gfx */
2038		rom = machine.region("gfx2")->base();
2039		length = machine.region("gfx2")->bytes();
	2038	rom = machine.root_device().memregion("gfx2")->base();
	2039	length = machine.root_device().memregion("gfx2")->bytes();
2040	2040	for (i = 0; i < length; i++)
2041	2041	rom[i] = BITSWAP8(rom[i], 7,6,5,4,3,2,0,1);
2042	2042
2043	2043	/* and the bg gfx */
2044		rom = machine.region("gfx3")->base();
2045		length = machine.region("gfx3")->bytes();
	2044	rom = machine.root_device().memregion("gfx3")->base();
	2045	length = state->memregion("gfx3")->bytes();
2046	2046	for (i = 0; i < length / 2; i++)
2047	2047	{
2048	2048	rom[i + 0*length/2] = BITSWAP8(rom[i + 0*length/2], 7,6,1,4,3,2,5,0);
r14976	r14977
2058	2058	int i;
2059	2059	UINT8 *dst,*src;
2060	2060
2061		src = machine.region("chars")->base();
2062		dst = machine.region("gfx1")->base();
	2061	src = machine.root_device().memregion("chars")->base();
	2062	dst = state->memregion("gfx1")->base();
2063	2063
2064	2064	for (i = 0; i < 0x8000; i++)
2065	2065	{

src/mame/drivers/asterix.c

r14976	r14977
460	460	static DRIVER_INIT( asterix )
461	461	{
462	462	#if 0
463		*(UINT16 *)(machine.region("maincpu")->base() + 0x07f34) = 0x602a;
464		*(UINT16 *)(machine.region("maincpu")->base() + 0x00008) = 0x0400;
	463	*(UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x07f34) = 0x602a;
	464	*(UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x00008) = 0x0400;
465	465	#endif
466	466	}
467	467

src/mame/drivers/goldnpkr.c

r14976	r14977
1049	1049
1050	1050	static PALETTE_INIT( goldnpkr )
1051	1051	{
1052		const UINT8 *color_prom = machine.region("proms")->base();
	1052	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
1053	1053	/*  prom bits
1054	1054	7654 3210
1055	1055	---- ---x   red component.
r14976	r14977
1093	1093
1094	1094	static PALETTE_INIT( witchcrd )
1095	1095	{
1096		const UINT8 *color_prom = machine.region("proms")->base();
	1096	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
1097	1097	/*
1098	1098	This hardware has a feature called BLUE KILLER.
1099	1099	Using the original intensity line, the PCB has a bridge
r14976	r14977
1141	1141
1142	1142	static PALETTE_INIT( wcrdxtnd )
1143	1143	{
1144		const UINT8 *color_prom = machine.region("proms")->base();
	1144	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
1145	1145	/*
1146	1146	Using the original intensity line, the PCB has a bridge
1147	1147	that allow (as default) turn the background dark blue.
r14976	r14977
9368	9368	{
9369	9369	/* $60bb, NOPing the ORA #$F0 (after read the PIA1 port B */
9370	9370
9371		//  UINT8 *ROM = machine.region("maincpu")->base();
	9371	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9372	9372
9373	9373	//  ROM[0x60bb] = 0xea;
9374	9374	//  ROM[0x60bc] = 0xea;
r14976	r14977
9398	9398
9399	9399	/* Attempt to decrypt the MCU program (we're sooo close!) */
9400	9400
9401		UINT8 *ROM = machine.region("mcu")->base();
9402		int size = machine.region("mcu")->bytes();
	9401	UINT8 *ROM = machine.root_device().memregion("mcu")->base();
	9402	int size = machine.root_device().memregion("mcu")->bytes();
9403	9403	int start = 0x0000;
9404	9404	int i;
9405	9405
r14976	r14977
9417	9417	after compare with Dallas TK data
9418	9418	*/
9419	9419
9420		UINT8 *ROM = machine.region("maincpu")->base();
	9420	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9421	9421
9422	9422	ROM[0xe097] = 0xea;
9423	9423	ROM[0xe098] = 0xea;
r14976	r14977
9429	9429	after compare with Dallas TK data
9430	9430	*/
9431	9431
9432		UINT8 *ROM = machine.region("maincpu")->base();
	9432	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9433	9433
9434	9434	ROM[0xe87b] = 0xea;
9435	9435	ROM[0xe87c] = 0xea;
r14976	r14977
9441	9441	after compare with Dallas TK data
9442	9442	*/
9443	9443
9444		UINT8 *ROM = machine.region("maincpu")->base();
	9444	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9445	9445
9446	9446	ROM[0x453a] = 0xea;
9447	9447	ROM[0x453b] = 0xea;
r14976	r14977
9453	9453	after compare with Dallas TK data
9454	9454	*/
9455	9455
9456		UINT8 *ROM = machine.region("maincpu")->base();
	9456	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9457	9457
9458	9458	ROM[0xf2c9] = 0xea;
9459	9459	ROM[0xf2ca] = 0xea;
r14976	r14977
9465	9465	after compare with Dallas TK data
9466	9466	*/
9467	9467
9468		UINT8 *ROM = machine.region("maincpu")->base();
	9468	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9469	9469
9470	9470	ROM[0xdf80] = 0xea;
9471	9471	ROM[0xdf81] = 0xea;
r14976	r14977
9477	9477	after compare with Dallas TK data
9478	9478	*/
9479	9479
9480		UINT8 *ROM = machine.region("maincpu")->base();
	9480	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9481	9481
9482	9482	ROM[0xe42f] = 0xea;
9483	9483	ROM[0xe430] = 0xea;
r14976	r14977
9489	9489	after compare with Dallas TK data
9490	9490	*/
9491	9491
9492		UINT8 *ROM = machine.region("maincpu")->base();
	9492	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9493	9493
9494	9494	ROM[0xe442] = 0xea;
9495	9495	ROM[0xe443] = 0xea;
r14976	r14977
9501	9501	after compare with Dallas TK data
9502	9502	*/
9503	9503
9504		UINT8 *ROM = machine.region("maincpu")->base();
	9504	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9505	9505
9506	9506	ROM[0xe4d5] = 0xea;
9507	9507	ROM[0xe4d6] = 0xea;
r14976	r14977
9513	9513	after compare with Dallas TK data
9514	9514	*/
9515	9515
9516		UINT8 *ROM = machine.region("maincpu")->base();
	9516	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9517	9517
9518	9518	ROM[0xe87c] = 0xea;
9519	9519	ROM[0xe87d] = 0xea;
r14976	r14977
9525	9525	after compare with Dallas TK data
9526	9526	*/
9527	9527
9528		UINT8 *ROM = machine.region("maincpu")->base();
	9528	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9529	9529
9530	9530	ROM[0xe7d5] = 0xea;
9531	9531	ROM[0xe7d6] = 0xea;
r14976	r14977
9537	9537	after compare with Dallas TK data
9538	9538	*/
9539	9539
9540		UINT8 *ROM = machine.region("maincpu")->base();
	9540	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9541	9541
9542	9542	ROM[0xe7d9] = 0xea;
9543	9543	ROM[0xe7da] = 0xea;
r14976	r14977
9549	9549	after compare with Dallas TK data
9550	9550	*/
9551	9551
9552		UINT8 *ROM = machine.region("maincpu")->base();
	9552	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9553	9553
9554	9554	ROM[0xe7f7] = 0xea;
9555	9555	ROM[0xe7f8] = 0xea;
r14976	r14977
9561	9561	after compare with Dallas TK data
9562	9562	*/
9563	9563
9564		UINT8 *ROM = machine.region("maincpu")->base();
	9564	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9565	9565
9566	9566	ROM[0xe8a5] = 0xea;
9567	9567	ROM[0xe8a6] = 0xea;
r14976	r14977
9573	9573	after compare with Dallas TK data
9574	9574	*/
9575	9575
9576		UINT8 *ROM = machine.region("maincpu")->base();
	9576	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9577	9577
9578	9578	ROM[0xe955] = 0xea;
9579	9579	ROM[0xe956] = 0xea;
r14976	r14977
9585	9585	after compare with Dallas TK data
9586	9586	*/
9587	9587
9588		UINT8 *ROM = machine.region("maincpu")->base();
	9588	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9589	9589
9590	9590	ROM[0xee6b] = 0xea;
9591	9591	ROM[0xee6c] = 0xea;
r14976	r14977
9597	9597	after compare with Dallas TK data
9598	9598	*/
9599	9599
9600		UINT8 *ROM = machine.region("maincpu")->base();
	9600	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9601	9601
9602	9602	ROM[0xf052] = 0xea;
9603	9603	ROM[0xf053] = 0xea;
r14976	r14977
9729	9729	after compare with a string inside the Dallas TK RAM
9730	9730	*/
9731	9731
9732		UINT8 *ROM = machine.region("maincpu")->base();
	9732	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
9733	9733
9734	9734	ROM[0xf2e1] = 0xea;
9735	9735	ROM[0xf2e2] = 0xea;

src/mame/drivers/ppmast93.c

r14976	r14977
171	171
172	172	WRITE8_MEMBER(ppmast93_state::ppmast93_port4_w)
173	173	{
174		UINT8 *rom = machine().region("maincpu")->base();
	174	UINT8 *rom = memregion("maincpu")->base();
175	175	int bank;
176	176
177	177	coin_counter_w(machine(), 0, data & 0x08);
178	178	coin_counter_w(machine(), 1, data & 0x10);
179	179
180	180	bank = data & 0x07;
181		memory_set_bankptr(machine(), "bank1",&rom[0x10000+(bank*0x4000)]);
	181	membank("bank1")->set_base(&rom[0x10000+(bank*0x4000)]);
182	182	}
183	183
184	184	static ADDRESS_MAP_START( ppmast93_cpu1_map, AS_PROGRAM, 8, ppmast93_state )

src/mame/drivers/xxmissio.c

r14976	r14977
16	16
17	17	WRITE8_MEMBER(xxmissio_state::xxmissio_bank_sel_w)
18	18	{
19		memory_set_bank(machine(), "bank1", data & 7);
	19	membank("bank1")->set_entry(data & 7);
20	20	}
21	21
22	22	CUSTOM_INPUT_MEMBER(xxmissio_state::xxmissio_status_r)
r14976	r14977
79	79
80	80	static MACHINE_START( xxmissio )
81	81	{
82		memory_configure_bank(machine, "bank1", 0, 8, machine.region("user1")->base(), 0x4000);
83		memory_set_bank(machine, "bank1", 0);
	82	machine.root_device().membank("bank1")->configure_entries(0, 8, machine.root_device().memregion("user1")->base(), 0x4000);
	83	machine.root_device().membank("bank1")->set_entry(0);
84	84	}
85	85
86	86	/****************************************************************************/

src/mame/drivers/moo.c

r14976	r14977
180	180
181	181	WRITE8_MEMBER(moo_state::sound_bankswitch_w)
182	182	{
183		memory_set_bankptr(machine(), "bank1", machine().region("soundcpu")->base() + 0x10000 + (data&0xf)*0x4000);
	183	membank("bank1")->set_base(machine().root_device().memregion("soundcpu")->base() + 0x10000 + (data&0xf)*0x4000);
184	184	}
185	185
186	186

src/mame/drivers/taito_l.c

r14976	r14977
169	169	state->m_cur_rambank[i] = 0x80;
170	170	state->m_current_notifier[i] = palette_notifier;
171	171	state->m_current_base[i] = state->m_palette_ram;
172		memory_set_bankptr(machine, bankname[i], state->m_current_base[i]);
	172	state->membank(bankname[i])->set_base(state->m_current_base[i]);
173	173	}
174	174
175	175	state->m_cur_rombank = state->m_cur_rombank2 = 0;
176		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x10000);
	176	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x10000);
177	177
178	178	gfx_element_set_source(machine.gfx[2], state->m_rambanks);
179	179
r14976	r14977
377	377
378	378	//logerror("robs %d, %02x (%04x)\n", offset, data, cpu_get_pc(&space.device()));
379	379	m_cur_rombank = data;
380		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x10000 + 0x2000 * m_cur_rombank);
	380	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000 + 0x2000 * m_cur_rombank);
381	381	}
382	382	}
383	383
r14976	r14977
397	397	//logerror("robs2 %02x (%04x)\n", data, cpu_get_pc(&space.device()));
398	398
399	399	m_cur_rombank2 = data;
400		memory_set_bankptr(machine(), "bank6", machine().region("slave")->base() + 0x10000 + 0x4000 * m_cur_rombank2);
	400	membank("bank6")->set_base(machine().root_device().memregion("slave")->base() + 0x10000 + 0x4000 * m_cur_rombank2);
401	401	}
402	402	}
403	403
r14976	r14977
435	435	m_current_notifier[offset] = 0;
436	436	m_current_base[offset] = m_empty_ram;
437	437	}
438		memory_set_bankptr(machine(), bankname[offset], m_current_base[offset]);
	438	membank(bankname[offset])->set_base(m_current_base[offset]);
439	439	}
440	440	}
441	441
r14976	r14977
596	596	}
597	597	else
598	598	{
599		state->m_adpcm_data = device->machine().region("adpcm")->base()[state->m_adpcm_pos];
	599	state->m_adpcm_data = device->machine().root_device().memregion("adpcm")->base()[state->m_adpcm_pos];
600	600	state->m_adpcm_pos = (state->m_adpcm_pos + 1) & 0x1ffff;
601	601	msm5205_data_w(device, state->m_adpcm_data >> 4);
602	602	}
r14976	r14977
740	740
741	741	WRITE8_MEMBER(taitol_state::sound_bankswitch_w)
742	742	{
743		UINT8 *RAM = machine().region("audiocpu")->base();
	743	UINT8 *RAM = memregion("audiocpu")->base();
744	744	int banknum = (data - 1) & 3;
745	745
746		memory_set_bankptr (machine(), "bank7", &RAM [0x10000 + (banknum * 0x4000)]);
	746	membank ("bank7")->set_base (&RAM [0x10000 + (banknum * 0x4000)]);
747	747	}
748	748
749	749	static ADDRESS_MAP_START( raimais_3_map, AS_PROGRAM, 8, taitol_state )
r14976	r14977
1784	1784	if (state->m_cur_bank != (data & 0x03))
1785	1785	{
1786	1786	int bankaddress;
1787		UINT8 *RAM = device->machine().region("audiocpu")->base();
	1787	UINT8 *RAM = state->memregion("audiocpu")->base();
1788	1788
1789	1789	state->m_cur_bank = data & 0x03;
1790	1790	bankaddress = 0x10000 + (state->m_cur_bank - 1) * 0x4000;
1791		memory_set_bankptr(device->machine(), "bank7", &RAM[bankaddress]);
	1791	state->membank("bank7")->set_base(&RAM[bankaddress]);
1792	1792	//logerror ("YM2203 bank change val=%02x  pc=%04x\n", state->m_cur_bank, cpu_get_pc(&space->device()) );
1793	1793	}
1794	1794	}
r14976	r14977
2722	2722	v |= 1 << (7 - j);
2723	2723	tab[i] = v;
2724	2724	}
2725		p = machine.region("maincpu")->base();
	2725	p = machine.root_device().memregion("maincpu")->base();
2726	2726	for (i = 0; i < 0x20000; i++)
2727	2727	{
2728	2728	*p = tab[*p];

src/mame/drivers/groundfx.c

r14976	r14977
453	453	static DRIVER_INIT( groundfx )
454	454	{
455	455	UINT32 offset,i;
456		UINT8 *gfx = machine.region("gfx3")->base();
457		int size=machine.region("gfx3")->bytes();
	456	UINT8 *gfx = machine.root_device().memregion("gfx3")->base();
	457	int size=machine.root_device().memregion("gfx3")->bytes();
458	458	int data;
459	459
460	460	/* Speedup handlers */

src/mame/drivers/segald.c

r14976	r14977
240	240	WRITE8_MEMBER(segald_state::astron_io_bankswitch_w)
241	241	{
242	242	logerror("Banking 0x%x\n", data);
243		memory_set_bank(machine(), "bank1", data & 0xff);
	243	membank("bank1")->set_entry(data & 0xff);
244	244	}
245	245
246	246
r14976	r14977
597	597
598	598	static DRIVER_INIT( astron )
599	599	{
600		UINT8 *ROM = machine.region("maincpu")->base();
601		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x8000], 0x4000);
	600	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	601	machine.root_device().membank("bank1")->configure_entries(0, 2, &ROM[0x8000], 0x4000);
602	602	}
603	603
604	604

src/mame/drivers/suprloco.c

r14976	r14977
258	258	int i, j, k, color_source, color_dest;
259	259	UINT8 *source, *dest, *lookup;
260	260
261		source = machine.region("gfx1")->base();
	261	source = machine.root_device().memregion("gfx1")->base();
262	262	dest   = source + 0x6000;
263		lookup = machine.region("proms")->base() + 0x0200;
	263	lookup = machine.root_device().memregion("proms")->base() + 0x0200;
264	264
265	265	for (i = 0; i < 0x80; i++, lookup += 8)
266	266	{

src/mame/drivers/srmp5.c

r14976	r14977
268	268	READ32_MEMBER(srmp5_state::data_r)
269	269	{
270	270	UINT32 data;
271		const UINT8 *usr = machine().region("user2")->base();
	271	const UINT8 *usr = memregion("user2")->base();
272	272
273	273	data=((m_databank>>4)&0xf)*0x100000; //guess
274	274	data=usr[data+offset*2]+usr[data+offset*2+1]*256;

src/mame/drivers/m92.c

r14976	r14977
252	252
253	253	READ16_MEMBER(m92_state::m92_eeprom_r)
254	254	{
255		UINT8 *RAM = machine().region("eeprom")->base();
	255	UINT8 *RAM = memregion("eeprom")->base();
256	256	//  logerror("%05x: EEPROM RE %04x\n",cpu_get_pc(&space.device()),offset);
257	257	return RAM[offset] | 0xff00;
258	258	}
259	259
260	260	WRITE16_MEMBER(m92_state::m92_eeprom_w)
261	261	{
262		UINT8 *RAM = machine().region("eeprom")->base();
	262	UINT8 *RAM = memregion("eeprom")->base();
263	263	//  logerror("%05x: EEPROM WR %04x\n",cpu_get_pc(&space.device()),offset);
264	264	if (ACCESSING_BITS_0_7)
265	265	RAM[offset] = data;
r14976	r14977
281	281	{
282	282	if (ACCESSING_BITS_0_7)
283	283	{
284		memory_set_bank(machine(), "bank1", (data & 0x06) >> 1);
	284	membank("bank1")->set_entry((data & 0x06) >> 1);
285	285	if (data & 0xf9)
286	286	logerror("%05x: bankswitch %04x\n", cpu_get_pc(&space.device()), data);
287	287	}
r14976	r14977
2060	2060	static DRIVER_INIT( m92 )
2061	2061	{
2062	2062	m92_state *state = machine.driver_data<m92_state>();
2063		UINT8 *ROM = machine.region("maincpu")->base();
	2063	UINT8 *ROM = state->memregion("maincpu")->base();
2064	2064
2065		memory_set_bankptr(machine, "bank1", &ROM[0xa0000]);
	2065	state->membank("bank1")->set_base(&ROM[0xa0000]);
2066	2066
2067	2067	state->m_game_kludge = 0;
2068	2068	state->m_irq_vectorbase = 0x80;
r14976	r14977
2072	2072	static DRIVER_INIT( m92_alt )
2073	2073	{
2074	2074	m92_state *state = machine.driver_data<m92_state>();
2075		UINT8 *ROM = machine.region("maincpu")->base();
	2075	UINT8 *ROM = state->memregion("maincpu")->base();
2076	2076
2077		memory_set_bankptr(machine, "bank1", &ROM[0xa0000]);
	2077	state->membank("bank1")->set_base(&ROM[0xa0000]);
2078	2078
2079	2079	state->m_game_kludge = 0;
2080	2080	state->m_irq_vectorbase = 0x20;
r14976	r14977
2093	2093	static DRIVER_INIT( m92_bank )
2094	2094	{
2095	2095	m92_state *state = machine.driver_data<m92_state>();
2096		UINT8 *ROM = machine.region("maincpu")->base();
	2096	UINT8 *ROM = state->memregion("maincpu")->base();
2097	2097
2098		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x80000], 0x20000);
	2098	state->membank("bank1")->configure_entries(0, 4, &ROM[0x80000], 0x20000);
2099	2099	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x20, 0x21, write16_delegate(FUNC(m92_state::m92_bankswitch_w),state));
2100	2100
2101	2101	state->m_game_kludge = 0;
r14976	r14977
2106	2106	static DRIVER_INIT( majtitl2 )
2107	2107	{
2108	2108	m92_state *state = machine.driver_data<m92_state>();
2109		UINT8 *ROM = machine.region("maincpu")->base();
	2109	UINT8 *ROM = state->memregion("maincpu")->base();
2110	2110
2111		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x80000], 0x20000);
	2111	state->membank("bank1")->configure_entries(0, 4, &ROM[0x80000], 0x20000);
2112	2112	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x20, 0x21, write16_delegate(FUNC(m92_state::m92_bankswitch_w),state));
2113	2113
2114	2114	/* This game has an eeprom on the game board */
r14976	r14977
2122	2122	static DRIVER_INIT( ppan )
2123	2123	{
2124	2124	m92_state *state = machine.driver_data<m92_state>();
2125		UINT8 *ROM = machine.region("maincpu")->base();
2126		memory_set_bankptr(machine, "bank1", &ROM[0xa0000]);
	2125	UINT8 *ROM = state->memregion("maincpu")->base();
	2126	state->membank("bank1")->set_base(&ROM[0xa0000]);
2127	2127
2128	2128	state->m_game_kludge = 0;
2129	2129	state->m_irq_vectorbase = 0x80;

src/mame/drivers/m58.c

r14976	r14977
434	434	// on these sets the content of the sprite color PROM needs reversing
435	435	//  are the proms on the other sets from bootleg boards, or hand modified?
436	436	UINT8* buffer = auto_alloc_array(machine, UINT8, 0x10);
437		UINT8* region = machine.region("proms")->base();
	437	UINT8* region = machine.root_device().memregion("proms")->base();
438	438	int i;
439	439
440	440	for (i=0;i<0x10;i++)

src/mame/drivers/fcombat.c

r14976	r14977
100	100	int wx = (m_tx + m_fcombat_sh) / 16;
101	101	int wy = (m_ty * 2 + m_fcombat_sv) / 16;
102	102
103		return machine().region("user2")->base()[wx * 32 * 16 + wy];
	103	return memregion("user2")->base()[wx * 32 * 16 + wy];
104	104	}
105	105
106	106	WRITE8_MEMBER(fcombat_state::ee00_w)
r14976	r14977
339	339
340	340	/* make a temporary copy of the character data */
341	341	src = temp;
342		dst = machine.region("gfx1")->base();
343		length = machine.region("gfx1")->bytes();
	342	dst = machine.root_device().memregion("gfx1")->base();
	343	length = machine.root_device().memregion("gfx1")->bytes();
344	344	memcpy(src, dst, length);
345	345
346	346	/* decode the characters */
r14976	r14977
357	357
358	358	/* make a temporary copy of the sprite data */
359	359	src = temp;
360		dst = machine.region("gfx2")->base();
361		length = machine.region("gfx2")->bytes();
	360	dst = machine.root_device().memregion("gfx2")->base();
	361	length = machine.root_device().memregion("gfx2")->bytes();
362	362	memcpy(src, dst, length);
363	363
364	364	/* decode the sprites */
r14976	r14977
378	378
379	379	/* make a temporary copy of the character data */
380	380	src = temp;
381		dst = machine.region("gfx3")->base();
382		length = machine.region("gfx3")->bytes();
	381	dst = machine.root_device().memregion("gfx3")->base();
	382	length = machine.root_device().memregion("gfx3")->bytes();
383	383	memcpy(src, dst, length);
384	384
385	385	/* decode the characters */
r14976	r14977
397	397	}
398	398
399	399	src = temp;
400		dst = machine.region("user1")->base();
401		length = machine.region("user1")->bytes();
	400	dst = machine.root_device().memregion("user1")->base();
	401	length = machine.root_device().memregion("user1")->bytes();
402	402	memcpy(src, dst, length);
403	403
404	404	for (oldaddr = 0; oldaddr < 32; oldaddr++)
r14976	r14977
409	409
410	410
411	411	src = temp;
412		dst = machine.region("user2")->base();
413		length = machine.region("user2")->bytes();
	412	dst = machine.root_device().memregion("user2")->base();
	413	length = machine.root_device().memregion("user2")->bytes();
414	414	memcpy(src, dst, length);
415	415
416	416	for (oldaddr = 0; oldaddr < 32; oldaddr++)

src/mame/drivers/feversoc.c

r14976	r14977
298	298
299	299	static DRIVER_INIT( feversoc )
300	300	{
301		seibuspi_rise11_sprite_decrypt_feversoc(machine.region("gfx1")->base(), 0x200000);
	301	seibuspi_rise11_sprite_decrypt_feversoc(machine.root_device().memregion("gfx1")->base(), 0x200000);
302	302	}
303	303
304	304	GAME( 2004, feversoc,  0,       feversoc,  feversoc,  feversoc, ROT0, "Seibu Kaihatsu", "Fever Soccer", 0 )

src/mame/drivers/multigam.c

r14976	r14977
196	196	/* count determines the size of the area mapped in KB */
197	197	for (i = 0; i < count; i++, offset += 0x400)
198	198	{
199		memory_set_bankptr(machine, banknames[i + start], machine.region("gfx1")->base() + offset);
	199	machine.root_device().membank(banknames[i + start])->set_base(machine.root_device().memregion("gfx1")->base() + offset);
200	200	}
201	201	}
202	202
r14976	r14977
209	209	/* count determines the size of the area mapped in KB */
210	210	for (i = 0; i < count; i++, offset += 0x400)
211	211	{
212		memory_set_bankptr(machine, banknames[i + start], state->m_vram + offset);
	212	state->membank(banknames[i + start])->set_base(state->m_vram + offset);
213	213	}
214	214	}
215	215
r14976	r14977
293	293	WRITE8_MEMBER(multigam_state::multigam_switch_prg_rom)
294	294	{
295	295	/* switch PRG rom */
296		UINT8* dst = machine().region("maincpu")->base();
297		UINT8* src = machine().region("user1")->base();
	296	UINT8* dst = memregion("maincpu")->base();
	297	UINT8* src = memregion("user1")->base();
298	298
299	299	if (data & 0x80)
300	300	{
r14976	r14977
313	313
314	314	WRITE8_MEMBER(multigam_state::multigam_switch_gfx_rom)
315	315	{
316		memory_set_bankptr(machine(), "bank1", machine().region("gfx1")->base() + (0x2000 * (data & 0x3f)));
	316	membank("bank1")->set_base(machine().root_device().memregion("gfx1")->base() + (0x2000 * (data & 0x3f)));
317	317	set_mirroring(data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
318	318	m_game_gfx_bank = data;
319	319	};
r14976	r14977
323	323	{
324	324	if (m_game_gfx_bank & 0x80)
325	325	{
326		memory_set_bankptr(machine(), "bank1", machine().region("gfx1")->base() + (0x2000 * ((data & 0x3) + (m_game_gfx_bank & 0x3c))));
	326	membank("bank1")->set_base(machine().root_device().memregion("gfx1")->base() + (0x2000 * ((data & 0x3) + (m_game_gfx_bank & 0x3c))));
327	327	}
328	328	else
329	329	{
r14976	r14977
408	408	if (m_multigam3_mmc3_last_bank != (data & 0xc0))
409	409	{
410	410	int bank;
411		UINT8 *prg = machine().region("maincpu")->base();
	411	UINT8 *prg = memregion("maincpu")->base();
412	412
413	413	/* reset the banks */
414	414	if (m_multigam3_mmc3_command & 0x40)
r14976	r14977
461	461
462	462	case 6: /* program banking */
463	463	{
464		UINT8 *prg = machine().region("maincpu")->base();
	464	UINT8 *prg = memregion("maincpu")->base();
465	465	if (m_multigam3_mmc3_command & 0x40)
466	466	{
467	467	/* high bank */
r14976	r14977
486	486	case 7: /* program banking */
487	487	{
488	488	/* mid bank */
489		UINT8 *prg = machine().region("maincpu")->base();
	489	UINT8 *prg = memregion("maincpu")->base();
490	490
491	491	m_multigam3_mmc3_banks[1] = data & bankmask;
492	492	bank = m_multigam3_mmc3_banks[1] * 0x2000;
r14976	r14977
511	511	case 0x2001: /* enable ram at $6000 */
512	512	if (data & 0x80)
513	513	{
514		memory_set_bankptr(machine(), "bank10", m_multigmc_mmc3_6000_ram);
	514	membank("bank10")->set_base(m_multigmc_mmc3_6000_ram);
515	515	}
516	516	else
517	517	{
518		memory_set_bankptr(machine(), "bank10", machine().region("maincpu")->base() + 0x6000);
	518	membank("bank10")->set_base(machine().root_device().memregion("maincpu")->base() + 0x6000);
519	519	}
520	520	if (data & 0x40)
521	521	{
r14976	r14977
544	544	static void multigam_init_mmc3(running_machine &machine, UINT8 *prg_base, int prg_size, int chr_bank_base)
545	545	{
546	546	multigam_state *state = machine.driver_data<multigam_state>();
547		UINT8* dst = machine.region("maincpu")->base();
	547	UINT8* dst = state->memregion("maincpu")->base();
548	548
549	549	// Tom & Jerry in Super Game III enables 6000 ram, but does not read/write it
550	550	// however, it expects ROM from 6000 there (code jumps to $6xxx)
r14976	r14977
588	588	WRITE8_MEMBER(multigam_state::multigm3_switch_prg_rom)
589	589	{
590	590	/* switch PRG rom */
591		UINT8* dst = machine().region("maincpu")->base();
592		UINT8* src = machine().region("user1")->base();
	591	UINT8* dst = memregion("maincpu")->base();
	592	UINT8* src = memregion("user1")->base();
593	593
594	594	if (data == 0xa8)
595	595	{
r14976	r14977
599	599	else
600	600	{
601	601	space.install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigm3_mapper2_w),this) );
602		memory_set_bankptr(machine(), "bank10", machine().region("maincpu")->base() + 0x6000);
	602	membank("bank10")->set_base(machine().root_device().memregion("maincpu")->base() + 0x6000);
603	603	}
604	604
605	605	if (data & 0x80)
r14976	r14977
651	651
652	652	WRITE8_MEMBER(multigam_state::multigam3_mapper02_rom_switch_w)
653	653	{
654		UINT8* mem = machine().region("maincpu")->base();
	654	UINT8* mem = memregion("maincpu")->base();
655	655	int bankmask = (m_mapper02_prg_size/0x4000) - 1;
656	656	memcpy(mem + 0x8000, m_mapper02_prg_base + 0x4000*(data & bankmask), 0x4000);
657	657	}
r14976	r14977
660	660	{
661	661	multigam_state *state = machine.driver_data<multigam_state>();
662	662	ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
663		UINT8* mem = machine.region("maincpu")->base();
	663	UINT8* mem = state->memregion("maincpu")->base();
664	664	memcpy(mem + 0x8000, prg_base + prg_size - 0x8000, 0x8000);
665	665	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mapper02_rom_switch_w),state));
666	666
r14976	r14977
780	780	case 3:   /* program banking */
781	781	{
782	782	int bank = (m_mmc1_shiftreg & m_mmc1_rom_mask) * 0x4000;
783		UINT8 *prg = machine().region("maincpu")->base();
	783	UINT8 *prg = memregion("maincpu")->base();
784	784
785	785	if (!m_size16k)
786	786	{
r14976	r14977
813	813	static void multigam_init_mmc1(running_machine &machine, UINT8 *prg_base, int prg_size, int chr_bank_base)
814	814	{
815	815	multigam_state *state = machine.driver_data<multigam_state>();
816		UINT8* dst = machine.region("maincpu")->base();
	816	UINT8* dst = state->memregion("maincpu")->base();
817	817	ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
818	818
819	819	memcpy(&dst[0x8000], prg_base + (prg_size - 0x8000), 0x8000);
r14976	r14977
856	856	{
857	857	multigam_state *state = machine.driver_data<multigam_state>();
858	858	ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
859		UINT8* mem = machine.region("maincpu")->base();
	859	UINT8* mem = state->memregion("maincpu")->base();
860	860
861	861	// video bank
862	862	if (state->m_supergm3_chr_bank == 0x10 ||
r14976	r14977
865	865	// VRAM
866	866	ppu->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank1");
867	867	ppu->memory().space(AS_PROGRAM)->install_write_bank(0x0000, 0x1fff, "bank1");
868		memory_set_bankptr(machine, "bank1", state->m_vram);
	868	state->membank("bank1")->set_base(state->m_vram);
869	869
870	870	if (state->m_supergm3_chr_bank == 0x40)
871	871	state->set_mirroring(PPU_MIRROR_VERT);
r14976	r14977
890	890	{
891	891	// title screen
892	892	memcpy(mem + 0x8000, mem + 0x18000, 0x8000);
893		memory_set_bankptr(machine, "bank10", mem + 0x6000);
	893	state->membank("bank10")->set_base(mem + 0x6000);
894	894	ppu->set_scanline_callback(0);
895	895	}
896	896	else if ((state->m_supergm3_prg_bank & 0x40) == 0)
897	897	{
898	898	// mapper 02
899	899	multigam_init_mapper02(machine,
900		machine.region("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
	900	machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
901	901	0x20000);
902	902	}
903	903	else if (state->m_supergm3_chr_bank & 0x10)
904	904	{
905	905	// MMC3
906	906	multigam_init_mmc3(machine,
907		machine.region("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
	907	machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
908	908	(state->m_supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
909	909	(state->m_supergm3_chr_bank & 0x0f)*0x80);
910	910	}
r14976	r14977
912	912	{
913	913	//MMC1
914	914	multigam_init_mmc1(machine,
915		machine.region("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
	915	machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
916	916	0x20000,
917	917	(state->m_supergm3_chr_bank & 0x0f)*0x80/4 );
918	918	}
r14976	r14977
1139	1139
1140	1140	machine.device("ppu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(multigam_state::multigam_nt_r),state), write8_delegate(FUNC(multigam_state::multigam_nt_w),state));
1141	1141	machine.device("ppu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank1");
1142		memory_set_bankptr(machine, "bank1", machine.region("gfx1")->base());
	1142	state->membank("bank1")->set_base(state->memregion("gfx1")->base());
1143	1143	}
1144	1144
1145	1145	static MACHINE_START( multigm3 )
r14976	r14977
1373	1373
1374	1374	const UINT8 decode[16]  = { 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a };
1375	1375
1376		multigm3_decrypt(machine.region("maincpu")->base(), machine.region("maincpu")->bytes(), decode );
1377		multigm3_decrypt(machine.region("user1")->base(), machine.region("user1")->bytes(), decode );
	1376	multigm3_decrypt(machine.root_device().memregion("maincpu")->base(), machine.root_device().memregion("maincpu")->bytes(), decode );
	1377	multigm3_decrypt(machine.root_device().memregion("user1")->base(), machine.root_device().memregion("user1")->bytes(), decode );
1378	1378
1379	1379	state->m_multigmc_mmc3_6000_ram = auto_alloc_array(machine, UINT8, 0x2000);
1380	1380
r14976	r14977
1391	1391	int i;
1392	1392	int addr;
1393	1393
1394		rom = machine.region("maincpu")->base();
	1394	rom = machine.root_device().memregion("maincpu")->base();
1395	1395	size = 0x8000;
1396	1396	memcpy(buf, rom, size);
1397	1397	for (i = 0; i < size; i++)
r14976	r14977
1401	1401	rom[i] = buf[addr];
1402	1402	}
1403	1403
1404		rom = machine.region("user1")->base();
	1404	rom = machine.root_device().memregion("user1")->base();
1405	1405	size = 0x80000;
1406	1406	memcpy(buf, rom, size);
1407	1407	for (i = 0; i < size; i++)
r14976	r14977
1409	1409	addr = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,8,11,12,10,9,7,6,5,4,3,2,1,0);
1410	1410	rom[i] = buf[addr];
1411	1411	}
1412		rom = machine.region("gfx1")->base();
	1412	rom = machine.root_device().memregion("gfx1")->base();
1413	1413	size = 0x80000;
1414	1414	memcpy(buf, rom, size);
1415	1415	for (i = 0; i < size; i++)

src/mame/drivers/fuukifg2.c

r14976	r14977
115	115	WRITE8_MEMBER(fuuki16_state::fuuki16_sound_rombank_w)
116	116	{
117	117	if (data <= 2)
118		memory_set_bank(machine(), "bank1", data);
	118	membank("bank1")->set_entry(data);
119	119	else
120	120	logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(&space.device()), data);
121	121	}
r14976	r14977
441	441	static MACHINE_START( fuuki16 )
442	442	{
443	443	fuuki16_state *state = machine.driver_data<fuuki16_state>();
444		UINT8 *ROM = machine.region("audiocpu")->base();
	444	UINT8 *ROM = state->memregion("audiocpu")->base();
445	445
446		memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x10000], 0x8000);
	446	state->membank("bank1")->configure_entries(0, 3, &ROM[0x10000], 0x8000);
447	447
448	448	state->m_maincpu = machine.device("maincpu");
449	449	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/vcombat.c

r14976	r14977
439	439	static DRIVER_INIT( vcombat )
440	440	{
441	441	vcombat_state *state = machine.driver_data<vcombat_state>();
442		UINT8 *ROM = machine.region("maincpu")->base();
	442	UINT8 *ROM = state->memregion("maincpu")->base();
443	443
444	444	/* The two i860s execute out of RAM */
445	445	address_space *space = machine.device<i860_device>("vid_0")->space(AS_PROGRAM);

src/mame/drivers/shangha3.c

r14976	r14977
58	58
59	59	READ16_MEMBER(shangha3_state::heberpop_gfxrom_r)
60	60	{
61		UINT8 *ROM = machine().region("gfx1")->base();
	61	UINT8 *ROM = memregion("gfx1")->base();
62	62
63	63	return ROM[2*offset] | (ROM[2*offset+1] << 8);
64	64	}

src/mame/drivers/39in1.c

r14976	r14977
1569	1569
1570	1570	static MACHINE_START(39in1)
1571	1571	{
1572		UINT8 *ROM = machine.region("maincpu")->base();
	1572	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1573	1573	int i;
1574	1574
1575	1575	for (i = 0; i < 0x80000; i += 2)

src/mame/drivers/fortecar.c

r14976	r14977
372	372
373	373	static PALETTE_INIT( fortecar )
374	374	{
375		const UINT8 *color_prom = machine.region("proms")->base();
	375	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
376	376	/* Video resistors...
377	377
378	378	O1 (LS374) R1K  RED

src/mame/drivers/gunpey.c

r14976	r14977
134	134	{
135	135	UINT16 *blit_buffer = m_blit_buffer;
136	136	UINT16 *blit_ram = m_blit_ram;
137		UINT8 *blit_rom = machine().region("blit_data")->base();
	137	UINT8 *blit_rom = memregion("blit_data")->base();
138	138	int x,y;
139	139
140	140	blit_ram[offset] = data;
r14976	r14977
307	307	static PALETTE_INIT( gunpey )
308	308	{
309	309	int i,r,g,b,val;
310		UINT8 *blit_rom = machine.region("blit_data")->base();
	310	UINT8 *blit_rom = machine.root_device().memregion("blit_data")->base();
311	311
312	312	for (i = 0; i < 512; i+=2)
313	313	{
r14976	r14977
384	384
385	385	static DRIVER_INIT( gunpey )
386	386	{
387		UINT8 *rom = machine.region("maincpu")->base();
	387	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
388	388
389	389	/* patch SLOOOOW cycle checks ... */
390	390	rom[0x848b5] = 0x7e;

src/mame/drivers/guab.c

r14976	r14977
319	319	{
320	320	guab_state *state = machine.driver_data<guab_state>();
321	321	struct wd1770 &fdc = state->m_fdc;
322		UINT8* disk = (UINT8*)machine.region("user1")->base();
	322	UINT8* disk = (UINT8*)state->memregion("user1")->base();
323	323	int more_data = 0;
324	324
325	325	/*

src/mame/drivers/baraduke.c

r14976	r14977
536	536	int i;
537	537
538	538	/* unpack the third tile ROM */
539		rom = machine.region("gfx2")->base() + 0x8000;
	539	rom = machine.root_device().memregion("gfx2")->base() + 0x8000;
540	540	for (i = 0x2000;i < 0x4000;i++)
541	541	{
542	542	rom[i + 0x2000] = rom[i];

src/mame/drivers/cyclemb.c

r14976	r14977
101	101
102	102	static PALETTE_INIT( cyclemb )
103	103	{
104		const UINT8 *color_prom = machine.region("proms")->base();
	104	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
105	105	int i,r,g,b,val;
106	106	int bit0,bit1,bit2;
107	107
r14976	r14977
227	227
228	228	WRITE8_MEMBER(cyclemb_state::cyclemb_bankswitch_w)
229	229	{
230		memory_set_bank(machine(), "bank1", data & 3);
	230	membank("bank1")->set_entry(data & 3);
231	231	}
232	232
233	233	#if 0
r14976	r14977
613	613
614	614	static DRIVER_INIT( cyclemb )
615	615	{
616		memory_configure_bank(machine, "bank1", 0, 4, machine.region("maincpu")->base() + 0x10000, 0x1000);
	616	machine.root_device().membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x1000);
617	617	}
618	618
619	619	GAME( 1984, cyclemb,  0,   cyclemb,  cyclemb,  cyclemb, ROT0, "Taito Corporation", "Cycle Mahbou (Japan)", GAME_NOT_WORKING )

src/mame/drivers/mcr.c

r14976	r14977
1784	1784	ROM_LOAD( "sfvid.1b",     0x2000, 0x2000, CRC(78801e83) SHA1(23b5811a03fe4ad576c5313d2205203577300159) )
1785	1785	ROM_LOAD( "sfvid.1d",     0x4000, 0x2000, CRC(4d8445cf) SHA1(fbe427da0e758b79eb2230713f2cd12e6f8bdeb7) )
1786	1786	ROM_LOAD( "sfvid.1e",     0x6000, 0x2000, CRC(3da25495) SHA1(e7b703bc8caca7497af92efc869c6f1b7dbc8bf1) )
1787
1788		ROM_REGION( 0x0020, "proms", 0 )
1789		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1790	1787	ROM_END
1791	1788
1792	1789
r14976	r14977
1814	1811	ROM_LOAD( "2700b-v2.1d",  0x2000, 0x2000, CRC(565ea97d) SHA1(4a30a371ad407bf774cf08bf528f824675383698) )
1815	1812	ROM_LOAD( "2800c-v2.1b",  0x4000, 0x2000, CRC(f3be56a1) SHA1(eb3eb0379a918a2959565572d88f9b0f021d1c2a) )
1816	1813	ROM_LOAD( "2900d-v2.1a",  0x6000, 0x2000, CRC(77da795e) SHA1(ebebc8551e7a7534d89bb8458eb2576713cfbeaf) )
1817
1818		ROM_REGION( 0x0020, "proms", 0 )
1819		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1820	1814	ROM_END
1821	1815
1822	1816	ROM_START( kickman )
r14976	r14977
1843	1837	ROM_LOAD( "2700b-v2.1d",  0x2000, 0x2000, CRC(565ea97d) SHA1(4a30a371ad407bf774cf08bf528f824675383698) )
1844	1838	ROM_LOAD( "2800c-v2.1b",  0x4000, 0x2000, CRC(f3be56a1) SHA1(eb3eb0379a918a2959565572d88f9b0f021d1c2a) )
1845	1839	ROM_LOAD( "2900d-v2.1a",  0x6000, 0x2000, CRC(77da795e) SHA1(ebebc8551e7a7534d89bb8458eb2576713cfbeaf) )
1846
1847		ROM_REGION( 0x0020, "proms", 0 )
1848		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1849	1840	ROM_END
1850	1841
1851	1842	ROM_START( kickc )
r14976	r14977
1872	1863	ROM_LOAD( "2700-b.1d",    0x2000, 0x2000, CRC(78eda36c) SHA1(5cf9da6f364f586f324e7ac529db0dc273498320) )
1873	1864	ROM_LOAD( "2800-c.1b",    0x4000, 0x2000, CRC(c93e0170) SHA1(a7efdb6fd13dccd8d8d10de61b87585828bde6ac) )
1874	1865	ROM_LOAD( "2900-d.1a",    0x6000, 0x2000, CRC(91e59383) SHA1(bf87642cc747f1abbd80c6f529adfa60a1d9bc9e) )
1875
1876		ROM_REGION( 0x0020, "proms", 0 )
1877		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
1878	1866	ROM_END
1879	1867
1880	1868
r14976	r14977
1901	1889	ROM_LOAD( "sh-fg.01",     0x2000, 0x2000, CRC(ba1a38b4) SHA1(cee5f0a66e40c779f1bfbb4bfafe5301385e7dae) )
1902	1890	ROM_LOAD( "sh-fg.02",     0x4000, 0x2000, CRC(6b57f6da) SHA1(71165df59dd5ca037116dc0f46fd4f6aac6dbfd1) )
1903	1891	ROM_LOAD( "sh-fg.03",     0x6000, 0x2000, CRC(37ea9d07) SHA1(82e006b01ee12390308be530d4b68fc2404b6b91) )
1904
1905		ROM_REGION( 0x0020, "proms", 0 )
1906		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
1907	1892	ROM_END
1908	1893
1909	1894	ROM_START( shollow2 )
r14976	r14977
1929	1914	ROM_LOAD( "sh-fg.01",     0x2000, 0x2000, CRC(ba1a38b4) SHA1(cee5f0a66e40c779f1bfbb4bfafe5301385e7dae) )
1930	1915	ROM_LOAD( "sh-fg.02",     0x4000, 0x2000, CRC(6b57f6da) SHA1(71165df59dd5ca037116dc0f46fd4f6aac6dbfd1) )
1931	1916	ROM_LOAD( "sh-fg.03",     0x6000, 0x2000, CRC(37ea9d07) SHA1(82e006b01ee12390308be530d4b68fc2404b6b91) )
1932
1933		ROM_REGION( 0x0020, "proms", 0 )
1934		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
1935	1917	ROM_END
1936	1918
1937	1919	/*
r14976	r14977
1962	1944	ROM_LOAD( "vgc.cb1",     0x4000, 0x2000, CRC(3329f9d4) SHA1(11f4d744374e475d2c5b195a9f70888414529dd3) )
1963	1945	ROM_LOAD( "vga.a1",      0x6000, 0x2000, CRC(9743f873) SHA1(71ed80ecd8caaf9fce1d7010f95c4678c9bd7102) )
1964	1946
1965		ROM_REGION( 0x0020, "proms", 0 ) /* PROM's located on the Super Sound I/O Board (90913) */
1966		ROM_LOAD( "9860-07axn-axhd.d12",     0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) ) /* N82S123 */
1967
1968	1947	ROM_REGION( 0x0005, "scpu_pals", 0) /* PAL's located on the Super CPU Board (90010) */
1969	1948	ROM_LOAD( "0066-313bx-xxqx.a12.bin", 0x0000, 0x0001, NO_DUMP)
1970	1949	ROM_LOAD( "0066-315bx-xxqx.b12.bin", 0x0000, 0x0001, NO_DUMP)
r14976	r14977
2001	1980	ROM_LOAD( "vgc.cb1",     0x4000, 0x2000, CRC(3329f9d4) SHA1(11f4d744374e475d2c5b195a9f70888414529dd3) )
2002	1981	ROM_LOAD( "vga.a1",      0x6000, 0x2000, CRC(9743f873) SHA1(71ed80ecd8caaf9fce1d7010f95c4678c9bd7102) )
2003	1982
2004		ROM_REGION( 0x0020, "proms", 0 ) /* PROM's located on the Super Sound I/O Board (90913) */
2005		ROM_LOAD( "9860-07axn-axhd.d12",     0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) ) /* N82S123 */
2006
2007	1983	ROM_REGION( 0x0005, "scpu_pals", 0) /* PAL's located on the Super CPU Board (90010) */
2008	1984	ROM_LOAD( "0066-313bx-xxqx.a12.bin", 0x0000, 0x0001, NO_DUMP)
2009	1985	ROM_LOAD( "0066-315bx-xxqx.b12.bin", 0x0000, 0x0001, NO_DUMP)
r14976	r14977
2040	2016	ROM_LOAD( "vgc.cb1",     0x4000, 0x2000, CRC(3329f9d4) SHA1(11f4d744374e475d2c5b195a9f70888414529dd3) )
2041	2017	ROM_LOAD( "vga.a1",      0x6000, 0x2000, CRC(9743f873) SHA1(71ed80ecd8caaf9fce1d7010f95c4678c9bd7102) )
2042	2018
2043		ROM_REGION( 0x0020, "proms", 0 ) /* PROM's located on the Super Sound I/O Board (90913) */
2044		ROM_LOAD( "9860-07axn-axhd.d12",     0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) ) /* N82S123 */
2045
2046	2019	ROM_REGION( 0x0005, "scpu_pals", 0) /* PAL's located on the Super CPU Board (90010) */
2047	2020	ROM_LOAD( "0066-313bx-xxqx.a12.bin", 0x0000, 0x0001, NO_DUMP)
2048	2021	ROM_LOAD( "0066-315bx-xxqx.b12.bin", 0x0000, 0x0001, NO_DUMP)
r14976	r14977
2079	2052	ROM_LOAD( "vgc.cb1",      0x4000, 0x2000, CRC(3329f9d4) SHA1(11f4d744374e475d2c5b195a9f70888414529dd3) )
2080	2053	ROM_LOAD( "vga.a1",       0x6000, 0x2000, CRC(9743f873) SHA1(71ed80ecd8caaf9fce1d7010f95c4678c9bd7102) )
2081	2054
2082		ROM_REGION( 0x0020, "proms", 0 ) /* PROM's located on the Super Sound I/O Board (90913) */
2083		ROM_LOAD( "9860-07axn-axhd.d12",     0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) ) /* N82S123 */
2084
2085	2055	ROM_REGION( 0x0005, "scpu_pals", 0) /* PAL's located on the Super CPU Board (90010) */
2086	2056	ROM_LOAD( "0066-313bx-xxqx.a12.bin", 0x0000, 0x0001, NO_DUMP)
2087	2057	ROM_LOAD( "0066-315bx-xxqx.b12.bin", 0x0000, 0x0001, NO_DUMP)
r14976	r14977
2113	2083	ROM_LOAD( "kozmkvid.1d",  0x2000, 0x2000, CRC(4e23b35b) SHA1(322221ea207ad0eeb0e711f3af473f71b70f7128) )
2114	2084	ROM_LOAD( "kozmkvid.1b",  0x4000, 0x2000, CRC(c6041ba7) SHA1(9bd55f06d360657af5c56062053221dd24027978) )
2115	2085	ROM_LOAD( "kozmkvid.1a",  0x6000, 0x2000, CRC(b57fb0ff) SHA1(e4dde9fb09a0e5051352ba05d776ebbe0cd81504) )
2116
2117		ROM_REGION( 0x0020, "proms", 0 )
2118		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2119	2086	ROM_END
2120	2087
2121	2088
r14976	r14977
2141	2108	ROM_LOAD( "dmanfg1.bin",  0x2000, 0x2000, CRC(16aa4b9b) SHA1(700f7dc3ce20dacce38dc40783b28fc9b4c1443a) )
2142	2109	ROM_LOAD( "dmanfg2.bin",  0x4000, 0x2000, CRC(4a8e76b8) SHA1(563b9db39940060265b771f3b0c4a2055963cf2b) )
2143	2110	ROM_LOAD( "dmanfg3.bin",  0x6000, 0x2000, CRC(1f39257e) SHA1(645f9b7e8bd2254167d15567c3bd577d3a574f7d) )
2144
2145		ROM_REGION( 0x0020, "proms", 0 )
2146		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2147	2111	ROM_END
2148	2112
2149	2113
r14976	r14977
2168	2132	ROM_LOAD( "wackovid.1d",  0x2000, 0x2000, CRC(a02f1672) SHA1(1d1b7eada4dae5e31dc1474b13cefd71926cbfc7) )
2169	2133	ROM_LOAD( "wackovid.1b",  0x4000, 0x2000, CRC(7d899790) SHA1(aa320f4ac41d2a1acec4880a8d95dfe6406e210e) )
2170	2134	ROM_LOAD( "wackovid.1a",  0x6000, 0x2000, CRC(080be3ad) SHA1(ead2be17d749a15841123e42d434aab573870fba) )
2171
2172		ROM_REGION( 0x0020, "proms", 0 )
2173		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2174	2135	ROM_END
2175	2136
2176	2137
r14976	r14977
2195	2156	ROM_LOAD( "vid_c1",  0x2000, 0x2000, CRC(62ed737b) SHA1(954c1f17da2ceb77e710faf0822d29381b873a07) )
2196	2157	ROM_LOAD( "vid_b1",  0x4000, 0x2000, CRC(0939921e) SHA1(f52d3475232557959e501f70765a4ad472300e84) )
2197	2158	ROM_LOAD( "vid_a1",  0x6000, 0x2000, CRC(ef515824) SHA1(983af762733405b96351ef4910f4f4be40c4880e) )
2198
2199		ROM_REGION( 0x0020, "proms", 0 )
2200		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2201	2159	ROM_END
2202	2160
2203	2161	ROM_START( twotigerc )
r14976	r14977
2221	2179	ROM_LOAD( "2tgrfg1.bin",  0x2000, 0x2000, CRC(fbcaffa5) SHA1(5145cd7cc08552388b8662b5d159b3af6344c51a) )
2222	2180	ROM_LOAD( "2tgrfg2.bin",  0x4000, 0x2000, CRC(08e3e1a6) SHA1(c9c5ce072b235a299a3151f984d73bab97289e19) )
2223	2181	ROM_LOAD( "2tgrfg3.bin",  0x6000, 0x2000, CRC(9b22697b) SHA1(4c3fa30ce1b645ab18c0e53ce0f3754133a267ad) )
2224
2225		ROM_REGION( 0x0020, "proms", 0 )
2226		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2227	2182	ROM_END
2228	2183
2229	2184
r14976	r14977
2254	2209	ROM_LOAD( "a4",           0xa000, 0x2000, CRC(765876a7) SHA1(9c477f5fae068f7e424939652e959711b3ad3a80) )
2255	2210	ROM_LOAD( "a1",           0xc000, 0x2000, CRC(4af986f8) SHA1(56af9525a404bcf6d76b19318efe541189844210) )
2256	2211	ROM_LOAD( "a2",           0xe000, 0x2000, CRC(b30cd2a7) SHA1(df1b36a3481fdec49f73d504f23951070c121291) )
2257
2258		ROM_REGION( 0x0020, "proms", 0 )
2259		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2260	2212	ROM_END
2261	2213
2262	2214
r14976	r14977
2286	2238	ROM_LOAD( "tapfg4.bin",   0x14000, 0x4000, CRC(32674ee6) SHA1(402c166d50b4a693959b3f0706a7931a5daef6ce) )
2287	2239	ROM_LOAD( "tapfg7.bin",   0x18000, 0x4000, CRC(070b4c81) SHA1(95879a455ecfe2e3de7fe2a75078f9e6934960f5) )
2288	2240	ROM_LOAD( "tapfg6.bin",   0x1c000, 0x4000, CRC(a37aef36) SHA1(a24696f16d467d9eea4f25aef5f4c5ff55bf51ff) )
2289
2290		ROM_REGION( 0x0020, "proms", 0 )
2291		ROM_LOAD( "5784",         0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
2292	2241	ROM_END
2293	2242
2294	2243	ROM_START( tappera )
r14976	r14977
2317	2266	ROM_LOAD( "fg4_a4.128",   0x14000, 0x4000, CRC(082a4059) SHA1(52672b853d67432fd80e4612fa54208c225d2444) )
2318	2267	ROM_LOAD( "fg7_a1.128",   0x18000, 0x4000, CRC(3b476abe) SHA1(6fe170695386fc77310384a5590a7cc3671ae853) )
2319	2268	ROM_LOAD( "fg6_a2.128",   0x1c000, 0x4000, CRC(6717264c) SHA1(5a6d30974e73f952694b8c09fb3a5393a76db4f2) )
2320
2321		ROM_REGION( 0x0020, "proms", 0 )
2322		ROM_LOAD( "5784",         0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
2323	2269	ROM_END
2324	2270
2325	2271	ROM_START( sutapper )
r14976	r14977
2348	2294	ROM_LOAD( "5800",         0x14000, 0x4000, CRC(ebf1f948) SHA1(251cf018da8db11c3844123255082146b22507e5) )
2349	2295	ROM_LOAD( "5801",         0x18000, 0x4000, CRC(d70defa7) SHA1(e8ceabe94080eb28aa393b97ec54729cf8aba001) )
2350	2296	ROM_LOAD( "5802",         0x1c000, 0x4000, CRC(d4f114b9) SHA1(58ae647b4fd0f48af4158b85e29c813605d930d3) )
2351
2352		ROM_REGION( 0x0020, "proms", 0 )
2353		ROM_LOAD( "5784",         0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
2354	2297	ROM_END
2355	2298
2356	2299	ROM_START( rbtapper )
r14976	r14977
2379	2322	ROM_LOAD( "rbtfg4.bin",   0x14000, 0x4000, CRC(8c79e7d7) SHA1(e2a427324fc1d4422e50a1ab79822aff0290e109) )
2380	2323	ROM_LOAD( "rbtfg7.bin",   0x18000, 0x4000, CRC(8dbf0c36) SHA1(dab52db0bca13b9f3470060bc3babe4a6c2cdcc8) )
2381	2324	ROM_LOAD( "rbtfg6.bin",   0x1c000, 0x4000, CRC(441201a0) SHA1(400d390729601610b152e21da55399399830221f) )
2382
2383		ROM_REGION( 0x0020, "proms", 0 )
2384		ROM_LOAD( "5784",         0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
2385	2325	ROM_END
2386	2326
2387	2327
r14976	r14977
2410	2350	ROM_LOAD( "timfg4.bin",   0x14000, 0x4000, CRC(b7105eb7) SHA1(913687f0e5dd105a3dfdc0afd1b5610b27124451) )
2411	2351	ROM_LOAD( "timfg7.bin",   0x18000, 0x4000, CRC(d9c27475) SHA1(24a7e6200e4f3514d4d3f25b2ffe3338c0c2a495) )
2412	2352	ROM_LOAD( "timfg6.bin",   0x1c000, 0x4000, CRC(244778e8) SHA1(494bc1e627997cd4f1d5267c5fafd0779ccf9255) )
2413
2414		ROM_REGION( 0x0020, "proms", 0 )
2415		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2416	2353	ROM_END
2417	2354
2418	2355
r14976	r14977
2442	2379	ROM_LOAD( "loc-d.cp7",    0x0a000, 0x2000, CRC(5e8a3ef3) SHA1(74983c922eae1326ecd0ff14000851e0b424cc61) )
2443	2380	ROM_LOAD( "loc-a.cp0",    0x0c000, 0x2000, CRC(b35f5374) SHA1(3f330ffde52ac57c02dfdf8e105aefcc10f87a0b) )
2444	2381	ROM_LOAD( "loc-b.cp9",    0x0e000, 0x2000, CRC(565a5c48) SHA1(9dfafd58bd552bfda4e1799a175735ecc1369ba3) )
2445
2446		ROM_REGION( 0x0020, "proms", 0 )
2447		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2448	2382	ROM_END
2449	2383
2450	2384	ROM_START( dotrona )
r14976	r14977
2473	2407	ROM_LOAD( "loc-d.cp7",    0x0a000, 0x2000, CRC(5e8a3ef3) SHA1(74983c922eae1326ecd0ff14000851e0b424cc61) )
2474	2408	ROM_LOAD( "loc-a.cp0",    0x0c000, 0x2000, CRC(b35f5374) SHA1(3f330ffde52ac57c02dfdf8e105aefcc10f87a0b) )
2475	2409	ROM_LOAD( "loc-b.cp9",    0x0e000, 0x2000, CRC(565a5c48) SHA1(9dfafd58bd552bfda4e1799a175735ecc1369ba3) )
2476
2477		ROM_REGION( 0x0020, "proms", 0 )
2478		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2479	2410	ROM_END
2480	2411
2481	2412	ROM_START( dotrone )
r14976	r14977
2511	2442	ROM_LOAD( "loc-b.cp9",    0x0e000, 0x2000, CRC(565a5c48) SHA1(9dfafd58bd552bfda4e1799a175735ecc1369ba3) )
2512	2443
2513	2444	ROM_REGION( 0x0040, "proms", 0 )
2514		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2515	2445	ROM_LOAD( "edotlamp.u2",  0x0020, 0x0020, CRC(fb58b867) SHA1(45beb55f2c2e9197f091fc06e9a2f595e57e5c93) )   /* lamp sequencer PROM */
2516	2446	ROM_END
2517	2447
r14976	r14977
2550	2480	ROM_LOAD( "nflvidfg.cp7", 0x0a000, 0x2000, CRC(73f62392) SHA1(18f28be7264f8edff38f8a6aa067eeb1970f544c) )
2551	2481	ROM_LOAD( "nflvidfg.c10", 0x0c000, 0x2000, CRC(1766dcc7) SHA1(df499e3c66ae702d2d56e6cd095a754665569fcd) )
2552	2482	ROM_LOAD( "nflvidfg.cp9", 0x0e000, 0x2000, CRC(46558146) SHA1(4bedfae8cf0fcb9d837706ee13fbe3944ab47216) )
2553
2554		ROM_REGION( 0x0020, "proms", 0 )
2555		ROM_LOAD( "5784",         0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )
2556	2483	ROM_END
2557	2484
2558	2485
r14976	r14977
2581	2508	ROM_LOAD( "dd_fg-6.a7",   0x14000, 0x4000, CRC(abfb9a8b) SHA1(14ab416bc76db25ad97353c9072048c64ec95344) )
2582	2509	ROM_LOAD( "dd_fg-3.a10",  0x18000, 0x4000, CRC(801d9b86) SHA1(5a8c72d1060eea1a3ad67b98aa6eff13f6837af6) )
2583	2510	ROM_LOAD( "dd_fg-7.a9",   0x1c000, 0x4000, CRC(0ec3f60a) SHA1(4176b246b0ea7bce9498c20e12678f16f7173529) )
2584
2585		ROM_REGION( 0x0020, "proms", 0 )
2586		ROM_LOAD( "82s123.12d",   0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) )   /* from shollow, assuming it's the same */
2587	2511	ROM_END
2588	2512
2589	2513

src/mame/drivers/mpu4vid.c

r14976	r14977
2112	2112
2113	2113	static PALETTE_INIT( dealem )
2114	2114	{
2115		const UINT8 *color_prom = machine.region("proms")->base();
	2115	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
2116	2116	int i, len;
2117	2117	static const int resistances_rg[3] = { 1000, 470, 220 };
2118	2118	static const int resistances_b [2] = { 470, 220 };
r14976	r14977
2123	2123	3,   resistances_rg,   weights_g,   1000,   0,
2124	2124	2,   resistances_b,   weights_b,   1000,   0);
2125	2125
2126		len = machine.region("proms")->bytes();
	2126	len = machine.root_device().memregion("proms")->bytes();
2127	2127	for (i = 0; i < len; i++)
2128	2128	{
2129	2129	int bit0,bit1,bit2,r,g,b;
r14976	r14977
2883	2883	void mpu4vid_char_cheat(running_machine& machine, int address)
2884	2884	{
2885	2885	mpu4_state *state = machine.driver_data<mpu4_state>();
2886		UINT8* cheattable = machine.region( "video" )->base()+address;
	2886	UINT8* cheattable = state->memregion( "video" )->base()+address;
2887	2887	state->m_current_chr_table = blank_data;
2888	2888	for (int i=0;i<72;i++)
2889	2889	{

src/mame/drivers/clshroad.c

r14976	r14977
472	472	die once, it would be nice to avoid the hack however
473	473
474	474	*/
475		UINT8 *ROM = machine.region("maincpu")->base();
	475	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
476	476
477	477	ROM[0x05C6] = 0xc3;
478	478	ROM[0x05C7] = 0x8d;

src/mame/drivers/chqflag.c

r14976	r14977
40	40	WRITE8_MEMBER(chqflag_state::chqflag_bankswitch_w)
41	41	{
42	42	int bankaddress;
43		UINT8 *RAM = machine().region("maincpu")->base();
	43	UINT8 *RAM = memregion("maincpu")->base();
44	44
45	45	/* bits 0-4 = ROM bank # (0x00-0x11) */
46	46	bankaddress = 0x10000 + (data & 0x1f) * 0x4000;
47		memory_set_bankptr(machine(), "bank4", &RAM[bankaddress]);
	47	membank("bank4")->set_base(&RAM[bankaddress]);
48	48
49	49	/* bit 5 = memory bank select */
50	50	if (data & 0x20)
51	51	{
52	52	space.install_read_bank(0x1800, 0x1fff, "bank5");
53	53	space.install_write_handler(0x1800, 0x1fff, write8_delegate(FUNC(driver_device::paletteram_xBBBBBGGGGGRRRRR_byte_be_w),this));
54		memory_set_bankptr(machine(), "bank5", m_generic_paletteram_8);
	54	membank("bank5")->set_base(m_generic_paletteram_8);
55	55
56	56	if (m_k051316_readroms)
57	57	space.install_legacy_readwrite_handler(*m_k051316_1, 0x1000, 0x17ff, FUNC(k051316_rom_r), FUNC(k051316_w));   /* 051316 #1 (ROM test) */
r14976	r14977
322	322	static MACHINE_START( chqflag )
323	323	{
324	324	chqflag_state *state = machine.driver_data<chqflag_state>();
325		UINT8 *ROM = machine.region("maincpu")->base();
	325	UINT8 *ROM = state->memregion("maincpu")->base();
326	326
327		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
	327	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x2000);
328	328
329	329	state->m_maincpu = machine.device("maincpu");
330	330	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/lsasquad.c

r14976	r14977
155	155	WRITE8_MEMBER(lsasquad_state::lsasquad_bankswitch_w)
156	156	{
157	157	/* bits 0-2 select ROM bank */
158		memory_set_bank(machine(), "bank1", data & 0x07);
	158	membank("bank1")->set_entry(data & 0x07);
159	159
160	160	/* bit 3 is zeroed on startup, maybe reset sound CPU */
161	161
r14976	r14977
567	567	static MACHINE_START( lsasquad )
568	568	{
569	569	lsasquad_state *state = machine.driver_data<lsasquad_state>();
570		UINT8 *ROM = machine.region("maincpu")->base();
	570	UINT8 *ROM = state->memregion("maincpu")->base();
571	571
572		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x2000);
	572	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x2000);
573	573
574	574	state->m_maincpu = machine.device("maincpu");
575	575	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/dooyong.c

r14976	r14977
86	86
87	87	WRITE8_MEMBER(dooyong_state::lastday_bankswitch_w)
88	88	{
89		memory_set_bank(machine(), "bank1", data & 0x07);
	89	membank("bank1")->set_entry(data & 0x07);
90	90
91	91	if (data & 0xf8) popmessage("bankswitch %02x",data);
92	92	}
93	93
94	94	static MACHINE_START( lastday )
95	95	{
96		memory_configure_bank(machine, "bank1", 0, 8, machine.region("maincpu")->base() + 0x10000, 0x4000);
	96	machine.root_device().membank("bank1")->configure_entries(0, 8, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
97	97	}
98	98
99	99	WRITE8_MEMBER(dooyong_state::flip_screen_w)

src/mame/drivers/cham24.c

r14976	r14977
191	191	UINT32 prg_bank_page_size = (offset >> 12) & 0x01;
192	192	UINT32 gfx_mirroring = (offset >> 13) & 0x01;
193	193
194		UINT8* dst = machine().region("maincpu")->base();
195		UINT8* src = machine().region("user1")->base();
	194	UINT8* dst = memregion("maincpu")->base();
	195	UINT8* src = memregion("user1")->base();
196	196
197	197	// switch PPU VROM bank
198		memory_set_bankptr(machine(), "bank1", machine().region("gfx1")->base() + (0x2000 * gfx_bank));
	198	membank("bank1")->set_base(machine().root_device().memregion("gfx1")->base() + (0x2000 * gfx_bank));
199	199
200	200	// set gfx mirroring
201	201	cham24_set_mirroring(machine(), gfx_mirroring != 0 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
r14976	r14977
304	304	{
305	305	cham24_state *state = machine.driver_data<cham24_state>();
306	306	/* switch PRG rom */
307		UINT8* dst = machine.region("maincpu")->base();
308		UINT8* src = machine.region("user1")->base();
	307	UINT8* dst = machine.root_device().memregion("maincpu")->base();
	308	UINT8* src = machine.root_device().memregion("user1")->base();
309	309
310	310	memcpy(&dst[0x8000], &src[0x0f8000], 0x4000);
311	311	memcpy(&dst[0xc000], &src[0x0f8000], 0x4000);
312	312
313	313	/* uses 8K swapping, all ROM!*/
314	314	machine.device("ppu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x1fff, "bank1");
315		memory_set_bankptr(machine, "bank1", machine.region("gfx1")->base());
	315	state->membank("bank1")->set_base(state->memregion("gfx1")->base());
316	316
317	317	/* need nametable ram, though. I doubt this uses more than 2k, but it starts up configured for 4 */
318	318	state->m_nt_ram = auto_alloc_array(machine, UINT8, 0x1000);

src/mame/drivers/silvmil.c

r14976	r14977
409	409
410	410	static void tumblepb_gfx1_rearrange(running_machine &machine)
411	411	{
412		UINT8 *rom = machine.region("gfx1")->base();
413		int len = machine.region("gfx1")->bytes();
	412	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	413	int len = machine.root_device().memregion("gfx1")->bytes();
414	414	int i;
415	415
416	416	/* gfx data is in the wrong order */

src/mame/drivers/brkthru.c

r14976	r14977
660	660
661	661	static DRIVER_INIT( brkthru )
662	662	{
663		UINT8 *ROM = machine.region("maincpu")->base();
664		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x2000);
	663	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	664	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x2000);
665	665	}
666	666
667	667	/*************************************

src/mame/drivers/thepit.c

r14976	r14977
1080	1080	// Read the actual byte from question roms
1081	1081	else if((offset & 0xc00) == 0xc00)
1082	1082	{
1083		UINT8 *ROM = machine().region("user1")->base();
	1083	UINT8 *ROM = memregion("user1")->base();
1084	1084	int real_address;
1085	1085
1086	1086	real_address = (0x8000 * m_question_rom) | m_question_address | (offset & 0x3f0) | m_remap_address[offset & 0x0f];

src/mame/drivers/trvmadns.c

r14976	r14977
98	98	}
99	99	else if((data & 0xf0) == 0x80 || (data & 0xf0) == 0x90)
100	100	{
101		rom = machine().region("user2")->base();
	101	rom = memregion("user2")->base();
102	102
103	103	switch(data & 0xf)
104	104	{
r14976	r14977
114	114
115	115	address |= (data & 0x10) ? 0x10000 : 0;
116	116
117		memory_set_bankptr(machine(), "bank1", &rom[address]);
118		memory_set_bankptr(machine(), "bank2", &rom[address + 0x1000]);
	117	membank("bank1")->set_base(&rom[address]);
	118	membank("bank2")->set_base(&rom[address + 0x1000]);
119	119	}
120	120	else
121	121	{
r14976	r14977
126	126	//logerror("port80 = %02X\n",data);
127	127	}
128	128
129		rom = machine().region("user1")->base();
	129	rom = memregion("user1")->base();
130	130
131	131	/*
132	132	7
r14976	r14977
154	154
155	155	//      logerror("add = %X\n",address);
156	156
157		memory_set_bankptr(machine(), "bank1", &rom[address]);
	157	membank("bank1")->set_base(&rom[address]);
158	158	}
159	159	}
160	160

src/mame/drivers/cloud9.c

r14976	r14977
160	160	rectangle visarea;
161	161
162	162	/* initialize globals */
163		state->m_syncprom = machine.region("proms")->base() + 0x000;
	163	state->m_syncprom = state->memregion("proms")->base() + 0x000;
164	164
165	165	/* find the start of VBLANK in the SYNC PROM */
166	166	for (state->m_vblank_start = 0; state->m_vblank_start < 256; state->m_vblank_start++)

src/mame/drivers/rpunch.c

r14976	r14977
132	132
133	133	static MACHINE_RESET( rpunch )
134	134	{
135		UINT8 *snd = machine.region("upd")->base();
	135	UINT8 *snd = machine.root_device().memregion("upd")->base();
136	136	memcpy(snd, snd + 0x20000, 0x20000);
137	137	}
138	138
r14976	r14977
198	198	rpunch_state *state = device->machine().driver_data<rpunch_state>();
199	199	if ((data & 1) != state->m_upd_rom_bank)
200	200	{
201		UINT8 *snd = device->machine().region("upd")->base();
	201	UINT8 *snd = state->memregion("upd")->base();
202	202	state->m_upd_rom_bank = data & 1;
203	203	memcpy(snd, snd + 0x20000 * (state->m_upd_rom_bank + 1), 0x20000);
204	204	}

src/mame/drivers/albazg.c

r14976	r14977
178	178	if( state->m_bank != new_bank)
179	179	{
180	180	state->m_bank = new_bank;
181		memory_set_bank(device->machine(), "bank1", state->m_bank);
	181	state->membank("bank1")->set_entry(state->m_bank);
182	182	}
183	183
184	184	state->m_mux_data = data & ~0xc0;
r14976	r14977
357	357	static MACHINE_START( yumefuda )
358	358	{
359	359	albazg_state *state = machine.driver_data<albazg_state>();
360		UINT8 *ROM = machine.region("maincpu")->base();
	360	UINT8 *ROM = state->memregion("maincpu")->base();
361	361
362		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
	362	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x2000);
363	363
364	364	state->save_item(NAME(state->m_mux_data));
365	365	state->save_item(NAME(state->m_bank));

src/mame/drivers/bingoc.c

r14976	r14977
100	100	---- --x- sound rom banking
101	101	---- ---x start-stop sample
102	102	*/
103		UINT8 *upd = device->machine().region("upd")->base();
	103	UINT8 *upd = device->machine().root_device().memregion("upd")->base();
104	104	memcpy(&upd[0x00000], &upd[0x20000 + (((data & 2)>>1) * 0x20000)], 0x20000);
105	105	upd7759_start_w(device, data & 1);
106	106	//  printf("%02x\n",data);

src/mame/drivers/sstrangr.c

r14976	r14977
92	92
93	93	get_pens(pens);
94	94
95		color_map_base = &screen.machine().region("proms")->base()[state->m_flip_screen ? 0x0000 : 0x0200];
	95	color_map_base = &state->memregion("proms")->base()[state->m_flip_screen ? 0x0000 : 0x0200];
96	96
97	97	for (offs = 0; offs < 0x2000; offs++)
98	98	{

src/mame/drivers/backfire.c

r14976	r14977
667	667
668	668	static void descramble_sound( running_machine &machine )
669	669	{
670		UINT8 *rom = machine.region("ymz")->base();
	670	UINT8 *rom = machine.root_device().memregion("ymz")->base();
671	671	int length = 0x200000; // only the first rom is swapped on backfire!
672	672	UINT8 *buf1 = auto_alloc_array(machine, UINT8, length);
673	673	UINT32 x;

src/mame/drivers/starwars.c

r14976	r14977
502	502	starwars_mproc_init(machine);
503	503
504	504	/* initialize banking */
505		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x6000, 0x10000 - 0x6000);
506		memory_set_bank(machine, "bank1", 0);
	505	state->membank("bank1")->configure_entries(0, 2, state->memregion("maincpu")->base() + 0x6000, 0x10000 - 0x6000);
	506	state->membank("bank1")->set_entry(0);
507	507	}
508	508
509	509
510	510	static DRIVER_INIT( esb )
511	511	{
512	512	starwars_state *state = machine.driver_data<starwars_state>();
513		UINT8 *rom = machine.region("maincpu")->base();
	513	UINT8 *rom = state->memregion("maincpu")->base();
514	514
515	515	/* init the slapstic */
516	516	slapstic_init(machine, 101);
r14976	r14977
532	532	starwars_mproc_init(machine);
533	533
534	534	/* initialize banking */
535		memory_configure_bank(machine, "bank1", 0, 2, rom + 0x6000, 0x10000 - 0x6000);
536		memory_set_bank(machine, "bank1", 0);
537		memory_configure_bank(machine, "bank2", 0, 2, rom + 0xa000, 0x1c000 - 0xa000);
538		memory_set_bank(machine, "bank2", 0);
	535	state->membank("bank1")->configure_entries(0, 2, rom + 0x6000, 0x10000 - 0x6000);
	536	state->membank("bank1")->set_entry(0);
	537	state->membank("bank2")->configure_entries(0, 2, rom + 0xa000, 0x1c000 - 0xa000);
	538	state->membank("bank2")->set_entry(0);
539	539
540	540	/* additional globals for state saving */
541	541	state->save_item(NAME(state->m_slapstic_current_bank));

src/mame/drivers/exerion.c

r14976	r14977
165	165	{
166	166	exerion_state *state = device->machine().driver_data<exerion_state>();
167	167	/* pull the expected value from the ROM */
168		state->m_porta = device->machine().region("maincpu")->base()[0x5f76];
	168	state->m_porta = state->memregion("maincpu")->base()[0x5f76];
169	169	state->m_portb = data;
170	170
171	171	logerror("Port B = %02X\n", data);
r14976	r14977
175	175	READ8_MEMBER(exerion_state::exerion_protection_r)
176	176	{
177	177	if (cpu_get_pc(&space.device()) == 0x4143)
178		return machine().region("maincpu")->base()[0x33c0 + (m_main_ram[0xd] << 2) + offset];
	178	return memregion("maincpu")->base()[0x33c0 + (m_main_ram[0xd] << 2) + offset];
179	179	else
180	180	return m_main_ram[0x8 + offset];
181	181	}
r14976	r14977
558	558
559	559	/* make a temporary copy of the character data */
560	560	src = temp;
561		dst = machine.region("gfx1")->base();
562		length = machine.region("gfx1")->bytes();
	561	dst = machine.root_device().memregion("gfx1")->base();
	562	length = machine.root_device().memregion("gfx1")->bytes();
563	563	memcpy(src, dst, length);
564	564
565	565	/* decode the characters */
r14976	r14977
576	576
577	577	/* make a temporary copy of the sprite data */
578	578	src = temp;
579		dst = machine.region("gfx2")->base();
580		length = machine.region("gfx2")->bytes();
	579	dst = machine.root_device().memregion("gfx2")->base();
	580	length = machine.root_device().memregion("gfx2")->bytes();
581	581	memcpy(src, dst, length);
582	582
583	583	/* decode the sprites */
r14976	r14977
599	599
600	600	static DRIVER_INIT( exerionb )
601	601	{
602		UINT8 *ram = machine.region("maincpu")->base();
	602	UINT8 *ram = machine.root_device().memregion("maincpu")->base();
603	603	int addr;
604	604
605	605	/* the program ROMs have data lines D1 and D2 swapped. Decode them. */

src/mame/drivers/savquest.c

r14976	r14977
106	106	{
107	107	if (data & 0x10)      // enable RAM access to region 0xf0000 - 0xfffff
108	108	{
109		memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
	109	state->membank("bank1")->set_base(state->m_bios_ram);
110	110	}
111	111	else               // disable RAM access (reads go to BIOS ROM)
112	112	{
113		memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base() + 0x20000);
	113	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("bios")->base() + 0x20000);
114	114	}
115	115	break;
116	116	}
r14976	r14977
531	531
532	532	static MACHINE_RESET( savquest )
533	533	{
534		memory_set_bankptr(machine, "bank1", machine.region("bios")->base() + 0x20000);
	534	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base() + 0x20000);
535	535	}
536	536
537	537

src/mame/drivers/segas18.c

r14976	r14977
429	429	/* sprite banking */
430	430	else
431	431	{
432		int maxbanks = space->machine().region("gfx2")->bytes() / 0x40000;
	432	int maxbanks = space->machine().root_device().memregion("gfx2")->bytes() / 0x40000;
433	433	if (data >= maxbanks)
434	434	data = 255;
435	435	segaic16_sprites_set_bank(space->machine(), 0, (offset - 8) * 2 + 0, data * 2 + 0);
r14976	r14977
587	587
588	588	static WRITE8_HANDLER( soundbank_w )
589	589	{
590		memory_set_bankptr(space->machine(), "bank1", space->machine().region("soundcpu")->base() + 0x10000 + 0x2000 * data);
	590	space->machine().root_device().membank("bank1")->set_base(space->machine().root_device().memregion("soundcpu")->base() + 0x10000 + 0x2000 * data);
591	591	}
592	592
593	593

src/mame/drivers/astrocorp.c

r14976	r14977
1008	1008	static DRIVER_INIT( showhand )
1009	1009	{
1010	1010	#if 0
1011		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	1011	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
1012	1012
1013	1013	rom[0x0a1a/2] = 0x6000;   // hopper jam
1014	1014
r14976	r14977
1024	1024	static DRIVER_INIT( showhanc )
1025	1025	{
1026	1026	#if 0
1027		UINT16 *rom = (UINT16*)machine.region("maincpu")->base();
	1027	UINT16 *rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
1028	1028
1029	1029	rom[0x14d4/2] = 0x4e71;   // enable full test mode
1030	1030	rom[0x14d6/2] = 0x4e71;   // ""

src/mame/drivers/ltcasino.c

r14976	r14977
712	712	static DRIVER_INIT(mv4in1)
713	713	{
714	714	int i;
715		UINT8 *rom = machine.region("maincpu")->base();
	715	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
716	716	for(i=0;i<0x10000;i++)
717	717	rom[i]=BITSWAP8(rom[i],7,6,5,4,3,1,2,0);
718	718	}

src/mame/drivers/meijinsn.c

r14976	r14977
248	248
249	249	static PALETTE_INIT( meijinsn )
250	250	{
251		const UINT8 *color_prom = machine.region("proms")->base();
	251	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
252	252	int i;
253	253	static const int resistances_b[2]  = { 470, 220 };
254	254	static const int resistances_rg[3] = { 1000, 470, 220 };

src/mame/drivers/coolridr.c

r14976	r14977
683	683	COMBINE_DATA(&m_h1_charram[offset]);
684	684
685	685	{
686		UINT8 *gfx = machine().region("ram_gfx")->base();
	686	UINT8 *gfx = memregion("ram_gfx")->base();
687	687
688	688	gfx[offset*4+0] = (m_h1_charram[offset] & 0xff000000) >> 24;
689	689	gfx[offset*4+1] = (m_h1_charram[offset] & 0x00ff0000) >> 16;

src/mame/drivers/blitz.c

r14976	r14977
364	364
365	365	static PALETTE_INIT( megadpkr )
366	366	{
367		const UINT8 *color_prom = machine.region("proms")->base();
	367	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
368	368	/*
369	369	This hardware has a feature called BLUE KILLER.
370	370	Using the original intensity line, the PCB has a bridge

src/mame/drivers/cobra.c

r14976	r14977
2072	2072	{
2073	2073	int i;
2074	2074	UINT32 sum = 0;
2075		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	2075	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
2076	2076
2077	2077	//rom[(0x02218^4) / 4] = 0x60000000;        // skip connect_grphcpu()...
2078	2078
r14976	r14977
2095	2095
2096	2096	// rom hacks for sub board...
2097	2097	{
2098		UINT32 *rom = (UINT32*)machine.region("user2")->base();
	2098	UINT32 *rom = (UINT32*)machine.root_device().memregion("user2")->base();
2099	2099
2100	2100	rom[0x62094 / 4] = 0x60000000;         // skip hardcheck()...
2101	2101	}
r14976	r14977
2106	2106	int i;
2107	2107	UINT32 sum = 0;
2108	2108
2109		UINT32 *rom = (UINT32*)machine.region("user3")->base();
	2109	UINT32 *rom = (UINT32*)machine.root_device().memregion("user3")->base();
2110	2110
2111	2111	rom[(0x022d4^4) / 4] = 0x60000000;      // skip init_raster() for now ...
2112	2112

src/mame/drivers/tutankhm.c

r14976	r14977
89	89
90	90	WRITE8_MEMBER(tutankhm_state::tutankhm_bankselect_w)
91	91	{
92		memory_set_bank(machine(), "bank1", data & 0x0f);
	92	membank("bank1")->set_entry(data & 0x0f);
93	93	}
94	94
95	95
r14976	r14977
198	198	{
199	199	tutankhm_state *state = machine.driver_data<tutankhm_state>();
200	200
201		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x1000);
	201	state->membank("bank1")->configure_entries(0, 16, state->memregion("maincpu")->base() + 0x10000, 0x1000);
202	202
203	203	state->m_maincpu = machine.device<cpu_device>("maincpu");
204	204

src/mame/drivers/targeth.c

r14976	r14977
51	51
52	52	WRITE16_MEMBER(targeth_state::OKIM6295_bankswitch_w)
53	53	{
54		UINT8 *RAM = machine().region("oki")->base();
	54	UINT8 *RAM = memregion("oki")->base();
55	55
56	56	if (ACCESSING_BITS_0_7){
57	57	memcpy(&RAM[0x30000], &RAM[0x40000 + (data & 0x0f)*0x10000], 0x10000);

src/mame/drivers/intrscti.c

r14976	r14977
131	131
132	132	static DRIVER_INIT( intrscti )
133	133	{
134		UINT8 *cpu = machine.region( "maincpu" )->base();
	134	UINT8 *cpu = machine.root_device().memregion( "maincpu" )->base();
135	135	int i;
136	136	for (i=0x8000;i<0x8fff;i++)
137	137	{

src/mame/drivers/rainbow.c

r14976	r14977
397	397
398	398	static WRITE8_DEVICE_HANDLER( bankswitch_w )
399	399	{
400		memory_set_bank(device->machine(), "bank1", data & 3);
	400	device->machine().root_device().membank("bank1")->set_entry(data & 3);
401	401	}
402	402
403	403	READ8_MEMBER(rbisland_state::jumping_latch_r)
r14976	r14977
875	875
876	876	static DRIVER_INIT( rbisland )
877	877	{
878		UINT8 *ROM = machine.region("audiocpu")->base();
	878	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
879	879
880		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0xc000], 0x4000);
	880	machine.root_device().membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
881	881
882	882	rbisland_cchip_init(machine, 0);
883	883	}
884	884
885	885	static DRIVER_INIT( rbislande )
886	886	{
887		UINT8 *ROM = machine.region("audiocpu")->base();
	887	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
888	888
889		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0xc000], 0x4000);
	889	machine.root_device().membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
890	890
891	891	rbisland_cchip_init(machine, 1);
892	892	}

src/mame/drivers/tryout.c

r14976	r14977
45	45
46	46	WRITE8_MEMBER(tryout_state::tryout_bankswitch_w)
47	47	{
48		UINT8 *RAM = machine().region("maincpu")->base();
	48	UINT8 *RAM = memregion("maincpu")->base();
49	49	int bankaddress;
50	50
51	51	bankaddress = 0x10000 + (data & 0x01) * 0x2000;
52		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress]);
	52	membank("bank1")->set_base(&RAM[bankaddress]);
53	53	}
54	54
55	55	static ADDRESS_MAP_START( main_cpu, AS_PROGRAM, 8, tryout_state )

src/mame/drivers/rungun.c

r14976	r14977
220	220
221	221	m_z80_control = data;
222	222
223		memory_set_bank(machine(), "bank2", data & 0x07);
	223	membank("bank2")->set_entry(data & 0x07);
224	224
225	225	if (data & 0x10)
226	226	device_set_input_line(m_audiocpu, INPUT_LINE_NMI, CLEAR_LINE);
r14976	r14977
366	366	static MACHINE_START( rng )
367	367	{
368	368	rungun_state *state = machine.driver_data<rungun_state>();
369		UINT8 *ROM = machine.region("soundcpu")->base();
	369	UINT8 *ROM = state->memregion("soundcpu")->base();
370	370
371		memory_configure_bank(machine, "bank2", 0, 8, &ROM[0x10000], 0x4000);
	371	state->membank("bank2")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
372	372
373	373	state->m_maincpu = machine.device("maincpu");
374	374	state->m_audiocpu = machine.device("soundcpu");

src/mame/drivers/sfbonus.c

r14976	r14977
1080	1080
1081	1081	WRITE8_MEMBER(sfbonus_state::sfbonus_bank_w)
1082	1082	{
1083		UINT8 *ROM = machine().region("maincpu")->base();
	1083	UINT8 *ROM = memregion("maincpu")->base();
1084	1084	UINT8 bank;
1085	1085
1086	1086	bank = data & 7;
1087	1087
1088		memory_set_bankptr(machine(), "bank1", &ROM[bank * 0x10000]);
	1088	membank("bank1")->set_base(&ROM[bank * 0x10000]);
1089	1089	}
1090	1090
1091	1091
r14976	r14977
1214	1214
1215	1215	static MACHINE_RESET( sfbonus )
1216	1216	{
1217		UINT8 *ROM = machine.region("maincpu")->base();
	1217	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1218	1218
1219		memory_set_bankptr(machine, "bank1", &ROM[0]);
	1219	machine.root_device().membank("bank1")->set_base(&ROM[0]);
1220	1220	}
1221	1221
1222	1222	static NVRAM_HANDLER( sfbonus )
r14976	r14977
1233	1233	}
1234	1234	else
1235	1235	{
1236		UINT8* defaultram = machine.region("defaults")->base();
	1236	UINT8* defaultram = machine.root_device().memregion("defaults")->base();
1237	1237	memset(state->m_nvram,0x00,state->m_nvram.bytes());
1238	1238
1239	1239	if (defaultram)
1240	1240	if ((defaultram[0x02]==0x00) && (defaultram[0x03]==0x00)) // hack! rom region optional regions get cleared with garbage if no rom is present, this is not good!
1241		memcpy(state->m_nvram, machine.region("defaults")->base(), machine.region("defaults")->bytes());
	1241	memcpy(state->m_nvram, machine.root_device().memregion("defaults")->base(), machine.root_device().memregion("defaults")->bytes());
1242	1242	}
1243	1243	}
1244	1244	}
r14976	r14977
5733	5733
5734	5734	// dummy.rom helper
5735	5735	{
5736		UINT8 *ROM = machine.region("maincpu")->base();
5737		int length = machine.region("maincpu")->bytes();
5738		UINT8* ROM2 = machine.region("user1")->base();
	5736	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	5737	int length = machine.root_device().memregion("maincpu")->bytes();
	5738	UINT8* ROM2 = state->memregion("user1")->base();
5739	5739
5740	5740	if (ROM2)
5741	5741	{
r14976	r14977
5785	5785	{
5786	5786
5787	5787	int i;
5788		UINT8 *ROM = machine.region("maincpu")->base();
	5788	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
5789	5789
5790		for(i = 0; i < machine.region("maincpu")->bytes(); i++)
	5790	for(i = 0; i < machine.root_device().memregion("maincpu")->bytes(); i++)
5791	5791	{
5792	5792	UINT8 x = ROM[i];
5793	5793

src/mame/drivers/crystal.c

r14976	r14977
286	286
287	287	m_Bank = (data >> 1) & 7;
288	288	if (m_Bank <= 2)
289		memory_set_bankptr(machine(), "bank1", machine().region("user1")->base() + m_Bank * 0x1000000);
	289	membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + m_Bank * 0x1000000);
290	290	else
291		memory_set_bankptr(machine(), "bank1", machine().region("user2")->base());
	291	membank("bank1")->set_base(machine().root_device().memregion("user2")->base());
292	292	}
293	293
294	294	static TIMER_CALLBACK( Timercb )
r14976	r14977
368	368	{
369	369	if (m_Bank <= 2)
370	370	{
371		UINT32 *ptr = (UINT32*)(machine().region("user1")->base() + m_Bank * 0x1000000);
	371	UINT32 *ptr = (UINT32*)(machine().root_device().memregion("user1")->base() + m_Bank * 0x1000000);
372	372	return ptr[0];
373	373	}
374	374	else
r14976	r14977
567	567	crystal_state *state = machine.driver_data<crystal_state>();
568	568
569	569	if (state->m_Bank <= 2)
570		memory_set_bankptr(machine, "bank1", machine.region("user1")->base() + state->m_Bank * 0x1000000);
	570	state->membank("bank1")->set_base(machine.root_device().memregion("user1")->base() + state->m_Bank * 0x1000000);
571	571	else
572		memory_set_bankptr(machine, "bank1", machine.region("user2")->base());
	572	state->membank("bank1")->set_base(state->memregion("user2")->base());
573	573	}
574	574
575	575	static MACHINE_START( crystal )
r14976	r14977
613	613	state->m_IntHigh = 0;
614	614	device_set_irq_callback(machine.device("maincpu"), icallback);
615	615	state->m_Bank = 0;
616		memory_set_bankptr(machine, "bank1", machine.region("user1")->base() + 0);
	616	state->membank("bank1")->set_base(state->memregion("user1")->base() + 0);
617	617	state->m_FlashCmd = 0xff;
618	618	state->m_OldPort4 = 0;
619	619
r14976	r14977
960	960
961	961	static DRIVER_INIT(crysking)
962	962	{
963		UINT16 *Rom = (UINT16*) machine.region("user1")->base();
	963	UINT16 *Rom = (UINT16*) machine.root_device().memregion("user1")->base();
964	964
965	965	//patch the data feed by the protection
966	966
r14976	r14977
979	979
980	980	static DRIVER_INIT(evosocc)
981	981	{
982		UINT16 *Rom = (UINT16*) machine.region("user1")->base();
	982	UINT16 *Rom = (UINT16*) machine.root_device().memregion("user1")->base();
983	983	Rom += 0x1000000 * 2 / 2;
984	984
985	985	Rom[WORD_XOR_LE(0x97388E/2)] = 0x90FC;   //PUSH R2..R7
r14976	r14977
997	997
998	998	static DRIVER_INIT(topbladv)
999	999	{
1000		UINT16 *Rom = (UINT16*) machine.region("user1")->base();
	1000	UINT16 *Rom = (UINT16*) machine.root_device().memregion("user1")->base();
1001	1001
1002	1002	Rom[WORD_XOR_LE(0x12d7a/2)] = 0x90FC;   //PUSH R7-R6-R5-R4-R3-R2
1003	1003	Rom[WORD_XOR_LE(0x12d7c/2)] = 0x9001;   //PUSH R0
r14976	r14977
1015	1015
1016	1016	static DRIVER_INIT(officeye)
1017	1017	{
1018		UINT16 *Rom = (UINT16*) machine.region("user1")->base();
	1018	UINT16 *Rom = (UINT16*) machine.root_device().memregion("user1")->base();
1019	1019
1020	1020	Rom[WORD_XOR_LE(0x9c9e/2)] = 0x901C;   //PUSH R4-R3-R2
1021	1021	Rom[WORD_XOR_LE(0x9ca0/2)] = 0x9001;   //PUSH R0

src/mame/drivers/madmotor.c

r14976	r14977
351	351
352	352	static DRIVER_INIT( madmotor )
353	353	{
354		UINT8 *rom = machine.region("maincpu")->base();
	354	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
355	355	int i;
356	356
357	357	for (i = 0x00000;i < 0x80000;i++)

src/mame/drivers/chinsan.c

r14976	r14977
78	78
79	79	static PALETTE_INIT( chinsan )
80	80	{
81		UINT8 *src = machine.region( "color_proms" )->base();
	81	UINT8 *src = machine.root_device().memregion( "color_proms" )->base();
82	82	int i;
83	83
84	84	for (i = 0; i < 0x100; i++)
r14976	r14977
119	119
120	120	WRITE8_MEMBER(chinsan_state::ctrl_w)
121	121	{
122		memory_set_bank(machine(), "bank1", data >> 6);
	122	membank("bank1")->set_entry(data >> 6);
123	123	}
124	124
125	125	static WRITE8_DEVICE_HANDLER( ym_port_w1 )
r14976	r14977
541	541	}
542	542	else
543	543	{
544		UINT8 *ROM = device->machine().region("adpcm")->base();
	544	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base();
545	545
546	546	state->m_adpcm_data = ((state->m_trigger ? (ROM[state->m_adpcm_pos] & 0x0f) : (ROM[state->m_adpcm_pos] & 0xf0) >> 4));
547	547	msm5205_data_w(device, state->m_adpcm_data & 0xf);
r14976	r14977
571	571	{
572	572	chinsan_state *state = machine.driver_data<chinsan_state>();
573	573
574		memory_configure_bank(machine, "bank1", 0, 4, machine.region("maincpu")->base() + 0x10000, 0x4000);
	574	state->membank("bank1")->configure_entries(0, 4, state->memregion("maincpu")->base() + 0x10000, 0x4000);
575	575
576	576	state->save_item(NAME(state->m_adpcm_idle));
577	577	state->save_item(NAME(state->m_port_select));

src/mame/drivers/famibox.c

r14976	r14977
257	257	if ( bank == famicombox_banks[i].bank ||
258	258	famicombox_banks[i].bank == 0 )
259	259	{
260		memory_set_bankptr(machine, "cpubank1", machine.region(famicombox_banks[i].memory_region)->base() + famicombox_banks[i].bank1_offset);
261		memory_set_bankptr(machine, "cpubank2", machine.region(famicombox_banks[i].memory_region)->base() + famicombox_banks[i].bank2_offset);
262		memory_set_bankptr(machine, "ppubank1", machine.region(famicombox_banks[i].memory_region)->base() + famicombox_banks[i].ppubank_offset);
	260	machine.root_device().membank("cpubank1")->set_base(machine.root_device().memregion(famicombox_banks[i].memory_region)->base() + famicombox_banks[i].bank1_offset);
	261	machine.root_device().membank("cpubank2")->set_base(machine.root_device().memregion(famicombox_banks[i].memory_region)->base() + famicombox_banks[i].bank2_offset);
	262	machine.root_device().membank("ppubank1")->set_base(machine.root_device().memregion(famicombox_banks[i].memory_region)->base() + famicombox_banks[i].ppubank_offset);
263	263	break;
264	264	}
265	265	}

src/mame/drivers/cshooter.c

r14976	r14977
239	239
240	240	WRITE8_MEMBER(cshooter_state::bank_w)
241	241	{
242		memory_set_bankptr(machine(), "bank1",&machine().region("user1")->base()[0x4000*((data>>4)&3)]);
	242	membank("bank1")->set_base(&machine().root_device().memregion("user1")->base()[0x4000*((data>>4)&3)]);
243	243	}
244	244
245	245
r14976	r14977
665	665	static DRIVER_INIT( cshooter )
666	666	{
667	667	/* temp so it boots */
668		UINT8 *rom = machine.region("maincpu")->base();
	668	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
669	669
670	670	rom[0xa2] = 0x00;
671	671	rom[0xa3] = 0x00;
672	672	rom[0xa4] = 0x00;
673		memory_set_bankptr(machine, "bank1",&machine.region("user1")->base()[0]);
	673	machine.root_device().membank("bank1")->set_base(&machine.root_device().memregion("user1")->base()[0]);
674	674	}
675	675
676	676	static DRIVER_INIT( cshootere )
677	677	{
678	678	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
679	679	int A;
680		UINT8 *rom = machine.region("maincpu")->base();
	680	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
681	681	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
682	682
683	683	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
r14976	r14977
707	707	rom[A] = BITSWAP8(rom[A],7,6,1,4,3,2,5,0);
708	708	}
709	709
710		memory_set_bankptr(machine, "bank1",&machine.region("user1")->base()[0]);
	710	machine.root_device().membank("bank1")->set_base(&machine.root_device().memregion("user1")->base()[0]);
711	711	seibu_sound_decrypt(machine,"audiocpu",0x2000);
712	712	}
713	713

src/mame/drivers/aerofgt.c

r14976	r14977
107	107
108	108	WRITE8_MEMBER(aerofgt_state::aerofgt_sh_bankswitch_w)
109	109	{
110		memory_set_bank(machine(), "bank1", data & 0x03);
	110	membank("bank1")->set_entry(data & 0x03);
111	111	}
112	112
113	113
r14976	r14977
129	129
130	130	WRITE8_MEMBER(aerofgt_state::aerfboot_okim6295_banking_w)
131	131	{
132		UINT8 *oki = machine().region("oki")->base();
	132	UINT8 *oki = memregion("oki")->base();
133	133	/*bit 2 (0x4) setted too?*/
134	134	if (data & 0x4)
135	135	memcpy(&oki[0x20000], &oki[((data & 0x3) * 0x20000) + 0x40000], 0x20000);
r14976	r14977
1302	1302
1303	1303	static MACHINE_START( aerofgt )
1304	1304	{
1305		UINT8 *rom = machine.region("audiocpu")->base();
	1305	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
1306	1306
1307		memory_configure_bank(machine, "bank1", 0, 4, &rom[0x10000], 0x8000);
	1307	machine.root_device().membank("bank1")->configure_entries(0, 4, &rom[0x10000], 0x8000);
1308	1308
1309	1309	MACHINE_START_CALL(common);
1310	1310	}
r14976	r14977
1319	1319	{
1320	1320	MACHINE_RESET_CALL(common);
1321	1321
1322		memory_set_bank(machine, "bank1", 0);   /* needed by spinlbrk */
	1322	machine.root_device().membank("bank1")->set_entry(0);   /* needed by spinlbrk */
1323	1323	}
1324	1324
1325	1325	static MACHINE_CONFIG_START( pspikes, aerofgt_state )

src/mame/drivers/rocnrope.c

r14976	r14977
25	25	/* Roc'n'Rope has the IRQ vectors in RAM. The rom contains $FFFF at this address! */
26	26	WRITE8_MEMBER(rocnrope_state::rocnrope_interrupt_vector_w)
27	27	{
28		UINT8 *RAM = machine().region("maincpu")->base();
	28	UINT8 *RAM = memregion("maincpu")->base();
29	29
30	30	RAM[0xfff2 + offset] = data;
31	31	}

src/mame/drivers/maygay1b.c

r14976	r14977
4420	4420	//AM_RANGE(0x2420, 0x2421) AM_WRITE(latch_ch2_w ) // oki
4421	4421	// if there is no OKI region disable writes here, the rom might be missing, so alert user
4422	4422
4423		UINT8 *okirom = machine.region( "oki" )->base();
	4423	UINT8 *okirom = machine.root_device().memregion( "oki" )->base();
4424	4424
4425	4425	if (!okirom) {
4426	4426	maygay1b_state *state = machine.driver_data<maygay1b_state>();
r14976	r14977
4429	4429	// print out the rom id / header info to give us some hints
4430	4430	// note this isn't always correct, alley cat has 'Calpsyo' still in the ident string?
4431	4431	{
4432		UINT8 *cpu = machine.region( "maincpu" )->base();
	4432	UINT8 *cpu = machine.root_device().memregion( "maincpu" )->base();
4433	4433	int base = 0xff20;
4434	4434	for (int i=0;i<14;i++)
4435	4435	{

src/mame/drivers/twinkle.c

r14976	r14977
712	712
713	713	READ16_MEMBER(twinkle_state::twinkle_waveram_r)
714	714	{
715		UINT16 *waveram = (UINT16 *)machine().region("rfsnd")->base();
	715	UINT16 *waveram = (UINT16 *)machine().root_device().memregion("rfsnd")->base();
716	716
717	717	return waveram[offset];
718	718	}
719	719
720	720	WRITE16_MEMBER(twinkle_state::twinkle_waveram_w)
721	721	{
722		UINT16 *waveram = (UINT16 *)machine().region("rfsnd")->base();
	722	UINT16 *waveram = (UINT16 *)machine().root_device().memregion("rfsnd")->base();
723	723
724	724	COMBINE_DATA(&waveram[offset]);
725	725	}

src/mame/drivers/spool99.c

r14976	r14977
159	159
160	160	READ8_MEMBER(spool99_state::spool99_io_r)
161	161	{
162		UINT8 *ROM = machine().region("maincpu")->base();
	162	UINT8 *ROM = memregion("maincpu")->base();
163	163
164	164	//  if(!(io_switch))
165	165	{
r14976	r14977
229	229
230	230	READ8_MEMBER(spool99_state::vcarn_io_r)
231	231	{
232		UINT8 *ROM = machine().region("maincpu")->base();
	232	UINT8 *ROM = memregion("maincpu")->base();
233	233
234	234	//  if(!(io_switch))
235	235	{
r14976	r14977
419	419	{
420	420	spool99_state *state = machine.driver_data<spool99_state>();
421	421
422		UINT8 *ROM = machine.region("maincpu")->base();
	422	UINT8 *ROM = state->memregion("maincpu")->base();
423	423	//  vram = auto_alloc_array(machine, UINT8, 0x2000);
424	424	memcpy(state->m_main, ROM, 0x100);
425	425	}

src/mame/drivers/simpl156.c

r14976	r14977
1022	1022
1023	1023	static DRIVER_INIT( simpl156 )
1024	1024	{
1025		UINT8 *rom = machine.region("okimusic")->base();
1026		int length = machine.region("okimusic")->bytes();
	1025	UINT8 *rom = machine.root_device().memregion("okimusic")->base();
	1026	int length = machine.root_device().memregion("okimusic")->bytes();
1027	1027	UINT8 *buf1 = auto_alloc_array(machine, UINT8, length);
1028	1028
1029	1029	UINT32 x;

src/mame/drivers/battlnts.c

r14976	r14977
40	40	WRITE8_MEMBER(battlnts_state::battlnts_bankswitch_w)
41	41	{
42	42	/* bits 6 & 7 = bank number */
43		memory_set_bank(machine(), "bank1", (data & 0xc0) >> 6);
	43	membank("bank1")->set_entry((data & 0xc0) >> 6);
44	44
45	45	/* bits 4 & 5 = coin counters */
46	46	coin_counter_w(machine(), 0, data & 0x10);
r14976	r14977
224	224	static MACHINE_START( battlnts )
225	225	{
226	226	battlnts_state *state = machine.driver_data<battlnts_state>();
227		UINT8 *ROM = machine.region("maincpu")->base();
	227	UINT8 *ROM = state->memregion("maincpu")->base();
228	228
229		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	229	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
230	230
231	231	state->m_audiocpu = machine.device("audiocpu");
232	232	state->m_k007342 = machine.device("k007342");
r14976	r14977
404	404	static DRIVER_INIT( rackemup )
405	405	{
406	406	/* rearrange char ROM */
407		shuffle(machine.region("gfx1")->base(), machine.region("gfx1")->bytes());
	407	shuffle(machine.root_device().memregion("gfx1")->base(), machine.root_device().memregion("gfx1")->bytes());
408	408	}
409	409
410	410

src/mame/drivers/multfish.c

r14976	r14977
333	333
334	334	WRITE8_MEMBER(multfish_state::multfish_bank_w)
335	335	{
336		memory_set_bank(machine(), "bank1", data & 0x0f);
	336	membank("bank1")->set_entry(data & 0x0f);
337	337	}
338	338
339	339	static READ8_DEVICE_HANDLER( multfish_timekeeper_r )
r14976	r14977
471	471	*/
472	472
473	473	UINT32 i,j,jscr,romoffset;
474		UINT8 *multfish_gfx = machine.region("gfx")->base();
	474	UINT8 *multfish_gfx = machine.root_device().memregion("gfx")->base();
475	475	UINT8 *temprom = auto_alloc_array(machine, UINT8, multfish_ROM_SIZE);
476	476
477	477
r14976	r14977
543	543
544	544	static void lottery_decode(running_machine &machine, UINT8 xor12, UINT8 xor34, UINT8 xor56, UINT8 xor78, UINT32 xor_addr)
545	545	{
546		UINT8 *multfish_gfx = machine.region("gfx")->base();
	546	UINT8 *multfish_gfx = machine.root_device().memregion("gfx")->base();
547	547	UINT8 *temprom = auto_alloc_array(machine, UINT8, multfish_ROM_SIZE);
548	548
549	549	/* ROMs decode */
r14976	r14977
584	584
585	585	static void ent_decode(running_machine &machine, UINT8 xor12, UINT8 xor34, UINT8 xor56, UINT8 xor78, UINT32 xor_addr)
586	586	{
587		UINT8 *multfish_gfx = machine.region("gfx")->base();
	587	UINT8 *multfish_gfx = machine.root_device().memregion("gfx")->base();
588	588	UINT8 *temprom = auto_alloc_array(machine, UINT8, multfish_ROM_SIZE);
589	589
590	590	/* ROMs decode */
r14976	r14977
1009	1009	{
1010	1010	multfish_state *state = machine.driver_data<multfish_state>();
1011	1011
1012		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base(), 0x4000);
1013		memory_set_bank(machine, "bank1", 0);
	1012	state->membank("bank1")->configure_entries(0, 16, state->memregion("maincpu")->base(), 0x4000);
	1013	state->membank("bank1")->set_entry(0);
1014	1014
1015	1015	state->m_disp_enable = 0;
1016	1016	state->m_rambk = 0;

src/mame/drivers/galpani2.c

r14976	r14977
275	275
276	276	static WRITE8_DEVICE_HANDLER( galpani2_oki1_bank_w )
277	277	{
278		UINT8 *ROM = device->machine().region("oki1")->base();
	278	UINT8 *ROM = device->machine().root_device().memregion("oki1")->base();
279	279	logerror("%s : %s bank %08X\n",device->machine().describe_context(),device->tag(),data);
280	280	memcpy(ROM + 0x30000, ROM + 0x40000 + 0x10000 * (~data & 0xf), 0x10000);
281	281	}
r14976	r14977
349	349
350	350	READ16_MEMBER(galpani2_state::galpani2_bankedrom_r)
351	351	{
352		UINT16 *ROM = (UINT16 *) machine().region( "user1" )->base();
353		size_t    len = machine().region( "user1" )->bytes() / 2;
	352	UINT16 *ROM = (UINT16 *) memregion( "user1" )->base();
	353	size_t    len = memregion( "user1" )->bytes() / 2;
354	354
355	355	offset += (0x800000/2) * (*m_rombank & 0x0003);
356	356

src/mame/drivers/midqslvr.c

r14976	r14977
132	132	case 0x59: // PAM0
133	133	{
134	134	if (data & 0x10)      // enable RAM access to region 0xf0000 - 0xfffff
135		memory_set_bankptr(busdevice->machine(), "bios_bank", state->m_bios_ram);
	135	state->membank("bios_bank")->set_base(state->m_bios_ram);
136	136	else               // disable RAM access (reads go to BIOS ROM)
137		memory_set_bankptr(busdevice->machine(), "bios_bank", busdevice->machine().region("bios")->base() + 0x70000);
	137	state->membank("bios_bank")->set_base(state->memregion("bios")->base() + 0x70000);
138	138	break;
139	139	}
140	140	case 0x5a: // PAM1
141	141	{
142	142	if (data & 0x1)
143		memory_set_bankptr(busdevice->machine(), "video_bank1", state->m_isa_ram1);
	143	state->membank("video_bank1")->set_base(state->m_isa_ram1);
144	144	else
145		memory_set_bankptr(busdevice->machine(), "video_bank1", busdevice->machine().region("video_bios")->base() + 0);
	145	state->membank("video_bank1")->set_base(state->memregion("video_bios")->base() + 0);
146	146
147	147	if (data & 0x10)
148		memory_set_bankptr(busdevice->machine(), "video_bank2", state->m_isa_ram2);
	148	state->membank("video_bank2")->set_base(state->m_isa_ram2);
149	149	else
150		memory_set_bankptr(busdevice->machine(), "video_bank2", busdevice->machine().region("video_bios")->base() + 0x4000);
	150	state->membank("video_bank2")->set_base(state->memregion("video_bios")->base() + 0x4000);
151	151
152	152	break;
153	153	}
154	154	case 0x5e: // PAM5
155	155	{
156	156	if (data & 0x1)
157		memory_set_bankptr(busdevice->machine(), "bios_ext1", state->m_bios_ext1_ram);
	157	state->membank("bios_ext1")->set_base(state->m_bios_ext1_ram);
158	158	else
159		memory_set_bankptr(busdevice->machine(), "bios_ext1", busdevice->machine().region("bios")->base() + 0x60000);
	159	state->membank("bios_ext1")->set_base(state->memregion("bios")->base() + 0x60000);
160	160
161	161	if (data & 0x10)
162		memory_set_bankptr(busdevice->machine(), "bios_ext2", state->m_bios_ext2_ram);
	162	state->membank("bios_ext2")->set_base(state->m_bios_ext2_ram);
163	163	else
164		memory_set_bankptr(busdevice->machine(), "bios_ext2", busdevice->machine().region("bios")->base() + 0x64000);
	164	state->membank("bios_ext2")->set_base(state->memregion("bios")->base() + 0x64000);
165	165
166	166	break;
167	167	}
168	168	case 0x5f: // PAM6
169	169	{
170	170	if (data & 0x1)
171		memory_set_bankptr(busdevice->machine(), "bios_ext3", state->m_bios_ext3_ram);
	171	state->membank("bios_ext3")->set_base(state->m_bios_ext3_ram);
172	172	else
173		memory_set_bankptr(busdevice->machine(), "bios_ext3", busdevice->machine().region("bios")->base() + 0x68000);
	173	state->membank("bios_ext3")->set_base(state->memregion("bios")->base() + 0x68000);
174	174
175	175	if (data & 0x10)
176		memory_set_bankptr(busdevice->machine(), "bios_ext4", state->m_bios_ext4_ram);
	176	state->membank("bios_ext4")->set_base(state->m_bios_ext4_ram);
177	177	else
178		memory_set_bankptr(busdevice->machine(), "bios_ext4", busdevice->machine().region("bios")->base() + 0x6c000);
	178	state->membank("bios_ext4")->set_base(state->memregion("bios")->base() + 0x6c000);
179	179
180	180	break;
181	181	}
r14976	r14977
674	674
675	675	static MACHINE_RESET( midqslvr )
676	676	{
677		memory_set_bankptr(machine, "bios_bank", machine.region("bios")->base() + 0x70000);
678		memory_set_bankptr(machine, "bios_ext1", machine.region("bios")->base() + 0x60000);
679		memory_set_bankptr(machine, "bios_ext2", machine.region("bios")->base() + 0x64000);
680		memory_set_bankptr(machine, "bios_ext3", machine.region("bios")->base() + 0x68000);
681		memory_set_bankptr(machine, "bios_ext4", machine.region("bios")->base() + 0x6c000);
682		memory_set_bankptr(machine, "video_bank1", machine.region("video_bios")->base() + 0);
683		memory_set_bankptr(machine, "video_bank2", machine.region("video_bios")->base() + 0x4000);
	677	machine.root_device().membank("bios_bank")->set_base(machine.root_device().memregion("bios")->base() + 0x70000);
	678	machine.root_device().membank("bios_ext1")->set_base(machine.root_device().memregion("bios")->base() + 0x60000);
	679	machine.root_device().membank("bios_ext2")->set_base(machine.root_device().memregion("bios")->base() + 0x64000);
	680	machine.root_device().membank("bios_ext3")->set_base(machine.root_device().memregion("bios")->base() + 0x68000);
	681	machine.root_device().membank("bios_ext4")->set_base(machine.root_device().memregion("bios")->base() + 0x6c000);
	682	machine.root_device().membank("video_bank1")->set_base(machine.root_device().memregion("video_bios")->base() + 0);
	683	machine.root_device().membank("video_bank2")->set_base(machine.root_device().memregion("video_bios")->base() + 0x4000);
684	684	}
685	685
686	686

src/mame/drivers/seibuspi.c

r14976	r14977
979	979	if ((data & 7) != m_z80_lastbank)
980	980	{
981	981	m_z80_lastbank = (data & 7);
982		memory_set_bankptr(machine(), "bank4", m_z80_rom + (0x8000 * m_z80_lastbank));
	982	membank("bank4")->set_base(m_z80_rom + (0x8000 * m_z80_lastbank));
983	983	}
984	984	}
985	985
r14976	r14977
995	995
996	996	READ32_MEMBER(seibuspi_state::soundrom_r)
997	997	{
998		UINT8 *sound = (UINT8*)machine().region("user2")->base();
999		UINT16 *sound16 = (UINT16*)machine().region("user2")->base();
	998	UINT8 *sound = (UINT8*)machine().root_device().memregion("user2")->base();
	999	UINT16 *sound16 = (UINT16*)machine().root_device().memregion("user2")->base();
1000	1000
1001	1001	if (mem_mask == 0x000000ff)
1002	1002	{
r14976	r14977
1812	1812	{
1813	1813	seibuspi_state *state = machine.driver_data<seibuspi_state>();
1814	1814	int i;
1815		UINT8 *sound = machine.region("ymf")->base();
	1815	UINT8 *sound = machine.root_device().memregion("ymf")->base();
1816	1816
1817		UINT8 *rombase = machine.region("user1")->base();
	1817	UINT8 *rombase = state->memregion("user1")->base();
1818	1818	UINT8 flash_data = rombase[0x1ffffc];
1819	1819
1820	1820	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE );
r14976	r14977
1824	1824	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x00000688, 0x0000068b, write32_delegate(FUNC(seibuspi_state::z80_prg_fifo_w),state));
1825	1825	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x0000068c, 0x0000068f, write32_delegate(FUNC(seibuspi_state::z80_enable_w),state));
1826	1826
1827		memory_set_bankptr(machine, "bank4", state->m_z80_rom);
1828		memory_set_bankptr(machine, "bank5", state->m_z80_rom);
	1827	state->membank("bank4")->set_base(state->m_z80_rom);
	1828	state->membank("bank5")->set_base(state->m_z80_rom);
1829	1829
1830	1830	/* If the first value doesn't match, the game shows a checksum error */
1831	1831	/* If any of the other values are wrong, the game goes to update mode */
r14976	r14977
1897	1897	static MACHINE_RESET( sxx2f )
1898	1898	{
1899	1899	seibuspi_state *state = machine.driver_data<seibuspi_state>();
1900		UINT8 *rom = machine.region("soundcpu")->base();
	1900	UINT8 *rom = state->memregion("soundcpu")->base();
1901	1901
1902		memory_set_bankptr(machine, "bank4", state->m_z80_rom);
1903		memory_set_bankptr(machine, "bank5", state->m_z80_rom);
	1902	state->membank("bank4")->set_base(state->m_z80_rom);
	1903	state->membank("bank5")->set_base(state->m_z80_rom);
1904	1904
1905	1905	memcpy(state->m_z80_rom, rom, 0x40000);
1906	1906
r14976	r14977
2075	2075	state->m_flash[0] = machine.device<intel_e28f008sa_device>("flash0");
2076	2076	state->m_flash[1] = machine.device<intel_e28f008sa_device>("flash1");
2077	2077
2078		seibuspi_text_decrypt(machine.region("gfx1")->base());
2079		seibuspi_bg_decrypt(machine.region("gfx2")->base(), machine.region("gfx2")->bytes());
2080		seibuspi_sprite_decrypt(machine.region("gfx3")->base(), 0x400000);
	2078	seibuspi_text_decrypt(machine.root_device().memregion("gfx1")->base());
	2079	seibuspi_bg_decrypt(machine.root_device().memregion("gfx2")->base(), machine.root_device().memregion("gfx2")->bytes());
	2080	seibuspi_sprite_decrypt(state->memregion("gfx3")->base(), 0x400000);
2081	2081	}
2082	2082
2083	2083	static DRIVER_INIT( rdft )
r14976	r14977
2146	2146	state->m_flash[1] = machine.device<intel_e28f008sa_device>("flash1");
2147	2147
2148	2148	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x0282AC, 0x0282AF, read32_delegate(FUNC(seibuspi_state::rf2_speedup_r),state));
2149		seibuspi_rise10_text_decrypt(machine.region("gfx1")->base());
2150		seibuspi_rise10_bg_decrypt(machine.region("gfx2")->base(), machine.region("gfx2")->bytes());
2151		seibuspi_rise10_sprite_decrypt(machine.region("gfx3")->base(), 0x600000);
	2149	seibuspi_rise10_text_decrypt(machine.root_device().memregion("gfx1")->base());
	2150	seibuspi_rise10_bg_decrypt(machine.root_device().memregion("gfx2")->base(), machine.root_device().memregion("gfx2")->bytes());
	2151	seibuspi_rise10_sprite_decrypt(state->memregion("gfx3")->base(), 0x600000);
2152	2152
2153	2153	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x560, 0x563, write32_delegate(FUNC(seibuspi_state::sprite_dma_start_w),state));
2154	2154	}
r14976	r14977
2171	2171	state->m_flash[1] = machine.device<intel_e28f008sa_device>("flash1");
2172	2172
2173	2173	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x002894c, 0x002894f, read32_delegate(FUNC(seibuspi_state::rfjet_speedup_r),state));
2174		seibuspi_rise11_text_decrypt(machine.region("gfx1")->base());
2175		seibuspi_rise11_bg_decrypt(machine.region("gfx2")->base(), machine.region("gfx2")->bytes());
2176		seibuspi_rise11_sprite_decrypt_rfjet(machine.region("gfx3")->base(), 0x800000);
	2174	seibuspi_rise11_text_decrypt(machine.root_device().memregion("gfx1")->base());
	2175	seibuspi_rise11_bg_decrypt(machine.root_device().memregion("gfx2")->base(), machine.root_device().memregion("gfx2")->bytes());
	2176	seibuspi_rise11_sprite_decrypt_rfjet(state->memregion("gfx3")->base(), 0x800000);
2177	2177
2178	2178	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x560, 0x563, write32_delegate(FUNC(seibuspi_state::sprite_dma_start_w),state));
2179	2179	}
r14976	r14977
2237	2237	static DRIVER_INIT( sys386f2 )
2238	2238	{
2239	2239	int i, j;
2240		UINT16 *src = (UINT16 *)machine.region("gfx3")->base();
	2240	UINT16 *src = (UINT16 *)machine.root_device().memregion("gfx3")->base();
2241	2241	UINT16 tmp[0x40 / 2], Offset;
2242	2242
2243	2243	// sprite_reorder() only
2244		for(i = 0; i < machine.region("gfx3")->bytes() / 0x40; i++)
	2244	for(i = 0; i < machine.root_device().memregion("gfx3")->bytes() / 0x40; i++)
2245	2245	{
2246	2246	memcpy(tmp, src, 0x40);
2247	2247

src/mame/drivers/coolpool.c

r14976	r14977
534	534
535	535	READ16_MEMBER(coolpool_state::dsp_rom_r)
536	536	{
537		UINT8 *rom = machine().region("user2")->base();
	537	UINT8 *rom = memregion("user2")->base();
538	538
539		return rom[m_iop_romaddr & (machine().region("user2")->bytes() - 1)];
	539	return rom[m_iop_romaddr & (machine().root_device().memregion("user2")->bytes() - 1)];
540	540	}
541	541
542	542
r14976	r14977
1199	1199	UINT16 *rom;
1200	1200
1201	1201	/* decrypt the main program ROMs */
1202		rom = (UINT16 *)machine.region("user1")->base();
1203		len = machine.region("user1")->bytes();
	1202	rom = (UINT16 *)machine.root_device().memregion("user1")->base();
	1203	len = machine.root_device().memregion("user1")->bytes();
1204	1204	for (a = 0;a < len/2;a++)
1205	1205	{
1206	1206	int hi,lo,nhi,nlo;
r14976	r14977
1223	1223	}
1224	1224
1225	1225	/* decrypt the sub data ROMs */
1226		rom = (UINT16 *)machine.region("user2")->base();
1227		len = machine.region("user2")->bytes();
	1226	rom = (UINT16 *)machine.root_device().memregion("user2")->base();
	1227	len = machine.root_device().memregion("user2")->bytes();
1228	1228	for (a = 1;a < len/2;a+=4)
1229	1229	{
1230	1230	/* just swap bits 1 and 2 of the address */

src/mame/drivers/sauro.c

r14976	r14977
554	554	/* This game doesn't like all memory to be initialized to zero, it won't
555	555	initialize the high scores */
556	556
557		UINT8 *RAM = machine.region("maincpu")->base();
	557	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
558	558
559	559	memset(&RAM[0xe000], 0, 0x100);
560	560	RAM[0xe000] = 1;

src/mame/drivers/drmicro.c

r14976	r14977
45	45	static void pcm_w(device_t *device)
46	46	{
47	47	drmicro_state *state = device->machine().driver_data<drmicro_state>();
48		UINT8 *PCM = device->machine().region("adpcm")->base();
	48	UINT8 *PCM = state->memregion("adpcm")->base();
49	49
50	50	int data = PCM[state->m_pcm_adr / 2];
51	51

src/mame/drivers/astrafr.c

r14976	r14977
1963	1963
1964	1964	static DRIVER_INIT( astradec )
1965	1965	{
1966		astra_addresslines( (UINT16*)machine.region( "maincpu" )->base(), machine.region( "maincpu" )->bytes(), 0 );
	1966	astra_addresslines( (UINT16*)machine.root_device().memregion( "maincpu" )->base(), machine.root_device().memregion( "maincpu" )->bytes(), 0 );
1967	1967	}
1968	1968
1969	1969
1970	1970
1971	1971	static DRIVER_INIT( astradec_dual )
1972	1972	{
1973		astra_addresslines( (UINT16*)machine.region( "maincpu" )->base(), machine.region( "maincpu" )->bytes(), 0 );
1974		astra_addresslines( (UINT16*)machine.region( "slavecpu" )->base(), machine.region( "slavecpu" )->bytes(), 0 );
	1973	astra_addresslines( (UINT16*)machine.root_device().memregion( "maincpu" )->base(), machine.root_device().memregion( "maincpu" )->bytes(), 0 );
	1974	astra_addresslines( (UINT16*)machine.root_device().memregion( "slavecpu" )->base(), machine.root_device().memregion( "slavecpu" )->bytes(), 0 );
1975	1975	}
1976	1976
1977	1977	static DRIVER_INIT( astradec_sml )
1978	1978	{
1979		astra_addresslines( (UINT16*)machine.region( "maincpu" )->base(), machine.region( "maincpu" )->bytes(), 1 );
	1979	astra_addresslines( (UINT16*)machine.root_device().memregion( "maincpu" )->base(), machine.root_device().memregion( "maincpu" )->bytes(), 1 );
1980	1980	}
1981	1981
1982	1982	static DRIVER_INIT( astradec_sml_dual )
1983	1983	{
1984		astra_addresslines( (UINT16*)machine.region( "maincpu" )->base(), machine.region( "maincpu" )->bytes(), 1 );
1985		astra_addresslines( (UINT16*)machine.region( "slavecpu" )->base(), machine.region( "slavecpu" )->bytes(), 1 );
	1984	astra_addresslines( (UINT16*)machine.root_device().memregion( "maincpu" )->base(), machine.root_device().memregion( "maincpu" )->bytes(), 1 );
	1985	astra_addresslines( (UINT16*)machine.root_device().memregion( "slavecpu" )->base(), machine.root_device().memregion( "slavecpu" )->bytes(), 1 );
1986	1986	}
1987	1987
1988	1988	// Single games?

src/mame/drivers/system1.c

r14976	r14977
356	356	static MACHINE_START( system1 )
357	357	{
358	358	system1_state *state = machine.driver_data<system1_state>();
359		UINT32 numbanks = (machine.region("maincpu")->bytes() - 0x10000) / 0x4000;
	359	UINT32 numbanks = (machine.root_device().memregion("maincpu")->bytes() - 0x10000) / 0x4000;
360	360
361	361	if (numbanks > 0)
362		memory_configure_bank(machine, "bank1", 0, numbanks, machine.region("maincpu")->base() + 0x10000, 0x4000);
	362	state->membank("bank1")->configure_entries(0, numbanks, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
363	363	else
364		memory_configure_bank(machine, "bank1", 0, 1, machine.region("maincpu")->base() + 0x8000, 0);
365		memory_set_bank(machine, "bank1", 0);
	364	state->membank("bank1")->configure_entry(0, state->memregion("maincpu")->base() + 0x8000);
	365	state->membank("bank1")->set_entry(0);
366	366
367	367	z80_set_cycle_tables(machine.device("maincpu"), cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex);
368	368
r14976	r14977
400	400	static void bank44_custom_w(running_machine &machine, UINT8 data, UINT8 prevdata)
401	401	{
402	402	/* bank bits are bits 6 and 2 */
403		memory_set_bank(machine, "bank1", ((data & 0x40) >> 5) | ((data & 0x04) >> 2));
	403	machine.root_device().membank("bank1")->set_entry(((data & 0x40) >> 5) | ((data & 0x04) >> 2));
404	404	}
405	405
406	406
407	407	static void bank0c_custom_w(running_machine &machine, UINT8 data, UINT8 prevdata)
408	408	{
409	409	/* bank bits are bits 3 and 2 */
410		memory_set_bank(machine, "bank1", (data & 0x0c) >> 2);
	410	machine.root_device().membank("bank1")->set_entry((data & 0x0c) >> 2);
411	411	}
412	412
413	413
r14976	r14977
583	583	return machine().device<z80_device>("maincpu")->space(AS_PROGRAM)->read_byte(offset);
584	584
585	585	case 1:
586		return machine().region("maincpu")->base()[offset + 0x10000];
	586	return memregion("maincpu")->base()[offset + 0x10000];
587	587
588	588	case 2:
589	589	return machine().device<z80_device>("maincpu")->space(AS_IO)->read_byte(offset);
r14976	r14977
4651	4651
4652	4652	/* additionally to the usual protection, all the program ROMs have data lines */
4653	4653	/* D0 and D1 swapped. */
4654		rom = machine.region("maincpu")->base();
	4654	rom = machine.root_device().memregion("maincpu")->base();
4655	4655	for (A = 0;A < 0xc000;A++)
4656	4656	rom[A] = (rom[A] & 0xfc) | ((rom[A] & 1) << 1) | ((rom[A] & 2) >> 1);
4657	4657
4658	4658	/* the tile gfx ROMs are mangled as well: */
4659		rom = machine.region("tiles")->base();
	4659	rom = machine.root_device().memregion("tiles")->base();
4660	4660
4661	4661	/* the first ROM has data lines D0 and D6 swapped. */
4662	4662	for (A = 0x0000;A < 0x4000;A++)
r14976	r14977
4691	4691	READ8_MEMBER(system1_state::nob_start_r)
4692	4692	{
4693	4693	/* in reality, it's likely some M1-dependent behavior */
4694		return (cpu_get_pc(&space.device()) <= 0x0003) ? 0x80 : machine().region("maincpu")->base()[1];
	4694	return (cpu_get_pc(&space.device()) <= 0x0003) ? 0x80 : memregion("maincpu")->base()[1];
4695	4695	}
4696	4696
4697	4697	static DRIVER_INIT( nob )
r14976	r14977
4717	4717	/* Patch to get PRG ROMS ('T', 'R' and 'S) status as "GOOD" in the "test mode" */
4718	4718	/* not really needed */
4719	4719
4720		//  UINT8 *ROM = machine.region("maincpu")->base();
	4720	//  UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4721	4721
4722	4722	//  ROM[0x3296] = 0x18;     // 'jr' instead of 'jr z' - 'T' (PRG Main ROM)
4723	4723	//  ROM[0x32be] = 0x18;     // 'jr' instead of 'jr z' - 'R' (Banked ROM 1)
r14976	r14977
4730	4730
4731	4731	/* Patch to get sound in later levels(the program enters into a tight loop)*/
4732	4732	address_space *iospace = machine.device("maincpu")->memory().space(AS_IO);
4733		UINT8 *ROM2 = machine.region("soundcpu")->base();
	4733	UINT8 *ROM2 = machine.root_device().memregion("soundcpu")->base();
4734	4734
4735	4735	ROM2[0x02f9] = 0x28;//'jr z' instead of 'jr'
4736	4736
r14976	r14977
4747	4747	static DRIVER_INIT( bootleg )
4748	4748	{
4749	4749	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
4750		space->set_decrypted_region(0x0000, 0x7fff, machine.region("maincpu")->base() + 0x10000);
	4750	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x10000);
4751	4751	DRIVER_INIT_CALL(bank00);
4752	4752	}
4753	4753
r14976	r14977
4755	4755	static DRIVER_INIT( bootsys2 )
4756	4756	{
4757	4757	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
4758		space->set_decrypted_region(0x0000, 0x7fff, machine.region("maincpu")->base() + 0x20000);
4759		memory_configure_bank_decrypted(machine, "bank1", 0, 4, machine.region("maincpu")->base() + 0x30000, 0x4000);
	4758	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x20000);
	4759	machine.root_device().membank("bank1")->configure_decrypted_entries(0, 4, machine.root_device().memregion("maincpu")->base() + 0x30000, 0x4000);
4760	4760	DRIVER_INIT_CALL(bank0c);
4761	4761	}
4762	4762
4763	4763	static DRIVER_INIT( choplift )
4764	4764	{
4765		UINT8 *mcurom = machine.region("mcu")->base();
	4765	UINT8 *mcurom = machine.root_device().memregion("mcu")->base();
4766	4766
4767	4767	/* the ROM dump we have is bad; the following patches make it work */
4768	4768	mcurom[0x100] = 0x55;      /* D5 in current dump */

src/mame/drivers/quizo.c

r14976	r14977
51	51
52	52	static PALETTE_INIT(quizo)
53	53	{
54		const UINT8 *color_prom = machine.region("proms")->base();
	54	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
55	55	int i;
56	56	for (i = 0;i < 16;i++)
57	57	{
r14976	r14977
129	129	data=0;
130	130	}
131	131	m_port60=data;
132		memory_set_bankptr(machine(),  "bank1", &machine().region("user1")->base()[rombankLookup[data]*0x4000] );
	132	membank("bank1")->set_base(&machine().root_device().memregion("user1")->base()[rombankLookup[data]*0x4000] );
133	133	}
134	134
135	135	static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, quizo_state )

src/mame/drivers/niyanpai.c

r14976	r14977
55	55
56	56	static void niyanpai_soundbank_w(running_machine &machine, int data)
57	57	{
58		UINT8 *SNDROM = machine.region("audiocpu")->base();
	58	UINT8 *SNDROM = machine.root_device().memregion("audiocpu")->base();
59	59
60		memory_set_bankptr(machine, "bank1", &SNDROM[0x08000 + (0x8000 * (data & 0x03))]);
	60	machine.root_device().membank("bank1")->set_base(&SNDROM[0x08000 + (0x8000 * (data & 0x03))]);
61	61	}
62	62
63	63	READ8_MEMBER(niyanpai_state::niyanpai_sound_r)
r14976	r14977
266	266	static DRIVER_INIT( niyanpai )
267	267	{
268	268	niyanpai_state *state = machine.driver_data<niyanpai_state>();
269		UINT8 *SNDROM = machine.region("audiocpu")->base();
	269	UINT8 *SNDROM = state->memregion("audiocpu")->base();
270	270
271	271	// sound program patch
272	272	SNDROM[0x0213] = 0x00;         // DI -> NOP

src/mame/drivers/bfm_sc2.c

r14976	r14977
378	378	// init rom bank ////////////////////////////////////////////////////////
379	379
380	380	{
381		UINT8 *rom = machine.region("maincpu")->base();
	381	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
382	382
383		memory_configure_bank(machine, "bank1", 0, 4, &rom[0x00000], 0x02000);
	383	state->membank("bank1")->configure_entries(0, 4, &rom[0x00000], 0x02000);
384	384
385		memory_set_bank(machine, "bank1",3);
	385	state->membank("bank1")->set_entry(3);
386	386	}
387	387	}
388	388
r14976	r14977
476	476
477	477	WRITE8_MEMBER(bfm_sc2_state::bankswitch_w)
478	478	{
479		memory_set_bank(machine(), "bank1",data & 0x03);
	479	membank("bank1")->set_entry(data & 0x03);
480	480	}
481	481
482	482	///////////////////////////////////////////////////////////////////////////
r14976	r14977
2204	2204	bfm_sc2_state *state = machine.driver_data<bfm_sc2_state>();
2205	2205	UINT8 *pal;
2206	2206
2207		pal = machine.region("proms")->base();
	2207	pal = state->memregion("proms")->base();
2208	2208	if ( pal )
2209	2209	{
2210	2210	memcpy(state->m_key, pal, 8);

src/mame/drivers/tmmjprd.c

r14976	r14977
290	290	static SCREEN_UPDATE_IND16( tmmjprd_left )
291	291	{
292	292	tmmjprd_state *state = screen.machine().driver_data<tmmjprd_state>();
293		UINT8* gfxroms = screen.machine().region("gfx2")->base();
	293	UINT8* gfxroms = state->memregion("gfx2")->base();
294	294
295	295	bitmap.fill(get_black_pen(screen.machine()), cliprect);
296	296
r14976	r14977
325	325	static SCREEN_UPDATE_IND16( tmmjprd_right )
326	326	{
327	327	tmmjprd_state *state = screen.machine().driver_data<tmmjprd_state>();
328		UINT8* gfxroms = screen.machine().region("gfx2")->base();
	328	UINT8* gfxroms = state->memregion("gfx2")->base();
329	329
330	330	bitmap.fill(get_black_pen(screen.machine()), cliprect);
331	331
r14976	r14977
385	385	static void tmmjprd_do_blit(running_machine &machine)
386	386	{
387	387	tmmjprd_state *state = machine.driver_data<tmmjprd_state>();
388		UINT8 *blt_data = machine.region("gfx1")->base();
	388	UINT8 *blt_data = state->memregion("gfx1")->base();
389	389	int blt_source = (tmmjprd_blitterregs[0]&0x000fffff)>>0;
390	390	int blt_column = (tmmjprd_blitterregs[1]&0x00ff0000)>>16;
391	391	int blt_line   = (tmmjprd_blitterregs[1]&0x000000ff);

src/mame/drivers/suprnova.c

r14976	r14977
431	431	else
432	432	hit.disconnect= 0;
433	433
434		memory_set_bankptr(machine, "bank1",machine.region("user1")->base());
	434	state->membank("bank1")->set_base(state->memregion("user1")->base());
435	435	}
436	436
437	437
r14976	r14977
665	665
666	666	WRITE32_MEMBER(skns_state::skns_v3t_w)
667	667	{
668		UINT8 *btiles = machine().region("gfx3")->base();
	668	UINT8 *btiles = memregion("gfx3")->base();
669	669
670	670	COMBINE_DATA(&m_v3t_ram[offset]);
671	671

src/mame/drivers/witch.c

r14976	r14977
380	380
381	381	if(newbank != m_bank)
382	382	{
383		UINT8 *ROM = machine().region("maincpu")->base();
	383	UINT8 *ROM = memregion("maincpu")->base();
384	384	m_bank = newbank;
385	385	ROM = &ROM[0x10000+0x8000 * newbank + UNBANKED_SIZE];
386		memory_set_bankptr(machine(), "bank1",ROM);
	386	membank("bank1")->set_base(ROM);
387	387	}
388	388	}
389	389	break;
r14976	r14977
419	419	case 0x25e:
420	420	return offset;//enough to pass...
421	421	}
422		return machine().region("sub")->base()[0x7000+offset];
	422	return memregion("sub")->base()[0x7000+offset];
423	423	}
424	424
425	425	/*
r14976	r14977
870	870	static DRIVER_INIT(witch)
871	871	{
872	872	witch_state *state = machine.driver_data<witch_state>();
873		UINT8 *ROM = (UINT8 *)machine.region("maincpu")->base();
874		memory_set_bankptr(machine, "bank1", &ROM[0x10000+UNBANKED_SIZE]);
	873	UINT8 *ROM = (UINT8 *)state->memregion("maincpu")->base();
	874	state->membank("bank1")->set_base(&ROM[0x10000+UNBANKED_SIZE]);
875	875
876	876	machine.device("sub")->memory().space(AS_PROGRAM)->install_read_handler(0x7000, 0x700f, read8_delegate(FUNC(witch_state::prot_read_700x), state));
877	877	state->m_bank = -1;

src/mame/drivers/namcofl.c

r14976	r14977
187	187	{
188	188	if (data == 0)   // RAM at 00000000, ROM at 10000000
189	189	{
190		memory_set_bankptr(machine(),  "bank1", m_workram );
191		memory_set_bankptr(machine(),  "bank2", machine().region("maincpu")->base() );
	190	membank("bank1")->set_base(m_workram );
	191	membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() );
192	192	}
193	193	else      // ROM at 00000000, RAM at 10000000
194	194	{
195		memory_set_bankptr(machine(),  "bank1", machine().region("maincpu")->base() );
196		memory_set_bankptr(machine(),  "bank2", m_workram );
	195	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() );
	196	membank("bank2")->set_base(m_workram );
197	197	}
198	198	}
199	199	}
r14976	r14977
580	580	machine.scheduler().timer_set(machine.primary_screen->time_until_pos(machine.primary_screen->visible_area().max_y + 3), FUNC(network_interrupt_callback));
581	581	machine.scheduler().timer_set(machine.primary_screen->time_until_pos(machine.primary_screen->visible_area().max_y + 1), FUNC(vblank_interrupt_callback));
582	582
583		memory_set_bankptr(machine,  "bank1", machine.region("maincpu")->base() );
584		memory_set_bankptr(machine,  "bank2", state->m_workram );
	583	state->membank("bank1")->set_base(state->memregion("maincpu")->base() );
	584	state->membank("bank2")->set_base(state->m_workram );
585	585
586	586	memset(state->m_workram, 0x00, 0x100000);
587	587	}
r14976	r14977
811	811	namcofl_state *state = machine.driver_data<namcofl_state>();
812	812	state->m_workram = auto_alloc_array(machine, UINT32, 0x100000/4);
813	813
814		memory_set_bankptr(machine,  "bank1", machine.region("maincpu")->base() );
815		memory_set_bankptr(machine,  "bank2", state->m_workram );
	814	state->membank("bank1")->set_base(state->memregion("maincpu")->base() );
	815	state->membank("bank2")->set_base(state->m_workram );
816	816	}
817	817
818	818	static DRIVER_INIT(speedrcr)

src/mame/drivers/luckgrln.c

r14976	r14977
1026	1026	{
1027	1027	int i;
1028	1028	UINT8 x,v;
1029		UINT8* rom = machine.region("rom_data")->base();
	1029	UINT8* rom = machine.root_device().memregion("rom_data")->base();
1030	1030
1031	1031	for (i=0;i<0x20000;i++)
1032	1032	{
r14976	r14977
1053	1053	#endif
1054	1054
1055	1055	// ??
1056		//  memory_set_bankptr(machine, "bank1",&rom[0x010000]);
	1056	//  machine.root_device().membank("bank1")->set_base(&rom[0x010000]);
1057	1057	}
1058	1058
1059	1059

src/mame/drivers/dynax.c

r14976	r14977
266	266
267	267	WRITE8_MEMBER(dynax_state::dynax_rombank_w)
268	268	{
269		memory_set_bank(machine(), "bank1", data & 0x0f);
	269	membank("bank1")->set_entry(data & 0x0f);
270	270	}
271	271
272	272	WRITE8_MEMBER(dynax_state::jantouki_sound_rombank_w)
273	273	{
274		memory_set_bank(machine(), "bank2", data);
	274	membank("bank2")->set_entry(data);
275	275	}
276	276
277	277
278	278	WRITE8_MEMBER(dynax_state::hnoridur_rombank_w)
279	279	{
280		int bank_n = (machine().region("maincpu")->bytes() - 0x10000) / 0x8000;
	280	int bank_n = (machine().root_device().memregion("maincpu")->bytes() - 0x10000) / 0x8000;
281	281
282	282	//logerror("%04x: rom bank = %02x\n", cpu_get_pc(&space.device()), data);
283	283	if (data < bank_n)
284		memory_set_bank(machine(), "bank1", data);
	284	membank("bank1")->set_entry(data);
285	285	else
286	286	logerror("rom_bank = %02x (larger than the maximum bank %02x)\n", data, bank_n);
287	287	m_hnoridur_bank = data;
r14976	r14977
314	314	// hnoridur: R/W RAM
315	315	case 0x18:
316	316	{
317		UINT8 *RAM = machine().region("maincpu")->base() + 0x10000 + m_hnoridur_bank * 0x8000;
	317	UINT8 *RAM = memregion("maincpu")->base() + 0x10000 + m_hnoridur_bank * 0x8000;
318	318	RAM[offset] = data;
319	319	return;
320	320	}
r14976	r14977
749	749
750	750	WRITE8_MEMBER(dynax_state::yarunara_rombank_w)
751	751	{
752		int bank_n = (machine().region("maincpu")->bytes() - 0x10000) / 0x8000;
	752	int bank_n = (machine().root_device().memregion("maincpu")->bytes() - 0x10000) / 0x8000;
753	753
754	754	//logerror("%04x: rom bank = %02x\n", cpu_get_pc(&space.device()), data);
755	755	if (data < bank_n)
756		memory_set_bank(machine(), "bank1", data);
	756	membank("bank1")->set_entry(data);
757	757	else
758	758	logerror("rom_bank = %02x (larger than the maximum bank %02x)\n",data, bank_n);
759	759	m_hnoridur_bank = data;
r14976	r14977
969	969
970	970	WRITE8_MEMBER(dynax_state::jantouki_rombank_w)
971	971	{
972		memory_set_bank(machine(), "bank1", data & 0x0f);
	972	membank("bank1")->set_entry(data & 0x0f);
973	973	set_led_status(machine(), 0, data & 0x10);   // maybe
974	974	}
975	975
r14976	r14977
1190	1190	WRITE8_MEMBER(dynax_state::htengoku_rombank_w)
1191	1191	{
1192	1192
1193		memory_set_bank(machine(), "bank1", data & 0x07);
	1193	membank("bank1")->set_entry(data & 0x07);
1194	1194	m_hnoridur_bank = data;
1195	1195	}
1196	1196
r14976	r14977
1370	1370	static void tenkai_update_rombank( running_machine &machine )
1371	1371	{
1372	1372	dynax_state *state = machine.driver_data<dynax_state>();
1373		state->m_romptr = machine.region("maincpu")->base() + 0x10000 + 0x8000 * state->m_rombank;
	1373	state->m_romptr = state->memregion("maincpu")->base() + 0x10000 + 0x8000 * state->m_rombank;
1374	1374	//  logerror("rombank = %02x\n", state->m_rombank);
1375	1375	}
1376	1376
r14976	r14977
1569	1569	{
1570	1570	dynax_state *state = machine.driver_data<dynax_state>();
1571	1571	state->m_rombank = data;
1572		state->m_romptr = machine.region("maincpu")->base() + 0x8000 + state->m_rombank * 0x8000;
	1572	state->m_romptr = state->memregion("maincpu")->base() + 0x8000 + state->m_rombank * 0x8000;
1573	1573	}
1574	1574
1575	1575	WRITE8_MEMBER(dynax_state::gekisha_p4_w)
r14976	r14977
4239	4239
4240	4240	static MACHINE_START( hanamai )
4241	4241	{
4242		UINT8 *ROM = machine.region("maincpu")->base();
4243		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x8000], 0x8000);
	4242	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	4243	machine.root_device().membank("bank1")->configure_entries(0, 0x10, &ROM[0x8000], 0x8000);
4244	4244
4245	4245	MACHINE_START_CALL(dynax);
4246	4246	}
4247	4247
4248	4248	static MACHINE_START( hnoridur )
4249	4249	{
4250		UINT8 *ROM = machine.region("maincpu")->base();
4251		int bank_n = (machine.region("maincpu")->bytes() - 0x10000) / 0x8000;
	4250	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	4251	int bank_n = (machine.root_device().memregion("maincpu")->bytes() - 0x10000) / 0x8000;
4252	4252
4253		memory_configure_bank(machine, "bank1", 0, bank_n, &ROM[0x10000], 0x8000);
	4253	machine.root_device().membank("bank1")->configure_entries(0, bank_n, &ROM[0x10000], 0x8000);
4254	4254
4255	4255	MACHINE_START_CALL(dynax);
4256	4256	}
4257	4257
4258	4258	static MACHINE_START( htengoku )
4259	4259	{
4260		UINT8 *ROM = machine.region("maincpu")->base();
	4260	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4261	4261
4262		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x8000);
	4262	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x8000);
4263	4263
4264	4264	MACHINE_START_CALL(dynax);
4265	4265	}
r14976	r14977
4630	4630	static MACHINE_START( jantouki )
4631	4631	{
4632	4632	dynax_state *state = machine.driver_data<dynax_state>();
4633		UINT8 *MAIN = machine.region("maincpu")->base();
4634		UINT8 *SOUND = machine.region("soundcpu")->base();
	4633	UINT8 *MAIN = machine.root_device().memregion("maincpu")->base();
	4634	UINT8 *SOUND = state->memregion("soundcpu")->base();
4635	4635
4636		memory_configure_bank(machine, "bank1", 0, 0x10, &MAIN[0x8000],  0x8000);
4637		memory_configure_bank(machine, "bank2", 0, 12,   &SOUND[0x8000], 0x8000);
	4636	state->membank("bank1")->configure_entries(0, 0x10, &MAIN[0x8000],  0x8000);
	4637	state->membank("bank2")->configure_entries(0, 12,   &SOUND[0x8000], 0x8000);
4638	4638
4639	4639	state->m_top_scr = machine.device("top");
4640	4640	state->m_bot_scr = machine.device("bottom");
r14976	r14977
5361	5361	static DRIVER_INIT( blktouch )
5362	5362	{
5363	5363	// fearsome encryption ;-)
5364		UINT8   *src = (UINT8 *)machine.region("maincpu")->base();
	5364	UINT8   *src = (UINT8 *)machine.root_device().memregion("maincpu")->base();
5365	5365	int i;
5366	5366
5367	5367	for (i = 0; i < 0x90000; i++)
r14976	r14977
5370	5370
5371	5371	}
5372	5372
5373		src = (UINT8 *)machine.region("gfx1")->base();
	5373	src = (UINT8 *)machine.root_device().memregion("gfx1")->base();
5374	5374
5375	5375	for (i = 0; i < 0xc0000; i++)
5376	5376	{
r14976	r14977
5383	5383	{
5384	5384	/* Address lines scrambling on 1 z80 rom */
5385	5385	int i;
5386		UINT8   *gfx = (UINT8 *)machine.region("gfx1")->base();
5387		UINT8   *rom = machine.region("maincpu")->base() + 0x28000, *end = rom + 0x10000;
	5386	UINT8   *gfx = (UINT8 *)machine.root_device().memregion("gfx1")->base();
	5387	UINT8   *rom = machine.root_device().memregion("maincpu")->base() + 0x28000, *end = rom + 0x10000;
5388	5388	for ( ; rom < end; rom += 8)
5389	5389	{
5390	5390	UINT8 temp[8];
r14976	r14977
6101	6101	static DRIVER_INIT( mjelct3 )
6102	6102	{
6103	6103	int i;
6104		UINT8   *rom = machine.region("maincpu")->base();
6105		size_t  size = machine.region("maincpu")->bytes();
	6104	UINT8   *rom = machine.root_device().memregion("maincpu")->base();
	6105	size_t  size = machine.root_device().memregion("maincpu")->bytes();
6106	6106	UINT8   *rom1 = auto_alloc_array(machine, UINT8, size);
6107	6107
6108	6108	memcpy(rom1, rom, size);
r14976	r14977
6114	6114	static DRIVER_INIT( mjelct3a )
6115	6115	{
6116	6116	int i, j;
6117		UINT8   *rom = machine.region("maincpu")->base();
6118		size_t  size = machine.region("maincpu")->bytes();
	6117	UINT8   *rom = machine.root_device().memregion("maincpu")->base();
	6118	size_t  size = machine.root_device().memregion("maincpu")->bytes();
6119	6119	UINT8   *rom1 = auto_alloc_array(machine, UINT8, size);
6120	6120
6121	6121	memcpy(rom1, rom, size);

src/mame/drivers/sigmab98.c

r14976	r14977
347	347	if (data >= 0x18)
348	348	logerror("%s: unknown rom bank = %02x\n", machine().describe_context(), data);
349	349	else
350		memory_set_bank(machine(), "rombank", data);
	350	membank("rombank")->set_entry(data);
351	351	break;
352	352
353	353	default:
r14976	r14977
386	386	switch (data)
387	387	{
388	388	case 0x32:
389		memory_set_bank(machine(), "rambank", 0);
	389	membank("rambank")->set_entry(0);
390	390	break;
391	391	case 0x36:
392		memory_set_bank(machine(), "rambank", 1);
	392	membank("rambank")->set_entry(1);
393	393	break;
394	394	default:
395	395	logerror("%s: unknown ram bank = %02x\n", machine().describe_context(), data);
r14976	r14977
542	542	return;
543	543	}
544	544
545		UINT8 *rom = machine().region("maincpu")->base();
	545	UINT8 *rom = memregion("maincpu")->base();
546	546	switch ( m_reg )
547	547	{
548	548	case 0x0f:
549	549	m_rombank = data;
550	550	switch (data)
551	551	{
552		case 0x10:   memory_set_bankptr(machine(), "rombank", rom + 0x400 + 0x4000);   break;
553		case 0x14:   memory_set_bankptr(machine(), "rombank", rom + 0x400 + 0x8000);   break;
554		case 0x18:   memory_set_bankptr(machine(), "rombank", rom + 0x400 + 0xc000);   break;
	552	case 0x10:   membank("rombank")->set_base(rom + 0x400 + 0x4000);   break;
	553	case 0x14:   membank("rombank")->set_base(rom + 0x400 + 0x8000);   break;
	554	case 0x18:   membank("rombank")->set_base(rom + 0x400 + 0xc000);   break;
555	555	default:
556	556	logerror("%s: unknown rom bank = %02x, reg = %02x\n", machine().describe_context(), data, m_reg);
557	557	}
r14976	r14977
602	602	logerror("%s: unknown ram bank = %02x, reg2 = %02x\n", machine().describe_context(), data, m_reg2);
603	603	return;
604	604	}
605		memory_set_bank(machine(), "rambank", bank);
	605	membank("rambank")->set_entry(bank);
606	606	if ( (bank == 1) || (bank == 2) || (bank == 3) )
607		memory_set_bank(machine(), "sprbank", bank-1);
	607	membank("sprbank")->set_entry(bank-1);
608	608	break;
609	609
610	610	default:
r14976	r14977
898	898	case 0x1d:
899	899	case 0x1e:
900	900	case 0x1f:
901		return machine().region("maincpu")->base()[offset + 0xb400 + 0x1000 * (m_rombank-0x10)];
	901	return memregion("maincpu")->base()[offset + 0xb400 + 0x1000 * (m_rombank-0x10)];
902	902
903	903	case 0x65:   // SPRITERAM
904	904	if (offset < 0x1000)
r14976	r14977
1010	1010	return;
1011	1011	}
1012	1012
1013		UINT8 *rom = machine().region("maincpu")->base();
	1013	UINT8 *rom = memregion("maincpu")->base();
1014	1014	switch ( m_reg )
1015	1015	{
1016	1016	case 0x0d:
r14976	r14977
1018	1018	switch (data)
1019	1019	{
1020	1020	case 0x11:   // 3800 IS ROM
1021		memory_set_bankptr(machine(), "rombank0", rom + 0x4c00);
1022		memory_set_bankptr(machine(), "rombank1", rom + 0x5c00);
1023		memory_set_bankptr(machine(), "sprbank0", m_spriteram + 0x1000*4);   // scratch
1024		memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*4);   // scratch
	1021	membank("rombank0")->set_base(rom + 0x4c00);
	1022	membank("rombank1")->set_base(rom + 0x5c00);
	1023	membank("sprbank0")->set_base(m_spriteram + 0x1000*4);   // scratch
	1024	membank("sprbank1")->set_base(m_spriteram + 0x1000*4);   // scratch
1025	1025	break;
1026	1026
1027	1027	default:
r14976	r14977
1034	1034	switch (data)
1035	1035	{
1036	1036	case 0x14:   // 3800 IS ROM
1037		memory_set_bankptr(machine(), "rombank0", rom + 0x8000);
1038		memory_set_bankptr(machine(), "rombank1", rom + 0x9000);
1039		memory_set_bankptr(machine(), "sprbank0", m_spriteram + 0x1000*4);   // scratch
1040		memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*4);   // scratch
	1037	membank("rombank0")->set_base(rom + 0x8000);
	1038	membank("rombank1")->set_base(rom + 0x9000);
	1039	membank("sprbank0")->set_base(m_spriteram + 0x1000*4);   // scratch
	1040	membank("sprbank1")->set_base(m_spriteram + 0x1000*4);   // scratch
1041	1041	break;
1042	1042
1043	1043	default:
r14976	r14977
1050	1050	switch (data)
1051	1051	{
1052	1052	case 0x0f:   // 3800 IS ROM
1053		memory_set_bankptr(machine(), "rombank0", rom + 0x3400);
1054		memory_set_bankptr(machine(), "rombank1", rom + 0x4400);
1055		memory_set_bankptr(machine(), "sprbank0", m_spriteram + 0x1000*4);   // scratch
1056		memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*4);   // scratch
	1053	membank("rombank0")->set_base(rom + 0x3400);
	1054	membank("rombank1")->set_base(rom + 0x4400);
	1055	membank("sprbank0")->set_base(m_spriteram + 0x1000*4);   // scratch
	1056	membank("sprbank1")->set_base(m_spriteram + 0x1000*4);   // scratch
1057	1057	break;
1058	1058
1059	1059	case 0x12:   // 3800 IS ROM
1060		memory_set_bankptr(machine(), "rombank0", rom + 0x6400);
1061		memory_set_bankptr(machine(), "rombank1", rom + 0x7400);
1062		memory_set_bankptr(machine(), "sprbank0", m_spriteram + 0x1000*4);   // scratch
1063		memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*4);   // scratch
	1060	membank("rombank0")->set_base(rom + 0x6400);
	1061	membank("rombank1")->set_base(rom + 0x7400);
	1062	membank("sprbank0")->set_base(m_spriteram + 0x1000*4);   // scratch
	1063	membank("sprbank1")->set_base(m_spriteram + 0x1000*4);   // scratch
1064	1064	break;
1065	1065
1066	1066	// used in test mode:
1067		//              case 0x5c:  memory_set_bankptr(machine(), "rombank", rom + 0x400 + 0x0000);    break;  // 3800 IS RAM! (8000 bytes)
	1067	//              case 0x5c:  membank("rombank")->set_base(rom + 0x400 + 0x0000);    break;  // 3800 IS RAM! (8000 bytes)
1068	1068
1069	1069	case 0x5e:   // 3800 IS RAM! (1404 bytes)
1070		memory_set_bankptr(machine(), "rombank0", m_spriteram + 0x1000*1);
1071		memory_set_bankptr(machine(), "sprbank0", m_spriteram + 0x1000*1);
1072		memory_set_bankptr(machine(), "rombank1", m_spriteram + 0x1000*2);
1073		memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*2);
	1070	membank("rombank0")->set_base(m_spriteram + 0x1000*1);
	1071	membank("sprbank0")->set_base(m_spriteram + 0x1000*1);
	1072	membank("rombank1")->set_base(m_spriteram + 0x1000*2);
	1073	membank("sprbank1")->set_base(m_spriteram + 0x1000*2);
1074	1074	break;
1075	1075
1076	1076	case 0x6c:   // 3800 IS RAM! (1000 bytes) - SPRITERAM
1077		memory_set_bankptr(machine(), "rombank0", m_spriteram);
1078		memory_set_bankptr(machine(), "sprbank0", m_spriteram);
1079		//                  memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*4);    // scratch
	1077	membank("rombank0")->set_base(m_spriteram);
	1078	membank("sprbank0")->set_base(m_spriteram);
	1079	//                  membank("sprbank1")->set_base(m_spriteram + 0x1000*4);    // scratch
1080	1080	break;
1081	1081
1082	1082	default:
r14976	r14977
1089	1089	switch (data)
1090	1090	{
1091	1091	case 0x14:   // 3800 IS ROM
1092		memory_set_bankptr(machine(), "rombank0", rom + 0x8800);
1093		memory_set_bankptr(machine(), "rombank1", rom + 0x9800);
1094		memory_set_bankptr(machine(), "sprbank0", m_spriteram + 0x1000*4);   // scratch
1095		memory_set_bankptr(machine(), "sprbank1", m_spriteram + 0x1000*4);   // scratch
	1092	membank("rombank0")->set_base(rom + 0x8800);
	1093	membank("rombank1")->set_base(rom + 0x9800);
	1094	membank("sprbank0")->set_base(m_spriteram + 0x1000*4);   // scratch
	1095	membank("sprbank1")->set_base(m_spriteram + 0x1000*4);   // scratch
1096	1096	break;
1097	1097
1098	1098	default:
r14976	r14977
1139	1139	m_rambank = data;
1140	1140	switch (data)
1141	1141	{
1142		case 0x52:   memory_set_bankptr(machine(), "palbank", m_nvram);                           break;
1143		case 0x64:   memory_set_bankptr(machine(), "palbank", m_generic_paletteram_8);   break;
	1142	case 0x52:   membank("palbank")->set_base(m_nvram);                           break;
	1143	case 0x64:   membank("palbank")->set_base(m_generic_paletteram_8);   break;
1144	1144	default:
1145	1145	logerror("%s: unknown ram bank = %02x, reg2 = %02x\n", machine().describe_context(), data, m_reg2);
1146	1146	return;
r14976	r14977
1374	1374	case 0x1d:
1375	1375	case 0x1e:
1376	1376	case 0x1f:
1377		return machine().region("maincpu")->base()[offset + 0xc400 + 0x1000 * (m_rombank-0x10)];
	1377	return memregion("maincpu")->base()[offset + 0xc400 + 0x1000 * (m_rombank-0x10)];
1378	1378
1379	1379	case 0x64:   // SPRITERAM
1380	1380	if (offset < 0x1000)
r14976	r14977
1897	1897
1898	1898	static DRIVER_INIT( gegege )
1899	1899	{
1900		UINT8 *rom = machine.region("maincpu")->base();
	1900	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1901	1901
1902	1902	// Protection?
1903	1903	rom[0x0bdd] = 0xc9;
r14976	r14977
1915	1915	rom[0x8165] = 0x00;
1916	1916
1917	1917	// ROM banks
1918		memory_configure_bank(machine, "rombank", 0, 0x18, rom + 0x8000, 0x1000);
1919		memory_set_bank(machine, "rombank", 0);
	1918	machine.root_device().membank("rombank")->configure_entries(0, 0x18, rom + 0x8000, 0x1000);
	1919	machine.root_device().membank("rombank")->set_entry(0);
1920	1920
1921	1921	// RAM banks
1922	1922	UINT8 *bankedram = auto_alloc_array(machine, UINT8, 0x800 * 2);
1923	1923
1924		memory_configure_bank(machine, "rambank", 0, 2, bankedram, 0x800);
1925		memory_set_bank(machine, "rambank", 0);
	1924	machine.root_device().membank("rambank")->configure_entries(0, 2, bankedram, 0x800);
	1925	machine.root_device().membank("rambank")->set_entry(0);
1926	1926	}
1927	1927
1928	1928
r14976	r14977
1946	1946
1947	1947	static DRIVER_INIT( pepsiman )
1948	1948	{
1949		UINT8 *rom = machine.region("maincpu")->base();
	1949	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1950	1950
1951	1951	// Protection?
1952	1952	rom[0x058a] = 0xc9;
r14976	r14977
1964	1964	rom[0x8165] = 0x00;
1965	1965
1966	1966	// ROM banks
1967		memory_configure_bank(machine, "rombank", 0, 0x18, rom + 0x8000, 0x1000);
1968		memory_set_bank(machine, "rombank", 0);
	1967	machine.root_device().membank("rombank")->configure_entries(0, 0x18, rom + 0x8000, 0x1000);
	1968	machine.root_device().membank("rombank")->set_entry(0);
1969	1969
1970	1970	// RAM banks
1971	1971	UINT8 *bankedram = auto_alloc_array(machine, UINT8, 0x800 * 2);
1972	1972
1973		memory_configure_bank(machine, "rambank", 0, 2, bankedram, 0x800);
1974		memory_set_bank(machine, "rambank", 0);
	1973	machine.root_device().membank("rambank")->configure_entries(0, 2, bankedram, 0x800);
	1974	machine.root_device().membank("rambank")->set_entry(0);
1975	1975	}
1976	1976
1977	1977
r14976	r14977
1997	1997
1998	1998	static DRIVER_INIT( ucytokyu )
1999	1999	{
2000		UINT8 *rom = machine.region("maincpu")->base();
	2000	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2001	2001
2002	2002	// Protection?
2003	2003	rom[0x0bfa] = 0xc9;
r14976	r14977
2015	2015	rom[0x8165] = 0x00;
2016	2016
2017	2017	// ROM banks
2018		memory_configure_bank(machine, "rombank", 0, 0x18, rom + 0x8000, 0x1000);
2019		memory_set_bank(machine, "rombank", 0);
	2018	machine.root_device().membank("rombank")->configure_entries(0, 0x18, rom + 0x8000, 0x1000);
	2019	machine.root_device().membank("rombank")->set_entry(0);
2020	2020
2021	2021	// RAM banks
2022	2022	UINT8 *bankedram = auto_alloc_array(machine, UINT8, 0x800 * 2);
2023	2023
2024		memory_configure_bank(machine, "rambank", 0, 2, bankedram, 0x800);
2025		memory_set_bank(machine, "rambank", 0);
	2024	machine.root_device().membank("rambank")->configure_entries(0, 2, bankedram, 0x800);
	2025	machine.root_device().membank("rambank")->set_entry(0);
2026	2026	}
2027	2027
2028	2028
r14976	r14977
2110	2110	sigmab98_state *state = machine.driver_data<sigmab98_state>();
2111	2111	// RAM banks
2112	2112	UINT8 *bankedram = auto_alloc_array(machine, UINT8, 0x1000 * 5);
2113		memory_configure_bank(machine, "rambank", 0, 1, state->m_nvram,     0x1000);
2114		memory_configure_bank(machine, "rambank", 1, 4, bankedram, 0x1000);
2115		memory_set_bank(machine, "rambank", 0);
	2113	state->membank("rambank")->configure_entry(0, state->m_nvram);
	2114	state->membank("rambank")->configure_entries(1, 4, bankedram, 0x1000);
	2115	state->membank("rambank")->set_entry(0);
2116	2116
2117	2117	state->m_spriteram.allocate(0x1000 * 5);
2118	2118	memset(state->m_spriteram, 0, 0x1000 * 5);
2119		memory_configure_bank(machine, "sprbank", 0, 5, state->m_spriteram, 0x1000);
2120		memory_set_bank(machine, "sprbank", 0);
	2119	state->membank("sprbank")->configure_entries(0, 5, state->m_spriteram, 0x1000);
	2120	state->membank("sprbank")->set_entry(0);
2121	2121
2122	2122	state->m_vblank_vector = 0x00; // increment counter
2123	2123	state->m_timer0_vector = 0x1c; // read hopper state
r14976	r14977
2150	2150	{
2151	2151	sigmab98_state *state = machine.driver_data<sigmab98_state>();
2152	2152	// ROM banks
2153		UINT8 *rom = machine.region("maincpu")->base();
2154		memory_set_bankptr(machine, "rombank0", rom + 0x3400);
2155		memory_set_bankptr(machine, "rombank1", rom + 0x4400);
	2153	UINT8 *rom = state->memregion("maincpu")->base();
	2154	state->membank("rombank0")->set_base(rom + 0x3400);
	2155	state->membank("rombank1")->set_base(rom + 0x4400);
2156	2156	state->m_rombank = 0x0f;
2157	2157
2158	2158	// RAM banks
2159	2159	state->m_generic_paletteram_8.allocate(0x3000);
2160	2160	memset(state->m_generic_paletteram_8, 0, 0x3000);
2161		memory_set_bankptr(machine, "palbank", state->m_generic_paletteram_8);
	2161	state->membank("palbank")->set_base(state->m_generic_paletteram_8);
2162	2162	state->m_rambank = 0x64;
2163	2163
2164	2164	state->m_spriteram.allocate(0x1000 * 5);
2165	2165	memset(state->m_spriteram, 0, 0x1000 * 5);
2166		memory_set_bankptr(machine, "sprbank0",  state->m_spriteram + 0x1000*4);   // scratch
2167		memory_set_bankptr(machine, "sprbank1",  state->m_spriteram + 0x1000*4);   // scratch
	2166	state->membank("sprbank0")->set_base(state->m_spriteram + 0x1000*4);   // scratch
	2167	state->membank("sprbank1")->set_base(state->m_spriteram + 0x1000*4);   // scratch
2168	2168
2169	2169	state->m_vblank_vector = 0x00;
2170	2170	state->m_timer0_vector = 0x02;

src/mame/drivers/shootout.c

r14976	r14977
43	43
44	44	WRITE8_MEMBER(shootout_state::shootout_bankswitch_w)
45	45	{
46		memory_set_bank(machine(), "bank1", data & 0x0f);
	46	membank("bank1")->set_entry(data & 0x0f);
47	47	}
48	48
49	49	WRITE8_MEMBER(shootout_state::sound_cpu_command_w)
r14976	r14977
409	409	static DRIVER_INIT( shootout )
410	410	{
411	411	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
412		int length = machine.region("maincpu")->bytes();
	412	int length = machine.root_device().memregion("maincpu")->bytes();
413	413	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length - 0x8000);
414		UINT8 *rom = machine.region("maincpu")->base();
	414	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
415	415	int A;
416	416
417	417	space->set_decrypted_region(0x8000, 0xffff, decrypt);
r14976	r14977
419	419	for (A = 0x8000;A < length;A++)
420	420	decrypt[A-0x8000] = (rom[A] & 0x9f) | ((rom[A] & 0x40) >> 1) | ((rom[A] & 0x20) << 1);
421	421
422		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
423		memory_configure_bank_decrypted(machine, "bank1", 0, 16, decrypt + 0x8000, 0x4000);
	422	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
	423	machine.root_device().membank("bank1")->configure_decrypted_entries(0, 16, decrypt + 0x8000, 0x4000);
424	424	}
425	425
426	426	static DRIVER_INIT( shootouj )
427	427	{
428		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x4000);
	428	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
429	429	}
430	430
431	431

src/mame/drivers/itech32.c

r14976	r14977
625	625
626	626	WRITE8_MEMBER(itech32_state::sound_bank_w)
627	627	{
628		memory_set_bankptr(machine(), "bank1", &machine().region("soundcpu")->base()[0x10000 + data * 0x4000]);
	628	membank("bank1")->set_base(&machine().root_device().memregion("soundcpu")->base()[0x10000 + data * 0x4000]);
629	629	}
630	630
631	631

src/mame/drivers/mexico86.c

r14976	r14977
421	421	static MACHINE_START( mexico86 )
422	422	{
423	423	mexico86_state *state = machine.driver_data<mexico86_state>();
424		UINT8 *ROM = machine.region("maincpu")->base();
	424	UINT8 *ROM = state->memregion("maincpu")->base();
425	425
426		memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
	426	state->membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x4000);
427	427
428	428	state->m_maincpu = machine.device("maincpu");
429	429	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/calchase.c

r14976	r14977
339	339	//if (data & 0x10)     // enable RAM access to region 0xf0000 - 0xfffff
340	340	if ((data & 0x50) | (data & 0xA0))
341	341	{
342		memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
	342	state->membank("bank1")->set_base(state->m_bios_ram);
343	343	}
344	344	else            // disable RAM access (reads go to BIOS ROM)
345	345	{
r14976	r14977
352	352	}
353	353	#endif
354	354
355		//memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base() + 0x10000);
356		memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base());
	355	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("bios")->base() + 0x10000);
	356	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("bios")->base());
357	357	}
358	358	break;
359	359	}
r14976	r14977
865	865
866	866	static MACHINE_RESET(calchase)
867	867	{
868		//memory_set_bankptr(machine, "bank1", machine.region("bios")->base() + 0x10000);
869		memory_set_bankptr(machine, "bank1", machine.region("bios")->base());
	868	//machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base() + 0x10000);
	869	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base());
870	870	}
871	871
872	872	static void set_gate_a20(running_machine &machine, int a20)

src/mame/drivers/chaknpop.c

r14976	r14977
346	346	static MACHINE_START( chaknpop )
347	347	{
348	348	chaknpop_state *state = machine.driver_data<chaknpop_state>();
349		UINT8 *ROM = machine.region("maincpu")->base();
	349	UINT8 *ROM = state->memregion("maincpu")->base();
350	350
351		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x4000);
	351	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
352	352
353	353	state->save_item(NAME(state->m_gfxmode));
354	354	state->save_item(NAME(state->m_flip_x));

src/mame/drivers/ashnojoe.c

r14976	r14977
287	287
288	288	static WRITE8_DEVICE_HANDLER( ym2203_write_b )
289	289	{
290		memory_set_bank(device->machine(), "bank4", data & 0x0f);
	290	device->machine().root_device().membank("bank4")->set_entry(data & 0x0f);
291	291	}
292	292
293	293	static const ym2203_interface ym2203_config =
r14976	r14977
462	462
463	463	static DRIVER_INIT( ashnojoe )
464	464	{
465		UINT8 *ROM = machine.region("adpcm")->base();
466		memory_configure_bank(machine, "bank4", 0, 16, &ROM[0x00000], 0x8000);
	465	UINT8 *ROM = machine.root_device().memregion("adpcm")->base();
	466	machine.root_device().membank("bank4")->configure_entries(0, 16, &ROM[0x00000], 0x8000);
467	467
468		memory_set_bank(machine, "bank4", 0);
	468	machine.root_device().membank("bank4")->set_entry(0);
469	469	}
470	470
471	471	GAME( 1990, scessjoe, 0,        ashnojoe, ashnojoe, ashnojoe, ROT0, "Wave / Taito Corporation", "Success Joe (World)",   GAME_SUPPORTS_SAVE )

src/mame/drivers/mouser.c

r14976	r14977
295	295
296	296	offs_t i;
297	297	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
298		UINT8 *rom = machine.region("maincpu")->base();
	298	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
299	299	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x6000);
300		UINT8 *table = machine.region("user1")->base();
	300	UINT8 *table = machine.root_device().memregion("user1")->base();
301	301
302	302	space->set_decrypted_region(0x0000, 0x5fff, decrypted);
303	303

src/mame/drivers/undrfire.c

r14976	r14977
970	970	static DRIVER_INIT( undrfire )
971	971	{
972	972	UINT32 offset,i;
973		UINT8 *gfx = machine.region("gfx3")->base();
974		int size=machine.region("gfx3")->bytes();
	973	UINT8 *gfx = machine.root_device().memregion("gfx3")->base();
	974	int size=machine.root_device().memregion("gfx3")->bytes();
975	975	int data;
976	976
977	977	/* make piv tile GFX format suitable for gfxdecode */
r14976	r14977
999	999	static DRIVER_INIT( cbombers )
1000	1000	{
1001	1001	UINT32 offset,i;
1002		UINT8 *gfx = machine.region("gfx3")->base();
1003		int size=machine.region("gfx3")->bytes();
	1002	UINT8 *gfx = machine.root_device().memregion("gfx3")->base();
	1003	int size=machine.root_device().memregion("gfx3")->bytes();
1004	1004	int data;
1005	1005
1006	1006

src/mame/drivers/lkage.c

r14976	r14977
159	159
160	160	READ8_MEMBER(lkage_state::port_fetch_r)
161	161	{
162		return machine().region("user1")->base()[offset];
	162	return memregion("user1")->base()[offset];
163	163	}
164	164
165	165	static ADDRESS_MAP_START( lkage_io_map, AS_IO, 8, lkage_state )

src/mame/drivers/gaiden.c

r14976	r14977
1519	1519	static void descramble_drgnbowl_gfx(running_machine &machine)
1520	1520	{
1521	1521	int i;
1522		UINT8 *ROM = machine.region("maincpu")->base();
1523		size_t size = machine.region("maincpu")->bytes();
	1522	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	1523	size_t size = machine.root_device().memregion("maincpu")->bytes();
1524	1524	UINT8 *buffer = auto_alloc_array(machine, UINT8, size);
1525	1525
1526	1526	memcpy(buffer, ROM, size);
r14976	r14977
1536	1536
1537	1537	auto_free(machine, buffer);
1538	1538
1539		ROM = machine.region("gfx2")->base();
1540		size = machine.region("gfx2")->bytes();
	1539	ROM = machine.root_device().memregion("gfx2")->base();
	1540	size = machine.root_device().memregion("gfx2")->bytes();
1541	1541	buffer = auto_alloc_array(machine, UINT8, size);
1542	1542
1543	1543	memcpy(buffer,ROM,size);
r14976	r14977
1607	1607	static DRIVER_INIT(mastninj)
1608	1608	{
1609	1609	// rearrange the graphic roms into a format that MAME can decode
1610		descramble_mastninj_gfx(machine, machine.region("gfx2")->base());
1611		descramble_mastninj_gfx(machine, machine.region("gfx3")->base());
	1610	descramble_mastninj_gfx(machine, machine.root_device().memregion("gfx2")->base());
	1611	descramble_mastninj_gfx(machine, machine.root_device().memregion("gfx3")->base());
1612	1612	DRIVER_INIT_CALL(shadoww);
1613	1613	}
1614	1614

src/mame/drivers/aleck64.c

r14976	r14977
837	837
838	838	static DRIVER_INIT( aleck64 )
839	839	{
840		UINT8 *rom = machine.region("user2")->base();
	840	UINT8 *rom = machine.root_device().memregion("user2")->base();
841	841
842	842	rom[0x67c] = 0;
843	843	rom[0x67d] = 0;

src/mame/drivers/quizshow.c

r14976	r14977
425	425
426	426	static DRIVER_INIT( quizshow )
427	427	{
428		UINT8 *gfxdata = machine.region("user1")->base();
429		UINT8 *dest = machine.region("gfx1")->base();
	428	UINT8 *gfxdata = machine.root_device().memregion("user1")->base();
	429	UINT8 *dest = machine.root_device().memregion("gfx1")->base();
430	430
431	431	int tile, line;
432	432

src/mame/drivers/trackfld.c

r14976	r14977
211	211	{
212	212	if((data & 1 << i) == 0) // check first bit active low, change ROM bank according to the correlated bit
213	213	{
214		memory_set_bank(machine(), "bank1", i);
	214	membank("bank1")->set_entry(i);
215	215	return;
216	216	}
217	217	}
r14976	r14977
1424	1424	static DRIVER_INIT( atlantol )
1425	1425	{
1426	1426	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1427		UINT8 *rom = machine.region("maincpu")->base();
	1427	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1428	1428	UINT8 *decrypt;
1429	1429	int A;
1430	1430
r14976	r14977
1446	1446	space->install_read_bank(0x1380, 0x17ff, "bank11");
1447	1447	space->install_read_bank(0x2000, 0x27ff, "bank12");
1448	1448	space->install_read_bank(0x4000, 0x5fff, "bank13");
1449		memory_set_bankptr(machine, "bank10", &rom[0x0000]);
1450		memory_set_bankptr(machine, "bank11", &rom[0x1380]);
1451		memory_set_bankptr(machine, "bank12", &rom[0x2000]);
1452		memory_set_bankptr(machine, "bank13", &rom[0x4000]);
	1449	state->membank("bank10")->set_base(&rom[0x0000]);
	1450	state->membank("bank11")->set_base(&rom[0x1380]);
	1451	state->membank("bank12")->set_base(&rom[0x2000]);
	1452	state->membank("bank13")->set_base(&rom[0x4000]);
1453	1453	}
1454	1454
1455	1455	static DRIVER_INIT( mastkin )
1456	1456	{
1457		UINT8 *prom = machine.region("proms")->base();
	1457	UINT8 *prom = machine.root_device().memregion("proms")->base();
1458	1458	int i;
1459	1459
1460	1460	/* build a fake palette so the screen won't be all black */
r14976	r14977
1475	1475
1476	1476	static DRIVER_INIT( wizzquiz )
1477	1477	{
1478		UINT8 *ROM = machine.region("maincpu")->base() + 0xe000;
	1478	UINT8 *ROM = machine.root_device().memregion("maincpu")->base() + 0xe000;
1479	1479	int i;
1480	1480
1481	1481	/* decrypt program rom */
1482	1482	for (i = 0; i < 0x2000; i++)
1483	1483	ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7);
1484	1484
1485		ROM = machine.region("user1")->base();
	1485	ROM = machine.root_device().memregion("user1")->base();
1486	1486
1487	1487	/* decrypt questions roms */
1488	1488	for (i = 0; i < 0x40000; i++)
1489	1489	ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7);
1490	1490
1491		memory_configure_bank(machine, "bank1", 0, 8, ROM, 0x8000);
	1491	machine.root_device().membank("bank1")->configure_entries(0, 8, ROM, 0x8000);
1492	1492	}
1493	1493
1494	1494

src/mame/drivers/astrof.c

r14976	r14977
205	205	offs_t i;
206	206	UINT8 bank = (state->m_astrof_palette_bank ? 0x10 : 0x00);
207	207	UINT8 config = input_port_read_safe(machine, "FAKE", 0x00);
208		UINT8 *prom = machine.region("proms")->base();
	208	UINT8 *prom = state->memregion("proms")->base();
209	209
210	210	/* a common wire hack to the pcb causes the prom halves to be inverted */
211	211	/* this results in e.g. astrof background being black */
r14976	r14977
239	239	static void tomahawk_get_pens( running_machine &machine, pen_t *pens )
240	240	{
241	241	offs_t i;
242		UINT8 *prom = machine.region("proms")->base();
	242	UINT8 *prom = machine.root_device().memregion("proms")->base();
243	243	UINT8 config = input_port_read_safe(machine, "FAKE", 0x00);
244	244
245	245	for (i = 0; i < TOMAHAWK_NUM_PENS; i++)
r14976	r14977
1289	1289	static DRIVER_INIT( abattle )
1290	1290	{
1291	1291	/* use the protection PROM to decrypt the ROMs */
1292		UINT8 *rom = machine.region("maincpu")->base();
1293		UINT8 *prom = machine.region("user1")->base();
	1292	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	1293	UINT8 *prom = machine.root_device().memregion("user1")->base();
1294	1294	int i;
1295	1295
1296	1296	for(i = 0xd000; i < 0x10000; i++)
r14976	r14977
1305	1305
1306	1306	static DRIVER_INIT( afire )
1307	1307	{
1308		UINT8 *rom = machine.region("maincpu")->base();
	1308	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1309	1309	int i;
1310	1310
1311	1311	for(i = 0xd000; i < 0x10000; i++)
r14976	r14977
1320	1320
1321	1321	static DRIVER_INIT( sstarbtl )
1322	1322	{
1323		UINT8 *rom = machine.region("maincpu")->base();
	1323	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1324	1324	int i;
1325	1325
1326	1326	for(i = 0xd000; i < 0x10000; i++)

src/mame/drivers/tecmo.c

r14976	r14977
55	55	WRITE8_MEMBER(tecmo_state::tecmo_bankswitch_w)
56	56	{
57	57	int bankaddress;
58		UINT8 *RAM = machine().region("maincpu")->base();
	58	UINT8 *RAM = memregion("maincpu")->base();
59	59
60	60
61	61	bankaddress = 0x10000 + ((data & 0xf8) << 8);
62		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress]);
	62	membank("bank1")->set_base(&RAM[bankaddress]);
63	63	}
64	64
65	65	WRITE8_MEMBER(tecmo_state::tecmo_sound_command_w)
r14976	r14977
86	86	{
87	87	tecmo_state *state = device->machine().driver_data<tecmo_state>();
88	88	if (state->m_adpcm_pos >= state->m_adpcm_end ||
89		state->m_adpcm_pos >= device->machine().region("adpcm")->bytes())
	89	state->m_adpcm_pos >= state->memregion("adpcm")->bytes())
90	90	msm5205_reset_w(device,1);
91	91	else if (state->m_adpcm_data != -1)
92	92	{
r14976	r14977
95	95	}
96	96	else
97	97	{
98		UINT8 *ROM = device->machine().region("adpcm")->base();
	98	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base();
99	99
100	100	state->m_adpcm_data = ROM[state->m_adpcm_pos++];
101	101	msm5205_data_w(device,state->m_adpcm_data >> 4);

src/mame/drivers/magictg.c

r14976	r14977
229	229
230	230	void magictg_state::machine_reset()
231	231	{
232		UINT8 *adsp_boot = (UINT8*)machine().region("adsp")->base();
	232	UINT8 *adsp_boot = (UINT8*)machine().root_device().memregion("adsp")->base();
233	233
234	234	zr36120_reset();
235	235
r14976	r14977
752	752	if (data > 0)
753	753	{
754	754	address_space* addr_space;
755		UINT8* adsp_rom = (UINT8*)space.machine().region("adsp")->base();
	755	UINT8* adsp_rom = (UINT8*)space.machine().root_device().memregion("adsp")->base();
756	756
757	757	UINT32 page = (m_adsp_regs.bdma_control >> 8) & 0xff;
758	758	UINT32 dir = (m_adsp_regs.bdma_control >> 2) & 1;

src/mame/drivers/xtom3d.c

r14976	r14977
145	145	case 0x59: // PAM0
146	146	{
147	147	if (data & 0x10)      // enable RAM access to region 0xf0000 - 0xfffff
148		memory_set_bankptr(busdevice->machine(), "bios_bank", state->m_bios_ram);
	148	state->membank("bios_bank")->set_base(state->m_bios_ram);
149	149	else               // disable RAM access (reads go to BIOS ROM)
150		memory_set_bankptr(busdevice->machine(), "bios_bank", busdevice->machine().region("bios")->base() + 0x10000);
	150	state->membank("bios_bank")->set_base(state->memregion("bios")->base() + 0x10000);
151	151	break;
152	152	}
153	153	case 0x5a: // PAM1
154	154	{
155	155	if (data & 0x1)
156		memory_set_bankptr(busdevice->machine(), "video_bank1", state->m_isa_ram1);
	156	state->membank("video_bank1")->set_base(state->m_isa_ram1);
157	157	else
158		memory_set_bankptr(busdevice->machine(), "video_bank1", busdevice->machine().region("video_bios")->base() + 0);
	158	state->membank("video_bank1")->set_base(state->memregion("video_bios")->base() + 0);
159	159
160	160	if (data & 0x10)
161		memory_set_bankptr(busdevice->machine(), "video_bank2", state->m_isa_ram2);
	161	state->membank("video_bank2")->set_base(state->m_isa_ram2);
162	162	else
163		memory_set_bankptr(busdevice->machine(), "video_bank2", busdevice->machine().region("video_bios")->base() + 0x4000);
	163	state->membank("video_bank2")->set_base(state->memregion("video_bios")->base() + 0x4000);
164	164
165	165	break;
166	166	}
167	167	case 0x5e: // PAM5
168	168	{
169	169	if (data & 0x1)
170		memory_set_bankptr(busdevice->machine(), "bios_ext1", state->m_bios_ext1_ram);
	170	state->membank("bios_ext1")->set_base(state->m_bios_ext1_ram);
171	171	else
172		memory_set_bankptr(busdevice->machine(), "bios_ext1", busdevice->machine().region("bios")->base() + 0);
	172	state->membank("bios_ext1")->set_base(state->memregion("bios")->base() + 0);
173	173
174	174	if (data & 0x10)
175		memory_set_bankptr(busdevice->machine(), "bios_ext2", state->m_bios_ext2_ram);
	175	state->membank("bios_ext2")->set_base(state->m_bios_ext2_ram);
176	176	else
177		memory_set_bankptr(busdevice->machine(), "bios_ext2", busdevice->machine().region("bios")->base() + 0x4000);
	177	state->membank("bios_ext2")->set_base(state->memregion("bios")->base() + 0x4000);
178	178
179	179	break;
180	180	}
181	181	case 0x5f: // PAM6
182	182	{
183	183	if (data & 0x1)
184		memory_set_bankptr(busdevice->machine(), "bios_ext3", state->m_bios_ext3_ram);
	184	state->membank("bios_ext3")->set_base(state->m_bios_ext3_ram);
185	185	else
186		memory_set_bankptr(busdevice->machine(), "bios_ext3", busdevice->machine().region("bios")->base() + 0x8000);
	186	state->membank("bios_ext3")->set_base(state->memregion("bios")->base() + 0x8000);
187	187
188	188	if (data & 0x10)
189		memory_set_bankptr(busdevice->machine(), "bios_ext4", state->m_bios_ext4_ram);
	189	state->membank("bios_ext4")->set_base(state->m_bios_ext4_ram);
190	190	else
191		memory_set_bankptr(busdevice->machine(), "bios_ext4", busdevice->machine().region("bios")->base() + 0xc000);
	191	state->membank("bios_ext4")->set_base(state->memregion("bios")->base() + 0xc000);
192	192
193	193	break;
194	194	}
r14976	r14977
666	666
667	667	static MACHINE_RESET( xtom3d )
668	668	{
669		memory_set_bankptr(machine, "bios_bank", machine.region("bios")->base() + 0x10000);
670		memory_set_bankptr(machine, "bios_ext1", machine.region("bios")->base() + 0);
671		memory_set_bankptr(machine, "bios_ext2", machine.region("bios")->base() + 0x4000);
672		memory_set_bankptr(machine, "bios_ext3", machine.region("bios")->base() + 0x8000);
673		memory_set_bankptr(machine, "bios_ext4", machine.region("bios")->base() + 0xc000);
674		memory_set_bankptr(machine, "video_bank1", machine.region("video_bios")->base() + 0);
675		memory_set_bankptr(machine, "video_bank2", machine.region("video_bios")->base() + 0x4000);
	669	machine.root_device().membank("bios_bank")->set_base(machine.root_device().memregion("bios")->base() + 0x10000);
	670	machine.root_device().membank("bios_ext1")->set_base(machine.root_device().memregion("bios")->base() + 0);
	671	machine.root_device().membank("bios_ext2")->set_base(machine.root_device().memregion("bios")->base() + 0x4000);
	672	machine.root_device().membank("bios_ext3")->set_base(machine.root_device().memregion("bios")->base() + 0x8000);
	673	machine.root_device().membank("bios_ext4")->set_base(machine.root_device().memregion("bios")->base() + 0xc000);
	674	machine.root_device().membank("video_bank1")->set_base(machine.root_device().memregion("video_bios")->base() + 0);
	675	machine.root_device().membank("video_bank2")->set_base(machine.root_device().memregion("video_bios")->base() + 0x4000);
676	676	}
677	677
678	678

src/mame/drivers/galpanic.c

r14976	r14977
170	170
171	171	if (ACCESSING_BITS_8_15)
172	172	{
173		UINT8 *rom = machine().region("oki")->base();
	173	UINT8 *rom = memregion("oki")->base();
174	174
175	175	memcpy(&rom[0x30000],&rom[0x40000 + ((data >> 8) & 0x0f) * 0x10000],0x10000);
176	176
r14976	r14977
183	183	{
184	184	if (ACCESSING_BITS_8_15)
185	185	{
186		UINT8 *rom = machine().region("oki")->base();
	186	UINT8 *rom = memregion("oki")->base();
187	187
188	188	memcpy(&rom[0x30000],&rom[0x40000 + ((data >> 8) & 0x0f) * 0x10000],0x10000);
189	189	}

src/mame/drivers/speedspn.c

r14976	r14977
65	65	{
66	66	/* is this weird banking some form of protection? */
67	67
68		UINT8 *rom = machine().region("maincpu")->base();
	68	UINT8 *rom = memregion("maincpu")->base();
69	69	int addr;
70	70
71	71	switch (data)
r14976	r14977
85	85	break;
86	86	}
87	87
88		memory_set_bankptr(machine(), "bank1",&rom[addr + 0x8000]);
	88	membank("bank1")->set_base(&rom[addr + 0x8000]);
89	89	}
90	90
91	91	/*** SOUND RELATED ***********************************************************/

src/mame/drivers/enigma2.c

r14976	r14977
208	208	pen_t pens[NUM_PENS];
209	209
210	210	const rectangle &visarea = screen.visible_area();
211		UINT8 *prom = screen.machine().region("proms")->base();
	211	UINT8 *prom = state->memregion("proms")->base();
212	212	UINT8 *color_map_base = state->m_flip_screen ? &prom[0x0400] : &prom[0x0000];
213	213	UINT8 *star_map_base = (state->m_blink_count & 0x08) ? &prom[0x0c00] : &prom[0x0800];
214	214
r14976	r14977
707	707	static DRIVER_INIT(enigma2)
708	708	{
709	709	offs_t i;
710		UINT8 *rom = machine.region("audiocpu")->base();
	710	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
711	711
712	712	for(i = 0; i < 0x2000; i++)
713	713	{

src/mame/drivers/videopkr.c

r14976	r14977
400	400
401	401	static PALETTE_INIT( videopkr )
402	402	{
403		const UINT8 *color_prom = machine.region("proms")->base();
	403	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
404	404	int j;
405	405
406	406	for (j = 0; j < machine.total_colors(); j++)
r14976	r14977
427	427
428	428	static PALETTE_INIT( babypkr )
429	429	{
430		const UINT8 *color_prom = machine.region("proms")->base();
	430	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
431	431	int j;
432	432
433	433	for (j = 0; j < machine.total_colors(); j++)
r14976	r14977
458	458
459	459	static PALETTE_INIT( fortune1 )
460	460	{
461		const UINT8 *color_prom = machine.region("proms")->base();
	461	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
462	462	int j;
463	463
464	464	for (j = 0; j < machine.total_colors(); j++)

src/mame/drivers/igspoker.c

r14976	r14977
343	343
344	344	READ8_MEMBER(igspoker_state::exp_rom_r)
345	345	{
346		UINT8 *rom = machine().region("maincpu")->base();
	346	UINT8 *rom = memregion("maincpu")->base();
347	347	return rom[offset+0x10000];
348	348	}
349	349
r14976	r14977
1919	1919	static DRIVER_INIT( cpoker )
1920	1920	{
1921	1921	int A;
1922		UINT8 *rom = machine.region("maincpu")->base();
	1922	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1923	1923
1924	1924
1925	1925	for (A = 0;A < 0x10000;A++)
r14976	r14977
1933	1933
1934	1934	static DRIVER_INIT( cpokert )
1935	1935	{
1936		UINT8 *rom = machine.region("maincpu")->base();
	1936	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1937	1937	int i;
1938	1938
1939	1939	/* decrypt the program ROM */
r14976	r14977
1963	1963	static DRIVER_INIT( cska )
1964	1964	{
1965	1965	int A;
1966		UINT8 *rom = machine.region("maincpu")->base();
	1966	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1967	1967
1968	1968
1969	1969	for (A = 0;A < 0x10000;A++)
r14976	r14977
1980	1980	static DRIVER_INIT( igs_ncs )
1981	1981	{
1982	1982	int A;
1983		UINT8 *rom = machine.region("maincpu")->base();
	1983	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1984	1984
1985	1985
1986	1986	for (A = 0;A < 0x10000;A++)
r14976	r14977
2141	2141
2142	2142	static DRIVER_INIT( igs_ncs2 )
2143	2143	{
2144		UINT8 *src = (UINT8 *) (machine.region("maincpu")->base());
	2144	UINT8 *src = (UINT8 *) (machine.root_device().memregion("maincpu")->base());
2145	2145	int i;
2146	2146
2147	2147	for(i = 0; i < 0x10000; i++)
r14976	r14977
2218	2218	int length;
2219	2219	UINT8 *rom;
2220	2220
2221		rom = machine.region("maincpu")->base();
2222		length = machine.region("maincpu")->bytes();
	2221	rom = machine.root_device().memregion("maincpu")->base();
	2222	length = machine.root_device().memregion("maincpu")->bytes();
2223	2223	for (A = 0;A < length;A++)
2224	2224	{
2225	2225	if ((A & 0x09C0) == 0x0880) rom[A] ^= 0x20;
r14976	r14977
2282	2282	UINT8 *tmp;
2283	2283	UINT8 *rom;
2284	2284
2285		rom = machine.region("maincpu")->base();
2286		length = machine.region("maincpu")->bytes();
	2285	rom = machine.root_device().memregion("maincpu")->base();
	2286	length = machine.root_device().memregion("maincpu")->bytes();
2287	2287	for (A = 0;A < length;A++)
2288	2288	{
2289	2289	if ((A & 0x09C0) == 0x0880) rom[A] ^= 0x20;
r14976	r14977
2312	2312	rom[0xeed] = 0xc3;
2313	2313
2314	2314	/* Descramble graphic */
2315		rom = machine.region("gfx1")->base();
2316		length = machine.region("gfx1")->bytes();
	2315	rom = machine.root_device().memregion("gfx1")->base();
	2316	length = machine.root_device().memregion("gfx1")->bytes();
2317	2317	tmp = auto_alloc_array(machine, UINT8, length);
2318	2318	memcpy(tmp,rom,length);
2319	2319	for (A = 0;A < length;A++)
r14976	r14977
2361	2361	static DRIVER_INIT( cpokerpk )
2362	2362	{
2363	2363	int A;
2364		UINT8 *rom = machine.region("maincpu")->base();
	2364	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2365	2365
2366	2366	for (A=0x0714; A < 0xF000; A+=0x1000)
2367	2367	rom[A] ^= 0x20;
r14976	r14977
2415	2415	static DRIVER_INIT( pktet346 )
2416	2416	{
2417	2417	int A;
2418		UINT8 *rom = machine.region("maincpu")->base();
	2418	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2419	2419
2420	2420
2421	2421	for (A = 0;A < 0x10000;A++)

src/mame/drivers/segaorun.c

r14976	r14977
2126	2126	state->m_custom_io_w = outrun_custom_io_w;
2127	2127
2128	2128	/* main CPU: swap bits 11,12 and 6,7 */
2129		word = (UINT16 *)machine.region("maincpu")->base();
2130		length = machine.region("maincpu")->bytes() / 2;
	2129	word = (UINT16 *)machine.root_device().memregion("maincpu")->base();
	2130	length = machine.root_device().memregion("maincpu")->bytes() / 2;
2131	2131	for (i = 0; i < length; i++)
2132	2132	word[i] = BITSWAP16(word[i], 15,14,11,12,13,10,9,8,6,7,5,4,3,2,1,0);
2133	2133
2134	2134	/* sub CPU: swap bits 14,15 and 2,3 */
2135		word = (UINT16 *)machine.region("sub")->base();
2136		length = machine.region("sub")->bytes() / 2;
	2135	word = (UINT16 *)machine.root_device().memregion("sub")->base();
	2136	length = machine.root_device().memregion("sub")->bytes() / 2;
2137	2137	for (i = 0; i < length; i++)
2138	2138	word[i] = BITSWAP16(word[i], 14,15,13,12,11,10,9,8,7,6,5,4,2,3,1,0);
2139	2139
2140	2140	/* road gfx */
2141	2141	/* rom a-2.bin: swap bits 6,7 */
2142	2142	/* rom a-3.bin: swap bits 5,6 */
2143		byte = machine.region("gfx3")->base();
2144		length = machine.region("gfx3")->bytes() / 2;
	2143	byte = machine.root_device().memregion("gfx3")->base();
	2144	length = machine.root_device().memregion("gfx3")->bytes() / 2;
2145	2145	for (i = 0; i < length; i++)
2146	2146	{
2147	2147	byte[i]        = BITSWAP8(byte[i],        6,7,5,4,3,2,1,0);
r14976	r14977
2149	2149	}
2150	2150
2151	2151	/* Z80 code: swap bits 5,6 */
2152		byte = machine.region("soundcpu")->base();
2153		length = machine.region("soundcpu")->bytes();
	2152	byte = machine.root_device().memregion("soundcpu")->base();
	2153	length = machine.root_device().memregion("soundcpu")->bytes();
2154	2154	for (i = 0; i < length; i++)
2155	2155	byte[i] = BITSWAP8(byte[i], 7,5,6,4,3,2,1,0);
2156	2156	}

src/mame/drivers/koikoi.c

r14976	r14977
87	87
88	88	static PALETTE_INIT( koikoi )
89	89	{
90		const UINT8 *color_prom = machine.region("proms")->base();
	90	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
91	91	int i;
92	92
93	93	/* allocate the colortable */

src/mame/drivers/gticlub.c

r14976	r14977
1165	1165
1166	1166	state->m_sharc_dataram_0 = auto_alloc_array(machine, UINT32, 0x100000/4);
1167	1167
1168		K001005_preprocess_texture_data(machine.region("gfx1")->base(), machine.region("gfx1")->bytes(), 1);
	1168	K001005_preprocess_texture_data(machine.root_device().memregion("gfx1")->base(), state->memregion("gfx1")->bytes(), 1);
1169	1169	}
1170	1170
1171	1171	static DRIVER_INIT(hangplt)
r14976	r14977
1173	1173	gticlub_state *state = machine.driver_data<gticlub_state>();
1174	1174
1175	1175	init_konami_cgboard(machine, 2, CGBOARD_TYPE_HANGPLT);
1176		set_cgboard_texture_bank(machine, 0, "bank5", machine.region("user5")->base());
1177		set_cgboard_texture_bank(machine, 1, "bank6", machine.region("user5")->base());
	1176	set_cgboard_texture_bank(machine, 0, "bank5", machine.root_device().memregion("user5")->base());
	1177	set_cgboard_texture_bank(machine, 1, "bank6", state->memregion("user5")->base());
1178	1178
1179	1179	state->m_sharc_dataram_0 = auto_alloc_array(machine, UINT32, 0x100000/4);
1180	1180	state->m_sharc_dataram_1 = auto_alloc_array(machine, UINT32, 0x100000/4);

src/mame/drivers/mazerbla.c

r14976	r14977
361	361	{
362	362	m_gfx_rom_bank = data;
363	363
364		memory_set_bankptr(machine(),  "bank1", machine().region("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000);
	364	membank("bank1")->set_base(machine().root_device().memregion("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000);
365	365	}
366	366
367	367	WRITE8_MEMBER(mazerbla_state::cfb_rom_bank_sel_w_gg)/* great guns */
368	368	{
369	369	m_gfx_rom_bank = data >> 1;
370	370
371		memory_set_bankptr(machine(),  "bank1", machine().region("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000);
	371	membank("bank1")->set_base(machine().root_device().memregion("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000);
372	372	}
373	373
374	374
r14976	r14977
411	411
412	412	READ8_MEMBER(mazerbla_state::vcu_set_gfx_addr_r)
413	413	{
414		UINT8 * rom = machine().region("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000;
	414	UINT8 * rom = memregion("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000;
415	415	int offs;
416	416	int x, y;
417	417	int bits = 0;
r14976	r14977
557	557
558	558	READ8_MEMBER(mazerbla_state::vcu_set_clr_addr_r)
559	559	{
560		UINT8 * rom = machine().region("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000;
	560	UINT8 * rom = memregion("sub2")->base() + (m_gfx_rom_bank * 0x2000) + 0x10000;
561	561	int offs;
562	562	int x, y;
563	563	int bits = 0;
r14976	r14977
1713	1713	static DRIVER_INIT( greatgun )
1714	1714	{
1715	1715	mazerbla_state *state = machine.driver_data<mazerbla_state>();
1716		UINT8 *rom = machine.region("sub2")->base();
	1716	UINT8 *rom = state->memregion("sub2")->base();
1717	1717
1718	1718	state->m_game_id = GREATGUN;
1719	1719

src/mame/drivers/namcona1.c

r14976	r14977
1067	1067	static void init_namcona1( running_machine &machine, int gametype )
1068	1068	{
1069	1069	namcona1_state *state = machine.driver_data<namcona1_state>();
1070		UINT16 *pMem = (UINT16 *)machine.region( "maincpu" )->base();
	1070	UINT16 *pMem = (UINT16 *)state->memregion( "maincpu" )->base();
1071	1071
1072	1072	state->m_gametype = gametype;
1073	1073	state->m_mpBank0 = &pMem[0x80000/2];

src/mame/drivers/armedf.c

r14976	r14977
2085	2085	#if LEGION_HACK
2086	2086	/* This is a hack to allow you to use the extra features
2087	2087	of 3 of the "Unused" Dip Switches (see notes above). */
2088		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	2088	UINT16 *RAM = (UINT16 *)state->memregion("maincpu")->base();
2089	2089	RAM[0x0001d6 / 2] = 0x0001;
2090	2090	/* To avoid checksum error */
2091	2091	RAM[0x000488 / 2] = 0x4e71;
r14976	r14977
2102	2102	#if LEGION_HACK
2103	2103	/* This is a hack to allow you to use the extra features
2104	2104	of 3 of the "Unused" Dip Switches (see notes above). */
2105		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	2105	UINT16 *RAM = (UINT16 *)state->memregion("maincpu")->base();
2106	2106	RAM[0x0001d6/2] = 0x0001;
2107	2107	/* No need to patch the checksum routine (see notes) ! */
2108	2108	#endif

src/mame/drivers/cdi.c

r14976	r14977
199	199	static MACHINE_RESET( cdi )
200	200	{
201	201	cdi_state *state = machine.driver_data<cdi_state>();
202		UINT16 *src   = (UINT16*)machine.region("maincpu")->base();
	202	UINT16 *src   = (UINT16*)state->memregion("maincpu")->base();
203	203	UINT16 *dst   = state->m_planea;
204	204	//device_t *cdrom_dev = machine.device("cdrom");
205	205	memcpy(dst, src, 0x8);

src/mame/drivers/itgambl3.c

r14976	r14977
74	74	{
75	75	itgambl3_state *state = screen.machine().driver_data<itgambl3_state>();
76	76	int x,y,count;
77		const UINT8 *blit_ram = screen.machine().region("gfx1")->base();
	77	const UINT8 *blit_ram = state->memregion("gfx1")->base();
78	78
79	79	if(screen.machine().input().code_pressed(KEYCODE_Z))
80	80	state->m_test_x++;

src/mame/drivers/dkong.c

r14976	r14977
424	424	static MACHINE_START( s2650 )
425	425	{
426	426	dkong_state *state = machine.driver_data<dkong_state>();
427		UINT8   *p = machine.region("user1")->base();
	427	UINT8   *p = state->memregion("user1")->base();
428	428	const char *game_name = machine.system().name;
429	429	int i;
430	430
r14976	r14977
487	487	static MACHINE_RESET( strtheat )
488	488	{
489	489	dkong_state *state = machine.driver_data<dkong_state>();
490		UINT8 *ROM = machine.region("maincpu")->base();
	490	UINT8 *ROM = state->memregion("maincpu")->base();
491	491
492	492	MACHINE_RESET_CALL(dkong);
493	493
494	494	/* The initial state of the counter is 0x08 */
495		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	495	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
496	496	state->m_decrypt_counter = 0x08;
497		memory_set_bank(machine, "bank1", 0);
	497	state->membank("bank1")->set_entry(0);
498	498	}
499	499
500	500	static MACHINE_RESET( drakton )
501	501	{
502	502	dkong_state *state = machine.driver_data<dkong_state>();
503		UINT8 *ROM = machine.region("maincpu")->base();
	503	UINT8 *ROM = state->memregion("maincpu")->base();
504	504
505	505	MACHINE_RESET_CALL(dkong);
506	506
507	507	/* The initial state of the counter is 0x09 */
508		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	508	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
509	509	state->m_decrypt_counter = 0x09;
510		memory_set_bank(machine, "bank1", 1);
	510	state->membank("bank1")->set_entry(1);
511	511	}
512	512
513	513
r14976	r14977
627	627
628	628	switch(m_decrypt_counter)
629	629	{
630		case 0x08:  memory_set_bank(machine(), "bank1", 0);      break;
631		case 0x09:  memory_set_bank(machine(), "bank1", 1);      break;
632		case 0x0A:  memory_set_bank(machine(), "bank1", 2);      break;
633		case 0x0B:  memory_set_bank(machine(), "bank1", 3);      break;
	630	case 0x08:  membank("bank1")->set_entry(0);      break;
	631	case 0x09:  membank("bank1")->set_entry(1);      break;
	632	case 0x0A:  membank("bank1")->set_entry(2);      break;
	633	case 0x0B:  membank("bank1")->set_entry(3);      break;
634	634	default:
635	635	logerror("Invalid counter = %02X\n",m_decrypt_counter);
636	636	break;
r14976	r14977
1618	1618
1619	1619	WRITE8_MEMBER(dkong_state::braze_a15_w)
1620	1620	{
1621		memory_set_bank(machine(), "bank1", data & 0x01);
1622		memory_set_bank(machine(), "bank2", data & 0x01);
	1621	membank("bank1")->set_entry(data & 0x01);
	1622	membank("bank2")->set_entry(data & 0x01);
1623	1623	}
1624	1624
1625	1625	static WRITE8_DEVICE_HANDLER( braze_eeprom_w )
r14976	r14977
1637	1637	UINT32 mem;
1638	1638	UINT32 newmem;
1639	1639
1640		ROM = machine.region("braze")->base();
	1640	ROM = machine.root_device().memregion("braze")->base();
1641	1641
1642	1642	for (mem=0;mem<0x10000;mem++)
1643	1643	{
r14976	r14977
3065	3065	UINT8 *ROM;
3066	3066	int mem;
3067	3067
3068		ROM = machine.region("maincpu")->base();
	3068	ROM = machine.root_device().memregion("maincpu")->base();
3069	3069
3070	3070	for (mem=0;mem<0x4000;mem++)
3071	3071	{
r14976	r14977
3091	3091	static DRIVER_INIT( herodk )
3092	3092	{
3093	3093	int A;
3094		UINT8 *rom = machine.region("maincpu")->base();
	3094	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
3095	3095
3096	3096	/* swap data lines D3 and D4 */
3097	3097	for (A = 0;A < 0x8000;A++)
r14976	r14977
3174	3174
3175	3175	braze_decrypt_rom(machine, decrypted);
3176	3176
3177		memory_configure_bank(machine,"bank1", 0, 2, &decrypted[0], 0x8000);
3178		memory_set_bank(machine,"bank1", 0);
3179		memory_configure_bank(machine,"bank2", 0, 2, &decrypted[0], 0x8000);
3180		memory_set_bank(machine,"bank2", 0);
	3177	state->membank("bank1")->configure_entries(0, 2, &decrypted[0], 0x8000);
	3178	state->membank("bank1")->set_entry(0);
	3179	state->membank("bank2")->configure_entries(0, 2, &decrypted[0], 0x8000);
	3180	state->membank("bank2")->set_entry(0);
3181	3181	}
3182	3182
3183	3183	static DRIVER_INIT( dkingjr )
3184	3184	{
3185		UINT8 *prom = machine.region("proms")->base();
	3185	UINT8 *prom = machine.root_device().memregion("proms")->base();
3186	3186	for( int i=0; i<0x200; ++i)
3187	3187	{
3188	3188	prom[i]^=0xff; // invert color data

src/mame/drivers/acefruit.c

r14976	r14977
604	604
605	605	static DRIVER_INIT( sidewndr )
606	606	{
607		UINT8 *ROM = machine.region( "maincpu" )->base();
	607	UINT8 *ROM = machine.root_device().memregion( "maincpu" )->base();
608	608	/* replace "ret nc" ( 0xd0 ) with "di" */
609	609	ROM[ 0 ] = 0xf3;
610	610	/* this is either a bad dump or the cpu core should set the carry flag on reset */

src/mame/drivers/appoooh.c

r14976	r14977
177	177	{
178	178	if (state->m_adpcm_data == 0xffffffff)
179	179	{
180		UINT8 *RAM = device->machine().region("adpcm")->base();
	180	UINT8 *RAM = state->memregion("adpcm")->base();
181	181
182	182	state->m_adpcm_data = RAM[state->m_adpcm_address++];
183	183	msm5205_data_w(device, state->m_adpcm_data >> 4);
r14976	r14977
604	604	static DRIVER_INIT(robowresb)
605	605	{
606	606	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
607		space->set_decrypted_region(0x0000, 0x7fff, machine.region("maincpu")->base() + 0x1c000);
	607	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x1c000);
608	608	}
609	609
610	610

src/mame/drivers/travrusa.c

r14976	r14977
453	453	static DRIVER_INIT( motorace )
454	454	{
455	455	int A, j;
456		UINT8 *rom = machine.region("maincpu")->base();
	456	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
457	457	UINT8 *buffer = auto_alloc_array(machine, UINT8, 0x2000);
458	458
459	459	memcpy(buffer, rom, 0x2000);
r14976	r14977
471	471	static DRIVER_INIT( shtridra )
472	472	{
473	473	int A;
474		UINT8 *rom = machine.region("maincpu")->base();
	474	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
475	475
476	476	/* D3/D4  and  D5/D6 swapped */
477	477	for (A = 0; A < 0x2000; A++)

src/mame/drivers/goldstar.c

r14976	r14977
5946	5946	for (i = 0; i < 0x100; i++)
5947	5947	{
5948	5948	UINT8 data;
5949		UINT8*proms = machine.region("proms")->base();
	5949	UINT8*proms = machine.root_device().memregion("proms")->base();
5950	5950
5951	5951	data = proms[0x000 + i] | (proms[0x100 + i] << 4);
5952	5952
r14976	r14977
5961	5961	{
5962	5962	int r,g,b;
5963	5963
5964		UINT8*proms = machine.region("proms")->base();
	5964	UINT8*proms = machine.root_device().memregion("proms")->base();
5965	5965
5966	5966	b = proms[0x000 + i] << 4;
5967	5967	g = proms[0x100 + i] << 4;
r14976	r14977
5979	5979	UINT8 data;
5980	5980	UINT8 *proms;
5981	5981
5982		proms = machine.region("proms")->base();
	5982	proms = machine.root_device().memregion("proms")->base();
5983	5983	for (i = 0; i < 0x100; i++)
5984	5984	{
5985	5985
r14976	r14977
5988	5988	palette_set_color_rgb(machine, i, pal3bit(data >> 0), pal3bit(data >> 3), pal2bit(data >> 6));
5989	5989	}
5990	5990
5991		proms = machine.region("proms2")->base();
	5991	proms = machine.root_device().memregion("proms2")->base();
5992	5992	for (i=0; i < 0x20; i++)
5993	5993	{
5994	5994	data = proms[i];
r14976	r14977
6361	6361	{
6362	6362	int r,g,b;
6363	6363
6364		UINT8*proms = machine.region("proms")->base();
	6364	UINT8*proms = machine.root_device().memregion("proms")->base();
6365	6365
6366	6366	b = proms[0x000 + i] << 4;
6367	6367	g = proms[0x100 + i] << 4;
r14976	r14977
8433	8433	static DRIVER_INIT(magoddsc)
8434	8434	{
8435	8435	int A;
8436		UINT8 *ROM = machine.region("maincpu")->base();
	8436	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
8437	8437
8438	8438	for (A = 0;A < 0x8000;A++)
8439	8439	{
r14976	r14977
10058	10058	static DRIVER_INIT(goldstar)
10059	10059	{
10060	10060	int A;
10061		UINT8 *ROM = machine.region("maincpu")->base();
	10061	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10062	10062
10063	10063	for (A = 0;A < 0x10000;A++)
10064	10064	{
r14976	r14977
10143	10143
10144	10144	static DRIVER_INIT( chry10 )
10145	10145	{
10146		UINT8 *ROM = machine.region("maincpu")->base();
10147		int size = machine.region("maincpu")->bytes();
	10146	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	10147	int size = machine.root_device().memregion("maincpu")->bytes();
10148	10148	int start = 0;
10149	10149
10150	10150	int i;
r14976	r14977
10167	10167
10168	10168	static DRIVER_INIT( cb3 )
10169	10169	{
10170		UINT8 *ROM = machine.region("maincpu")->base();
10171		int size = machine.region("maincpu")->bytes();
	10170	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	10171	int size = machine.root_device().memregion("maincpu")->bytes();
10172	10172	int start = 0;
10173	10173
10174	10174	int i;
r14976	r14977
10186	10186	static DRIVER_INIT( chrygld )
10187	10187	{
10188	10188	int A;
10189		UINT8 *ROM = machine.region("maincpu")->base();
	10189	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10190	10190	do_blockswaps(machine, ROM);
10191	10191
10192	10192	// a data bitswap
r14976	r14977
10202	10202
10203	10203	static DRIVER_INIT(cm)
10204	10204	{
10205		UINT8 *ROM = machine.region("maincpu")->base();
	10205	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10206	10206
10207	10207	/*  forcing PPI mode 0 for all, and A, B & C as input.
10208	10208	the mixed modes 2-0 are not working properly.
r14976	r14977
10213	10213
10214	10214	static DRIVER_INIT(cmv4)
10215	10215	{
10216		UINT8 *ROM = machine.region("maincpu")->base();
	10216	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10217	10217
10218	10218	/*  forcing PPI mode 0 for all, and A, B & C as input.
10219	10219	the mixed modes 2-0 are not working properly.
r14976	r14977
10224	10224
10225	10225	static DRIVER_INIT(cmast91)
10226	10226	{
10227		UINT8 *ROM = machine.region("maincpu")->base();
	10227	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10228	10228
10229	10229	/*  forcing PPI mode 0 for all, and A, B & C as input.
10230	10230	the mixed modes 2-0 are not working properly.
r14976	r14977
10235	10235
10236	10236	static DRIVER_INIT(lucky8a)
10237	10237	{
10238		UINT8 *ROM = machine.region("maincpu")->base();
	10238	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10239	10239
10240	10240	ROM[0x0010] = 0x21;
10241	10241	}
r14976	r14977
10243	10243	static DRIVER_INIT( nfb96sea )
10244	10244	{
10245	10245	int i;
10246		UINT8 *ROM = machine.region("maincpu")->base();
	10246	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10247	10247
10248	10248	for (i = 0;i < 0x10000;i++)
10249	10249	{
r14976	r14977
10276	10276	static DRIVER_INIT( schery97 )
10277	10277	{
10278	10278	int i;
10279		UINT8 *ROM = machine.region("maincpu")->base();
	10279	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10280	10280	for (i = 0;i < 0x10000;i++)
10281	10281	{
10282	10282	UINT8 x = ROM[i];
r14976	r14977
10304	10304	static DRIVER_INIT( schery97a )
10305	10305	{
10306	10306	int i;
10307		UINT8 *ROM = machine.region("maincpu")->base();
	10307	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10308	10308	for (i = 0;i < 0x10000;i++)
10309	10309	{
10310	10310	UINT8 x = ROM[i];
r14976	r14977
10333	10333	static DRIVER_INIT( skill98 )
10334	10334	{
10335	10335	int i;
10336		UINT8 *ROM = machine.region("maincpu")->base();
	10336	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10337	10337	for (i = 0;i < 0x10000;i++)
10338	10338	{
10339	10339	UINT8 x = ROM[i];
r14976	r14977
10360	10360	static DRIVER_INIT( nfb96_c1 )
10361	10361	{
10362	10362	int i;
10363		UINT8 *ROM = machine.region("maincpu")->base();
	10363	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10364	10364	for (i = 0;i < 0x10000;i++)
10365	10365	{
10366	10366	UINT8 x = ROM[i];
r14976	r14977
10387	10387	static DRIVER_INIT( nfb96_c2 )
10388	10388	{
10389	10389	int i;
10390		UINT8 *ROM = machine.region("maincpu")->base();
	10390	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10391	10391	for (i = 0;i < 0x10000;i++)
10392	10392	{
10393	10393	UINT8 x = ROM[i];
r14976	r14977
10424	10424	static DRIVER_INIT( nfb96_d )
10425	10425	{
10426	10426	int i;
10427		UINT8 *ROM = machine.region("maincpu")->base();
	10427	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10428	10428	for (i = 0;i < 0x10000;i++)
10429	10429	{
10430	10430	UINT8 x = ROM[i];
r14976	r14977
10457	10457	static DRIVER_INIT( nfb96_dk )
10458	10458	{
10459	10459	int i;
10460		UINT8 *ROM = machine.region("maincpu")->base();
	10460	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10461	10461	for (i = 0;i < 0x10000;i++)
10462	10462	{
10463	10463	UINT8 x = ROM[i];
r14976	r14977
10489	10489	static DRIVER_INIT( rp35 )
10490	10490	{
10491	10491	int i;
10492		UINT8 *ROM = machine.region("maincpu")->base();
	10492	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10493	10493	for (i = 0;i < 0x10000;i++)
10494	10494	{
10495	10495	UINT8 x = ROM[i];
r14976	r14977
10517	10517	static DRIVER_INIT( rp36 )
10518	10518	{
10519	10519	int i;
10520		UINT8 *ROM = machine.region("maincpu")->base();
	10520	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10521	10521	for (i = 0;i < 0x10000;i++)
10522	10522	{
10523	10523	UINT8 x = ROM[i];
r14976	r14977
10545	10545	static DRIVER_INIT( rp36c3 )
10546	10546	{
10547	10547	int i;
10548		UINT8 *ROM = machine.region("maincpu")->base();
	10548	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10549	10549	for (i = 0;i < 0x10000;i++)
10550	10550	{
10551	10551	UINT8 x = ROM[i];
r14976	r14977
10579	10579	static DRIVER_INIT( po33 )
10580	10580	{
10581	10581	int i;
10582		UINT8 *ROM = machine.region("maincpu")->base();
	10582	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10583	10583	for (i = 0;i < 0x10000;i++)
10584	10584	{
10585	10585	UINT8 x = ROM[i];
r14976	r14977
10613	10613	static DRIVER_INIT( match133 )
10614	10614	{
10615	10615	int i;
10616		UINT8 *ROM = machine.region("maincpu")->base();
	10616	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10617	10617	for (i = 0;i < 0x10000;i++)
10618	10618	{
10619	10619	UINT8 x = ROM[i];
r14976	r14977
10637	10637	static DRIVER_INIT(cherrys)
10638	10638	{
10639	10639	int i;
10640		UINT8 *ROM = machine.region("maincpu")->base();
	10640	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10641	10641
10642	10642	unsigned char rawData[256] = {
10643	10643	0xCC, 0xCD, 0xCE, 0xCF, 0xC8, 0xC9, 0xCA, 0xCB, 0xC4, 0xC5, 0xC6, 0xC7,
r14976	r14977
10674	10674	/* todo: remove these patches! */
10675	10675	static DRIVER_INIT( unkch1 )
10676	10676	{
10677		UINT8 *ROM = machine.region("maincpu")->base();
	10677	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10678	10678	ROM[0x9d52] = 0x00;
10679	10679	ROM[0x9d53] = 0x00;
10680	10680	}
10681	10681
10682	10682	static DRIVER_INIT( unkch3 )
10683	10683	{
10684		UINT8 *ROM = machine.region("maincpu")->base();
	10684	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10685	10685	ROM[0x9b86] = 0x00;
10686	10686	ROM[0x9b87] = 0x00;
10687	10687	}
10688	10688
10689	10689	static DRIVER_INIT( unkch4 )
10690	10690	{
10691		UINT8 *ROM = machine.region("maincpu")->base();
	10691	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
10692	10692	ROM[0x9a6e] = 0x00;
10693	10693	ROM[0x9a6f] = 0x00;
10694	10694	}

src/mame/drivers/dbz.c

r14976	r14977
504	504	{
505	505	UINT16 *ROM;
506	506
507		ROM = (UINT16 *)machine.region("maincpu")->base();
	507	ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
508	508
509	509	// nop out dbz1's mask rom test
510	510	// tile ROM test

src/mame/drivers/20pacgal.c

r14976	r14977
144	144	_20pacgal_state *state =  machine.driver_data<_20pacgal_state>();
145	145	if (state->m_game_selected == 0)
146	146	{
147		UINT8 *rom = machine.region("maincpu")->base();
148		memory_set_bankptr(machine, "bank1", rom + 0x08000);
	147	UINT8 *rom = state->memregion("maincpu")->base();
	148	state->membank("bank1")->set_base(rom + 0x08000);
149	149	}
150	150	else
151		memory_set_bankptr(machine, "bank1", state->m_ram_48000);
	151	state->membank("bank1")->set_base(state->m_ram_48000);
152	152	}
153	153
154	154	WRITE8_MEMBER(_20pacgal_state::ram_bank_select_w)

src/mame/drivers/system16.c

r14976	r14977
389	389
390	390	WRITE8_MEMBER(segas1x_bootleg_state::tturfbl_soundbank_w)
391	391	{
392		UINT8 *mem = machine().region("soundcpu")->base();
	392	UINT8 *mem = memregion("soundcpu")->base();
393	393
394	394	switch(data)
395	395	{
r14976	r14977
460	460
461	461	static WRITE8_DEVICE_HANDLER( upd7759_bank_w ) //*
462	462	{
463		int offs, size = device->machine().region("soundcpu")->bytes() - 0x10000;
	463	int offs, size = device->machine().root_device().memregion("soundcpu")->bytes() - 0x10000;
464	464
465	465	upd7759_reset_w(device, data & 0x40);
466	466	offs = 0x10000 + (data * 0x4000) % size;
467		memory_set_bankptr(device->machine(), "bank1", device->machine().region("soundcpu")->base() + offs);
	467	device->machine().root_device().membank("bank1")->set_base(device->machine().root_device().memregion("soundcpu")->base() + offs);
468	468	}
469	469
470	470
r14976	r14977
1039	1039
1040	1040	WRITE8_MEMBER(segas1x_bootleg_state::sys18_soundbank_w)
1041	1041	{
1042		UINT8 *mem = machine().region("soundcpu")->base();
	1042	UINT8 *mem = memregion("soundcpu")->base();
1043	1043	int rom = (data >> 6) & 3;
1044	1044	int bank = (data & 0x3f);
1045	1045	int mask = m_sound_info[rom * 2 + 0];
r14976	r14977
1203	1203
1204	1204	WRITE8_MEMBER(segas1x_bootleg_state::shdancbl_bankctrl_w)
1205	1205	{
1206		UINT8 *mem = machine().region("soundcpu")->base();
	1206	UINT8 *mem = memregion("soundcpu")->base();
1207	1207
1208	1208	switch (data)
1209	1209	{
r14976	r14977
3349	3349	{
3350	3350	segas1x_bootleg_state *state = machine.driver_data<segas1x_bootleg_state>();
3351	3351	int i;
3352		UINT8 *ROM = machine.region("maincpu")->base();
3353		UINT8 *KEY = machine.region("decryption")->base();
	3352	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3353	UINT8 *KEY = state->memregion("decryption")->base();
3354	3354	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
3355	3355	UINT8 data[0x1000];
3356	3356
r14976	r14977
3393	3393	// decrypt
3394	3394	DRIVER_INIT_CALL( goldnaxeb1 );
3395	3395
3396		ROM2 = (UINT16*)machine.region("maincpu")->base();
	3396	ROM2 = (UINT16*)state->memregion("maincpu")->base();
3397	3397	decrypted_region2 = (UINT16*)state->m_decrypted_region;
3398	3398
3399	3399	// patch interrupt vector
r14976	r14977
3408	3408
3409	3409	static DRIVER_INIT( bayrouteb2 )
3410	3410	{
3411		UINT8 *mem = machine.region("soundcpu")->base();
	3411	UINT8 *mem = machine.root_device().memregion("soundcpu")->base();
3412	3412
3413	3413	memcpy(mem, mem + 0x10000, 0x8000);
3414	3414
r14976	r14977
3426	3426
3427	3427	static DRIVER_INIT( tturfbl )
3428	3428	{
3429		UINT8 *mem = machine.region("soundcpu")->base();
	3429	UINT8 *mem = machine.root_device().memregion("soundcpu")->base();
3430	3430
3431	3431	memcpy(mem, mem + 0x10000, 0x8000);
3432	3432
r14976	r14977
3462	3462	/* Tetris-based */
3463	3463	static DRIVER_INIT( beautyb )
3464	3464	{
3465		UINT16*rom = (UINT16*)machine.region( "maincpu" )->base();
	3465	UINT16*rom = (UINT16*)machine.root_device().memregion( "maincpu" )->base();
3466	3466	int x;
3467	3467
3468	3468	for (x = 0; x < 0x8000; x++)
r14976	r14977
3481	3481	static DRIVER_INIT( shdancbl )
3482	3482	{
3483	3483	segas1x_bootleg_state *state = machine.driver_data<segas1x_bootleg_state>();
3484		UINT8 *mem = machine.region("soundcpu")->base();;
	3484	UINT8 *mem = state->memregion("soundcpu")->base();;
3485	3485
3486	3486	/* Copy first 32K of IC45 to Z80 address space */
3487	3487	memcpy(mem, mem + 0x10000, 0x8000);
r14976	r14977
3496	3496	static DRIVER_INIT( mwalkbl )
3497	3497	{
3498	3498	segas1x_bootleg_state *state = machine.driver_data<segas1x_bootleg_state>();
3499		UINT8 *RAM =  machine.region("soundcpu")->base();
	3499	UINT8 *RAM =  state->memregion("soundcpu")->base();
3500	3500	static const int mwalk_sound_info[]  =
3501	3501	{
3502	3502	0x0f, 0x00000, // ROM #1 = 128K
r14976	r14977
3518	3518	static DRIVER_INIT( astormbl )
3519	3519	{
3520	3520	segas1x_bootleg_state *state = machine.driver_data<segas1x_bootleg_state>();
3521		UINT8 *RAM =  machine.region("soundcpu")->base();
	3521	UINT8 *RAM =  state->memregion("soundcpu")->base();
3522	3522	static const int astormbl_sound_info[]  =
3523	3523	{
3524	3524	0x0f, 0x00000, // ROM #1 = 128K

src/mame/drivers/limenko.c

r14976	r14977
371	371	limenko_state *state = machine.driver_data<limenko_state>();
372	372	int i;
373	373
374		UINT8 *base_gfx   = machine.region("gfx1")->base();
375		UINT8 *gfx_max   = base_gfx + machine.region("gfx1")->bytes();
	374	UINT8 *base_gfx   = machine.root_device().memregion("gfx1")->base();
	375	UINT8 *gfx_max   = base_gfx + state->memregion("gfx1")->bytes();
376	376
377	377	UINT8 *gfxdata;
378	378	gfx_element gfx(machine);
r14976	r14977
1066	1066	static DRIVER_INIT( spotty )
1067	1067	{
1068	1068	limenko_state *state = machine.driver_data<limenko_state>();
1069		UINT8 *dst    = machine.region("gfx1")->base();
1070		UINT8 *src    = machine.region("user2")->base();
	1069	UINT8 *dst    = machine.root_device().memregion("gfx1")->base();
	1070	UINT8 *src    = state->memregion("user2")->base();
1071	1071	int x;
1072	1072
1073	1073	/* expand 4bpp roms to 8bpp space */

src/mame/drivers/pengo.c

r14976	r14977
692	692	};
693	693	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
694	694	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
695		UINT8 *rom = machine.region("maincpu")->base();
	695	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
696	696	int A;
697	697
698	698	space->set_decrypted_region(0x0000, 0x7fff, decrypt);

src/mame/drivers/whitestar.c

r14976	r14977
98	98
99	99	WRITE8_MEMBER(whitestar_state::bank_w)
100	100	{
101		memory_set_bankptr(machine(), "bank1", machine().region("user1")->base() + (data & 0x1f) * 0x4000);
	101	membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + (data & 0x1f) * 0x4000);
102	102	}
103	103
104	104	WRITE8_MEMBER(whitestar_state::dmd_bank_w)
105	105	{
106		memory_set_bankptr(machine(), "dmd_bank1", machine().region("dmdcpu")->base() + (data & 0x1f) * 0x4000);
	106	membank("dmd_bank1")->set_base(machine().root_device().memregion("dmdcpu")->base() + (data & 0x1f) * 0x4000);
107	107	}
108	108
109	109	READ8_MEMBER(whitestar_state::dmd_latch_r)
r14976	r14977
170	170
171	171	static MACHINE_RESET( whitestar )
172	172	{
173		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
174		memory_set_bankptr(machine, "dmd_bank1", machine.region("dmdcpu")->base());
	173	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("user1")->base());
	174	machine.root_device().membank("dmd_bank1")->set_base(machine.root_device().memregion("dmdcpu")->base());
175	175	}
176	176
177	177	static DRIVER_INIT( whitestar )

src/mame/drivers/simpsons.c

r14976	r14977
108	108
109	109	WRITE8_MEMBER(simpsons_state::z80_bankswitch_w)
110	110	{
111		memory_set_bank(machine(), "bank2", data & 7);
	111	membank("bank2")->set_entry(data & 7);
112	112	}
113	113
114	114	#if 0

src/mame/drivers/bfm_sc4.c

r14976	r14977
63	63	// search for the title
64	64	const int strlength = 14;
65	65	char title_string[] = "PROJECT NUMBER";
66		UINT8 *src = machine.region( "maincpu" )->base();
67		int size = machine.region( "maincpu" )->bytes();
	66	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
	67	int size = machine.root_device().memregion( "maincpu" )->bytes();
68	68
69	69	int search_start = 0;
70	70	int search_step = 1;
r14976	r14977
194	194
195	195	DRIVER_INIT( sc4 )
196	196	{
197		UINT8 *src = machine.region( "maincpu" )->base();
	197	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
198	198	// SC4 identification sequence 0x80 0x00 0xf0 0x7d
199	199	if (((src[0] == 0x80) && (src[2] == 0xf0)) || ((src[1] == 0x00) && (src[3] == 0x7d)))
200	200	{
r14976	r14977
233	233	{
234	234	DRIVER_INIT_CALL( sc4 );
235	235	sc4_state *state = machine.driver_data<sc4_state>();
236		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	236	UINT16 *rom = (UINT16 *)state->memregion("maincpu")->base();
237	237	find_mbus(state, rom);
238	238	}
239	239

src/mame/drivers/model1.c

r14976	r14977
664	664	if(ACCESSING_BITS_0_7) {
665	665	switch(data & 0xf) {
666	666	case 0x1: // 100000-1fffff data roms banking
667		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x1000000 + 0x100000*((data >> 4) & 0xf));
	667	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x1000000 + 0x100000*((data >> 4) & 0xf));
668	668	logerror("BANK %x\n", 0x1000000 + 0x100000*((data >> 4) & 0xf));
669	669	break;
670	670	case 0x2: // 200000-2fffff data roms banking (unused, all known games have only one bank)
r14976	r14977
735	735	static MACHINE_RESET(model1)
736	736	{
737	737	model1_state *state = machine.driver_data<model1_state>();
738		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x1000000);
	738	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x1000000);
739	739	irq_init(machine);
740	740	model1_tgp_reset(machine, !strcmp(machine.system().name, "swa") || !strcmp(machine.system().name, "wingwar") || !strcmp(machine.system().name, "wingwaru") || !strcmp(machine.system().name, "wingwarj"));
741	741	if (!strcmp(machine.system().name, "swa"))
r14976	r14977
755	755	static MACHINE_RESET(model1_vr)
756	756	{
757	757	model1_state *state = machine.driver_data<model1_state>();
758		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x1000000);
	758	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x1000000);
759	759	irq_init(machine);
760	760	model1_vr_tgp_reset(machine);
761	761	state->m_sound_irq = 3;

src/mame/drivers/polepos.c

r14976	r14977
378	378
379	379	static READ8_DEVICE_HANDLER( namco_52xx_rom_r )
380	380	{
381		UINT32 length = device->machine().region("52xx")->bytes();
	381	UINT32 length = device->machine().root_device().memregion("52xx")->bytes();
382	382	logerror("ROM @ %04X\n", offset);
383		return (offset < length) ? device->machine().region("52xx")->base()[offset] : 0xff;
	383	return (offset < length) ? device->machine().root_device().memregion("52xx")->base()[offset] : 0xff;
384	384	}
385	385
386	386	static READ8_DEVICE_HANDLER( namco_52xx_si_r )

src/mame/drivers/tank8.c

r14976	r14977
464	464
465	465	static DRIVER_INIT( decode )
466	466	{
467		const UINT8* DECODE = machine.region("user1")->base();
	467	const UINT8* DECODE = machine.root_device().memregion("user1")->base();
468	468
469		UINT8* p1 = machine.region("maincpu")->base() + 0x00000;
470		UINT8* p2 = machine.region("maincpu")->base() + 0x10000;
	469	UINT8* p1 = machine.root_device().memregion("maincpu")->base() + 0x00000;
	470	UINT8* p2 = machine.root_device().memregion("maincpu")->base() + 0x10000;
471	471
472	472	int i;
473	473

src/mame/drivers/galgame.c

r14976	r14977
397	397	static DRIVER_INIT(galaxygame)
398	398	{
399	399	address_space *main = machine.device("maincpu")->memory().space(AS_PROGRAM);
400		UINT8 *code = machine.region("code")->base();
	400	UINT8 *code = machine.root_device().memregion("code")->base();
401	401
402	402	int filepos = 0, linepos, linelen;
403	403	UINT8 line[256];

src/mame/drivers/poo.c

r14976	r14977
291	291
292	292	static PALETTE_INIT( unclepoo )
293	293	{
294		const UINT8 *color_prom = machine.region("proms")->base();
	294	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
295	295	int i,r,g,b,val;
296	296	int bit0,bit1,bit2;
297	297

src/mame/drivers/qdrmfgp.c

r14976	r14977
119	119	READ16_MEMBER(qdrmfgp_state::v_rom_r)
120	120	{
121	121	device_t *k056832 = machine().device("k056832");
122		UINT8 *mem8 = machine().region("gfx1")->base();
	122	UINT8 *mem8 = memregion("gfx1")->base();
123	123	int bank = k056832_word_r(k056832, 0x34/2, 0xffff);
124	124
125	125	offset += bank * 0x800 * 4;
r14976	r14977
650	650	static MACHINE_RESET( qdrmfgp )
651	651	{
652	652	qdrmfgp_state *state = machine.driver_data<qdrmfgp_state>();
653		state->m_sndram = machine.region("konami")->base() + 0x100000;
	653	state->m_sndram = state->memregion("konami")->base() + 0x100000;
654	654
655	655	/* reset the IDE controller */
656	656	state->m_gp2_irq_control = 0;

src/mame/drivers/cps1.c

r14976	r14977
281	281
282	282	WRITE8_MEMBER(cps_state::cps1_snd_bankswitch_w)
283	283	{
284		memory_set_bank(machine(), "bank1", data & 0x01);
	284	membank("bank1")->set_entry(data & 0x01);
285	285	}
286	286
287	287	static WRITE8_DEVICE_HANDLER( cps1_oki_pin7_w )
r14976	r14977
348	348
349	349	READ16_MEMBER(cps_state::qsound_rom_r)
350	350	{
351		UINT8 *rom = machine().region("user1")->base();
	351	UINT8 *rom = memregion("user1")->base();
352	352
353	353	if (rom)
354	354	return rom[offset] | 0xff00;
r14976	r14977
387	387	{
388	388	/* Z80 bank register for music note data. It's odd that it isn't encrypted though. */
389	389	int bank = data & 0x0f;
390		if ((0x10000 + (bank * 0x4000)) >= machine().region("audiocpu")->bytes())
	390	if ((0x10000 + (bank * 0x4000)) >= memregion("audiocpu")->bytes())
391	391	{
392	392	logerror("WARNING: Q sound bank overflow (%02x)\n", data);
393	393	bank = 0;
394	394	}
395	395
396		memory_set_bank(machine(), "bank1", bank);
	396	membank("bank1")->set_entry(bank);
397	397	}
398	398
399	399
r14976	r14977
3040	3040	static MACHINE_START( cps1 )
3041	3041	{
3042	3042	MACHINE_START_CALL(common);
3043		memory_configure_bank(machine, "bank1", 0, 2, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	3043	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
3044	3044	}
3045	3045
3046	3046	static MACHINE_START( qsound )
3047	3047	{
3048	3048	MACHINE_START_CALL(common);
3049		memory_configure_bank(machine, "bank1", 0, 6, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	3049	machine.root_device().membank("bank1")->configure_entries(0, 6, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
3050	3050	}
3051	3051
3052	3052	static MACHINE_CONFIG_START( cps1_10MHz, cps_state )
r14976	r14977
10776	10776
10777	10777	static DRIVER_INIT( pang3 )
10778	10778	{
10779		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	10779	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
10780	10780	int A, src, dst;
10781	10781
10782	10782	for (A = 0x80000; A < 0x100000; A += 2)
r14976	r14977
10806	10806	static DRIVER_INIT( sf2mdt )
10807	10807	{
10808	10808	int i;
10809		UINT32 gfx_size = machine.region( "gfx" )->bytes();
10810		UINT8 *rom = machine.region( "gfx" )->base();
	10809	UINT32 gfx_size = machine.root_device().memregion( "gfx" )->bytes();
	10810	UINT8 *rom = machine.root_device().memregion( "gfx" )->base();
10811	10811	UINT8 tmp;
10812	10812
10813	10813	for( i = 0; i < gfx_size; i += 8 )

src/mame/drivers/yunsun16.c

r14976	r14977
106	106	if (ACCESSING_BITS_0_7)
107	107	{
108	108	int bank = data & 3;
109		UINT8 *dst   = machine().region("oki")->base();
	109	UINT8 *dst   = memregion("oki")->base();
110	110	UINT8 *src   = dst + 0x80000 + 0x20000 * bank;
111	111	memcpy(dst + 0x20000, src, 0x20000);
112	112	}

src/mame/drivers/wiz.c

r14976	r14977
1070	1070	{ 5,7,3, 0x28 }
1071	1071	};
1072	1072	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1073		UINT8 *rom = machine.region("maincpu")->base();
1074		int size = machine.region("maincpu")->bytes();
	1073	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	1074	int size = machine.root_device().memregion("maincpu")->bytes();
1075	1075	UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
1076	1076	int A;
1077	1077	const UINT8 *tbl;

src/mame/drivers/calorie.c

r14976	r14977
117	117	static TILE_GET_INFO( get_bg_tile_info )
118	118	{
119	119	calorie_state *state = machine.driver_data<calorie_state>();
120		UINT8 *src = machine.region("user1")->base();
	120	UINT8 *src = state->memregion("user1")->base();
121	121	int bg_base = (state->m_bg_bank & 0x0f) * 0x200;
122	122	int code  = src[bg_base + tile_index] | (((src[bg_base + tile_index + 0x100]) & 0x10) << 4);
123	123	int color = src[bg_base + tile_index + 0x100] & 0x0f;
r14976	r14977
556	556	static DRIVER_INIT( calorieb )
557	557	{
558	558	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
559		space->set_decrypted_region(0x0000, 0x7fff, machine.region("maincpu")->base() + 0x10000);
	559	space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x10000);
560	560	}
561	561
562	562

src/mame/drivers/namcos11.c

r14976	r14977
617	617
618	618	INLINE void bankswitch_rom8( address_space *space, const char *bank, int n_data )
619	619	{
620		memory_set_bank( space->machine(), bank, ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
	620	space->machine().root_device().membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
621	621	}
622	622
623	623	static const char * const bankname[] = { "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
r14976	r14977
656	656	namcos11_state *state = space->machine().driver_data<namcos11_state>();
657	657
658	658	/* todo: verify behaviour */
659		memory_set_bank( space->machine(), bank, ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) );
	659	state->membank( bank )->set_entry( ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) );
660	660	}
661	661
662	662	WRITE32_MEMBER(namcos11_state::bankswitch_rom64_w)
r14976	r14977
877	877
878	878	// init banks
879	879	int bank;
880		UINT32 len = machine.region( "user2" )->bytes();
881		UINT8 *rgn = machine.region( "user2" )->base();
	880	UINT32 len = machine.root_device().memregion( "user2" )->bytes();
	881	UINT8 *rgn = machine.root_device().memregion( "user2" )->base();
882	882
883	883	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x1f000000, 0x1f0fffff, "bank1" );
884	884	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x1f100000, 0x1f1fffff, "bank2" );
r14976	r14977
891	891
892	892	for (bank = 0; bank < 8; bank++)
893	893	{
894		memory_configure_bank(machine, bankname[bank], 0, len / ( 1024 * 1024 ), rgn, 1024 * 1024 );
895		memory_set_bank(machine, bankname[bank], 0 );
	894	state->membank(bankname[bank])->configure_entries(0, len / ( 1024 * 1024 ), rgn, 1024 * 1024 );
	895	state->membank(bankname[bank])->set_entry(0 );
896	896	}
897	897
898	898	if (n_daughterboard == 32)

src/mame/drivers/itech8.c

r14976	r14977
657	657	/* make sure bank 0 is selected */
658	658	if (main_cpu_type == M6809 || main_cpu_type == HD6309)
659	659	{
660		memory_set_bankptr(machine, "bank1", &machine.region("maincpu")->base()[0x4000]);
	660	state->membank("bank1")->set_base(&state->memregion("maincpu")->base()[0x4000]);
661	661	machine.device("maincpu")->reset();
662	662	}
663	663
r14976	r14977
705	705	{
706	706	/* bit 0x20 on address 7 controls CPU banking */
707	707	if (offset / 2 == 7)
708		memory_set_bankptr(machine(), "bank1", &machine().region("maincpu")->base()[0x4000 + 0xc000 * ((data >> 5) & 1)]);
	708	membank("bank1")->set_base(&machine().root_device().memregion("maincpu")->base()[0x4000 + 0xc000 * ((data >> 5) & 1)]);
709	709
710	710	/* the rest is handled by the video hardware */
711	711	itech8_blitter_w(space, offset, data);
r14976	r14977
715	715	WRITE8_MEMBER(itech8_state::rimrockn_bank_w)
716	716	{
717	717	/* banking is controlled here instead of by the blitter output */
718		memory_set_bankptr(machine(), "bank1", &machine().region("maincpu")->base()[0x4000 + 0xc000 * (data & 3)]);
	718	membank("bank1")->set_base(&machine().root_device().memregion("maincpu")->base()[0x4000 + 0xc000 * (data & 3)]);
719	719	}
720	720
721	721

src/mame/drivers/galaxian.c

r14976	r14977
843	843	{
844	844	// read from a rom (which one?? "a-3e.k3" from audiocpu ($2700-$2fff) looks very suspicious)
845	845	galaxian_state *state = machine.driver_data<galaxian_state>();
846		UINT8 *rom = machine.region("audiocpu")->base();
	846	UINT8 *rom = state->memregion("audiocpu")->base();
847	847	state->m_protection_result = rom[0x2000 | (state->m_protection_state & 0x1fff)]; // probably needs a BITSWAP8
848	848
849	849	// and an irq on the main z80 afterwards
r14976	r14977
1087	1087	m_gmgalax_selected_game = newval;
1088	1088
1089	1089	/* select the bank and graphics bank based on it */
1090		memory_set_bank(machine(), "bank1", m_gmgalax_selected_game);
	1090	membank("bank1")->set_entry(m_gmgalax_selected_game);
1091	1091	galaxian_gfxbank_w(*space, 0, m_gmgalax_selected_game);
1092	1092
1093	1093	/* reset the stars */
r14976	r14977
1116	1116
1117	1117	WRITE8_MEMBER(galaxian_state::zigzag_bankswap_w)
1118	1118	{
1119		memory_set_bank(machine(), "bank1", data & 1);
1120		memory_set_bank(machine(), "bank2", ~data & 1);
	1119	membank("bank1")->set_entry(data & 1);
	1120	membank("bank2")->set_entry(~data & 1);
1121	1121	}
1122	1122
1123	1123
r14976	r14977
2533	2533
2534	2534	static void decode_mooncrst(running_machine &machine, int length, UINT8 *dest)
2535	2535	{
2536		UINT8 *rom = machine.region("maincpu")->base();
	2536	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
2537	2537	int offs;
2538	2538
2539	2539	for (offs = 0; offs < length; offs++)
r14976	r14977
2595	2595	{ 0,2,0,2 },
2596	2596	{ 1,4,1,4 }
2597	2597	};
2598		UINT8 *rombase = machine.region("maincpu")->base();
2599		UINT32 romlength = machine.region("maincpu")->bytes();
	2598	UINT8 *rombase = machine.root_device().memregion("maincpu")->base();
	2599	UINT32 romlength = machine.root_device().memregion("maincpu")->bytes();
2600	2600	UINT32 offs;
2601	2601
2602	2602	for (offs = 0; offs < romlength; offs++)
r14976	r14977
2612	2612
2613	2613	static void decode_dingoe(running_machine &machine)
2614	2614	{
2615		UINT8 *rombase = machine.region("maincpu")->base();
2616		UINT32 romlength = machine.region("maincpu")->bytes();
	2615	UINT8 *rombase = machine.root_device().memregion("maincpu")->base();
	2616	UINT32 romlength = machine.root_device().memregion("maincpu")->bytes();
2617	2617	UINT32 offs;
2618	2618
2619	2619	for (offs = 0; offs < romlength; offs++)
r14976	r14977
2635	2635
2636	2636	static void decode_frogger_sound(running_machine &machine)
2637	2637	{
2638		UINT8 *rombase = machine.region("audiocpu")->base();
	2638	UINT8 *rombase = machine.root_device().memregion("audiocpu")->base();
2639	2639	UINT32 offs;
2640	2640
2641	2641	/* the first ROM of the sound CPU has data lines D0 and D1 swapped */
r14976	r14977
2646	2646
2647	2647	static void decode_frogger_gfx(running_machine &machine)
2648	2648	{
2649		UINT8 *rombase = machine.region("gfx1")->base();
	2649	UINT8 *rombase = machine.root_device().memregion("gfx1")->base();
2650	2650	UINT32 offs;
2651	2651
2652	2652	/* the 2nd gfx ROM has data lines D0 and D1 swapped */
r14976	r14977
2657	2657
2658	2658	static void decode_anteater_gfx(running_machine &machine)
2659	2659	{
2660		UINT32 romlength = machine.region("gfx1")->bytes();
2661		UINT8 *rombase = machine.region("gfx1")->base();
	2660	UINT32 romlength = machine.root_device().memregion("gfx1")->bytes();
	2661	UINT8 *rombase = machine.root_device().memregion("gfx1")->base();
2662	2662	UINT8 *scratch = auto_alloc_array(machine, UINT8, romlength);
2663	2663	UINT32 offs;
2664	2664
r14976	r14977
2677	2677
2678	2678	static void decode_losttomb_gfx(running_machine &machine)
2679	2679	{
2680		UINT32 romlength = machine.region("gfx1")->bytes();
2681		UINT8 *rombase = machine.region("gfx1")->base();
	2680	UINT32 romlength = machine.root_device().memregion("gfx1")->bytes();
	2681	UINT8 *rombase = machine.root_device().memregion("gfx1")->base();
2682	2682	UINT8 *scratch = auto_alloc_array(machine, UINT8, romlength);
2683	2683	UINT32 offs;
2684	2684
r14976	r14977
2702	2702
2703	2703	/* Deryption worked out by hand by Chris Hardy. */
2704	2704
2705		RAM = machine.region("maincpu")->base();
	2705	RAM = machine.root_device().memregion("maincpu")->base();
2706	2706
2707	2707	for (i = 0;i < 0x1000;i++)
2708	2708	{
r14976	r14977
2810	2810
2811	2811	/* ROM is banked */
2812	2812	space->install_read_bank(0x0000, 0x3fff, "bank1");
2813		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x4000);
	2813	machine.root_device().membank("bank1")->configure_entries(0, 2, state->memregion("maincpu")->base() + 0x10000, 0x4000);
2814	2814
2815	2815	/* callback when the game select is toggled */
2816	2816	state->gmgalax_game_changed(*machine.m_portlist.first()->fieldlist().first(), NULL, 0, 0);
r14976	r14977
2869	2869	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
2870	2870
2871	2871	/* decrypt program code */
2872		decode_mooncrst(machine, 0x8000, machine.region("maincpu")->base());
	2872	decode_mooncrst(machine, 0x8000, machine.root_device().memregion("maincpu")->base());
2873	2873	}
2874	2874
2875	2875
r14976	r14977
2939	2939	int x;
2940	2940
2941	2941	sprintf(tmp,"game_%d_cpu", bank);
2942		srcregion = machine.region(tmp)->base();
2943		dstregion = machine.region("maincpu")->base();
	2942	srcregion = machine.root_device().memregion(tmp)->base();
	2943	dstregion = machine.root_device().memregion("maincpu")->base();
2944	2944	memcpy(dstregion, srcregion, 0x4000);
2945	2945
2946	2946	sprintf(tmp,"game_%d_temp", bank);
2947		srcregion = machine.region(tmp)->base();
2948		dstregion = machine.region("gfx1")->base();
	2947	srcregion = machine.root_device().memregion(tmp)->base();
	2948	dstregion = machine.root_device().memregion("gfx1")->base();
2949	2949	memcpy(dstregion, srcregion, 0x2000);
2950		dstregion = machine.region("gfx2")->base();
	2950	dstregion = machine.root_device().memregion("gfx2")->base();
2951	2951	memcpy(dstregion, srcregion, 0x2000);
2952	2952
2953	2953	if (from_game)
r14976	r14977
2965	2965	}
2966	2966
2967	2967	sprintf(tmp,"game_%d_prom", bank);
2968		srcregion = machine.region(tmp)->base();
2969		dstregion = machine.region("proms")->base();
	2968	srcregion = machine.root_device().memregion(tmp)->base();
	2969	dstregion = machine.root_device().memregion("proms")->base();
2970	2970	memcpy(dstregion, srcregion, 0x20);
2971	2971
2972	2972	PALETTE_INIT_CALL(galaxian);
r14976	r14977
3026	3026	/* make ROMs 2 & 3 swappable */
3027	3027	space->install_read_bank(0x2000, 0x2fff, "bank1");
3028	3028	space->install_read_bank(0x3000, 0x3fff, "bank2");
3029		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x2000, 0x1000);
3030		memory_configure_bank(machine, "bank2", 0, 2, machine.region("maincpu")->base() + 0x2000, 0x1000);
	3029	state->membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x2000, 0x1000);
	3030	state->membank("bank2")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x2000, 0x1000);
3031	3031
3032	3032	/* also re-install the fixed ROM area as a bank in order to inform the memory system that
3033	3033	the fixed area only extends to 0x1fff */
3034	3034	space->install_read_bank(0x0000, 0x1fff, "bank3");
3035		memory_set_bankptr(machine, "bank3", machine.region("maincpu")->base() + 0x0000);
	3035	state->membank("bank3")->set_base(state->memregion("maincpu")->base() + 0x0000);
3036	3036
3037	3037	/* handler for doing the swaps */
3038	3038	space->install_write_handler(0x7002, 0x7002, 0, 0x07f8, write8_delegate(FUNC(galaxian_state::zigzag_bankswap_w),state));
r14976	r14977
3147	3147	space->install_ram(0x8000, 0x87ff);
3148	3148
3149	3149	/* extend ROM */
3150		space->install_rom(0x0000, 0x5fff, machine.region("maincpu")->base());
	3150	space->install_rom(0x0000, 0x5fff, state->memregion("maincpu")->base());
3151	3151	}
3152	3152
3153	3153
r14976	r14977
3162	3162	space->install_ram(0x8000, 0x87ff);
3163	3163
3164	3164	/* extend ROM */
3165		space->install_rom(0x0000, 0x7fff, machine.region("maincpu")->base());
	3165	space->install_rom(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base());
3166	3166	}
3167	3167
3168	3168
3169	3169	static void mshuttle_decode(running_machine &machine, const UINT8 convtable[8][16])
3170	3170	{
3171	3171	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
3172		UINT8 *rom = machine.region("maincpu")->base();
	3172	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
3173	3173	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
3174	3174	int A;
3175	3175
r14976	r14977
3271	3271	3, 7, 7, 7   // ok!
3272	3272	};
3273	3273
3274		UINT8* romdata = machine.region("maincpu")->base();
3275		assert(machine.region("maincpu")->bytes() == 0x8000);
	3274	UINT8* romdata = machine.root_device().memregion("maincpu")->base();
	3275	assert(machine.root_device().memregion("maincpu")->bytes() == 0x8000);
3276	3276	UINT8 buf[0x8000];
3277	3277	memcpy(buf, romdata, 0x8000);
3278	3278
r14976	r14977
3312	3312	space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),state));
3313	3313
3314	3314	/* extra ROM */
3315		space->install_rom(0x5000, 0x67ff, machine.region("maincpu")->base() + 0x5000);
	3315	space->install_rom(0x5000, 0x67ff, state->memregion("maincpu")->base() + 0x5000);
3316	3316
3317	3317	/* install RAM at $4000-$4800 */
3318	3318	space->install_ram(0x4000, 0x47ff);
r14976	r14977
3337	3337	space->unmap_write(0xb004, 0xb004, 0, 0x07f8);
3338	3338
3339	3339	/* extend ROM */
3340		space->install_rom(0x0000, 0x47ff, machine.region("maincpu")->base());
	3340	space->install_rom(0x0000, 0x47ff, state->memregion("maincpu")->base());
3341	3341	}
3342	3342
3343	3343	/*************************************
r14976	r14977
3396	3396
3397	3397	/* sound board has space for extra ROM */
3398	3398	machine.device("audiocpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x3fff, "bank1");
3399		memory_set_bankptr(machine, "bank1", machine.region("audiocpu")->base());
	3399	state->membank("bank1")->set_base(state->memregion("audiocpu")->base());
3400	3400	}
3401	3401
3402	3402
r14976	r14977
3502	3502
3503	3503	/* extra ROM */
3504	3504	space->install_read_bank(0x5800, 0x67ff, "bank1");
3505		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x5800);
	3505	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x5800);
3506	3506
3507	3507	/* no background related */
3508	3508	//  space->nop_write(0x6803, 0x6803);
r14976	r14977
3510	3510	machine.device("audiocpu")->memory().space(AS_PROGRAM)->install_read_handler(0x3000, 0x3000, read8_delegate(FUNC(galaxian_state::scorpion_digitalker_intr_r),state));
3511	3511	/*
3512	3512	{
3513		const UINT8 *rom = machine.region("speech")->base();
	3513	const UINT8 *rom = state->memregion("speech")->base();
3514	3514	int i;
3515	3515
3516	3516	for (i = 0; i < 0x2c; i++)

src/mame/drivers/kickgoal.c

r14976	r14977
810	810	static DRIVER_INIT( kickgoal )
811	811	{
812	812	#if 0 /* we should find a real fix instead  */
813		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	813	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
814	814
815	815	/* fix "bug" that prevents game from writing to EEPROM */
816	816	rom[0x12b0/2] = 0x0001;

src/mame/drivers/hyprduel.c

r14976	r14977
201	201
202	202	READ16_MEMBER(hyprduel_state::hyprduel_bankedrom_r)
203	203	{
204		UINT8 *ROM = machine().region("gfx1")->base();
205		size_t  len = machine().region("gfx1")->bytes();
	204	UINT8 *ROM = memregion("gfx1")->base();
	205	size_t  len = memregion("gfx1")->bytes();
206	206
207	207	offset = offset * 2 + 0x10000 * (*m_rombank);
208	208
r14976	r14977
286	286
287	287	if (offset == 0xc / 2)
288	288	{
289		UINT8 *src = machine().region("gfx1")->base();
290		size_t  src_len = machine().region("gfx1")->bytes();
	289	UINT8 *src = memregion("gfx1")->base();
	290	size_t  src_len = memregion("gfx1")->bytes();
291	291
292	292	UINT32 tmap = (m_blitter_regs[0x00 / 2] << 16) + m_blitter_regs[0x02 / 2];
293	293	UINT32 src_offs = (m_blitter_regs[0x04 / 2] << 16) + m_blitter_regs[0x06 / 2];

src/mame/drivers/arcadecl.c

r14976	r14977
398	398
399	399	static DRIVER_INIT( sparkz )
400	400	{
401		memset(machine.region("gfx1")->base(), 0, machine.region("gfx1")->bytes());
	401	memset(machine.root_device().memregion("gfx1")->base(), 0, machine.root_device().memregion("gfx1")->bytes());
402	402	}
403	403
404	404

src/mame/drivers/suprslam.c

r14976	r14977
114	114
115	115	WRITE8_MEMBER(suprslam_state::suprslam_sh_bankswitch_w)
116	116	{
117		UINT8 *RAM = machine().region("audiocpu")->base();
	117	UINT8 *RAM = memregion("audiocpu")->base();
118	118	int bankaddress;
119	119
120	120	bankaddress = 0x10000 + (data & 0x03) * 0x8000;
121		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	121	membank("bank1")->set_base(&RAM[bankaddress]);
122	122	}
123	123
124	124	/*** MEMORY MAPS *************************************************************/

src/mame/drivers/calomega.c

r14976	r14977
3918	3918	{
3919	3919	/* background color is adjusted through RGB pots */
3920	3920	int x;
3921		UINT8 *BPR = machine.region( "proms" )->base();
	3921	UINT8 *BPR = machine.root_device().memregion( "proms" )->base();
3922	3922
3923	3923	for (x = 0x0000; x < 0x0400; x++)
3924	3924	{
r14976	r14977
3930	3930	static DRIVER_INIT( elgrande )
3931	3931	{
3932	3932	int x;
3933		UINT8 *BPR = machine.region( "proms" )->base();
	3933	UINT8 *BPR = machine.root_device().memregion( "proms" )->base();
3934	3934
3935	3935	/* background color is adjusted through RGB pots */
3936	3936	for (x = 0x0000; x < 0x0400; x++)
r14976	r14977
3944	3944	{
3945	3945	/* background color is adjusted through RGB pots */
3946	3946	int x;
3947		UINT8 *BPR = machine.region( "proms" )->base();
	3947	UINT8 *BPR = machine.root_device().memregion( "proms" )->base();
3948	3948
3949	3949	for (x = 0x0000; x < 0x0400; x++)
3950	3950	{
r14976	r14977
3957	3957	{
3958	3958	/* background color is adjusted through RGB pots */
3959	3959	int x;
3960		UINT8 *BPR = machine.region( "proms" )->base();
	3960	UINT8 *BPR = machine.root_device().memregion( "proms" )->base();
3961	3961
3962	3962	for (x = 0x0000; x < 0x0400; x++)
3963	3963	{
r14976	r14977
3969	3969	Start = $2042;  NMI = $26f8;
3970	3970	Also a fake vector at $3ff8-$3ff9. The code checks these values to continue.
3971	3971	*/
3972		UINT8 *PRGROM = machine.region( "maincpu" )->base();
	3972	UINT8 *PRGROM = machine.root_device().memregion( "maincpu" )->base();
3973	3973
3974	3974	PRGROM[0x3ff8] = 0x8e; /* checked by code */
3975	3975	PRGROM[0x3ff9] = 0x97; /* checked by code */

src/mame/drivers/sfkick.c

r14976	r14977
108	108	{
109	109	case 0: /* bios */
110	110	{
111		UINT8 *mem = machine.region("bios")->base();
112		memory_set_bankptr(machine,"bank1", mem);
113		memory_set_bankptr(machine,"bank2", mem+0x2000);
	111	UINT8 *mem = state->memregion("bios")->base();
	112	state->membank("bank1")->set_base(mem);
	113	state->membank("bank2")->set_base(mem+0x2000);
114	114	}
115	115	break;
116	116
117	117	case 1: /* ext rom */
118	118	{
119		UINT8 *mem = machine.region("extrom")->base();
120		memory_set_bankptr(machine,"bank1", mem+0x4000);
121		memory_set_bankptr(machine,"bank2", mem+0x6000);
	119	UINT8 *mem = machine.root_device().memregion("extrom")->base();
	120	state->membank("bank1")->set_base(mem+0x4000);
	121	state->membank("bank2")->set_base(mem+0x6000);
122	122	}
123	123	break;
124	124
125	125	case 2: /* banked */
126	126	{
127		UINT8 *mem = machine.region("banked")->base();
128		memory_set_bankptr(machine,"bank1", mem+0x2000*state->m_bank[0]);
129		memory_set_bankptr(machine,"bank2", mem+0x2000*state->m_bank[1]);
	127	UINT8 *mem = machine.root_device().memregion("banked")->base();
	128	state->membank("bank1")->set_base(mem+0x2000*state->m_bank[0]);
	129	state->membank("bank2")->set_base(mem+0x2000*state->m_bank[1]);
130	130	}
131	131	break;
132	132
133	133	case 3: /* unknown */
134	134	{
135		UINT8 *mem = machine.region("banked")->base();
136		memory_set_bankptr(machine,"bank1", mem+0x18000);
137		memory_set_bankptr(machine,"bank2", mem+0x18000);
	135	UINT8 *mem = machine.root_device().memregion("banked")->base();
	136	state->membank("bank1")->set_base(mem+0x18000);
	137	state->membank("bank2")->set_base(mem+0x18000);
138	138	}
139	139	break;
140	140	}
r14976	r14977
144	144	{
145	145	case 0: /* bios - upper part */
146	146	{
147		UINT8 *mem = machine.region("bios")->base();
148		memory_set_bankptr(machine,"bank3", mem+0x4000);
149		memory_set_bankptr(machine,"bank4", mem+0x6000);
	147	UINT8 *mem = machine.root_device().memregion("bios")->base();
	148	state->membank("bank3")->set_base(mem+0x4000);
	149	state->membank("bank4")->set_base(mem+0x6000);
150	150	}
151	151	break;
152	152
153	153	case 1:  /* unknown */
154	154	case 3:
155	155	{
156		UINT8 *mem = machine.region("banked")->base();
157		memory_set_bankptr(machine,"bank3", mem+0x18000);
158		memory_set_bankptr(machine,"bank4", mem+0x18000);
	156	UINT8 *mem = machine.root_device().memregion("banked")->base();
	157	state->membank("bank3")->set_base(mem+0x18000);
	158	state->membank("bank4")->set_base(mem+0x18000);
159	159	}
160	160	break;
161	161
162	162	case 2: /* banked */
163	163	{
164		UINT8 *mem = machine.region("banked")->base();
165		memory_set_bankptr(machine,"bank3", mem+0x2000*state->m_bank[2]);
166		memory_set_bankptr(machine,"bank4", mem+0x2000*state->m_bank[3]);
	164	UINT8 *mem = machine.root_device().memregion("banked")->base();
	165	state->membank("bank3")->set_base(mem+0x2000*state->m_bank[2]);
	166	state->membank("bank4")->set_base(mem+0x2000*state->m_bank[3]);
167	167	}
168	168	break;
169	169	}
r14976	r14977
173	173	{
174	174	case 0: /* cartridge */
175	175	{
176		UINT8 *mem = machine.region("cartridge")->base();
177		memory_set_bankptr(machine,"bank5", mem+0x4000);
178		memory_set_bankptr(machine,"bank6", mem+0x6000);
	176	UINT8 *mem = machine.root_device().memregion("cartridge")->base();
	177	state->membank("bank5")->set_base(mem+0x4000);
	178	state->membank("bank6")->set_base(mem+0x6000);
179	179	}
180	180	break;
181	181
182	182	case 1: /* unknown */
183	183	case 3:
184	184	{
185		UINT8 *mem = machine.region("banked")->base();
186		memory_set_bankptr(machine,"bank5", mem+0x18000);
187		memory_set_bankptr(machine,"bank6", mem+0x18000);
	185	UINT8 *mem = machine.root_device().memregion("banked")->base();
	186	state->membank("bank5")->set_base(mem+0x18000);
	187	state->membank("bank6")->set_base(mem+0x18000);
188	188	}
189	189	break;
190	190
191	191	case 2: /* banked */
192	192	{
193		UINT8 *mem = machine.region("banked")->base();
194		memory_set_bankptr(machine,"bank5", mem+0x2000*state->m_bank[4]);
195		memory_set_bankptr(machine,"bank6", mem+0x2000*state->m_bank[5]);
	193	UINT8 *mem = machine.root_device().memregion("banked")->base();
	194	state->membank("bank5")->set_base(mem+0x2000*state->m_bank[4]);
	195	state->membank("bank6")->set_base(mem+0x2000*state->m_bank[5]);
196	196	}
197	197	break;
198	198	}
r14976	r14977
203	203	case 0: /* unknown */
204	204	case 1:
205	205	{
206		UINT8 *mem = machine.region("banked")->base();
207		memory_set_bankptr(machine,"bank7", mem+0x18000);
208		memory_set_bankptr(machine,"bank8", mem+0x18000);
	206	UINT8 *mem = machine.root_device().memregion("banked")->base();
	207	state->membank("bank7")->set_base(mem+0x18000);
	208	state->membank("bank8")->set_base(mem+0x18000);
209	209	}
210	210	break;
211	211
212	212	case 2: /* banked */
213	213	{
214		UINT8 *mem = machine.region("banked")->base();
215		memory_set_bankptr(machine,"bank7", mem+0x2000*state->m_bank[6]);
216		memory_set_bankptr(machine,"bank8", mem+0x2000*state->m_bank[7]);
	214	UINT8 *mem = machine.root_device().memregion("banked")->base();
	215	state->membank("bank7")->set_base(mem+0x2000*state->m_bank[6]);
	216	state->membank("bank8")->set_base(mem+0x2000*state->m_bank[7]);
217	217	}
218	218	break;
219	219
220	220	case 3: /* RAM */
221	221	{
222		memory_set_bankptr(machine,"bank7", state->m_main_mem);
223		memory_set_bankptr(machine,"bank8", state->m_main_mem+0x2000);
	222	state->membank("bank7")->set_base(state->m_main_mem);
	223	state->membank("bank8")->set_base(state->m_main_mem+0x2000);
224	224	}
225	225	break;
226	226	}

src/mame/drivers/dgpix.c

r14976	r14977
77	77
78	78	READ32_MEMBER(dgpix_state::flash_r)
79	79	{
80		UINT32 *ROM = (UINT32 *)machine().region("user1")->base();
	80	UINT32 *ROM = (UINT32 *)machine().root_device().memregion("user1")->base();
81	81
82	82	if(offset >= (0x2000000 - m_flash_roms * 0x400000) / 4)
83	83	{
r14976	r14977
114	114	if(data == 0xd0d00000)
115	115	{
116	116	// point to game settings
117		UINT8 *rom = (UINT8 *)machine().region("user1")->base() + offset*4;
	117	UINT8 *rom = (UINT8 *)machine().root_device().memregion("user1")->base() + offset*4;
118	118
119	119	// erase one block
120	120	memset(rom, 0xff, 0x10000);
r14976	r14977
132	132	}
133	133	else
134	134	{
135		UINT16 *rom = (UINT16 *)machine().region("user1")->base();
	135	UINT16 *rom = (UINT16 *)machine().root_device().memregion("user1")->base();
136	136
137	137	// write game settings
138	138
r14976	r14977
223	223	if (read_or_write)
224	224	{
225	225	// point to game settings
226		UINT8 *rom = (UINT8 *)machine.region("user1")->base() + 0x1c00000 + 0x360000;
	226	UINT8 *rom = (UINT8 *)machine.root_device().memregion("user1")->base() + 0x1c00000 + 0x360000;
227	227	UINT8 tmp[0x40000];
228	228	int i;
229	229
r14976	r14977
236	236	else if (file)
237	237	{
238	238	// point to game settings
239		UINT8 *rom = (UINT8 *)machine.region("user1")->base() + 0x1c00000 + 0x360000;
	239	UINT8 *rom = (UINT8 *)machine.root_device().memregion("user1")->base() + 0x1c00000 + 0x360000;
240	240	UINT8 tmp[0x40000];
241	241	int i;
242	242
r14976	r14977
574	574	static DRIVER_INIT( xfiles )
575	575	{
576	576	dgpix_state *state = machine.driver_data<dgpix_state>();
577		UINT8 *rom = (UINT8 *)machine.region("user1")->base() + 0x1c00000;
	577	UINT8 *rom = (UINT8 *)state->memregion("user1")->base() + 0x1c00000;
578	578
579	579	rom[BYTE4_XOR_BE(0x3aa92e)] = 3;
580	580	rom[BYTE4_XOR_BE(0x3aa92f)] = 0;
r14976	r14977
592	592	static DRIVER_INIT( kdynastg )
593	593	{
594	594	dgpix_state *state = machine.driver_data<dgpix_state>();
595		UINT8 *rom = (UINT8 *)machine.region("user1")->base() + 0x1c00000;
	595	UINT8 *rom = (UINT8 *)state->memregion("user1")->base() + 0x1c00000;
596	596
597	597	rom[BYTE4_XOR_BE(0x3aaa10)] = 3; // 129f0 - nopped call
598	598	rom[BYTE4_XOR_BE(0x3aaa11)] = 0;

src/mame/drivers/atetris.c

r14976	r14977
486	486	static DRIVER_INIT( atetris )
487	487	{
488	488	atetris_state *state = machine.driver_data<atetris_state>();
489		UINT8 *rgn = machine.region("maincpu")->base();
	489	UINT8 *rgn = state->memregion("maincpu")->base();
490	490
491	491	slapstic_init(machine, 101);
492	492	state->m_slapstic_source = &rgn[0x10000];

src/mame/drivers/sangho.c

r14976	r14977
73	73	case 0:
74	74	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x3fff, "bank1");
75	75	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x0000, 0x3fff, "bank5");
76		memory_set_bankptr(machine, "bank1", state->m_ram);
77		memory_set_bankptr(machine, "bank5", state->m_ram);
	76	state->membank("bank1")->set_base(state->m_ram);
	77	state->membank("bank5")->set_base(state->m_ram);
78	78	break;
79	79	case 2:
80	80	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x3fff, "bank1");
81	81	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x0000, 0x3fff);
82		memory_set_bankptr(machine, "bank1", machine.region("user1")->base()+ 0x10000);
	82	state->membank("bank1")->set_base(state->memregion("user1")->base()+ 0x10000);
83	83	break;
84	84	case 1:
85	85	case 3:
r14976	r14977
95	95	case 0:
96	96	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x4000, 0x7fff, "bank2");
97	97	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x4000, 0x7fff, "bank6");
98		memory_set_bankptr(machine, "bank2", state->m_ram + 0x4000);
99		memory_set_bankptr(machine, "bank6", state->m_ram + 0x4000);
	98	state->membank("bank2")->set_base(state->m_ram + 0x4000);
	99	state->membank("bank6")->set_base(state->m_ram + 0x4000);
100	100	break;
101	101	case 2:
102	102	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x4000, 0x7fff, "bank2");
103	103	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x4000, 0x7fff);
104		memory_set_bankptr(machine, "bank2", machine.region("user1")->base()+ 0x18000);
	104	state->membank("bank2")->set_base(machine.root_device().memregion("user1")->base()+ 0x18000);
105	105	break;
106	106	case 3:
107	107	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x4000, 0x7fff, "bank2");
108	108	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x4000, 0x7fff);
109		memory_set_bankptr(machine, "bank2", machine.region("user1")->base()+ 0x20000 + (state->m_pzlestar_rom_bank*0x8000) + 0x4000);
	109	state->membank("bank2")->set_base(machine.root_device().memregion("user1")->base()+ 0x20000 + (state->m_pzlestar_rom_bank*0x8000) + 0x4000);
110	110	break;
111	111	case 1:
112	112	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_read(0x4000, 0x7fff);
r14976	r14977
121	121	case 0:
122	122	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0xbfff, "bank3");
123	123	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x8000, 0xbfff, "bank7");
124		memory_set_bankptr(machine, "bank3", state->m_ram + 0x8000);
125		memory_set_bankptr(machine, "bank7", state->m_ram + 0x8000);
	124	state->membank("bank3")->set_base(state->m_ram + 0x8000);
	125	state->membank("bank7")->set_base(state->m_ram + 0x8000);
126	126	break;
127	127	case 3:
128	128	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0xbfff, "bank3");
129	129	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x8000, 0xbfff);
130		memory_set_bankptr(machine, "bank3", machine.region("user1")->base()+ 0x20000 + (state->m_pzlestar_rom_bank*0x8000));
	130	state->membank("bank3")->set_base(machine.root_device().memregion("user1")->base()+ 0x20000 + (state->m_pzlestar_rom_bank*0x8000));
131	131	break;
132	132	case 1:
133	133	case 2:
r14976	r14977
143	143	case 0:
144	144	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xc000, 0xffff, "bank4");
145	145	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0xc000, 0xffff, "bank8");
146		memory_set_bankptr(machine, "bank4", state->m_ram + 0xc000);
147		memory_set_bankptr(machine, "bank8", state->m_ram + 0xc000);
	146	state->membank("bank4")->set_base(state->m_ram + 0xc000);
	147	state->membank("bank8")->set_base(state->m_ram + 0xc000);
148	148	break;
149	149	case 1:
150	150	case 2:
r14976	r14977
191	191	if (banknum & 0x80)
192	192	{
193	193	// ram
194		memory_set_bankptr(machine, read_bank_name, &state->m_ram[(banknum & 0x7f) * 0x4000]);
	194	state->membank(read_bank_name)->set_base(&state->m_ram[(banknum & 0x7f) * 0x4000]);
195	195	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(bank*0x4000, (bank+1)*0x4000 - 1, write_bank_name );
196		memory_set_bankptr(machine, write_bank_name, &state->m_ram[(banknum & 0x7f) * 0x4000]);
	196	state->membank(write_bank_name)->set_base(&state->m_ram[(banknum & 0x7f) * 0x4000]);
197	197	}
198	198	else
199	199	{
200	200	// rom 0
201		memory_set_bankptr(machine, read_bank_name, machine.region("user1")->base()+0x4000*banknum);
	201	state->membank(read_bank_name)->set_base(machine.root_device().memregion("user1")->base()+0x4000*banknum);
202	202	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(bank*0x4000, (bank+1)*0x4000 - 1);
203	203	}
204	204	}
205	205	else if (banktype == 0x82)
206	206	{
207		memory_set_bankptr(machine, read_bank_name, machine.region("user1")->base()+0x20000+banknum*0x4000);
	207	state->membank(read_bank_name)->set_base(machine.root_device().memregion("user1")->base()+0x20000+banknum*0x4000);
208	208	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(bank*0x4000, (bank+1)*0x4000 - 1);
209	209	}
210	210	else if (banktype == 0x80)
211	211	{
212		memory_set_bankptr(machine, read_bank_name, machine.region("user1")->base()+0x120000+banknum*0x4000);
	212	state->membank(read_bank_name)->set_base(machine.root_device().memregion("user1")->base()+0x120000+banknum*0x4000);
213	213	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(bank*0x4000, (bank+1)*0x4000 - 1);
214	214	}
215	215	else

src/mame/drivers/pachifev.c

r14976	r14977
261	261	}
262	262	else
263	263	{
264		UINT8 *ROM = device->machine().region("adpcm")->base();
	264	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base();
265	265
266	266	state->m_adpcm_data = ((state->m_trigger ? (ROM[state->m_adpcm_pos] & 0x0f) : (ROM[state->m_adpcm_pos] & 0xf0)>>4) );
267	267	msm5205_data_w(device,state->m_adpcm_data & 0xf);

src/mame/drivers/leland.c

r14976	r14977
1995	1995	leland_state *state = machine.driver_data<leland_state>();
1996	1996	/* master CPU bankswitching */
1997	1997	state->m_update_master_bank = cerberus_bankswitch;
1998		memory_set_bankptr(machine, "bank1", machine.region("master")->base() + 0x2000);
1999		memory_set_bankptr(machine, "bank2", machine.region("master")->base() + 0xa000);
2000		memory_set_bankptr(machine, "bank3", machine.region("slave")->base() + 0x2000);
	1998	state->membank("bank1")->set_base(state->memregion("master")->base() + 0x2000);
	1999	state->membank("bank2")->set_base(state->memregion("master")->base() + 0xa000);
	2000	state->membank("bank3")->set_base(state->memregion("slave")->base() + 0x2000);
2001	2001
2002	2002	/* set up the master CPU I/O ports */
2003	2003	init_master_ports(machine, 0x40, 0x80);

src/mame/drivers/lazercmd.c

r14976	r14977
789	789	static DRIVER_INIT( lazercmd )
790	790	{
791	791	int i, y;
792		UINT8 *gfx = machine.region("gfx1")->base();
	792	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
793	793
794	794	/******************************************************************
795	795	* To show the maze bit #6 and #7 of the video ram are used.
r14976	r14977
818	818	static DRIVER_INIT( medlanes )
819	819	{
820	820	int i, y;
821		UINT8 *gfx = machine.region("gfx1")->base();
	821	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
822	822
823	823	/******************************************************************
824	824	* To show the maze bit #6 and #7 of the video ram are used.
r14976	r14977
847	847	static DRIVER_INIT( bbonk )
848	848	{
849	849	int i, y;
850		UINT8 *gfx = machine.region("gfx1")->base();
	850	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
851	851
852	852	/******************************************************************
853	853	* To show the maze bit #6 and #7 of the video ram are used.

src/mame/drivers/pcat_nit.c

r14976	r14977
158	158
159	159	if ( data & 0x80 )
160	160	{
161		memory_set_bank(machine(), "rombank", (data & 0x3f) | 0x40 );
	161	membank("rombank")->set_entry((data & 0x3f) | 0x40 );
162	162	}
163	163	else
164	164	{
165		memory_set_bank(machine(), "rombank", data & 0x3f );
	165	membank("rombank")->set_entry(data & 0x3f );
166	166	}
167	167	}
168	168	else
r14976	r14977
172	172
173	173	space.install_readwrite_bank(0x000d8000, 0x000d9fff, "nvrambank" );
174	174
175		memory_set_bankptr(machine(), "nvrambank", m_banked_nvram);
	175	membank("nvrambank")->set_base(m_banked_nvram);
176	176
177	177	}
178	178	}
r14976	r14977
232	232
233	233	init_pc_common(machine, PCCOMMON_KEYBOARD_AT, streetg2_set_keyb_int);
234	234
235		memory_configure_bank(machine, "rombank", 0, 0x80, machine.region("game_prg")->base(), 0x8000 );
236		memory_set_bank(machine, "rombank", 0);
	235	machine.root_device().membank("rombank")->configure_entries(0, 0x80, machine.root_device().memregion("game_prg")->base(), 0x8000 );
	236	machine.root_device().membank("rombank")->set_entry(0);
237	237
238	238	//microtouch_init(machine, pcat_nit_microtouch_tx_callback, NULL);
239	239	}

src/mame/drivers/lordgun.c

r14976	r14977
57	57	static DRIVER_INIT( lordgun )
58	58	{
59	59	int i;
60		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	60	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
61	61
62	62	// Decryption
63	63
r14976	r14977
82	82	// From XingXing:
83	83	static DRIVER_INIT( aliencha )
84	84	{
85		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	85	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
86	86
87	87	// Protection
88	88
r14976	r14977
106	106
107	107	static DRIVER_INIT( alienchac )
108	108	{
109		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	109	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
110	110
111	111	// Protection
112	112

src/mame/drivers/segag80r.c

r14976	r14977
1405	1405
1406	1406	/* expand the background ROMs; A11/A12 of each ROM is independently controlled via */
1407	1407	/* banking */
1408		dest = machine.region(region)->base();
	1408	dest = machine.root_device().memregion(region)->base();
1409	1409	temp = auto_alloc_array(machine, UINT8, 0x4000);
1410	1410	memcpy(temp, dest, 0x4000);
1411	1411

src/mame/drivers/tmnt.c

r14976	r14977
236	236
237	237	WRITE8_MEMBER(tmnt_state::prmrsocr_audio_bankswitch_w)
238	238	{
239		memory_set_bank(machine(), "bank1", data & 7);
	239	membank("bank1")->set_entry(data & 7);
240	240	}
241	241
242	242
r14976	r14977
278	278	running_machine &machine = device.machine();
279	279	tmnt_state *state = machine.driver_data<tmnt_state>();
280	280	int i;
281		UINT8 *source = machine.region("title")->base();
	281	UINT8 *source = state->memregion("title")->base();
282	282
283	283	state->save_item(NAME(state->m_sampledata));
284	284
r14976	r14977
925	925	CellSrc = m_tmnt2_1c0800[0x00] | (m_tmnt2_1c0800[0x01] << 16 );
926	926	//        if (CellDest >= 0x180000 && CellDest < 0x183fe0) {
927	927	CellVar -= 0x104000;
928		src = (UINT16 *)(machine().region("maincpu")->base() + CellSrc);
	928	src = (UINT16 *)(machine().root_device().memregion("maincpu")->base() + CellSrc);
929	929
930	930	CellVar >>= 1;
931	931
r14976	r14977
2604	2604	static MACHINE_START( prmrsocr )
2605	2605	{
2606	2606	MACHINE_START_CALL(common);
2607		UINT8 *ROM = machine.region("audiocpu")->base();
2608		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	2607	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
	2608	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
2609	2609	}
2610	2610
2611	2611	static MACHINE_CONFIG_START( prmrsocr, tmnt_state )
r14976	r14977
4079	4079	be shuffled around because the ROMs are connected differently to the
4080	4080	051962 custom IC.
4081	4081	*/
4082		gfxdata = machine.region("gfx1")->base();
4083		len = machine.region("gfx1")->bytes();
	4082	gfxdata = machine.root_device().memregion("gfx1")->base();
	4083	len = machine.root_device().memregion("gfx1")->bytes();
4084	4084	for (i = 0; i < len; i += 4)
4085	4085	{
4086	4086	for (j = 0; j < 4; j++)
r14976	r14977
4100	4100	be shuffled around because the ROMs are connected differently to the
4101	4101	051937 custom IC.
4102	4102	*/
4103		gfxdata = machine.region("gfx2")->base();
4104		len = machine.region("gfx2")->bytes();
	4103	gfxdata = machine.root_device().memregion("gfx2")->base();
	4104	len = machine.root_device().memregion("gfx2")->bytes();
4105	4105	for (i = 0; i < len; i += 4)
4106	4106	{
4107	4107	for (j = 0; j < 4; j++)
r14976	r14977
4172	4172	be shuffled around because the ROMs are connected differently to the
4173	4173	051962 custom IC.
4174	4174	*/
4175		gfxdata = machine.region("gfx1")->base();
4176		len = machine.region("gfx1")->bytes();
	4175	gfxdata = machine.root_device().memregion("gfx1")->base();
	4176	len = machine.root_device().memregion("gfx1")->bytes();
4177	4177	for (i = 0; i < len; i += 4)
4178	4178	{
4179	4179	for (j = 0; j < 4; j++)
r14976	r14977
4193	4193	be shuffled around because the ROMs are connected differently to the
4194	4194	051937 custom IC.
4195	4195	*/
4196		gfxdata = machine.region("gfx2")->base();
4197		len = machine.region("gfx2")->bytes();
	4196	gfxdata = machine.root_device().memregion("gfx2")->base();
	4197	len = machine.root_device().memregion("gfx2")->bytes();
4198	4198	for (i = 0; i < len; i += 4)
4199	4199	{
4200	4200	for (j = 0; j < 4; j++)
r14976	r14977
4211	4211
4212	4212	temp = auto_alloc_array(machine, UINT8, len);
4213	4213	memcpy(temp, gfxdata, len);
4214		code_conv_table = &machine.region("proms")->base()[0x0000];
	4214	code_conv_table = &machine.root_device().memregion("proms")->base()[0x0000];
4215	4215	for (A = 0; A < len / 4; A++)
4216	4216	{
4217	4217	#define CA0 0

src/mame/drivers/raiden2.c

r14976	r14977
613	613
614	614	//  case 0x6ca:
615	615	//      logerror("select bank %d %04x\n", (data >> 15) & 1, data);
616		//      memory_set_bank(space.machine(), "bank1", (data >> 15) & 1);
	616	//      space.machine().root_device().membank("bank1")->set_entry((data >> 15) & 1);
617	617
618	618
619	619	static void combine32(UINT32 *val, int offset, UINT16 data, UINT16 mem_mask)
r14976	r14977
813	813
814	814	/* probably bit 3 is from 6c9 */
815	815	/* TODO: this doesn't work! */
816		memory_set_bank(space.machine(), "mainbank", 8 | (cop_bank & 0x7000) >> 12);
	816	space.machine().root_device().membank("mainbank")->set_entry(8 | (cop_bank & 0x7000) >> 12);
817	817	}
818	818	}
819	819
r14976	r14977
1059	1059	sprcpt_init();
1060	1060	MACHINE_RESET_CALL(seibu_sound);
1061	1061
1062		memory_set_bank(machine, "mainbank", 1);
	1062	state->membank("mainbank")->set_entry(1);
1063	1063
1064	1064	state->prg_bank = 0;
1065	1065	//cop_init();
r14976	r14977
1072	1072	sprcpt_init();
1073	1073	MACHINE_RESET_CALL(seibu_sound);
1074	1074
1075		memory_set_bank(machine, "mainbank", 8);
	1075	state->membank("mainbank")->set_entry(8);
1076	1076
1077	1077	state->prg_bank = 0x08;
1078	1078
r14976	r14977
1088	1088	sprcpt_init();
1089	1089	MACHINE_RESET_CALL(seibu_sound);
1090	1090
1091		memory_set_bank(machine, "mainbank", 1);
	1091	state->membank("mainbank")->set_entry(1);
1092	1092
1093	1093	state->prg_bank = 0;
1094	1094	//cop_init();
r14976	r14977
1103	1103	sprcpt_init();
1104	1104	MACHINE_RESET_CALL(seibu_sound);
1105	1105
1106		//memory_set_bank(machine, "mainbank", 1);
	1106	state->membank("mainbank")->set_entry(1);
1107	1107
1108	1108	//cop_init();
1109	1109	}
r14976	r14977
1122	1122	{
1123	1123	if(ACCESSING_BITS_8_15) {
1124	1124	logerror("select bank %d %04x\n", (data >> 15) & 1, data);
1125		memory_set_bank(space.machine(), "mainbank", !((data >> 15) & 1));
	1125	space.machine().root_device().membank("mainbank")->set_entry(!((data >> 15) & 1));
1126	1126	prg_bank = ((data >> 15) & 1);
1127	1127	}
1128	1128	}
r14976	r14977
2894	2894
2895	2895	static DRIVER_INIT (raiden2)
2896	2896	{
2897		memory_configure_bank(machine, "mainbank", 0, 2, machine.region("mainprg")->base(), 0x20000);
	2897	machine.root_device().membank("mainbank")->configure_entries(0, 2, machine.root_device().memregion("mainprg")->base(), 0x20000);
2898	2898	raiden2_decrypt_sprites(machine);
2899	2899	}
2900	2900
2901	2901	static DRIVER_INIT (raidendx)
2902	2902	{
2903		memory_configure_bank(machine, "mainbank", 0, 0x10, machine.region("mainprg")->base(), 0x20000);
	2903	machine.root_device().membank("mainbank")->configure_entries(0, 0x10, machine.root_device().memregion("mainprg")->base(), 0x20000);
2904	2904	raiden2_decrypt_sprites(machine);
2905	2905	}
2906	2906
2907	2907	static DRIVER_INIT (xsedae)
2908	2908	{
2909	2909	/* doesn't have banking */
2910		//memory_configure_bank(machine, "mainbank", 0, 2, machine.region("mainprg")->base(), 0x20000);
	2910	//machine.root_device().membank("mainbank")->configure_entries(0, 2, machine.root_device().memregion("mainprg")->base(), 0x20000);
2911	2911	}
2912	2912
2913	2913	static DRIVER_INIT (zeroteam)
2914	2914	{
2915		memory_configure_bank(machine, "mainbank", 0, 2, machine.region("mainprg")->base(), 0x20000);
	2915	machine.root_device().membank("mainbank")->configure_entries(0, 2, machine.root_device().memregion("mainprg")->base(), 0x20000);
2916	2916	zeroteam_decrypt_sprites(machine);
2917	2917	}
2918	2918

src/mame/drivers/mogura.c

r14976	r14977
32	32
33	33	static PALETTE_INIT( mogura )
34	34	{
35		const UINT8 *color_prom = machine.region("proms")->base();
	35	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
36	36	int i, j;
37	37
38	38	j = 0;

src/mame/drivers/taitojc.c

r14976	r14977
919	919
920	920	READ16_MEMBER(taitojc_state::dsp_rom_r)
921	921	{
922		UINT16 *rom = (UINT16*)machine().region("gfx2")->base();
	922	UINT16 *rom = (UINT16*)machine().root_device().memregion("gfx2")->base();
923	923	UINT16 data = rom[m_dsp_rom_pos++];
924	924
925	925	//mame_printf_debug("dsp_rom_r:  %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space.device()));

src/mame/drivers/magtouch.c

r14976	r14977
158	158	switch(offset)
159	159	{
160	160	case 6:
161		memory_set_bank(machine(), "rombank", data & 0x7f );
	161	membank("rombank")->set_entry(data & 0x7f );
162	162	break;
163	163	}
164	164	}
r14976	r14977
201	201
202	202	init_pc_common(machine, PCCOMMON_KEYBOARD_AT, magtouch_set_keyb_int);
203	203
204		memory_configure_bank(machine, "rombank", 0, 0x80, machine.region("game_prg")->base(), 0x8000 );
205		memory_set_bank(machine, "rombank", 0);
	204	machine.root_device().membank("rombank")->configure_entries(0, 0x80, machine.root_device().memregion("game_prg")->base(), 0x8000 );
	205	machine.root_device().membank("rombank")->set_entry(0);
206	206
207	207	//  microtouch_init(machine, magtouch_microtouch_tx_callback, NULL);
208	208	}

src/mame/drivers/igs009.c

r14976	r14977
783	783	static DRIVER_INIT( jingbell )
784	784	{
785	785	int i;
786		UINT8 *rom  = (UINT8 *)machine.region("maincpu")->base();
787		size_t size = machine.region("maincpu")->bytes();
	786	UINT8 *rom  = (UINT8 *)machine.root_device().memregion("maincpu")->base();
	787	size_t size = machine.root_device().memregion("maincpu")->bytes();
788	788
789	789	for (i=0; i<size; i++)
790	790	{

src/mame/drivers/spy.c

r14976	r14977
161	161	else
162	162	bank = ((data & 0x0e) >> 1);
163	163
164		memory_set_bank(machine(), "bank1", bank);
	164	membank("bank1")->set_entry(bank);
165	165	}
166	166
167	167	static void spy_collision( running_machine &machine )
r14976	r14977
498	498	static MACHINE_START( spy )
499	499	{
500	500	spy_state *state = machine.driver_data<spy_state>();
501		UINT8 *ROM = machine.region("maincpu")->base();
	501	UINT8 *ROM = state->memregion("maincpu")->base();
502	502
503		memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x2000);
	503	state->membank("bank1")->configure_entries(0, 12, &ROM[0x10000], 0x2000);
504	504
505	505	state->m_generic_paletteram_8.allocate(0x800);
506	506	memset(state->m_pmcram, 0, sizeof(state->m_pmcram));

src/mame/drivers/blitz68k.c

r14976	r14977
242	242
243	243	WRITE16_MEMBER(blitz68k_state::blit_copy_w)
244	244	{
245		UINT8 *blit_rom = machine().region("blitter")->base();
	245	UINT8 *blit_rom = memregion("blitter")->base();
246	246	UINT32 blit_dst_xpos;
247	247	UINT32 blit_dst_ypos;
248	248	int x,y,x_size,y_size;
r14976	r14977
430	430
431	431	WRITE8_MEMBER(blitz68k_state::blit_draw_w)
432	432	{
433		UINT8 *blit_rom  = machine().region("blitter")->base();
434		int blit_romsize = machine().region("blitter")->bytes();
	433	UINT8 *blit_rom  = memregion("blitter")->base();
	434	int blit_romsize = memregion("blitter")->bytes();
435	435	UINT32 blit_dst_xpos;
436	436	UINT32 blit_dst_ypos;
437	437	int x, y, x_size, y_size;
r14976	r14977
2690	2690
2691	2691	static DRIVER_INIT( bankrob )
2692	2692	{
2693		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2693	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2694	2694
2695	2695	// WRONG C8 #1
2696	2696	ROM[0xb5e0/2] = 0x6028;
r14976	r14977
2705	2705
2706	2706	static DRIVER_INIT( bankroba )
2707	2707	{
2708		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2708	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2709	2709
2710	2710	// WRONG C8 #1
2711	2711	ROM[0x11e4e/2] = 0x6028;
r14976	r14977
2720	2720
2721	2721	static DRIVER_INIT( cjffruit )
2722	2722	{
2723		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2723	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2724	2724
2725	2725	// WRONG C8 #1
2726	2726	ROM[0xf564/2] = 0x6028;
r14976	r14977
2731	2731
2732	2732	static DRIVER_INIT( deucesw2 )
2733	2733	{
2734		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2734	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2735	2735
2736	2736	// WRONG C8 #1
2737	2737	ROM[0x8fe4/2] = 0x6020;
r14976	r14977
2742	2742
2743	2743	static DRIVER_INIT( dualgame )
2744	2744	{
2745		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2745	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2746	2746
2747	2747	// WRONG C8 #1
2748	2748	ROM[0xa518/2] = 0x6024;
r14976	r14977
2753	2753
2754	2754	static DRIVER_INIT( hermit )
2755	2755	{
2756		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2756	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2757	2757
2758	2758	// WRONG C8 #1
2759	2759	ROM[0xdeba/2] = 0x602e;
r14976	r14977
2770	2770
2771	2771	static DRIVER_INIT( maxidbl )
2772	2772	{
2773		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2773	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2774	2774
2775	2775	// WRONG C8 #1
2776	2776	ROM[0xb384/2] = 0x6036;
r14976	r14977
2781	2781
2782	2782	static DRIVER_INIT( megadblj )
2783	2783	{
2784		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2784	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2785	2785
2786	2786	// WRONG C8 #1
2787	2787	ROM[0xe21c/2] = 0x6040;
r14976	r14977
2792	2792
2793	2793	static DRIVER_INIT( megadble )
2794	2794	{
2795		UINT16 *ROM = (UINT16 *)machine.region("maincpu")->base();
	2795	UINT16 *ROM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2796	2796
2797	2797	// WRONG C8 #1
2798	2798	ROM[0xcfc2/2] = 0x4e71;

src/mame/drivers/psikyo.c

r14976	r14977
337	337	// not at all sure about this, it seems to write 0 too often
338	338	UINT8 bank = (data & 0x00ff0000) >> 16;
339	339	if (bank < 4)
340		memory_set_bank(machine(), "okibank", bank);
	340	membank("okibank")->set_entry(bank);
341	341	}
342	342
343	343	if (ACCESSING_BITS_8_15)
r14976	r14977
403	403
404	404	WRITE8_MEMBER(psikyo_state::sngkace_sound_bankswitch_w)
405	405	{
406		memory_set_bank(machine(), "bank1", data & 0x03);
	406	membank("bank1")->set_entry(data & 0x03);
407	407	}
408	408
409	409	static ADDRESS_MAP_START( sngkace_sound_map, AS_PROGRAM, 8, psikyo_state )
r14976	r14977
427	427
428	428	WRITE8_MEMBER(psikyo_state::gunbird_sound_bankswitch_w)
429	429	{
430		memory_set_bank(machine(), "bank1", (data >> 4) & 0x03);
	430	membank("bank1")->set_entry((data >> 4) & 0x03);
431	431	}
432	432
433	433	static ADDRESS_MAP_START( gunbird_sound_map, AS_PROGRAM, 8, psikyo_state )
r14976	r14977
1811	1811	psikyo_state *state = machine.driver_data<psikyo_state>();
1812	1812
1813	1813	{
1814		UINT8 *RAM = machine.region("ymsnd")->base();
1815		int len = machine.region("ymsnd")->bytes();
	1814	UINT8 *RAM = machine.root_device().memregion("ymsnd")->base();
	1815	int len = state->memregion("ymsnd")->bytes();
1816	1816	int i;
1817	1817
1818	1818	/* Bit 6&7 of the samples are swapped. Naughty, naughty... */
r14976	r14977
1832	1832	state->m_ka302c_banking = 0; // SH201B doesn't have any gfx banking
1833	1833
1834	1834	/* setup audiocpu banks */
1835		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000, 0x8000);
	1835	state->membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x8000);
1836	1836
1837	1837	/* Enable other regions */
1838	1838	#if 0
1839	1839	if (!strcmp(machine.system().name,"sngkace"))
1840	1840	{
1841		UINT8 *ROM   =   machine.region("maincpu")->base();
	1841	UINT8 *ROM   =   machine.root_device().memregion("maincpu")->base();
1842	1842	ROM[0x995] = 0x4e;
1843	1843	ROM[0x994] = 0x71;
1844	1844	ROM[0x997] = 0x4e;
r14976	r14977
1892	1892
1893	1893	/* setup audiocpu banks */
1894	1894	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
1895		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
	1895	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
1896	1896	}
1897	1897
1898	1898	static DRIVER_INIT( gunbird )
r14976	r14977
1909	1909
1910	1910	/* setup audiocpu banks */
1911	1911	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
1912		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
	1912	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
1913	1913	}
1914	1914
1915	1915
r14976	r14977
1933	1933
1934	1934	/* setup audiocpu banks */
1935	1935	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
1936		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
	1936	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
1937	1937	}
1938	1938
1939	1939	static DRIVER_INIT( s1945a )
r14976	r14977
1956	1956
1957	1957	/* setup audiocpu banks */
1958	1958	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
1959		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
	1959	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
1960	1960	}
1961	1961
1962	1962	static DRIVER_INIT( s1945j )
r14976	r14977
1979	1979
1980	1980	/* setup audiocpu banks */
1981	1981	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
1982		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
	1982	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
1983	1983	}
1984	1984
1985	1985	static DRIVER_INIT( s1945jn )
r14976	r14977
1996	1996
1997	1997	/* setup audiocpu banks */
1998	1998	/* The banked rom is seen at 8200-ffff, so the last 0x200 bytes of the rom not reachable. */
1999		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
	1999	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000 + 0x200, 0x8000);
2000	2000	}
2001	2001
2002	2002	static DRIVER_INIT( s1945bl )
r14976	r14977
2011	2011
2012	2012	state->m_ka302c_banking = 1;
2013	2013
2014		memory_configure_bank(machine, "okibank", 0, 4, machine.region("oki")->base() + 0x30000, 0x10000);
2015		memory_set_bank(machine, "okibank", 0);
	2014	state->membank("okibank")->configure_entries(0, 4, state->memregion("oki")->base() + 0x30000, 0x10000);
	2015	state->membank("okibank")->set_entry(0);
2016	2016	}
2017	2017
2018	2018

src/mame/drivers/dacholer.c

r14976	r14977
606	606	/* guess: use the same resistor values as Crazy Climber (needs checking on the real HW) */
607	607	static PALETTE_INIT( dacholer )
608	608	{
609		const UINT8 *color_prom = machine.region("proms")->base();
	609	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
610	610	static const int resistances_rg[3] = { 1000, 470, 220 };
611	611	static const int resistances_b [2] = { 470, 220 };
612	612	double weights_rg[3], weights_b[2];

src/mame/drivers/esd16.c

r14976	r14977
226	226	int bank = data & 0xf;
227	227	if (data != bank)   logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(&space.device()), data);
228	228	if (bank >= 3)   bank += 1;
229		memory_set_bank(machine(), "bank1", bank);
	229	membank("bank1")->set_entry(bank);
230	230	}
231	231
232	232	static ADDRESS_MAP_START( multchmp_sound_map, AS_PROGRAM, 8, esd16_state )
r14976	r14977
518	518	static MACHINE_START( esd16 )
519	519	{
520	520	esd16_state *state = machine.driver_data<esd16_state>();
521		UINT8 *AUDIO = machine.region("audiocpu")->base();
	521	UINT8 *AUDIO = state->memregion("audiocpu")->base();
522	522
523		memory_configure_bank(machine, "bank1", 0, 17, &AUDIO[0x0000], 0x4000);
	523	state->membank("bank1")->configure_entries(0, 17, &AUDIO[0x0000], 0x4000);
524	524
525	525	state->m_audio_cpu = machine.device("audiocpu");
526	526	state->m_eeprom = machine.device<eeprom_device>("eeprom");

src/mame/drivers/model3.c

r14976	r14977
1277	1277	state->m_sound_irq_enable = 0;
1278	1278	state->m_sound_timer->adjust(attotime::never);
1279	1279
1280		memory_set_bankptr(machine,  "bank1", machine.region( "user1" )->base() + 0x800000 ); /* banked CROM */
	1280	state->membank("bank1")->set_base(machine.root_device().memregion( "user1" )->base() + 0x800000 ); /* banked CROM */
1281	1281
1282		memory_set_bankptr(machine, "bank4", machine.region("samples")->base() + 0x200000);
1283		memory_set_bankptr(machine, "bank5", machine.region("samples")->base() + 0x600000);
	1282	state->membank("bank4")->set_base(machine.root_device().memregion("samples")->base() + 0x200000);
	1283	state->membank("bank5")->set_base(machine.root_device().memregion("samples")->base() + 0x600000);
1284	1284
1285	1285	// copy the 68k vector table into RAM
1286		memcpy(state->m_soundram, machine.region("audiocpu")->base()+0x80000, 16);
	1286	memcpy(state->m_soundram, state->memregion("audiocpu")->base()+0x80000, 16);
1287	1287	machine.device("audiocpu")->reset();
1288	1288
1289	1289	model3_machine_init(machine, step);   // step 1.5
r14976	r14977
1589	1589	data >>= 56;
1590	1590	data = (~data) & 0x7;
1591	1591
1592		memory_set_bankptr(machine(),  "bank1", machine().region( "user1" )->base() + 0x800000 + (data * 0x800000)); /* banked CROM */
	1592	membank("bank1")->set_base(machine().root_device().memregion( "user1" )->base() + 0x800000 + (data * 0x800000)); /* banked CROM */
1593	1593	}
1594	1594	if (ACCESSING_BITS_24_31)
1595	1595	{
r14976	r14977
1845	1845	{
1846	1846	data >>= 56;
1847	1847	data = (~data) & 0xf;
1848		memory_set_bankptr(machine(),  "bank1", machine().region( "user1" )->base() + 0x800000 + (data * 0x800000)); /* banked CROM */
1849		memory_set_bankptr(machine(),  "bank2", machine().region( "user1" )->base() + 0x800000 + (data * 0x800000)); /* banked CROM */
	1848	membank("bank1")->set_base(machine().root_device().memregion( "user1" )->base() + 0x800000 + (data * 0x800000)); /* banked CROM */
	1849	membank("bank2")->set_base(machine().root_device().memregion( "user1" )->base() + 0x800000 + (data * 0x800000)); /* banked CROM */
1850	1850	}
1851	1851	}
1852	1852
r14976	r14977
5044	5044	WRITE16_MEMBER(model3_state::model3snd_ctrl)
5045	5045	{
5046	5046	// handle sample banking
5047		if (machine().region("scsp2")->bytes() > 0x800000)
	5047	if (machine().root_device().memregion("scsp2")->bytes() > 0x800000)
5048	5048	{
5049		UINT8 *snd = machine().region("scsp2")->base();
	5049	UINT8 *snd = memregion("scsp2")->base();
5050	5050	if (data & 0x20)
5051	5051	{
5052		memory_set_bankptr(machine(), "bank4", snd + 0x200000);
5053		memory_set_bankptr(machine(), "bank5", snd + 0x600000);
	5052	membank("bank4")->set_base(snd + 0x200000);
	5053	membank("bank5")->set_base(snd + 0x600000);
5054	5054	}
5055	5055	else
5056	5056	{
5057		memory_set_bankptr(machine(), "bank4", snd + 0x800000);
5058		memory_set_bankptr(machine(), "bank5", snd + 0xa00000);
	5057	membank("bank4")->set_base(snd + 0x800000);
	5058	membank("bank5")->set_base(snd + 0xa00000);
5059	5059	}
5060	5060	}
5061	5061	}
r14976	r14977
5302	5302	model3_state *state = machine.driver_data<model3_state>();
5303	5303	int start;
5304	5304	int i,j,x;
5305		UINT16 *vrom1 = (UINT16*)machine.region("user3")->base();
5306		UINT16 *vrom2 = (UINT16*)machine.region("user4")->base();
5307		int vrom_length = machine.region("user3")->bytes();
	5305	UINT16 *vrom1 = (UINT16*)machine.root_device().memregion("user3")->base();
	5306	UINT16 *vrom2 = (UINT16*)machine.root_device().memregion("user4")->base();
	5307	int vrom_length = state->memregion("user3")->bytes();
5308	5308	UINT16 *vrom;
5309	5309
5310	5310	state->m_vrom = auto_alloc_array(machine, UINT32, 0x4000000/4);
r14976	r14977
5369	5369	static DRIVER_INIT( lostwsga )
5370	5370	{
5371	5371	model3_state *state = machine.driver_data<model3_state>();
5372		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5372	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5373	5373
5374	5374	DRIVER_INIT_CALL(model3_15);
5375	5375	/* TODO: there's an M68K device at 0xC0000000 - FF, maybe lightgun controls ? */
r14976	r14977
5381	5381	static DRIVER_INIT( scud )
5382	5382	{
5383	5383	model3_state *state = machine.driver_data<model3_state>();
5384		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5384	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5385	5385
5386	5386	DRIVER_INIT_CALL(model3_15);
5387	5387	/* TODO: network device at 0xC0000000 - FF */
r14976	r14977
5394	5394	static DRIVER_INIT( scudp )
5395	5395	{
5396	5396	model3_state *state = machine.driver_data<model3_state>();
5397		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5397	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5398	5398
5399	5399	DRIVER_INIT_CALL(model3_15);
5400	5400	/* TODO: network device at 0xC0000000 - FF */
r14976	r14977
5412	5412	static DRIVER_INIT( lemans24 )
5413	5413	{
5414	5414	model3_state *state = machine.driver_data<model3_state>();
5415		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5415	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5416	5416	DRIVER_INIT_CALL(model3_15);
5417	5417
5418	5418	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xc1000000, 0xc10000ff, read64_delegate(FUNC(model3_state::scsi_r),state), write64_delegate(FUNC(model3_state::scsi_w),state));
r14976	r14977
5426	5426
5427	5427	static DRIVER_INIT( vf3 )
5428	5428	{
5429		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5429	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5430	5430
5431	5431	DRIVER_INIT_CALL(model3_10);
5432	5432
r14976	r14977
5440	5440	static DRIVER_INIT( vs215 )
5441	5441	{
5442	5442	model3_state *state = machine.driver_data<model3_state>();
5443		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5443	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5444	5444
5445	5445	rom[(0x70dde0^4)/4] = 0x60000000;
5446	5446	rom[(0x70e6f0^4)/4] = 0x60000000;
r14976	r14977
5461	5461	static DRIVER_INIT( vs29815 )
5462	5462	{
5463	5463	model3_state *state = machine.driver_data<model3_state>();
5464		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5464	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5465	5465
5466	5466	rom[(0x6028ec^4)/4] = 0x60000000;
5467	5467	rom[(0x60290c^4)/4] = 0x60000000;
r14976	r14977
5481	5481	static DRIVER_INIT( bass )
5482	5482	{
5483	5483	model3_state *state = machine.driver_data<model3_state>();
5484		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5484	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5485	5485
5486	5486	rom[(0x7999a8^4)/4] = 0x60000000;
5487	5487	rom[(0x7999c8^4)/4] = 0x60000000;
r14976	r14977
5513	5513
5514	5514	static DRIVER_INIT( vs2 )
5515	5515	{
5516		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5516	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5517	5517
5518	5518	DRIVER_INIT_CALL(model3_20);
5519	5519
r14976	r14977
5523	5523
5524	5524	static DRIVER_INIT( vs298 )
5525	5525	{
5526		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5526	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5527	5527
5528	5528	DRIVER_INIT_CALL(model3_20);
5529	5529
r14976	r14977
5534	5534
5535	5535	static DRIVER_INIT( vs2v991 )
5536	5536	{
5537		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5537	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5538	5538
5539	5539	DRIVER_INIT_CALL(model3_20);
5540	5540
r14976	r14977
5544	5544
5545	5545	static DRIVER_INIT( vs299b )
5546	5546	{
5547		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5547	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5548	5548
5549	5549	DRIVER_INIT_CALL(model3_20);
5550	5550
r14976	r14977
5554	5554
5555	5555	static DRIVER_INIT( vs299a )
5556	5556	{
5557		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5557	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5558	5558
5559	5559	DRIVER_INIT_CALL(model3_20);
5560	5560
r14976	r14977
5564	5564
5565	5565	static DRIVER_INIT( vs299 )
5566	5566	{
5567		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5567	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5568	5568
5569	5569	DRIVER_INIT_CALL(model3_20);
5570	5570
r14976	r14977
5575	5575	static DRIVER_INIT( harley )
5576	5576	{
5577	5577	model3_state *state = machine.driver_data<model3_state>();
5578		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5578	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5579	5579	DRIVER_INIT_CALL(model3_20);
5580	5580
5581	5581	state->m_network_ram = auto_alloc_array_clear(machine, UINT64, 0x10000);
r14976	r14977
5591	5591	static DRIVER_INIT( harleyb )
5592	5592	{
5593	5593	model3_state *state = machine.driver_data<model3_state>();
5594		//UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5594	//UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5595	5595	DRIVER_INIT_CALL(model3_20);
5596	5596
5597	5597	state->m_network_ram = auto_alloc_array_clear(machine, UINT64, 0x10000);
r14976	r14977
5607	5607
5608	5608	static DRIVER_INIT( srally2 )
5609	5609	{
5610		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5610	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5611	5611	DRIVER_INIT_CALL(model3_20);
5612	5612
5613	5613	rom[(0x7c0c4^4)/4] = 0x60000000;
r14976	r14977
5617	5617
5618	5618	static DRIVER_INIT( swtrilgy )
5619	5619	{
5620		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5620	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5621	5621	DRIVER_INIT_CALL(model3_20);
5622	5622
5623	5623	rom[(0xf0e48^4)/4] = 0x60000000;
r14976	r14977
5628	5628
5629	5629	static DRIVER_INIT( swtrilga )
5630	5630	{
5631		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5631	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5632	5632	DRIVER_INIT_CALL(model3_20);
5633	5633
5634	5634	rom[(0xf6dd0^4)/4] = 0x60000000;
r14976	r14977
5636	5636
5637	5637	static DRIVER_INIT( von2 )
5638	5638	{
5639		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5639	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5640	5640	DRIVER_INIT_CALL(model3_20);
5641	5641
5642	5642	rom[(0x189168^4)/4] = 0x60000000;
r14976	r14977
5648	5648
5649	5649	static DRIVER_INIT( dirtdvls )
5650	5650	{
5651		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5651	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5652	5652	DRIVER_INIT_CALL(model3_20);
5653	5653
5654	5654	rom[(0x0600a0^4)/4] = 0x60000000;
r14976	r14977
5662	5662	static DRIVER_INIT( daytona2 )
5663	5663	{
5664	5664	model3_state *state = machine.driver_data<model3_state>();
5665		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5665	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5666	5666	DRIVER_INIT_CALL(model3_20);
5667	5667
5668	5668	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xc3800000, 0xc3800007, write64_delegate(FUNC(model3_state::daytona2_rombank_w),state));
r14976	r14977
5677	5677	static DRIVER_INIT( dayto2pe )
5678	5678	{
5679	5679	model3_state *state = machine.driver_data<model3_state>();
5680		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5680	UINT32 *rom = (UINT32*)state->memregion("user1")->base();
5681	5681	DRIVER_INIT_CALL(model3_20);
5682	5682
5683	5683	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0xc3800000, 0xc3800007, write64_delegate(FUNC(model3_state::daytona2_rombank_w),state));
r14976	r14977
5692	5692
5693	5693	static DRIVER_INIT( spikeout )
5694	5694	{
5695		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5695	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5696	5696	DRIVER_INIT_CALL(model3_20);
5697	5697
5698	5698	rom[(0x6059cc^4)/4] = 0x60000000;
r14976	r14977
5701	5701
5702	5702	static DRIVER_INIT( spikeofe )
5703	5703	{
5704		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5704	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5705	5705	DRIVER_INIT_CALL(model3_20);
5706	5706
5707	5707	rom[(0x6059cc^4)/4] = 0x60000000;
r14976	r14977
5710	5710
5711	5711	static DRIVER_INIT( eca )
5712	5712	{
5713		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5713	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5714	5714	DRIVER_INIT_CALL(model3_20);
5715	5715
5716	5716	rom[(0x535580^4)/4] = 0x60000000;
r14976	r14977
5720	5720
5721	5721	static DRIVER_INIT( skichamp )
5722	5722	{
5723		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5723	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5724	5724	DRIVER_INIT_CALL(model3_20);
5725	5725
5726	5726	rom[(0x5263c8^4)/4] = 0x60000000;
r14976	r14977
5731	5731
5732	5732	static DRIVER_INIT( oceanhun )
5733	5733	{
5734		UINT32 *rom = (UINT32*)machine.region("user1")->base();
	5734	UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
5735	5735	DRIVER_INIT_CALL(model3_20);
5736	5736
5737	5737	rom[(0x57995c^4)/4] = 0x60000000;   // decrementer

src/mame/drivers/iqblock.c

r14976	r14977
95	95
96	96	READ8_MEMBER(iqblock_state::extrarom_r)
97	97	{
98		return machine().region("user1")->base()[offset];
	98	return memregion("user1")->base()[offset];
99	99	}
100	100
101	101
r14976	r14977
431	431	static DRIVER_INIT( iqblock )
432	432	{
433	433	iqblock_state *state = machine.driver_data<iqblock_state>();
434		UINT8 *rom = machine.region("maincpu")->base();
	434	UINT8 *rom = state->memregion("maincpu")->base();
435	435	int i;
436	436
437	437	/* decrypt the program ROM */
r14976	r14977
454	454	static DRIVER_INIT( grndtour )
455	455	{
456	456	iqblock_state *state = machine.driver_data<iqblock_state>();
457		UINT8 *rom = machine.region("maincpu")->base();
	457	UINT8 *rom = state->memregion("maincpu")->base();
458	458	int i;
459	459
460	460	/* decrypt the program ROM */

src/mame/drivers/cb2001.c

r14976	r14977
776	776	{
777	777	int r,g,b;
778	778
779		UINT8*proms = machine.region("proms")->base();
780		int length = machine.region("proms")->bytes();
	779	UINT8*proms = machine.root_device().memregion("proms")->base();
	780	int length = machine.root_device().memregion("proms")->bytes();
781	781	UINT16 dat;
782	782
783	783	dat = (proms[0x000+i] << 8) | proms[0x200+i];

src/mame/drivers/xexex.c

r14976	r14977
237	237	static void reset_sound_region(running_machine &machine)
238	238	{
239	239	xexex_state *state = machine.driver_data<xexex_state>();
240		memory_set_bank(machine, "bank2", state->m_cur_sound_region & 0x07);
	240	state->membank("bank2")->set_entry(state->m_cur_sound_region & 0x07);
241	241	}
242	242
243	243	WRITE8_MEMBER(xexex_state::sound_bankswitch_w)
r14976	r14977
456	456	static MACHINE_START( xexex )
457	457	{
458	458	xexex_state *state = machine.driver_data<xexex_state>();
459		UINT8 *ROM = machine.region("audiocpu")->base();
	459	UINT8 *ROM = state->memregion("audiocpu")->base();
460	460
461		memory_configure_bank(machine, "bank2", 0, 8, &ROM[0x10000], 0x4000);
462		memory_set_bank(machine, "bank2", 0);
	461	state->membank("bank2")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
	462	state->membank("bank2")->set_entry(0);
463	463
464	464	state->m_maincpu = machine.device("maincpu");
465	465	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
684	684	if (!strcmp(machine.system().name, "xexex"))
685	685	{
686	686	// Invulnerability
687		//      *(UINT16 *)(machine.region("maincpu")->base() + 0x648d4) = 0x4a79;
688		//      *(UINT16 *)(machine.region("maincpu")->base() + 0x00008) = 0x5500;
	687	//      *(UINT16 *)(machine.root_device().memregion("maincpu")->base() + 0x648d4) = 0x4a79;
	688	//      *(UINT16 *)(state->memregion("maincpu")->base() + 0x00008) = 0x5500;
689	689	state->m_strip_0x1a = 1;
690	690	}
691	691	}

src/mame/drivers/wallc.c

r14976	r14977
94	94
95	95	static PALETTE_INIT( wallc )
96	96	{
97		const UINT8 *color_prom = machine.region("proms")->base();
	97	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
98	98	int i;
99	99
100	100	static const int resistances_rg[2] = { 330, 220 };
r14976	r14977
259	259	UINT8 c;
260	260	UINT32 i;
261	261
262		UINT8 *ROM = machine.region("maincpu")->base();
	262	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
263	263
264	264	for (i=0; i<0x2000*2; i++)
265	265	{
r14976	r14977
274	274	UINT8 c;
275	275	UINT32 i;
276	276
277		UINT8 *ROM = machine.region("maincpu")->base();
	277	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
278	278
279	279	for (i=0; i<0x4000; i++)
280	280	{

src/mame/drivers/marinedt.c

r14976	r14977
187	187	//xxxx---- unknown
188	188	//----xxxx x pos in tile ram
189	189
190		UINT8 *RAM = machine().region("maincpu")->base();
	190	UINT8 *RAM = memregion("maincpu")->base();
191	191
192	192	if (RAM[0x430e])
193	193	--m_cx;
r14976	r14977
445	445
446	446	static PALETTE_INIT( marinedt )
447	447	{
448		const UINT8 *color_prom = machine.region("proms")->base();
	448	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
449	449	int i,r,b,g;
450	450
451	451	for (i = 0; i < machine.total_colors(); i++)

src/mame/drivers/skullxbo.c

r14976	r14977
619	619	static DRIVER_INIT( skullxbo )
620	620	{
621	621	atarijsa_init(machine, "FF5802", 0x0080);
622		memset(machine.region("gfx1")->base() + 0x170000, 0, 0x20000);
	622	memset(machine.root_device().memregion("gfx1")->base() + 0x170000, 0, 0x20000);
623	623	}
624	624
625	625

src/mame/drivers/sliver.c

r14976	r14977
165	165	{
166	166	sliver_state *state = machine.driver_data<sliver_state>();
167	167	int tmpptr=0;
168		const UINT8 *rom = machine.region("user1")->base();
	168	const UINT8 *rom = state->memregion("user1")->base();
169	169
170	170	while (tmpptr < state->m_fptr)
171	171	{
r14976	r14977
239	239	cinfo.err = jpeg_std_error(&jerr);
240	240	jpeg_create_decompress(&cinfo);
241	241
242		jpeg_mem_src(&cinfo, machine.region("user2")->base()+addr, machine.region("user2")->bytes()-addr);
	242	jpeg_mem_src(&cinfo, machine.root_device().memregion("user2")->base()+addr, machine.root_device().memregion("user2")->bytes()-addr);
243	243
244	244	jpeg_read_header(&cinfo, TRUE);
245	245	jpeg_start_decompress(&cinfo);
r14976	r14977
349	349
350	350	WRITE8_MEMBER(sliver_state::oki_setbank)
351	351	{
352		UINT8 *sound = machine().region("oki")->base();
	352	UINT8 *sound = memregion("oki")->base();
353	353	int bank=(data^0xff)&3; //xor or not ?
354	354	memcpy(sound+0x20000, sound+0x100000+0x20000*bank, 0x20000);
355	355	}

src/mame/drivers/epos.c

r14976	r14977
44	44
45	45	//  logerror("PC %08x: ctr=%04x\n",cpu_get_pc(&space.device()), m_counter);
46	46
47		memory_set_bank(machine(), "bank1", m_counter);
	47	membank("bank1")->set_entry(m_counter);
48	48
49	49	// is the 2nd bank changed by the counter or it always uses the 1st key?
50	50	}
r14976	r14977
101	101	*/
102	102	static WRITE8_DEVICE_HANDLER( write_prtc )
103	103	{
104		memory_set_bank(device->machine(), "bank2", data & 0x01);
	104	device->machine().root_device().membank("bank2")->set_entry(data & 0x01);
105	105	}
106	106
107	107	static const ppi8255_interface ppi8255_intf =
r14976	r14977
381	381
382	382	static MACHINE_START( dealer )
383	383	{
384		UINT8 *ROM = machine.region("maincpu")->base();
385		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x0000], 0x10000);
386		memory_configure_bank(machine, "bank2", 0, 2, &ROM[0x6000], 0x1000);
	384	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	385	machine.root_device().membank("bank1")->configure_entries(0, 4, &ROM[0x0000], 0x10000);
	386	machine.root_device().membank("bank2")->configure_entries(0, 2, &ROM[0x6000], 0x1000);
387	387
388		memory_set_bank(machine, "bank1", 0);
389		memory_set_bank(machine, "bank2", 0);
	388	machine.root_device().membank("bank1")->set_entry(0);
	389	machine.root_device().membank("bank2")->set_entry(0);
390	390
391	391	MACHINE_START_CALL(epos);
392	392	}
r14976	r14977
607	607
608	608	static DRIVER_INIT( dealer )
609	609	{
610		UINT8 *rom = machine.region("maincpu")->base();
	610	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
611	611	int A;
612	612
613	613	/* Key 0 */

src/mame/drivers/cps3.c

r14976	r14977
663	663	{
664	664	cps3_state *state = machine.driver_data<cps3_state>();
665	665	int i;
666		UINT32 *coderegion = (UINT32*)machine.region("user1")->base();
	666	UINT32 *coderegion = (UINT32*)machine.root_device().memregion("user1")->base();
667	667
668		state->m_decrypted_bios = (UINT32*)machine.region("user1")->base();
	668	state->m_decrypted_bios = (UINT32*)state->memregion("user1")->base();
669	669
670	670	for (i=0;i<0x80000;i+=4)
671	671	{
r14976	r14977
701	701	state->m_altEncryption = altEncryption;
702	702
703	703	// cache pointers to regions
704		state->m_user4region = machine.region("user4")->base();
705		state->m_user5region = machine.region("user5")->base();
	704	state->m_user4region = machine.root_device().memregion("user4")->base();
	705	state->m_user5region = state->memregion("user5")->base();
706	706
707	707	if (!state->m_user4region) state->m_user4region = auto_alloc_array(machine, UINT8, USER4REGION_LENGTH);
708	708	if (!state->m_user5region) state->m_user5region = auto_alloc_array(machine, UINT8, USER5REGION_LENGTH);
r14976	r14977
1283	1283	/* BIOS ROM */
1284	1284	if (address < 0x80000)
1285	1285	{
1286		direct.explicit_configure(0x00000, 0x7ffff, 0x7ffff, *direct.space().machine().region("user1"));
	1286	direct.explicit_configure(0x00000, 0x7ffff, 0x7ffff, *direct.space().machine().root_device().memregion("user1"));
1287	1287	return ~0;
1288	1288	}
1289	1289	/* RAM */
r14976	r14977
3271	3271	OCEANIA 7
3272	3272	ASIA NCD 8
3273	3273
3274		UINT32 *rom =  (UINT32*)machine.region ( "user1" )->base();
	3274	UINT32 *rom =  (UINT32*)machine.root_device().memregion ( "user1" )->base();
3275	3275	rom[0x1fed8/4]^=0x00000001; // clear region to 0 (invalid)
3276	3276	rom[0x1fed8/4]^=0x00000008; // region 8 - ASIA NO CD - doesn't actually skip the CD
3277	3277	// test on startup, only during game, must be another flag
r14976	r14977
3296	3296
3297	3297	// bios rom also lists korea, but game rom does not.
3298	3298
3299		UINT32 *rom =  (UINT32*)machine.region ( "user1" )->base();
	3299	UINT32 *rom =  (UINT32*)machine.root_device().memregion ( "user1" )->base();
3300	3300	rom[0x1fec8/4]^=0x00000001; // region (clear region)
3301	3301	rom[0x1fec8/4]^=0x00000008; // region
3302	3302	rom[0x1fecc/4]^=0x01000000; // nocd - this ONLY skips the cd check in the bios test
r14976	r14977
3318	3318	OCEANIA 7
3319	3319	ASIA 8
3320	3320
3321		UINT32 *rom =  (UINT32*)machine.region ( "user1" )->base();
	3321	UINT32 *rom =  (UINT32*)machine.root_device().memregion ( "user1" )->base();
3322	3322	rom[0x1fec8/4]^=0x00000001; // region (clear region)
3323	3323	rom[0x1fec8/4]^=0x00000008; // region
3324	3324	rom[0x1fecc/4]^=0x01000000; // nocd - this ONLY skips the cd check in the bios test
r14976	r14977
3342	3342
3343	3343	DEVELOPMENT VERSION add 0x70 mask!
3344	3344
3345		UINT32 *rom =  (UINT32*)machine.region ( "user1" )->base();
	3345	UINT32 *rom =  (UINT32*)machine.root_device().memregion ( "user1" )->base();
3346	3346	rom[0x1fec8/4]^=0x00000001; // region hack (clear jpn)
3347	3347
3348	3348	rom[0x1fec8/4]^=0x00000004; // region
r14976	r14977
3363	3363	BRAZIL 6
3364	3364	OCEANIA 7
3365	3365
3366		UINT32 *rom =  (UINT32*)machine.region ( "user1" )->base();
	3366	UINT32 *rom =  (UINT32*)machine.root_device().memregion ( "user1" )->base();
3367	3367	rom[0x1fec8/4]^=0x00000004; // region (clear region)
3368	3368	rom[0x1fec8/4]^=0x00000001; // region
3369	3369	rom[0x1fecc/4]^=0x01000000; // nocd
r14976	r14977
3385	3385
3386	3386	DEVELOPMENT VERSION add 0x70 mask!
3387	3387
3388		UINT32 *rom =  (UINT32*)machine.region ( "user1" )->base();
	3388	UINT32 *rom =  (UINT32*)machine.root_device().memregion ( "user1" )->base();
3389	3389	rom[0x1fec8/4]^=0x00000001; // region (clear jpn)
3390	3390	rom[0x1fec8/4]^=0x00000002; // region
3391	3391	rom[0x1fec8/4]^=0x00000070; // DEV mode

src/mame/drivers/glass.c

r14976	r14977
54	54
55	55	WRITE16_MEMBER(glass_state::OKIM6295_bankswitch_w)
56	56	{
57		UINT8 *RAM = machine().region("oki")->base();
	57	UINT8 *RAM = memregion("oki")->base();
58	58
59	59	if (ACCESSING_BITS_0_7)
60	60	memcpy(&RAM[0x30000], &RAM[0x40000 + (data & 0x0f) * 0x10000], 0x10000);
r14976	r14977
297	297	int i;
298	298
299	299	/* get a pointer to the source data */
300		UINT8 *src = (UINT8 *)machine.region(src_reg)->base();
	300	UINT8 *src = (UINT8 *)machine.root_device().memregion(src_reg)->base();
301	301
302	302	/* get a pointer to the destination data */
303		UINT8 *dst = (UINT8 *)machine.region(dst_reg)->base();
	303	UINT8 *dst = (UINT8 *)machine.root_device().memregion(dst_reg)->base();
304	304
305	305	/* fill destination areas with the proper data */
306	306	for (i = 0; i < length / 2; i++)

src/mame/drivers/spiders.c

r14976	r14977
545	545
546	546	if (state->m_gfx_rom_ctrl_mode)
547	547	{
548		UINT8 *rom = device->machine().region("gfx1")->base();
	548	UINT8 *rom = state->memregion("gfx1")->base();
549	549
550	550	ret = rom[state->m_gfx_rom_address];
551	551

src/mame/drivers/subsino.c

r14976	r14977
548	548
549	549	static PALETTE_INIT( subsino_2proms )
550	550	{
551		const UINT8 *color_prom = machine.region("proms")->base();
	551	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
552	552	int i,r,g,b,val;
553	553	int bit0,bit1,bit2;
554	554
r14976	r14977
575	575
576	576	static PALETTE_INIT( subsino_3proms )
577	577	{
578		const UINT8 *color_prom = machine.region("proms")->base();
	578	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
579	579	int i,r,g,b,val;
580	580	int bit0,bit1,bit2;
581	581
r14976	r14977
3362	3362
3363	3363	static DRIVER_INIT( smoto16 )
3364	3364	{
3365		UINT8 *rom = machine.region( "maincpu" )->base();
	3365	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
3366	3366	rom[0x12d0] = 0x20;   // "ERROR 951010"
3367	3367	}
3368	3368
r14976	r14977
3512	3512
3513	3513	static DRIVER_INIT( smoto20 )
3514	3514	{
3515		UINT8 *rom = machine.region( "maincpu" )->base();
	3515	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
3516	3516	rom[0x12e1] = 0x20;   // "ERROR 951010"
3517	3517	}
3518	3518
3519	3519	static DRIVER_INIT( tisub )
3520	3520	{
3521		UINT8 *rom = machine.region( "maincpu" )->base();
	3521	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
3522	3522
3523	3523	DRIVER_INIT_CALL(victor5);
3524	3524
r14976	r14977
3533	3533
3534	3534	static DRIVER_INIT( tisuba )
3535	3535	{
3536		UINT8 *rom = machine.region( "maincpu" )->base();
	3536	UINT8 *rom = machine.root_device().memregion( "maincpu" )->base();
3537	3537
3538	3538	DRIVER_INIT_CALL(victor5);
3539	3539
r14976	r14977
3549	3549	static DRIVER_INIT( stisub )
3550	3550	{
3551	3551	subsino_state *state = machine.driver_data<subsino_state>();
3552		UINT8 *rom = machine.region( "maincpu" )->base();
	3552	UINT8 *rom = state->memregion( "maincpu" )->base();
3553	3553	rom[0x1005] = 0x1d; //patch protection check
3554	3554	rom[0x7ab] = 0x18; //patch "winning protection" check
3555	3555	rom[0x957] = 0x18; //patch "losing protection" check

src/mame/drivers/jchan.c

r14976	r14977
394	394	state->m_sprite_bitmap_1->fill(0x0000, cliprect);
395	395	state->m_sprite_bitmap_2->fill(0x0000, cliprect);
396	396
397		state->m_spritegen1->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_1, cliprect, state->m_sprite_ram32_1, 0x4000, screen.machine().region("gfx1")->base(), screen.machine().region ("gfx1")->bytes(), state->m_sprite_regs32_1 );
398		state->m_spritegen2->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_2, cliprect, state->m_sprite_ram32_2, 0x4000, screen.machine().region("gfx2")->base(), screen.machine().region ("gfx2")->bytes(), state->m_sprite_regs32_2 );
	397	state->m_spritegen1->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_1, cliprect, state->m_sprite_ram32_1, 0x4000, screen.machine().root_device().memregion("gfx1")->base(), screen.machine().root_device().memregion ("gfx1")->bytes(), state->m_sprite_regs32_1 );
	398	state->m_spritegen2->skns_draw_sprites(screen.machine(), *state->m_sprite_bitmap_2, cliprect, state->m_sprite_ram32_2, 0x4000, screen.machine().root_device().memregion("gfx2")->base(), state->memregion ("gfx2")->bytes(), state->m_sprite_regs32_2 );
399	399
400	400	// ignoring priority bits for now - might use alpha too, check 0x8000 of palette writes
401	401	for (y=0;y<240;y++)

src/mame/drivers/mlanding.c

r14976	r14977
271	271	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
272	272	{
273	273	data=0;
274		memory_set_bankptr(device->machine(),  "bank1", device->machine().region("audiocpu")->base() + ((data) & 0x03) * 0x4000 + 0x10000 );
	274	device->machine().root_device().membank("bank1")->set_base(device->machine().root_device().memregion("audiocpu")->base() + ((data) & 0x03) * 0x4000 + 0x10000 );
275	275	}
276	276
277	277	static void ml_msm5205_vck(device_t *device)
r14976	r14977
288	288	}
289	289	else
290	290	{
291		UINT8 *ROM = device->machine().region("adpcm")->base();
	291	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base();
292	292
293	293	state->m_adpcm_data = ((state->m_trigger ? (ROM[state->m_adpcm_pos] & 0x0f) : (ROM[state->m_adpcm_pos] & 0xf0)>>4) );
294	294	msm5205_data_w(device,state->m_adpcm_data & 0xf);
r14976	r14977
846	846
847	847	static DRIVER_INIT(mlanding)
848	848	{
849		//  UINT8 *rom = machine.region("sub")->base();
	849	//  UINT8 *rom = machine.root_device().memregion("sub")->base();
850	850	//  rom[0x88b]=0x4e;
851	851	//  rom[0x88a]=0x71;
852	852	}

src/mame/drivers/tankbust.c

r14976	r14977
99	99	case 7: /* 0xe007 bankswitch */
100	100	/* bank 1 at 0x6000-9fff = from 0x10000 when bit0=0 else from 0x14000 */
101	101	/* bank 2 at 0xa000-bfff = from 0x18000 when bit0=0 else from 0x1a000 */
102		memory_set_bankptr(machine(),  "bank1", machine().region("maincpu")->base() + 0x10000 + ((data&1) * 0x4000) );
103		memory_set_bankptr(machine(),  "bank2", machine().region("maincpu")->base() + 0x18000 + ((data&1) * 0x2000) ); /* verified (the game will reset after the "game over" otherwise) */
	102	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000 + ((data&1) * 0x4000) );
	103	membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + 0x18000 + ((data&1) * 0x2000) ); /* verified (the game will reset after the "game over" otherwise) */
104	104	break;
105	105	}
106	106	}
r14976	r14977
115	115
116	116	static PALETTE_INIT( tankbust )
117	117	{
118		const UINT8 *color_prom = machine.region("proms")->base();
	118	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
119	119	int i;
120	120
121	121	for (i = 0; i < 128; i++)

src/mame/drivers/neoprint.c

r14976	r14977
273	273
274	274	READ16_MEMBER(neoprint_state::rom_window_r)
275	275	{
276		UINT16 *rom = (UINT16 *)machine().region("maincpu")->base();
	276	UINT16 *rom = (UINT16 *)machine().root_device().memregion("maincpu")->base();
277	277
278	278	return rom[offset | 0x80000/2 | m_bank_val*0x40000/2];
279	279	}
r14976	r14977
592	592	/* FIXME: get rid of these two, probably something to do with irq3 and camera / printer devices */
593	593	static DRIVER_INIT( npcartv1 )
594	594	{
595		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	595	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
596	596
597	597	ROM[0x1260/2] = 0x4e71;
598	598
r14976	r14977
602	602
603	603	static DRIVER_INIT( 98best44 )
604	604	{
605		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	605	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
606	606
607	607	ROM[0x1312/2] = 0x4e71;
608	608	}
609	609
610	610	static DRIVER_INIT( nprsp )
611	611	{
612		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	612	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
613	613
614	614	ROM[0x13a4/2] = 0x4e71;
615	615	ROM[0x13bc/2] = 0x4e71;

src/mame/drivers/pastelg.c

r14976	r14977
45	45
46	46	READ8_MEMBER(pastelg_state::pastelg_sndrom_r)
47	47	{
48		UINT8 *ROM = machine().region("voice")->base();
	48	UINT8 *ROM = memregion("voice")->base();
49	49
50	50	return ROM[pastelg_blitter_src_addr_r(&space) & 0x7fff];
51	51	}

src/mame/drivers/tetrisp2.c

r14976	r14977
117	117
118	118	WRITE16_MEMBER(tetrisp2_state::rockn_adpcmbank_w)
119	119	{
120		UINT8 *SNDROM = machine().region("ymz")->base();
	120	UINT8 *SNDROM = memregion("ymz")->base();
121	121	int bank;
122	122
123	123	m_rockn_adpcmbank = data;
r14976	r14977
134	134
135	135	WRITE16_MEMBER(tetrisp2_state::rockn2_adpcmbank_w)
136	136	{
137		UINT8 *SNDROM = machine().region("ymz")->base();
	137	UINT8 *SNDROM = memregion("ymz")->base();
138	138	int bank;
139	139
140	140	char banktable[9][3]=
r14976	r14977
181	181
182	182	if (ACCESSING_BITS_0_7)
183	183	{
184		UINT8 *rom = machine().region("okisource")->base();
	184	UINT8 *rom = memregion("okisource")->base();
185	185
186	186	if (data & 0x04)
187	187	{
188	188	m_bank_lo = data & 0x03;
189	189
190		memcpy(machine().region("oki")->base(), rom + (m_bank_lo * 0x80000), 0x20000);
	190	memcpy(machine().root_device().memregion("oki")->base(), rom + (m_bank_lo * 0x80000), 0x20000);
191	191
192	192	//          logerror("PC:%06X sound bank_lo = %02X\n",cpu_get_pc(&space.device()),m_bank_lo);
193	193	}
r14976	r14977
195	195	{
196	196	m_bank_hi = data & 0x03;
197	197
198		memcpy(machine().region("oki")->base() + 0x20000, rom + (m_bank_lo * 0x80000) + (m_bank_hi * 0x20000), 0x20000);
	198	memcpy(machine().root_device().memregion("oki")->base() + 0x20000, rom + (m_bank_lo * 0x80000) + (m_bank_hi * 0x20000), 0x20000);
199	199
200	200	//          logerror("PC:%06X sound bank_hi = %02X\n",cpu_get_pc(&space.device()),m_bank_hi);
201	201	}

src/mame/drivers/alpha68k.c

r14976	r14977
738	738
739	739	WRITE8_MEMBER(alpha68k_state::sound_bank_w)
740	740	{
741		memory_set_bank(machine(), "bank7", data);
	741	membank("bank7")->set_entry(data);
742	742	}
743	743
744	744	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, alpha68k_state )
r14976	r14977
1903	1903	static MACHINE_START( alpha68k_V )
1904	1904	{
1905	1905	alpha68k_state *state = machine.driver_data<alpha68k_state>();
1906		UINT8 *ROM = machine.region("audiocpu")->base();
	1906	UINT8 *ROM = state->memregion("audiocpu")->base();
1907	1907
1908		memory_configure_bank(machine, "bank7", 0, 32, &ROM[0x10000], 0x4000);
	1908	state->membank("bank7")->configure_entries(0, 32, &ROM[0x10000], 0x4000);
1909	1909
1910	1910	MACHINE_START_CALL(common);
1911	1911
r14976	r14977
1939	1939	static MACHINE_START( alpha68k_II )
1940	1940	{
1941	1941	alpha68k_state *state = machine.driver_data<alpha68k_state>();
1942		UINT8 *ROM = machine.region("audiocpu")->base();
	1942	UINT8 *ROM = state->memregion("audiocpu")->base();
1943	1943
1944		memory_configure_bank(machine, "bank7", 0, 28, &ROM[0x10000], 0x4000);
	1944	state->membank("bank7")->configure_entries(0, 28, &ROM[0x10000], 0x4000);
1945	1945
1946	1946	MACHINE_START_CALL(common);
1947	1947
r14976	r14977
3222	3222	static DRIVER_INIT( skysoldr )
3223	3223	{
3224	3224	alpha68k_state *state = machine.driver_data<alpha68k_state>();
3225		memory_set_bankptr(machine, "bank8", (machine.region("user1")->base()) + 0x40000);
	3225	state->membank("bank8")->set_base((state->memregion("user1")->base()) + 0x40000);
3226	3226	state->m_invert_controls = 0;
3227	3227	state->m_microcontroller_id = 0;
3228	3228	state->m_coin_id = 0x22 | (0x22 << 8);
r14976	r14977
3241	3241	static DRIVER_INIT( goldmedla )
3242	3242	{
3243	3243	alpha68k_state *state = machine.driver_data<alpha68k_state>();
3244		memory_set_bankptr(machine, "bank8", machine.region("maincpu")->base() + 0x20000);
	3244	state->membank("bank8")->set_base(state->memregion("maincpu")->base() + 0x20000);
3245	3245	state->m_invert_controls = 0;
3246	3246	state->m_microcontroller_id = 0x8803; //Guess - routine to handle coinage is the same as in 'goldmedl'
3247	3247	state->m_coin_id = 0x23 | (0x24 << 8);
r14976	r14977
3269	3269	static DRIVER_INIT( gangwarsu )
3270	3270	{
3271	3271	alpha68k_state *state = machine.driver_data<alpha68k_state>();
3272		memory_set_bankptr(machine, "bank8", machine.region("user1")->base());
	3272	state->membank("bank8")->set_base(state->memregion("user1")->base());
3273	3273	state->m_invert_controls = 0;
3274	3274	state->m_microcontroller_id = 0x8512;
3275	3275	state->m_coin_id = 0x23 | (0x24 << 8);
r14976	r14977
3279	3279	static DRIVER_INIT( gangwars )
3280	3280	{
3281	3281	alpha68k_state *state = machine.driver_data<alpha68k_state>();
3282		memory_set_bankptr(machine, "bank8", machine.region("user1")->base());
	3282	state->membank("bank8")->set_base(state->memregion("user1")->base());
3283	3283	state->m_invert_controls = 0;
3284	3284	state->m_microcontroller_id = 0x8512;
3285	3285	state->m_coin_id = 0x23 | (0x24 << 8);
r14976	r14977
3289	3289	static DRIVER_INIT( sbasebal )
3290	3290	{
3291	3291	alpha68k_state *state = machine.driver_data<alpha68k_state>();
3292		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	3292	UINT16 *rom = (UINT16 *)state->memregion("maincpu")->base();
3293	3293
3294	3294	/* Patch protection check, it does a divide by zero because the MCU is trying to
3295	3295	calculate the ball speed when a strike is scored, notice that current emulation

src/mame/drivers/tmaster.c

r14976	r14977
380	380	tmaster_state *state = machine.driver_data<tmaster_state>();
381	381	int x,y,x0,x1,y0,y1,dx,dy,flipx,flipy,sx,sy,sw,sh, addr, mode, layer,buffer, color;
382	382
383		UINT8 *gfxdata   =   machine.region( "blitter" )->base() + state->m_gfx_offs;
	383	UINT8 *gfxdata   =   state->memregion( "blitter" )->base() + state->m_gfx_offs;
384	384
385	385	UINT16 pen;
386	386
r14976	r14977
642	642	// Sound
643	643	READ16_MEMBER(tmaster_state::galgames_okiram_r)
644	644	{
645		return machine().region("oki")->base()[offset] | 0xff00;
	645	return memregion("oki")->base()[offset] | 0xff00;
646	646	}
647	647	WRITE16_MEMBER(tmaster_state::galgames_okiram_w)
648	648	{
649	649	if (ACCESSING_BITS_0_7)
650		machine().region("oki")->base()[offset] = data & 0xff;
	650	memregion("oki")->base()[offset] = data & 0xff;
651	651	}
652	652
653	653	// Carts (preliminary, PIC communication is not implemented)
r14976	r14977
659	659
660	660	state->m_gfx_offs = 0x200000 * cart;
661	661
662		if (machine.memory().bank(GALGAMES_BANK_000000_R) == GALGAMES_RAM)
663		memory_set_bank(machine, GALGAMES_BANK_200000_R, GALGAMES_ROM0 + state->m_galgames_cart);   // rom
	662	if (state->membank(GALGAMES_BANK_000000_R)->entry() == GALGAMES_RAM)
	663	state->membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_ROM0 + state->m_galgames_cart);   // rom
664	664
665		memory_set_bank(machine, GALGAMES_BANK_240000_R, GALGAMES_ROM0 + state->m_galgames_cart);   // rom
	665	state->membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0 + state->m_galgames_cart);   // rom
666	666	}
667	667
668	668	WRITE16_MEMBER(tmaster_state::galgames_cart_sel_w)
r14976	r14977
712	712	// ROM/RAM banking
713	713	if ((data & 0xf7) == 0x05)
714	714	{
715		memory_set_bank(machine(), GALGAMES_BANK_000000_R, GALGAMES_RAM);   // ram
	715	membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_RAM);   // ram
716	716	galgames_update_rombank(machine(), m_galgames_cart);
717	717	logerror("%06x: romram bank = %04x\n", cpu_get_pc(&space.device()), data);
718	718	}
719	719	else
720	720	{
721		memory_set_bank(machine(), GALGAMES_BANK_000000_R, GALGAMES_ROM0);   // rom
722		memory_set_bank(machine(), GALGAMES_BANK_200000_R, GALGAMES_RAM);   // ram
	721	membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_ROM0);   // rom
	722	membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_RAM);   // ram
723	723	logerror("%06x: unknown romram bank = %04x\n", cpu_get_pc(&space.device()), data);
724	724	}
725	725	}
r14976	r14977
882	882	{
883	883	tmaster_state *state = machine.driver_data<tmaster_state>();
884	884	state->m_gfx_offs = 0;
885		state->m_gfx_size = machine.region("blitter")->bytes();
	885	state->m_gfx_size = state->memregion("blitter")->bytes();
886	886
887	887	state->m_duart68681 = machine.device( "duart68681" );
888	888	}
r14976	r14977
951	951	state->m_gfx_offs = 0;
952	952	state->m_gfx_size = 0x200000;
953	953
954		memory_set_bank(machine, GALGAMES_BANK_000000_R, GALGAMES_ROM0);   // rom
955		memory_set_bank(machine, GALGAMES_BANK_000000_W, GALGAMES_RAM);      // ram
	954	state->membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_ROM0);   // rom
	955	state->membank(GALGAMES_BANK_000000_W)->set_entry(GALGAMES_RAM);      // ram
956	956
957		memory_set_bank(machine, GALGAMES_BANK_200000_R, GALGAMES_RAM);      // ram
958		memory_set_bank(machine, GALGAMES_BANK_200000_W, GALGAMES_RAM);      // ram
	957	state->membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_RAM);      // ram
	958	state->membank(GALGAMES_BANK_200000_W)->set_entry(GALGAMES_RAM);      // ram
959	959
960		memory_set_bank(machine, GALGAMES_BANK_240000_R, GALGAMES_ROM0);   // rom
	960	state->membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0);   // rom
961	961
962	962	galgames_update_rombank(machine, 0);
963	963
r14976	r14977
1621	1621
1622	1622	static DRIVER_INIT( tm4k )
1623	1623	{
1624		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1624	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1625	1625
1626	1626	// protection
1627	1627	ROM[0x834ce/2] = 0x4e75;
r14976	r14977
1642	1642
1643	1643	static DRIVER_INIT( tm4ka )
1644	1644	{
1645		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1645	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1646	1646
1647	1647	// protection
1648	1648	ROM[0x83476/2] = 0x4e75;
r14976	r14977
1664	1664
1665	1665	static DRIVER_INIT( tm4kb )
1666	1666	{
1667		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1667	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1668	1668
1669	1669	// protection
1670	1670	ROM[0x82b7a/2] = 0x4e75;
r14976	r14977
1685	1685
1686	1686	static DRIVER_INIT( tm5k )
1687	1687	{
1688		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1688	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1689	1689
1690	1690	// protection
1691	1691	ROM[0x96002/2] = 0x4e75;
r14976	r14977
1708	1708
1709	1709	static DRIVER_INIT( tm5kca )
1710	1710	{
1711		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1711	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1712	1712
1713	1713	// protection
1714	1714	ROM[0x95ffe/2] = 0x4e75;
r14976	r14977
1720	1720
1721	1721	static DRIVER_INIT( tm5ka )
1722	1722	{
1723		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1723	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1724	1724
1725	1725	// protection
1726	1726	ROM[0x96b30/2] = 0x4e75;
r14976	r14977
1741	1741
1742	1742	static DRIVER_INIT( tm7k )
1743	1743	{
1744		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1744	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1745	1745
1746	1746	// protection
1747	1747	ROM[0x81730/2] = 0x4e75;
r14976	r14977
1764	1764
1765	1765	static DRIVER_INIT( tm7ka )
1766	1766	{
1767		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1767	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1768	1768
1769	1769	// protection
1770	1770	ROM[0x81594/2] = 0x4e75;
r14976	r14977
1787	1787
1788	1788	static DRIVER_INIT( tm7keval ) /* kit came with a security key labeled A-21657-004, which is a TM5000 key */
1789	1789	{
1790		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1790	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1791	1791
1792	1792	// protection
1793	1793	ROM[0x8949e/2] = 0x4e75;
r14976	r14977
1810	1810
1811	1811	static DRIVER_INIT( tm8k )
1812	1812	{
1813		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1813	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1814	1814
1815	1815	// protection
1816	1816	ROM[0x78b70/2] = 0x4e75;
r14976	r14977
1834	1834	static DRIVER_INIT( galgames )
1835	1835	{
1836	1836	tmaster_state *state = machine.driver_data<tmaster_state>();
1837		UINT8 *ROM   =   machine.region("maincpu")->base();
	1837	UINT8 *ROM   =   machine.root_device().memregion("maincpu")->base();
1838	1838	int cart;
1839	1839
1840	1840	// RAM bank at 0x000000-0x03ffff and 0x200000-0x23ffff
1841	1841	// ROM bank at 0x000000-0x1fffff and 0x200000-0x3fffff (bios)
1842	1842
1843		memory_configure_bank(machine, GALGAMES_BANK_000000_R, GALGAMES_RAM,  1, state->m_galgames_ram, 0x40000);
1844		memory_configure_bank(machine, GALGAMES_BANK_000000_R, GALGAMES_ROM0, 1, ROM+0x000000, 0x40000);
	1843	state->membank(GALGAMES_BANK_000000_R)->configure_entry(GALGAMES_RAM,  state->m_galgames_ram);
	1844	state->membank(GALGAMES_BANK_000000_R)->configure_entry(GALGAMES_ROM0, ROM+0x000000);
1845	1845
1846		memory_configure_bank(machine, GALGAMES_BANK_000000_W, GALGAMES_RAM,  1, state->m_galgames_ram, 0x40000);
	1846	state->membank(GALGAMES_BANK_000000_W)->configure_entry(GALGAMES_RAM,  state->m_galgames_ram);
1847	1847
1848		memory_configure_bank(machine, GALGAMES_BANK_200000_R, GALGAMES_RAM,  1, state->m_galgames_ram, 0x40000);
1849		memory_configure_bank(machine, GALGAMES_BANK_200000_R, GALGAMES_ROM0, 1, ROM+0x000000, 0x40000);
	1848	state->membank(GALGAMES_BANK_200000_R)->configure_entry(GALGAMES_RAM,  state->m_galgames_ram);
	1849	state->membank(GALGAMES_BANK_200000_R)->configure_entry(GALGAMES_ROM0, ROM+0x000000);
1850	1850
1851		memory_configure_bank(machine, GALGAMES_BANK_200000_W, GALGAMES_RAM,  1, state->m_galgames_ram, 0x40000);
	1851	state->membank(GALGAMES_BANK_200000_W)->configure_entry(GALGAMES_RAM,  state->m_galgames_ram);
1852	1852
1853		memory_configure_bank(machine, GALGAMES_BANK_240000_R, GALGAMES_ROM0, 1, ROM+0x040000, 0x1c0000);
	1853	state->membank(GALGAMES_BANK_240000_R)->configure_entry(GALGAMES_ROM0, ROM+0x040000);
1854	1854
1855	1855	// More ROM banks at 0x200000-0x3fffff (carts)
1856	1856
1857	1857	for (cart = 1; cart <= 4; cart++)
1858	1858	{
1859		UINT8 *CART = machine.region("maincpu")->base();
	1859	UINT8 *CART = machine.root_device().memregion("maincpu")->base();
1860	1860
1861		if  (0x200000 * (cart+1) <= machine.region("maincpu")->bytes())
	1861	if  (0x200000 * (cart+1) <= state->memregion("maincpu")->bytes())
1862	1862	CART += 0x200000 * cart;
1863	1863
1864		memory_configure_bank(machine, GALGAMES_BANK_200000_R, GALGAMES_ROM0+cart, 1, CART,          0x40000);
1865		memory_configure_bank(machine, GALGAMES_BANK_240000_R, GALGAMES_ROM0+cart, 1, CART+0x040000, 0x1c0000);
	1864	state->membank(GALGAMES_BANK_200000_R)->configure_entry(GALGAMES_ROM0+cart, CART);
	1865	state->membank(GALGAMES_BANK_240000_R)->configure_entry(GALGAMES_ROM0+cart, CART+0x040000);
1866	1866	}
1867	1867	}
1868	1868
1869	1869	static DRIVER_INIT( galgame2 )
1870	1870	{
1871		UINT16 *ROM = (UINT16 *)machine.region( "maincpu" )->base();
	1871	UINT16 *ROM = (UINT16 *)machine.root_device().memregion( "maincpu" )->base();
1872	1872
1873	1873	// Patch BIOS to see the game code as first cartridge (until the PIC therein is emulated)
1874	1874	ROM[0x118da/2] = 0x4a06;

src/mame/drivers/tcl.c

r14976	r14977
189	189	/* only the first part is decrypted (and verified)*/
190	190
191	191	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
192		UINT8 *dest = machine.region("maincpu")->base();
193		int len = machine.region("maincpu")->bytes();
	192	UINT8 *dest = machine.root_device().memregion("maincpu")->base();
	193	int len = machine.root_device().memregion("maincpu")->bytes();
194	194	UINT8 *src = auto_alloc_array(machine, UINT8, len);
195	195
196	196	int i,idx=0;

src/mame/drivers/namcos22.c

r14976	r14977
1933	1933	else
1934	1934	{
1935	1935	memset( state->m_nvmem, 0x00, state->m_nvmem.bytes() );
1936		if (machine.region("nvram")->bytes() == state->m_nvmem.bytes())
	1936	if (machine.root_device().memregion("nvram")->bytes() == state->m_nvmem.bytes())
1937	1937	{
1938		UINT8* nvram = machine.region("nvram")->base();
	1938	UINT8* nvram = machine.root_device().memregion("nvram")->base();
1939	1939
1940	1940	for( i=0; i<state->m_nvmem.bytes()/4; i++ )
1941	1941	{
r14976	r14977
5538	5538
5539	5539	static DRIVER_INIT( propcycl )
5540	5540	{
5541		UINT32 *pROM = (UINT32 *)machine.region("maincpu")->base();
	5541	UINT32 *pROM = (UINT32 *)machine.root_device().memregion("maincpu")->base();
5542	5542
5543	5543	/* patch out strange routine (uninitialized-eprom related?) */
5544	5544	pROM[0x1992C/4] = 0x4E754E75;

src/mame/drivers/flyball.c

r14976	r14977
389	389	int i;
390	390
391	391	/* address bits 0 through 8 are inverted */
392		UINT8* ROM = machine.region("maincpu")->base() + 0x2000;
	392	UINT8* ROM = state->memregion("maincpu")->base() + 0x2000;
393	393
394	394	for (i = 0; i < 0x1000; i++)
395	395	state->m_rombase[i] = ROM[i ^ 0x1ff];

src/mame/drivers/pluto5.c

r14976	r14977
499	499
500	500	static DRIVER_INIT( hb )
501	501	{
502		astra_addresslines( (UINT16*)machine.region( "maincpu" )->base(), machine.region( "maincpu" )->bytes(), 0 );
	502	astra_addresslines( (UINT16*)machine.root_device().memregion( "maincpu" )->base(), machine.root_device().memregion( "maincpu" )->bytes(), 0 );
503	503
504	504	#if 0
505	505	{
506		UINT8* ROM = machine.region( "maincpu" )->base();
	506	UINT8* ROM = machine.root_device().memregion( "maincpu" )->base();
507	507	FILE *fp;
508	508	char filename[256];
509	509	sprintf(filename,"%s", machine.system().name);
510	510	fp=fopen(filename, "w+b");
511	511	if (fp)
512	512	{
513		fwrite(ROM,  machine.region( "maincpu" )->bytes(), 1, fp);
	513	fwrite(ROM,  machine.root_device().memregion( "maincpu" )->bytes(), 1, fp);
514	514	fclose(fp);
515	515	}
516	516	}

src/mame/drivers/pturn.c

r14976	r14977
143	143	{
144	144	pturn_state *state = machine.driver_data<pturn_state>();
145	145	int tileno,palno;
146		tileno = machine.region("user1")->base()[tile_index];
	146	tileno = state->memregion("user1")->base()[tile_index];
147	147	palno=state->m_bgpalette;
148	148	if(palno==1)
149	149	{

src/mame/drivers/dec0.c

r14976	r14977
3038	3038
3039	3039	static DRIVER_INIT( convert_robocop_gfx4_to_automat )
3040	3040	{
3041		UINT8* R = machine.region("gfx4")->base();
	3041	UINT8* R = machine.root_device().memregion("gfx4")->base();
3042	3042	int i;
3043	3043
3044	3044	for (i=0;i<0x80000;i++)

src/mame/drivers/ssv.c

r14976	r14977
326	326	ssv_state *state = machine.driver_data<ssv_state>();
327	327	state->m_requested_int = 0;
328	328	device_set_irq_callback(machine.device("maincpu"), ssv_irq_callback);
329		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
	329	state->membank("bank1")->set_base(state->memregion("user1")->base());
330	330	}
331	331
332	332
r14976	r14977
549	549	UINT32 dst   =   (gdfs_blitram[0xc4/2] + (gdfs_blitram[0xc6/2] << 16)) << 4;
550	550	UINT32 len   =   (gdfs_blitram[0xc8/2]) << 4;
551	551
552		UINT8 *rom   =   machine().region("gfx2")->base();
553		size_t size   =   machine().region("gfx2")->bytes();
	552	UINT8 *rom   =   memregion("gfx2")->base();
	553	size_t size   =   memregion("gfx2")->bytes();
554	554
555	555	if ( (src+len <= size) && (dst+len <= 4 * 0x100000) )
556	556	{
r14976	r14977
962	962
963	963	READ16_MEMBER(ssv_state::eaglshot_gfxrom_r)
964	964	{
965		UINT8 *rom   =   machine().region("gfx1")->base();
966		size_t size   =   machine().region("gfx1")->bytes();
	965	UINT8 *rom   =   memregion("gfx1")->base();
	966	size_t size   =   memregion("gfx1")->bytes();
967	967
968	968	offset = offset * 2 + m_gfxrom_select * 0x200000;
969	969
r14976	r14977
2648	2648	// massages the data from the BPMicro-compatible dump to runnable form
2649	2649	static void init_st010(running_machine &machine)
2650	2650	{
2651		UINT8 *dspsrc = (UINT8 *)machine.region("st010")->base();
2652		UINT32 *dspprg = (UINT32 *)machine.region("dspprg")->base();
2653		UINT16 *dspdata = (UINT16 *)machine.region("dspdata")->base();
	2651	UINT8 *dspsrc = (UINT8 *)machine.root_device().memregion("st010")->base();
	2652	UINT32 *dspprg = (UINT32 *)machine.root_device().memregion("dspprg")->base();
	2653	UINT16 *dspdata = (UINT16 *)machine.root_device().memregion("dspdata")->base();
2654	2654
2655	2655	// copy DSP program
2656	2656	for (int i = 0; i < 0x10000; i+= 4)
r14976	r14977
2677	2677	static DRIVER_INIT( mslider )         {   init_ssv(machine, 0);   }
2678	2678	static DRIVER_INIT( ryorioh )         {   init_ssv(machine, 0);   }
2679	2679	static DRIVER_INIT( srmp4 )         {   init_ssv(machine, 0);
2680		//  ((UINT16 *)machine.region("user1")->base())[0x2b38/2] = 0x037a;   /* patch to see gal test mode */
	2680	//  ((UINT16 *)machine.root_device().memregion("user1")->base())[0x2b38/2] = 0x037a;   /* patch to see gal test mode */
2681	2681	}
2682	2682	static DRIVER_INIT( srmp7 )         {   init_ssv(machine, 0);   }
2683	2683	static DRIVER_INIT( stmblade )      {   init_ssv(machine, 0); init_st010(machine); }

src/mame/drivers/atarig42.c

r14976	r14977
826	826
827	827	/* it looks like they jsr to $80000 as some kind of protection */
828	828	/* put an RTS there so we don't die */
829		*(UINT16 *)&machine.region("maincpu")->base()[0x80000] = 0x4E75;
	829	*(UINT16 *)&state->memregion("maincpu")->base()[0x80000] = 0x4E75;
830	830
831	831	address_space *main = machine.device<m68000_device>("maincpu")->space(AS_PROGRAM);
832	832	state->m_sloop_base = main->install_readwrite_handler(0x000000, 0x07ffff, read16_delegate(FUNC(atarig42_state::guardians_sloop_data_r),state), write16_delegate(FUNC(atarig42_state::guardians_sloop_data_w),state));

src/mame/drivers/cop01.c

r14976	r14977
654	654	#if MIGHTGUY_HACK
655	655	/* This is a hack to fix the game code to get a fully working
656	656	"Starting Area" fake Dip Switch */
657		UINT8 *RAM = (UINT8 *)machine.region("maincpu")->base();
	657	UINT8 *RAM = (UINT8 *)machine.root_device().memregion("maincpu")->base();
658	658	RAM[0x00e4] = 0x07;   // rlca
659	659	RAM[0x00e5] = 0x07;   // rlca
660	660	RAM[0x00e6] = 0x07;   // rlca

src/mame/drivers/kingpin.c

r14976	r14977
178	178	kingpin_state *state = machine.driver_data<kingpin_state>();
179	179
180	180	/* Hacks to keep the emu a'runnin */
181		state->m_code_base = machine.region("maincpu")->base();
	181	state->m_code_base = state->memregion("maincpu")->base();
182	182	state->m_code_base[0x17d4] = 0xc3;   /* Maybe sound related? */
183	183	}
184	184

src/mame/drivers/midvunit.c

r14976	r14977
56	56	dcs_reset_w(machine, 1);
57	57	dcs_reset_w(machine, 0);
58	58
59		memcpy(state->m_ram_base, machine.region("user1")->base(), 0x20000*4);
	59	memcpy(state->m_ram_base, state->memregion("user1")->base(), 0x20000*4);
60	60	machine.device("maincpu")->reset();
61	61
62	62	state->m_timer[0] = machine.device<timer_device>("timer0");
r14976	r14977
70	70	dcs_reset_w(machine, 1);
71	71	dcs_reset_w(machine, 0);
72	72
73		memcpy(state->m_ram_base, machine.region("user1")->base(), 0x20000*4);
	73	memcpy(state->m_ram_base, state->memregion("user1")->base(), 0x20000*4);
74	74	machine.device("maincpu")->reset();
75	75
76	76	state->m_timer[0] = machine.device<timer_device>("timer0");

src/mame/drivers/usgames.c

r14976	r14977
33	33
34	34	WRITE8_MEMBER(usgames_state::usgames_rombank_w)
35	35	{
36		UINT8 *RAM = machine().region("maincpu")->base();
	36	UINT8 *RAM = memregion("maincpu")->base();
37	37
38	38	//  logerror ("BANK WRITE? -%02x-\n",data);
39	39	//popmessage("%02x",data);
40	40
41		memory_set_bankptr(machine(),  "bank1",&RAM[ 0x10000 + 0x4000 * data] );
	41	membank("bank1")->set_base(&RAM[ 0x10000 + 0x4000 * data] );
42	42	}
43	43
44	44	WRITE8_MEMBER(usgames_state::lamps1_w)

src/mame/drivers/opwolf.c

r14976	r14977
346	346
347	347	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
348	348	{
349		memory_set_bank(device->machine(), "bank10", (data - 1) & 0x03);
	349	device->machine().root_device().membank("bank10")->set_entry((data - 1) & 0x03);
350	350	}
351	351
352	352	/***********************************************************
r14976	r14977
476	476	}
477	477	else
478	478	{
479		state->m_adpcm_data[chip] = device->machine().region("adpcm")->base()[state->m_adpcm_pos[chip]];
	479	state->m_adpcm_data[chip] = device->machine().root_device().memregion("adpcm")->base()[state->m_adpcm_pos[chip]];
480	480	state->m_adpcm_pos[chip] = (state->m_adpcm_pos[chip] + 1) & 0x7ffff;
481	481	msm5205_data_w(device, state->m_adpcm_data[chip] >> 4);
482	482	}
r14976	r14977
979	979	static DRIVER_INIT( opwolf )
980	980	{
981	981	opwolf_state *state = machine.driver_data<opwolf_state>();
982		UINT16* rom = (UINT16*)machine.region("maincpu")->base();
	982	UINT16* rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
983	983
984	984	state->m_opwolf_region = rom[0x03fffe / 2] & 0xff;
985	985
r14976	r14977
989	989	state->m_opwolf_gun_xoffs = 0xec - (rom[0x03ffb0 / 2] & 0xff);
990	990	state->m_opwolf_gun_yoffs = 0x1c - (rom[0x03ffae / 2] & 0xff);
991	991
992		memory_configure_bank(machine, "bank10", 0, 4, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	992	state->membank("bank10")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000, 0x4000);
993	993	}
994	994
995	995
996	996	static DRIVER_INIT( opwolfb )
997	997	{
998	998	opwolf_state *state = machine.driver_data<opwolf_state>();
999		UINT16* rom = (UINT16*)machine.region("maincpu")->base();
	999	UINT16* rom = (UINT16*)machine.root_device().memregion("maincpu")->base();
1000	1000
1001	1001	state->m_opwolf_region = rom[0x03fffe / 2] & 0xff;
1002	1002
r14976	r14977
1004	1004	state->m_opwolf_gun_xoffs = -2;
1005	1005	state->m_opwolf_gun_yoffs = 17;
1006	1006
1007		memory_configure_bank(machine, "bank10", 0, 4, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	1007	state->membank("bank10")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000, 0x4000);
1008	1008	}
1009	1009
1010	1010

src/mame/drivers/suna16.c

r14976	r14977
260	260
261	261	WRITE8_MEMBER(suna16_state::bssoccer_pcm_1_bankswitch_w)
262	262	{
263		UINT8 *RAM = machine().region("pcm1")->base();
	263	UINT8 *RAM = memregion("pcm1")->base();
264	264	int bank = data & 7;
265	265	if (bank & ~7)   logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
266		memory_set_bankptr(machine(), "bank1", &RAM[bank * 0x10000 + 0x1000]);
	266	membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x1000]);
267	267	}
268	268
269	269	WRITE8_MEMBER(suna16_state::bssoccer_pcm_2_bankswitch_w)
270	270	{
271		UINT8 *RAM = machine().region("pcm2")->base();
	271	UINT8 *RAM = memregion("pcm2")->base();
272	272	int bank = data & 7;
273	273	if (bank & ~7)   logerror("CPU#3 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
274		memory_set_bankptr(machine(), "bank2", &RAM[bank * 0x10000 + 0x1000]);
	274	membank("bank2")->set_base(&RAM[bank * 0x10000 + 0x1000]);
275	275	}
276	276
277	277
r14976	r14977
322	322
323	323	WRITE8_MEMBER(suna16_state::uballoon_pcm_1_bankswitch_w)
324	324	{
325		UINT8 *RAM = machine().region("pcm1")->base();
	325	UINT8 *RAM = memregion("pcm1")->base();
326	326	int bank = data & 1;
327	327	if (bank & ~1)   logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
328		memory_set_bankptr(machine(), "bank1", &RAM[bank * 0x10000 + 0x400]);
	328	membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x400]);
329	329	}
330	330
331	331	/* Memory maps: Yes, *no* RAM */
r14976	r14977
1087	1087
1088	1088	static DRIVER_INIT( uballoon )
1089	1089	{
1090		UINT16 *RAM = (UINT16 *) machine.region("maincpu")->base();
	1090	UINT16 *RAM = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1091	1091
1092	1092	// Patch out the protection checks
1093	1093	RAM[0x0113c/2] = 0x4e71;   // bne $646

src/mame/drivers/firebeat.c

r14976	r14977
1956	1956	firebeat_state *state = machine.driver_data<firebeat_state>();
1957	1957	void *cd;
1958	1958	int i;
1959		UINT8 *sound = machine.region("ymz")->base();
	1959	UINT8 *sound = state->memregion("ymz")->base();
1960	1960
1961	1961	for (i=0; i < 0x200000; i++)
1962	1962	{
r14976	r14977
2225	2225	static void init_firebeat(running_machine &machine)
2226	2226	{
2227	2227	firebeat_state *state = machine.driver_data<firebeat_state>();
2228		UINT8 *rom = machine.region("user2")->base();
	2228	UINT8 *rom = state->memregion("user2")->base();
2229	2229
2230	2230	atapi_init(machine);
2231	2231

src/mame/drivers/bigevglf.c

r14976	r14977
70	70	/* d0-d3 connect to A11-A14 of the ROMs (via ls273 latch)
71	71	d4-d7 select one of ROMs (via ls273(above) and then ls154)
72	72	*/
73		memory_set_bank(machine(), "bank1", m_beg_bank & 0xff); /* empty sockets for IC37-IC44 ROMS */
	73	membank("bank1")->set_entry(m_beg_bank & 0xff); /* empty sockets for IC37-IC44 ROMS */
74	74	}
75	75
76	76	static TIMER_CALLBACK( from_sound_latch_callback )
r14976	r14977
619	619
620	620	static DRIVER_INIT( bigevglf )
621	621	{
622		UINT8 *ROM = machine.region("maincpu")->base();
623		memory_configure_bank(machine, "bank1", 0, 0xff, &ROM[0x10000], 0x800);
	622	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	623	machine.root_device().membank("bank1")->configure_entries(0, 0xff, &ROM[0x10000], 0x800);
624	624	}
625	625
626	626	GAME( 1986, bigevglf,  0,        bigevglf, bigevglf, bigevglf, ROT270, "Taito America Corporation", "Big Event Golf (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )

src/mame/drivers/inufuku.c

r14976	r14977
102	102
103	103	WRITE8_MEMBER(inufuku_state::inufuku_soundrombank_w)
104	104	{
105		memory_set_bank(machine(), "bank1", data & 0x03);
	105	membank("bank1")->set_entry(data & 0x03);
106	106	}
107	107
108	108	/******************************************************************************
r14976	r14977
314	314	static MACHINE_START( inufuku )
315	315	{
316	316	inufuku_state *state = machine.driver_data<inufuku_state>();
317		UINT8 *ROM = machine.region("audiocpu")->base();
	317	UINT8 *ROM = state->memregion("audiocpu")->base();
318	318
319		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x8000);
320		memory_set_bank(machine, "bank1", 0);
	319	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x8000);
	320	state->membank("bank1")->set_entry(0);
321	321
322	322	state->m_audiocpu = machine.device("audiocpu");
323	323

src/mame/drivers/tattack.c

r14976	r14977
238	238	static DRIVER_INIT(tattack)
239	239	{
240	240
241		UINT8 *rom = machine.region("maincpu")->base();
	241	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
242	242
243	243	rom[0x1b4]=0;
244	244	rom[0x1b5]=0;

src/mame/drivers/cbuster.c

r14976	r14977
530	530
531	531	static DRIVER_INIT( twocrude )
532	532	{
533		UINT8 *RAM = machine.region("maincpu")->base();
	533	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
534	534	UINT8 *PTR;
535	535	int i, j;
536	536
r14976	r14977
547	547	}
548	548
549	549	/* Rearrange the 'extra' sprite bank to be in the same format as main sprites */
550		RAM = machine.region("gfx3")->base() + 0x080000;
551		PTR = machine.region("gfx3")->base() + 0x140000;
	550	RAM = machine.root_device().memregion("gfx3")->base() + 0x080000;
	551	PTR = machine.root_device().memregion("gfx3")->base() + 0x140000;
552	552	for (i = 0; i < 0x20000; i += 64)
553	553	{
554	554	for (j = 0; j < 16; j += 1)

src/mame/drivers/ghosteo.c

r14976	r14977
269	269	break;
270	270	case NAND_M_READ :
271	271	{
272		UINT8 *flash = (UINT8 *)device->machine().region( "user1")->base();
	272	UINT8 *flash = (UINT8 *)device->machine().root_device().memregion( "user1")->base();
273	273	if (nand.byte_addr < 0x200)
274	274	{
275	275	data = *(flash + nand.page_addr * 0x200 + nand.byte_addr);

src/mame/drivers/dunhuang.c

r14976	r14977
346	346
347	347	m_block_h = data;
348	348
349		tile_addr = machine().region("gfx2")->base() + ((m_block_addr_hi << 8) + m_block_addr_lo) * 4;
	349	tile_addr = memregion("gfx2")->base() + ((m_block_addr_hi << 8) + m_block_addr_lo) * 4;
350	350
351	351	switch (m_block_dest)
352	352	{
r14976	r14977
466	466	// ?                data & 0x01
467	467	// ?                data & 0x02
468	468
469		memory_set_bank(machine(), "bank1", ((data >> 2) & 0x7));
	469	membank("bank1")->set_entry(((data >> 2) & 0x7));
470	470
471	471	// COIN OUT:        data & 0x20
472	472	coin_counter_w(machine(), 0,   data & 0x40);
r14976	r14977
766	766	static MACHINE_START( dunhuang )
767	767	{
768	768	dunhuang_state *state = machine.driver_data<dunhuang_state>();
769		UINT8 *ROM = machine.region("maincpu")->base();
	769	UINT8 *ROM = state->memregion("maincpu")->base();
770	770
771		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x8000);
	771	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x8000);
772	772
773	773	state->save_item(NAME(state->m_written));
774	774	state->save_item(NAME(state->m_written2));

src/mame/drivers/ojankohs.c

r14976	r14977
41	41
42	42	WRITE8_MEMBER(ojankohs_state::ojankohs_rombank_w)
43	43	{
44		memory_set_bank(machine(), "bank1", data & 0x3f);
	44	membank("bank1")->set_entry(data & 0x3f);
45	45	}
46	46
47	47	WRITE8_MEMBER(ojankohs_state::ojankoy_rombank_w)
48	48	{
49	49
50		memory_set_bank(machine(), "bank1", data & 0x1f);
	50	membank("bank1")->set_entry(data & 0x1f);
51	51
52	52	m_adpcm_reset = BIT(data, 5);
53	53	if (!m_adpcm_reset)
r14976	r14977
95	95	WRITE8_MEMBER(ojankohs_state::ojankoc_ctrl_w)
96	96	{
97	97
98		memory_set_bank(machine(), "bank1", data & 0x0f);
	98	membank("bank1")->set_entry(data & 0x0f);
99	99
100	100	m_adpcm_reset = BIT(data, 4);
101	101	msm5205_reset_w(m_msm, !BIT(data, 4));
r14976	r14977
808	808
809	809	static MACHINE_START( ojankohs )
810	810	{
811		UINT8 *ROM = machine.region("maincpu")->base();
	811	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
812	812
813		memory_configure_bank(machine, "bank1", 0, 0x40, &ROM[0x10000], 0x4000);
	813	machine.root_device().membank("bank1")->configure_entries(0, 0x40, &ROM[0x10000], 0x4000);
814	814
815	815	MACHINE_START_CALL(common);
816	816	}
817	817
818	818	static MACHINE_START( ojankoy )
819	819	{
820		UINT8 *ROM = machine.region("maincpu")->base();
	820	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
821	821
822		memory_configure_bank(machine, "bank1", 0, 0x20, &ROM[0x10000], 0x4000);
	822	machine.root_device().membank("bank1")->configure_entries(0, 0x20, &ROM[0x10000], 0x4000);
823	823
824	824	MACHINE_START_CALL(common);
825	825	}
826	826
827	827	static MACHINE_START( ojankoc )
828	828	{
829		UINT8 *ROM = machine.region("user1")->base();
	829	UINT8 *ROM = machine.root_device().memregion("user1")->base();
830	830
831		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x0000], 0x8000);
	831	machine.root_device().membank("bank1")->configure_entries(0, 0x10, &ROM[0x0000], 0x8000);
832	832
833	833	MACHINE_START_CALL(common);
834	834	}

src/mame/drivers/3do.c

r14976	r14977
135	135
136	136	state->m_maincpu = downcast<legacy_cpu_device*>( machine.device("maincpu") );
137	137
138		memory_set_bankptr(machine, "bank2",machine.region("user1")->base());
	138	state->membank("bank2")->set_base(machine.root_device().memregion("user1")->base());
139	139
140	140	/* configure overlay */
141		memory_configure_bank(machine, "bank1", 0, 1, state->m_dram, 0);
142		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	141	state->membank("bank1")->configure_entry(0, state->m_dram);
	142	state->membank("bank1")->configure_entry(1, state->memregion("user1")->base());
143	143
144	144	/* start with overlay enabled */
145		memory_set_bank(machine, "bank1", 1);
	145	state->membank("bank1")->set_entry(1);
146	146
147	147	_3do_slow2_init(machine);
148	148	_3do_madam_init(machine);

src/mame/drivers/spdodgeb.c

r14976	r14977
78	78	}
79	79	else
80	80	{
81		UINT8 *ROM = device->machine().region("adpcm")->base() + 0x10000 * chip;
	81	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base() + 0x10000 * chip;
82	82
83	83	state->m_adpcm_data[chip] = ROM[state->m_adpcm_pos[chip]++];
84	84	msm5205_data_w(device,state->m_adpcm_data[chip] >> 4);

src/mame/drivers/turbo.c

r14976	r14977
1627	1627	2,1,2,1    /* 0x5000-0x5fff */
1628	1628	};
1629	1629
1630		UINT8 *RAM = machine.region("maincpu")->base();
	1630	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
1631	1631	int offs, i, j;
1632	1632	UINT8 src;
1633	1633

src/mame/drivers/cvs.c

r14976	r14977
426	426	{
427	427	cvs_state *state = device->machine().driver_data<cvs_state>();
428	428	running_machine &machine = device->machine();
429		UINT8 *ROM = machine.region("speechdata")->base();
	429	UINT8 *ROM = machine.root_device().memregion("speechdata")->base();
430	430	int bit;
431	431
432	432	/* before reading the bit, clamp the address to the region length */
433		state->m_speech_rom_bit_address = state->m_speech_rom_bit_address & ((machine.region("speechdata")->bytes() * 8) - 1);
	433	state->m_speech_rom_bit_address = state->m_speech_rom_bit_address & ((state->memregion("speechdata")->bytes() * 8) - 1);
434	434	bit = (ROM[state->m_speech_rom_bit_address >> 3] >> (state->m_speech_rom_bit_address & 0x07)) & 0x01;
435	435
436	436	/* prepare for next bit */
r14976	r14977
1595	1595
1596	1596	static DRIVER_INIT( huncholy )
1597	1597	{
1598		UINT8 *ROM = machine.region("maincpu")->base();
	1598	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1599	1599
1600	1600	/* patch out protection */
1601	1601	ROM[0x0082] = 0xc0;
r14976	r14977
1615	1615
1616	1616	static DRIVER_INIT( hunchbaka )
1617	1617	{
1618		UINT8 *ROM = machine.region("maincpu")->base();
	1618	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1619	1619
1620	1620	offs_t offs;
1621	1621
r14976	r14977
1627	1627
1628	1628	static DRIVER_INIT( superbik )
1629	1629	{
1630		UINT8 *ROM = machine.region("maincpu")->base();
	1630	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1631	1631
1632	1632	/* patch out protection */
1633	1633	ROM[0x0079] = 0xc0;
r14976	r14977
1655	1655
1656	1656	static DRIVER_INIT( hero )
1657	1657	{
1658		UINT8 *ROM = machine.region("maincpu")->base();
	1658	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1659	1659
1660	1660	/* patch out protection */
1661	1661	ROM[0x0087] = 0xc0;
r14976	r14977
1677	1677
1678	1678	static DRIVER_INIT( raiders )
1679	1679	{
1680		UINT8 *ROM = machine.region("maincpu")->base();
	1680	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1681	1681
1682	1682	offs_t offs;
1683	1683

src/mame/drivers/trvquest.c

r14976	r14977
45	45	{
46	46	gameplan_state *state = space->machine().driver_data<gameplan_state>();
47	47
48		return space->machine().region("questions")->base()[*state->m_trvquest_question * 0x2000 + offset];
	48	return state->memregion("questions")->base()[*state->m_trvquest_question * 0x2000 + offset];
49	49	}
50	50
51	51	static WRITE8_DEVICE_HANDLER( trvquest_coin_w )

src/mame/drivers/tnzs.c

r14976	r14977
639	639	int start, size;
640	640	int i, n;
641	641
642		src = machine.region("samples")->base() + 0x0090;
	642	src = state->memregion("samples")->base() + 0x0090;
643	643	for (i = 0; i < MAX_SAMPLES; i++)
644	644	{
645	645	start = (src[(i * 2) + 1] * 256) + src[(i * 2)];
r14976	r14977
738	738	{
739	739	// to avoid the write when the sound chip is initialized
740	740	if (data != 0xff)
741		memory_set_bank(device->machine(), "bank3", data & 0x07);
	741	device->machine().root_device().membank("bank3")->set_entry(data & 0x07);
742	742	}
743	743
744	744	static WRITE8_DEVICE_HANDLER( kabukiz_sample_w )
r14976	r14977
903	903	WRITE8_MEMBER(tnzs_state::jpopnics_subbankswitch_w)
904	904	{
905	905	/* bits 0-1 select ROM bank */
906		memory_set_bank(machine(), "bank2", data & 0x03);
	906	membank("bank2")->set_entry(data & 0x03);
907	907	}
908	908
909	909	static ADDRESS_MAP_START( jpopnics_sub_map, AS_PROGRAM, 8, tnzs_state )

src/mame/drivers/rohga.c

r14976	r14977
1558	1558
1559	1559	static DRIVER_INIT( schmeisr )
1560	1560	{
1561		const UINT8 *src = machine.region("gfx2")->base();
1562		UINT8 *dst = machine.region("gfx1")->base();
	1561	const UINT8 *src = machine.root_device().memregion("gfx2")->base();
	1562	UINT8 *dst = machine.root_device().memregion("gfx1")->base();
1563	1563
1564	1564	memcpy(dst, src, 0x20000);
1565	1565	memcpy(dst + 0x20000, src + 0x80000, 0x20000);

src/mame/drivers/plygonet.c

r14976	r14977
135	135	READ32_MEMBER(polygonet_state::ttl_rom_r)
136	136	{
137	137	UINT32 *ROM;
138		ROM = (UINT32 *)machine().region("gfx1")->base();
	138	ROM = (UINT32 *)machine().root_device().memregion("gfx1")->base();
139	139
140	140	return ROM[offset];
141	141	}
r14976	r14977
144	144	READ32_MEMBER(polygonet_state::psac_rom_r)
145	145	{
146	146	UINT32 *ROM;
147		ROM = (UINT32 *)machine().region("gfx2")->base();
	147	ROM = (UINT32 *)machine().root_device().memregion("gfx2")->base();
148	148
149	149	return ROM[offset];
150	150	}
r14976	r14977
545	545	static void reset_sound_region(running_machine &machine)
546	546	{
547	547	polygonet_state *state = machine.driver_data<polygonet_state>();
548		memory_set_bankptr(machine, "bank2", machine.region("soundcpu")->base() + 0x10000 + state->m_cur_sound_region*0x4000);
	548	state->membank("bank2")->set_base(state->memregion("soundcpu")->base() + 0x10000 + state->m_cur_sound_region*0x4000);
549	549	}
550	550
551	551	WRITE8_MEMBER(polygonet_state::sound_bankswitch_w)

src/mame/drivers/progolf.c

r14976	r14977
212	212	READ8_MEMBER(progolf_state::progolf_videoram_r)
213	213	{
214	214	UINT8 *videoram = m_videoram;
215		UINT8 *gfx_rom = machine().region("gfx1")->base();
	215	UINT8 *gfx_rom = memregion("gfx1")->base();
216	216
217	217	if (offset >= 0x0800)
218	218	{
r14976	r14977
389	389
390	390	static PALETTE_INIT( progolf )
391	391	{
392		const UINT8 *color_prom = machine.region("proms")->base();
	392	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
393	393	int i;
394	394
395	395	for (i = 0;i < machine.total_colors();i++)
r14976	r14977
502	502	{
503	503	int A;
504	504	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
505		UINT8 *rom = machine.region("maincpu")->base();
	505	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
506	506	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
507	507
508	508	space->set_decrypted_region(0x0000,0xffff, decrypted);
r14976	r14977
516	516	{
517	517	int A;
518	518	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
519		UINT8 *rom = machine.region("maincpu")->base();
	519	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
520	520	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
521	521
522	522	space->set_decrypted_region(0x0000,0xffff, decrypted);

src/mame/drivers/powerbal.c

r14976	r14977
70	70	{
71	71	int addr = 0x40000 * ((data & 3) - 1);
72	72
73		if (addr < device->machine().region("oki")->bytes())
	73	if (addr < device->machine().root_device().memregion("oki")->bytes())
74	74	downcast<okim6295_device *>(device)->set_bank_base(addr);
75	75	}
76	76	}

src/mame/drivers/jackie.c

r14976	r14977
346	346
347	347	READ8_MEMBER(jackie_state::expram_r)
348	348	{
349		UINT8 *rom = machine().region("gfx3")->base();
	349	UINT8 *rom = memregion("gfx3")->base();
350	350
351	351	offset += m_exp_bank * 0x8000;
352	352	//  logerror("PC %06X: %04x = %02x\n",cpu_get_pc(&space.device()),offset,rom[offset]);
r14976	r14977
540	540	{
541	541
542	542	int A;
543		UINT8 *rom = machine.region("maincpu")->base();
	543	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
544	544
545	545	for (A = 0;A < 0xf000;A++)
546	546	{

src/mame/drivers/warriorb.c

r14976	r14977
167	167	static void reset_sound_region( running_machine &machine )
168	168	{
169	169	warriorb_state *state = machine.driver_data<warriorb_state>();
170		memory_set_bank(machine, "bank10", state->m_banknum);
	170	state->membank("bank10")->set_entry(state->m_banknum);
171	171	}
172	172
173	173	WRITE8_MEMBER(warriorb_state::sound_bankswitch_w)
r14976	r14977
542	542	{
543	543	warriorb_state *state = machine.driver_data<warriorb_state>();
544	544
545		memory_configure_bank(machine, "bank10", 0, 8, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	545	state->membank("bank10")->configure_entries(0, 8, state->memregion("audiocpu")->base() + 0xc000, 0x4000);
546	546
547	547	state->m_maincpu = machine.device("maincpu");
548	548	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/goal92.c

r14976	r14977
69	69
70	70	static WRITE8_DEVICE_HANDLER( adpcm_control_w )
71	71	{
72		memory_set_bank(device->machine(), "bank1", data & 0x01);
	72	device->machine().root_device().membank("bank1")->set_entry(data & 0x01);
73	73
74	74	msm5205_reset_w(device, data & 0x08);
75	75	}
r14976	r14977
291	291	static MACHINE_START( goal92 )
292	292	{
293	293	goal92_state *state = machine.driver_data<goal92_state>();
294		UINT8 *ROM = machine.region("audiocpu")->base();
	294	UINT8 *ROM = state->memregion("audiocpu")->base();
295	295
296		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x4000);
	296	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x4000);
297	297
298	298	state->m_audiocpu = machine.device("audiocpu");
299	299

src/mame/drivers/alg.c

r14976	r14977
225	225	address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
226	226
227	227	/* switch banks as appropriate */
228		memory_set_bank(device->machine(), "bank1", data & 1);
	228	device->machine().root_device().membank("bank1")->set_entry(data & 1);
229	229
230	230	/* swap the write handlers between ROM and bank 1 based on the bit */
231	231	if ((data & 1) == 0)
r14976	r14977
699	699	amiga_machine_config(machine, &alg_intf);
700	700
701	701	/* set up memory */
702		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
703		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	702	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	703	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
704	704	}
705	705
706	706
r14976	r14977
713	713
714	714	static DRIVER_INIT( palr1 )
715	715	{
716		UINT32 length = machine.region("user2")->bytes();
717		UINT8 *rom = machine.region("user2")->base();
	716	UINT32 length = machine.root_device().memregion("user2")->bytes();
	717	UINT8 *rom = machine.root_device().memregion("user2")->base();
718	718	UINT8 *original = auto_alloc_array(machine, UINT8, length);
719	719	UINT32 srcaddr;
720	720
r14976	r14977
733	733
734	734	static DRIVER_INIT( palr3 )
735	735	{
736		UINT32 length = machine.region("user2")->bytes();
737		UINT8 *rom = machine.region("user2")->base();
	736	UINT32 length = machine.root_device().memregion("user2")->bytes();
	737	UINT8 *rom = machine.root_device().memregion("user2")->base();
738	738	UINT8 *original = auto_alloc_array(machine, UINT8, length);
739	739	UINT32 srcaddr;
740	740
r14976	r14977
752	752
753	753	static DRIVER_INIT( palr6 )
754	754	{
755		UINT32 length = machine.region("user2")->bytes();
756		UINT8 *rom = machine.region("user2")->base();
	755	UINT32 length = machine.root_device().memregion("user2")->bytes();
	756	UINT8 *rom = machine.root_device().memregion("user2")->base();
757	757	UINT8 *original = auto_alloc_array(machine, UINT8, length);
758	758	UINT32 srcaddr;
759	759
r14976	r14977
774	774	static DRIVER_INIT( aplatoon )
775	775	{
776	776	/* NOT DONE TODO FIGURE OUT THE RIGHT ORDER!!!! */
777		UINT8 *rom = machine.region("user2")->base();
	777	UINT8 *rom = machine.root_device().memregion("user2")->base();
778	778	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x40000);
779	779	int i;
780	780

src/mame/drivers/trucocl.c

r14976	r14977
52	52	static WRITE8_DEVICE_HANDLER( audio_dac_w )
53	53	{
54	54	trucocl_state *state = device->machine().driver_data<trucocl_state>();
55		UINT8 *rom = device->machine().region("maincpu")->base();
	55	UINT8 *rom = state->memregion("maincpu")->base();
56	56	int   dac_address = ( data & 0xf0 ) << 8;
57	57	int   sel = ( ( (~data) >> 1 ) & 2 ) | ( data & 1 );
58	58

src/mame/drivers/unico.c

r14976	r14977
91	91	contains garbage. Indeed, only banks 0&1 are used */
92	92
93	93	int bank = (data >> 8 ) & 1;
94		UINT8 *dst   = machine().region("oki")->base();
	94	UINT8 *dst   = memregion("oki")->base();
95	95	UINT8 *src   = dst + 0x80000 + 0x20000 + 0x20000 * bank;
96	96	memcpy(dst + 0x20000, src, 0x20000);
97	97
r14976	r14977
180	180	if (ACCESSING_BITS_24_31)
181	181	{
182	182	int bank = ((data >> 24) & 3) % 4;
183		UINT8 *dst   = machine().region("oki1")->base();
	183	UINT8 *dst   = memregion("oki1")->base();
184	184	UINT8 *src   = dst + 0x80000 + 0x20000 + 0x20000 * bank;
185	185	memcpy(dst + 0x20000, src, 0x20000);
186	186	}

src/mame/drivers/blockhl.c

r14976	r14977
189	189	static MACHINE_START( blockhl )
190	190	{
191	191	blockhl_state *state = machine.driver_data<blockhl_state>();
192		UINT8 *ROM = machine.region("maincpu")->base();
	192	UINT8 *ROM = state->memregion("maincpu")->base();
193	193
194		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
	194	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x2000);
195	195
196	196	state->m_maincpu = machine.device("maincpu");
197	197	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
318	318
319	319	/* bits 0-1 = ROM bank */
320	320	state->m_rombank = lines & 0x03;
321		memory_set_bank(device->machine(), "bank1", state->m_rombank);
	321	state->membank("bank1")->set_entry(state->m_rombank);
322	322
323	323	/* bits 3/4 = coin counters */
324	324	coin_counter_w(device->machine(), 0, lines & 0x08);

src/mame/drivers/gcpinbal.c

r14976	r14977
214	214	}
215	215	else
216	216	{
217		UINT8 *ROM = device->machine().region("msm")->base();
	217	UINT8 *ROM = device->machine().root_device().memregion("msm")->base();
218	218
219	219	state->m_adpcm_data = ((state->m_adpcm_trigger ? (ROM[state->m_adpcm_start] & 0x0f) : (ROM[state->m_adpcm_start] & 0xf0) >> 4));
220	220	msm5205_data_w(device, state->m_adpcm_data & 0xf);

src/mame/drivers/bottom9.c

r14976	r14977
110	110	else
111	111	bank = ((data & 0x0e) >> 1);
112	112
113		memory_set_bank(machine(), "bank1", bank);
	113	membank("bank1")->set_entry(bank);
114	114	}
115	115
116	116	WRITE8_MEMBER(bottom9_state::bottom9_1f90_w)
r14976	r14977
322	322	static MACHINE_START( bottom9 )
323	323	{
324	324	bottom9_state *state = machine.driver_data<bottom9_state>();
325		UINT8 *ROM = machine.region("maincpu")->base();
	325	UINT8 *ROM = state->memregion("maincpu")->base();
326	326
327		memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x2000);
	327	state->membank("bank1")->configure_entries(0, 12, &ROM[0x10000], 0x2000);
328	328
329	329	state->m_maincpu = machine.device("maincpu");
330	330	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/dreamwld.c

r14976	r14977
168	168	const gfx_element *gfx = machine.gfx[0];
169	169	UINT32 *source = state->m_spritebuf1;
170	170	UINT32 *finish = state->m_spritebuf1 + 0x1000 / 4;
171		UINT16 *redirect = (UINT16 *)machine.region("spritelut")->base();
	171	UINT16 *redirect = (UINT16 *)state->memregion("spritelut")->base();
172	172
173	173	while (source < finish)
174	174	{
r14976	r14977
408	408	//printf("protection read %04x\n", count);
409	409	//count++;
410	410
411		UINT8 *protdata = machine().region("user1")->base();
412		size_t protsize = machine().region("user1")->bytes();
	411	UINT8 *protdata = memregion("user1")->base();
	412	size_t protsize = memregion("user1")->bytes();
413	413	UINT8 dat = protdata[(m_protindex++) % protsize];
414	414
415	415	// real hw returns 00 after end of data, I haven't checked if it's possible to overflow the read counter
r14976	r14977
421	421
422	422	WRITE32_MEMBER(dreamwld_state::dreamwld_6295_0_bank_w)
423	423	{
424		UINT8 *sound = machine().region("oki1")->base();
	424	UINT8 *sound = memregion("oki1")->base();
425	425
426	426	if (ACCESSING_BITS_0_7)
427	427	memcpy(sound + 0x30000, sound + 0xb0000 + 0x10000 * (data&0x3), 0x10000);
r14976	r14977
431	431
432	432	WRITE32_MEMBER(dreamwld_state::dreamwld_6295_1_bank_w)
433	433	{
434		UINT8 *sound = machine().region("oki2")->base();
	434	UINT8 *sound = memregion("oki2")->base();
435	435
436	436	if (ACCESSING_BITS_0_7)
437	437	memcpy(sound + 0x30000, sound + 0xb0000 + 0x10000 * (data&0x3), 0x10000);

src/mame/drivers/astrocde.c

r14976	r14977
428	428
429	429	/* set the main banking */
430	430	prog_space->install_read_bank(0x4000, 0xbfff, "bank1");
431		memory_set_bankptr(machine(), "bank1", machine().region("user1")->base() + 0x8000 * bank);
	431	membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + 0x8000 * bank);
432	432
433	433	/* bank 0 reads video RAM in the 4000-7FFF range */
434	434	if (bank == 0)
435	435	prog_space->install_read_handler(0x4000, 0x7fff, read8_delegate(FUNC(astrocde_state::profpac_videoram_r),this));
436	436
437	437	/* if we have a 640k EPROM board, map that on top of the 4000-7FFF range if specified */
438		if ((data & 0x80) && machine().region("user2")->base() != NULL)
	438	if ((data & 0x80) && memregion("user2")->base() != NULL)
439	439	{
440	440	/* Note: There is a jumper which could change the base offset to 0xa8 instead */
441	441	bank = data - 0x80;
r14976	r14977
444	444	if (bank < 0x28)
445	445	{
446	446	prog_space->install_read_bank(0x4000, 0x7fff, "bank2");
447		memory_set_bankptr(machine(), "bank2", machine().region("user2")->base() + 0x4000 * bank);
	447	membank("bank2")->set_base(machine().root_device().memregion("user2")->base() + 0x4000 * bank);
448	448	}
449	449	else
450	450	prog_space->unmap_read(0x4000, 0x7fff);

src/mame/drivers/m62.c

r14976	r14977
90	90
91	91	/* swap to bank #1 on second read */
92	92	if (m_ldrun2_bankswap == 0)
93		memory_set_bank(machine(), "bank1", 1);
	93	membank("bank1")->set_entry(1);
94	94	}
95	95	return 0;
96	96	}
r14976	r14977
114	114	logerror("unknown bank select %02x\n",data);
115	115	return;
116	116	}
117		memory_set_bank(machine(), "bank1", banks[data - 1]);
	117	membank("bank1")->set_entry(banks[data - 1]);
118	118	}
119	119	else
120	120	{
r14976	r14977
143	143
144	144	WRITE8_MEMBER(m62_state::ldrun4_bankswitch_w)
145	145	{
146		memory_set_bank(machine(), "bank1", data & 0x01);
	146	membank("bank1")->set_entry(data & 0x01);
147	147	}
148	148
149	149	WRITE8_MEMBER(m62_state::kidniki_bankswitch_w)
150	150	{
151		memory_set_bank(machine(), "bank1", data & 0x0f);
	151	membank("bank1")->set_entry(data & 0x0f);
152	152	}
153	153
154	154	#define battroad_bankswitch_w kidniki_bankswitch_w
155	155
156	156	WRITE8_MEMBER(m62_state::spelunkr_bankswitch_w)
157	157	{
158		memory_set_bank(machine(), "bank1", data & 0x03);
	158	membank("bank1")->set_entry(data & 0x03);
159	159	}
160	160
161	161	WRITE8_MEMBER(m62_state::spelunk2_bankswitch_w)
162	162	{
163		memory_set_bank(machine(), "bank1", (data & 0xc0) >> 6);
164		memory_set_bank(machine(), "bank2", (data & 0x3c) >> 2);
	163	membank("bank1")->set_entry((data & 0xc0) >> 6);
	164	membank("bank2")->set_entry((data & 0x3c) >> 2);
165	165	}
166	166
167	167	WRITE8_MEMBER(m62_state::youjyudn_bankswitch_w)
168	168	{
169		memory_set_bank(machine(), "bank1", data & 0x01);
	169	membank("bank1")->set_entry(data & 0x01);
170	170	}
171	171
172	172
r14976	r14977
2158	2158	static DRIVER_INIT( battroad )
2159	2159	{
2160	2160	/* configure memory banks */
2161		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x2000);
	2161	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x2000);
2162	2162	}
2163	2163
2164	2164	static DRIVER_INIT( ldrun2 )
2165	2165	{
2166	2166	/* configure memory banks */
2167		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x2000);
	2167	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x2000);
2168	2168	}
2169	2169
2170	2170	static DRIVER_INIT( ldrun4 )
2171	2171	{
2172	2172	/* configure memory banks */
2173		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x4000);
	2173	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
2174	2174	}
2175	2175
2176	2176	static DRIVER_INIT( kidniki )
2177	2177	{
2178		UINT8 *ROM = machine.region("maincpu")->base();
	2178	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
2179	2179
2180	2180	/* in Kid Niki, bank 0 has code falling from 7fff to 8000, */
2181	2181	/* so I have to copy it there because bank switching wouldn't catch it */
2182	2182	memcpy(ROM + 0x08000, ROM + 0x10000, 0x2000);
2183	2183
2184	2184	/* configure memory banks */
2185		memory_configure_bank(machine, "bank1", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x2000);
	2185	machine.root_device().membank("bank1")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x2000);
2186	2186	}
2187	2187
2188	2188	static DRIVER_INIT( spelunkr )
2189	2189	{
2190	2190	/* configure memory banks */
2191		memory_configure_bank(machine, "bank1", 0, 4, machine.region("maincpu")->base() + 0x10000, 0x2000);
	2191	machine.root_device().membank("bank1")->configure_entries(0, 4, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x2000);
2192	2192	}
2193	2193
2194	2194	static DRIVER_INIT( spelunk2 )
2195	2195	{
2196	2196	/* configure memory banks */
2197		memory_configure_bank(machine, "bank1", 0,  4, machine.region("maincpu")->base() + 0x20000, 0x1000);
2198		memory_configure_bank(machine, "bank2", 0, 16, machine.region("maincpu")->base() + 0x10000, 0x1000);
	2197	machine.root_device().membank("bank1")->configure_entries(0,  4, machine.root_device().memregion("maincpu")->base() + 0x20000, 0x1000);
	2198	machine.root_device().membank("bank2")->configure_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x1000);
2199	2199	}
2200	2200
2201	2201	static DRIVER_INIT( youjyudn )
2202	2202	{
2203	2203	/* configure memory banks */
2204		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x10000, 0x4000);
	2204	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
2205	2205	}
2206	2206
2207	2207	GAME( 1984, kungfum,  0,        kungfum,  kungfum,  0,        ROT0,   "Irem", "Kung-Fu Master", GAME_SUPPORTS_SAVE )

src/mame/drivers/40love.c

r14976	r14977
274	274	//      popmessage("WRONG BANK SELECT = %x !!!!\n",data);
275	275	}
276	276
277		memory_set_bank(machine(), "bank1", data & 1);
	277	membank("bank1")->set_entry(data & 1);
278	278	}
279	279
280	280	WRITE8_MEMBER(fortyl_state::pix1_w)
r14976	r14977
566	566	static DRIVER_INIT( undoukai )
567	567	{
568	568	fortyl_state *state = machine.driver_data<fortyl_state>();
569		UINT8 *ROM = machine.region("maincpu")->base();
570		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x2000);
	569	UINT8 *ROM = state->memregion("maincpu")->base();
	570	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x2000);
571	571
572	572	state->m_pix_color[0] = 0x000;
573	573	state->m_pix_color[1] = 0x1e3;
r14976	r14977
578	578	static DRIVER_INIT( 40love )
579	579	{
580	580	fortyl_state *state = machine.driver_data<fortyl_state>();
581		UINT8 *ROM = machine.region("maincpu")->base();
582		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x2000);
	581	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	582	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x2000);
583	583
584	584	#if 0
585	585	/* character ROM hack
586	586	to show a white line on the opponent side */
587	587
588		UINT8 *ROM = machine.region("gfx2")->base();
	588	UINT8 *ROM = state->memregion("gfx2")->base();
589	589	int adr = 0x10 * 0x022b;
590	590	ROM[adr + 0x000a] = 0x00;
591	591	ROM[adr + 0x000b] = 0x00;

src/mame/drivers/galaga.c

r14976	r14977
809	809
810	810	static READ8_DEVICE_HANDLER( namco_52xx_rom_r )
811	811	{
812		UINT32 length = device->machine().region("52xx")->bytes();
	812	UINT32 length = device->machine().root_device().memregion("52xx")->bytes();
813	813	//printf("ROM read %04X\n", offset);
814	814	if (!(offset & 0x1000))
815	815	offset = (offset & 0xfff) | 0x0000;
r14976	r14977
819	819	offset = (offset & 0xfff) | 0x2000;
820	820	else if (!(offset & 0x8000))
821	821	offset = (offset & 0xfff) | 0x3000;
822		return (offset < length) ? device->machine().region("52xx")->base()[offset] : 0xff;
	822	return (offset < length) ? device->machine().root_device().memregion("52xx")->base()[offset] : 0xff;
823	823	}
824	824
825	825	static READ8_DEVICE_HANDLER( namco_52xx_si_r )
r14976	r14977
3260	3260	static DRIVER_INIT (galaga)
3261	3261	{
3262	3262	/* swap bytes for flipped character so we can decode them together with normal characters */
3263		UINT8 *rom = machine.region("gfx1")->base();
3264		int i, len = machine.region("gfx1")->bytes();
	3263	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	3264	int i, len = machine.root_device().memregion("gfx1")->bytes();
3265	3265
3266	3266	for (i = 0;i < len;i++)
3267	3267	{
r14976	r14977
3289	3289	UINT8 *rom;
3290	3290	int i;
3291	3291
3292		rom = machine.region("gfx3")->base() + 0x5000;
	3292	rom = machine.root_device().memregion("gfx3")->base() + 0x5000;
3293	3293	for (i = 0;i < 0x2000;i++)
3294	3294	rom[i + 0x2000] = rom[i] >> 4;
3295	3295	}
r14976	r14977
3301	3301
3302	3302
3303	3303	/* convert one of the sprite ROMs to the format used by Xevious */
3304		rom = machine.region("gfx3")->base();
	3304	rom = machine.root_device().memregion("gfx3")->base();
3305	3305	for (A = 0x5000;A < 0x7000;A++)
3306	3306	{
3307	3307	rom[A] = BITSWAP8(rom[A],1,3,5,7,0,2,4,6);
3308	3308	}
3309	3309
3310	3310	/* convert one of tile map ROMs to the format used by Xevious */
3311		rom = machine.region("gfx4")->base();
	3311	rom = machine.root_device().memregion("gfx4")->base();
3312	3312	for (A = 0x0000;A < 0x1000;A++)
3313	3313	{
3314	3314	rom[A] = BITSWAP8(rom[A],3,7,5,1,2,6,4,0);

src/mame/drivers/panicr.c

r14976	r14977
93	93
94	94	static PALETTE_INIT( panicr )
95	95	{
96		const UINT8 *color_prom = machine.region("proms")->base();
	96	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
97	97	int i;
98	98
99	99	/* allocate the colortable */
r14976	r14977
151	151	{
152	152	int code,attr;
153	153
154		code=machine.region("user1")->base()[tile_index];
155		attr=machine.region("user2")->base()[tile_index];
	154	code=machine.root_device().memregion("user1")->base()[tile_index];
	155	attr=machine.root_device().memregion("user2")->base()[tile_index];
156	156	code+=((attr&7)<<8);
157	157	SET_TILE_INFO(
158	158	1,
r14976	r14977
469	469	int size;
470	470	int i;
471	471
472		rom = machine.region("gfx1")->base();
473		size = machine.region("gfx1")->bytes();
	472	rom = machine.root_device().memregion("gfx1")->base();
	473	size = machine.root_device().memregion("gfx1")->bytes();
474	474
475	475	// text data lines
476	476	for (i = 0;i < size/2;i++)
r14976	r14977
492	492	}
493	493
494	494
495		rom = machine.region("gfx2")->base();
496		size = machine.region("gfx2")->bytes();
	495	rom = machine.root_device().memregion("gfx2")->base();
	496	size = machine.root_device().memregion("gfx2")->bytes();
497	497
498	498	// tiles data lines
499	499	for (i = 0;i < size/4;i++)
r14976	r14977
519	519	}
520	520
521	521
522		rom = machine.region("gfx3")->base();
523		size = machine.region("gfx3")->bytes();
	522	rom = machine.root_device().memregion("gfx3")->base();
	523	size = machine.root_device().memregion("gfx3")->bytes();
524	524
525	525	// sprites data lines
526	526	for (i = 0;i < size/2;i++)
r14976	r14977
545	545
546	546	//rearrange  bg tilemaps a bit....
547	547
548		rom = machine.region("user1")->base();
549		size = machine.region("user1")->bytes();
	548	rom = machine.root_device().memregion("user1")->base();
	549	size = machine.root_device().memregion("user1")->bytes();
550	550	memcpy(buf,rom, size);
551	551
552	552	{
r14976	r14977
558	558	}
559	559	}
560	560
561		rom = machine.region("user2")->base();
562		size = machine.region("user2")->bytes();
	561	rom = machine.root_device().memregion("user2")->base();
	562	size = machine.root_device().memregion("user2")->bytes();
563	563
564	564	memcpy(buf,rom, size);
565	565	{

src/mame/drivers/istellar.c

r14976	r14977
274	274
275	275	static PALETTE_INIT( istellar )
276	276	{
277		const UINT8 *color_prom = machine.region("proms")->base();
	277	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
278	278	int i;
279	279
280	280	/* Oddly enough, the top 4 bits of each byte is 0 */

src/mame/drivers/macs.c

r14976	r14977
98	98
99	99	WRITE8_MEMBER(macs_state::rambank_w)
100	100	{
101		memory_set_bankptr(machine(),  "bank3", &m_ram1[0x10000+(data&1)*0x800] );
	101	membank("bank3")->set_base(&m_ram1[0x10000+(data&1)*0x800] );
102	102	}
103	103
104	104	READ8_MEMBER(macs_state::macs_input_r)
r14976	r14977
136	136
137	137	WRITE8_MEMBER(macs_state::macs_rom_bank_w)
138	138	{
139		memory_set_bankptr(machine(),  "bank1", machine().region("maincpu")->base() + (data* 0x4000) + 0x10000 + macs_cart_slot*0x400000 );
	139	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + (data* 0x4000) + 0x10000 + macs_cart_slot*0x400000 );
140	140
141	141	m_st0016_rom_bank=data;
142	142	}
143	143
144	144	WRITE8_MEMBER(macs_state::macs_output_w)
145	145	{
146		UINT8 *ROM = machine().region("maincpu")->base();
	146	UINT8 *ROM = memregion("maincpu")->base();
147	147
148	148	switch(offset)
149	149	{
r14976	r14977
158	158	{
159	159	/* FIXME: dunno if this RAM bank is right, DASM tracking made on the POST screens indicates that there's just one RAM bank,
160	160	but then MACS2 games locks up. */
161		memory_set_bankptr(machine(),  "bank3", &m_ram1[((data&0x20)>>5)*0x1000+0x000] );
	161	membank("bank3")->set_base(&m_ram1[((data&0x20)>>5)*0x1000+0x000] );
162	162
163	163	macs_cart_slot = (data & 0xc) >> 2;
164	164
165		memory_set_bankptr(machine(),  "bank4", &ROM[macs_cart_slot*0x400000+0x10000] );
	165	membank("bank4")->set_base(&ROM[macs_cart_slot*0x400000+0x10000] );
166	166	}
167	167
168		memory_set_bankptr(machine(),  "bank2", &m_ram1[((data&0x20)>>5)*0x1000+0x800] );
	168	membank("bank2")->set_base(&m_ram1[((data&0x20)>>5)*0x1000+0x800] );
169	169	break;
170	170	case 2: m_mux_data = data; break;
171	171
r14976	r14977
676	676	730E: ED B0         ldir
677	677	...
678	678	*/
679		memcpy(macs_ram1 + 0x0e9f, machine.region("user1")->base()+0x7327, 0xc7);
680		memcpy(macs_ram1 + 0x1e9f, machine.region("user1")->base()+0x7327, 0xc7);
	679	memcpy(macs_ram1 + 0x0e9f, machine.root_device().memregion("user1")->base()+0x7327, 0xc7);
	680	memcpy(macs_ram1 + 0x1e9f, machine.root_device().memregion("user1")->base()+0x7327, 0xc7);
681	681
682		memcpy(macs_ram1 + 0x0800, machine.region("user1")->base()+0x73fa, 0x507);
683		memcpy(macs_ram1 + 0x1800, machine.region("user1")->base()+0x73fa, 0x507);
	682	memcpy(macs_ram1 + 0x0800, machine.root_device().memregion("user1")->base()+0x73fa, 0x507);
	683	memcpy(macs_ram1 + 0x1800, state->memregion("user1")->base()+0x73fa, 0x507);
684	684
685	685	#define MAKEJMP(n,m)   macs_ram2[(n) - 0xe800 + 0]=0xc3;\
686	686	macs_ram2[(n) - 0xe800 + 1]=(m)&0xff;\
r14976	r14977
716	716	macs_ram1[0x1ff9]=0x07;
717	717	#endif
718	718
719		memory_set_bankptr(machine,  "bank1", machine.region("maincpu")->base() + 0x10000 );
720		memory_set_bankptr(machine,  "bank2", macs_ram1+0x800);
721		memory_set_bankptr(machine,  "bank3", macs_ram1+0x10000);
722		memory_set_bankptr(machine,  "bank4", machine.region("maincpu")->base() );
	719	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x10000 );
	720	state->membank("bank2")->set_base(macs_ram1+0x800);
	721	state->membank("bank3")->set_base(macs_ram1+0x10000);
	722	state->membank("bank4")->set_base(machine.root_device().memregion("maincpu")->base() );
723	723	}
724	724
725	725	static DRIVER_INIT(macs)

src/mame/drivers/sbowling.c

r14976	r14977
75	75	static TILE_GET_INFO( get_sb_tile_info )
76	76	{
77	77	sbowling_state *state = machine.driver_data<sbowling_state>();
78		UINT8 *rom = machine.region("user1")->base();
	78	UINT8 *rom = state->memregion("user1")->base();
79	79	int tileno = rom[tile_index + state->m_bgmap * 1024];
80	80
81	81	SET_TILE_INFO(0, tileno, 0, 0);
r14976	r14977
342	342
343	343	static PALETTE_INIT( sbowling )
344	344	{
345		const UINT8 *color_prom = machine.region("proms")->base();
	345	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
346	346	int i;
347	347
348	348	static const int resistances_rg[3] = { 470, 270, 100 };

src/mame/drivers/psychic5.c

r14976	r14977
354	354
355	355	WRITE8_MEMBER(psychic5_state::psychic5_bankselect_w)
356	356	{
357		UINT8 *RAM = machine().region("maincpu")->base();
	357	UINT8 *RAM = memregion("maincpu")->base();
358	358	int bankaddress;
359	359
360	360	if (m_bank_latch != data)
361	361	{
362	362	m_bank_latch = data;
363	363	bankaddress = 0x10000 + ((data & 3) * 0x4000);
364		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);    /* Select 4 banks of 16k */
	364	membank("bank1")->set_base(&RAM[bankaddress]);    /* Select 4 banks of 16k */
365	365	}
366	366	}
367	367
368	368	WRITE8_MEMBER(psychic5_state::bombsa_bankselect_w)
369	369	{
370		UINT8 *RAM = machine().region("maincpu")->base();
	370	UINT8 *RAM = memregion("maincpu")->base();
371	371	int bankaddress;
372	372
373	373	if (m_bank_latch != data)
374	374	{
375	375	m_bank_latch = data;
376	376	bankaddress = 0x10000 + ((data & 7) * 0x4000);
377		memory_set_bankptr(machine(), "bank1", &RAM[bankaddress]);    /* Select 8 banks of 16k */
	377	membank("bank1")->set_base(&RAM[bankaddress]);    /* Select 8 banks of 16k */
378	378	}
379	379	}
380	380

src/mame/drivers/8080bw.c

r14976	r14977
2162	2162	/* decrypt function for vortex */
2163	2163	static DRIVER_INIT( vortex )
2164	2164	{
2165		UINT8 *rom = machine.region("maincpu")->base();
2166		int length = machine.region("maincpu")->bytes();
	2165	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	2166	int length = machine.root_device().memregion("maincpu")->bytes();
2167	2167	UINT8 *buf1 = auto_alloc_array(machine, UINT8, length);
2168	2168	UINT32 x;
2169	2169	for (x = 0; x < length; x++)

src/mame/drivers/othunder.c

r14976	r14977
393	393	static void reset_sound_region( running_machine &machine )
394	394	{
395	395	othunder_state *state = machine.driver_data<othunder_state>();
396		memory_set_bank(machine, "bank10", state->m_banknum);
	396	state->membank("bank10")->set_entry(state->m_banknum);
397	397	}
398	398
399	399
r14976	r14977
674	674	{
675	675	othunder_state *state = machine.driver_data<othunder_state>();
676	676
677		memory_configure_bank(machine, "bank10", 0, 4, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	677	state->membank("bank10")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0xc000, 0x4000);
678	678
679	679	state->m_maincpu = machine.device("maincpu");
680	680	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/1943.c

r14976	r14977
643	643
644	644	static DRIVER_INIT( 1943 )
645	645	{
646		UINT8 *ROM = machine.region("maincpu")->base();
647		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	646	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	647	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
648	648	}
649	649
650	650	READ8_MEMBER(_1943_state::_1943b_c007_r){ return 0; }

src/mame/drivers/psikyo4.c

r14976	r14977
319	319	if (offset == 2) /* Configure bank for gfx test */
320	320	{
321	321	if (ACCESSING_BITS_0_15)   // Bank
322		memory_set_bankptr(machine(), "bank2", machine().region("gfx1")->base() + 0x2000 * (m_vidregs[offset] & 0x1fff)); /* Bank comes from vidregs */
	322	membank("bank2")->set_base(machine().root_device().memregion("gfx1")->base() + 0x2000 * (m_vidregs[offset] & 0x1fff)); /* Bank comes from vidregs */
323	323	}
324	324	}
325	325
r14976	r14977
328	328	static void set_hotgmck_pcm_bank( running_machine &machine, int n )
329	329	{
330	330	psikyo4_state *state = machine.driver_data<psikyo4_state>();
331		UINT8 *ymf_pcmbank = machine.region("ymf")->base() + 0x200000;
332		UINT8 *pcm_rom = machine.region("ymfsource")->base();
	331	UINT8 *ymf_pcmbank = machine.root_device().memregion("ymf")->base() + 0x200000;
	332	UINT8 *pcm_rom = state->memregion("ymfsource")->base();
333	333
334	334	memcpy(ymf_pcmbank + n * 0x100000, pcm_rom + PCM_BANK_NO_LEGACY(n) * 0x100000, 0x100000);
335	335	}
r14976	r14977
955	955	static void install_hotgmck_pcm_bank(running_machine &machine)
956	956	{
957	957	psikyo4_state *state = machine.driver_data<psikyo4_state>();
958		UINT8 *ymf_pcm = machine.region("ymf")->base();
959		UINT8 *pcm_rom = machine.region("ymfsource")->base();
	958	UINT8 *ymf_pcm = machine.root_device().memregion("ymf")->base();
	959	UINT8 *pcm_rom = state->memregion("ymfsource")->base();
960	960
961	961	memcpy(ymf_pcm, pcm_rom, 0x200000);
962	962
r14976	r14977
970	970
971	971	static DRIVER_INIT( hotgmck )
972	972	{
973		UINT8 *RAM = machine.region("maincpu")->base();
974		memory_set_bankptr(machine, "bank1", &RAM[0x100000]);
	973	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	974	machine.root_device().membank("bank1")->set_base(&RAM[0x100000]);
975	975	install_hotgmck_pcm_bank(machine);   // Banked PCM ROM
976	976	}
977	977

src/mame/drivers/nss.c

r14976	r14977
394	394
395	395	if(m_m50458_rom_bank)
396	396	{
397		UINT8 *gfx_rom = machine().region("m50458_gfx")->base();
	397	UINT8 *gfx_rom = memregion("m50458_gfx")->base();
398	398
399	399	return gfx_rom[offset & 0xfff];
400	400	}
401	401	else
402	402	{
403		UINT8 *gfx_ram = machine().region("m50458_vram")->base();
	403	UINT8 *gfx_ram = memregion("m50458_vram")->base();
404	404
405	405	return gfx_ram[offset & 0xfff];
406	406	}
r14976	r14977
415	415	logerror("Warning: write to M50458 GFX ROM!\n");
416	416	else
417	417	{
418		UINT8 *gfx_ram = machine().region("m50458_vram")->base();
	418	UINT8 *gfx_ram = memregion("m50458_vram")->base();
419	419
420	420	gfx_ram[offset & 0xfff] = data;
421	421	}
r14976	r14977
481	481	---- ---x BIOS bankswitch
482	482	*/
483	483
484		memory_set_bank(machine(), "bank1", data & 1);
	484	membank("bank1")->set_entry(data & 1);
485	485	m_m50458_rom_bank = data & 4;
486	486	}
487	487
r14976	r14977
510	510	static MACHINE_START( nss )
511	511	{
512	512	nss_state *state = machine.driver_data<nss_state>();
513		UINT8 *ROM = machine.region("bios")->base();
	513	UINT8 *ROM = state->memregion("bios")->base();
514	514
515		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x8000);
516		memory_set_bank(machine, "bank1", 0);
	515	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x8000);
	516	state->membank("bank1")->set_entry(0);
517	517
518	518	state->m_m50458_rom_bank = 0;
519	519

src/mame/drivers/taito_x.c

r14976	r14977
412	412	{
413	413	taitox_state *state = machine.driver_data<taitox_state>();
414	414
415		memory_set_bankptr(machine,  "bank2", machine.region("audiocpu")->base() + (state->m_banknum * 0x4000) + 0x10000 );
	415	state->membank("bank2")->set_base(state->memregion("audiocpu")->base() + (state->m_banknum * 0x4000) + 0x10000 );
416	416	}
417	417
418	418	WRITE8_MEMBER(taitox_state::sound_bankswitch_w)

src/mame/drivers/djboy.c

r14976	r14977
179	179	{
180	180
181	181	data ^= m_bankxor;
182		memory_set_bank(machine(), "bank1", data);
183		memory_set_bank(machine(), "bank4", 0); /* unsure if/how this area is banked */
	182	membank("bank1")->set_entry(data);
	183	membank("bank4")->set_entry(0); /* unsure if/how this area is banked */
184	184	}
185	185
186	186	/******************************************************************************/
r14976	r14977
202	202	case 0x01:
203	203	case 0x02:
204	204	case 0x03:
205		memory_set_bank(machine(), "bank2", (data & 0xf));
	205	membank("bank2")->set_entry((data & 0xf));
206	206	break;
207	207
208	208	/* bs101.6w */
r14976	r14977
214	214	case 0x0d:
215	215	case 0x0e:
216	216	case 0x0f:
217		memory_set_bank(machine(), "bank2", (data & 0xf) - 4);
	217	membank("bank2")->set_entry((data & 0xf) - 4);
218	218	break;
219	219
220	220	default:
r14976	r14977
238	238
239	239	WRITE8_MEMBER(djboy_state::cpu2_bankswitch_w)
240	240	{
241		memory_set_bank(machine(), "bank3", data);   // shall we check data<0x07?
	241	membank("bank3")->set_entry(data);   // shall we check data<0x07?
242	242	}
243	243
244	244	/******************************************************************************/
r14976	r14977
522	522	static MACHINE_START( djboy )
523	523	{
524	524	djboy_state *state = machine.driver_data<djboy_state>();
525		UINT8 *MAIN = machine.region("maincpu")->base();
526		UINT8 *CPU1 = machine.region("cpu1")->base();
527		UINT8 *CPU2 = machine.region("cpu2")->base();
	525	UINT8 *MAIN = machine.root_device().memregion("maincpu")->base();
	526	UINT8 *CPU1 = machine.root_device().memregion("cpu1")->base();
	527	UINT8 *CPU2 = state->memregion("cpu2")->base();
528	528
529		memory_configure_bank(machine, "bank1", 0, 4,  &MAIN[0x00000], 0x2000);
530		memory_configure_bank(machine, "bank1", 4, 28, &MAIN[0x10000], 0x2000);
531		memory_configure_bank(machine, "bank2", 0, 2,  &CPU1[0x00000], 0x4000);
532		memory_configure_bank(machine, "bank2", 2, 10, &CPU1[0x10000], 0x4000);
533		memory_configure_bank(machine, "bank3", 0, 3,  &CPU2[0x00000], 0x4000);
534		memory_configure_bank(machine, "bank3", 3, 5,  &CPU2[0x10000], 0x4000);
535		memory_configure_bank(machine, "bank4", 0, 1,  &MAIN[0x10000], 0x3000); /* unsure if/how this area is banked */
	529	state->membank("bank1")->configure_entries(0, 4,  &MAIN[0x00000], 0x2000);
	530	state->membank("bank1")->configure_entries(4, 28, &MAIN[0x10000], 0x2000);
	531	state->membank("bank2")->configure_entries(0, 2,  &CPU1[0x00000], 0x4000);
	532	state->membank("bank2")->configure_entries(2, 10, &CPU1[0x10000], 0x4000);
	533	state->membank("bank3")->configure_entries(0, 3,  &CPU2[0x00000], 0x4000);
	534	state->membank("bank3")->configure_entries(3, 5,  &CPU2[0x10000], 0x4000);
	535	state->membank("bank4")->configure_entry(0, &MAIN[0x10000]); /* unsure if/how this area is banked */
536	536
537	537	state->m_maincpu = machine.device("maincpu");
538	538	state->m_cpu1 = machine.device("cpu1");

src/mame/drivers/sidearms.c

r14976	r14977
44	44	WRITE8_MEMBER(sidearms_state::sidearms_bankswitch_w)
45	45	{
46	46	int bankaddress;
47		UINT8 *RAM = machine().region("maincpu")->base();
	47	UINT8 *RAM = memregion("maincpu")->base();
48	48
49	49
50	50	/* bits 0 and 1 select the ROM bank */
51	51	bankaddress = 0x10000 + (data & 0x0f) * 0x4000;
52		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	52	membank("bank1")->set_base(&RAM[bankaddress]);
53	53	}
54	54
55	55
r14976	r14977
124	124	WRITE8_MEMBER(sidearms_state::whizz_bankswitch_w)
125	125	{
126	126	int bankaddress;
127		UINT8 *RAM = machine().region("maincpu")->base();
	127	UINT8 *RAM = memregion("maincpu")->base();
128	128	int bank = 0;
129	129
130	130	switch (data & 0xC0)
r14976	r14977
136	136	}
137	137
138	138	bankaddress = 0x10000 + bank * 0x4000;
139		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	139	membank("bank1")->set_base(&RAM[bankaddress]);
140	140	}
141	141
142	142	static ADDRESS_MAP_START( whizz_map, AS_PROGRAM, 8, sidearms_state )

src/mame/drivers/tumblep.c

r14976	r14977
389	389	void tumblep_patch_code(UINT16 offset)
390	390	{
391	391	/* A hack which enables all Dip Switches effects */
392		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	392	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
393	393	RAM[(offset + 0)/2] = 0x0240;
394	394	RAM[(offset + 2)/2] = 0xffff;   // andi.w  #$f3ff, D0
395	395	}

src/mame/drivers/kingobox.c

r14976	r14977
788	788	static DRIVER_INIT( ringking3 )
789	789	{
790	790	int i;
791		UINT8 *RAM = machine.region("proms")->base();
	791	UINT8 *RAM = machine.root_device().memregion("proms")->base();
792	792
793	793	/* expand the first color PROM to look like the kingofb ones... */
794	794	for (i = 0; i < 0x100; i++)
r14976	r14977
798	798	static DRIVER_INIT( ringkingw )
799	799	{
800	800	int i,j,k;
801		UINT8 *PROMS = machine.region("proms")->base();
802		UINT8 *USER1 = machine.region("user1")->base();
	801	UINT8 *PROMS = machine.root_device().memregion("proms")->base();
	802	UINT8 *USER1 = machine.root_device().memregion("user1")->base();
803	803
804	804	/* change the PROMs encode in a simple format to use kingofb decode */
805	805	for(i = 0, j = 0; j < 0x40; i++, j++)

src/mame/drivers/esripsys.c

r14976	r14977
104	104	WRITE8_MEMBER(esripsys_state::g_status_w)
105	105	{
106	106	int bankaddress;
107		UINT8 *rom = machine().region("game_cpu")->base();
	107	UINT8 *rom = memregion("game_cpu")->base();
108	108
109	109	m_g_status = data;
110	110
111	111	bankaddress = 0x10000 + (data & 0x03) * 0x10000;
112		memory_set_bankptr(machine(), "bank1", &rom[bankaddress]);
	112	membank("bank1")->set_base(&rom[bankaddress]);
113	113
114	114	cputag_set_input_line(machine(), "frame_cpu", M6809_FIRQ_LINE, data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
115	115	cputag_set_input_line(machine(), "frame_cpu", INPUT_LINE_NMI,  data & 0x80 ? CLEAR_LINE : ASSERT_LINE);
r14976	r14977
491	491
492	492	WRITE8_MEMBER(esripsys_state::s_200f_w)
493	493	{
494		UINT8 *rom = machine().region("sound_data")->base();
	494	UINT8 *rom = memregion("sound_data")->base();
495	495	int rombank = data & 0x20 ? 0x2000 : 0;
496	496
497	497	/* Bit 6 -> Reset latch U56A */
r14976	r14977
506	506	m_u56b = 1;
507	507
508	508	/* Speech data resides in the upper 8kB of the ROMs */
509		memory_set_bankptr(machine(), "bank2", &rom[0x0000 + rombank]);
510		memory_set_bankptr(machine(), "bank3", &rom[0x4000 + rombank]);
511		memory_set_bankptr(machine(), "bank4", &rom[0x8000 + rombank]);
	509	membank("bank2")->set_base(&rom[0x0000 + rombank]);
	510	membank("bank3")->set_base(&rom[0x4000 + rombank]);
	511	membank("bank4")->set_base(&rom[0x8000 + rombank]);
512	512
513	513	m_s_to_g_latch2 = data;
514	514	}
r14976	r14977
645	645	static DRIVER_INIT( esripsys )
646	646	{
647	647	esripsys_state *state = machine.driver_data<esripsys_state>();
648		UINT8 *rom = machine.region("sound_data")->base();
	648	UINT8 *rom = state->memregion("sound_data")->base();
649	649
650	650	state->m_fdt_a = auto_alloc_array(machine, UINT8, FDT_RAM_SIZE);
651	651	state->m_fdt_b = auto_alloc_array(machine, UINT8, FDT_RAM_SIZE);
r14976	r14977
653	653
654	654	machine.device<nvram_device>("nvram")->set_base(state->m_cmos_ram, CMOS_RAM_SIZE);
655	655
656		memory_set_bankptr(machine, "bank2", &rom[0x0000]);
657		memory_set_bankptr(machine, "bank3", &rom[0x4000]);
658		memory_set_bankptr(machine, "bank4", &rom[0x8000]);
	656	state->membank("bank2")->set_base(&rom[0x0000]);
	657	state->membank("bank3")->set_base(&rom[0x4000]);
	658	state->membank("bank4")->set_base(&rom[0x8000]);
659	659
660	660	/* Register stuff for state saving */
661	661	state_save_register_global_pointer(machine, state->m_fdt_a, FDT_RAM_SIZE);

src/mame/drivers/ettrivia.c

r14976	r14977
87	87
88	88	READ8_MEMBER(ettrivia_state::ettrivia_question_r)
89	89	{
90		UINT8 *QUESTIONS = machine().region("user1")->base();
	90	UINT8 *QUESTIONS = memregion("user1")->base();
91	91	return QUESTIONS[offset + 0x10000 * m_question_bank];
92	92	}
93	93
r14976	r14977
215	215
216	216	static PALETTE_INIT( ettrivia )
217	217	{
218		const UINT8 *color_prom = machine.region("proms")->base();
	218	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
219	219	static const int resistances[2] = { 270, 130 };
220	220	double weights[2];
221	221	int i;

src/mame/drivers/jalmah.c

r14976	r14977
353	353	static void jalmah_priority_system(running_machine &machine)
354	354	{
355	355	jalmah_state *state = machine.driver_data<jalmah_state>();
356		UINT8 *pri_rom = machine.region("user1")->base();
	356	UINT8 *pri_rom = state->memregion("user1")->base();
357	357	UINT8 i;
358	358	UINT8 prinum[0x10];
359	359
r14976	r14977
950	950	{
951	951	if(ACCESSING_BITS_0_7)
952	952	{
953		UINT8 *oki = machine().region("oki")->base();
	953	UINT8 *oki = memregion("oki")->base();
954	954
955	955	m_oki_rom = data & 1;
956	956
r14976	r14977
967	967	{
968	968	if(ACCESSING_BITS_0_7)
969	969	{
970		UINT8 *oki = machine().region("oki")->base();
	970	UINT8 *oki = memregion("oki")->base();
971	971
972	972	m_oki_bank = data & 3;
973	973

src/mame/drivers/f1gp.c

r14976	r14977
43	43
44	44	READ16_MEMBER(f1gp_state::extrarom_r)
45	45	{
46		UINT8 *rom = machine().region("user1")->base();
	46	UINT8 *rom = memregion("user1")->base();
47	47
48	48	offset *= 2;
49	49
r14976	r14977
52	52
53	53	READ16_MEMBER(f1gp_state::extrarom2_r)
54	54	{
55		UINT8 *rom = machine().region("user2")->base();
	55	UINT8 *rom = memregion("user2")->base();
56	56
57	57	offset *= 2;
58	58
r14976	r14977
61	61
62	62	WRITE8_MEMBER(f1gp_state::f1gp_sh_bankswitch_w)
63	63	{
64		memory_set_bank(machine(), "bank1", data & 0x01);
	64	membank("bank1")->set_entry(data & 0x01);
65	65	}
66	66
67	67
r14976	r14977
166	166	if(old_bank != new_bank && new_bank < 5)
167	167	{
168	168	// oki banking
169		UINT8 *src = machine().region("oki")->base() + 0x40000 + 0x10000 * new_bank;
170		UINT8 *dst = machine().region("oki")->base() + 0x30000;
	169	UINT8 *src = memregion("oki")->base() + 0x40000 + 0x10000 * new_bank;
	170	UINT8 *dst = memregion("oki")->base() + 0x30000;
171	171	memcpy(dst, src, 0x10000);
172	172
173	173	old_bank = new_bank;
r14976	r14977
427	427	static MACHINE_START( f1gp )
428	428	{
429	429	f1gp_state *state = machine.driver_data<f1gp_state>();
430		UINT8 *ROM = machine.region("audiocpu")->base();
	430	UINT8 *ROM = state->memregion("audiocpu")->base();
431	431
432		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x8000);
	432	state->membank("bank1")->configure_entries(0, 2, &ROM[0x10000], 0x8000);
433	433
434	434	state->m_audiocpu = machine.device("audiocpu");
435	435	state->m_k053936 = machine.device("k053936");

src/mame/drivers/supdrapo.c

r14976	r14977
126	126	/*Maybe bit 2 & 3 of the second color prom are intensity bits? */
127	127	static PALETTE_INIT( sdpoker )
128	128	{
129		const UINT8 *color_prom = machine.region("proms")->base();
	129	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
130	130	int   bit0, bit1, bit2 , r, g, b;
131	131	int   i;
132	132

src/mame/drivers/namcos2.c

r14976	r14977
5100	5100	{
5101	5101	/* unscramble sprites */
5102	5102	int i, j, k, l;
5103		UINT8 *data = machine.region("gfx1")->base();
	5103	UINT8 *data = machine.root_device().memregion("gfx1")->base();
5104	5104	for(i=0; i<0x200000; i+=32*32)
5105	5105	{
5106	5106	for(j=0; j<32*32; j+=32*4)
r14976	r14977
5217	5217
5218	5218
5219	5219	static DRIVER_INIT( luckywld ){
5220		UINT8 *pData = (UINT8 *)machine.region( "gfx5" )->base();
	5220	UINT8 *pData = (UINT8 *)machine.root_device().memregion( "gfx5" )->base();
5221	5221	int i;
5222	5222	for( i=0; i<32*0x4000; i++ )
5223	5223	{ /* unscramble gfx mask */

src/mame/drivers/exzisus.c

r14976	r14977
48	48
49	49	WRITE8_MEMBER(exzisus_state::exzisus_cpua_bankswitch_w)
50	50	{
51		UINT8 *RAM = machine().region("cpua")->base();
	51	UINT8 *RAM = memregion("cpua")->base();
52	52
53	53	if ( (data & 0x0f) != m_cpua_bank )
54	54	{
55	55	m_cpua_bank = data & 0x0f;
56	56	if (m_cpua_bank >= 2)
57	57	{
58		memory_set_bankptr(machine(),  "bank2", &RAM[ 0x10000 + ( (m_cpua_bank - 2) * 0x4000 ) ] );
	58	membank("bank2")->set_base(&RAM[ 0x10000 + ( (m_cpua_bank - 2) * 0x4000 ) ] );
59	59	}
60	60	}
61	61
r14976	r14977
64	64
65	65	WRITE8_MEMBER(exzisus_state::exzisus_cpub_bankswitch_w)
66	66	{
67		UINT8 *RAM = machine().region("cpub")->base();
	67	UINT8 *RAM = memregion("cpub")->base();
68	68
69	69	if ( (data & 0x0f) != m_cpub_bank )
70	70	{
71	71	m_cpub_bank = data & 0x0f;
72	72	if (m_cpub_bank >= 2)
73	73	{
74		memory_set_bankptr(machine(),  "bank1", &RAM[ 0x10000 + ( (m_cpub_bank - 2) * 0x4000 ) ] );
	74	membank("bank1")->set_base(&RAM[ 0x10000 + ( (m_cpub_bank - 2) * 0x4000 ) ] );
75	75	}
76	76	}
77	77
r14976	r14977
117	117	// the RAM check to work
118	118	static DRIVER_INIT( exzisus )
119	119	{
120		UINT8 *RAM = machine.region("cpua")->base();
	120	UINT8 *RAM = machine.root_device().memregion("cpua")->base();
121	121
122	122	/* Fix WORK RAM error */
123	123	RAM[0x67fd] = 0x18;

src/mame/drivers/merit.c

r14976	r14977
100	100
101	101	READ8_MEMBER(merit_state::questions_r)
102	102	{
103		UINT8 *questions = machine().region("user1")->base();
	103	UINT8 *questions = memregion("user1")->base();
104	104	int address;
105	105
106	106	switch(m_question_address >> 16)
r14976	r14977
220	220	UINT16 x = 0;
221	221	int rlen;
222	222
223		gfx[0] = device->machine().region("gfx1")->base();
224		gfx[1] = device->machine().region("gfx2")->base();
225		rlen = device->machine().region("gfx2")->bytes();
	223	gfx[0] = device->machine().root_device().memregion("gfx1")->base();
	224	gfx[1] = device->machine().root_device().memregion("gfx2")->base();
	225	rlen = state->memregion("gfx2")->bytes();
226	226
227	227	//ma = ma ^ 0x7ff;
228	228	for (cx = 0; cx < x_count; cx++)
r14976	r14977
335	335	{
336	336	if ( data == 0 )
337	337	{
338		memory_set_bank(machine(), "bank1", 1);
339		memory_set_bank(machine(), "bank2", 1);
	338	membank("bank1")->set_entry(1);
	339	membank("bank2")->set_entry(1);
340	340	}
341	341	else if ( data == 0xff )
342	342	{
343		memory_set_bank(machine(), "bank1", 0);
344		memory_set_bank(machine(), "bank2", 0);
	343	membank("bank1")->set_entry(0);
	344	membank("bank2")->set_entry(0);
345	345	}
346	346	else
347	347	{
r14976	r14977
1215	1215	static MACHINE_START(casino5)
1216	1216	{
1217	1217	MACHINE_START_CALL(merit);
1218		memory_configure_bank(machine, "bank1", 0, 2, machine.region("maincpu")->base() + 0x2000, 0x2000);
1219		memory_configure_bank(machine, "bank2", 0, 2, machine.region("maincpu")->base() + 0x6000, 0x2000);
1220		memory_set_bank(machine, "bank1", 0);
1221		memory_set_bank(machine, "bank2", 0);
	1218	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x2000, 0x2000);
	1219	machine.root_device().membank("bank2")->configure_entries(0, 2, machine.root_device().memregion("maincpu")->base() + 0x6000, 0x2000);
	1220	machine.root_device().membank("bank1")->set_entry(0);
	1221	machine.root_device().membank("bank2")->set_entry(0);
1222	1222	}
1223	1223
1224	1224	static MACHINE_CONFIG_START( pitboss, merit_state )
r14976	r14977
2021	2021
2022	2022	static DRIVER_INIT( couple )
2023	2023	{
2024		UINT8 *ROM = machine.region("maincpu")->base();
	2024	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
2025	2025
2026	2026	#if 0 //quick rom compare test
2027	2027	{
r14976	r14977
2041	2041	dumpers it's just the way it is,a.k.a. it's an "hardware" banking.
2042	2042	update 20060118 by f205v: now we have 3 dumps from 3 different boards and they
2043	2043	all behave the same...*/
2044		memory_set_bankptr(machine, "bank1",ROM + 0x10000 + (0x2000 * 2));
	2044	machine.root_device().membank("bank1")->set_base(ROM + 0x10000 + (0x2000 * 2));
2045	2045	}
2046	2046
2047	2047	static DRIVER_INIT( dtrvwz5 )
2048	2048	{
2049	2049	merit_state *state = machine.driver_data<merit_state>();
2050	2050	int i;
2051		UINT8 *ROM = machine.region("maincpu")->base();
	2051	UINT8 *ROM = state->memregion("maincpu")->base();
2052	2052	/* fill b000 - b0ff with ret 0xc9 */
2053	2053	for ( i = 0xb000; i < 0xb100; i++ )
2054	2054	ROM[i] = 0xc9;

src/mame/drivers/pingpong.c

r14976	r14977
36	36	static const char * const bankname[] = { "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
37	37	const char *bank = bankname[data & 7];
38	38	int bankaddr = m_question_addr_high | ((data - 0x60) * 0x100);
39		UINT8 *questions = machine().region("user1")->base() + bankaddr;
40		memory_set_bankptr(machine(), bank,questions);
	39	UINT8 *questions = memregion("user1")->base() + bankaddr;
	40	membank(bank)->set_base(questions);
41	41
42	42	}
43	43	}
r14976	r14977
559	559
560	560	static DRIVER_INIT( merlinmm )
561	561	{
562		UINT8 *ROM = machine.region("maincpu")->base();
	562	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
563	563	int i;
564	564
565	565	/* decrypt program code */
r14976	r14977
573	573	int i;
574	574
575	575	/* decrypt program code */
576		ROM = machine.region("maincpu")->base();
	576	ROM = machine.root_device().memregion("maincpu")->base();
577	577	for( i = 0; i < 0x4000; i++ )
578	578	ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7);
579	579
580	580	/* decrypt questions */
581		ROM = machine.region("user1")->base();
	581	ROM = machine.root_device().memregion("user1")->base();
582	582	for( i = 0; i < 0x40000; i++ )
583	583	ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7);
584	584
r14976	r14977
598	598	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x5700, 0x57ff, "bank8");
599	599
600	600	// setup default banks
601		memory_set_bankptr(machine, "bank1", machine.region("user1")->base() + 0x100*0 );
602		memory_set_bankptr(machine, "bank2", machine.region("user1")->base() + 0x100*1 );
603		memory_set_bankptr(machine, "bank3", machine.region("user1")->base() + 0x100*2 );
604		memory_set_bankptr(machine, "bank4", machine.region("user1")->base() + 0x100*3 );
605		memory_set_bankptr(machine, "bank5", machine.region("user1")->base() + 0x100*4 );
606		memory_set_bankptr(machine, "bank6", machine.region("user1")->base() + 0x100*5 );
607		memory_set_bankptr(machine, "bank7", machine.region("user1")->base() + 0x100*6 );
608		memory_set_bankptr(machine, "bank8", machine.region("user1")->base() + 0x100*7 );
	601	state->membank("bank1")->set_base(machine.root_device().memregion("user1")->base() + 0x100*0 );
	602	state->membank("bank2")->set_base(machine.root_device().memregion("user1")->base() + 0x100*1 );
	603	state->membank("bank3")->set_base(machine.root_device().memregion("user1")->base() + 0x100*2 );
	604	state->membank("bank4")->set_base(machine.root_device().memregion("user1")->base() + 0x100*3 );
	605	state->membank("bank5")->set_base(machine.root_device().memregion("user1")->base() + 0x100*4 );
	606	state->membank("bank6")->set_base(machine.root_device().memregion("user1")->base() + 0x100*5 );
	607	state->membank("bank7")->set_base(machine.root_device().memregion("user1")->base() + 0x100*6 );
	608	state->membank("bank8")->set_base(state->memregion("user1")->base() + 0x100*7 );
609	609	}
610	610
611	611

src/mame/drivers/ssrj.c

r14976	r14977
37	37	static MACHINE_RESET(ssrj)
38	38	{
39	39	ssrj_state *state = machine.driver_data<ssrj_state>();
40		UINT8 *rom = machine.region("maincpu")->base();
	40	UINT8 *rom = state->memregion("maincpu")->base();
41	41
42	42	memset(&rom[0xc000], 0 ,0x3fff); /* req for some control types */
43	43	state->m_oldport = 0x80;

src/mame/drivers/meadows.c

r14976	r14977
872	872	0x01,0x80, 0x03,0xc0, 0x03,0xc0, 0x01,0x80
873	873	};
874	874	int i;
875		UINT8 *gfx2 = machine.region("gfx2")->base();
876		UINT8 *gfx3 = machine.region("gfx3")->base();
877		UINT8 *gfx4 = machine.region("gfx4")->base();
878		UINT8 *gfx5 = machine.region("gfx5")->base();
879		int len3 = machine.region("gfx3")->bytes();
880		int len4 = machine.region("gfx4")->bytes();
	875	UINT8 *gfx2 = machine.root_device().memregion("gfx2")->base();
	876	UINT8 *gfx3 = machine.root_device().memregion("gfx3")->base();
	877	UINT8 *gfx4 = machine.root_device().memregion("gfx4")->base();
	878	UINT8 *gfx5 = machine.root_device().memregion("gfx5")->base();
	879	int len3 = machine.root_device().memregion("gfx3")->bytes();
	880	int len4 = machine.root_device().memregion("gfx4")->bytes();
881	881
882	882	memcpy(gfx3,gfx2,len3);
883	883
r14976	r14977
896	896	UINT8 *mem;
897	897
898	898	/* create an inverted copy of the graphics data */
899		mem = machine.region("gfx1")->base();
900		length = machine.region("gfx1")->bytes();
	899	mem = machine.root_device().memregion("gfx1")->base();
	900	length = machine.root_device().memregion("gfx1")->bytes();
901	901	for (i = 0; i < length/2; i++)
902	902	mem[i] = ~mem[i + length/2];
903	903	}

src/mame/drivers/sms.c

r14976	r14977
248	248
249	249	WRITE8_MEMBER(smsmfg_state::bankswitch_w)
250	250	{
251		memory_set_bank(machine(), "bank1", data);
	251	membank("bank1")->set_entry(data);
252	252	}
253	253
254	254	/*************************************
r14976	r14977
533	533	static MACHINE_START( sms )
534	534	{
535	535	smsmfg_state *state = machine.driver_data<smsmfg_state>();
536		memory_configure_bank(machine, "bank1", 0, 16, machine.region("questions")->base(), 0x4000);
	536	state->membank("bank1")->configure_entries(0, 16, state->memregion("questions")->base(), 0x4000);
537	537
538	538	state_save_register_global(machine, state->m_communication_port_status);
539	539	state_save_register_global_array(machine, state->m_communication_port);

src/mame/drivers/harddriv.c

r14976	r14977
3924	3924	static void init_dsk(running_machine &machine)
3925	3925	{
3926	3926	harddriv_state *state = machine.driver_data<harddriv_state>();
3927		UINT8 *usr3 = machine.region("user3")->base();
	3927	UINT8 *usr3 = state->memregion("user3")->base();
3928	3928
3929	3929	/* install ASIC61 */
3930	3930	state->m_maincpu->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x85c000, 0x85c7ff, FUNC(hd68k_dsk_dsp32_r), FUNC(hd68k_dsk_dsp32_w));
r14976	r14977
3958	3958	static void init_dsk2(running_machine &machine)
3959	3959	{
3960	3960	harddriv_state *state = machine.driver_data<harddriv_state>();
3961		UINT8 *usr3 = machine.region("user3")->base();
	3961	UINT8 *usr3 = state->memregion("user3")->base();
3962	3962
3963	3963	/* install ASIC65 */
3964	3964	state->m_maincpu->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x824000, 0x824003, FUNC(asic65_data_w));

src/mame/drivers/spoker.c

r14976	r14977
575	575	static DRIVER_INIT( spk116it )
576	576	{
577	577	int A;
578		UINT8 *rom = machine.region("maincpu")->base();
	578	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
579	579
580	580
581	581	for (A = 0;A < 0x10000;A++)
r14976	r14977
682	682
683	683	static DRIVER_INIT( 3super8 )
684	684	{
685		UINT8 *ROM = machine.region("maincpu")->base();
	685	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
686	686	int i;
687	687
688	688	/* Decryption is probably done using one macrocell/output on an address decoding pal which we do not have a dump of */
r14976	r14977
700	700
701	701	/* cheesy hack: take gfx roms from spk116it and rearrange them for this game needs */
702	702	{
703		UINT8 *src = machine.region("rep_gfx")->base();
704		UINT8 *dst = machine.region("gfx1")->base();
	703	UINT8 *src = machine.root_device().memregion("rep_gfx")->base();
	704	UINT8 *dst = machine.root_device().memregion("gfx1")->base();
705	705	UINT8 x;
706	706
707	707	for(x=0;x<3;x++)

src/mame/drivers/srmp2.c

r14976	r14977
171	171	*/
172	172
173	173	srmp2_state *state = device->machine().driver_data<srmp2_state>();
174		UINT8 *ROM = device->machine().region("adpcm")->base();
	174	UINT8 *ROM = state->memregion("adpcm")->base();
175	175
176	176	state->m_adpcm_sptr = (ROM[((state->m_adpcm_bank * 0x10000) + (data << 2) + 0)] << 8);
177	177	state->m_adpcm_eptr = (ROM[((state->m_adpcm_bank * 0x10000) + (data << 2) + 1)] << 8);
r14976	r14977
195	195	*/
196	196
197	197	srmp2_state *state = device->machine().driver_data<srmp2_state>();
198		UINT8 *ROM = device->machine().region("adpcm")->base();
	198	UINT8 *ROM = state->memregion("adpcm")->base();
199	199
200	200	state->m_adpcm_sptr = (ROM[((state->m_adpcm_bank * 0x10000) + (data << 2) + 0)] << 8);
201	201	state->m_adpcm_eptr = (ROM[((state->m_adpcm_bank * 0x10000) + (data << 2) + 1)] << 8);
r14976	r14977
212	212	static void srmp2_adpcm_int(device_t *device)
213	213	{
214	214	srmp2_state *state = device->machine().driver_data<srmp2_state>();
215		UINT8 *ROM = device->machine().region("adpcm")->base();
	215	UINT8 *ROM = state->memregion("adpcm")->base();
216	216
217	217	if (state->m_adpcm_sptr)
218	218	{
r14976	r14977
357	357	xxx- ---- : ADPCM ROM bank
358	358	*/
359	359
360		UINT8 *ROM = machine().region("maincpu")->base();
	360	UINT8 *ROM = memregion("maincpu")->base();
361	361	int addr;
362	362
363	363	m_adpcm_bank = ((data & 0xe0) >> 5);
r14976	r14977
365	365	if (data & 0x1f) addr = ((0x10000 + (0x2000 * (data & 0x0f))) - 0x8000);
366	366	else addr = 0x10000;
367	367
368		memory_set_bankptr(machine(), "bank1", &ROM[addr]);
	368	membank("bank1")->set_base(&ROM[addr]);
369	369	}
370	370
371	371	/**************************************************************************
r14976	r14977
507	507	xxx- ---- : ADPCM ROM bank
508	508	*/
509	509
510		UINT8 *ROM = machine().region("maincpu")->base();
	510	UINT8 *ROM = memregion("maincpu")->base();
511	511	int addr;
512	512
513	513	m_adpcm_bank = ((data & 0xe0) >> 5);
r14976	r14977
515	515	if (data & 0x1f) addr = ((0x10000 + (0x2000 * (data & 0x1f))) - 0x8000);
516	516	else addr = 0x10000;
517	517
518		memory_set_bankptr(machine(), "bank1", &ROM[addr]);
	518	membank("bank1")->set_base(&ROM[addr]);
519	519	}
520	520
521	521	static ADDRESS_MAP_START( rmgoldyh_io_map, AS_IO, 8, srmp2_state )

src/mame/drivers/ohmygod.c

r14976	r14977
22	22
23	23	if (ACCESSING_BITS_0_7)
24	24	{
25		UINT8 *rom = machine().region("oki")->base();
	25	UINT8 *rom = memregion("oki")->base();
26	26
27	27	/* ADPCM bank switch */
28	28	if (m_sndbank != ((data >> m_adpcm_bank_shift) & 0x0f))
r14976	r14977
306	306	static MACHINE_RESET( ohmygod )
307	307	{
308	308	ohmygod_state *state = machine.driver_data<ohmygod_state>();
309		UINT8 *rom = machine.region("oki")->base();
	309	UINT8 *rom = state->memregion("oki")->base();
310	310
311	311	state->m_sndbank = 0;
312	312	memcpy(rom + 0x20000, rom + 0x40000 + 0x20000 * state->m_sndbank, 0x20000);

src/mame/drivers/snk68.c

r14976	r14977
1040	1040
1041	1041	static DRIVER_INIT( searchar )
1042	1042	{
1043		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
	1043	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("user1")->base());
1044	1044	}
1045	1045
1046	1046	/******************************************************************************/

src/mame/drivers/aeroboto.c

r14976	r14977
227	227	{
228	228	aeroboto_state *state = machine.driver_data<aeroboto_state>();
229	229
230		state->m_stars_rom = machine.region("gfx2")->base();
231		state->m_stars_length = machine.region("gfx2")->bytes();
	230	state->m_stars_rom = machine.root_device().memregion("gfx2")->base();
	231	state->m_stars_length = state->memregion("gfx2")->bytes();
232	232
233	233	state->save_item(NAME(state->m_disable_irq));
234	234	state->save_item(NAME(state->m_count));

src/mame/drivers/madalien.c

r14976	r14977
25	25
26	26	INLINE UINT8 shift_common(running_machine &machine, UINT8 hi, UINT8 lo)
27	27	{
28		const UINT8 *table = machine.region("user2")->base();
	28	const UINT8 *table = machine.root_device().memregion("user2")->base();
29	29
30	30	return table[((hi & 0x07) << 8) | lo];
31	31	}

src/mame/drivers/firetrap.c

r14976	r14977
183	183
184	184	WRITE8_MEMBER(firetrap_state::firetrap_bankselect_w)
185	185	{
186		memory_set_bank(machine(), "bank1", data & 0x03);
	186	membank("bank1")->set_entry(data & 0x03);
187	187	}
188	188
189	189	READ8_MEMBER(firetrap_state::firetrap_8751_bootleg_r)
r14976	r14977
315	315
316	316	WRITE8_MEMBER(firetrap_state::firetrap_sound_bankselect_w)
317	317	{
318		memory_set_bank(machine(), "bank2", data & 0x01);
	318	membank("bank2")->set_entry(data & 0x01);
319	319	}
320	320
321	321	static void firetrap_adpcm_int( device_t *device )
r14976	r14977
593	593	static MACHINE_START( firetrap )
594	594	{
595	595	firetrap_state *state = machine.driver_data<firetrap_state>();
596		UINT8 *MAIN = machine.region("maincpu")->base();
597		UINT8 *SOUND = machine.region("audiocpu")->base();
	596	UINT8 *MAIN = machine.root_device().memregion("maincpu")->base();
	597	UINT8 *SOUND = state->memregion("audiocpu")->base();
598	598
599	599	state->m_maincpu = machine.device("maincpu");
600	600	state->m_audiocpu = machine.device("audiocpu");
601	601	state->m_msm = machine.device("msm");
602	602
603		memory_configure_bank(machine, "bank1", 0, 4, &MAIN[0x10000], 0x4000);
604		memory_configure_bank(machine, "bank2", 0, 2, &SOUND[0x10000], 0x4000);
	603	state->membank("bank1")->configure_entries(0, 4, &MAIN[0x10000], 0x4000);
	604	state->membank("bank2")->configure_entries(0, 2, &SOUND[0x10000], 0x4000);
605	605
606	606	state->save_item(NAME(state->m_i8751_current_command));
607	607	state->save_item(NAME(state->m_sound_irq_enable));

src/mame/drivers/thedeep.c

r14976	r14977
53	53	static MACHINE_RESET( thedeep )
54	54	{
55	55	thedeep_state *state = machine.driver_data<thedeep_state>();
56		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x10000 + 0 * 0x4000);
	56	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x10000 + 0 * 0x4000);
57	57	state->m_scroll[0] = 0;
58	58	state->m_scroll[1] = 0;
59	59	state->m_scroll[2] = 0;
r14976	r14977
86	86	int new_rombank = m_protection_command & 3;
87	87	if (m_rombank == new_rombank)   break;
88	88	m_rombank = new_rombank;
89		rom = machine().region("maincpu")->base();
90		memory_set_bankptr(machine(), "bank1", rom + 0x10000 + m_rombank * 0x4000);
	89	rom = memregion("maincpu")->base();
	90	membank("bank1")->set_base(rom + 0x10000 + m_rombank * 0x4000);
91	91	/* there's code which falls through from the fixed ROM to bank #1, I have to */
92	92	/* copy it there otherwise the CPU bank switching support will not catch it. */
93	93	memcpy(rom + 0x08000, rom + 0x10000 + m_rombank * 0x4000, 0x4000);
r14976	r14977
116	116	// d166-d174:   hl = (hl + 2*a)
117	117	// d175-d181:   hl *= e (e must be non zero)
118	118	// d182-d19a:   hl /= de
119		m_protection_data = machine().region("mcu")->base()[0x185+m_protection_index++];
	119	m_protection_data = memregion("mcu")->base()[0x185+m_protection_index++];
120	120	else
121	121	m_protection_data = 0xc9;
122	122
r14976	r14977
197	197	if (state->m_rombank == new_rombank)
198	198	return;
199	199	state->m_rombank = new_rombank;
200		rom = machine.region("maincpu")->base();
201		memory_set_bankptr(machine, "bank1", rom + 0x10000 + state->m_rombank * 0x4000);
	200	rom = state->memregion("maincpu")->base();
	201	state->membank("bank1")->set_base(rom + 0x10000 + state->m_rombank * 0x4000);
202	202	/* there's code which falls through from the fixed ROM to bank #1, I have to */
203	203	/* copy it there otherwise the CPU bank switching support will not catch it. */
204	204	memcpy(rom + 0x08000, rom + 0x10000 + state->m_rombank * 0x4000, 0x4000);

src/mame/drivers/zr107.c

r14976	r14977
838	838	state->m_led_reg0 = state->m_led_reg1 = 0x7f;
839	839	state->m_ccu_vcth = state->m_ccu_vctl = 0;
840	840
841		K001005_preprocess_texture_data(machine.region("gfx1")->base(), machine.region("gfx1")->bytes(), 0);
	841	K001005_preprocess_texture_data(machine.root_device().memregion("gfx1")->base(), state->memregion("gfx1")->bytes(), 0);
842	842	}
843	843
844	844	static DRIVER_INIT(zr107)

src/mame/drivers/sbrkout.c

r14976	r14977
99	99	{
100	100	sbrkout_state *state = machine.driver_data<sbrkout_state>();
101	101	UINT8 *videoram = state->m_videoram;
102		memory_set_bankptr(machine, "bank1", &videoram[0x380]);
	102	state->membank("bank1")->set_base(&videoram[0x380]);
103	103	state->m_scanline_timer = machine.scheduler().timer_alloc(FUNC(scanline_callback));
104	104	state->m_pot_timer = machine.scheduler().timer_alloc(FUNC(pot_trigger_callback));
105	105

src/mame/drivers/bladestl.c

r14976	r14977
80	80	/* bit 4 = relay (???) */
81	81
82	82	/* bits 5-6 = bank number */
83		memory_set_bank(machine(), "bank1", (data & 0x60) >> 5);
	83	membank("bank1")->set_entry((data & 0x60) >> 5);
84	84
85	85	/* bit 7 = select sprite bank */
86	86	m_spritebank = (data & 0x80) << 3;
r14976	r14977
301	301	static MACHINE_START( bladestl )
302	302	{
303	303	bladestl_state *state = machine.driver_data<bladestl_state>();
304		UINT8 *ROM = machine.region("maincpu")->base();
	304	UINT8 *ROM = state->memregion("maincpu")->base();
305	305
306		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
	306	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x2000);
307	307
308	308	state->m_audiocpu = machine.device("audiocpu");
309	309	state->m_k007342 = machine.device("k007342");

src/mame/drivers/srumbler.c

r14976	r14977
28	28	that as well to be 100% accurate.
29	29	*/
30	30	int i;
31		UINT8 *ROM = machine().region("user1")->base();
32		UINT8 *prom1 = machine().region("proms")->base() + (data & 0xf0);
33		UINT8 *prom2 = machine().region("proms")->base() + 0x100 + ((data & 0x0f) << 4);
	31	UINT8 *ROM = memregion("user1")->base();
	32	UINT8 *prom1 = memregion("proms")->base() + (data & 0xf0);
	33	UINT8 *prom2 = memregion("proms")->base() + 0x100 + ((data & 0x0f) << 4);
34	34
35	35	for (i = 0x05;i < 0x10;i++)
36	36	{
r14976	r14977
39	39	/* bit 2 of prom1 selects ROM or RAM - not supported */
40	40
41	41	sprintf(bankname, "%04x", i*0x1000);
42		memory_set_bankptr(machine(), bankname,&ROM[bank*0x1000]);
	42	membank(bankname)->set_base(&ROM[bank*0x1000]);
43	43	}
44	44	}
45	45

src/mame/drivers/pbaction.c

r14976	r14977
481	481	static DRIVER_INIT( pbactio3 )
482	482	{
483	483	int i;
484		UINT8 *rom = machine.region("maincpu")->base();
	484	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
485	485
486	486	/* first of all, do a simple bitswap */
487	487	for (i = 0; i < 0xc000; i++)

src/mame/drivers/funworld.c

r14976	r14977
867	867
868	868	READ8_MEMBER(funworld_state::questions_r)
869	869	{
870		UINT8* quiz = machine().region("questions")->base();
	870	UINT8* quiz = memregion("questions")->base();
871	871	int extraoffset = ((funquiz_question_bank & 0x1f) * 0x8000);
872	872
873	873	// if 0x80 is set, read the 2nd half of the question rom (contains header info)
r14976	r14977
4346	4346	*****************************************************************************************************/
4347	4347
4348	4348	int x, na, nb, nad, nbd;
4349		UINT8 *src = machine.region( "gfx1" )->base();
	4349	UINT8 *src = machine.root_device().memregion( "gfx1" )->base();
4350	4350
4351	4351
4352	4352	for (x=0x0000; x < 0x10000; x++)
r14976	r14977
4376	4376
4377	4377	******************************************************************/
4378	4378	{
4379		UINT8 *ROM = machine.region("maincpu")->base();
	4379	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4380	4380
4381	4381	ROM[0xc1c6] = 0x92;
4382	4382	}
r14976	r14977
4385	4385	/*** same as blue TAB PCB, with the magicd2a patch ***/
4386	4386	{
4387	4387	int x, na, nb, nad, nbd;
4388		UINT8 *src = machine.region( "gfx1" )->base();
4389		UINT8 *ROM = machine.region("maincpu")->base();
	4388	UINT8 *src = machine.root_device().memregion( "gfx1" )->base();
	4389	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4390	4390
4391	4391	for (x=0x0000; x < 0x10000; x++)
4392	4392	{
r14976	r14977
4405	4405	static DRIVER_INIT( soccernw )
4406	4406	{
4407	4407	/* temporary patch to avoid hardware errors for debug purposes */
4408		UINT8 *ROM = machine.region("maincpu")->base();
	4408	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4409	4409
4410	4410	ROM[0x80b2] = 0xa9;
4411	4411	ROM[0x80b3] = 0x00;
r14976	r14977
4440	4440
4441	4441	*************************************************/
4442	4442	{
4443		UINT8 *rom = machine.region("maincpu")->base();
4444		int size = machine.region("maincpu")->bytes();
	4443	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	4444	int size = machine.root_device().memregion("maincpu")->bytes();
4445	4445	int start = 0x8000;
4446	4446
4447		UINT8 *gfxrom = machine.region("gfx1")->base();
4448		int sizeg = machine.region("gfx1")->bytes();
	4447	UINT8 *gfxrom = machine.root_device().memregion("gfx1")->base();
	4448	int sizeg = machine.root_device().memregion("gfx1")->bytes();
4449	4449	int startg = 0;
4450	4450
4451		UINT8 *prom = machine.region("proms")->base();
4452		int sizep = machine.region("proms")->bytes();
	4451	UINT8 *prom = machine.root_device().memregion("proms")->base();
	4452	int sizep = machine.root_device().memregion("proms")->bytes();
4453	4453	int startp = 0;
4454	4454
4455	4455	UINT8 *buffer;
r14976	r14977
4534	4534
4535	4535	******************************************************/
4536	4536	{
4537		UINT8 *ROM = machine.region("maincpu")->base();
	4537	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4538	4538	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
4539	4539
4540	4540	int x;
r14976	r14977
4553	4553	ROM[x+0x10000] = code;
4554	4554	}
4555	4555
4556		space->set_decrypted_region(0x8000, 0xffff, machine.region("maincpu")->base() + 0x18000);
	4556	space->set_decrypted_region(0x8000, 0xffff, machine.root_device().memregion("maincpu")->base() + 0x18000);
4557	4557	}
4558	4558
4559	4559	static DRIVER_INIT( royalcdc )
r14976	r14977
4567	4567
4568	4568	******************************************************/
4569	4569
4570		UINT8 *ROM = machine.region("maincpu")->base();
	4570	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
4571	4571	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
4572	4572
4573	4573	int x;
r14976	r14977
4606	4606	ROM[x+0x10000] = code;
4607	4607	}
4608	4608
4609		space->set_decrypted_region(0x6000, 0xffff, machine.region("maincpu")->base() + 0x16000);
	4609	space->set_decrypted_region(0x6000, 0xffff, machine.root_device().memregion("maincpu")->base() + 0x16000);
4610	4610	}
4611	4611
4612	4612

src/mame/drivers/jackpool.c

r14976	r14977
296	296
297	297	static DRIVER_INIT( jackpool )
298	298	{
299		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	299	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
300	300
301	301	/* patch NVRAM routine */
302	302	rom[0x9040/2] = 0x6602;

src/mame/drivers/gsword.c

r14976	r14977
903	903	static DRIVER_INIT( gsword )
904	904	{
905	905	#if 0
906		UINT8 *ROM2 = machine.region("sub")->base();
	906	UINT8 *ROM2 = machine.root_device().memregion("sub")->base();
907	907	ROM2[0x1da] = 0xc3; /* patch for rom self check */
908	908
909	909	ROM2[0x71e] = 0;    /* patch for sound protection or time out function */
r14976	r14977
919	919	static DRIVER_INIT( gsword2 )
920	920	{
921	921	#if 0
922		UINT8 *ROM2 = machine.region("sub")->base();
	922	UINT8 *ROM2 = machine.root_device().memregion("sub")->base();
923	923
924	924	ROM2[0x1da] = 0xc3; /* patch for rom self check */
925	925	ROM2[0x726] = 0;    /* patch for sound protection or time out function */

src/mame/drivers/nbmj8900.c

r14976	r14977
45	45	static DRIVER_INIT( ohpaipee )
46	46	{
47	47	#if 0
48		UINT8 *prot = machine.region("protdata")->base();
	48	UINT8 *prot = machine.root_device().memregion("protdata")->base();
49	49	int i;
50	50
51	51	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
59	59	prot[i] = BITSWAP8(prot[i],2,7,3,5,0,6,4,1);
60	60	}
61	61	#else
62		unsigned char *ROM = machine.region("maincpu")->base();
	62	unsigned char *ROM = machine.root_device().memregion("maincpu")->base();
63	63
64	64	// Protection ROM check skip
65	65	ROM[0x00e4] = 0x00;
r14976	r14977
78	78	static DRIVER_INIT( togenkyo )
79	79	{
80	80	#if 0
81		UINT8 *prot = machine.region("protdata")->base();
	81	UINT8 *prot = machine.root_device().memregion("protdata")->base();
82	82	int i;
83	83
84	84	/* this is one possible way to rearrange the protection ROM data to get the
r14976	r14977
91	91	prot[i] = BITSWAP8(prot[i],2,7,3,5,0,6,4,1);
92	92	}
93	93	#else
94		unsigned char *ROM = machine.region("maincpu")->base();
	94	unsigned char *ROM = machine.root_device().memregion("maincpu")->base();
95	95
96	96	// Protection ROM check skip
97	97	ROM[0x010b] = 0x00;

src/mame/drivers/xmen.c

r14976	r14977
97	97	static void sound_reset_bank( running_machine &machine )
98	98	{
99	99	xmen_state *state = machine.driver_data<xmen_state>();
100		memory_set_bank(machine, "bank4", state->m_sound_curbank & 0x07);
	100	state->membank("bank4")->set_entry(state->m_sound_curbank & 0x07);
101	101	}
102	102
103	103	WRITE8_MEMBER(xmen_state::sound_bankswitch_w)
r14976	r14977
295	295	static MACHINE_START( xmen )
296	296	{
297	297	xmen_state *state = machine.driver_data<xmen_state>();
298		UINT8 *ROM = machine.region("audiocpu")->base();
	298	UINT8 *ROM = state->memregion("audiocpu")->base();
299	299
300		memory_configure_bank(machine, "bank4", 0, 8, &ROM[0x10000], 0x4000);
301		memory_set_bank(machine, "bank4", 0);
	300	state->membank("bank4")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
	301	state->membank("bank4")->set_entry(0);
302	302
303	303	state->m_maincpu = machine.device("maincpu");
304	304	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/silkroad.c

r14976	r14977
327	327	verified as correct... problem with the original which the gfx
328	328	hardware didn't care about? */
329	329
330		UINT8 *src = machine.region("gfx1")->base()+0x1000000;
	330	UINT8 *src = machine.root_device().memregion("gfx1")->base()+0x1000000;
331	331	int len = 0x0200000;
332	332	UINT8 *buffer;
333	333

src/mame/drivers/wink.c

r14976	r14977
411	411	static DRIVER_INIT( wink )
412	412	{
413	413	UINT32 i;
414		UINT8 *ROM = machine.region("maincpu")->base();
	414	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
415	415	UINT8 *buffer = auto_alloc_array(machine, UINT8, 0x8000);
416	416
417	417	// protection module reverse engineered by HIGHWAYMAN

src/mame/drivers/lethal.c

r14976	r14977
234	234
235	235	WRITE8_MEMBER(lethal_state::le_bankswitch_w)
236	236	{
237		memory_set_bank(machine(), "bank1", data);
	237	membank("bank1")->set_entry(data);
238	238	}
239	239
240	240	READ8_MEMBER(lethal_state::le_4800_r)
r14976	r14977
579	579	static MACHINE_START( lethalen )
580	580	{
581	581	lethal_state *state = machine.driver_data<lethal_state>();
582		UINT8 *ROM = machine.region("maincpu")->base();
	582	UINT8 *ROM = state->memregion("maincpu")->base();
583	583
584		memory_configure_bank(machine, "bank1", 0, 0x20, &ROM[0x10000], 0x2000);
585		memory_set_bank(machine, "bank1", 0);
	584	state->membank("bank1")->configure_entries(0, 0x20, &ROM[0x10000], 0x2000);
	585	state->membank("bank1")->set_entry(0);
586	586
587	587	state->m_generic_paletteram_8.allocate(0x3800 + 0x02);
588	588
r14976	r14977
601	601	static MACHINE_RESET( lethalen )
602	602	{
603	603	lethal_state *state = machine.driver_data<lethal_state>();
604		UINT8 *prgrom = (UINT8 *)machine.region("maincpu")->base();
	604	UINT8 *prgrom = (UINT8 *)state->memregion("maincpu")->base();
605	605	int i;
606	606
607		memory_set_bankptr(machine, "bank2", &prgrom[0x48000]);
	607	state->membank("bank2")->set_base(&prgrom[0x48000]);
608	608	/* force reset again to read proper reset vector */
609	609	machine.device("maincpu")->reset();
610	610

src/mame/drivers/exprraid.c

r14976	r14977
732	732	{
733	733	/* Expand the background rom so we can use regular decode routines */
734	734
735		UINT8   *gfx = machine.region("gfx3")->base();
	735	UINT8   *gfx = machine.root_device().memregion("gfx3")->base();
736	736	int offs = 0x10000 - 0x1000;
737	737	int i;
738	738
r14976	r14977
751	751
752	752	static DRIVER_INIT( wexpress )
753	753	{
754		UINT8 *rom = machine.region("maincpu")->base();
	754	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
755	755
756	756	/* HACK: this set uses M6502 irq vectors but DECO CPU-16 opcodes??? */
757	757	rom[0xfff7] = rom[0xfffa];

src/mame/drivers/2mindril.c

r14976	r14977
495	495	{
496	496	UINT8 lsb,msb;
497	497	UINT32 offset,i;
498		UINT8 *gfx = machine.region("gfx2")->base();
499		int size=machine.region("gfx2")->bytes();
	498	UINT8 *gfx = machine.root_device().memregion("gfx2")->base();
	499	int size=machine.root_device().memregion("gfx2")->bytes();
500	500	int data;
501	501
502	502	/* Setup ROM formats:
r14976	r14977
528	528	offset+=4;
529	529	}
530	530
531		gfx = machine.region("gfx1")->base();
532		size=machine.region("gfx1")->bytes();
	531	gfx = machine.root_device().memregion("gfx1")->base();
	532	size=machine.root_device().memregion("gfx1")->bytes();
533	533
534	534	offset = size/2;
535	535	for (i = size/2+size/4; i<size; i++)

src/mame/drivers/naughtyb.c

r14976	r14977
846	846
847	847	READ8_MEMBER(naughtyb_state::trvmstr_questions_r)
848	848	{
849		return machine().region("user1")->base()[m_question_offset];
	849	return memregion("user1")->base()[m_question_offset];
850	850	}
851	851
852	852	WRITE8_MEMBER(naughtyb_state::trvmstr_questions_w)

src/mame/drivers/corona.c

r14976	r14977
353	353
354	354	static PALETTE_INIT( winner )
355	355	{
356		const UINT8 *color_prom = machine.region("proms")->base();
	356	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
357	357	int bit6, bit7, bit0, bit1, r, g, b;
358	358	int i;
359	359

src/mame/drivers/taitowlf.c

r14976	r14977
73	73	static SCREEN_UPDATE_RGB32( taitowlf )
74	74	{
75	75	int x,y,count;
76		const UINT8 *blit_ram = screen.machine().region("user5")->base();
	76	const UINT8 *blit_ram = screen.machine().root_device().memregion("user5")->base();
77	77
78	78	bitmap.fill(get_black_pen(screen.machine()), cliprect);
79	79
r14976	r14977
144	144	{
145	145	if (data & 0x10)      // enable RAM access to region 0xf0000 - 0xfffff
146	146	{
147		memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
	147	state->membank("bank1")->set_base(state->m_bios_ram);
148	148	}
149	149	else               // disable RAM access (reads go to BIOS ROM)
150	150	{
151		memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("user1")->base() + 0x30000);
	151	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("user1")->base() + 0x30000);
152	152	}
153	153	break;
154	154	}
r14976	r14977
539	539
540	540	static MACHINE_RESET(taitowlf)
541	541	{
542		memory_set_bankptr(machine, "bank1", machine.region("user1")->base() + 0x30000);
	542	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("user1")->base() + 0x30000);
543	543	}
544	544
545	545

src/mame/drivers/taito_z.c

r14976	r14977
1417	1417	static void reset_sound_region( running_machine &machine )
1418	1418	{
1419	1419	taitoz_state *state = machine.driver_data<taitoz_state>();
1420		memory_set_bank(machine,  "bank10", state->m_banknum);
	1420	state->membank("bank10")->set_entry(state->m_banknum);
1421	1421	}
1422	1422
1423	1423	WRITE8_MEMBER(taitoz_state::sound_bankswitch_w)
r14976	r14977
3060	3060
3061	3061	static MACHINE_START( taitoz )
3062	3062	{
3063		int banks = (machine.region("audiocpu")->bytes() - 0xc000) / 0x4000;
	3063	int banks = (machine.root_device().memregion("audiocpu")->bytes() - 0xc000) / 0x4000;
3064	3064
3065		memory_configure_bank(machine, "bank10", 0, banks, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	3065	machine.root_device().membank("bank10")->configure_entries(0, banks, machine.root_device().memregion("audiocpu")->base() + 0xc000, 0x4000);
3066	3066
3067	3067	machine.save().register_postload(save_prepost_delegate(FUNC(taitoz_postload), &machine));
3068	3068

src/mame/drivers/rastan.c

r14976	r14977
163	163
164	164	static WRITE8_DEVICE_HANDLER( rastan_bankswitch_w )
165	165	{
166		memory_set_bank(device->machine(),  "bank1", data & 3);
	166	device->machine().root_device().membank("bank1")->set_entry(data & 3);
167	167	}
168	168
169	169
r14976	r14977
177	177	}
178	178	else
179	179	{
180		state->m_adpcm_data = device->machine().region("adpcm")->base()[state->m_adpcm_pos];
	180	state->m_adpcm_data = device->machine().root_device().memregion("adpcm")->base()[state->m_adpcm_pos];
181	181	state->m_adpcm_pos = (state->m_adpcm_pos + 1) & 0xffff;
182	182	msm5205_data_w(device, state->m_adpcm_data >> 4);
183	183	}
r14976	r14977
359	359	static MACHINE_START( rastan )
360	360	{
361	361	rastan_state *state = machine.driver_data<rastan_state>();
362		UINT8 *ROM = machine.region("audiocpu")->base();
	362	UINT8 *ROM = state->memregion("audiocpu")->base();
363	363
364		memory_configure_bank(machine, "bank1", 0, 1, &ROM[0x00000], 0x4000);
365		memory_configure_bank(machine, "bank1", 1, 3, &ROM[0x10000], 0x4000);
	364	state->membank("bank1")->configure_entry(0, &ROM[0x00000]);
	365	state->membank("bank1")->configure_entries(1, 3, &ROM[0x10000], 0x4000);
366	366
367	367	state->m_maincpu = machine.device("maincpu");
368	368	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/pntnpuzl.c

r14976	r14977
378	378
379	379	static DRIVER_INIT(pip)
380	380	{
381		//  UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	381	//  UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
382	382	//  rom[0x2696/2] = 0x4e71;
383	383	//  rom[0x26a0/2] = 0x4e71;
384	384	pc_vga_init(machine, vga_setting, NULL);

src/mame/drivers/funkball.c

r14976	r14977
490	490
491	491	if(m_flash_data_cmd == 0xff)
492	492	{
493		UINT8 *ROM = machine().region(m_flash_cmd & 0x80 ? "prg_flash" : "data_flash")->base();
	493	UINT8 *ROM = memregion(m_flash_cmd & 0x80 ? "prg_flash" : "data_flash")->base();
494	494
495	495	return ROM[offset + (m_flash_addr << 16)];
496	496	}
r14976	r14977
534	534	for(i=0;i<8;i++)
535	535	{
536	536	if (data & 0x1 << i*4)      // enable RAM access to region 0xe0000 - 0xfffff
537		memory_set_bankptr(machine(), banknames[i], m_bios_ram + (0x4000 * i));
	537	membank(banknames[i])->set_base(m_bios_ram + (0x4000 * i));
538	538	else               // disable RAM access (reads go to BIOS ROM)
539		memory_set_bankptr(machine(), banknames[i], machine().region("bios")->base() + (0x4000 * i));
	539	membank(banknames[i])->set_base(machine().root_device().memregion("bios")->base() + (0x4000 * i));
540	540	}
541	541	}
542	542	}
r14976	r14977
1118	1118	static MACHINE_RESET( funkball )
1119	1119	{
1120	1120	funkball_state *state = machine.driver_data<funkball_state>();
1121		memory_set_bankptr(machine, "bios_ext1", machine.region("bios")->base() + 0x00000);
1122		memory_set_bankptr(machine, "bios_ext2", machine.region("bios")->base() + 0x04000);
1123		memory_set_bankptr(machine, "bios_ext3", machine.region("bios")->base() + 0x08000);
1124		memory_set_bankptr(machine, "bios_ext4", machine.region("bios")->base() + 0x0c000);
1125		memory_set_bankptr(machine, "bios_bank1", machine.region("bios")->base() + 0x10000);
1126		memory_set_bankptr(machine, "bios_bank2", machine.region("bios")->base() + 0x14000);
1127		memory_set_bankptr(machine, "bios_bank3", machine.region("bios")->base() + 0x18000);
1128		memory_set_bankptr(machine, "bios_bank4", machine.region("bios")->base() + 0x1c000);
	1121	state->membank("bios_ext1")->set_base(machine.root_device().memregion("bios")->base() + 0x00000);
	1122	state->membank("bios_ext2")->set_base(machine.root_device().memregion("bios")->base() + 0x04000);
	1123	state->membank("bios_ext3")->set_base(machine.root_device().memregion("bios")->base() + 0x08000);
	1124	state->membank("bios_ext4")->set_base(machine.root_device().memregion("bios")->base() + 0x0c000);
	1125	state->membank("bios_bank1")->set_base(machine.root_device().memregion("bios")->base() + 0x10000);
	1126	state->membank("bios_bank2")->set_base(machine.root_device().memregion("bios")->base() + 0x14000);
	1127	state->membank("bios_bank3")->set_base(machine.root_device().memregion("bios")->base() + 0x18000);
	1128	state->membank("bios_bank4")->set_base(state->memregion("bios")->base() + 0x1c000);
1129	1129	state->m_voodoo_pci_regs.base_addr = 0xff000000;
1130	1130	}
1131	1131

src/mame/drivers/aristmk5.c

r14976	r14977
289	289
290	290	4 pages of 32k for each sram chip.
291	291	*/
292		memory_set_bank(machine(),"sram_bank", (data & 0xc0) >> 6);
293		memory_set_bank(machine(),"sram_bank_nz", (data & 0xc0) >> 6);
	292	membank("sram_bank")->set_entry((data & 0xc0) >> 6);
	293	membank("sram_bank_nz")->set_entry((data & 0xc0) >> 6);
294	294	}
295	295
296	296	/* U.S games have no dram emulator enabled */
r14976	r14977
359	359
360	360	static DRIVER_INIT( aristmk5 )
361	361	{
362		UINT8 *SRAM    = machine.region("sram")->base();
363		UINT8 *SRAM_NZ = machine.region("sram")->base();
	362	UINT8 *SRAM    = machine.root_device().memregion("sram")->base();
	363	UINT8 *SRAM_NZ = machine.root_device().memregion("sram")->base();
364	364
365	365	archimedes_driver_init(machine);
366	366
367		memory_configure_bank(machine, "sram_bank", 0, 4,    &SRAM[0],    0x20000);
368		memory_configure_bank(machine, "sram_bank_nz", 0, 4, &SRAM_NZ[0], 0x20000);
	367	machine.root_device().membank("sram_bank")->configure_entries(0, 4,    &SRAM[0],    0x20000);
	368	machine.root_device().membank("sram_bank_nz")->configure_entries(0, 4, &SRAM_NZ[0], 0x20000);
369	369	}
370	370
371	371
r14976	r14977
392	392
393	393	/* load the roms according to what the operator wants */
394	394	{
395		UINT8 *ROM = machine.region("maincpu")->base();
396		UINT8 *PRG;// = machine.region("prg_code")->base();
	395	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	396	UINT8 *PRG;// = state->memregion("prg_code")->base();
397	397	int i;
398	398	UINT8 op_mode;
399	399	static const char *const rom_region[] = { "set_chip_4.04", "set_chip_4.4", "clear_chip", "game_prg" };
400	400
401	401	op_mode = input_port_read(machine, "ROM_LOAD");
402	402
403		PRG = machine.region(rom_region[op_mode & 3])->base();
	403	PRG = machine.root_device().memregion(rom_region[op_mode & 3])->base();
404	404
405	405	if(PRG!=NULL)
406	406

src/mame/drivers/tmspoker.c

r14976	r14977
293	293
294	294	static MACHINE_START( tmspoker )
295	295	{
296		UINT8 *ROM = machine.region("maincpu")->base();
297		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0], 0x1000);
	296	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	297	machine.root_device().membank("bank1")->configure_entries(0, 2, &ROM[0], 0x1000);
298	298	}
299	299
300	300
r14976	r14977
304	304
305	305	popmessage("ROM Bank: %02X", seldsw);
306	306
307		memory_set_bank(machine, "bank1", seldsw);
	307	machine.root_device().membank("bank1")->set_entry(seldsw);
308	308	}
309	309
310	310
r14976	r14977
615	615	{
616	616	/* decode the TMS9980 ROMs */
617	617	offs_t offs;
618		UINT8 *rom = machine.region("maincpu")->base();
619		const size_t len = machine.region("maincpu")->bytes();
	618	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	619	const size_t len = machine.root_device().memregion("maincpu")->bytes();
620	620
621	621	for (offs = 0; offs < len; offs++)
622	622	{

src/mame/drivers/metalmx.c

r14976	r14977
770	770
771	771	static DRIVER_INIT( metalmx )
772	772	{
773		UINT8 *adsp_boot = (UINT8*)machine.region("adsp")->base();
	773	UINT8 *adsp_boot = (UINT8*)machine.root_device().memregion("adsp")->base();
774	774	metalmx_state *state = machine.driver_data<metalmx_state>();
775	775
776	776	state->m_adsp->load_boot_data(adsp_boot, state->m_adsp_internal_program_ram);

src/mame/drivers/konendev.c

r14976	r14977
161	161
162	162	DRIVER_INIT( konendev )
163	163	{
164		UINT8 *src = machine.region( "maincpu" )->base();
165		size_t  srcsize = machine.region( "maincpu" )->bytes();
	164	UINT8 *src = machine.root_device().memregion( "maincpu" )->base();
	165	size_t  srcsize = machine.root_device().memregion( "maincpu" )->bytes();
166	166	for (int i = 0; i < srcsize; i += 2)
167	167	{
168	168	int temp = src[i];

src/mame/drivers/darkhors.c

r14976	r14977
962	962
963	963	static DRIVER_INIT( darkhors )
964	964	{
965		UINT32 *rom    = (UINT32 *) machine.region("maincpu")->base();
966		//   UINT8  *eeprom = (UINT8 *)  machine.region("eeprom")->base();
	965	UINT32 *rom    = (UINT32 *) machine.root_device().memregion("maincpu")->base();
	966	//   UINT8  *eeprom = (UINT8 *)  machine.root_device().memregion("eeprom")->base();
967	967	//   int i;
968	968
969	969	#if 1

src/mame/drivers/upscope.c

r14976	r14977
87	87	static WRITE8_DEVICE_HANDLER( upscope_cia_0_porta_w )
88	88	{
89	89	/* switch banks as appropriate */
90		memory_set_bank(device->machine(), "bank1", data & 1);
	90	device->machine().root_device().membank("bank1")->set_entry(data & 1);
91	91
92	92	/* swap the write handlers between ROM and bank 1 based on the bit */
93	93	if ((data & 1) == 0)
r14976	r14977
404	404	machine.device<nvram_device>("nvram")->set_base(state->m_nvram, sizeof(state->m_nvram));
405	405
406	406	/* set up memory */
407		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
408		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	407	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	408	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
409	409	}
410	410
411	411

src/mame/drivers/equites.c

r14976	r14977
1857	1857
1858	1858	static void unpack_block( running_machine &machine, const char *region, int offset, int size )
1859	1859	{
1860		UINT8 *rom = machine.region(region)->base();
	1860	UINT8 *rom = machine.root_device().memregion(region)->base();
1861	1861	int i;
1862	1862
1863	1863	for (i = 0; i < size; ++i)

src/mame/drivers/mirax.c

r14976	r14977
130	130
131	131	static PALETTE_INIT( mirax )
132	132	{
133		const UINT8 *color_prom = machine.region("proms")->base();
	133	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
134	134	int i;
135	135
136	136	for (i = 0;i < machine.total_colors();i++)
r14976	r14977
535	535	static DRIVER_INIT( mirax )
536	536	{
537	537	mirax_state *state = machine.driver_data<mirax_state>();
538		UINT8 *DATA = machine.region("data_code")->base();
539		UINT8 *ROM = machine.region("maincpu")->base();
	538	UINT8 *DATA = machine.root_device().memregion("data_code")->base();
	539	UINT8 *ROM = state->memregion("maincpu")->base();
540	540	int i;
541	541
542	542	for(i=0x0000;i<0x4000;i++)

src/mame/drivers/cardline.c

r14976	r14977
186	186
187	187	static PALETTE_INIT(cardline)
188	188	{
189		const UINT8 *color_prom = machine.region("proms")->base();
	189	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
190	190	int i,r,g,b,data;
191	191	int bit0,bit1,bit2;
192	192	for (i = 0;i < machine.total_colors();i++)

src/mame/drivers/omegrace.c

r14976	r14977
589	589
590	590	static DRIVER_INIT( omegrace )
591	591	{
592		int i, len = machine.region("user1")->bytes();
593		UINT8 *prom = machine.region("user1")->base();
	592	int i, len = machine.root_device().memregion("user1")->bytes();
	593	UINT8 *prom = machine.root_device().memregion("user1")->base();
594	594
595	595	/* Omega Race has two pairs of the state PROM output
596	596	* lines swapped before going into the decoder.

src/mame/drivers/decocass.c

r14976	r14977
1451	1451	{
1452	1452	decocass_state *state = machine.driver_data<decocass_state>();
1453	1453	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1454		UINT8 *rom = machine.region("maincpu")->base();
	1454	UINT8 *rom = state->memregion("maincpu")->base();
1455	1455	int A;
1456	1456
1457	1457	/* allocate memory and mark all RAM regions with their decrypted pointers */
r14976	r14977
1475	1475	static DRIVER_INIT( decocrom )
1476	1476	{
1477	1477	decocass_state *state = machine.driver_data<decocass_state>();
1478		int romlength = machine.region("user3")->bytes();
1479		UINT8 *rom = machine.region("user3")->base();
	1478	int romlength = machine.root_device().memregion("user3")->bytes();
	1479	UINT8 *rom = machine.root_device().memregion("user3")->base();
1480	1480	int i;
1481	1481
1482	1482	state->m_decrypted2 = auto_alloc_array(machine, UINT8, romlength);
r14976	r14977
1491	1491	/* convert charram to a banked ROM */
1492	1492	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x6000, 0xafff, "bank1");
1493	1493	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x6000, 0xafff, FUNC(decocass_de0091_w));
1494		memory_configure_bank(machine, "bank1", 0, 1, state->m_charram, 0);
1495		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user3")->base(), 0);
1496		memory_configure_bank_decrypted(machine, "bank1", 0, 1, &state->m_decrypted[0x6000], 0);
1497		memory_configure_bank_decrypted(machine, "bank1", 1, 1, state->m_decrypted2, 0);
1498		memory_set_bank(machine, "bank1", 0);
	1494	state->membank("bank1")->configure_entry(0, state->m_charram);
	1495	state->membank("bank1")->configure_entry(1, state->memregion("user3")->base());
	1496	state->membank("bank1")->configure_decrypted_entry(0, &state->m_decrypted[0x6000]);
	1497	state->membank("bank1")->configure_decrypted_entry(1, state->m_decrypted2);
	1498	state->membank("bank1")->set_entry(0);
1499	1499
1500	1500	/* install the bank selector */
1501	1501	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0xe900, 0xe900, FUNC(decocass_e900_w));

src/mame/drivers/mystwarr.c

r14976	r14977
557	557	static void reset_sound_region(running_machine &machine)
558	558	{
559	559	mystwarr_state *state = machine.driver_data<mystwarr_state>();
560		memory_set_bankptr(machine, "bank2", machine.region("soundcpu")->base() + 0x10000 + state->m_cur_sound_region*0x4000);
	560	state->membank("bank2")->set_base(state->memregion("soundcpu")->base() + 0x10000 + state->m_cur_sound_region*0x4000);
561	561	}
562	562
563	563	WRITE8_MEMBER(mystwarr_state::sound_bankswitch_w)

src/mame/drivers/jollyjgr.c

r14976	r14977
402	402
403	403	static PALETTE_INIT( jollyjgr )
404	404	{
405		const UINT8 *color_prom = machine.region("proms")->base();
	405	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
406	406	int i;
407	407
408	408	/* tilemap / sprites palette */

src/mame/drivers/ssfindo.c

r14976	r14977
485	485
486	486	READ32_MEMBER(ssfindo_state::io_r)
487	487	{
488		UINT16 *FLASH = (UINT16 *)machine().region("user2")->base(); //16 bit - WORD access
	488	UINT16 *FLASH = (UINT16 *)machine().root_device().memregion("user2")->base(); //16 bit - WORD access
489	489
490	490	int adr=m_flashAdr*0x200+(m_flashOffset);
491	491

src/mame/drivers/segas24.c

r14976	r14977
433	433	break;
434	434	case 0x9:
435	435	logerror("Read multiple [%02x] %d..%d side %d track %d\n", data, fdc_sector, fdc_sector+fdc_data-1, data & 8 ? 1 : 0, fdc_phys_track);
436		fdc_pt = machine().region("floppy")->base() + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
	436	fdc_pt = memregion("floppy")->base() + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
437	437	fdc_span = track_size;
438	438	fdc_status = 3;
439	439	fdc_drq = 1;
r14976	r14977
441	441	break;
442	442	case 0xb:
443	443	logerror("Write multiple [%02x] %d..%d side %d track %d\n", data, fdc_sector, fdc_sector+fdc_data-1, data & 8 ? 1 : 0, fdc_phys_track);
444		fdc_pt = machine().region("floppy")->base() + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
	444	fdc_pt = memregion("floppy")->base() + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
445	445	fdc_span = track_size;
446	446	fdc_status = 3;
447	447	fdc_drq = 1;
r14976	r14977
712	712
713	713	void segas24_state::reset_bank()
714	714	{
715		if (machine().region("romboard")->base())
	715	if (machine().root_device().memregion("romboard")->base())
716	716	{
717		memory_set_bank(machine(), "bank1", curbank & 15);
718		memory_set_bank(machine(), "bank2", curbank & 15);
	717	membank("bank1")->set_entry(curbank & 15);
	718	membank("bank2")->set_entry(curbank & 15);
719	719	}
720	720	}
721	721
r14976	r14977
1262	1262	{
1263	1263	segas24_state *state = machine.driver_data<segas24_state>();
1264	1264	if (state->track_size)
1265		machine.device<nvram_device>("floppy_nvram")->set_base(machine.region("floppy")->base(), 2*state->track_size);
	1265	machine.device<nvram_device>("floppy_nvram")->set_base(machine.root_device().memregion("floppy")->base(), 2*state->track_size);
1266	1266
1267		UINT8 *usr1 = machine.region("romboard")->base();
	1267	UINT8 *usr1 = state->memregion("romboard")->base();
1268	1268	if (usr1)
1269	1269	{
1270		memory_configure_bank(machine, "bank1", 0, 16, usr1, 0x40000);
1271		memory_configure_bank(machine, "bank2", 0, 16, usr1, 0x40000);
	1270	state->membank("bank1")->configure_entries(0, 16, usr1, 0x40000);
	1271	state->membank("bank2")->configure_entries(0, 16, usr1, 0x40000);
1272	1272	}
1273	1273
1274	1274	state->vtile = machine.device<segas24_tile>("tile");

src/mame/drivers/peplus.c

r14976	r14977
285	285	static void peplus_load_superdata(running_machine &machine, const char *bank_name)
286	286	{
287	287	peplus_state *state = machine.driver_data<peplus_state>();
288		UINT8 *super_data = machine.region(bank_name)->base();
	288	UINT8 *super_data = state->memregion(bank_name)->base();
289	289
290	290	/* Distribute Superboard Data */
291	291	memcpy(state->m_s3000_ram, &super_data[0x3000], 0x1000);
r14976	r14977
700	700
701	701	static PALETTE_INIT( peplus )
702	702	{
703		const UINT8 *color_prom = machine.region("proms")->base();
	703	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
704	704	/*  prom bits
705	705	7654 3210
706	706	---- -xxx   red component.

src/mame/drivers/ddayjlc.c

r14976	r14977
203	203	if (m_bgadr > 2)
204	204	m_bgadr = 0;
205	205
206		memory_set_bank(machine(), "bank1", m_bgadr);
	206	membank("bank1")->set_entry(m_bgadr);
207	207	}
208	208
209	209	WRITE8_MEMBER(ddayjlc_state::sound_w)
r14976	r14977
486	486
487	487	static PALETTE_INIT( ddayjlc )
488	488	{
489		const UINT8 *color_prom = machine.region("proms")->base();
	489	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
490	490	int i,r,g,b,val;
491	491	int bit0,bit1,bit2;
492	492
r14976	r14977
675	675	UINT8 *src, *dst, *temp;
676	676	temp = auto_alloc_array(machine, UINT8, 0x10000);
677	677	src = temp;
678		dst = machine.region("gfx1")->base();
679		length = machine.region("gfx1")->bytes();
	678	dst = machine.root_device().memregion("gfx1")->base();
	679	length = machine.root_device().memregion("gfx1")->bytes();
680	680	memcpy(src, dst, length);
681	681	newadr = 0;
682	682	oldaddr = 0;
r14976	r14977
690	690	auto_free(machine, temp);
691	691	}
692	692
693		memory_configure_bank(machine, "bank1", 0, 3, machine.region("user1")->base(), 0x4000);
694		memory_set_bank(machine, "bank1", 0);
	693	machine.root_device().membank("bank1")->configure_entries(0, 3, machine.root_device().memregion("user1")->base(), 0x4000);
	694	machine.root_device().membank("bank1")->set_entry(0);
695	695	}
696	696
697	697	GAME( 1984, ddayjlc,  0,       ddayjlc, ddayjlc, ddayjlc, ROT90, "Jaleco", "D-Day (Jaleco set 1)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )

src/mame/drivers/sprcros2.c

r14976	r14977
64	64
65	65	WRITE8_MEMBER(sprcros2_state::sprcros2_m_port7_w)
66	66	{
67		UINT8 *RAM = machine().region("master")->base();
	67	UINT8 *RAM = memregion("master")->base();
68	68
69	69	//76543210
70	70	//x------- unused
r14976	r14977
76	76	//-------x nmi enable
77	77
78	78	if((m_port7^data)&0x40)
79		memory_set_bankptr(machine(), "bank1",&RAM[0x10000+((data&0x40)<<7)]);
	79	membank("bank1")->set_base(&RAM[0x10000+((data&0x40)<<7)]);
80	80
81	81	machine().tilemap().set_flip_all(data&0x02?(TILEMAP_FLIPX|TILEMAP_FLIPY):0 );
82	82
r14976	r14977
85	85
86	86	WRITE8_MEMBER(sprcros2_state::sprcros2_s_port3_w)
87	87	{
88		UINT8 *RAM = machine().region("slave")->base();
	88	UINT8 *RAM = memregion("slave")->base();
89	89
90	90	//76543210
91	91	//xxxx---- unused
r14976	r14977
94	94	//-------x nmi enable
95	95
96	96	if((m_s_port3^data)&0x08)
97		memory_set_bankptr(machine(), "bank2",&RAM[0x10000+((data&0x08)<<10)]);
	97	membank("bank2")->set_base(&RAM[0x10000+((data&0x08)<<10)]);
98	98
99	99	m_s_port3 = data;
100	100	}

src/mame/drivers/konamigx.c

r14976	r14977
923	923
924	924	READ32_MEMBER(konamigx_state::type1_roz_r1)
925	925	{
926		UINT32 *ROM = (UINT32 *)machine().region("gfx3")->base();
	926	UINT32 *ROM = (UINT32 *)machine().root_device().memregion("gfx3")->base();
927	927
928	928	return ROM[offset];
929	929	}
930	930
931	931	READ32_MEMBER(konamigx_state::type1_roz_r2)
932	932	{
933		UINT32 *ROM = (UINT32 *)machine().region("gfx3")->base();
	933	UINT32 *ROM = (UINT32 *)machine().root_device().memregion("gfx3")->base();
934	934
935	935	ROM += (0x600000/2);
936	936
r14976	r14977
3754	3754
3755	3755	case 2:   // tkmmpzdm hack
3756	3756	{
3757		UINT32 *rom = (UINT32*)machine.region("maincpu")->base();
	3757	UINT32 *rom = (UINT32*)state->memregion("maincpu")->base();
3758	3758
3759	3759	// The display is initialized after POST but the copyright screen disabled
3760	3760	// planes B,C,D and didn't bother restoring them. I've spent a good

src/mame/drivers/dorachan.c

r14976	r14977
88	88
89	89	get_pens(pens);
90	90
91		color_map_base = screen.machine().region("proms")->base();
	91	color_map_base = state->memregion("proms")->base();
92	92
93	93	for (offs = 0; offs < state->m_videoram.bytes(); offs++)
94	94	{

src/mame/drivers/parodius.c

r14976	r14977
248	248	static MACHINE_START( parodius )
249	249	{
250	250	parodius_state *state = machine.driver_data<parodius_state>();
251		UINT8 *ROM = machine.region("maincpu")->base();
	251	UINT8 *ROM = state->memregion("maincpu")->base();
252	252
253		memory_configure_bank(machine, "bank1", 0, 14, &ROM[0x10000], 0x4000);
254		memory_configure_bank(machine, "bank1", 14, 2, &ROM[0x08000], 0x4000);
255		memory_set_bank(machine, "bank1", 0);
	253	state->membank("bank1")->configure_entries(0, 14, &ROM[0x10000], 0x4000);
	254	state->membank("bank1")->configure_entries(14, 2, &ROM[0x08000], 0x4000);
	255	state->membank("bank1")->set_entry(0);
256	256
257	257	state->m_generic_paletteram_8.allocate(0x1000);
258	258
r14976	r14977
407	407	if (lines & 0xf0)
408	408	logerror("%04x: setlines %02x\n", cpu_get_pc(device), lines);
409	409
410		memory_set_bank(device->machine(),  "bank1", (lines & 0x0f) ^ 0x0f);
	410	device->machine().root_device().membank("bank1")->set_entry((lines & 0x0f) ^ 0x0f);
411	411	}
412	412
413	413	GAME( 1990, parodius,  0,        parodius, parodius, 0, ROT0, "Konami", "Parodius DA! (World, set 1)", GAME_SUPPORTS_SAVE )

src/mame/drivers/combatsc.c

r14976	r14977
199	199	}
200	200
201	201	if (data & 0x10)
202		memory_set_bank(machine(), "bank1", (data & 0x0e) >> 1);
	202	membank("bank1")->set_entry((data & 0x0e) >> 1);
203	203	else
204		memory_set_bank(machine(), "bank1", 8 + (data & 1));
	204	membank("bank1")->set_entry(8 + (data & 1));
205	205	}
206	206
207	207	WRITE8_MEMBER(combatsc_state::combatscb_io_w)
r14976	r14977
237	237	m_bank_select = data;
238	238
239	239	if (data & 0x10)
240		memory_set_bank(machine(), "bank1", (data & 0x0e) >> 1);
	240	membank("bank1")->set_entry((data & 0x0e) >> 1);
241	241	else
242		memory_set_bank(machine(), "bank1", 8 + (data & 1));
	242	membank("bank1")->set_entry(8 + (data & 1));
243	243
244	244	if (data == 0x1f)
245	245	{
246		memory_set_bank(machine(), "bank1", 8 + (data & 1));
	246	membank("bank1")->set_entry(8 + (data & 1));
247	247	space.install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(combatsc_state::combatscb_io_w),this));
248	248	space.install_read_handler(0x4400, 0x4403, read8_delegate(FUNC(combatsc_state::combatscb_io_r),this));/* IO RAM & Video Registers */
249	249	}
r14976	r14977
690	690	static MACHINE_START( combatsc )
691	691	{
692	692	combatsc_state *state = machine.driver_data<combatsc_state>();
693		UINT8 *MEM = machine.region("maincpu")->base() + 0x38000;
	693	UINT8 *MEM = machine.root_device().memregion("maincpu")->base() + 0x38000;
694	694
695	695	state->m_io_ram  = MEM + 0x0000;
696	696	state->m_page[0] = MEM + 0x4000;
r14976	r14977
702	702	state->m_k007121_1 = machine.device("k007121_1");
703	703	state->m_k007121_2 = machine.device("k007121_2");
704	704
705		memory_configure_bank(machine, "bank1", 0, 10, machine.region("maincpu")->base() + 0x10000, 0x4000);
	705	state->membank("bank1")->configure_entries(0, 10, state->memregion("maincpu")->base() + 0x10000, 0x4000);
706	706
707	707	state->save_item(NAME(state->m_priority));
708	708	state->save_item(NAME(state->m_vreg));

src/mame/drivers/rockrage.c

r14976	r14977
67	67	WRITE8_MEMBER(rockrage_state::rockrage_bankswitch_w)
68	68	{
69	69	/* bits 4-6 = bank number */
70		memory_set_bank(machine(), "bank1", (data & 0x70) >> 4);
	70	membank("bank1")->set_entry((data & 0x70) >> 4);
71	71
72	72	/* bits 0 & 1 = coin counters */
73	73	coin_counter_w(machine(), 0,data & 0x01);
r14976	r14977
237	237	static MACHINE_START( rockrage )
238	238	{
239	239	rockrage_state *state = machine.driver_data<rockrage_state>();
240		UINT8 *ROM = machine.region("maincpu")->base();
	240	UINT8 *ROM = state->memregion("maincpu")->base();
241	241
242		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x2000);
	242	state->membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x2000);
243	243
244	244	state->m_audiocpu = machine.device("audiocpu");
245	245	state->m_k007342 = machine.device("k007342");

src/mame/drivers/quizpun2.c

r14976	r14977
249	249
250	250	case STATE_EEPROM_R:      // EEPROM read
251	251	{
252		UINT8 *eeprom = machine().region("eeprom")->base();
	252	UINT8 *eeprom = memregion("eeprom")->base();
253	253	ret = eeprom[prot.addr];
254	254	break;
255	255	}
r14976	r14977
276	276	{
277	277	case STATE_EEPROM_W:
278	278	{
279		UINT8 *eeprom = machine().region("eeprom")->base();
	279	UINT8 *eeprom = memregion("eeprom")->base();
280	280	eeprom[prot.addr] = data;
281	281	prot.addr++;
282	282	if ((prot.addr % 8) == 0)
r14976	r14977
343	343
344	344	WRITE8_MEMBER(quizpun2_state::quizpun2_rombank_w)
345	345	{
346		UINT8 *ROM = machine().region("maincpu")->base();
347		memory_set_bankptr(machine(),  "bank1", &ROM[ 0x10000 + 0x2000 * (data & 0x1f) ] );
	346	UINT8 *ROM = memregion("maincpu")->base();
	347	membank("bank1")->set_base(&ROM[ 0x10000 + 0x2000 * (data & 0x1f) ] );
348	348	}
349	349
350	350	WRITE8_MEMBER(quizpun2_state::quizpun2_irq_ack)

src/mame/drivers/segac2.c

r14976	r14977
118	118
119	119	/* determine how many sound banks */
120	120	state->m_sound_banks = 0;
121		if (machine.region("upd")->base())
122		state->m_sound_banks = machine.region("upd")->bytes() / 0x20000;
	121	if (machine.root_device().memregion("upd")->base())
	122	state->m_sound_banks = state->memregion("upd")->bytes() / 0x20000;
123	123
124	124	/* reset the protection */
125	125	state->m_prot_write_buf = 0;
r14976	r14977
2088	2088	static DRIVER_INIT( ichirjbl )
2089	2089	{
2090	2090	/* when did this actually work? - the protection is patched but the new check fails? */
2091		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	2091	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
2092	2092	rom[0x390/2] = 0x6600;
2093	2093
2094	2094	segac2_common_init(machine, NULL);

src/mame/drivers/splus.c

r14976	r14977
578	578	{
579	579	splus_state *state = machine.driver_data<splus_state>();
580	580
581		UINT8 *reel_data = machine.region( "reeldata" )->base();
	581	UINT8 *reel_data = state->memregion( "reeldata" )->base();
582	582
583	583	// Load Reel Data
584	584	memcpy(state->m_reel_ram, &reel_data[0x0000], 0x2000);

src/mame/drivers/gberet.c

r14976	r14977
122	122	coin_counter_w(machine(), 1, data & 2);
123	123
124	124	/* bits 5-7 = ROM bank select */
125		memory_set_bank(machine(), "bank1", ((data & 0xe0) >> 5));
	125	membank("bank1")->set_entry(((data & 0xe0) >> 5));
126	126	}
127	127
128	128	WRITE8_MEMBER(gberet_state::gberet_flipscreen_w)
r14976	r14977
573	573
574	574	static DRIVER_INIT( mrgoemon )
575	575	{
576		UINT8 *ROM = machine.region("maincpu")->base();
577		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x800);
	576	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	577	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x800);
578	578	}
579	579
580	580

src/mame/drivers/sandscrp.c

r14976	r14977
269	269
270	270	WRITE8_MEMBER(sandscrp_state::sandscrp_bankswitch_w)
271	271	{
272		UINT8 *RAM = machine().region("maincpu")->base();
	272	UINT8 *RAM = memregion("maincpu")->base();
273	273	int bank = data & 0x07;
274	274
275	275	if ( bank != data )   logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(&space.device()),data);
r14976	r14977
277	277	if (bank < 3)   RAM = &RAM[0x4000 * bank];
278	278	else         RAM = &RAM[0x4000 * (bank-3) + 0x10000];
279	279
280		memory_set_bankptr(machine(), "bank1", RAM);
	280	membank("bank1")->set_base(RAM);
281	281	}
282	282
283	283	READ8_MEMBER(sandscrp_state::sandscrp_latchstatus_r)

src/mame/drivers/gpworld.c

r14976	r14977
125	125
126	126	int i;
127	127
128		UINT8 *GFX = machine.region("gfx2")->base();
	128	UINT8 *GFX = state->memregion("gfx2")->base();
129	129
130	130	/* Heisted from Daphne which heisted it from MAME */
131	131	for (i = 0; i < 0x800; i += 8)

src/mame/drivers/exidy.c

r14976	r14977
185	185
186	186	WRITE8_MEMBER(exidy_state::fax_bank_select_w)
187	187	{
188		UINT8 *RAM = machine().region("maincpu")->base();
	188	UINT8 *RAM = memregion("maincpu")->base();
189	189
190		memory_set_bankptr(machine(), "bank1", &RAM[0x10000 + (0x2000 * (data & 0x1f))]);
	190	membank("bank1")->set_base(&RAM[0x10000 + (0x2000 * (data & 0x1f))]);
191	191	if ((data & 0x1f) > 0x17)
192	192	logerror("Banking to unpopulated ROM bank %02X!\n",data & 0x1f);
193	193	}
r14976	r14977
1470	1470
1471	1471	/* the ROM is actually mapped high */
1472	1472	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xf800, 0xffff, "bank1");
1473		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0xf800);
	1473	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0xf800);
1474	1474	}
1475	1475
1476	1476

src/mame/drivers/homedata.c

r14976	r14977
291	291	if (m_sndbank & 4)
292	292	return(soundlatch_byte_r(space, 0));
293	293	else
294		return machine().region("audiocpu")->base()[0x10000 + offset + (m_sndbank & 1) * 0x10000];
	294	return memregion("audiocpu")->base()[0x10000 + offset + (m_sndbank & 1) * 0x10000];
295	295	}
296	296
297	297	WRITE8_MEMBER(homedata_state::mrokumei_sound_bank_w)
r14976	r14977
355	355	*/
356	356	//  logerror("%04x: port C wr %02x (STATUS %d DATA %d)\n", cpu_get_pc(&space.device()), data, BIT(data, 2), BIT(data, 6));
357	357
358		memory_set_bank(machine(), "bank2", data & 0x03);
	358	membank("bank2")->set_entry(data & 0x03);
359	359
360	360	coin_counter_w(machine(), 0, ~data & 0x80);
361	361
r14976	r14977
494	494
495	495	//  logerror("%04x: port C wr %02x\n", cpu_get_pc(&space.device()), data);
496	496
497		memory_set_bank(machine(), "bank2", (data & 0x0c) >> 2);
	497	membank("bank2")->set_entry((data & 0x0c) >> 2);
498	498
499	499	coin_counter_w(machine(), 0, ~data & 0x80);
500	500
r14976	r14977
509	509
510	510	WRITE8_MEMBER(homedata_state::bankswitch_w)
511	511	{
512		int last_bank = (machine().region("maincpu")->bytes() - 0x10000) / 0x4000;
	512	int last_bank = (machine().root_device().memregion("maincpu")->bytes() - 0x10000) / 0x4000;
513	513
514	514	/* last bank is fixed and is #0 for us, other banks start from #1 (hence data+1 below)*/
515	515	if (data < last_bank)
516		memory_set_bank(machine(), "bank1", data + 1);
	516	membank("bank1")->set_entry(data + 1);
517	517	else
518		memory_set_bank(machine(), "bank1", 0);
	518	membank("bank1")->set_entry(0);
519	519	}
520	520
521	521
r14976	r14977
1149	1149	static MACHINE_START( reikaids )
1150	1150	{
1151	1151	homedata_state *state = machine.driver_data<homedata_state>();
1152		UINT8 *ROM = machine.region("maincpu")->base();
	1152	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1153	1153
1154		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0xc000], 0x4000);
1155		memory_configure_bank(machine, "bank2", 0, 4, machine.region("audiocpu")->base(), 0x10000);
	1154	state->membank("bank1")->configure_entries(0, 8, &ROM[0xc000], 0x4000);
	1155	state->membank("bank2")->configure_entries(0, 4, state->memregion("audiocpu")->base(), 0x10000);
1156	1156
1157	1157	MACHINE_START_CALL(homedata);
1158	1158
r14976	r14977
1166	1166	static MACHINE_START( pteacher )
1167	1167	{
1168	1168	homedata_state *state = machine.driver_data<homedata_state>();
1169		UINT8 *ROM = machine.region("maincpu")->base();
	1169	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1170	1170
1171		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0xc000], 0x4000);
1172		memory_configure_bank(machine, "bank2", 0, 4, machine.region("audiocpu")->base(), 0x10000);
	1171	state->membank("bank1")->configure_entries(0, 4, &ROM[0xc000], 0x4000);
	1172	state->membank("bank2")->configure_entries(0, 4, state->memregion("audiocpu")->base(), 0x10000);
1173	1173
1174	1174	MACHINE_START_CALL(homedata);
1175	1175

src/mame/drivers/pcktgal.c

r14976	r14977
24	24
25	25	WRITE8_MEMBER(pcktgal_state::pcktgal_bank_w)
26	26	{
27		UINT8 *RAM = machine().region("maincpu")->base();
	27	UINT8 *RAM = memregion("maincpu")->base();
28	28
29		if (data & 1) { memory_set_bankptr(machine(), "bank1", &RAM[0x4000]); }
30		else { memory_set_bankptr(machine(), "bank1", &RAM[0x10000]); }
	29	if (data & 1) { membank("bank1")->set_base(&RAM[0x4000]); }
	30	else { membank("bank1")->set_base(&RAM[0x10000]); }
31	31
32		if (data & 2) { memory_set_bankptr(machine(), "bank2", &RAM[0x6000]); }
33		else { memory_set_bankptr(machine(), "bank2", &RAM[0x12000]); }
	32	if (data & 2) { membank("bank2")->set_base(&RAM[0x6000]); }
	33	else { membank("bank2")->set_base(&RAM[0x12000]); }
34	34	}
35	35
36	36	WRITE8_MEMBER(pcktgal_state::pcktgal_sound_bank_w)
37	37	{
38		memory_set_bank(machine(), "bank3", (data >> 2) & 1);
	38	membank("bank3")->set_entry((data >> 2) & 1);
39	39	}
40	40
41	41	WRITE8_MEMBER(pcktgal_state::pcktgal_sound_w)
r14976	r14977
413	413	int A;
414	414	address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
415	415	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
416		UINT8 *rom = machine.region("audiocpu")->base();
	416	UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
417	417
418	418	space->set_decrypted_region(0x8000, 0xffff, decrypted);
419	419
r14976	r14977
421	421	for (A = 0x8000;A < 0x18000;A++)
422	422	decrypted[A-0x8000] = (rom[A] & 0x9f) | ((rom[A] & 0x20) << 1) | ((rom[A] & 0x40) >> 1);
423	423
424		memory_configure_bank(machine, "bank3", 0, 2, machine.region("audiocpu")->base() + 0x10000, 0x4000);
425		memory_configure_bank_decrypted(machine, "bank3", 0, 2, &decrypted[0x8000], 0x4000);
	424	machine.root_device().membank("bank3")->configure_entries(0, 2, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
	425	machine.root_device().membank("bank3")->configure_decrypted_entries(0, 2, &decrypted[0x8000], 0x4000);
426	426	}
427	427
428	428	static DRIVER_INIT( graphics )
429	429	{
430		UINT8 *rom = machine.region("gfx1")->base();
431		int len = machine.region("gfx1")->bytes();
	430	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	431	int len = machine.root_device().memregion("gfx1")->bytes();
432	432	int i,j,temp[16];
433	433
434		memory_configure_bank(machine, "bank3", 0, 2, machine.region("audiocpu")->base() + 0x10000, 0x4000);
	434	machine.root_device().membank("bank3")->configure_entries(0, 2, machine.root_device().memregion("audiocpu")->base() + 0x10000, 0x4000);
435	435
436	436	/* Tile graphics roms have some swapped lines, original version only */
437	437	for (i = 0x00000;i < len;i += 32)

src/mame/drivers/jokrwild.c

r14976	r14977
553	553	*****************************************************************************/
554	554	{
555	555	int i, offs;
556		UINT8 *srcp = machine.region( "maincpu" )->base();
	556	UINT8 *srcp = machine.root_device().memregion( "maincpu" )->base();
557	557
558	558	for (i = 0x8000; i < 0x10000; i++)
559	559	{

src/mame/drivers/hng64.c

r14976	r14977
1523	1523
1524	1524	static DRIVER_INIT( hng64_reorder_gfx )
1525	1525	{
1526		hng64_reorder(machine, machine.region("scrtile")->base(), machine.region("scrtile")->bytes());
	1526	hng64_reorder(machine, machine.root_device().memregion("scrtile")->base(), machine.root_device().memregion("scrtile")->bytes());
1527	1527	}
1528	1528
1529	1529	#define HACK_REGION
1530	1530	#ifdef HACK_REGION
1531	1531	static void hng64_patch_bios_region(running_machine& machine, int region)
1532	1532	{
1533		UINT8 *rom = machine.region("user1")->base();
	1533	UINT8 *rom = machine.root_device().memregion("user1")->base();
1534	1534
1535	1535	if ((rom[0x4000]==0xff) && (rom[0x4001] == 0xff))
1536	1536	{
r14976	r14977
1576	1576	{
1577	1577	hng64_state *state = machine.driver_data<hng64_state>();
1578	1578
1579		/* FILE* fp = fopen("/tmp/test.bin", "wb"); fwrite(machine.region("verts")->base(), 1, 0x0c00000*2, fp); fclose(fp); */
	1579	/* FILE* fp = fopen("/tmp/test.bin", "wb"); fwrite(state->memregion("verts")->base(), 1, 0x0c00000*2, fp); fclose(fp); */
1580	1580	DRIVER_INIT_CALL(hng64_fght);
1581	1581	state->m_mcu_type = FIGHT_MCU;
1582	1582	}
r14976	r14977
1661	1661	{
1662	1662	hng64_state *state = machine.driver_data<hng64_state>();
1663	1663	int i;
1664		const UINT8 *rom = machine.region("user2")->base();
	1664	const UINT8 *rom = state->memregion("user2")->base();
1665	1665
1666	1666	/* Sound CPU */
1667	1667	UINT8 *RAM = (UINT8*)state->m_soundram;
1668		memory_set_bankptr(machine, "bank1",&RAM[0x1e0000]);
1669		memory_set_bankptr(machine, "bank2",&RAM[0x001000]); // where..
	1668	state->membank("bank1")->set_base(&RAM[0x1e0000]);
	1669	state->membank("bank2")->set_base(&RAM[0x001000]); // where..
1670	1670	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_HALT, ASSERT_LINE);
1671	1671	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
1672	1672

src/mame/drivers/gladiatr.c

r14976	r14977
194	194	/*Rom bankswitching*/
195	195	WRITE8_MEMBER(gladiatr_state::gladiatr_bankswitch_w)
196	196	{
197		UINT8 *rom = machine().region("maincpu")->base() + 0x10000;
	197	UINT8 *rom = memregion("maincpu")->base() + 0x10000;
198	198
199		memory_set_bankptr(machine(), "bank1", rom + 0x6000 * (data & 0x01));
	199	membank("bank1")->set_base(rom + 0x6000 * (data & 0x01));
200	200	}
201	201
202	202
r14976	r14977
256	256	TAITO8741_start(&gladiator_8741interface);
257	257	/* 6809 bank memory set */
258	258	{
259		UINT8 *rom = machine.region("audiocpu")->base() + 0x10000;
260		memory_set_bankptr(machine, "bank2",rom);
	259	UINT8 *rom = machine.root_device().memregion("audiocpu")->base() + 0x10000;
	260	machine.root_device().membank("bank2")->set_base(rom);
261	261	machine.device("audiocpu")->reset();
262	262	}
263	263	}
r14976	r14977
279	279	/*Sound Functions*/
280	280	static WRITE8_DEVICE_HANDLER( glad_adpcm_w )
281	281	{
282		UINT8 *rom = device->machine().region("audiocpu")->base() + 0x10000;
	282	UINT8 *rom = device->machine().root_device().memregion("audiocpu")->base() + 0x10000;
283	283
284	284	/* bit6 = bank offset */
285		memory_set_bankptr(device->machine(), "bank2",rom + ((data & 0x40) ? 0xc000 : 0));
	285	device->machine().root_device().membank("bank2")->set_base(rom + ((data & 0x40) ? 0xc000 : 0));
286	286
287	287	msm5205_data_w(device,data);         /* bit0..3  */
288	288	msm5205_reset_w(device,(data>>5)&1); /* bit 5    */
r14976	r14977
956	956	UINT8 *rom;
957	957	int i,j;
958	958
959		rom = machine.region("gfx2")->base();
	959	rom = machine.root_device().memregion("gfx2")->base();
960	960	// unpack 3bpp graphics
961	961	for (j = 3; j >= 0; j--)
962	962	{
r14976	r14977
970	970	swap_block(rom + 0x14000, rom + 0x18000, 0x4000);
971	971
972	972
973		rom = machine.region("gfx3")->base();
	973	rom = machine.root_device().memregion("gfx3")->base();
974	974	// unpack 3bpp graphics
975	975	for (j = 5; j >= 0; j--)
976	976	{
r14976	r14977
987	987	swap_block(rom + 0x24000, rom + 0x28000, 0x4000);
988	988
989	989	/* make sure bank is valid in cpu-reset */
990		rom = machine.region("audiocpu")->base() + 0x10000;
991		memory_set_bankptr(machine, "bank2",rom);
	990	rom = machine.root_device().memregion("audiocpu")->base() + 0x10000;
	991	machine.root_device().membank("bank2")->set_base(rom);
992	992	}
993	993
994	994
r14976	r14977
1005	1005	UINT8 *rom;
1006	1006	int i,j;
1007	1007
1008		rom = machine.region("gfx2")->base();
	1008	rom = machine.root_device().memregion("gfx2")->base();
1009	1009	// unpack 3bpp graphics
1010	1010	for (i = 0; i < 0x2000; i++)
1011	1011	{
1012	1012	rom[i+0x2000] = rom[i] >> 4;
1013	1013	}
1014	1014
1015		rom = machine.region("gfx3")->base();
	1015	rom = machine.root_device().memregion("gfx3")->base();
1016	1016	// unpack 3bpp graphics
1017	1017	for (j = 1; j >= 0; j--)
1018	1018	{

src/mame/drivers/puckpkmn.c

r14976	r14977
260	260
261	261	static DRIVER_INIT( puckpkmn )
262	262	{
263		UINT8 *rom = machine.region("maincpu")->base();
264		size_t len = machine.region("maincpu")->bytes();
	263	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
	264	size_t len = machine.root_device().memregion("maincpu")->bytes();
265	265	int i;
266	266
267	267	for (i = 0; i < len; i++)

src/mame/drivers/poker72.c

r14976	r14977
77	77
78	78	WRITE8_MEMBER(poker72_state::output_w)
79	79	{
80		UINT8 *ROM = machine().region("maincpu")->base();
	80	UINT8 *ROM = memregion("maincpu")->base();
81	81
82	82	printf("%02x\n",data);
83	83
84	84	/*  if((data & 0xc) == 0xc)
85		memory_set_bankptr(machine(), "bank1", &ROM[0x10000]);
	85	membank("bank1")->set_base(&ROM[0x10000]);
86	86	else*/
87	87	if(data & 8)
88		memory_set_bankptr(machine(), "bank1", &ROM[0x08000]);
	88	membank("bank1")->set_base(&ROM[0x08000]);
89	89	else
90		memory_set_bankptr(machine(), "bank1", &ROM[0x00000]);
	90	membank("bank1")->set_base(&ROM[0x00000]);
91	91	}
92	92
93	93	WRITE8_MEMBER(poker72_state::tile_bank_w)
r14976	r14977
339	339
340	340	static MACHINE_RESET( poker72 )
341	341	{
342		UINT8 *ROM = machine.region("maincpu")->base();
	342	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
343	343
344		memory_set_bankptr(machine, "bank1", &ROM[0]);
	344	machine.root_device().membank("bank1")->set_base(&ROM[0]);
345	345	}
346	346
347	347	static MACHINE_CONFIG_START( poker72, poker72_state )
r14976	r14977
393	393
394	394	static DRIVER_INIT( poker72 )
395	395	{
396		UINT8 *rom = machine.region("maincpu")->base();
	396	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
397	397
398	398	rom[0x4a9] = 0x28;
399	399	}

src/mame/drivers/goindol.c

r14976	r14977
26	26	WRITE8_MEMBER(goindol_state::goindol_bankswitch_w)
27	27	{
28	28
29		memory_set_bank(machine(), "bank1", data & 0x03);
	29	membank("bank1")->set_entry(data & 0x03);
30	30
31	31	if (m_char_bank != ((data & 0x10) >> 4))
32	32	{
r14976	r14977
220	220	static MACHINE_START( goindol )
221	221	{
222	222	goindol_state *state = machine.driver_data<goindol_state>();
223		UINT8 *ROM = machine.region("maincpu")->base();
	223	UINT8 *ROM = state->memregion("maincpu")->base();
224	224
225		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	225	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
226	226
227	227	state->save_item(NAME(state->m_char_bank));
228	228	state->save_item(NAME(state->m_prot_toggle));
r14976	r14977
383	383
384	384	static DRIVER_INIT( goindol )
385	385	{
386		UINT8 *rom = machine.region("maincpu")->base();
	386	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
387	387
388	388
389	389	/* I hope that's all patches to avoid protection */

src/mame/drivers/umipoker.c

r14976	r14977
149	149
150	150	READ8_MEMBER(umipoker_state::z80_rom_readback_r)
151	151	{
152		UINT8 *ROM = machine().region("audiocpu")->base();
	152	UINT8 *ROM = memregion("audiocpu")->base();
153	153
154	154	return ROM[offset];
155	155	}

src/mame/drivers/fastlane.c

r14976	r14977
45	45	coin_counter_w(machine(), 1,data & 0x02);
46	46
47	47	/* bits 2 & 3 = bank number */
48		memory_set_bank(machine(), "bank1", (data & 0x0c) >> 2);
	48	membank("bank1")->set_entry((data & 0x0c) >> 2);
49	49
50	50	/* bit 4: bank # for the 007232 (chip 2) */
51	51	k007232_set_bank(m_konami2, 0 + ((data & 0x10) >> 4), 2 + ((data & 0x10) >> 4));
r14976	r14977
194	194	static MACHINE_START( fastlane )
195	195	{
196	196	fastlane_state *state = machine.driver_data<fastlane_state>();
197		UINT8 *ROM = machine.region("maincpu")->base();
	197	UINT8 *ROM = state->memregion("maincpu")->base();
198	198
199		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	199	state->membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
200	200
201	201	state->m_konami2 = machine.device("konami2");
202	202	state->m_k007121 = machine.device("k007121");

src/mame/drivers/gamecstl.c

r14976	r14977
216	216	{
217	217	if (data & 0x10)      // enable RAM access to region 0xf0000 - 0xfffff
218	218	{
219		memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
	219	state->membank("bank1")->set_base(state->m_bios_ram);
220	220	}
221	221	else               // disable RAM access (reads go to BIOS ROM)
222	222	{
223		memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base() + 0x30000);
	223	state->membank("bank1")->set_base(busdevice->machine().root_device().memregion("bios")->base() + 0x30000);
224	224	}
225	225	break;
226	226	}
r14976	r14977
614	614
615	615	static MACHINE_RESET(gamecstl)
616	616	{
617		memory_set_bankptr(machine, "bank1", machine.region("bios")->base() + 0x30000);
	617	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base() + 0x30000);
618	618
619	619	device_set_irq_callback(machine.device("maincpu"), irq_callback);
620	620	}

src/mame/drivers/kangaroo.c

r14976	r14977
174	174
175	175	static MACHINE_START( kangaroo )
176	176	{
177		memory_configure_bank(machine, "bank1", 0, 2, machine.region("gfx1")->base(), 0x2000);
	177	machine.root_device().membank("bank1")->configure_entries(0, 2, machine.root_device().memregion("gfx1")->base(), 0x2000);
178	178	}
179	179
180	180

src/mame/drivers/cabal.c

r14976	r14977
844	844	{
845	845	address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
846	846	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
847		UINT8 *rom = machine.region(cpu)->base();
	847	UINT8 *rom = machine.root_device().memregion(cpu)->base();
848	848
849	849	space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
850	850
851	851	memcpy(decrypt, rom+length, length);
852	852
853	853	if (length > 0x10000)
854		memory_configure_bank_decrypted(machine, "bank1", 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
	854	machine.root_device().membank("bank1")->configure_decrypted_entries(0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
855	855	}
856	856
857	857

src/mame/drivers/cidelsa.c

r14976	r14977
45	45
46	46	int bank = BIT(data, 3);
47	47
48		memory_set_bank(machine(), "bank1", bank);
	48	membank("bank1")->set_entry(bank);
49	49	}
50	50
51	51	WRITE8_MEMBER( draco_state::sound_g_w )
r14976	r14977
441	441	void draco_state::machine_start()
442	442	{
443	443	/* setup COP402 memory banking */
444		memory_configure_bank(machine(), "bank1", 0, 2, machine().region(COP402N_TAG)->base(), 0x400);
445		memory_set_bank(machine(), "bank1", 0);
	444	membank("bank1")->configure_entries(0, 2, memregion(COP402N_TAG)->base(), 0x400);
	445	membank("bank1")->set_entry(0);
446	446
447	447	/* register for state saving */
448	448	save_item(NAME(m_reset));

src/mame/drivers/vendetta.c

r14976	r14977
171	171	space->install_read_bank(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, "bank4" );
172	172	space->install_write_handler(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, write8_delegate(FUNC(vendetta_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state) );
173	173	space->install_legacy_readwrite_handler(*state->m_k053246, state->m_video_banking_base + 0x0000, state->m_video_banking_base + 0x0fff, FUNC(k053247_r), FUNC(k053247_w) );
174		memory_set_bankptr(machine, "bank4", state->m_generic_paletteram_8);
	174	state->membank("bank4")->set_base(state->m_generic_paletteram_8);
175	175	}
176	176	else
177	177	{
r14976	r14977
459	459	static MACHINE_START( vendetta )
460	460	{
461	461	vendetta_state *state = machine.driver_data<vendetta_state>();
462		UINT8 *ROM = machine.region("maincpu")->base();
	462	UINT8 *ROM = state->memregion("maincpu")->base();
463	463
464		memory_configure_bank(machine, "bank1", 0, 28, &ROM[0x10000], 0x2000);
465		memory_set_bank(machine, "bank1", 0);
	464	state->membank("bank1")->configure_entries(0, 28, &ROM[0x10000], 0x2000);
	465	state->membank("bank1")->set_entry(0);
466	466
467	467	state->m_generic_paletteram_8.allocate(0x1000);
468	468
r14976	r14977
786	786	if (lines >= 0x1c)
787	787	logerror("PC = %04x : Unknown bank selected %02x\n", cpu_get_pc(device), lines);
788	788	else
789		memory_set_bank(device->machine(), "bank1", lines);
	789	device->machine().root_device().membank("bank1")->set_entry(lines);
790	790	}
791	791
792	792	static DRIVER_INIT( vendetta )

src/mame/drivers/segas16b.c

r14976	r14977
1319	1319	static WRITE8_DEVICE_HANDLER( upd7759_control_w )
1320	1320	{
1321	1321	segas1x_state *state = device->machine().driver_data<segas1x_state>();
1322		int size = device->machine().region("soundcpu")->bytes() - 0x10000;
	1322	int size = state->memregion("soundcpu")->bytes() - 0x10000;
1323	1323	if (size > 0)
1324	1324	{
1325	1325	int bankoffs = 0;
r14976	r14977
1376	1376	bankoffs += (data & 0x07) * 0x04000;
1377	1377	break;
1378	1378	}
1379		memory_set_bankptr(device->machine(), "bank1", device->machine().region("soundcpu")->base() + 0x10000 + (bankoffs % size));
	1379	state->membank("bank1")->set_base(device->machine().root_device().memregion("soundcpu")->base() + 0x10000 + (bankoffs % size));
1380	1380	}
1381	1381	}
1382	1382
r14976	r14977
6822	6822	// when reading from this port the data is xored by a fixed value depending on the cart
6823	6823	static READ16_HANDLER( isgsm_cart_data_r )
6824	6824	{
6825		int size = space->machine().region("gamecart_rgn")->bytes();
6826		UINT8* rgn = space->machine().region("gamecart_rgn")->base();
	6825	int size = space->machine().root_device().memregion("gamecart_rgn")->bytes();
	6826	UINT8* rgn = space->machine().root_device().memregion("gamecart_rgn")->base();
6827	6827
6828	6828	isgsm_cart_addr++;
6829	6829
r14976	r14977
6847	6847
6848	6848	switch (isgsm_type&0x0f)
6849	6849	{
6850		case 0x0: dest = space->machine().region("gfx2")->base();
	6850	case 0x0: dest = space->machine().root_device().memregion("gfx2")->base();
6851	6851	break;
6852	6852
6853		case 0x1: dest = space->machine().region("gfx1")->base();
	6853	case 0x1: dest = space->machine().root_device().memregion("gfx1")->base();
6854	6854	break;
6855	6855
6856		case 0x2: dest = space->machine().region("soundcpu")->base();
	6856	case 0x2: dest = space->machine().root_device().memregion("soundcpu")->base();
6857	6857	break;
6858	6858
6859		case 0x3: dest = space->machine().region("maincpu")->base();
	6859	case 0x3: dest = space->machine().root_device().memregion("maincpu")->base();
6860	6860	break;
6861	6861
6862	6862	default: // no other cases?
r14976	r14977
6967	6967
6968	6968	dest[isgsm_addr] = byte;
6969	6969
6970		if (dest == space->machine().region("gfx1")->base())
	6970	if (dest == space->machine().root_device().memregion("gfx1")->base())
6971	6971	{
6972	6972
6973	6973	// we need to re-decode the tiles if writing to this area to keep MAME happy
r14976	r14977
7061	7061	// other values on real hw have strange results, change memory mapping etc??
7062	7062	if (data==1)
7063	7063	{
7064		memory_set_bankptr(space->machine(),ISGSM_MAIN_BANK, space->machine().region("maincpu")->base());
	7064	space->machine().root_device().membank(ISGSM_MAIN_BANK)->set_base(space->machine().root_device().memregion("maincpu")->base());
7065	7065	}
7066	7066	}
7067	7067
7068	7068	static MACHINE_START( isgsm )
7069	7069	{
7070		memory_set_bankptr(machine,ISGSM_CART_BANK, machine.region("gamecart_rgn")->base());
7071		memory_set_bankptr(machine,ISGSM_MAIN_BANK, machine.region("bios")->base());
	7070	machine.root_device().membank(ISGSM_CART_BANK)->set_base(machine.root_device().memregion("gamecart_rgn")->base());
	7071	machine.root_device().membank(ISGSM_MAIN_BANK)->set_base(machine.root_device().memregion("bios")->base());
7072	7072	}
7073	7073
7074	7074	static ADDRESS_MAP_START( isgsm_map, AS_PROGRAM, 16, segas1x_state )
r14976	r14977
7219	7219	for (int i = 0; i < 16; i++)
7220	7220	segaic16_sprites_set_bank(machine, 0, i, i);
7221	7221
7222		memory_set_bankptr(machine,ISGSM_CART_BANK, machine.region("gamecart_rgn")->base());
7223		memory_set_bankptr(machine,ISGSM_MAIN_BANK, machine.region("bios")->base());
	7222	machine.root_device().membank(ISGSM_CART_BANK)->set_base(machine.root_device().memregion("gamecart_rgn")->base());
	7223	machine.root_device().membank(ISGSM_MAIN_BANK)->set_base(machine.root_device().memregion("bios")->base());
7224	7224	devtag_reset( machine, "maincpu" );
7225	7225	}
7226	7226
r14976	r14977
7248	7248
7249	7249	// decrypt the bios...
7250	7250	UINT16* temp = (UINT16*)malloc(0x20000);
7251		UINT16* rom = (UINT16*)machine.region("bios")->base();
	7251	UINT16* rom = (UINT16*)machine.root_device().memregion("bios")->base();
7252	7252	int i;
7253	7253
7254	7254	for (i=0;i<0x10000;i++)
r14976	r14977
7265	7265	DRIVER_INIT_CALL( isgsm );
7266	7266
7267	7267	UINT16* temp = (UINT16*)malloc(0x200000);
7268		UINT16* rom = (UINT16*)machine.region("gamecart_rgn")->base();
	7268	UINT16* rom = (UINT16*)machine.root_device().memregion("gamecart_rgn")->base();
7269	7269	int i;
7270	7270
7271	7271	for (i=0;i<0x100000;i++)
r14976	r14977
7285	7285	DRIVER_INIT_CALL( isgsm );
7286	7286
7287	7287	UINT16* temp = (UINT16*)malloc(0x80000);
7288		UINT16* rom = (UINT16*)machine.region("gamecart_rgn")->base();
	7288	UINT16* rom = (UINT16*)machine.root_device().memregion("gamecart_rgn")->base();
7289	7289	int i;
7290	7290
7291	7291	for (i=0;i<0x80000/2;i++)

src/mame/drivers/thoop2.c

r14976	r14977
51	51
52	52	WRITE16_MEMBER(thoop2_state::OKIM6295_bankswitch_w)
53	53	{
54		UINT8 *RAM = machine().region("oki")->base();
	54	UINT8 *RAM = memregion("oki")->base();
55	55
56	56	if (ACCESSING_BITS_0_7){
57	57	memcpy(&RAM[0x30000], &RAM[0x40000 + (data & 0x0f)*0x10000], 0x10000);

src/mame/drivers/saturn.c

r14976	r14977
2154	2154
2155	2155	static DEVICE_IMAGE_LOAD( sat_cart )
2156	2156	{
2157		UINT8 *ROM = image.device().machine().region("maincpu")->base()+0x080000;
	2157	UINT8 *ROM = image.device().machine().root_device().memregion("maincpu")->base()+0x080000;
2158	2158	UINT32 length;
2159	2159
2160	2160	if (image.software_entry() != NULL)
r14976	r14977
2359	2359	if (image.software_entry() == NULL)
2360	2360	return IMAGE_INIT_FAIL;
2361	2361
2362		UINT8 *ROM = image.device().machine().region(this_cart->region)->base();
	2362	UINT8 *ROM = image.device().machine().root_device().memregion(this_cart->region)->base();
2363	2363	UINT32 length = image.get_software_region_length("rom");
2364	2364
2365	2365	memcpy(ROM, image.get_software_region("rom"), length);

src/mame/drivers/nwk-tr.c

r14976	r14977
739	739	{
740	740	nwktr_state *state = machine.driver_data<nwktr_state>();
741	741	init_konami_cgboard(machine, 1, CGBOARD_TYPE_NWKTR);
742		set_cgboard_texture_bank(machine, 0, "bank5", machine.region("user5")->base());
	742	set_cgboard_texture_bank(machine, 0, "bank5", state->memregion("user5")->base());
743	743
744	744	state->m_sharc_dataram = auto_alloc_array(machine, UINT32, 0x100000/4);
745	745	state->m_led_reg0 = state->m_led_reg1 = 0x7f;

src/mame/drivers/taotaido.c

r14976	r14977
123	123
124	124	WRITE8_MEMBER(taotaido_state::taotaido_sh_bankswitch_w)
125	125	{
126		UINT8 *rom = machine().region("audiocpu")->base() + 0x10000;
	126	UINT8 *rom = memregion("audiocpu")->base() + 0x10000;
127	127
128		memory_set_bankptr(machine(), "bank1",rom + (data & 0x03) * 0x8000);
	128	membank("bank1")->set_base(rom + (data & 0x03) * 0x8000);
129	129	}
130	130
131	131	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, taotaido_state )

src/mame/drivers/relief.c

r14976	r14977
444	444
445	445	static DRIVER_INIT( relief )
446	446	{
447		UINT8 *sound_base = machine.region("oki")->base();
	447	UINT8 *sound_base = machine.root_device().memregion("oki")->base();
448	448
449	449	/* expand the ADPCM data to avoid lots of memcpy's during gameplay */
450	450	/* the upper 128k is fixed, the lower 128k is bankswitched */

src/mame/drivers/taito_f3.c

r14976	r14977
121	121	WRITE32_MEMBER(taito_f3_state::f3_sound_bankswitch_w)
122	122	{
123	123	if (m_f3_game==KIRAMEKI) {
124		UINT16 *rom = (UINT16 *)machine().region("audiocpu")->base();
	124	UINT16 *rom = (UINT16 *)machine().root_device().memregion("audiocpu")->base();
125	125	UINT32 idx;
126	126
127	127	idx = (offset << 1) & 0x1e;
r14976	r14977
133	133
134	134	/* Banks are 0x20000 bytes each, divide by two to get data16
135	135	pointer rather than byte pointer */
136		memory_set_bankptr(machine(), "bank2", &rom[(idx*0x20000)/2 + 0x80000]);
	136	membank("bank2")->set_base(&rom[(idx*0x20000)/2 + 0x80000]);
137	137
138	138	} else {
139	139	logerror("Sound bankswitch in unsupported game\n");
r14976	r14977
3666	3666	{
3667	3667	UINT8 lsb,msb;
3668	3668	UINT32 offset,i;
3669		UINT8 *gfx = machine.region("gfx2")->base();
3670		int size=machine.region("gfx2")->bytes();
	3669	UINT8 *gfx = machine.root_device().memregion("gfx2")->base();
	3670	int size=machine.root_device().memregion("gfx2")->bytes();
3671	3671	int data;
3672	3672
3673	3673	/* Setup ROM formats:
r14976	r14977
3699	3699	offset+=4;
3700	3700	}
3701	3701
3702		gfx = machine.region("gfx1")->base();
3703		size=machine.region("gfx1")->bytes();
	3702	gfx = machine.root_device().memregion("gfx1")->base();
	3703	size=machine.root_device().memregion("gfx1")->bytes();
3704	3704
3705	3705	offset = size/2;
3706	3706	for (i = size/2+size/4; i<size; i++)
r14976	r14977
3781	3781	static DRIVER_INIT( scfinals )
3782	3782	{
3783	3783	taito_f3_state *state = machine.driver_data<taito_f3_state>();
3784		UINT32 *RAM = (UINT32 *)machine.region("maincpu")->base();
	3784	UINT32 *RAM = (UINT32 *)state->memregion("maincpu")->base();
3785	3785
3786	3786	/* Doesn't boot without this - eprom related? */
3787	3787	RAM[0x5af0/4]=0x4e710000|(RAM[0x5af0/4]&0xffff);
r14976	r14977
3868	3868	//if (mem_mask==0x000000ff) downcast<okim6295_device *>(device)->write(0,data&0xff);
3869	3869	if (ACCESSING_BITS_16_23)
3870	3870	{
3871		UINT8 *snd = machine().region("oki")->base();
	3871	UINT8 *snd = memregion("oki")->base();
3872	3872	int bank = (data & 0x000f0000) >> 16;
3873	3873	// almost certainly wrong
3874	3874	memcpy(snd+0x30000, snd+0x80000+0x30000+bank*0x10000, 0x10000);
r14976	r14977
3889	3889	/* expand gfx rom */
3890	3890	{
3891	3891	int i;
3892		UINT8 *gfx = machine.region("gfx2")->base();
	3892	UINT8 *gfx = state->memregion("gfx2")->base();
3893	3893
3894	3894	for (i=0x200000;i<0x400000; i+=4)
3895	3895	{
r14976	r14977
3941	3941	static DRIVER_INIT( landmkrp )
3942	3942	{
3943	3943	taito_f3_state *state = machine.driver_data<taito_f3_state>();
3944		UINT32 *RAM = (UINT32 *)machine.region("maincpu")->base();
	3944	UINT32 *RAM = (UINT32 *)state->memregion("maincpu")->base();
3945	3945
3946	3946	/* For some reason the least significant byte in the last 2 long words of
3947	3947	ROM is swapped.  As the roms have been verified ok, I assume this is some
r14976	r14977
3989	3989	// which eventually causes the game to crash
3990	3990	//  -- protection check?? or some kind of checksum fail?
3991	3991
3992		UINT32 *ROM = (UINT32 *)machine.region("maincpu")->base();
	3992	UINT32 *ROM = (UINT32 *)state->memregion("maincpu")->base();
3993	3993
3994	3994	/* protection? */
3995	3995	ROM[0x40090/4]=0x00004e71|(ROM[0x40090/4]&0xffff0000);

src/mame/drivers/jpmsys5.c

r14976	r14977
249	249
250	250	WRITE16_MEMBER(jpmsys5_state::rombank_w)
251	251	{
252		UINT8 *rom = machine().region("maincpu")->base();
	252	UINT8 *rom = memregion("maincpu")->base();
253	253	data &= 0x1f;
254		memory_set_bankptr(machine(), "bank1", &rom[0x20000 + 0x20000 * data]);
	254	membank("bank1")->set_base(&rom[0x20000 + 0x20000 * data]);
255	255	}
256	256
257	257	READ16_MEMBER(jpmsys5_state::coins_r)
r14976	r14977
643	643	static MACHINE_START( jpmsys5v )
644	644	{
645	645	jpmsys5_state *state = machine.driver_data<jpmsys5_state>();
646		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base()+0x20000);
	646	state->membank("bank1")->set_base(state->memregion("maincpu")->base()+0x20000);
647	647	state->m_touch_timer = machine.scheduler().timer_alloc(FUNC(touch_cb));
648	648	}
649	649
r14976	r14977
794	794
795	795	static MACHINE_START( jpmsys5 )
796	796	{
797		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base()+0x20000);
	797	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base()+0x20000);
798	798	}
799	799
800	800	static MACHINE_RESET( jpmsys5 )

src/mame/drivers/homerun.c

r14976	r14977
193	193	static MACHINE_START( homerun )
194	194	{
195	195	homerun_state *state = machine.driver_data<homerun_state>();
196		UINT8 *ROM = machine.region("maincpu")->base();
	196	UINT8 *ROM = state->memregion("maincpu")->base();
197	197
198		memory_configure_bank(machine, "bank1", 0, 1, &ROM[0x00000], 0x4000);
199		memory_configure_bank(machine, "bank1", 1, 7, &ROM[0x10000], 0x4000);
	198	state->membank("bank1")->configure_entry(0, &ROM[0x00000]);
	199	state->membank("bank1")->configure_entries(1, 7, &ROM[0x10000], 0x4000);
200	200
201	201	state->save_item(NAME(state->m_gfx_ctrl));
202	202	state->save_item(NAME(state->m_gc_up));

src/mame/drivers/champbas.c

r14976	r14977
1177	1177	static DRIVER_INIT(champbas)
1178	1178	{
1179	1179	// chars and sprites are mixed in the same ROMs, so rearrange them for easier decoding
1180		UINT8 *rom1 = machine.region("gfx1")->base();
1181		UINT8 *rom2 = machine.region("gfx2")->base();
1182		int len = machine.region("gfx1")->bytes();
	1180	UINT8 *rom1 = machine.root_device().memregion("gfx1")->base();
	1181	UINT8 *rom2 = machine.root_device().memregion("gfx2")->base();
	1182	int len = machine.root_device().memregion("gfx1")->bytes();
1183	1183	int i;
1184	1184
1185	1185	for (i = 0; i < len/2; ++i)
r14976	r14977
1194	1194	static DRIVER_INIT( exctsccr )
1195	1195	{
1196	1196	// chars and sprites are mixed in the same ROMs, so rearrange them for easier decoding
1197		UINT8 *rom1 = machine.region("gfx1")->base();
1198		UINT8 *rom2 = machine.region("gfx2")->base();
	1197	UINT8 *rom1 = machine.root_device().memregion("gfx1")->base();
	1198	UINT8 *rom2 = machine.root_device().memregion("gfx2")->base();
1199	1199	int i;
1200	1200
1201	1201	// planes 0,1

src/mame/drivers/m107.c

r14976	r14977
83	83	{
84	84	if (ACCESSING_BITS_0_7)
85	85	{
86		memory_set_bank(machine(), "bank1", (data & 0x06) >> 1);
	86	membank("bank1")->set_entry((data & 0x06) >> 1);
87	87	if (data & 0xf9)
88	88	logerror("%05x: bankswitch %04x\n", cpu_get_pc(&space.device()), data);
89	89	}
r14976	r14977
964	964	static DRIVER_INIT( firebarr )
965	965	{
966	966	m107_state *state = machine.driver_data<m107_state>();
967		UINT8 *ROM = machine.region("maincpu")->base();
	967	UINT8 *ROM = state->memregion("maincpu")->base();
968	968
969		memory_set_bankptr(machine, "bank1", &ROM[0xa0000]);
	969	state->membank("bank1")->set_base(&ROM[0xa0000]);
970	970
971	971	state->m_irq_vectorbase = 0x20;
972	972	state->m_spritesystem = 1;
r14976	r14977
975	975	static DRIVER_INIT( dsoccr94 )
976	976	{
977	977	m107_state *state = machine.driver_data<m107_state>();
978		UINT8 *ROM = machine.region("maincpu")->base();
	978	UINT8 *ROM = state->memregion("maincpu")->base();
979	979
980		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x80000], 0x20000);
	980	state->membank("bank1")->configure_entries(0, 4, &ROM[0x80000], 0x20000);
981	981	machine.device("maincpu")->memory().space(AS_IO)->install_write_handler(0x06, 0x07, write16_delegate(FUNC(m107_state::m107_bankswitch_w),state));
982	982
983	983	state->m_irq_vectorbase = 0x80;

src/mame/drivers/ninjaw.c

r14976	r14977
355	355	static void reset_sound_region( running_machine &machine )
356	356	{
357	357	ninjaw_state *state = machine.driver_data<ninjaw_state>();
358		memory_set_bank(machine, "bank10", state->m_banknum);
	358	state->membank("bank10")->set_entry(state->m_banknum);
359	359	}
360	360
361	361	WRITE8_MEMBER(ninjaw_state::sound_bankswitch_w)
r14976	r14977
757	757	{
758	758	ninjaw_state *state = machine.driver_data<ninjaw_state>();
759	759
760		memory_configure_bank(machine, "bank10", 0, 8, machine.region("audiocpu")->base() + 0xc000, 0x4000);
	760	state->membank("bank10")->configure_entries(0, 8, state->memregion("audiocpu")->base() + 0xc000, 0x4000);
761	761
762	762	state->m_maincpu = machine.device("maincpu");
763	763	state->m_audiocpu = machine.device("audiocpu");

src/mame/drivers/arkanoid.c

r14976	r14977
1580	1580	arkanoid_state *state = machine.driver_data<arkanoid_state>();
1581	1581	// the graphics on this bootleg have the data scrambled
1582	1582	int tile;
1583		UINT8* srcgfx = machine.region("gfx1")->base();
	1583	UINT8* srcgfx = state->memregion("gfx1")->base();
1584	1584	UINT8* buffer = auto_alloc_array(machine, UINT8, 0x18000);
1585	1585
1586	1586	for (tile = 0; tile < 0x3000; tile++)
r14976	r14977
1643	1643	static DRIVER_INIT( tetrsark )
1644	1644	{
1645	1645	arkanoid_state *state = machine.driver_data<arkanoid_state>();
1646		UINT8 *ROM = machine.region("maincpu")->base();
	1646	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
1647	1647	int x;
1648	1648
1649	1649	for (x = 0; x < 0x8000; x++)
r14976	r14977
1657	1657
1658	1658	static DRIVER_INIT( hexa )
1659	1659	{
1660		UINT8 *RAM = machine.region("maincpu")->base();
	1660	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
1661	1661	#if 0
1662	1662
1663	1663
r14976	r14977
1671	1671	RAM[0x0126] = 0x00;
1672	1672	#endif
1673	1673
1674		memory_configure_bank(machine, "bank1", 0, 2, &RAM[0x10000], 0x4000);
	1674	machine.root_device().membank("bank1")->configure_entries(0, 2, &RAM[0x10000], 0x4000);
1675	1675	}
1676	1676
1677	1677

src/mame/drivers/twin16.c

r14976	r14977
88	88
89	89	READ16_MEMBER(twin16_state::extra_rom_r)
90	90	{
91		return ((UINT16 *)machine().region("gfx3")->base())[offset];
	91	return ((UINT16 *)machine().root_device().memregion("gfx3")->base())[offset];
92	92	}
93	93
94	94	READ16_MEMBER(twin16_state::twin16_gfx_rom1_r)
r14976	r14977
1305	1305	int i;
1306	1306	UINT16 *temp = auto_alloc_array(machine, UINT16, 0x200000/2);
1307	1307
1308		state->m_gfx_rom = (UINT16 *)machine.region("gfx2")->base();
	1308	state->m_gfx_rom = (UINT16 *)state->memregion("gfx2")->base();
1309	1309	memcpy( temp, state->m_gfx_rom, 0x200000 );
1310	1310
1311	1311	for( i=0; i<0x080000; i++ )

src/mame/drivers/megasys1.c

r14976	r14977
1380	1380
1381	1381	if ((m_protection_val & 0x90) == 0x90)
1382	1382	{
1383		UINT8 *RAM = machine().region("oki1")->base();
	1383	UINT8 *RAM = memregion("oki1")->base();
1384	1384	int new_bank = (m_protection_val & 0x7) % 7;
1385	1385
1386	1386	if (m_bank != new_bank)
r14976	r14977
3587	3587
3588	3588	static void rodlandj_gfx_unmangle(running_machine &machine, const char *region)
3589	3589	{
3590		UINT8 *rom = machine.region(region)->base();
3591		int size = machine.region(region)->bytes();
	3590	UINT8 *rom = machine.root_device().memregion(region)->base();
	3591	int size = machine.root_device().memregion(region)->bytes();
3592	3592	UINT8 *buffer;
3593	3593	int i;
3594	3594
r14976	r14977
3619	3619
3620	3620	static void jitsupro_gfx_unmangle(running_machine &machine, const char *region)
3621	3621	{
3622		UINT8 *rom = machine.region(region)->base();
3623		int size = machine.region(region)->bytes();
	3622	UINT8 *rom = machine.root_device().memregion(region)->base();
	3623	int size = machine.root_device().memregion(region)->bytes();
3624	3624	UINT8 *buffer;
3625	3625	int i;
3626	3626
r14976	r14977
3673	3673	static DRIVER_INIT( 64street )
3674	3674	{
3675	3675	megasys1_state *state = machine.driver_data<megasys1_state>();
3676		//  UINT16 *RAM = (UINT16 *) machine.region("maincpu")->base();
	3676	//  UINT16 *RAM = (UINT16 *) state->memregion("maincpu")->base();
3677	3677	//  RAM[0x006b8/2] = 0x6004;        // d8001 test
3678	3678	//  RAM[0x10EDE/2] = 0x6012;        // watchdog
3679	3679
r14976	r14977
3686	3686
3687	3687	READ16_MEMBER(megasys1_state::megasys1A_mcu_hs_r)
3688	3688	{
3689		UINT16 *ROM  = (UINT16 *) machine().region("maincpu")->base();
	3689	UINT16 *ROM  = (UINT16 *) memregion("maincpu")->base();
3690	3690
3691	3691	if(m_mcu_hs && ((m_mcu_hs_ram[8/2] << 6) & 0x3ffc0) == ((offset*2) & 0x3ffc0))
3692	3692	{
r14976	r14977
3827	3827
3828	3828	READ16_MEMBER(megasys1_state::iganinju_mcu_hs_r)
3829	3829	{
3830		UINT16 *ROM  = (UINT16 *) machine().region("maincpu")->base();
	3830	UINT16 *ROM  = (UINT16 *) memregion("maincpu")->base();
3831	3831
3832	3832	if(m_mcu_hs && ((m_mcu_hs_ram[8/2] << 6) & 0x3ffc0) == ((offset*2) & 0x3ffc0))
3833	3833	{
r14976	r14977
3867	3867
3868	3868	phantasm_rom_decode(machine, "maincpu");
3869	3869
3870		//RAM  = (UINT16 *) machine.region("maincpu")->base();
	3870	//RAM  = (UINT16 *) machine.root_device().memregion("maincpu")->base();
3871	3871	megasys1_state *state = machine.driver_data<megasys1_state>();
3872	3872	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x00000, 0x3ffff, read16_delegate(FUNC(megasys1_state::iganinju_mcu_hs_r),state));
3873	3873	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x2f000, 0x2f009, write16_delegate(FUNC(megasys1_state::iganinju_mcu_hs_w),state));
r14976	r14977
3887	3887	{
3888	3888	device_t *oki1 = machine.device("oki1");
3889	3889	device_t *oki2 = machine.device("oki2");
3890		//UINT16 *RAM  = (UINT16 *) machine.region("maincpu")->base();
	3890	//UINT16 *RAM  = (UINT16 *) machine.root_device().memregion("maincpu")->base();
3891	3891
3892	3892	astyanax_rom_decode(machine, "maincpu");      // Code
3893	3893
r14976	r14977
3955	3955
3956	3956	READ16_MEMBER(megasys1_state::stdragon_mcu_hs_r)
3957	3957	{
3958		UINT16 *ROM  = (UINT16 *) machine().region("maincpu")->base();
	3958	UINT16 *ROM  = (UINT16 *) memregion("maincpu")->base();
3959	3959
3960	3960	if(m_mcu_hs && ((m_mcu_hs_ram[8/2] << 6) & 0x3ffc0) == ((offset*2) & 0x3ffc0))
3961	3961	{
r14976	r14977
4026	4026	static DRIVER_INIT( monkelf )
4027	4027	{
4028	4028	megasys1_state *state = machine.driver_data<megasys1_state>();
4029		UINT16 *ROM = (UINT16*)machine.region("maincpu")->base();
	4029	UINT16 *ROM = (UINT16*)state->memregion("maincpu")->base();
4030	4030	ROM[0x00744/2] = 0x4e71; // weird check, 0xe000e R is a port-based trap?
4031	4031
4032	4032	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0xe0000, 0xe000f, read16_delegate(FUNC(megasys1_state::monkelf_input_r),state));

src/mame/drivers/crshrace.c

r14976	r14977
138	138
139	139	READ16_MEMBER(crshrace_state::extrarom1_r)
140	140	{
141		UINT8 *rom = machine().region("user1")->base();
	141	UINT8 *rom = memregion("user1")->base();
142	142
143	143	offset *= 2;
144	144
r14976	r14977
147	147
148	148	READ16_MEMBER(crshrace_state::extrarom2_r)
149	149	{
150		UINT8 *rom = machine().region("user2")->base();
	150	UINT8 *rom = memregion("user2")->base();
151	151
152	152	offset *= 2;
153	153
r14976	r14977
156	156
157	157	WRITE8_MEMBER(crshrace_state::crshrace_sh_bankswitch_w)
158	158	{
159		memory_set_bank(machine(), "bank1", data & 0x03);
	159	membank("bank1")->set_entry(data & 0x03);
160	160	}
161	161
162	162	WRITE16_MEMBER(crshrace_state::sound_command_w)
r14976	r14977
442	442	{
443	443	crshrace_state *state = machine.driver_data<crshrace_state>();
444	444
445		memory_configure_bank(machine, "bank1", 0, 4, machine.region("audiocpu")->base() + 0x10000, 0x8000);
	445	state->membank("bank1")->configure_entries(0, 4, state->memregion("audiocpu")->base() + 0x10000, 0x8000);
446	446
447	447	state->save_item(NAME(state->m_roz_bank));
448	448	state->save_item(NAME(state->m_gfxctrl));
r14976	r14977
577	577	void crshrace_patch_code( UINT16 offset )
578	578	{
579	579	/* A hack which shows 3 player mode in code which is disabled */
580		UINT16 *RAM = (UINT16 *)machine.region("maincpu")->base();
	580	UINT16 *RAM = (UINT16 *)machine.root_device().memregion("maincpu")->base();
581	581	RAM[(offset + 0)/2] = 0x4e71;
582	582	RAM[(offset + 2)/2] = 0x4e71;
583	583	RAM[(offset + 4)/2] = 0x4e71;

src/mame/drivers/airbustr.c

r14976	r14977
266	266
267	267	WRITE8_MEMBER(airbustr_state::master_bankswitch_w)
268	268	{
269		memory_set_bank(machine(), "bank1", data & 0x07);
	269	membank("bank1")->set_entry(data & 0x07);
270	270	}
271	271
272	272	WRITE8_MEMBER(airbustr_state::slave_bankswitch_w)
273	273	{
274	274
275		memory_set_bank(machine(), "bank2", data & 0x07);
	275	membank("bank2")->set_entry(data & 0x07);
276	276
277	277	flip_screen_set(data & 0x10);
278	278
r14976	r14977
282	282
283	283	WRITE8_MEMBER(airbustr_state::sound_bankswitch_w)
284	284	{
285		memory_set_bank(machine(), "bank3", data & 0x07);
	285	membank("bank3")->set_entry(data & 0x07);
286	286	}
287	287
288	288	READ8_MEMBER(airbustr_state::soundcommand_status_r)
r14976	r14977
571	571	static MACHINE_START( airbustr )
572	572	{
573	573	airbustr_state *state = machine.driver_data<airbustr_state>();
574		UINT8 *MASTER = machine.region("master")->base();
575		UINT8 *SLAVE = machine.region("slave")->base();
576		UINT8 *AUDIO = machine.region("audiocpu")->base();
	574	UINT8 *MASTER = machine.root_device().memregion("master")->base();
	575	UINT8 *SLAVE = machine.root_device().memregion("slave")->base();
	576	UINT8 *AUDIO = state->memregion("audiocpu")->base();
577	577
578		memory_configure_bank(machine, "bank1", 0, 3, &MASTER[0x00000], 0x4000);
579		memory_configure_bank(machine, "bank1", 3, 5, &MASTER[0x10000], 0x4000);
580		memory_configure_bank(machine, "bank2", 0, 3, &SLAVE[0x00000], 0x4000);
581		memory_configure_bank(machine, "bank2", 3, 5, &SLAVE[0x10000], 0x4000);
582		memory_configure_bank(machine, "bank3", 0, 3, &AUDIO[0x00000], 0x4000);
583		memory_configure_bank(machine, "bank3", 3, 5, &AUDIO[0x10000], 0x4000);
	578	state->membank("bank1")->configure_entries(0, 3, &MASTER[0x00000], 0x4000);
	579	state->membank("bank1")->configure_entries(3, 5, &MASTER[0x10000], 0x4000);
	580	state->membank("bank2")->configure_entries(0, 3, &SLAVE[0x00000], 0x4000);
	581	state->membank("bank2")->configure_entries(3, 5, &SLAVE[0x10000], 0x4000);
	582	state->membank("bank3")->configure_entries(0, 3, &AUDIO[0x00000], 0x4000);
	583	state->membank("bank3")->configure_entries(3, 5, &AUDIO[0x10000], 0x4000);
584	584
585	585	state->m_master = machine.device("master");
586	586	state->m_slave = machine.device("slave");
r14976	r14977
607	607	state->m_fg_scrolly = 0;
608	608	state->m_highbits = 0;
609	609
610		memory_set_bank(machine, "bank1", 0x02);
611		memory_set_bank(machine, "bank2", 0x02);
612		memory_set_bank(machine, "bank3", 0x02);
	610	state->membank("bank1")->set_entry(0x02);
	611	state->membank("bank2")->set_entry(0x02);
	612	state->membank("bank3")->set_entry(0x02);
613	613	}
614	614
615	615	/* Machine Driver */

src/mame/drivers/pacman.c

r14976	r14977
373	373
374	374	static MACHINE_RESET( mschamp )
375	375	{
376		UINT8 *rom = machine.region("maincpu")->base() + 0x10000;
	376	UINT8 *rom = machine.root_device().memregion("maincpu")->base() + 0x10000;
377	377	int whichbank = input_port_read(machine, "GAME") & 1;
378	378
379		memory_configure_bank(machine, "bank1", 0, 2, &rom[0x0000], 0x8000);
380		memory_configure_bank(machine, "bank2", 0, 2, &rom[0x4000], 0x8000);
	379	machine.root_device().membank("bank1")->configure_entries(0, 2, &rom[0x0000], 0x8000);
	380	machine.root_device().membank("bank2")->configure_entries(0, 2, &rom[0x4000], 0x8000);
381	381
382		memory_set_bank(machine, "bank1", whichbank);
383		memory_set_bank(machine, "bank2", whichbank);
	382	machine.root_device().membank("bank1")->set_entry(whichbank);
	383	machine.root_device().membank("bank2")->set_entry(whichbank);
384	384	}
385	385
386	386
r14976	r14977
650	650	READ8_MEMBER(pacman_state::bigbucks_question_r)
651	651	{
652	652
653		UINT8 *question = machine().region("user1")->base();
	653	UINT8 *question = memregion("user1")->base();
654	654	UINT8 ret;
655	655
656	656	ret = question[(m_bigbucks_bank << 16) | (offset ^ 0xffff)];
r14976	r14977
671	671
672	672	WRITE8_MEMBER(pacman_state::porky_banking_w)
673	673	{
674		memory_set_bank(machine(), "bank1", data & 1);
675		memory_set_bank(machine(), "bank2", data & 1);
676		memory_set_bank(machine(), "bank3", data & 1);
677		memory_set_bank(machine(), "bank4", data & 1);
	674	membank("bank1")->set_entry(data & 1);
	675	membank("bank2")->set_entry(data & 1);
	676	membank("bank3")->set_entry(data & 1);
	677	membank("bank4")->set_entry(data & 1);
678	678	}
679	679
680	680	READ8_MEMBER(pacman_state::drivfrcp_port1_r)
r14976	r14977
754	754
755	755	READ8_MEMBER(pacman_state::rocktrv2_question_r)
756	756	{
757		UINT8 *question = machine().region("user1")->base();
	757	UINT8 *question = memregion("user1")->base();
758	758
759	759	return question[offset | (m_rocktrv2_question_bank * 0x8000)];
760	760	}
r14976	r14977
839	839	vias required to lay out the aux PCB.
840	840	*/
841	841
842		#define mspacman_enable_decode_latch(m)  memory_set_bank(m, "bank1", 1)
843		#define mspacman_disable_decode_latch(m) memory_set_bank(m, "bank1", 0)
	842	#define mspacman_enable_decode_latch(m)  m.root_device().membank("bank1")->set_entry(1)
	843	#define mspacman_disable_decode_latch(m) m.root_device().membank("bank1")->set_entry(0)
844	844
845	845	// any access to these ROM addresses disables the decoder, and all you see is the original Pac-Man code
846		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x0038){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x0038]; }
847		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x03b0){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x03b0]; }
848		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x1600){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x1600]; }
849		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x2120){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x2120]; }
850		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x3ff0){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x3ff0]; }
851		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x8000){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x8000]; }
852		READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x97f0){ mspacman_disable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x97f0]; }
	846	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x0038){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x0038]; }
	847	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x03b0){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x03b0]; }
	848	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x1600){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x1600]; }
	849	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x2120){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x2120]; }
	850	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x3ff0){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x3ff0]; }
	851	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x8000){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x8000]; }
	852	READ8_MEMBER(pacman_state::mspacman_disable_decode_r_0x97f0){ mspacman_disable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x97f0]; }
853	853	WRITE8_MEMBER(pacman_state::mspacman_disable_decode_w){ mspacman_disable_decode_latch(machine()); }
854	854
855	855	// any access to these ROM addresses enables the decoder, and you'll see the Ms. Pac-Man code
856		READ8_MEMBER(pacman_state::mspacman_enable_decode_r_0x3ff8){ mspacman_enable_decode_latch(machine()); return machine().region("maincpu")->base()[offset+0x3ff8+0x10000]; }
	856	READ8_MEMBER(pacman_state::mspacman_enable_decode_r_0x3ff8){ mspacman_enable_decode_latch(machine()); return memregion("maincpu")->base()[offset+0x3ff8+0x10000]; }
857	857	WRITE8_MEMBER(pacman_state::mspacman_enable_decode_w){ mspacman_enable_decode_latch(machine()); }
858	858
859	859
r14976	r14977
5466	5466	{
5467	5467	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
5468	5468	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
5469		UINT8 *rom = machine.region("maincpu")->base();
	5469	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
5470	5470
5471	5471	/* patch protection using a copy of the opcodes so ROM checksum */
5472	5472	/* tests will not fail */
r14976	r14977
5499	5499	{
5500	5500	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
5501	5501	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
5502		UINT8 *rom = machine.region("maincpu")->base();
	5502	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
5503	5503
5504	5504	/* patch protection using a copy of the opcodes so ROM checksum */
5505	5505	/* tests will not fail */
r14976	r14977
5535	5535
5536	5536	int i, j;
5537	5537	UINT8 *RAM, temp;
5538		int length = machine.region("gfx1")->bytes()/2;
	5538	int length = machine.root_device().memregion("gfx1")->bytes()/2;
5539	5539
5540	5540	/* Characters */
5541		RAM = machine.region("gfx1")->base();
	5541	RAM = machine.root_device().memregion("gfx1")->base();
5542	5542	for (i = 0;i < length;i += 0x10)
5543	5543	{
5544	5544	for (j = 0; j < 8; j++)
r14976	r14977
5550	5550	}
5551	5551
5552	5552	/* Sprites */
5553		RAM = machine.region("gfx1")->base()+length;
	5553	RAM = machine.root_device().memregion("gfx1")->base()+length;
5554	5554	for (i = 0;i < length;i += 0x20)
5555	5555	{
5556	5556	for (j = 0; j < 8; j++)
r14976	r14977
5588	5588	/* CPU ROMs */
5589	5589
5590	5590	/* Data lines D3 and D5 swapped */
5591		RAM = machine.region("maincpu")->base();
	5591	RAM = machine.root_device().memregion("maincpu")->base();
5592	5592	for (i = 0; i < 0x4000; i++)
5593	5593	{
5594	5594	RAM[i] = BITSWAP8(RAM[i],7,6,3,4,5,2,1,0);
r14976	r14977
5598	5598	/* Graphics ROMs */
5599	5599
5600	5600	/* Data lines D4 and D6 and address lines A0 and A2 are swapped */
5601		RAM = machine.region("gfx1")->base();
5602		len = machine.region("gfx1")->bytes();
	5601	RAM = machine.root_device().memregion("gfx1")->base();
	5602	len = machine.root_device().memregion("gfx1")->bytes();
5603	5603	for (i = 0;i < len;i += 8)
5604	5604	eyes_decode(&RAM[i]);
5605	5605	}
r14976	r14977
5672	5672	/* CPU ROMs */
5673	5673
5674	5674	/* Pac-Man code is in low bank */
5675		ROM = machine.region("maincpu")->base();
	5675	ROM = machine.root_device().memregion("maincpu")->base();
5676	5676
5677	5677	/* decrypted Ms. Pac-Man code is in high bank */
5678		DROM = &machine.region("maincpu")->base()[0x10000];
	5678	DROM = &machine.root_device().memregion("maincpu")->base()[0x10000];
5679	5679
5680	5680	/* copy ROMs into decrypted bank */
5681	5681	for (i = 0; i < 0x1000; i++)
r14976	r14977
5710	5710	}
5711	5711
5712	5712	/* initialize the banks */
5713		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x00000], 0x10000);
5714		memory_set_bank(machine, "bank1", 1);
	5713	machine.root_device().membank("bank1")->configure_entries(0, 2, &ROM[0x00000], 0x10000);
	5714	machine.root_device().membank("bank1")->set_entry(1);
5715	5715	}
5716	5716
5717	5717	static DRIVER_INIT( woodpek )
r14976	r14977
5722	5722	/* Graphics ROMs */
5723	5723
5724	5724	/* Data lines D4 and D6 and address lines A0 and A2 are swapped */
5725		RAM = machine.region("gfx1")->base();
5726		len = machine.region("gfx1")->bytes();
	5725	RAM = machine.root_device().memregion("gfx1")->base();
	5726	len = machine.root_device().memregion("gfx1")->bytes();
5727	5727	for (i = 0;i < len;i += 8)
5728	5728	eyes_decode(&RAM[i]);
5729	5729	}
r14976	r14977
5740	5740
5741	5741	static DRIVER_INIT( drivfrcp )
5742	5742	{
5743		UINT8 *ROM = machine.region("maincpu")->base();
5744		memory_set_bankptr(machine, "bank1", &ROM[0 * 0x2000]);
5745		memory_set_bankptr(machine, "bank2", &ROM[1 * 0x2000]);
5746		memory_set_bankptr(machine, "bank3", &ROM[2 * 0x2000]);
5747		memory_set_bankptr(machine, "bank4", &ROM[3 * 0x2000]);
	5743	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	5744	machine.root_device().membank("bank1")->set_base(&ROM[0 * 0x2000]);
	5745	machine.root_device().membank("bank2")->set_base(&ROM[1 * 0x2000]);
	5746	machine.root_device().membank("bank3")->set_base(&ROM[2 * 0x2000]);
	5747	machine.root_device().membank("bank4")->set_base(&ROM[3 * 0x2000]);
5748	5748	}
5749	5749
5750	5750	static DRIVER_INIT( 8bpm )
5751	5751	{
5752		UINT8 *ROM = machine.region("maincpu")->base();
	5752	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
5753	5753	int i;
5754	5754
5755	5755	/* Data lines D0 and D6 swapped */
r14976	r14977
5758	5758	ROM[i] = BITSWAP8(ROM[i],7,0,5,4,3,2,1,6);
5759	5759	}
5760	5760
5761		memory_set_bankptr(machine, "bank1", &ROM[0 * 0x2000]);
5762		memory_set_bankptr(machine, "bank2", &ROM[1 * 0x2000]);
5763		memory_set_bankptr(machine, "bank3", &ROM[2 * 0x2000]);
5764		memory_set_bankptr(machine, "bank4", &ROM[3 * 0x2000]);
	5761	machine.root_device().membank("bank1")->set_base(&ROM[0 * 0x2000]);
	5762	machine.root_device().membank("bank2")->set_base(&ROM[1 * 0x2000]);
	5763	machine.root_device().membank("bank3")->set_base(&ROM[2 * 0x2000]);
	5764	machine.root_device().membank("bank4")->set_base(&ROM[3 * 0x2000]);
5765	5765	}
5766	5766
5767	5767	static DRIVER_INIT( porky )
5768	5768	{
5769		UINT8 *ROM = machine.region("maincpu")->base();
	5769	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
5770	5770	int i;
5771	5771
5772	5772	/* Data lines D0 and D4 swapped */
r14976	r14977
5775	5775	ROM[i] = BITSWAP8(ROM[i],7,6,5,0,3,2,1,4);
5776	5776	}
5777	5777
5778		memory_configure_bank(machine, "bank1", 0, 2, &ROM[0 * 0x2000], 0x8000);
5779		memory_configure_bank(machine, "bank2", 0, 2, &ROM[1 * 0x2000], 0x8000);
5780		memory_configure_bank(machine, "bank3", 0, 2, &ROM[2 * 0x2000], 0x8000);
5781		memory_configure_bank(machine, "bank4", 0, 2, &ROM[3 * 0x2000], 0x8000);
	5778	machine.root_device().membank("bank1")->configure_entries(0, 2, &ROM[0 * 0x2000], 0x8000);
	5779	machine.root_device().membank("bank2")->configure_entries(0, 2, &ROM[1 * 0x2000], 0x8000);
	5780	machine.root_device().membank("bank3")->configure_entries(0, 2, &ROM[2 * 0x2000], 0x8000);
	5781	machine.root_device().membank("bank4")->configure_entries(0, 2, &ROM[3 * 0x2000], 0x8000);
5782	5782
5783		memory_set_bank(machine, "bank1", 0);
5784		memory_set_bank(machine, "bank2", 0);
5785		memory_set_bank(machine, "bank3", 0);
5786		memory_set_bank(machine, "bank4", 0);
	5783	machine.root_device().membank("bank1")->set_entry(0);
	5784	machine.root_device().membank("bank2")->set_entry(0);
	5785	machine.root_device().membank("bank3")->set_entry(0);
	5786	machine.root_device().membank("bank4")->set_entry(0);
5787	5787	}
5788	5788
5789	5789	static DRIVER_INIT( rocktrv2 )
5790	5790	{
5791	5791	/* hack to pass the rom check for the bad rom */
5792		UINT8 *ROM = machine.region("maincpu")->base();
	5792	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
5793	5793
5794	5794	ROM[0x7ffe] = 0xa7;
5795	5795	ROM[0x7fee] = 0x6d;
r14976	r14977
5801	5801	static DRIVER_INIT( mspacmbe )
5802	5802	{
5803	5803	UINT8 temp;
5804		UINT8 *RAM = machine.region("maincpu")->base();
	5804	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
5805	5805	int i;
5806	5806
5807	5807	/* Address lines A1 and A0 swapped if A2=0 */

src/mame/drivers/igs011.c

r14976	r14977
415	415	UINT8 trans_pen, clear_pen, pen_hi, *dest;
416	416	UINT8 pen = 0;
417	417
418		UINT8 *gfx      =   machine().region("blitter")->base();
419		UINT8 *gfx2      =   machine().region("blitter_hi")->base();
420		int gfx_size   =   machine().region("blitter")->bytes();
421		int gfx2_size   =   machine().region("blitter_hi")->bytes();
	418	UINT8 *gfx      =   memregion("blitter")->base();
	419	UINT8 *gfx2      =   memregion("blitter_hi")->base();
	420	int gfx_size   =   memregion("blitter")->bytes();
	421	int gfx2_size   =   memregion("blitter_hi")->bytes();
422	422
423	423	const rectangle &clip = machine().primary_screen->visible_area();
424	424
r14976	r14977
559	559	static void wlcc_decrypt(running_machine &machine)
560	560	{
561	561	int i;
562		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	562	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
563	563
564	564	int rom_size = 0x80000;
565	565
r14976	r14977
583	583	static void lhb_decrypt(running_machine &machine)
584	584	{
585	585	int i;
586		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	586	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
587	587
588	588	int rom_size = 0x80000;
589	589
r14976	r14977
608	608	static void drgnwrld_type3_decrypt(running_machine &machine)
609	609	{
610	610	int i;
611		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	611	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
612	612
613	613	int rom_size = 0x80000;
614	614
r14976	r14977
636	636	static void drgnwrld_type2_decrypt(running_machine &machine)
637	637	{
638	638	int i;
639		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	639	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
640	640
641	641	int rom_size = 0x80000;
642	642
r14976	r14977
669	669	static void drgnwrld_type1_decrypt(running_machine &machine)
670	670	{
671	671	int i;
672		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	672	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
673	673
674	674	int rom_size = 0x80000;
675	675
r14976	r14977
699	699	{
700	700	int i,j;
701	701	int rom_size = 0x80000;
702		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	702	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
703	703	UINT16 *result_data = auto_alloc_array(machine, UINT16, rom_size/2);
704	704
705	705	for (i=0; i<rom_size/2; i++)
r14976	r14977
740	740
741	741	int i,j;
742	742	int rom_size = 0x80000;
743		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	743	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
744	744	UINT16 *result_data = auto_alloc_array(machine, UINT16, rom_size/2);
745	745
746	746	for (i=0; i<rom_size/2; i++)
r14976	r14977
770	770	static void vbowlj_decrypt(running_machine &machine)
771	771	{
772	772	int i;
773		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	773	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
774	774
775	775	int rom_size = 0x80000;
776	776
r14976	r14977
804	804	static void dbc_decrypt(running_machine &machine)
805	805	{
806	806	int i;
807		UINT16 *src = (UINT16 *) (machine.region("maincpu")->base());
	807	UINT16 *src = (UINT16 *) (machine.root_device().memregion("maincpu")->base());
808	808
809	809	int rom_size = 0x80000;
810	810
r14976	r14977
854	854	static void ryukobou_decrypt(running_machine &machine)
855	855	{
856	856	int i;
857		UINT16 *src = (UINT16 *) machine.region("maincpu")->base();
	857	UINT16 *src = (UINT16 *) machine.root_device().memregion("maincpu")->base();
858	858	int rom_size = 0x80000;
859	859
860	860	for (i=0; i<rom_size/2; i++)
r14976	r14977
886	886	{
887	887	int i;
888	888	unsigned rom_size = 0x200000;
889		UINT8 *src = (UINT8 *) (machine.region("blitter")->base());
	889	UINT8 *src = (UINT8 *) (machine.root_device().memregion("blitter")->base());
890	890	UINT8 *result_data = auto_alloc_array(machine, UINT8, rom_size);
891	891
892	892	for (i=0; i<rom_size; i++)
r14976	r14977
901	901	{
902	902	int i;
903	903	unsigned rom_size = 0x400000;
904		UINT8 *src = (UINT8 *) (machine.region("blitter")->base());
	904	UINT8 *src = (UINT8 *) (machine.root_device().memregion("blitter")->base());
905	905	UINT8 *result_data = auto_alloc_array(machine, UINT8, rom_size);
906	906
907	907	for (i=0; i<rom_size; i++)
r14976	r14977
1014	1014	//  m_prot2 = 0x00;
1015	1015
1016	1016	address_space *sp = machine().device("maincpu")->memory().space(AS_PROGRAM);
1017		UINT8 *rom = machine().region("maincpu")->base();
	1017	UINT8 *rom = memregion("maincpu")->base();
1018	1018
1019	1019	// Plug previous address range with ROM access
1020	1020	sp->install_rom(m_prot1_addr + 0, m_prot1_addr + 9, rom + m_prot1_addr);
r14976	r14977
1757	1757	// V0400O
1758	1758	static DRIVER_INIT( drgnwrld )
1759	1759	{
1760		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1760	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1761	1761
1762	1762	drgnwrld_type1_decrypt(machine);
1763	1763	drgnwrld_gfx_decrypt(machine);
r14976	r14977
1783	1783
1784	1784	static DRIVER_INIT( drgnwrldv30 )
1785	1785	{
1786		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1786	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1787	1787
1788	1788	drgnwrld_type1_decrypt(machine);
1789	1789	drgnwrld_gfx_decrypt(machine);
r14976	r14977
1808	1808
1809	1809	static DRIVER_INIT( drgnwrldv21 )
1810	1810	{
1811		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1811	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1812	1812
1813	1813	drgnwrld_type2_decrypt(machine);
1814	1814	drgnwrld_gfx_decrypt(machine);
r14976	r14977
1838	1838
1839	1839	static DRIVER_INIT( drgnwrldv21j )
1840	1840	{
1841		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1841	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1842	1842
1843	1843	drgnwrld_type3_decrypt(machine);
1844	1844	drgnwrld_gfx_decrypt(machine);
r14976	r14977
1865	1865
1866	1866	static DRIVER_INIT( drgnwrldv20j )
1867	1867	{
1868		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1868	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1869	1869
1870	1870	drgnwrld_type3_decrypt(machine);
1871	1871	drgnwrld_gfx_decrypt(machine);
r14976	r14977
1903	1903
1904	1904	static DRIVER_INIT( drgnwrldv10c )
1905	1905	{
1906		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1906	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1907	1907
1908	1908	drgnwrld_type1_decrypt(machine);
1909	1909	drgnwrld_gfx_decrypt(machine);
r14976	r14977
1929	1929
1930	1930	static DRIVER_INIT( lhb )
1931	1931	{
1932		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1932	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1933	1933
1934	1934	lhb_decrypt(machine);
1935	1935
r14976	r14977
1939	1939
1940	1940	static DRIVER_INIT( lhbv33c )
1941	1941	{
1942		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1942	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1943	1943
1944	1944	lhb_decrypt(machine);
1945	1945
r14976	r14977
1949	1949
1950	1950	static DRIVER_INIT( dbc )
1951	1951	{
1952		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1952	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1953	1953
1954	1954	dbc_decrypt(machine);
1955	1955
r14976	r14977
1979	1979
1980	1980	static DRIVER_INIT( ryukobou )
1981	1981	{
1982		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1982	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1983	1983
1984	1984	ryukobou_decrypt(machine);
1985	1985
r14976	r14977
1993	1993
1994	1994	static DRIVER_INIT( xymg )
1995	1995	{
1996		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	1996	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
1997	1997
1998	1998	lhb_decrypt(machine);
1999	1999	/*
r14976	r14977
2027	2027
2028	2028	static DRIVER_INIT( wlcc )
2029	2029	{
2030		//  UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	2030	//  UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
2031	2031
2032	2032	wlcc_decrypt(machine);
2033	2033	/*
r14976	r14977
2051	2051
2052	2052	static DRIVER_INIT( lhb2 )
2053	2053	{
2054		UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
	2054	UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
2055	2055
2056	2056	lhb2_decrypt(machine);
2057	2057	lhb2_decrypt_gfx(machine);
r14976	r14977
2073	2073
2074	2074	static DRIVER_INIT( vbowl )
2075	2075	{
2076		UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
2077		UINT8  *gfx = (UINT8 *)  machine.region("blitter")->base();
	2076	UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
	2077	UINT8  *gfx = (UINT8 *)  machine.root_device().memregion("blitter")->base();
2078	2078	int i;
2079	2079
2080	2080	vbowlj_decrypt(machine);
r14976	r14977
2098	2098
2099	2099	static DRIVER_INIT( vbowlj )
2100	2100	{
2101		UINT16 *rom = (UINT16 *) machine.region("maincpu")->base();
2102		UINT8  *gfx = (UINT8 *)  machine.region("blitter")->base();
	2101	UINT16 *rom = (UINT16 *) machine.root_device().memregion("maincpu")->base();
	2102	UINT8  *gfx = (UINT8 *)  machine.root_device().memregion("blitter")->base();
2103	2103	int i;
2104	2104
2105	2105	vbowlj_decrypt(machine);

src/mame/drivers/bwing.c

r14976	r14977
586	586	{
587	587	bwing_state *state = machine.driver_data<bwing_state>();
588	588
589		state->m_bwp123_membase[0] = machine.region("maincpu")->base();
590		state->m_bwp123_membase[1] = machine.region("sub")->base();
591		state->m_bwp123_membase[2] = machine.region("audiocpu")->base();
	589	state->m_bwp123_membase[0] = machine.root_device().memregion("maincpu")->base();
	590	state->m_bwp123_membase[1] = machine.root_device().memregion("sub")->base();
	591	state->m_bwp123_membase[2] = state->memregion("audiocpu")->base();
592	592
593	593	fix_bwp3(machine);
594	594	}

src/mame/drivers/srmp6.c

r14976	r14977
333	333
334	334	case 0x5e/2: // bank switch, used by ROM check
335	335	{
336		const UINT8 *rom = machine().region("nile")->base();
	336	const UINT8 *rom = memregion("nile")->base();
337	337	LOG(("%x\n",data));
338		memory_set_bankptr(machine(), "bank1",(UINT16 *)(rom + (data & 0x0f)*0x200000));
	338	membank("bank1")->set_base((UINT16 *)(rom + (data & 0x0f)*0x200000));
339	339	break;
340	340	}
341	341
r14976	r14977
418	418	COMBINE_DATA(&dmaram[offset]);
419	419	if (offset==13 && dmaram[offset]==0x40)
420	420	{
421		const UINT8 *rom = machine().region("nile")->base();
	421	const UINT8 *rom = memregion("nile")->base();
422	422	UINT32 srctab=2*((((UINT32)dmaram[5])<<16)|dmaram[4]);
423	423	UINT32 srcdata=2*((((UINT32)dmaram[11])<<16)|dmaram[10]);
424	424	UINT32 len=4*(((((UINT32)dmaram[7]&3)<<16)|dmaram[6])+1); //??? WRONG!

src/mame/drivers/sf.c

r14976	r14977
173	173
174	174	WRITE8_MEMBER(sf_state::sound2_bank_w)
175	175	{
176		memory_set_bankptr(machine(), "bank1", machine().region("audio2")->base() + 0x8000 * (data + 1));
	176	membank("bank1")->set_base(machine().root_device().memregion("audio2")->base() + 0x8000 * (data + 1));
177	177	}
178	178
179	179

src/mame/drivers/cave.c

r14976	r14977
1047	1047	if (data & ~0x0f)
1048	1048	logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
1049	1049
1050		memory_set_bank(machine(), "bank2", data & 0x0f);
	1050	membank("bank2")->set_entry(data & 0x0f);
1051	1051	}
1052	1052
1053	1053	WRITE8_MEMBER(cave_state::hotdogst_okibank_w)
1054	1054	{
1055	1055	int bank1 = (data >> 0) & 0x3;
1056	1056	int bank2 = (data >> 4) & 0x3;
1057		memory_set_bank(machine(), "bank3", bank1);
1058		memory_set_bank(machine(), "bank4", bank2);
	1057	membank("bank3")->set_entry(bank1);
	1058	membank("bank4")->set_entry(bank2);
1059	1059	}
1060	1060
1061	1061	static ADDRESS_MAP_START( hotdogst_sound_map, AS_PROGRAM, 8, cave_state )
r14976	r14977
1084	1084	if (data & ~0x07)
1085	1085	logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
1086	1086
1087		memory_set_bank(machine(), "bank2", data & 0x07);
	1087	membank("bank2")->set_entry(data & 0x07);
1088	1088	}
1089	1089
1090	1090	static ADDRESS_MAP_START( mazinger_sound_map, AS_PROGRAM, 8, cave_state )
r14976	r14977
1115	1115	if (data & ~0x0f)
1116	1116	logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
1117	1117
1118		memory_set_bank(machine(), "bank1", data & 0x0f);
	1118	membank("bank1")->set_entry(data & 0x0f);
1119	1119	}
1120	1120
1121	1121	WRITE8_MEMBER(cave_state::metmqstr_okibank0_w)
1122	1122	{
1123	1123	int bank1 = (data >> 0) & 0x7;
1124	1124	int bank2 = (data >> 4) & 0x7;
1125		memory_set_bank(machine(), "bank3", bank1);
1126		memory_set_bank(machine(), "bank4", bank2);
	1125	membank("bank3")->set_entry(bank1);
	1126	membank("bank4")->set_entry(bank2);
1127	1127	}
1128	1128
1129	1129	WRITE8_MEMBER(cave_state::metmqstr_okibank1_w)
1130	1130	{
1131	1131	int bank1 = (data >> 0) & 0x7;
1132	1132	int bank2 = (data >> 4) & 0x7;
1133		memory_set_bank(machine(), "bank5", bank1);
1134		memory_set_bank(machine(), "bank6", bank2);
	1133	membank("bank5")->set_entry(bank1);
	1134	membank("bank6")->set_entry(bank2);
1135	1135	}
1136	1136
1137	1137	static ADDRESS_MAP_START( metmqstr_sound_map, AS_PROGRAM, 8, cave_state )
r14976	r14977
1163	1163	if (data & ~0x07)
1164	1164	logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
1165	1165
1166		memory_set_bank(machine(), "bank1", data & 0x07);
	1166	membank("bank1")->set_entry(data & 0x07);
1167	1167	}
1168	1168
1169	1169	static ADDRESS_MAP_START( pwrinst2_sound_map, AS_PROGRAM, 8, cave_state )
r14976	r14977
1205	1205	if (data & ~0x1f)
1206	1206	logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
1207	1207
1208		memory_set_bank(machine(), "bank1", data & 0x1f);
	1208	membank("bank1")->set_entry(data & 0x1f);
1209	1209	}
1210	1210
1211	1211	WRITE8_MEMBER(cave_state::sailormn_okibank0_w)
1212	1212	{
1213	1213	int bank1 = (data >> 0) & 0xf;
1214	1214	int bank2 = (data >> 4) & 0xf;
1215		memory_set_bank(machine(), "bank3", bank1);
1216		memory_set_bank(machine(), "bank4", bank2);
	1215	membank("bank3")->set_entry(bank1);
	1216	membank("bank4")->set_entry(bank2);
1217	1217	}
1218	1218
1219	1219	WRITE8_MEMBER(cave_state::sailormn_okibank1_w)
1220	1220	{
1221	1221	int bank1 = (data >> 0) & 0xf;
1222	1222	int bank2 = (data >> 4) & 0xf;
1223		memory_set_bank(machine(), "bank5", bank1);
1224		memory_set_bank(machine(), "bank6", bank2);
	1223	membank("bank5")->set_entry(bank1);
	1224	membank("bank6")->set_entry(bank2);
1225	1225	}
1226	1226
1227	1227	static ADDRESS_MAP_START( sailormn_sound_map, AS_PROGRAM, 8, cave_state )
r14976	r14977
2585	2585	/* 4 bits -> 8 bits. Even and odd pixels are swapped */
2586	2586	static void unpack_sprites(running_machine &machine)
2587	2587	{
2588		const UINT32 len   =   machine.region("sprites")->bytes();
2589		UINT8 *rgn         =   machine.region       ("sprites")->base();
	2588	const UINT32 len   =   machine.root_device().memregion("sprites")->bytes();
	2589	UINT8 *rgn         =   machine.root_device().memregion       ("sprites")->base();
2590	2590	UINT8 *src         =   rgn + len / 2 - 1;
2591	2591	UINT8 *dst         =   rgn + len - 1;
2592	2592
r14976	r14977
2602	2602	/* 4 bits -> 8 bits. Even and odd pixels and even and odd words, are swapped */
2603	2603	static void ddonpach_unpack_sprites(running_machine &machine)
2604	2604	{
2605		const UINT32 len   =   machine.region("sprites")->bytes();
2606		UINT8 *rgn         =   machine.region       ("sprites")->base();
	2605	const UINT32 len   =   machine.root_device().memregion("sprites")->bytes();
	2606	UINT8 *rgn         =   machine.root_device().memregion       ("sprites")->base();
2607	2607	UINT8 *src         =   rgn + len / 2 - 1;
2608	2608	UINT8 *dst         =   rgn + len - 1;
2609	2609
r14976	r14977
2626	2626	/* 2 pages of 4 bits -> 8 bits */
2627	2627	static void esprade_unpack_sprites(running_machine &machine)
2628	2628	{
2629		UINT8 *src      =   machine.region("sprites")->base();
2630		UINT8 *dst      =   src + machine.region("sprites")->bytes();
	2629	UINT8 *src      =   machine.root_device().memregion("sprites")->base();
	2630	UINT8 *dst      =   src + machine.root_device().memregion("sprites")->bytes();
2631	2631
2632	2632	while(src < dst)
2633	2633	{
r14976	r14977
4415	4415	Expand the 2 bit part into a 4 bit layout, so we can decode it */
4416	4416	static void sailormn_unpack_tiles( running_machine &machine, const char *region )
4417	4417	{
4418		const UINT32 len   =   machine.region(region)->bytes();
4419		UINT8 *rgn      =   machine.region(region)->base();
	4418	const UINT32 len   =   machine.root_device().memregion(region)->bytes();
	4419	UINT8 *rgn      =   machine.root_device().memregion(region)->base();
4420	4420	UINT8 *src      =   rgn + (len/4)*3 - 1;
4421	4421	UINT8 *dst      =   rgn + (len/4)*4 - 2;
4422	4422
r14976	r14977
4446	4446
4447	4447	static DRIVER_INIT( agallet )
4448	4448	{
4449		UINT8 *ROM = machine.region("audiocpu")->base();
	4449	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
4450	4450	init_cave(machine);
4451	4451
4452		memory_configure_bank(machine, "bank1", 0, 0x02, &ROM[0x00000], 0x4000);
4453		memory_configure_bank(machine, "bank1", 2, 0x1e, &ROM[0x10000], 0x4000);
	4452	machine.root_device().membank("bank1")->configure_entries(0, 0x02, &ROM[0x00000], 0x4000);
	4453	machine.root_device().membank("bank1")->configure_entries(2, 0x1e, &ROM[0x10000], 0x4000);
4454	4454
4455		ROM = machine.region("oki1")->base();
4456		memory_configure_bank(machine, "bank3", 0, 0x10, &ROM[0x00000], 0x20000);
4457		memory_configure_bank(machine, "bank4", 0, 0x10, &ROM[0x00000], 0x20000);
	4455	ROM = machine.root_device().memregion("oki1")->base();
	4456	machine.root_device().membank("bank3")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
	4457	machine.root_device().membank("bank4")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
4458	4458
4459		ROM = machine.region("oki2")->base();
4460		memory_configure_bank(machine, "bank5", 0, 0x10, &ROM[0x00000], 0x20000);
4461		memory_configure_bank(machine, "bank6", 0, 0x10, &ROM[0x00000], 0x20000);
	4459	ROM = machine.root_device().memregion("oki2")->base();
	4460	machine.root_device().membank("bank5")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
	4461	machine.root_device().membank("bank6")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
4462	4462
4463	4463	sailormn_unpack_tiles(machine, "layer2");
4464	4464
r14976	r14977
4514	4514
4515	4515	#if 0      //ROM PATCH
4516	4516	{
4517		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	4517	UINT16 *rom = (UINT16 *)state->memregion("maincpu")->base();
4518	4518	rom[0x118A/2] = 0x4e71;         //palette fix   118A: 5548              SUBQ.W  #2,A0       --> NOP
4519	4519	}
4520	4520	#endif
r14976	r14977
4544	4544	static DRIVER_INIT( hotdogst )
4545	4545	{
4546	4546	cave_state *state = machine.driver_data<cave_state>();
4547		UINT8 *ROM = machine.region("audiocpu")->base();
	4547	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
4548	4548
4549	4549	init_cave(machine);
4550	4550
4551		memory_configure_bank(machine, "bank2", 0, 0x2, &ROM[0x00000], 0x4000);
4552		memory_configure_bank(machine, "bank2", 2, 0xe, &ROM[0x10000], 0x4000);
	4551	state->membank("bank2")->configure_entries(0, 0x2, &ROM[0x00000], 0x4000);
	4552	state->membank("bank2")->configure_entries(2, 0xe, &ROM[0x10000], 0x4000);
4553	4553
4554		ROM = machine.region("oki")->base();
4555		memory_configure_bank(machine, "bank3", 0, 4, &ROM[0x00000], 0x20000);
4556		memory_configure_bank(machine, "bank4", 0, 4, &ROM[0x00000], 0x20000);
	4554	ROM = state->memregion("oki")->base();
	4555	state->membank("bank3")->configure_entries(0, 4, &ROM[0x00000], 0x20000);
	4556	state->membank("bank4")->configure_entries(0, 4, &ROM[0x00000], 0x20000);
4557	4557
4558	4558	unpack_sprites(machine);
4559	4559	state->m_spritetype[0] = 2;   // Normal sprites with different position handling
r14976	r14977
4563	4563	static DRIVER_INIT( mazinger )
4564	4564	{
4565	4565	cave_state *state = machine.driver_data<cave_state>();
4566		UINT8 *ROM = machine.region("audiocpu")->base();
	4566	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
4567	4567	UINT8 *buffer;
4568		UINT8 *src = machine.region("sprites")->base();
4569		int len = machine.region("sprites")->bytes();
	4568	UINT8 *src = machine.root_device().memregion("sprites")->base();
	4569	int len = machine.root_device().memregion("sprites")->bytes();
4570	4570
4571	4571	init_cave(machine);
4572	4572
4573		memory_configure_bank(machine, "bank2", 0, 2, &ROM[0x00000], 0x4000);
4574		memory_configure_bank(machine, "bank2", 2, 6, &ROM[0x10000], 0x4000);
	4573	state->membank("bank2")->configure_entries(0, 2, &ROM[0x00000], 0x4000);
	4574	state->membank("bank2")->configure_entries(2, 6, &ROM[0x10000], 0x4000);
4575	4575
4576		ROM = machine.region("oki")->base();
4577		memory_configure_bank(machine, "bank3", 0, 4, &ROM[0x00000], 0x20000);
4578		memory_configure_bank(machine, "bank4", 0, 4, &ROM[0x00000], 0x20000);
	4576	ROM = state->memregion("oki")->base();
	4577	state->membank("bank3")->configure_entries(0, 4, &ROM[0x00000], 0x20000);
	4578	state->membank("bank4")->configure_entries(0, 4, &ROM[0x00000], 0x20000);
4579	4579
4580	4580	/* decrypt sprites */
4581	4581	buffer = auto_alloc_array(machine, UINT8, len);
r14976	r14977
4593	4593	state->m_time_vblank_irq = 2100;
4594	4594
4595	4595	/* setup extra ROM */
4596		memory_set_bankptr(machine, "bank1",machine.region("user1")->base());
	4596	state->membank("bank1")->set_base(machine.root_device().memregion("user1")->base());
4597	4597	}
4598	4598
4599	4599
4600	4600	static DRIVER_INIT( metmqstr )
4601	4601	{
4602	4602	cave_state *state = machine.driver_data<cave_state>();
4603		UINT8 *ROM = machine.region("audiocpu")->base();
	4603	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
4604	4604
4605	4605	init_cave(machine);
4606	4606
4607		memory_configure_bank(machine, "bank1", 0, 0x2, &ROM[0x00000], 0x4000);
4608		memory_configure_bank(machine, "bank1", 2, 0xe, &ROM[0x10000], 0x4000);
	4607	state->membank("bank1")->configure_entries(0, 0x2, &ROM[0x00000], 0x4000);
	4608	state->membank("bank1")->configure_entries(2, 0xe, &ROM[0x10000], 0x4000);
4609	4609
4610		ROM = machine.region("oki1")->base();
4611		memory_configure_bank(machine, "bank3", 0, 8, &ROM[0x00000], 0x20000);
4612		memory_configure_bank(machine, "bank4", 0, 8, &ROM[0x00000], 0x20000);
	4610	ROM = machine.root_device().memregion("oki1")->base();
	4611	state->membank("bank3")->configure_entries(0, 8, &ROM[0x00000], 0x20000);
	4612	state->membank("bank4")->configure_entries(0, 8, &ROM[0x00000], 0x20000);
4613	4613
4614		ROM = machine.region("oki2")->base();
4615		memory_configure_bank(machine, "bank5", 0, 8, &ROM[0x00000], 0x20000);
4616		memory_configure_bank(machine, "bank6", 0, 8, &ROM[0x00000], 0x20000);
	4614	ROM = state->memregion("oki2")->base();
	4615	state->membank("bank5")->configure_entries(0, 8, &ROM[0x00000], 0x20000);
	4616	state->membank("bank6")->configure_entries(0, 8, &ROM[0x00000], 0x20000);
4617	4617
4618	4618	unpack_sprites(machine);
4619	4619	state->m_spritetype[0] = 2;   // Normal sprites with different position handling
r14976	r14977
4625	4625	static DRIVER_INIT( pwrinst2j )
4626	4626	{
4627	4627	cave_state *state = machine.driver_data<cave_state>();
4628		UINT8 *ROM = machine.region("audiocpu")->base();
	4628	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
4629	4629	UINT8 *buffer;
4630		UINT8 *src = machine.region("sprites")->base();
4631		int len = machine.region("sprites")->bytes();
	4630	UINT8 *src = machine.root_device().memregion("sprites")->base();
	4631	int len = state->memregion("sprites")->bytes();
4632	4632	int i, j;
4633	4633
4634	4634	init_cave(machine);
4635	4635
4636		memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x00000], 0x4000);
4637		memory_configure_bank(machine, "bank1", 3, 5, &ROM[0x10000], 0x4000);
	4636	state->membank("bank1")->configure_entries(0, 3, &ROM[0x00000], 0x4000);
	4637	state->membank("bank1")->configure_entries(3, 5, &ROM[0x10000], 0x4000);
4638	4638
4639	4639	buffer = auto_alloc_array(machine, UINT8, len);
4640	4640	{
r14976	r14977
4664	4664
4665	4665	#if 1      //ROM PATCH
4666	4666	{
4667		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	4667	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
4668	4668	rom[0xd46c / 2] = 0xd482;         // kurara dash fix  0xd400 -> 0xd482
4669	4669	}
4670	4670	#endif
r14976	r14977
4674	4674	static DRIVER_INIT( sailormn )
4675	4675	{
4676	4676	cave_state *state = machine.driver_data<cave_state>();
4677		UINT8 *ROM = machine.region("audiocpu")->base();
	4677	UINT8 *ROM = machine.root_device().memregion("audiocpu")->base();
4678	4678	UINT8 *buffer;
4679		UINT8 *src = machine.region("sprites")->base();
4680		int len = machine.region("sprites")->bytes();
	4679	UINT8 *src = machine.root_device().memregion("sprites")->base();
	4680	int len = machine.root_device().memregion("sprites")->bytes();
4681	4681
4682	4682	init_cave(machine);
4683	4683
4684		memory_configure_bank(machine, "bank1", 0, 0x02, &ROM[0x00000], 0x4000);
4685		memory_configure_bank(machine, "bank1", 2, 0x1e, &ROM[0x10000], 0x4000);
	4684	state->membank("bank1")->configure_entries(0, 0x02, &ROM[0x00000], 0x4000);
	4685	state->membank("bank1")->configure_entries(2, 0x1e, &ROM[0x10000], 0x4000);
4686	4686
4687		ROM = machine.region("oki1")->base();
4688		memory_configure_bank(machine, "bank3", 0, 0x10, &ROM[0x00000], 0x20000);
4689		memory_configure_bank(machine, "bank4", 0, 0x10, &ROM[0x00000], 0x20000);
	4687	ROM = machine.root_device().memregion("oki1")->base();
	4688	state->membank("bank3")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
	4689	state->membank("bank4")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
4690	4690
4691		ROM = machine.region("oki2")->base();
4692		memory_configure_bank(machine, "bank5", 0, 0x10, &ROM[0x00000], 0x20000);
4693		memory_configure_bank(machine, "bank6", 0, 0x10, &ROM[0x00000], 0x20000);
	4691	ROM = state->memregion("oki2")->base();
	4692	state->membank("bank5")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
	4693	state->membank("bank6")->configure_entries(0, 0x10, &ROM[0x00000], 0x20000);
4694	4694
4695	4695	/* decrypt sprites */
4696	4696	buffer = auto_alloc_array(machine, UINT8, len);

src/mame/drivers/williams.c

r14976	r14977
534	534	space->install_read_handler     (0xc800, 0xcbff, 0, 0x03e0, read8_delegate(FUNC(williams_state::williams_video_counter_r),state));
535	535	space->install_readwrite_handler(0xcc00, 0xcc03, 0, 0x03e0, read8_delegate(FUNC(pia6821_device::read), pia_1), write8_delegate(FUNC(pia6821_device::write), pia_1));
536	536	space->install_readwrite_handler(0xcc04, 0xcc07, 0, 0x03e0, read8_delegate(FUNC(pia6821_device::read), pia_0), write8_delegate(FUNC(pia6821_device::write), pia_0));
537		memory_set_bankptr(space->machine(), "bank3", space->machine().driver_data<williams_state>()->m_nvram);
538		memory_set_bankptr(space->machine(), "bank4", space->machine().driver_data<williams_state>()->m_generic_paletteram_8);
	537	state->membank("bank3")->set_base(space->machine().driver_data<williams_state>()->m_nvram);
	538	state->membank("bank4")->set_base(space->machine().driver_data<williams_state>()->m_generic_paletteram_8);
539	539	}
540	540
541	541
r14976	r14977
2730	2730	static DRIVER_INIT( defndjeu )
2731	2731	{
2732	2732	williams_state *state = machine.driver_data<williams_state>();
2733		UINT8 *rom = machine.region("maincpu")->base();
	2733	UINT8 *rom = state->memregion("maincpu")->base();
2734	2734	int i;
2735	2735
2736	2736	CONFIGURE_BLITTER(WILLIAMS_BLITTER_NONE, 0x0000);

src/mame/drivers/dec8.c

r14976	r14977
443	443
444	444	WRITE8_MEMBER(dec8_state::dec8_bank_w)
445	445	{
446		memory_set_bank(machine(), "bank1", data & 0x0f);
	446	membank("bank1")->set_entry(data & 0x0f);
447	447	}
448	448
449	449	/* Used by Ghostbusters, Meikyuu Hunter G & Gondomania */
r14976	r14977
457	457	Bits 4-7: Bank switch
458	458	*/
459	459
460		memory_set_bank(machine(), "bank1", data >> 4);
	460	membank("bank1")->set_entry(data >> 4);
461	461
462	462	if ((data&1)==0) device_set_input_line(m_maincpu, M6809_IRQ_LINE, CLEAR_LINE);
463	463	if (data & 2) m_nmi_enable =1; else m_nmi_enable = 0;
r14976	r14977
473	473	Bit 0x40 - Unused.
474	474	Bit 0x80 - Hold subcpu reset line high if clear, else low?  (Not needed anyway)
475	475	*/
476		memory_set_bank(machine(), "bank1", data & 0x0f);
	476	membank("bank1")->set_entry(data & 0x0f);
477	477	}
478	478
479	479	WRITE8_MEMBER(dec8_state::dec8_sound_w)
r14976	r14977
506	506
507	507	WRITE8_MEMBER(dec8_state::csilver_sound_bank_w)
508	508	{
509		memory_set_bank(machine(), "bank3", (data & 0x08) >> 3);
	509	membank("bank3")->set_entry((data & 0x08) >> 3);
510	510	}
511	511
512	512	/******************************************************************************/
r14976	r14977
3548	3548	UINT8 *rom;
3549	3549
3550	3550	/* bits 5 and 6 of the opcodes are swapped */
3551		rom = machine.region("audiocpu")->base();
	3551	rom = state->memregion("audiocpu")->base();
3552	3552	decrypt = auto_alloc_array(machine, UINT8, 0x8000);
3553	3553
3554	3554	space->set_decrypted_region(0x8000, 0xffff, decrypt);
r14976	r14977
3562	3562	/* Below, I set up the correct number of banks depending on the "maincpu" region size */
3563	3563	static DRIVER_INIT( lastmisn )
3564	3564	{
3565		UINT8 *ROM = machine.region("maincpu")->base();
3566		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	3565	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3566	machine.root_device().membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
3567	3567	DRIVER_INIT_CALL( dec8 );
3568	3568	}
3569	3569
3570	3570	static DRIVER_INIT( shackled )
3571	3571	{
3572		UINT8 *ROM = machine.region("maincpu")->base();
3573		memory_configure_bank(machine, "bank1", 0, 14, &ROM[0x10000], 0x4000);
	3572	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3573	machine.root_device().membank("bank1")->configure_entries(0, 14, &ROM[0x10000], 0x4000);
3574	3574	DRIVER_INIT_CALL( dec8 );
3575	3575	}
3576	3576
3577	3577	static DRIVER_INIT( gondo )
3578	3578	{
3579		UINT8 *ROM = machine.region("maincpu")->base();
3580		memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x4000);
	3579	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3580	machine.root_device().membank("bank1")->configure_entries(0, 12, &ROM[0x10000], 0x4000);
3581	3581	DRIVER_INIT_CALL( dec8 );
3582	3582	}
3583	3583
3584	3584	static DRIVER_INIT( garyoret )
3585	3585	{
3586		UINT8 *ROM = machine.region("maincpu")->base();
3587		memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x4000);
	3586	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3587	machine.root_device().membank("bank1")->configure_entries(0, 16, &ROM[0x10000], 0x4000);
3588	3588	DRIVER_INIT_CALL( dec8 );
3589	3589	}
3590	3590
3591	3591	static DRIVER_INIT( ghostb )
3592	3592	{
3593		UINT8 *ROM = machine.region("maincpu")->base();
3594		UINT8 *RAM = machine.region("proms")->base();
	3593	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3594	UINT8 *RAM = machine.root_device().memregion("proms")->base();
3595	3595
3596	3596	/* Blank out unused garbage in colour prom to avoid colour overflow */
3597	3597	memset(RAM + 0x20, 0, 0xe0);
3598	3598
3599		memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x4000);
	3599	machine.root_device().membank("bank1")->configure_entries(0, 16, &ROM[0x10000], 0x4000);
3600	3600	DRIVER_INIT_CALL(deco222);
3601	3601	}
3602	3602
3603	3603	static DRIVER_INIT( meikyuh )
3604	3604	{
3605		UINT8 *ROM = machine.region("maincpu")->base();
3606		UINT8 *RAM = machine.region("proms")->base();
	3605	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3606	UINT8 *RAM = machine.root_device().memregion("proms")->base();
3607	3607
3608	3608	/* Blank out unused garbage in colour prom to avoid colour overflow */
3609	3609	memset(RAM + 0x20, 0, 0xe0);
3610	3610
3611		memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x4000);
	3611	machine.root_device().membank("bank1")->configure_entries(0, 12, &ROM[0x10000], 0x4000);
3612	3612	DRIVER_INIT_CALL( dec8 );
3613	3613	}
3614	3614
3615	3615	static DRIVER_INIT( csilver )
3616	3616	{
3617		UINT8 *ROM = machine.region("maincpu")->base();
3618		UINT8 *RAM = machine.region("audiocpu")->base();
	3617	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3618	UINT8 *RAM = machine.root_device().memregion("audiocpu")->base();
3619	3619
3620		memory_configure_bank(machine, "bank1", 0, 14, &ROM[0x10000], 0x4000);
3621		memory_configure_bank(machine, "bank3", 0, 2, &RAM[0x10000], 0x4000);
	3620	machine.root_device().membank("bank1")->configure_entries(0, 14, &ROM[0x10000], 0x4000);
	3621	machine.root_device().membank("bank3")->configure_entries(0, 2, &RAM[0x10000], 0x4000);
3622	3622	DRIVER_INIT_CALL( dec8 );
3623	3623	}
3624	3624
3625	3625	static DRIVER_INIT( oscar )
3626	3626	{
3627		UINT8 *ROM = machine.region("maincpu")->base();
3628		memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
	3627	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3628	machine.root_device().membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x4000);
3629	3629	DRIVER_INIT_CALL( deco222 );
3630	3630	}
3631	3631
3632	3632	static DRIVER_INIT( srdarwin )
3633	3633	{
3634		UINT8 *ROM = machine.region("maincpu")->base();
3635		memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
	3634	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3635	machine.root_device().membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x4000);
3636	3636	DRIVER_INIT_CALL( deco222 );
3637	3637	}
3638	3638
3639	3639	static DRIVER_INIT( cobracom )
3640	3640	{
3641		UINT8 *ROM = machine.region("maincpu")->base();
3642		memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
	3641	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	3642	machine.root_device().membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
3643	3643	DRIVER_INIT_CALL( dec8 );
3644	3644	}
3645	3645

src/mame/drivers/fuukifg3.c

r14976	r14977
267	267
268	268	WRITE8_MEMBER(fuuki32_state::fuuki32_sound_bw_w)
269	269	{
270		memory_set_bank(machine(), "bank1", data);
	270	membank("bank1")->set_entry(data);
271	271	}
272	272
273	273	READ8_MEMBER(fuuki32_state::snd_z80_r)
r14976	r14977
550	550	static MACHINE_START( fuuki32 )
551	551	{
552	552	fuuki32_state *state = machine.driver_data<fuuki32_state>();
553		UINT8 *ROM = machine.region("soundcpu")->base();
	553	UINT8 *ROM = state->memregion("soundcpu")->base();
554	554
555		memory_configure_bank(machine, "bank1", 0, 0x10, &ROM[0x10000], 0x8000);
	555	state->membank("bank1")->configure_entries(0, 0x10, &ROM[0x10000], 0x8000);
556	556
557	557	state->m_maincpu = machine.device("maincpu");
558	558	state->m_audiocpu = machine.device("soundcpu");

src/mame/drivers/slotcarn.c

r14976	r14977
112	112	UINT16 x = 0;
113	113	int rlen;
114	114
115		gfx[0] = device->machine().region("gfx1")->base();
116		gfx[1] = device->machine().region("gfx2")->base();
117		rlen = device->machine().region("gfx2")->bytes();
	115	gfx[0] = device->machine().root_device().memregion("gfx1")->base();
	116	gfx[1] = device->machine().root_device().memregion("gfx2")->base();
	117	rlen = state->memregion("gfx2")->bytes();
118	118
119	119	//ma = ma ^ 0x7ff;
120	120	for (cx = 0; cx < x_count; cx++)

src/mame/drivers/tbowl.c

r14976	r14977
34	34	WRITE8_MEMBER(tbowl_state::tbowlb_bankswitch_w)
35	35	{
36	36	int bankaddress;
37		UINT8 *RAM = machine().region("maincpu")->base();
	37	UINT8 *RAM = memregion("maincpu")->base();
38	38
39	39
40	40	bankaddress = 0x10000 + ((data & 0xf8) << 8);
41		memory_set_bankptr(machine(), "bank1",&RAM[bankaddress]);
	41	membank("bank1")->set_base(&RAM[bankaddress]);
42	42	}
43	43
44	44	WRITE8_MEMBER(tbowl_state::tbowlc_bankswitch_w)
45	45	{
46	46	int bankaddress;
47		UINT8 *RAM = machine().region("sub")->base();
	47	UINT8 *RAM = memregion("sub")->base();
48	48
49	49
50	50	bankaddress = 0x10000 + ((data & 0xf8) << 8);
51	51
52	52
53		memory_set_bankptr(machine(), "bank2", &RAM[bankaddress]);
	53	membank("bank2")->set_base(&RAM[bankaddress]);
54	54	}
55	55
56	56	/*** Shared Ram Handlers
r14976	r14977
166	166	tbowl_state *state = device->machine().driver_data<tbowl_state>();
167	167	int num = (strcmp(device->tag(), ":msm1") == 0) ? 0 : 1;
168	168	if (state->m_adpcm_pos[num] >= state->m_adpcm_end[num] ||
169		state->m_adpcm_pos[num] >= device->machine().region("adpcm")->bytes()/2)
	169	state->m_adpcm_pos[num] >= state->memregion("adpcm")->bytes()/2)
170	170	msm5205_reset_w(device,1);
171	171	else if (state->m_adpcm_data[num] != -1)
172	172	{
r14976	r14977
175	175	}
176	176	else
177	177	{
178		UINT8 *ROM = device->machine().region("adpcm")->base() + 0x10000 * num;
	178	UINT8 *ROM = device->machine().root_device().memregion("adpcm")->base() + 0x10000 * num;
179	179
180	180	state->m_adpcm_data[num] = ROM[state->m_adpcm_pos[num]++];
181	181	msm5205_data_w(device,state->m_adpcm_data[num] >> 4);

src/mame/drivers/rabbit.c

r14976	r14977
520	520	/* rom bank is used when testing roms, not currently hooked up */
521	521	WRITE32_MEMBER(rabbit_state::rabbit_rombank_w)
522	522	{
523		UINT8 *dataroms = machine().region("gfx1")->base();
	523	UINT8 *dataroms = memregion("gfx1")->base();
524	524	#if 0
525	525	int bank;
526	526	printf("rabbit rombank %08x\n",data);
527	527	bank = data & 0x3ff;
528	528
529		memory_set_bankptr(machine(), "bank1",&dataroms[0x40000*(bank&0x3ff)]);
	529	membank("bank1")->set_base(&dataroms[0x40000*(bank&0x3ff)]);
530	530	#else
531		memory_set_bankptr(machine(), "bank1",&dataroms[0]);
	531	membank("bank1")->set_base(&dataroms[0]);
532	532	#endif
533	533
534	534	}
r14976	r14977
546	546	static void rabbit_do_blit(running_machine &machine)
547	547	{
548	548	rabbit_state *state = machine.driver_data<rabbit_state>();
549		UINT8 *blt_data = machine.region("gfx1")->base();
	549	UINT8 *blt_data = state->memregion("gfx1")->base();
550	550	int blt_source = (state->m_blitterregs[0]&0x000fffff)>>0;
551	551	int blt_column = (state->m_blitterregs[1]&0x00ff0000)>>16;
552	552	int blt_line   = (state->m_blitterregs[1]&0x000000ff);

src/mame/drivers/crimfght.c

r14976	r14977
255	255	static MACHINE_START( crimfght )
256	256	{
257	257	crimfght_state *state = machine.driver_data<crimfght_state>();
258		UINT8 *ROM = machine.region("maincpu")->base();
	258	UINT8 *ROM = state->memregion("maincpu")->base();
259	259
260		memory_configure_bank(machine, "bank2", 0, 12, &ROM[0x10000], 0x2000);
261		memory_set_bank(machine, "bank2", 0);
	260	state->membank("bank2")->configure_entries(0, 12, &ROM[0x10000], 0x2000);
	261	state->membank("bank2")->set_entry(0);
262	262
263	263	state->m_maincpu = machine.device("maincpu");
264	264	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
408	408	{
409	409	device->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x03ff, "bank3");
410	410	device->memory().space(AS_PROGRAM)->install_write_handler(0x0000, 0x03ff, write8_delegate(FUNC(crimfght_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state));
411		memory_set_bankptr(device->machine(), "bank3", state->m_generic_paletteram_8);
	411	state->membank("bank3")->set_base(state->m_generic_paletteram_8);
412	412	}
413	413	else
414	414	device->memory().space(AS_PROGRAM)->install_readwrite_bank(0x0000, 0x03ff, "bank1");                        /* RAM */
r14976	r14977
416	416	/* bit 6 = enable char ROM reading through the video RAM */
417	417	k052109_set_rmrd_line(state->m_k052109, (lines & 0x40) ? ASSERT_LINE : CLEAR_LINE);
418	418
419		memory_set_bank(device->machine(), "bank2", lines & 0x0f);
	419	state->membank("bank2")->set_entry(lines & 0x0f);
420	420	}
421	421
422	422	GAME( 1989, crimfght,  0,        crimfght, crimfght, 0, ROT0, "Konami", "Crime Fighters (US 4 players)", GAME_SUPPORTS_SAVE )

src/mame/drivers/asuka.c

r14976	r14977
249	249
250	250	WRITE8_MEMBER(asuka_state::sound_bankswitch_w)
251	251	{
252		memory_set_bank(machine(), "bank1", data & 0x03);
	252	membank("bank1")->set_entry(data & 0x03);
253	253	}
254	254
255	255	static WRITE8_DEVICE_HANDLER( sound_bankswitch_2151_w )
256	256	{
257		memory_set_bank(device->machine(),  "bank1", data & 0x03);
	257	device->machine().root_device().membank("bank1")->set_entry(data & 0x03);
258	258	}
259	259
260	260
r14976	r14977
270	270	}
271	271	else
272	272	{
273		state->m_adpcm_data = device->machine().region("ymsnd")->base()[state->m_adpcm_pos];
	273	state->m_adpcm_data = device->machine().root_device().memregion("ymsnd")->base()[state->m_adpcm_pos];
274	274	state->m_adpcm_pos = (state->m_adpcm_pos + 1) & 0xffff;
275	275	msm5205_data_w(device, state->m_adpcm_data >> 4);
276	276	}
r14976	r14977
842	842	state->m_tc0100scn = machine.device("tc0100scn");
843	843
844	844	/* configure the banks */
845		memory_configure_bank(machine, "bank1", 0, 1, machine.region("audiocpu")->base(), 0);
846		memory_configure_bank(machine, "bank1", 1, 3, machine.region("audiocpu")->base() + 0x10000, 0x04000);
	845	state->membank("bank1")->configure_entry(0, machine.root_device().memregion("audiocpu")->base());
	846	state->membank("bank1")->configure_entries(1, 3, state->memregion("audiocpu")->base() + 0x10000, 0x04000);
847	847
848	848	state->save_item(NAME(state->m_adpcm_pos));
849	849	state->save_item(NAME(state->m_adpcm_data));

src/mame/drivers/rollerg.c

r14976	r14977
249	249	static MACHINE_START( rollerg )
250	250	{
251	251	rollerg_state *state = machine.driver_data<rollerg_state>();
252		UINT8 *ROM = machine.region("maincpu")->base();
	252	UINT8 *ROM = state->memregion("maincpu")->base();
253	253
254		memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
255		memory_configure_bank(machine, "bank1", 6, 2, &ROM[0x10000], 0x4000);
256		memory_set_bank(machine, "bank1", 0);
	254	state->membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x4000);
	255	state->membank("bank1")->configure_entries(6, 2, &ROM[0x10000], 0x4000);
	256	state->membank("bank1")->set_entry(0);
257	257
258	258	state->m_maincpu = machine.device("maincpu");
259	259	state->m_audiocpu = machine.device("audiocpu");
r14976	r14977
372	372
373	373	static KONAMI_SETLINES_CALLBACK( rollerg_banking )
374	374	{
375		memory_set_bank(device->machine(), "bank1", lines & 0x07);
	375	device->machine().root_device().membank("bank1")->set_entry(lines & 0x07);
376	376	}
377	377
378	378

src/mame/drivers/hvyunit.c

r14976	r14977
216	216
217	217	WRITE8_MEMBER(hvyunit_state::master_bankswitch_w)
218	218	{
219		unsigned char *ROM = machine().region("master")->base();
	219	unsigned char *ROM = memregion("master")->base();
220	220	int bank = data & 7;
221	221	ROM = &ROM[0x4000 * bank];
222		memory_set_bankptr(machine(), "bank1", ROM);
	222	membank("bank1")->set_base(ROM);
223	223	}
224	224
225	225	WRITE8_MEMBER(hvyunit_state::mermaid_data_w)
r14976	r14977
275	275	WRITE8_MEMBER(hvyunit_state::slave_bankswitch_w)
276	276	{
277	277
278		unsigned char *ROM = machine().region("slave")->base();
	278	unsigned char *ROM = memregion("slave")->base();
279	279	int bank = (data & 0x03);
280	280	m_port0_data = data;
281	281	ROM = &ROM[0x4000 * bank];
282	282
283		memory_set_bankptr(machine(), "bank2", ROM);
	283	membank("bank2")->set_base(ROM);
284	284	}
285	285
286	286	WRITE8_MEMBER(hvyunit_state::hu_scrollx_w)
r14976	r14977
308	308
309	309	WRITE8_MEMBER(hvyunit_state::sound_bankswitch_w)
310	310	{
311		unsigned char *ROM = machine().region("soundcpu")->base();
	311	unsigned char *ROM = memregion("soundcpu")->base();
312	312	int bank = data & 0x3;
313	313	ROM = &ROM[0x4000 * bank];
314	314
315		memory_set_bankptr(machine(), "bank3", ROM);
	315	membank("bank3")->set_base(ROM);
316	316	}
317	317
318	318

src/mame/drivers/pirates.c

r14976	r14977
342	342	UINT16 *buf, *rom;
343	343	int i;
344	344
345		rom_size = machine.region("maincpu")->bytes();
	345	rom_size = machine.root_device().memregion("maincpu")->bytes();
346	346
347	347	buf = auto_alloc_array(machine, UINT16, rom_size/2);
348	348
349		rom = (UINT16 *)machine.region("maincpu")->base();
	349	rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
350	350	memcpy (buf, rom, rom_size);
351	351
352	352	for (i=0; i<rom_size/2; i++)
r14976	r14977
371	371	UINT8 *buf, *rom;
372	372	int i;
373	373
374		rom_size = machine.region("gfx1")->bytes();
	374	rom_size = machine.root_device().memregion("gfx1")->bytes();
375	375
376	376	buf = auto_alloc_array(machine, UINT8, rom_size);
377	377
378		rom = machine.region("gfx1")->base();
	378	rom = machine.root_device().memregion("gfx1")->base();
379	379	memcpy (buf, rom, rom_size);
380	380
381	381	for (i=0; i<rom_size/4; i++)
r14976	r14977
395	395	UINT8 *buf, *rom;
396	396	int i;
397	397
398		rom_size = machine.region("gfx2")->bytes();
	398	rom_size = machine.root_device().memregion("gfx2")->bytes();
399	399
400	400	buf = auto_alloc_array(machine, UINT8, rom_size);
401	401
402		rom = machine.region("gfx2")->base();
	402	rom = machine.root_device().memregion("gfx2")->base();
403	403	memcpy (buf, rom, rom_size);
404	404
405	405	for (i=0; i<rom_size/4; i++)
r14976	r14977
420	420	UINT8 *buf, *rom;
421	421	int i;
422	422
423		rom_size = machine.region("oki")->bytes();
	423	rom_size = machine.root_device().memregion("oki")->bytes();
424	424
425	425	buf = auto_alloc_array(machine, UINT8, rom_size);
426	426
427		rom = machine.region("oki")->base();
	427	rom = machine.root_device().memregion("oki")->base();
428	428	memcpy (buf, rom, rom_size);
429	429
430	430	for (i=0; i<rom_size; i++)
r14976	r14977
438	438
439	439	static DRIVER_INIT( pirates )
440	440	{
441		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	441	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
442	442
443	443	pirates_decrypt_68k(machine);
444	444	pirates_decrypt_p(machine);

src/mame/drivers/royalmah.c

r14976	r14977
196	196	static PALETTE_INIT( royalmah )
197	197	{
198	198	offs_t i;
199		const UINT8 *prom = machine.region("proms")->base();
200		int len = machine.region("proms")->bytes();
	199	const UINT8 *prom = machine.root_device().memregion("proms")->base();
	200	int len = machine.root_device().memregion("proms")->bytes();
201	201
202	202	for (i = 0; i < len; i++)
203	203	{
r14976	r14977
231	231	static PALETTE_INIT( mjderngr )
232	232	{
233	233	offs_t i;
234		const UINT8 *prom = machine.region("proms")->base();
235		int len = machine.region("proms")->bytes();
	234	const UINT8 *prom = machine.root_device().memregion("proms")->base();
	235	int len = machine.root_device().memregion("proms")->bytes();
236	236
237	237	for (i = 0; i < len / 2; i++)
238	238	{
r14976	r14977
386	386
387	387	WRITE8_MEMBER(royalmah_state::suzume_bank_w)
388	388	{
389		UINT8 *rom = machine().region("maincpu")->base();
	389	UINT8 *rom = memregion("maincpu")->base();
390	390	int address;
391	391
392	392	m_suzume_bank = data;
r14976	r14977
396	396	/* bits 6, 4 and 3 used for something input related? */
397	397
398	398	address = 0x10000 + (data & 0x07) * 0x8000;
399		memory_set_bankptr(machine(), "bank1",&rom[address]);
	399	membank("bank1")->set_base(&rom[address]);
400	400	}
401	401
402	402
403	403	WRITE8_MEMBER(royalmah_state::mjapinky_bank_w)
404	404	{
405		UINT8 *ROM = machine().region("maincpu")->base();
	405	UINT8 *ROM = memregion("maincpu")->base();
406	406	m_rombank = data;
407		memory_set_bankptr(machine(), "bank1",ROM + 0x10000 + 0x8000 * data);
	407	membank("bank1")->set_base(ROM + 0x10000 + 0x8000 * data);
408	408	}
409	409
410	410	WRITE8_MEMBER(royalmah_state::mjapinky_palbank_w)
r14976	r14977
418	418	READ8_MEMBER(royalmah_state::mjapinky_dsw_r)
419	419	{
420	420	if (m_rombank == 0x0e)   return input_port_read(machine(), "DSW3");
421		else               return *(machine().region("maincpu")->base() + 0x10000 + 0x8000 * m_rombank);
	421	else               return *(machine().root_device().memregion("maincpu")->base() + 0x10000 + 0x8000 * m_rombank);
422	422	}
423	423
424	424	WRITE8_MEMBER(royalmah_state::tontonb_bank_w)
425	425	{
426		UINT8 *rom = machine().region("maincpu")->base();
	426	UINT8 *rom = memregion("maincpu")->base();
427	427	int address;
428	428
429	429	logerror("%04x: bank %02x\n",cpu_get_pc(&space.device()),data);
r14976	r14977
434	434
435	435	address = 0x10000 + data * 0x8000;
436	436
437		memory_set_bankptr(machine(), "bank1",&rom[address]);
	437	membank("bank1")->set_base(&rom[address]);
438	438	}
439	439
440	440
441	441	/* bits 5 and 6 seem to affect which Dip Switch to read in 'majs101b' */
442	442	WRITE8_MEMBER(royalmah_state::dynax_bank_w)
443	443	{
444		UINT8 *rom = machine().region("maincpu")->base();
	444	UINT8 *rom = memregion("maincpu")->base();
445	445	int address;
446	446
447	447	//logerror("%04x: bank %02x\n",cpu_get_pc(&space.device()),data);
r14976	r14977
452	452
453	453	address = 0x10000 + data * 0x8000;
454	454
455		memory_set_bankptr(machine(), "bank1",&rom[address]);
	455	membank("bank1")->set_base(&rom[address]);
456	456	}
457	457
458	458	READ8_MEMBER(royalmah_state::daisyari_dsw_r)
r14976	r14977
470	470
471	471	WRITE8_MEMBER(royalmah_state::daisyari_bank_w)
472	472	{
473		UINT8 *rom = machine().region("maincpu")->base();
	473	UINT8 *rom = memregion("maincpu")->base();
474	474	int address;
475	475
476	476	m_dsw_select = (data & 0xc);
r14976	r14977
478	478	address = 0x10000 + ((data & 0x30)>>4) * 0x10000 + (data & 0x1) * 0x8000;
479	479	//  printf("%08x %02x\n",address,data);
480	480
481		memory_set_bankptr(machine(), "bank1",&rom[address]);
	481	membank("bank1")->set_base(&rom[address]);
482	482
483	483	/* bit 1 used too but unknown purpose. */
484	484	}
r14976	r14977
498	498
499	499	WRITE8_MEMBER(royalmah_state::mjclub_bank_w)
500	500	{
501		UINT8 *rom = machine().region("maincpu")->base();
	501	UINT8 *rom = memregion("maincpu")->base();
502	502	int address;
503	503
504	504	m_dsw_select = data & 0xc0;
r14976	r14977
508	508	address = 0x10000 + data * 0x8000;
509	509	//  printf("%08x\n",address);
510	510
511		memory_set_bankptr(machine(), "bank1",&rom[address]);
	511	membank("bank1")->set_base(&rom[address]);
512	512
513	513	/* bit 5 used too but unknown purpose. */
514	514	}
r14976	r14977
727	727
728	728	READ8_MEMBER(royalmah_state::jansou_6403_r)
729	729	{
730		UINT8 *GFXROM = machine().region("gfx1")->base();
	730	UINT8 *GFXROM = memregion("gfx1")->base();
731	731	int d0 = GFXROM[m_gfx_adr];
732	732	int d1 = GFXROM[m_gfx_adr+1];
733	733	int c0 = m_jansou_colortable[d1 & 0x0f] & 0x0f;
r14976	r14977
828	828
829	829	WRITE8_MEMBER(royalmah_state::janptr96_rombank_w)
830	830	{
831		UINT8 *ROM = machine().region("maincpu")->base();
832		memory_set_bankptr(machine(), "bank1",ROM + 0x10000 + 0x8000 * data);
	831	UINT8 *ROM = memregion("maincpu")->base();
	832	membank("bank1")->set_base(ROM + 0x10000 + 0x8000 * data);
833	833	}
834	834
835	835	WRITE8_MEMBER(royalmah_state::janptr96_rambank_w)
836	836	{
837		memory_set_bankptr(machine(), "bank2", m_janptr96_nvram + 0x1000 + 0x1000 * data);
	837	membank("bank2")->set_base(m_janptr96_nvram + 0x1000 + 0x1000 * data);
838	838	}
839	839
840	840	READ8_MEMBER(royalmah_state::janptr96_unknown_r)
r14976	r14977
880	880	READ8_MEMBER(royalmah_state::mjifb_rom_io_r)
881	881	{
882	882	if (m_mjifb_rom_enable)
883		return ((UINT8*)(machine().region("maincpu")->base() + 0x10000 + m_rombank * 0x4000))[offset];
	883	return ((UINT8*)(machine().root_device().memregion("maincpu")->base() + 0x10000 + m_rombank * 0x4000))[offset];
884	884
885	885	offset += 0x8000;
886	886
r14976	r14977
989	989	READ8_MEMBER(royalmah_state::mjdejavu_rom_io_r)
990	990	{
991	991	if (m_mjifb_rom_enable)
992		return ((UINT8*)(machine().region("maincpu")->base() + 0x10000 + m_rombank * 0x4000))[offset];
	992	return ((UINT8*)(machine().root_device().memregion("maincpu")->base() + 0x10000 + m_rombank * 0x4000))[offset];
993	993
994	994	offset += 0x8000;
995	995
r14976	r14977
1050	1050	static void mjtensin_update_rombank(running_machine &machine)
1051	1051	{
1052	1052	royalmah_state *state = machine.driver_data<royalmah_state>();
1053		memory_set_bankptr(machine,  "bank1", machine.region("maincpu")->base() + 0x10000 + state->m_rombank * 0x8000 );
	1053	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x10000 + state->m_rombank * 0x8000 );
1054	1054	}
1055	1055	WRITE8_MEMBER(royalmah_state::mjtensin_p4_w)
1056	1056	{
r14976	r14977
1092	1092	static void cafetime_update_rombank(running_machine &machine)
1093	1093	{
1094	1094	royalmah_state *state = machine.driver_data<royalmah_state>();
1095		memory_set_bankptr(machine,  "bank1", machine.region("maincpu")->base() + 0x10000 + state->m_rombank * 0x8000 );
	1095	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x10000 + state->m_rombank * 0x8000 );
1096	1096	}
1097	1097	WRITE8_MEMBER(royalmah_state::cafetime_p4_w)
1098	1098	{
r14976	r14977
1177	1177	READ8_MEMBER(royalmah_state::mjvegasa_rom_io_r)
1178	1178	{
1179	1179	if ((m_rombank & 0x70) != 0x70)
1180		return machine().region("maincpu")->base()[0x10000 + m_rombank * 0x8000 + offset];
	1180	return memregion("maincpu")->base()[0x10000 + m_rombank * 0x8000 + offset];
1181	1181
1182	1182	offset += 0x8000;
1183	1183
r14976	r14977
4710	4710	ROM_END
4711	4711
4712	4712
4713		static DRIVER_INIT( ippatsu )   {   memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x8000 );   }
	4713	static DRIVER_INIT( ippatsu )   {   machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x8000 );   }
4714	4714
4715	4715	static DRIVER_INIT( janptr96 )
4716	4716	{
4717	4717	royalmah_state *state = machine.driver_data<royalmah_state>();
4718	4718	state->m_janptr96_nvram = auto_alloc_array(machine, UINT8, 0x1000 * 9);
4719		memory_set_bankptr(machine, "bank3", state->m_janptr96_nvram);
	4719	state->membank("bank3")->set_base(state->m_janptr96_nvram);
4720	4720	machine.device<nvram_device>("nvram")->set_base(state->m_janptr96_nvram, 0x1000 * 9);
4721	4721	}
4722	4722

src/mame/drivers/crospang.c

r14976	r14977
562	562
563	563	static void tumblepb_gfx1_rearrange(running_machine &machine)
564	564	{
565		UINT8 *rom = machine.region("gfx1")->base();
566		int len = machine.region("gfx1")->bytes();
	565	UINT8 *rom = machine.root_device().memregion("gfx1")->base();
	566	int len = machine.root_device().memregion("gfx1")->bytes();
567	567	int i;
568	568
569	569	/* gfx data is in the wrong order */

src/mame/drivers/darkmist.c

r14976	r14977
32	32	WRITE8_MEMBER(darkmist_state::darkmist_hw_w)
33	33	{
34	34	m_hw=data;
35		memory_set_bankptr(machine(), "bank1",&machine().region("maincpu")->base()[0x010000+((data&0x80)?0x4000:0)]);
	35	membank("bank1")->set_base(&machine().root_device().memregion("maincpu")->base()[0x010000+((data&0x80)?0x4000:0)]);
36	36	}
37	37
38	38	static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, darkmist_state )
r14976	r14977
320	320	int size;
321	321	int i;
322	322
323		rom = machine.region("gfx1")->base();
324		size = machine.region("gfx1")->bytes();
	323	rom = machine.root_device().memregion("gfx1")->base();
	324	size = machine.root_device().memregion("gfx1")->bytes();
325	325
326	326	/* data lines */
327	327	for (i = 0;i < size/2;i++)
r14976	r14977
343	343	}
344	344
345	345
346		rom = machine.region("gfx2")->base();
347		size = machine.region("gfx2")->bytes();
	346	rom = machine.root_device().memregion("gfx2")->base();
	347	size = machine.root_device().memregion("gfx2")->bytes();
348	348
349	349	/* data lines */
350	350	for (i = 0;i < size/2;i++)
r14976	r14977
366	366	}
367	367
368	368
369		rom = machine.region("gfx3")->base();
370		size = machine.region("gfx3")->bytes();
	369	rom = machine.root_device().memregion("gfx3")->base();
	370	size = machine.root_device().memregion("gfx3")->bytes();
371	371
372	372	/* data lines */
373	373	for (i = 0;i < size/2;i++)
r14976	r14977
394	394	static void decrypt_snd(running_machine &machine)
395	395	{
396	396	int i;
397		UINT8 *ROM = machine.region("t5182")->base();
	397	UINT8 *ROM = machine.root_device().memregion("t5182")->base();
398	398
399	399	for(i=0x8000;i<0x10000;i++)
400	400	ROM[i] = BITSWAP8(ROM[i], 7,1,2,3,4,5,6,0);
r14976	r14977
404	404	{
405	405	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
406	406	int i, len;
407		UINT8 *ROM = machine.region("maincpu")->base();
	407	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
408	408	UINT8 *buffer = auto_alloc_array(machine, UINT8, 0x10000);
409	409	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
410	410
r14976	r14977
437	437	}
438	438
439	439	space->set_decrypted_region(0x0000, 0x7fff, decrypt);
440		memory_set_bankptr(space->machine(), "bank1",&ROM[0x010000]);
	440	space->machine().root_device().membank("bank1")->set_base(&ROM[0x010000]);
441	441
442	442	/* adr line swaps */
443		ROM = machine.region("user1")->base();
444		len = machine.region("user1")->bytes();
	443	ROM = machine.root_device().memregion("user1")->base();
	444	len = machine.root_device().memregion("user1")->bytes();
445	445	memcpy( buffer, ROM, len );
446	446
447	447	for(i=0;i<len;i++)
r14976	r14977
449	449	ROM[i]=buffer[BITSWAP24(i,23,22,21,20,19,18,17,16,15,6,5,4,3,2,14,13,12,11,8,7,1,0,10,9)];
450	450	}
451	451
452		ROM = machine.region("user2")->base();
453		len = machine.region("user2")->bytes();
	452	ROM = machine.root_device().memregion("user2")->base();
	453	len = machine.root_device().memregion("user2")->bytes();
454	454	memcpy( buffer, ROM, len );
455	455	for(i=0;i<len;i++)
456	456	{
457	457	ROM[i]=buffer[BITSWAP24(i,23,22,21,20,19,18,17,16,15,6,5,4,3,2,14,13,12,11,8,7,1,0,10,9)];
458	458	}
459	459
460		ROM = machine.region("user3")->base();
461		len = machine.region("user3")->bytes();
	460	ROM = machine.root_device().memregion("user3")->base();
	461	len = machine.root_device().memregion("user3")->bytes();
462	462	memcpy( buffer, ROM, len );
463	463	for(i=0;i<len;i++)
464	464	{
465	465	ROM[i]=buffer[BITSWAP24(i,23,22,21,20,19,18,17,16,15,14 ,5,4,3,2,11,10,9,8,13,12,1,0,7,6)];
466	466	}
467	467
468		ROM = machine.region("user4")->base();
469		len = machine.region("user4")->bytes();
	468	ROM = machine.root_device().memregion("user4")->base();
	469	len = machine.root_device().memregion("user4")->bytes();
470	470	memcpy( buffer, ROM, len );
471	471	for(i=0;i<len;i++)
472	472	{

src/mame/drivers/mquake.c

r14976	r14977
35	35	static WRITE8_DEVICE_HANDLER( mquake_cia_0_porta_w )
36	36	{
37	37	/* switch banks as appropriate */
38		memory_set_bank(device->machine(), "bank1", data & 1);
	38	device->machine().root_device().membank("bank1")->set_entry(data & 1);
39	39
40	40	/* swap the write handlers between ROM and bank 1 based on the bit */
41	41	if ((data & 1) == 0)
r14976	r14977
87	87
88	88	static READ8_HANDLER( es5503_sample_r )
89	89	{
90		UINT8 *rom = space->machine().region("es5503")->base();
	90	UINT8 *rom = space->machine().root_device().memregion("es5503")->base();
91	91	es5503_device *es5503 = space->machine().device<es5503_device>("es5503");
92	92
93	93	return rom[offset + (es5503->get_channel_strobe() * 0x10000)];
r14976	r14977
444	444	amiga_machine_config(machine, &mquake_intf);
445	445
446	446	/* set up memory */
447		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
448		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	447	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	448	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
449	449	}
450	450
451	451

src/mame/drivers/funybubl.c

r14976	r14977
56	56
57	57	WRITE8_MEMBER(funybubl_state::funybubl_vidram_bank_w)
58	58	{
59		memory_set_bank(machine(), "bank1", data & 1);
	59	membank("bank1")->set_entry(data & 1);
60	60	}
61	61
62	62	WRITE8_MEMBER(funybubl_state::funybubl_cpurombank_w)
63	63	{
64		memory_set_bank(machine(), "bank2", data & 0x3f);   // should we add a check that (data&0x3f) < #banks?
	64	membank("bank2")->set_entry(data & 0x3f);   // should we add a check that (data&0x3f) < #banks?
65	65	}
66	66
67	67
r14976	r14977
202	202	static MACHINE_START( funybubl )
203	203	{
204	204	funybubl_state *state = machine.driver_data<funybubl_state>();
205		UINT8 *ROM = machine.region("maincpu")->base();
	205	UINT8 *ROM = state->memregion("maincpu")->base();
206	206
207	207	state->m_audiocpu = machine.device("audiocpu");
208	208
209	209	state->save_item(NAME(state->m_banked_vram));
210	210
211		memory_configure_bank(machine, "bank1", 0, 2, &state->m_banked_vram[0x0000], 0x1000);
212		memory_configure_bank(machine, "bank2", 0, 0x10, &ROM[0x10000], 0x4000);
	211	state->membank("bank1")->configure_entries(0, 2, &state->m_banked_vram[0x0000], 0x1000);
	212	state->membank("bank2")->configure_entries(0, 0x10, &ROM[0x10000], 0x4000);
213	213
214		memory_set_bank(machine, "bank1", 0);
	214	state->membank("bank1")->set_entry(0);
215	215	}
216	216
217	217

src/mame/drivers/nmk16.c

r14976	r14977
214	214
215	215	WRITE8_MEMBER(nmk16_state::ssmissin_soundbank_w)
216	216	{
217		UINT8 *rom = machine().region("oki1")->base();
	217	UINT8 *rom = memregion("oki1")->base();
218	218	int bank;
219	219
220	220	bank = data & 0x3;
r14976	r14977
275	275
276	276	WRITE8_MEMBER(nmk16_state::macross2_sound_bank_w)
277	277	{
278		UINT8 *rom = machine().region("audiocpu")->base() + 0x10000;
	278	UINT8 *rom = memregion("audiocpu")->base() + 0x10000;
279	279
280		memory_set_bankptr(machine(), "bank1",rom + (data & 0x07) * 0x4000);
	280	membank("bank1")->set_base(rom + (data & 0x07) * 0x4000);
281	281	}
282	282
283	283	WRITE8_MEMBER(nmk16_state::tharrier_oki6295_bankswitch_0_w)
284	284	{
285		UINT8 *rom = machine().region("oki1")->base();
	285	UINT8 *rom = memregion("oki1")->base();
286	286
287	287	data &= 3;
288	288	if (data != 3)
r14976	r14977
291	291
292	292	WRITE8_MEMBER(nmk16_state::tharrier_oki6295_bankswitch_1_w)
293	293	{
294		UINT8 *rom = machine().region("oki2")->base();
	294	UINT8 *rom = memregion("oki2")->base();
295	295
296	296	data &= 3;
297	297	if (data != 3)
r14976	r14977
1067	1067
1068	1068	WRITE8_MEMBER(nmk16_state::raphero_sound_rombank_w)
1069	1069	{
1070		memory_set_bankptr(machine(), "bank1",machine().region("audiocpu")->base() + 0x10000 + (data & 0x07) * 0x4000);
	1070	membank("bank1")->set_base(machine().root_device().memregion("audiocpu")->base() + 0x10000 + (data & 0x07) * 0x4000);
1071	1071	}
1072	1072
1073	1073	static ADDRESS_MAP_START( raphero_sound_mem_map, AS_PROGRAM, 8, nmk16_state )
r14976	r14977
4406	4406
4407	4407
4408	4408	/* background */
4409		rom = machine.region("gfx2")->base();
4410		len = machine.region("gfx2")->bytes();
	4409	rom = machine.root_device().memregion("gfx2")->base();
	4410	len = machine.root_device().memregion("gfx2")->bytes();
4411	4411	for (A = 0;A < len;A++)
4412	4412	{
4413	4413	rom[A] = decode_byte( rom[A], decode_data_bg[bjtwin_address_map_bg0(A)]);
4414	4414	}
4415	4415
4416	4416	/* sprites */
4417		rom = machine.region("gfx3")->base();
4418		len = machine.region("gfx3")->bytes();
	4417	rom = machine.root_device().memregion("gfx3")->base();
	4418	len = machine.root_device().memregion("gfx3")->bytes();
4419	4419	for (A = 0;A < len;A += 2)
4420	4420	{
4421	4421	UINT16 tmp = decode_word( rom[A+1]*256 + rom[A], decode_data_sprite[bjtwin_address_map_sprites(A)]);
r14976	r14977
4444	4444	{0x7,0x6,0x5,0x3,0x4,0x2,0x1,0x0},
4445	4445	};
4446	4446
4447		rom = machine.region("maincpu")->base();
4448		len = machine.region("maincpu")->bytes();
	4447	rom = machine.root_device().memregion("maincpu")->base();
	4448	len = machine.root_device().memregion("maincpu")->bytes();
4449	4449	for (A = 0;A < len;A += 2)
4450	4450	{
4451	4451	int h = A+NATIVE_ENDIAN_VALUE_LE_BE(1,0), l = A+NATIVE_ENDIAN_VALUE_LE_BE(0,1);
r14976	r14977
4454	4454	rom[l] = tmp & 0xff;
4455	4455	}
4456	4456
4457		rom = machine.region("gfx2")->base();
4458		len = machine.region("gfx2")->bytes();
	4457	rom = machine.root_device().memregion("gfx2")->base();
	4458	len = machine.root_device().memregion("gfx2")->bytes();
4459	4459	for (A = 0;A < len;A++)
4460	4460	{
4461	4461	rom[A] = decode_byte( rom[A], decode_data_tdragonbgfx[0]);
4462	4462	}
4463	4463
4464		rom = machine.region("gfx3")->base();
4465		len = machine.region("gfx3")->bytes();
	4464	rom = machine.root_device().memregion("gfx3")->base();
	4465	len = machine.root_device().memregion("gfx3")->bytes();
4466	4466	for (A = 0;A < len;A++)
4467	4467	{
4468	4468	rom[A] = decode_byte( rom[A], decode_data_tdragonbgfx[0]);
r14976	r14977
4481	4481	{0x7,0x6,0x5,0x3,0x4,0x2,0x1,0x0},
4482	4482	};
4483	4483
4484		rom = machine.region("gfx2")->base();
4485		len = machine.region("gfx2")->bytes();
	4484	rom = machine.root_device().memregion("gfx2")->base();
	4485	len = machine.root_device().memregion("gfx2")->bytes();
4486	4486	for (A = 0;A < len;A++)
4487	4487	{
4488	4488	rom[A] = decode_byte( rom[A], decode_data_tdragonbgfx[0]);
4489	4489	}
4490	4490
4491		rom = machine.region("gfx3")->base();
4492		len = machine.region("gfx3")->bytes();
	4491	rom = machine.root_device().memregion("gfx3")->base();
	4492	len = machine.root_device().memregion("gfx3")->bytes();
4493	4493	for (A = 0;A < len;A++)
4494	4494	{
4495	4495	rom[A] = decode_byte( rom[A], decode_data_tdragonbgfx[0]);
r14976	r14977
4504	4504
4505	4505	static DRIVER_INIT( hachamf )
4506	4506	{
4507		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	4507	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
4508	4508
4509	4509	//rom[0x0006/2] = 0x7dc2;   /* replace reset vector with the "real" one */
4510	4510
r14976	r14977
4515	4515
4516	4516	static DRIVER_INIT( tdragonb )
4517	4517	{
4518		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	4518	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
4519	4519
4520	4520	decode_tdragonb(machine);
4521	4521
r14976	r14977
4526	4526
4527	4527	static DRIVER_INIT( tdragon )
4528	4528	{
4529		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	4529	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
4530	4530
4531	4531	//rom[0x94b0/2] = 0; /* Patch out JMP to shared memory (protection) */
4532	4532	//rom[0x94b2/2] = 0x92f4;
r14976	r14977
4560	4560	*  008F7E: 207C 000F 9000           movea.l #$f9000, A0
4561	4561	*/
4562	4562	#if 0
4563		UINT16 *rom = (UINT16 *)machine.region("maincpu")->base();
	4563	UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
4564	4564	rom[0x09172/2] = 0x6006;    /* patch checksum error */
4565	4565	rom[0x08f74/2] = 0x4e71;
4566	4566	#endif
r14976	r14977
4974	4974	int a11, int a10, int a9, int a8, int a7, int a6, int a5, int a4, int a3, int a2, int a1, int a0 )
4975	4975	{
4976	4976	int i;
4977		UINT8 *RAM = machine.region( "maincpu" )->base();
4978		size_t  size = machine.region( "maincpu" )->bytes();
	4977	UINT8 *RAM = machine.root_device().memregion( "maincpu" )->base();
	4978	size_t  size = machine.root_device().memregion( "maincpu" )->bytes();
4979	4979	UINT8 *buffer = auto_alloc_array(machine, UINT8,  size );
4980	4980
4981	4981	memcpy( buffer, RAM, size );

src/mame/drivers/miniboy7.c

r14976	r14977
219	219
220	220	static PALETTE_INIT( miniboy7 )
221	221	{
222		const UINT8 *color_prom = machine.region("proms")->base();
	222	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
223	223	/*  FIXME... Can't get the correct palette.
224	224	sometimes RGB bits are inverted, disregarding the 4th bit.
225	225

src/emu/debug/debugcpu.c

r14976	r14977
1285	1285
1286	1286	static UINT64 expression_read_memory_region(running_machine &machine, const char *rgntag, offs_t address, int size)
1287	1287	{
1288		const memory_region *region = machine.region(rgntag);
	1288	memory_region *region = machine.root_device().memregion(rgntag);
1289	1289	UINT64 result = ~(UINT64)0 >> (64 - 8*size);
1290	1290
1291	1291	/* make sure we get a valid base before proceeding */
r14976	r14977
1462	1462	static void expression_write_memory_region(running_machine &machine, const char *rgntag, offs_t address, int size, UINT64 data)
1463	1463	{
1464	1464	debugcpu_private *global = machine.debugcpu_data;
1465		const memory_region *region = machine.region(rgntag);
	1465	memory_region *region = machine.root_device().memregion(rgntag);
1466	1466
1467	1467	/* make sure we get a valid base before proceeding */
1468	1468	if (region != NULL)
r14976	r14977
1571	1571	case EXPSPACE_REGION:
1572	1572	if (name == NULL)
1573	1573	return expression_error::MISSING_MEMORY_NAME;
1574		if (machine.region(name)->base() == NULL)
	1574	if (machine.root_device().memregion(name)->base() == NULL)
1575	1575	return expression_error::INVALID_MEMORY_NAME;
1576	1576	break;
1577	1577

src/emu/debug/dvmemory.c

r14976	r14977
84	84	{
85	85	}
86	86
87		debug_view_memory_source::debug_view_memory_source(const char *name, const memory_region &region)
	87	debug_view_memory_source::debug_view_memory_source(const char *name, memory_region &region)
88	88	: debug_view_source(name),
89	89	m_space(NULL),
90	90	m_memintf(NULL),
r14976	r14977
165	165	}
166	166
167	167	// then add all the memory regions
168		for (const memory_region *region = machine().first_region(); region != NULL; region = region->next())
	168	for (memory_region *region = machine().memory().first_region(); region != NULL; region = region->next())
169	169	{
170	170	name.printf("Region '%s'", region->name());
171	171	m_source_list.append(*auto_alloc(machine(), debug_view_memory_source(name, *region)));
r14976	r14977
707	707
708	708	// hack for FD1094 editing
709	709	#ifdef FD1094_HACK
710		if (source.m_base == machine().region("user2"))
	710	if (source.m_base == machine().root_device().memregion("user2"))
711	711	{
712	712	extern void fd1094_regenerate_key(running_machine &machine);
713	713	fd1094_regenerate_key(machine());

src/emu/debug/dvmemory.h

r14976	r14977
53	53	friend class debug_view_memory;
54	54
55	55	debug_view_memory_source(const char *name, address_space &space);
56		debug_view_memory_source(const char *name, const memory_region &region);
	56	debug_view_memory_source(const char *name, memory_region &region);
57	57	debug_view_memory_source(const char *name, void *base, int element_size, int num_elements);
58	58
59	59	public:

src/emu/cpu/cubeqcpu/cubeqcpu.c

r14976	r14977
279	279	memset(cpustate, 0, sizeof(*cpustate));
280	280
281	281	cpustate->dac_w = _config->dac_w;
282		cpustate->sound_data = (UINT16*)device->machine().region(_config->sound_data_region)->base();
	282	cpustate->sound_data = (UINT16*)device->machine().root_device().memregion(_config->sound_data_region)->base();
283	283
284	284	cpustate->device = device;
285	285	cpustate->program = device->space(AS_PROGRAM);

src/emu/cpu/esrip/esrip.c

r14976	r14977
256	256	/* Register configuration structure callbacks */
257	257	cpustate->fdt_r = _config->fdt_r;
258	258	cpustate->fdt_w = _config->fdt_w;
259		cpustate->lbrm = (UINT8*)device->machine().region(_config->lbrm_prom)->base();
	259	cpustate->lbrm = (UINT8*)device->machine().root_device().memregion(_config->lbrm_prom)->base();
260	260	cpustate->status_in = _config->status_in;
261	261	cpustate->draw = _config->draw;
262	262

src/emu/cpu/mb86233/mb86233.c

r14976	r14977
119	119	{
120	120	cpustate->fifo_read_cb = _config->fifo_read_cb;
121	121	cpustate->fifo_write_cb = _config->fifo_write_cb;
122		cpustate->Tables = (UINT32*) device->machine().region(_config->tablergn)->base();
	122	cpustate->Tables = (UINT32*) device->machine().root_device().memregion(_config->tablergn)->base();
123	123	}
124	124
125	125	cpustate->RAM = auto_alloc_array(device->machine(), UINT32, 2 * 0x200);      /* 2x 2KB */

src/emu/video/pc_cga.c

r14976	r14977
292	292	memset(&cga, 0, sizeof(cga));
293	293	cga.update_row = NULL;
294	294
295		cga.chr_gen = machine.region( "gfx1" )->base() + 0x1000;
	295	cga.chr_gen = machine.root_device().memregion( "gfx1" )->base() + 0x1000;
296	296
297	297	state_save_register_item(machine, "pccga", NULL, 0, cga.mode_control);
298	298	state_save_register_item(machine, "pccga", NULL, 0, cga.color_select);
r14976	r14977
340	340	cga.videoram = auto_alloc_array(machine, UINT8, 0x4000);
341	341	cga.is_superimpose = 0;
342	342
343		memory_set_bankptr(machine,"bank11", cga.videoram);
	343	machine.root_device().membank("bank11")->set_base(cga.videoram);
344	344	}
345	345
346	346
r14976	r14977
381	381	cga.videoram = auto_alloc_array(machine, UINT8, 0x8000);
382	382	cga.is_superimpose = 0;
383	383
384		memory_set_bankptr(machine,"bank11", cga.videoram);
	384	machine.root_device().membank("bank11")->set_base(cga.videoram);
385	385	}
386	386
387	387	SCREEN_UPDATE_RGB32( mc6845_cga )
388	388	{
389		UINT8 *gfx = screen.machine().region("gfx1")->base();
	389	UINT8 *gfx = screen.machine().root_device().memregion("gfx1")->base();
390	390	mc6845_device *mc6845 = screen.machine().device<mc6845_device>(CGA_MC6845_NAME);
391	391	mc6845->screen_update( screen, bitmap, cliprect);
392	392
r14976	r14977
407	407	static VIDEO_START( cga_poisk2 )
408	408	{
409	409	VIDEO_START_CALL(pc_cga);
410		cga.chr_gen = machine.region( "gfx1" )->base() + 0x0000;
	410	cga.chr_gen = machine.root_device().memregion( "gfx1" )->base() + 0x0000;
411	411	}
412	412
413	413	static SCREEN_UPDATE_RGB32( cga_poisk2 )
414	414	{
415		UINT8 *gfx = screen.machine().region("gfx1")->base();
	415	UINT8 *gfx = screen.machine().root_device().memregion("gfx1")->base();
416	416	mc6845_device *mc6845 = screen.machine().device<mc6845_device>(CGA_MC6845_NAME);
417	417	mc6845->screen_update( screen, bitmap, cliprect);
418	418
r14976	r14977
1103	1103
1104	1104	static WRITE8_HANDLER ( char_ram_w )
1105	1105	{
1106		UINT8 *gfx = space->machine().region("gfx1")->base();
	1106	UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base();
1107	1107	logerror("write char ram %04x %02x\n",offset,data);
1108	1108	gfx[offset + 0x0000] = data;
1109	1109	gfx[offset + 0x0800] = data;
r14976	r14977
1116	1116
1117	1117	static READ8_HANDLER ( char_ram_r )
1118	1118	{
1119		UINT8 *gfx = space->machine().region("gfx1")->base();
	1119	UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base();
1120	1120	return gfx[offset];
1121	1121	}
1122	1122
r14976	r14977
1485	1485	}
1486	1486	else
1487	1487	{
1488		memory_set_bankptr(space->machine(),"bank1", videoram + videoram_offset[0]);
	1488	space->machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[0]);
1489	1489	}
1490	1490	cga.mode_control = data;
1491	1491	switch( cga.mode_control & 0x3F )
r14976	r14977
1543	1543	pc1512.read = data;
1544	1544	if ( ( cga.mode_control & 0x12 ) == 0x12 )
1545	1545	{
1546		memory_set_bankptr(space->machine(),"bank1", videoram + videoram_offset[data & 3]);
	1546	space->machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[data & 3]);
1547	1547	}
1548	1548	break;
1549	1549
r14976	r14977
1618	1618	address_space *io_space = machine.firstcpu->memory().space( AS_IO );
1619	1619
1620	1620	space->install_read_bank( 0xb8000, 0xbbfff, 0, 0x0C000, "bank1" );
1621		memory_set_bankptr(machine, "bank1", cga.videoram + videoram_offset[0]);
	1621	machine.root_device().membank("bank1")->set_base(cga.videoram + videoram_offset[0]);
1622	1622	space->install_legacy_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, FUNC(pc1512_videoram16le_w) );
1623	1623
1624	1624	io_space->install_legacy_read_handler( 0x3d0, 0x3df, FUNC(pc1512_16le_r) );
r14976	r14977
1629	1629
1630	1630	static SCREEN_UPDATE_RGB32( mc6845_pc1512 )
1631	1631	{
1632		UINT8 *gfx = screen.machine().region("gfx1")->base();
	1632	UINT8 *gfx = screen.machine().root_device().memregion("gfx1")->base();
1633	1633	mc6845_device *mc6845 = screen.machine().device<mc6845_device>(CGA_MC6845_NAME);
1634	1634	mc6845->screen_update(screen, bitmap, cliprect);
1635	1635

src/emu/video/tms9927.c

r14976	r14977
274	274	/* get the self-load PROM */
275	275	if (tms->intf->selfload_region != NULL)
276	276	{
277		tms->selfload = device->machine().region(tms->intf->selfload_region)->base();
	277	tms->selfload = device->machine().root_device().memregion(tms->intf->selfload_region)->base();
278	278	assert(tms->selfload != NULL);
279	279	}
280	280	}

src/emu/video/generic.c

r14976	r14977
160	160
161	161	PALETTE_INIT( RRRR_GGGG_BBBB )
162	162	{
163		const UINT8 *color_prom = machine.region("proms")->base();
	163	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
164	164	int i;
165	165
166	166	for (i = 0; i < machine.total_colors(); i++)

src/emu/video/hd61830.c

r14976	r14977
478	478	addr = 160*7 + (md - 0xe0) * 11 + cl;
479	479	}
480	480
481		data = subregion("hd61830")->u8(addr);
	481	data = memregion("hd61830")->u8(addr);
482	482	}
483	483
484	484	int cursor = m_mcr & MODE_CURSOR;

src/emu/video/315_5124.c

r14976	r14977
1616	1616
1617	1617	/* Allocate video RAM */
1618	1618	astring tempstring;
1619		m_CRAM = machine().region_alloc(subtag(tempstring,"vdp_cram"), SEGA315_5378_CRAM_SIZE, 1, ENDIANNESS_LITTLE);
	1619	m_CRAM = machine().memory().region_alloc(subtag(tempstring,"vdp_cram"), SEGA315_5378_CRAM_SIZE, 1, ENDIANNESS_LITTLE);
1620	1620	m_line_buffer = auto_alloc_array(machine(), int, 256 * 5);
1621	1621
1622	1622	m_frame_timing = (m_is_pal) ? pal_192 : ntsc_192;

src/emu/diimage.c

r14976	r14977
422	422	return NULL;
423	423
424	424	sprintf( full_tag, "%s:%s", device().tag(), tag );
425		return device().machine().region( full_tag )->base();
	425	return device().machine().root_device().memregion( full_tag )->base();
426	426	}
427	427
428	428
r14976	r14977
435	435	char full_tag[256];
436	436
437	437	sprintf( full_tag, "%s:%s", device().tag(), tag );
438		return device().machine().region( full_tag )->bytes();
	438	return device().machine().root_device().memregion( full_tag )->bytes();
439	439	}
440	440
441	441

src/emu/machine.c

r14976	r14977
150	150	m_config(_config),
151	151	m_system(_config.gamedrv()),
152	152	m_osd(osd),
153		m_regionlist(m_respool),
154		m_save(*this),
155		m_scheduler(*this),
156		m_memory(NULL),
157	153	m_cheat(NULL),
158	154	m_render(NULL),
159	155	m_input(NULL),
r14976	r14977
176	172	m_saveload_schedule(SLS_NONE),
177	173	m_saveload_schedule_time(attotime::zero),
178	174	m_saveload_searchpath(NULL),
179		m_logerror_list(m_respool)
	175	m_logerror_list(m_respool),
	176
	177	m_save(*this),
	178	m_memory(*this),
	179	m_scheduler(*this)
180	180	{
181	181	memset(gfx, 0, sizeof(gfx));
182	182	memset(&m_base_time, 0, sizeof(m_base_time));
r14976	r14977
276	276	// first load ROMs, then populate memory, and finally initialize CPUs
277	277	// these operations must proceed in this order
278	278	rom_init(*this);
279		m_memory = auto_alloc(*this, memory_manager(*this));
	279	m_memory.initialize();
280	280	m_watchdog_timer = m_scheduler.timer_alloc(timer_expired_delegate(FUNC(running_machine::watchdog_fired), this));
281	281	save().save_item(NAME(m_watchdog_enabled));
282	282	save().save_item(NAME(m_watchdog_counter));
r14976	r14977
606	606
607	607
608	608	//-------------------------------------------------
609		//  region_alloc - allocates memory for a region
610		//-------------------------------------------------
611
612		memory_region *running_machine::region_alloc(const char *name, UINT32 length, UINT8 width, endianness_t endian)
613		{
614		mame_printf_verbose("Region '%s' created\n", name);
615		// make sure we don't have a region of the same name; also find the end of the list
616		memory_region *info = m_regionlist.find(name);
617		if (info != NULL)
618		fatalerror("region_alloc called with duplicate region name \"%s\"\n", name);
619
620		// allocate the region
621		return &m_regionlist.append(name, *auto_alloc(*this, memory_region(*this, name, length, width, endian)));
622		}
623
624
625		//-------------------------------------------------
626		//  region_free - releases memory for a region
627		//-------------------------------------------------
628
629		void running_machine::region_free(const char *name)
630		{
631		m_regionlist.remove(name);
632		}
633
634
635		//-------------------------------------------------
636	609	//  add_notifier - add a notifier of the
637	610	//  given type
638	611	//-------------------------------------------------
r14976	r14977
1059	1032
1060	1033
1061	1034
1062		/***************************************************************************
1063		MEMORY REGIONS
1064		***************************************************************************/
1065
1066		//-------------------------------------------------
1067		//  memory_region - constructor
1068		//-------------------------------------------------
1069
1070		memory_region::memory_region(running_machine &machine, const char *name, UINT32 length, UINT8 width, endianness_t endian)
1071		: m_machine(machine),
1072		m_next(NULL),
1073		m_name(name),
1074		m_length(length),
1075		m_width(width),
1076		m_endianness(endian)
1077		{
1078		assert(width == 1 || width == 2 || width == 4 || width == 8);
1079		m_base.u8 = auto_alloc_array(machine, UINT8, length);
1080		}
1081
1082
1083		//-------------------------------------------------
1084		//  ~memory_region - destructor
1085		//-------------------------------------------------
1086
1087		memory_region::~memory_region()
1088		{
1089		auto_free(machine(), m_base.v);
1090		}
1091
1092
1093
1094	1035	//**************************************************************************
1095	1036	//  CALLBACK ITEMS
1096	1037	//**************************************************************************

src/emu/sound/tms5110.c

r14976	r14977
1415	1415
1416	1416	tms->rom = *device->region();
1417	1417	assert_always(tms->rom != NULL, "Error creating TMSPROM chip: No rom region found");
1418		tms->prom = device->machine().region(tms->intf->prom_region)->base();
	1418	tms->prom = device->machine().root_device().memregion(tms->intf->prom_region)->base();
1419	1419	assert_always(tms->rom != NULL, "Error creating TMSPROM chip: No prom region found");
1420	1420
1421	1421	tms->device = device;

src/emu/sound/k054539.c

r14976	r14977
317	317	cur_ptr = 0;
318	318	memset(ram, 0, 0x4000);
319	319
320		const memory_region *reg = (rgnoverride != NULL) ? machine().region(rgnoverride) : region();
	320	memory_region *reg = (rgnoverride != NULL) ? machine().root_device().memregion(rgnoverride) : region();
321	321	rom = *reg;
322	322	rom_size = reg->bytes();
323	323	rom_mask = 0xffffffffU;

src/emu/sound/digitalk.c

r14976	r14977
648	648	{
649	649	digitalker *dg = get_safe_token(device);
650	650	dg->device = device;
651		dg->rom = device->machine().region(device->tag())->base();
	651	dg->rom = device->machine().root_device().memregion(device->tag())->base();
652	652	dg->stream = device->machine().sound().stream_alloc(*device, 0, 1, device->clock()/4, dg, digitalker_update);
653	653	dg->dac_index = 128;
654	654	dg->data = 0xff;

src/emu/sound/ymz770.c

r14976	r14977
733	733	channels[i].decoder = new amm;
734	734	}
735	735
736		rom_base = device().machine().region(":ymz770")->base();
	736	rom_base = device().machine().root_device().memregion(":ymz770")->base();
737	737
738	738	save_item(NAME(cur_reg));
739	739	for (int i = 0; i < 8; i++)

src/emu/sound/votrax.c

r14976	r14977
1167	1167	m_master_clock_freq = clock();
1168	1168	m_stream = stream_alloc(0, 1, m_master_clock_freq / 16);
1169	1169	m_phoneme_timer = timer_alloc();
1170		m_rom = subregion("phoneme")->base();
	1170	m_rom = memregion("phoneme")->base();
1171	1171
1172	1172	// reset inputs
1173	1173	m_inflection = 0;

src/emu/sound/i5000.c

r14976	r14977
43	43	// create the stream
44	44	m_stream = machine().sound().stream_alloc(*this, 0, 2, clock() / 0x400, this);
45	45
46		m_rom_base = (UINT16 *)device().machine().region(":i5000snd")->base();
47		m_rom_mask = device().machine().region(":i5000snd")->bytes() / 2 - 1;
	46	m_rom_base = (UINT16 *)device().machine().root_device().memregion(":i5000snd")->base();
	47	m_rom_mask = device().machine().root_device().memregion(":i5000snd")->bytes() / 2 - 1;
48	48	}
49	49
50	50

src/emu/sound/2610intf.c

r14976	r14977
164	164	pcmbufa  = *device->region();
165	165	pcmsizea = device->region()->bytes();
166	166	name.printf("%s.deltat", device->tag());
167		pcmbufb  = (void *)(device->machine().region(name)->base());
168		pcmsizeb = device->machine().region(name)->bytes();
	167	pcmbufb  = (void *)(device->machine().root_device().memregion(name)->base());
	168	pcmsizeb = device->machine().root_device().memregion(name)->bytes();
169	169	if (pcmbufb == NULL || pcmsizeb == 0)
170	170	{
171	171	pcmbufb = pcmbufa;

src/emu/sound/gaelco.c

r14976	r14977
260	260	info->banks[j] = intf->banks[j];
261	261	}
262	262	info->stream = device->machine().sound().stream_alloc(*device, 0, 2, 8000, info, gaelco_update);
263		info->snd_data = (UINT8 *)device->machine().region(intf->gfxregion)->base();
	263	info->snd_data = (UINT8 *)device->machine().root_device().memregion(intf->gfxregion)->base();
264	264	if (info->snd_data == NULL)
265	265	info->snd_data = *device->region();
266	266

src/emu/sound/fm.c

r14976	r14977
4230	4230
4231	4231	/* setup PCM buffers again */
4232	4232	name.printf("%s",dev->tag());
4233		F2610->pcmbuf   = (const UINT8 *)dev->machine().region(name)->base();
4234		F2610->pcm_size = dev->machine().region(name)->bytes();
	4233	F2610->pcmbuf   = (const UINT8 *)dev->machine().root_device().memregion(name)->base();
	4234	F2610->pcm_size = dev->machine().root_device().memregion(name)->bytes();
4235	4235	name.printf("%s.deltat",dev->tag());
4236		F2610->deltaT.memory = (UINT8 *)dev->machine().region(name)->base();
	4236	F2610->deltaT.memory = (UINT8 *)dev->machine().root_device().memregion(name)->base();
4237	4237	if(F2610->deltaT.memory == NULL)
4238	4238	{
4239	4239	F2610->deltaT.memory = (UINT8*)F2610->pcmbuf;
4240	4240	F2610->deltaT.memory_size = F2610->pcm_size;
4241	4241	}
4242	4242	else
4243		F2610->deltaT.memory_size = dev->machine().region(name)->bytes();
	4243	F2610->deltaT.memory_size = dev->machine().root_device().memregion(name)->bytes();
4244	4244
4245	4245	/* Reset Prescaler */
4246	4246	OPNSetPres( OPN, 6*24, 6*24, 4*2); /* OPN 1/6 , SSG 1/4 */

src/emu/sound/okim6295.c

r14976	r14977
228	228	if (m_bank_installed)
229	229	{
230	230	m_bank_offs = base;
231		memory_set_bankptr(machine(), tag(), m_region->base() + base);
	231	membank(tag())->set_base(m_region->base() + base);
232	232	}
233	233	}
234	234

src/emu/sound/zsg2.c

r14976	r14977
228	228
229	229	info->stream = device->machine().sound().stream_alloc(*device, 0, 2, info->sample_rate, info, update_stereo);
230	230
231		info->bank_samples = device->machine().region(intf->samplergn)->base();
	231	info->bank_samples = device->machine().root_device().memregion(intf->samplergn)->base();
232	232	}
233	233
234	234	/**************************************************************************

src/emu/sound/es5506.c

r14976	r14977
913	913	chip->stream = device->machine().sound().stream_alloc(*device, 0, 2, device->clock() / (16*32), chip, es5506_update);
914	914
915	915	/* initialize the regions */
916		chip->region_base[0] = intf->region0 ? (UINT16 *)device->machine().region(intf->region0)->base() : NULL;
917		chip->region_base[1] = intf->region1 ? (UINT16 *)device->machine().region(intf->region1)->base() : NULL;
918		chip->region_base[2] = intf->region2 ? (UINT16 *)device->machine().region(intf->region2)->base() : NULL;
919		chip->region_base[3] = intf->region3 ? (UINT16 *)device->machine().region(intf->region3)->base() : NULL;
	916	chip->region_base[0] = intf->region0 ? (UINT16 *)device->machine().root_device().memregion(intf->region0)->base() : NULL;
	917	chip->region_base[1] = intf->region1 ? (UINT16 *)device->machine().root_device().memregion(intf->region1)->base() : NULL;
	918	chip->region_base[2] = intf->region2 ? (UINT16 *)device->machine().root_device().memregion(intf->region2)->base() : NULL;
	919	chip->region_base[3] = intf->region3 ? (UINT16 *)device->machine().root_device().memregion(intf->region3)->base() : NULL;
920	920
921	921	/* initialize the rest of the structure */
922	922	chip->device = device;

src/emu/sound/k053260.c

r14976	r14977
221	221
222	222	ic->mode = 0;
223	223
224		const memory_region *region = (ic->intf->rgnoverride != NULL) ? device->machine().region(ic->intf->rgnoverride) : device->region();
	224	memory_region *region = (ic->intf->rgnoverride != NULL) ? device->machine().root_device().memregion(ic->intf->rgnoverride) : device->region();
225	225
226	226	ic->rom = *region;
227	227	ic->rom_size = region->bytes();

src/emu/machine.h

r14976	r14977
160	160	typedef struct _generic_machine_private generic_machine_private;
161	161
162	162
163		// ======================> memory_region
164
165		// memory region object; should eventually be renamed memory_region
166		class memory_region
167		{
168		DISABLE_COPYING(memory_region);
169
170		friend class running_machine;
171		friend class simple_list<memory_region>;
172		friend resource_pool_object<memory_region>::~resource_pool_object();
173
174		// construction/destruction
175		memory_region(running_machine &machine, const char *name, UINT32 length, UINT8 width, endianness_t endian);
176		~memory_region();
177
178		public:
179		// getters
180		running_machine &machine() const { return m_machine; }
181		memory_region *next() const { return m_next; }
182		UINT8 *base() const { return (this != NULL) ? m_base.u8 : NULL; }
183		UINT8 *end() const { return (this != NULL) ? m_base.u8 + m_length : NULL; }
184		UINT32 bytes() const { return (this != NULL) ? m_length : 0; }
185		const char *name() const { return m_name; }
186
187		// flag expansion
188		endianness_t endianness() const { return m_endianness; }
189		UINT8 width() const { return m_width; }
190
191		// data access
192		UINT8 &u8(offs_t offset = 0) const { return m_base.u8[offset]; }
193		UINT16 &u16(offs_t offset = 0) const { return m_base.u16[offset]; }
194		UINT32 &u32(offs_t offset = 0) const { return m_base.u32[offset]; }
195		UINT64 &u64(offs_t offset = 0) const { return m_base.u64[offset]; }
196
197		// allow passing a region for any common pointer
198		operator void *() const { return (this != NULL) ? m_base.v : NULL; }
199		operator INT8 *() const { return (this != NULL) ? m_base.i8 : NULL; }
200		operator UINT8 *() const { return (this != NULL) ? m_base.u8 : NULL; }
201		operator INT16 *() const { return (this != NULL) ? m_base.i16 : NULL; }
202		operator UINT16 *() const { return (this != NULL) ? m_base.u16 : NULL; }
203		operator INT32 *() const { return (this != NULL) ? m_base.i32 : NULL; }
204		operator UINT32 *() const { return (this != NULL) ? m_base.u32 : NULL; }
205		operator INT64 *() const { return (this != NULL) ? m_base.i64 : NULL; }
206		operator UINT64 *() const { return (this != NULL) ? m_base.u64 : NULL; }
207
208		private:
209		// internal data
210		running_machine &      m_machine;
211		memory_region *         m_next;
212		astring               m_name;
213		generic_ptr            m_base;
214		UINT32               m_length;
215		UINT8               m_width;
216		endianness_t         m_endianness;
217		};
218
219
220
221	163	// ======================> system_time
222	164
223	165	// system time description, both local and UTC
r14976	r14977
279	221	resource_pool &respool() { return m_respool; }
280	222	device_scheduler &scheduler() { return m_scheduler; }
281	223	save_manager &save() { return m_save; }
282		memory_manager &memory() { assert(m_memory != NULL); return *m_memory; }
	224	memory_manager &memory() { return m_memory; }
283	225	cheat_manager &cheat() const { assert(m_cheat != NULL); return *m_cheat; }
284	226	render_manager &render() const { assert(m_render != NULL); return *m_render; }
285	227	input_manager &input() const { assert(m_input != NULL); return *m_input; }
r14976	r14977
302	244
303	245	// additional helpers
304	246	emu_options &options() const { return m_config.options(); }
305		memory_region *first_region() const { return m_regionlist.first(); }
306	247	attotime time() const { return m_scheduler.time(); }
307	248	bool scheduled_event_pending() const { return m_exit_pending || m_hard_reset_pending; }
308	249
r14976	r14977
310	251	inline device_t *device(const char *tag) { return root_device().subdevice(tag); }
311	252	template<class _DeviceClass> inline _DeviceClass *device(const char *tag) { return downcast<_DeviceClass *>(device(tag)); }
312	253	inline const input_port_config *port(const char *tag);
313		inline const memory_region *region(const char *tag);
314	254
315	255	// configuration helpers
316	256	device_t &add_dynamic_device(device_t &owner, device_type type, const char *tag, UINT32 clock);
r14976	r14977
337	277	void base_datetime(system_time &systime);
338	278	void current_datetime(system_time &systime);
339	279
340		// regions
341		memory_region *region_alloc(const char *name, UINT32 length, UINT8 width, endianness_t endian);
342		void region_free(const char *name);
343
344	280	// watchdog control
345	281	void watchdog_reset();
346	282	void watchdog_enable(bool enable = true);
r14976	r14977
404	340	const game_driver &      m_system;            // reference to the definition of the game machine
405	341	osd_interface &         m_osd;               // reference to OSD system
406	342
407		// embedded managers and objects
408		tagged_list<memory_region> m_regionlist;      // list of memory regions
409		save_manager         m_save;               // save manager
410		device_scheduler      m_scheduler;         // scheduler object
411
412	343	// managers
413		memory_manager *      m_memory;            // internal data from memory.c
414	344	cheat_manager *         m_cheat;            // internal data from cheat.c
415	345	render_manager *      m_render;            // internal data from render.c
416	346	input_manager *         m_input;            // internal data from input.c
r14976	r14977
484	414	logerror_callback         m_func;
485	415	};
486	416	simple_list<logerror_callback_item> m_logerror_list;
	417
	418	// embedded managers and objects
	419	save_manager         m_save;               // save manager
	420	memory_manager         m_memory;            // memory manager
	421	device_scheduler      m_scheduler;         // scheduler object
487	422	};
488	423
489	424
r14976	r14977
503	438	return m_portlist.find(root_device().subtag(fulltag, tag).cstr());
504	439	}
505	440
506		inline const memory_region *running_machine::region(const char *tag)
507		{
508		// if tag begins with a :, it's absolute
509		if (tag[0] == ':')
510		return m_regionlist.find(tag);
511	441
512		// otherwise, compute it relative to the root device
513		astring fulltag;
514		return m_regionlist.find(root_device().subtag(fulltag, tag).cstr());
515		}
516
517
518	442	#endif   /* __MACHINE_H__ */

src/emu/romload.c

r14976	r14977
518	518
519	519	static void region_post_process(rom_load_data *romdata, const char *rgntag, bool invert)
520	520	{
521		const memory_region *region = romdata->machine().region(rgntag);
	521	memory_region *region = romdata->machine().root_device().memregion(rgntag);
522	522	UINT8 *base;
523	523	int i, j;
524	524
r14976	r14977
832	832	fatalerror("Error in RomModule definition: COPY has an invalid length\n");
833	833
834	834	/* make sure the source was valid */
835		const memory_region *region = romdata->machine().region(srcrgntag);
	835	memory_region *region = romdata->machine().root_device().memregion(srcrgntag);
836	836	if (region == NULL)
837	837	fatalerror("Error in RomModule definition: COPY from an invalid region\n");
838	838
r14976	r14977
1328	1328	/* if this is a device region, override with the device width and endianness */
1329	1329	endianness_t endianness = ROMREGION_ISBIGENDIAN(region) ? ENDIANNESS_BIG : ENDIANNESS_LITTLE;
1330	1330	UINT8 width = ROMREGION_GETWIDTH(region) / 8;
1331		const memory_region *memregion = romdata->machine().region(regiontag);
	1331	memory_region *memregion = romdata->machine().root_device().memregion(regiontag);
1332	1332	if (memregion != NULL)
1333	1333	{
1334	1334	if (romdata->machine().device(regiontag) != NULL)
1335	1335	normalize_flags_for_device(romdata->machine(), regiontag, width, endianness);
1336	1336
1337	1337	/* clear old region (todo: should be moved to an image unload function) */
1338		romdata->machine().region_free(memregion->name());
	1338	romdata->machine().memory().region_free(memregion->name());
1339	1339	}
1340	1340
1341	1341	/* remember the base and length */
1342		romdata->region = romdata->machine().region_alloc(regiontag, regionlength, width, endianness);
	1342	romdata->region = romdata->machine().memory().region_alloc(regiontag, regionlength, width, endianness);
1343	1343	LOG(("Allocated %X bytes @ %p\n", romdata->region->bytes(), romdata->region->base()));
1344	1344
1345	1345	/* clear the region if it's requested */
r14976	r14977
1404	1404	normalize_flags_for_device(romdata->machine(), regiontag, width, endianness);
1405	1405
1406	1406	/* remember the base and length */
1407		romdata->region = romdata->machine().region_alloc(regiontag, regionlength, width, endianness);
	1407	romdata->region = romdata->machine().memory().region_alloc(regiontag, regionlength, width, endianness);
1408	1408	LOG(("Allocated %X bytes @ %p\n", romdata->region->bytes(), romdata->region->base()));
1409	1409
1410	1410	/* clear the region if it's requested */

src/emu/imagedev/cartslot.c

r14976	r14977
78	78	offset = ROM_GETOFFSET(roment);
79	79	size = ROM_GETLENGTH(roment);
80	80	flags = ROM_GETFLAGS(roment);
81		ptr = ((UINT8 *) device().machine().region(region)->base()) + offset;
	81	ptr = ((UINT8 *) device().machine().root_device().memregion(region)->base()) + offset;
82	82
83	83	if (load)
84	84	{

src/emu/device.c

r14976	r14977
186	186
187	187
188	188	//-------------------------------------------------
189		//  subregion - return a pointer to the region
	189	//  memregion - return a pointer to the region
190	190	//  info for a given region
191	191	//-------------------------------------------------
192	192
193		const memory_region *device_t::subregion(const char *_tag) const
	193	memory_region *device_t::memregion(const char *_tag) const
194	194	{
195	195	// safety first
196	196	if (this == NULL)
r14976	r14977
198	198
199	199	// build a fully-qualified name and look it up
200	200	astring fullpath;
201		return machine().region(subtag(fullpath, _tag));
	201	return machine().memory().region(subtag(fullpath, _tag));
202	202	}
203	203
204	204
205	205	//-------------------------------------------------
206		//  subregion - return a pointer to the memory
	206	//  memregion - return a pointer to the memory
207	207	//  bank info for a given bank
208	208	//-------------------------------------------------
209	209
210		memory_bank *device_t::subbank(const char *_tag) const
	210	memory_bank *device_t::membank(const char *_tag) const
211	211	{
212	212	// safety first
213	213	if (this == NULL)
r14976	r14977
397	397	void device_t::start()
398	398	{
399	399	// populate the machine and the region field
400		m_region = machine().region(tag());
	400	m_region = machine().root_device().memregion(tag());
401	401
402	402	// find all the registered devices
403	403	bool allfound = true;

src/emu/device.h

r14976	r14977
183	183	device_t *first_subdevice() const { return m_subdevice_list.first(); }
184	184	astring &subtag(astring &dest, const char *tag) const;
185	185	astring &siblingtag(astring &dest, const char *tag) const { return (this != NULL && m_owner != NULL) ? m_owner->subtag(dest, tag) : dest.cpy(tag); }
186		const memory_region *subregion(const char *tag) const;
187		memory_bank *subbank(const char *tag) const;
	186	memory_region *memregion(const char *tag) const;
	187	memory_bank *membank(const char *tag) const;
188	188	device_t *subdevice(const char *tag) const;
189	189	device_t *siblingdevice(const char *tag) const;
190	190	template<class _DeviceClass> inline _DeviceClass *subdevice(const char *tag) const { return downcast<_DeviceClass *>(subdevice(tag)); }
191	191	template<class _DeviceClass> inline _DeviceClass *siblingdevice(const char *tag) const { return downcast<_DeviceClass *>(siblingdevice(tag)); }
192		const memory_region *region() const { return m_region; }
	192	memory_region *region() const { return m_region; }
193	193
194	194	// configuration helpers
195	195	static void static_set_clock(device_t &device, UINT32 clock);
r14976	r14977
296	296	attoseconds_t         m_attoseconds_per_clock;// period in attoseconds
297	297
298	298	device_debug *         m_debug;
299		const memory_region *   m_region;            // our device-local region
	299	memory_region *         m_region;            // our device-local region
300	300	const machine_config &   m_machine_config;      // reference to the machine's configuration
301	301	const void *         m_static_config;      // static device configuration
302	302	const input_device_default *m_input_defaults;   // devices input ports default overrides

src/emu/memory.c

r14976	r14977
1499	1499
1500	1500
1501	1501	//**************************************************************************
1502		//  CORE SYSTEM OPERATIONS
	1502	//  MEMORY MANAGER
1503	1503	//**************************************************************************
1504	1504
1505	1505	//-------------------------------------------------
1506		//  memory_init - initialize the memory system
	1506	//  memory_manager - constructor
1507	1507	//-------------------------------------------------
1508	1508
1509	1509	memory_manager::memory_manager(running_machine &machine)
r14976	r14977
1513	1513	{
1514	1514	memset(m_bank_ptr, 0, sizeof(m_bank_ptr));
1515	1515	memset(m_bankd_ptr, 0, sizeof(m_bankd_ptr));
	1516	}
1516	1517
	1518
	1519	//-------------------------------------------------
	1520	//  initialize - initialize the memory system
	1521	//-------------------------------------------------
	1522
	1523	void memory_manager::initialize()
	1524	{
1517	1525	// loop over devices and spaces within each device
1518		memory_interface_iterator iter(machine.root_device());
	1526	memory_interface_iterator iter(machine().root_device());
1519	1527	for (device_memory_interface *memory = iter.first(); memory != NULL; memory = iter.next())
1520	1528	for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; spacenum++)
1521	1529	{
r14976	r14977
1542	1550	space->locate_memory();
1543	1551
1544	1552	// register a callback to reset banks when reloading state
1545		machine.save().register_postload(save_prepost_delegate(FUNC(memory_manager::bank_reattach), this));
	1553	machine().save().register_postload(save_prepost_delegate(FUNC(memory_manager::bank_reattach), this));
1546	1554
1547	1555	// dump the final memory configuration
1548		generate_memdump(machine);
	1556	generate_memdump(machine());
1549	1557
1550	1558	// we are now initialized
1551	1559	m_initialized = true;
1552	1560	}
1553	1561
1554	1562
1555
1556		//**************************************************************************
1557		//  MEMORY BANKING
1558		//**************************************************************************
1559
1560	1563	//-------------------------------------------------
1561	1564	//  shared - get a pointer to a shared memory
1562	1565	//  region by tag
r14976	r14977
1604	1607
1605	1608
1606	1609	//-------------------------------------------------
	1610	//  region_alloc - allocates memory for a region
	1611	//-------------------------------------------------
	1612
	1613	memory_region *memory_manager::region_alloc(const char *name, UINT32 length, UINT8 width, endianness_t endian)
	1614	{
	1615	mame_printf_verbose("Region '%s' created\n", name);
	1616	// make sure we don't have a region of the same name; also find the end of the list
	1617	memory_region *info = m_regionlist.find(name);
	1618	if (info != NULL)
	1619	fatalerror("region_alloc called with duplicate region name \"%s\"\n", name);
	1620
	1621	// allocate the region
	1622	return &m_regionlist.append(name, *global_alloc(memory_region(machine(), name, length, width, endian)));
	1623	}
	1624
	1625
	1626	//-------------------------------------------------
	1627	//  region_free - releases memory for a region
	1628	//-------------------------------------------------
	1629
	1630	void memory_manager::region_free(const char *name)
	1631	{
	1632	m_regionlist.remove(name);
	1633	}
	1634
	1635
	1636	//-------------------------------------------------
1607	1637	//  generate_memdump - internal memory dump
1608	1638	//-------------------------------------------------
1609	1639
r14976	r14977
1789	1819
1790	1820	void address_space::prepare_map()
1791	1821	{
1792		const memory_region *devregion = (m_spacenum == AS_0) ? machine().region(m_device.tag()) : NULL;
	1822	memory_region *devregion = (m_spacenum == AS_0) ? machine().root_device().memregion(m_device.tag()) : NULL;
1793	1823	UINT32 devregionsize = (devregion != NULL) ? devregion->bytes() : 0;
1794	1824
1795	1825	// allocate the address map
r14976	r14977
1848	1878	device().siblingtag(fulltag, entry->m_region);
1849	1879
1850	1880	// find the region
1851		const memory_region *region = machine().region(fulltag);
	1881	memory_region *region = machine().root_device().memregion(fulltag);
1852	1882	if (region == NULL)
1853	1883	fatalerror("Error: device '%s' %s space memory map entry %X-%X references non-existant region \"%s\"", m_device.tag(), m_name, entry->m_addrstart, entry->m_addrend, entry->m_region);
1854	1884
r14976	r14977
1865	1895	device().siblingtag(fulltag, entry->m_region);
1866	1896
1867	1897	// set the memory address
1868		entry->m_memory = machine().region(fulltag.cstr())->base() + entry->m_rgnoffs;
	1898	entry->m_memory = machine().root_device().memregion(fulltag.cstr())->base() + entry->m_rgnoffs;
1869	1899	}
1870	1900	}
1871	1901
r14976	r14977
2865	2895	return true;
2866	2896
2867	2897	// if we're reading from RAM or from ROM outside of address space 0 or its region, then yes, we do need backing
2868		const memory_region *region = machine().region(m_device.tag());
	2898	memory_region *region = machine().root_device().memregion(m_device.tag());
2869	2899	if (entry->m_read.m_type == AMH_RAM ||
2870	2900	(entry->m_read.m_type == AMH_ROM && (m_spacenum != AS_0 || region == NULL || entry->m_addrstart >= region->bytes())))
2871	2901	return true;
r14976	r14977
4143	4173	}
4144	4174
4145	4175	// register for saving, but only if we're not part of a memory region
4146		const memory_region *region;
4147		for (region = space.machine().first_region(); region != NULL; region = region->next())
	4176	memory_region *region;
	4177	for (region = space.machine().memory().first_region(); region != NULL; region = region->next())
4148	4178	if (m_data >= region->base() && (m_data + (byteend - bytestart + 1)) < region->end())
4149	4179	{
4150	4180	VPRINTF(("skipping save of this memory block as it is covered by a memory region\n"));
r14976	r14977
4416	4446
4417	4447
4418	4448	//**************************************************************************
	4449	//  MEMORY REGIONS
	4450	//**************************************************************************
	4451
	4452	//-------------------------------------------------
	4453	//  memory_region - constructor
	4454	//-------------------------------------------------
	4455
	4456	memory_region::memory_region(running_machine &machine, const char *name, UINT32 length, UINT8 width, endianness_t endian)
	4457	: m_machine(machine),
	4458	m_next(NULL),
	4459	m_name(name),
	4460	m_buffer(length),
	4461	m_width(width),
	4462	m_endianness(endian)
	4463	{
	4464	assert(width == 1 || width == 2 || width == 4 || width == 8);
	4465	}
	4466
	4467
	4468
	4469	//**************************************************************************
4419	4470	//  HANDLER ENTRY
4420	4471	//**************************************************************************
4421	4472
r14976	r14977
5538	5589	{
5539	5590	m_legacy_info.handler.space64(m_legacy_info.object.space, offset, data, mask);
5540	5591	}
5541
5542
5543
5544		// configure the addresses for a bank
5545		void memory_configure_bank(running_machine &machine, const char *tag, int startentry, int numentries, void *base, offs_t stride) { machine.root_device().subbank(tag)->configure_entries(startentry, numentries, base, stride); }
5546
5547		// configure the decrypted addresses for a bank
5548		void memory_configure_bank_decrypted(running_machine &machine, const char *tag, int startentry, int numentries, void *base, offs_t stride) { machine.root_device().subbank(tag)->configure_decrypted_entries(startentry, numentries, base, stride); }
5549
5550		// select one pre-configured entry to be the new bank base
5551		void memory_set_bank(running_machine &machine, const char *tag, int entrynum) { machine.root_device().subbank(tag)->set_entry(entrynum); }
5552
5553		// set the absolute address of a bank base
5554		void memory_set_bankptr(running_machine &machine, const char *tag, void *base) { machine.root_device().subbank(tag)->set_base(base); }

src/emu/memory.h

r14976	r14977
740	740	};
741	741
742	742
	743	// ======================> memory_region
	744
	745	// memory region object
	746	class memory_region
	747	{
	748	DISABLE_COPYING(memory_region);
	749
	750	friend class memory_manager;
	751	friend class simple_list<memory_region>;
	752	friend resource_pool_object<memory_region>::~resource_pool_object();
	753
	754	// construction/destruction
	755	memory_region(running_machine &machine, const char *name, UINT32 length, UINT8 width, endianness_t endian);
	756
	757	public:
	758	// getters
	759	running_machine &machine() const { return m_machine; }
	760	memory_region *next() const { return m_next; }
	761	UINT8 *base() { return (this != NULL) ? &m_buffer[0] : NULL; }
	762	UINT8 *end() { return (this != NULL) ? base() + m_buffer.count() : NULL; }
	763	UINT32 bytes() const { return (this != NULL) ? m_buffer.count() : 0; }
	764	const char *name() const { return m_name; }
	765
	766	// flag expansion
	767	endianness_t endianness() const { return m_endianness; }
	768	UINT8 width() const { return m_width; }
	769
	770	// data access
	771	UINT8 &u8(offs_t offset = 0) { return m_buffer[offset]; }
	772	UINT16 &u16(offs_t offset = 0) { return reinterpret_cast<UINT16 *>(base())[offset]; }
	773	UINT32 &u32(offs_t offset = 0) { return reinterpret_cast<UINT32 *>(base())[offset]; }
	774	UINT64 &u64(offs_t offset = 0) { return reinterpret_cast<UINT64 *>(base())[offset]; }
	775
	776	// allow passing a region for any common pointer
	777	operator void *() { return (this != NULL) ? reinterpret_cast<void *>(base()) : NULL; }
	778	operator INT8 *() { return (this != NULL) ? reinterpret_cast<INT8 *>(base()) : NULL; }
	779	operator UINT8 *() { return (this != NULL) ? reinterpret_cast<UINT8 *>(base()) : NULL; }
	780	operator INT16 *() { return (this != NULL) ? reinterpret_cast<INT16 *>(base()) : NULL; }
	781	operator UINT16 *() { return (this != NULL) ? reinterpret_cast<UINT16 *>(base()) : NULL; }
	782	operator INT32 *() { return (this != NULL) ? reinterpret_cast<INT32 *>(base()) : NULL; }
	783	operator UINT32 *() { return (this != NULL) ? reinterpret_cast<UINT32 *>(base()) : NULL; }
	784	operator INT64 *() { return (this != NULL) ? reinterpret_cast<INT64 *>(base()) : NULL; }
	785	operator UINT64 *() { return (this != NULL) ? reinterpret_cast<UINT64 *>(base()) : NULL; }
	786
	787	private:
	788	// internal data
	789	running_machine &      m_machine;
	790	memory_region *         m_next;
	791	astring               m_name;
	792	dynamic_buffer         m_buffer;
	793	UINT8               m_width;
	794	endianness_t         m_endianness;
	795	};
	796
	797
	798
743	799	// ======================> memory_manager
744	800
745	801	// holds internal state for the memory system
746	802	class memory_manager
747	803	{
748	804	friend class address_space;
	805	friend class address_table;
	806	friend class device_t;
	807	friend class memory_block;
749	808
750	809	public:
751	810	// construction/destruction
752	811	memory_manager(running_machine &machine);
	812	void initialize();
753	813
754	814	// getters
755	815	running_machine &machine() const { return m_machine; }
756	816	address_space *first_space() const { return m_spacelist.first(); }
757		memory_bank *first_bank() const { return m_banklist.first(); }
758		memory_bank *bank(const char *tag) const { return m_bankmap.find_hash_only(tag); }
	817	memory_region *first_region() const { return m_regionlist.first(); }
759	818
760	819	// get a pointer to a shared memory region by tag
761	820	memory_share *shared(const char *tag);
r14976	r14977
767	826	// pointers to a bank pointer (internal usage only)
768	827	UINT8 **bank_pointer_addr(UINT8 index, bool decrypted = false) { return decrypted ? &m_bankd_ptr[index] : &m_bank_ptr[index]; }
769	828
	829	// regions
	830	memory_region *region_alloc(const char *name, UINT32 length, UINT8 width, endianness_t endian);
	831	void region_free(const char *name);
	832
770	833	private:
771	834	// internal helpers
	835	memory_bank *first_bank() const { return m_banklist.first(); }
	836	memory_bank *bank(const char *tag) const { return m_bankmap.find(tag); }
	837	memory_region *region(const char *tag) { return m_regionlist.find(tag); }
772	838	void bank_reattach();
773	839
774	840	// internal state
r14976	r14977
786	852	UINT8                  m_banknext;            // next bank to allocate
787	853
788	854	tagged_list<memory_share>   m_sharelist;         // map for share lookups
	855
	856	tagged_list<memory_region>    m_regionlist;         // list of memory regions
789	857	};
790	858
791	859
r14976	r14977
892	960
893	961
894	962	//**************************************************************************
895		//  GLOBAL VARIABLES
896		//**************************************************************************
897
898		extern const char *const address_space_names[ADDRESS_SPACES];
899
900
901
902		//**************************************************************************
903		//  FUNCTION PROTOTYPES FOR CORE MEMORY FUNCTIONS
904		//**************************************************************************
905
906		// configure the addresses for a bank
907		void memory_configure_bank(running_machine &machine, const char *tag, int startentry, int numentries, void *base, offs_t stride) ATTR_NONNULL(5);
908
909		// configure the decrypted addresses for a bank
910		void memory_configure_bank_decrypted(running_machine &machine, const char *tag, int startentry, int numentries, void *base, offs_t stride) ATTR_NONNULL(5);
911
912		// select one pre-configured entry to be the new bank base
913		void memory_set_bank(running_machine &machine, const char *tag, int entrynum);
914
915		// set the absolute address of a bank base
916		void memory_set_bankptr(running_machine &machine, const char *tag, void *base) ATTR_NONNULL(3);
917
918
919
920		//**************************************************************************
921	963	//  INLINE FUNCTIONS
922	964	//**************************************************************************
923	965

src/emu/machine/pls100.c

r14976	r14977
31	31	inline void pls100_device::parse_fusemap()
32	32	{
33	33	jed_data jed;
34		jedbin_parse(machine().region(tag())->base(), machine().region(tag())->bytes(), &jed);
	34	jedbin_parse(machine().root_device().memregion(tag())->base(), machine().root_device().memregion(tag())->bytes(), &jed);
35	35	UINT32 fusenum = 0;
36	36	m_xor = 0;
37	37
r14976	r14977
113	113	void pls100_device::device_start()
114	114	{
115	115	// parse fusemap
116		assert(machine().region(tag()) != NULL);
	116	assert(machine().root_device().memregion(tag()) != NULL);
117	117	parse_fusemap();
118	118
119	119	// register for state saving

src/emu/machine/laserdsc.c

r14976	r14977
294	294
295	295	//-------------------------------------------------
296	296	//  static_set_overlay - set the overlay visible
297		//  subregion
	297	//  memregion
298	298	//-------------------------------------------------
299	299
300	300	void laserdisc_device::static_set_overlay_clip(device_t &device, INT32 minx, INT32 maxx, INT32 miny, INT32 maxy)

src/emu/machine/mccs1850.c

r14976	r14977
371	371	{
372	372	memset(m_ram, 0xff, RAM_SIZE);
373	373
374		if (machine().region(tag()) != NULL)
	374	if (machine().root_device().memregion(tag()) != NULL)
375	375	{
376		UINT8 *nvram = machine().region(tag())->base();
	376	UINT8 *nvram = machine().root_device().memregion(tag())->base();
377	377
378	378	// initialize NVRAM
379	379	memcpy(m_ram, nvram, 0x20);

src/emu/screen.c

r14976	r14977
951	951	scaledvis.min_y = m_visarea.min_y * m_burnin.height() / m_height;
952	952	scaledvis.max_y = m_visarea.max_y * m_burnin.height() / m_height;
953	953
954		// wrap a bitmap around the subregion we care about
	954	// wrap a bitmap around the memregion we care about
955	955	bitmap_argb32 finalmap(scaledvis.width(), scaledvis.height());
956	956	int srcwidth = m_burnin.width();
957	957	int srcheight = m_burnin.height();

src/emu/drawgfx.c

r14976	r14977
94	94	for (curgfx = 0; curgfx < MAX_GFX_ELEMENTS && gfxdecodeinfo[curgfx].gfxlayout != NULL; curgfx++)
95	95	{
96	96	const gfx_decode_entry *gfxdecode = &gfxdecodeinfo[curgfx];
97		const memory_region *region = (gfxdecode->memory_region != NULL) ? machine.region(gfxdecode->memory_region) : NULL;
	97	memory_region *region = (gfxdecode->memory_region != NULL) ? machine.root_device().memregion(gfxdecode->memory_region) : NULL;
98	98	UINT32 region_length = (region != NULL) ? (8 * region->bytes()) : 0;
99	99	const UINT8 *region_base = (region != NULL) ? region->base() : NULL;
100	100	UINT32 xscale = (gfxdecode->xscale == 0) ? 1 : gfxdecode->xscale;

src/lib/formats/dfi_dsk.c

r14976	r14977
34	34	#include "emu.h"
35	35	#include "dfi_dsk.h"
36	36	#include <zlib.h>
37		#define NUMBER_OF_MULTIREADS 1
38	37
39	38	dfi_format::dfi_format() : floppy_image_format_t()
40	39	{
r14976	r14977
47	46
48	47	const char *dfi_format::description() const
49	48	{
50		return "DiscFerret flux dump format";
	49	return "DiskFerret flux dump format";
51	50	}
52	51
53	52	const char *dfi_format::extensions() const
r14976	r14977
100	99	tsize--; // Drop the extra 0x00 at the end
101	100
102	101	int index_time = 0;
103		int index_count = 0;
104	102	int total_time = 0;
105	103	for(int i=0; i<tsize; i++) {
106	104	UINT8 v = data[i];
r14976	r14977
108	106	total_time += 0x7f;
109	107	else {
110	108	total_time += v & 0x7f;
111		if((v & 0x80) && (index_count<NUMBER_OF_MULTIREADS)) {
112		index_time = total_time;///NUMBER_OF_MULTIREADS;
113		index_count++;
114		}
	109	if((v & 0x80) && !index_time)
	110	index_time = total_time;
115	111	}
116	112	}
117	113
r14976	r14977
124	120	image->set_track_size(track, head, tsize);
125	121
126	122	int cur_time = 0;
127		index_count = 0;
128		int index_polarity = 0;
129	123	UINT32 mg = floppy_image::MG_A;
130	124	UINT32 *buf = image->get_buffer(track, head);
131	125	int tpos = 0;
132	126	buf[tpos++] = mg;
133	127	for(int i=0; i<tsize; i++) {
134	128	UINT8 v = data[i];
135		if((v & 0x7f) == 0x7f) // 0x7F or 0xFF: no transition, but a carry
	129	if((v & 0x7f) == 0x7f)
136	130	cur_time += 0x7f;
137		else if((v & 0x80) == 0) { // 0x00-0x7E: not an index or carry, add the number and store transition
	131	else {
138	132	cur_time += v & 0x7f;
	133	if(v & 0x80)
	134	break;
139	135	mg = mg == floppy_image::MG_A ? floppy_image::MG_B : floppy_image::MG_A;
140	136	buf[tpos++] = mg | UINT32(200000000ULL*cur_time/index_time);
141		} else if(v & 0x80) { // 0x80-0xFF an index, note the index (TODO: actually do this!) and do not add number
142		index_polarity ^= 1;
143		index_count += index_polarity;
144		if (index_count == NUMBER_OF_MULTIREADS) break;
145	137	}
146	138	}
147	139	image->set_track_size(track, head, tpos);

src/lib/formats/ap2_dsk.c

r14976	r14977
1	1	/*********************************************************************
2	2
3		ap2_dsk.c
	3	ap2_dsk.c
4	4
5		Apple II disk images
	5	Apple II disk images
6	6
7	7	*********************************************************************/
8	8
r14976	r14977
511	511	SECTOR_LENGTH([256])
512	512	FIRST_SECTOR_ID([0]))
513	513	LEGACY_FLOPPY_OPTIONS_END
514
515		/***************************************************************************
516
517		New implementation
518
519		****************************************************************************
520
521		Copyright Olivier Galibert, Lord Nightmare and Balrog
522		All rights reserved.
523
524		Redistribution and use in source and binary forms, with or without
525		modification, are permitted provided that the following conditions are
526		met:
527
528		* Redistributions of source code must retain the above copyright
529		notice, this list of conditions and the following disclaimer.
530		* Redistributions in binary form must reproduce the above copyright
531		notice, this list of conditions and the following disclaimer in
532		the documentation and/or other materials provided with the
533		distribution.
534		* Neither the name 'MAME' nor the names of its contributors may be
535		used to endorse or promote products derived from this software
536		without specific prior written permission.
537
538		THIS SOFTWARE IS PROVIDED BY AARON GILES ''AS IS'' AND ANY EXPRESS OR
539		IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
540		WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
541		DISCLAIMED. IN NO EVENT SHALL AARON GILES BE LIABLE FOR ANY DIRECT,
542		INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
543		(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
544		SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
545		HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
546		STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
547		IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
548		POSSIBILITY OF SUCH DAMAGE.
549
550		****************************************************************************/
551
552
553		a2_16sect_format::a2_16sect_format() : floppy_image_format_t()
554		{
555		}
556
557		const char *a2_16sect_format::name() const
558		{
559		return "a2_16sect";
560		}
561
562		const char *a2_16sect_format::description() const
563		{
564		return "Apple II 16-sector dsk image";
565		}
566
567		const char *a2_16sect_format::extensions() const
568		{
569		return "dsk";
570		}
571
572		bool a2_16sect_format::supports_save() const
573		{
574		return true;
575		}
576
577		int a2_16sect_format::identify(io_generic *io, UINT32 form_factor)
578		{
579		int size = io_generic_size(io);
580		int expected_size = 35 * 16 * 256;
581		return size == expected_size;
582		}
583
584		const floppy_image_format_t::desc_e a2_16sect_format::mac_gcr[] = {
585		{ SECTOR_LOOP_START, 0, -1 },
586		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
587		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
588		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
589		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
590		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
591		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
592		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
593		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
594		{   RAWBITS, 0xd5aa96, 24 },
595		{   CRC_MACHEAD_START, 0 },
596		{     TRACK_ID_GCR6 },
597		{     SECTOR_ID_GCR6 },
598		{     TRACK_HEAD_ID_GCR6 },
599		{     SECTOR_INFO_GCR6 },
600		{   CRC_END, 0 },
601		{   CRC, 0 },
602		{   RAWBITS, 0xdeaaff, 24 },
603		{   RAWBITS, 0xff3fcf, 24 }, { RAWBITS, 0xf3fcff, 24 },
604		{   RAWBITS, 0xd5aaad, 24 },
605		{   SECTOR_ID_GCR6 },
606		{   SECTOR_DATA_MAC, -1 },
607		{   RAWBITS, 0xdeaaff, 24 },
608		{   RAWBITS, 0xff, 8 },
609		{ SECTOR_LOOP_END },
610		{ END },
611		};
612
613
614		bool a2_16sect_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
615		{
616
617		UINT8 sector_data[(256)*16];
618		memset(sector_data, 0, sizeof(sector_data));
619
620		desc_s sectors[16];
621		int format = 0;
622		int pos_data = 0;
623
624		int head_count = 1;
625
626		for(int track=0; track < 35; track++) {
627		for(int head=0; head < head_count; head++) {
628		for(int si=0; si<16; si++) {
629		UINT8 *data = sector_data + (256)*si;
630		sectors[si].data = data;
631		sectors[si].size = 256;
632		sectors[si].sector_id = si;
633		sectors[si].sector_info = format;
634		io_generic_read(io, data, pos_data, 256);
635		pos_data += 256;
636		}
637		generate_track(mac_gcr, track, head, sectors, 16, 3104*16, image);
638		}
639		}
640		return true;
641		}
642
643		UINT8 a2_16sect_format::gb(const UINT8 *buf, int ts, int &pos, int &wrap)
644		{
645		UINT8 v = 0;
646		int w1 = wrap;
647		while(wrap != w1+2 && !(v & 0x80)) {
648		v = v << 1 | ((buf[pos >> 3] >> (7-(pos & 7))) & 1);
649		pos++;
650		if(pos == ts) {
651		pos = 0;
652		wrap++;
653		}
654		}
655		return v;
656		}
657
658		void a2_16sect_format::update_chk(const UINT8 *data, int size, UINT32 &chk)
659		{
660		}
661
662		bool a2_16sect_format::save(io_generic *io, floppy_image *image)
663		{
664		int g_tracks, g_heads;
665		int visualgrid[16][35]; // visualizer grid, cleared/initialized below
666		#define NOTFOUND 0
667		#define ADDRFOUND 1
668		#define ADDRGOOD 2
669		#define DATAFOUND 4
670		#define DATAGOOD 8
671		#define DATAPOST 16
672		for (int i = 0; i < 16; i++) {
673		for (int j = 0; j < 35; j++) {
674		visualgrid[i][j] = 0;
675		}
676		}
677		image->get_actual_geometry(g_tracks, g_heads);
678
679		int head = 0;
680
681		int pos_data = 0;
682
683		for(int track=0; track < 70; track+=2) {
684		UINT8 sectdata[(256)*16];
685		memset(sectdata, 0, sizeof(sectdata));
686		int nsect = 16;
687		UINT8 buf[130000]; // originally 13000, multiread dfi disks need larger
688		int ts;
689		fprintf(stderr,"DEBUG: a2_16sect_format::save() about to generate bitstream from physical track %d (logical %d)...", track, track/2);
690		generate_bitstream_from_track(track, head, 200000000/(3104*nsect*1), buf, ts, image); // 3104 needs tweaking, *3 is 3x multiread from a dfi disk
691		fprintf(stderr,"done.\n");
692		int pos = 0;
693		int wrap = 0;
694		int hb = 0;
695		for(;;) {
696		UINT8 v = gb(buf, ts, pos, wrap);
697		if(v == 0xff)
698		hb = 1;
699		else if(hb == 1 && v == 0xd5)
700		hb = 2;
701		else if(hb == 2 && v == 0xaa)
702		hb = 3;
703		else if(hb == 3 && v == 0x96)
704		hb = 4;
705		else
706		hb = 0;
707
708		if(hb == 4) {
709		UINT8 h[11];
710		for(int i=0; i<11; i++)
711		h[i] = gb(buf, ts, pos, wrap);
712		//UINT8 v2 = gcr6bw_tb[h[2]];
713		UINT8 vl = gcr4_decode(h[0],h[1]);
714		UINT8 tr = gcr4_decode(h[2],h[3]);
715		UINT8 se = gcr4_decode(h[4],h[5]);
716		UINT8 chk = gcr4_decode(h[6],h[7]);
717		UINT32 post = (h[8]<<16)|(h[9]<<8)|h[10];
718		printf("Address Mark:\tVolume %d, Track %d, Sector %2d, Checksum %02X: %s, Postamble %03X: %s\n", vl, tr, se, chk, (chk ^ vl ^ tr ^ se)==0?"OK":"BAD", post, (post&0xFFFF00)==0xDEAA00?"OK":"BAD");
719		if (tr == track/2 && se < nsect) {
720		visualgrid[se][track/2] |= ADDRFOUND;
721		visualgrid[se][track/2] |= (chk ^ vl ^ tr ^ se)==0?ADDRGOOD:0;
722		int opos = pos;
723		int owrap = wrap;
724		hb = 0;
725		for(int i=0; i<20 && hb != 4; i++) {
726		v = gb(buf, ts, pos, wrap);
727		if(v == 0xff)
728		hb = 1;
729		else if(hb == 1 && v == 0xd5)
730		hb = 2;
731		else if(hb == 2 && v == 0xaa)
732		hb = 3;
733		else if(hb == 3 && v == 0xad)
734		hb = 4;
735		else
736		hb = 0;
737		}
738		if(hb == 4) {
739		visualgrid[se][track/2] |= DATAFOUND;
740		UINT8 *dest = sectdata+(256)*se;
741		UINT8 data[0x157];
742		UINT32 dpost = 0;
743		UINT8 c = 0;
744		// first read in sector and decode to 6bit form
745		for(int i=0; i<0x156; i++) {
746		data[i] = gcr6bw_tb[gb(buf, ts, pos, wrap)] ^ c;
747		c = data[i];
748		//   printf("%02x ", c);
749		//   if (((i&0xf)+1)==0x10) printf("\n");
750		}
751		// read the checksum byte
752		data[0x156] = gcr6bw_tb[gb(buf,ts,pos,wrap)];
753		// now read the postamble bytes
754		for(int i=0; i<3; i++) {
755		dpost <<= 8;
756		dpost |= gb(buf, ts, pos, wrap);
757		}
758		// next combine in the upper 2 bits of each byte
759		UINT8 bit_swap[4] = { 0, 2, 1, 3 };
760		for(int i=0; i<0x56; i++)
761		data[i+0x056] = data[i+0x056]<<2 |  bit_swap[data[i]&3];
762		for(int i=0; i<0x56; i++)
763		data[i+0x0ac] = data[i+0x0ac]<<2 |  bit_swap[(data[i]>>2)&3];
764		for(int i=0; i<0x54; i++)
765		data[i+0x102] = data[i+0x102]<<2 |  bit_swap[(data[i]>>4)&3];
766		// now decode it into 256 bytes
767		// but only write it if the bitfield of the track shows datagood is NOT set.
768		// if it is set we don't want to overwrite a guaranteed good read with a bad one
769		if ((visualgrid[se][track/2]&DATAGOOD)==0) {
770		// TODO:
771		// if the current read is good but the postamble isn't, write it in.
772		// if the current read isn't good but the postamble is, its better than nothing.
773		// if the current read isn't good and neither is the postamble but nothing better
774		// has been written before, write it anyway.
775		for(int i=0x56; i<0x156; i++) {
776		UINT8 dv = data[i];
777		*dest++ = dv;
778		}
779		}
780		// do some checking
781		if ((data[0x156] != c) || (dpost&0xFFFF00)!=0xDEAA00) {
782		printf("Data Mark:\tChecksum xpctd %d found %d: %s, Postamble %03X: %s\n", data[0x156], c, (data[0x156]==c)?"OK":"BAD", dpost, (dpost&0xFFFF00)==0xDEAA00?"OK":"BAD");
783		}
784		else visualgrid[se][track/2] |= DATAGOOD;
785		} else {
786		pos = opos;
787		wrap = owrap;
788		}
789		}
790		hb = 0;
791		}
792		if(wrap)
793		break;
794		}
795		for(int i=0; i<nsect; i++) {
796		//if(nsect>0) printf("t%d,", track);
797		UINT8 *data = sectdata + (256)*i;
798		io_generic_write(io, data, pos_data, 256);
799		pos_data += 256;
800		}
801		//printf("\n");
802		}
803		// display a little table of which sectors decoded ok
804		for (int j = 0; j < 35; j++) {
805		printf("T%2d: ",j);
806		for (int i = 0; i < 16; i++) {
807		if (visualgrid[i][j] == NOTFOUND) printf("-NF-");
808		else {
809		if (visualgrid[i][j] & ADDRFOUND) printf("a"); else printf(" ");
810		if (visualgrid[i][j] & ADDRGOOD) printf("A"); else printf(" ");
811		if (visualgrid[i][j] & DATAFOUND) printf("d"); else printf(" ");
812		if (visualgrid[i][j] & DATAGOOD) printf("D"); else printf(" ");
813		}
814		printf(" ");
815		}
816		printf("\n");
817		}
818
819		return true;
820		}
821
822		const floppy_format_type FLOPPY_A216S_FORMAT = &floppy_image_format_creator<a2_16sect_format>;
		No newline at end of file

src/lib/formats/ap2_dsk.h

r14976	r14977
1	1	/*********************************************************************
2	2
3		ap2_dsk.h
	3	ap2_dsk.h
4	4
5		Apple II disk images
	5	Apple II disk images
6	6
7	7	*********************************************************************/
8	8
r14976	r14977
14	14
15	15	/***************************************************************************
16	16
17		Constants
	17	Constants
18	18
19	19	***************************************************************************/
20	20
21		#define APPLE2_NIBBLE_SIZE                      416
22		#define APPLE2_SMALL_NIBBLE_SIZE        374
23		#define APPLE2_TRACK_COUNT                      35
24		#define APPLE2_SECTOR_COUNT                     16
25		#define APPLE2_SECTOR_SIZE                      256
	21	#define APPLE2_NIBBLE_SIZE         416
	22	#define APPLE2_SMALL_NIBBLE_SIZE   374
	23	#define APPLE2_TRACK_COUNT         35
	24	#define APPLE2_SECTOR_COUNT         16
	25	#define APPLE2_SECTOR_SIZE         256
26	26
27	27
28	28
r14976	r14977
30	30
31	31	LEGACY_FLOPPY_OPTIONS_EXTERN(apple2);
32	32
33		// new style code
34
35		class a2_16sect_format : public floppy_image_format_t
36		{
37		public:
38		a2_16sect_format();
39
40		virtual int identify(io_generic *io, UINT32 form_factor);
41		virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
42		virtual bool save(io_generic *io, floppy_image *image);
43
44		virtual const char *name() const;
45		virtual const char *description() const;
46		virtual const char *extensions() const;
47		virtual bool supports_save() const;
48
49		private:
50		static const desc_e mac_gcr[];
51
52		UINT8 gb(const UINT8 *buf, int ts, int &pos, int &wrap);
53		void update_chk(const UINT8 *data, int size, UINT32 &chk);
54		};
55
56		extern const floppy_format_type FLOPPY_A216S_FORMAT;
57
58		#endif /* AP2_DISK_H */
		No newline at end of file
	33	#endif /* AP2_DISK_H */

src/mess/audio/spchroms.c

r14976	r14977
33	33	}
34	34	else
35	35	{   /* speech ROM */
36		speechrom_data = machine.region(intf->memory_region)->base();
	36	speechrom_data = machine.root_device().memregion(intf->memory_region)->base();
37	37	/* take region length */
38		speechROMlen = machine.region(intf->memory_region)->bytes();
	38	speechROMlen = machine.root_device().memregion(intf->memory_region)->bytes();
39	39	}
40	40	}
41	41

src/mess/audio/svision.c

r14976	r14977
258	258	UINT16 addr = state->dma.start + (unsigned) state->dma.pos / 2;
259	259	if (addr >= 0x8000 && addr < 0xc000)
260	260	{
261		sample = device->machine().region("user1")->base()[(addr & 0x3fff) | state->dma.ca14to16];
	261	sample = device->machine().root_device().memregion("user1")->base()[(addr & 0x3fff) | state->dma.ca14to16];
262	262	}
263	263	else
264	264	{

src/mess/machine/dgn_beta.c

r14976	r14977
315	315	}
316	316
317	317	state->m_PageRegs[state->m_TaskReg][Page].memory=readbank;
318		memory_set_bankptr(machine, page_num,readbank);
	318	state->membank(page_num)->set_base(readbank);
319	319
320	320	LOG_BANK_UPDATE(("UpdateBanks:MapPage=$%02X readbank=$%X\n",MapPage,(int)(FPTR)readbank));
321	321	LOG_BANK_UPDATE(("PageRegsSet Task=%X Page=%x\n",state->m_TaskReg,Page));
322		LOG_BANK_UPDATE(("memory_set_bankptr(%X)\n",Page+1));
	322	//LOG_BANK_UPDATE(("%X)\n",state->membank(Page+1)));
323	323	LOG_BANK_UPDATE(("memory_install_write8_handler CPU=0\n"));
324	324	LOG_BANK_UPDATE(("memory_install_write8_handler CPU=1\n"));
325	325	}
r14976	r14977
333	333	int      Idx;
334	334
335	335	LOG_DEFAULT_TASK(("SetDefaultTask()\n"));
336		if (VERBOSE) debug_console_printf(machine, "Set Default task\n");
	336	//if (VERBOSE) debug_console_printf(machine)->set_base("Set Default task\n");
337	337
338	338	state->m_TaskReg=NoPagingTask;
339	339
r14976	r14977
1063	1063
1064	1064	logerror("MACHINE_RESET( dgnbeta )\n");
1065	1065
1066		state->m_system_rom = machine.region(MAINCPU_TAG)->base();
	1066	state->m_system_rom = state->memregion(MAINCPU_TAG)->base();
1067	1067
1068	1068	/* Make sure CPU 1 is started out halted ! */
1069	1069	cputag_set_input_line(machine, DMACPU_TAG, INPUT_LINE_HALT, ASSERT_LINE);

src/mess/machine/ataricrt.c

r14976	r14977
40	40	static void a800_setbank(running_machine &machine, int cart_mounted)
41	41	{
42	42	offs_t ram_top;
43
44	43	// take care of 0x0000-0x7fff: RAM or NOP
45	44	ram_top = MIN(machine.device<ram_device>(RAM_TAG)->size(), 0x8000) - 1;
46	45	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0x0000, ram_top, "0000");
47		memory_set_bankptr(machine, "0000", machine.device<ram_device>(RAM_TAG)->pointer());
	46	machine.root_device().membank("0000")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
48	47
49	48	// take care of 0x8000-0x9fff: A800 -> either right slot or RAM or NOP, others -> RAM or NOP
50	49	// is there anything in the right slot?
51	50	if (cart_mounted & RIGHT_CARTSLOT_MOUNTED)
52	51	{
53	52	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0x9fff, "8000");
54		memory_set_bankptr(machine, "8000", machine.region("rslot")->base());
	53	machine.root_device().membank("8000")->set_base(machine.root_device().memregion("rslot")->base());
55	54	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x8000, 0x9fff);
56	55	}
57	56	else if (a800_cart_type != BBSB)
r14976	r14977
60	59	if (ram_top > 0x8000)
61	60	{
62	61	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0x8000, ram_top, "8000");
63		memory_set_bankptr(machine, "8000", machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
	62	machine.root_device().membank("8000")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
64	63	}
65	64	}
66	65
r14976	r14977
73	72	if (a800_cart_type == A800_16K)
74	73	{
75	74	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0x9fff, "8000");
76		memory_set_bankptr(machine, "8000", machine.region("lslot")->base());
	75	machine.root_device().membank("8000")->set_base(machine.root_device().memregion("lslot")->base());
77	76	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x8000, 0x9fff);
78	77
79		memcpy(machine.region("maincpu")->base() + 0x10000, machine.region("lslot")->base() + 0x2000, 0x2000);
	78	memcpy(machine.root_device().memregion("maincpu")->base() + 0x10000, machine.root_device().memregion("lslot")->base() + 0x2000, 0x2000);
80	79	}
81	80	else if (a800_cart_type == A800_8K)
82		memcpy(machine.region("maincpu")->base() + 0x10000, machine.region("lslot")->base(), 0x2000);
	81	memcpy(machine.root_device().memregion("maincpu")->base() + 0x10000, machine.root_device().memregion("lslot")->base(), 0x2000);
83	82	else
84	83	fatalerror("This type of cart is not supported yet in this driver. Please use a400 or a800.\n");
85	84	}
86	85	else if (a800_cart_type == A800_16K)
87	86	{
88		memory_set_bankptr(machine, "8000", machine.region("lslot")->base());
89		memory_set_bankptr(machine, "a000", machine.region("lslot")->base() + 0x2000);
	87	machine.root_device().membank("8000")->set_base(machine.root_device().memregion("lslot")->base());
	88	machine.root_device().membank("a000")->set_base(machine.root_device().memregion("lslot")->base() + 0x2000);
90	89	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x8000, 0xbfff);
91	90	}
92	91	else if (a800_cart_type == BBSB)
r14976	r14977
94	93	// this requires separate banking in 0x8000 & 0x9000!
95	94	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0x8fff, "8000");
96	95	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x9000, 0x9fff, "9000");
97		memory_set_bankptr(machine, "8000", machine.region("lslot")->base() + 0x0000);
98		memory_set_bankptr(machine, "9000", machine.region("lslot")->base() + 0x4000);
99		memory_set_bankptr(machine, "a000", machine.region("lslot")->base() + 0x8000);
	96	machine.root_device().membank("8000")->set_base(machine.root_device().memregion("lslot")->base() + 0x0000);
	97	machine.root_device().membank("9000")->set_base(machine.root_device().memregion("lslot")->base() + 0x4000);
	98	machine.root_device().membank("a000")->set_base(machine.root_device().memregion("lslot")->base() + 0x8000);
100	99	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0xa000, 0xbfff);
101	100	}
102	101	else if (a800_cart_type == OSS_034M)
r14976	r14977
104	103	// this requires separate banking in 0xa000 & 0xb000!
105	104	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xa000, 0xafff, "a000");
106	105	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xb000, 0xbfff, "b000");
107		memory_set_bankptr(machine, "b000", machine.region("lslot")->base() + 0x3000);
	106	machine.root_device().membank("b000")->set_base(machine.root_device().memregion("lslot")->base() + 0x3000);
108	107	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0xa000, 0xbfff);
109	108	}
110	109	else if (a800_cart_type == OSS_M091)
r14976	r14977
112	111	// this requires separate banking in 0xa000 & 0xb000!
113	112	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xa000, 0xafff, "a000");
114	113	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xb000, 0xbfff, "b000");
115		memory_set_bankptr(machine, "b000", machine.region("lslot")->base());
	114	machine.root_device().membank("b000")->set_base(machine.root_device().memregion("lslot")->base());
116	115	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0xa000, 0xbfff);
117	116	}
118	117	else if (a800_cart_type == XEGS_32K)
119	118	{
120		memory_set_bankptr(machine, "8000", machine.region("lslot")->base());
121		memory_set_bankptr(machine, "a000", machine.region("lslot")->base() + 0x6000);
	119	machine.root_device().membank("8000")->set_base(machine.root_device().memregion("lslot")->base());
	120	machine.root_device().membank("a000")->set_base(machine.root_device().memregion("lslot")->base() + 0x6000);
122	121	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x8000, 0xbfff);
123	122	}
124	123	else
125	124	{
126		memory_set_bankptr(machine, "a000", machine.region("lslot")->base());
	125	machine.root_device().membank("a000")->set_base(machine.root_device().memregion("lslot")->base());
127	126	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0xa000, 0xbfff);
128	127	}
129	128	}
r14976	r14977
173	172	{
174	173	//  printf("written %x\n", data);
175	174	int bank = data & 0x03;
176		memory_set_bankptr(space->machine(), "8000", space->machine().region("lslot")->base() + bank * 0x2000);
	175	space->machine().root_device().membank("8000")->set_base(space->machine().root_device().memregion("lslot")->base() + bank * 0x2000);
177	176	}
178	177
179	178	static WRITE8_HANDLER( w64_bank_w )
r14976	r14977
181	180	//  printf("write to %x\n", offset);
182	181
183	182	if (offset < 8)
184		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + offset * 0x2000);
	183	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + offset * 0x2000);
185	184	else
186		memory_set_bankptr(space->machine(), "a000", space->machine().region("maincpu")->base());
	185	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base());
187	186	// FIXME: writes to 0x8-0xf should disable the cart
188	187	}
189	188
r14976	r14977
193	192	//  printf("write to %x\n", offset);
194	193
195	194	if (offset < 8)
196		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + (7 - offset) * 0x2000);
	195	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + (7 - offset) * 0x2000);
197	196	else
198		memory_set_bankptr(space->machine(), "a000", space->machine().region("maincpu")->base());
	197	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base());
199	198	// FIXME: writes to 0x8-0xf should disable the cart
200	199	}
201	200
r14976	r14977
203	202	{
204	203	//  printf("write to %x\n", 0x8000 + offset);
205	204	if (offset >= 0xff6 && offset <= 0xff9)
206		memory_set_bankptr(space->machine(), "8000", space->machine().region("lslot")->base() + 0x0000 + (offset - 0xff6) * 0x1000);
	205	space->machine().root_device().membank("8000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x0000 + (offset - 0xff6) * 0x1000);
207	206	}
208	207
209	208	static WRITE8_HANDLER( bbsb_bankh_w )
210	209	{
211	210	//  printf("write to %x\n", 0x9000 + offset);
212	211	if (offset >= 0xff6 && offset <= 0xff9)
213		memory_set_bankptr(space->machine(), "9000", space->machine().region("lslot")->base() + 0x4000 + (offset - 0xff6) * 0x1000);
	212	space->machine().root_device().membank("9000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x4000 + (offset - 0xff6) * 0x1000);
214	213	}
215	214
216	215	static WRITE8_HANDLER( oss_034m_w )
r14976	r14977
219	218	{
220	219	case 0:
221	220	case 1:
222		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base());
223		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base() + 0x3000);
	221	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base());
	222	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
224	223	break;
225	224	case 2:
226	225	case 6:
227	226	// docs says this should put 0xff in the 0xa000 bank -> let's point to the end of the cart
228		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + 0x4000);
229		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base() + 0x3000);
	227	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x4000);
	228	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
230	229	break;
231	230	case 3:
232	231	case 7:
233		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + 0x1000);
234		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base() + 0x3000);
	232	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x1000);
	233	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
235	234	break;
236	235	case 4:
237	236	case 5:
238		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + 0x2000);
239		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base() + 0x3000);
	237	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x2000);
	238	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
240	239	break;
241	240	default:
242		memory_set_bankptr(space->machine(), "a000", space->machine().region("maincpu")->base() + 0xa000);
243		memory_set_bankptr(space->machine(), "b000", space->machine().region("maincpu")->base() + 0xb000);
	241	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xa000);
	242	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xb000);
244	243	break;
245	244	}
246	245	}
r14976	r14977
250	249	switch (offset & 0x09)
251	250	{
252	251	case 0:
253		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + 0x1000);
254		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base());
	252	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x1000);
	253	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base());
255	254	break;
256	255	case 1:
257		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + 0x3000);
258		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base());
	256	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
	257	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base());
259	258	break;
260	259	case 8:
261		memory_set_bankptr(space->machine(), "a000", space->machine().region("maincpu")->base() + 0xa000);
262		memory_set_bankptr(space->machine(), "b000", space->machine().region("maincpu")->base() + 0xb000);
	260	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xa000);
	261	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xb000);
263	262	break;
264	263	case 9:
265		memory_set_bankptr(space->machine(), "a000", space->machine().region("lslot")->base() + 0x2000);
266		memory_set_bankptr(space->machine(), "b000", space->machine().region("lslot")->base());
	264	space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x2000);
	265	space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base());
267	266	break;
268	267	}
269	268	}
r14976	r14977
285	284	static READ8_HANDLER( bbsb_bankl_r )
286	285	{
287	286	// return data from the selected bank (0,1,2,3)
288		UINT8 *mem = space->machine().region("lslot")->base();
	287	UINT8 *mem = space->machine().root_device().memregion("lslot")->base();
289	288	return &mem[0x0000 + bbsb_bankl * 0x1000];
290	289	}
291	290
292	291	static READ8_HANDLER( bbsb_bankh_r )
293	292	{
294	293	// return data from the selected bank (4,5,6,7)
295		UINT8 *mem = space->machine().region("lslot")->base();
	294	UINT8 *mem = space->machine().root_device().memregion("lslot")->base();
296	295	return &mem[0x4000 + bbsb_bankh * 0x1000];
297	296	}
298	297	#endif
r14976	r14977
516	515	size -= 0x10;
517	516	start = 0x10;
518	517	}
519		image.fread(image.device().machine().region("lslot")->base(), size - start);
	518	image.fread(image.device().machine().root_device().memregion("lslot")->base(), size - start);
520	519	}
521	520	else
522	521	{
523	522	size = image.get_software_region_length("rom");
524		memcpy(image.device().machine().region("lslot")->base(), image.get_software_region("rom"), size);
	523	memcpy(image.device().machine().root_device().memregion("lslot")->base(), image.get_software_region("rom"), size);
525	524	}
526	525
527	526	a800_cart_loaded |= (size > 0x0000) ? 1 : 0;
r14976	r14977
548	547	size -= 0x10;
549	548	start = 0x10;
550	549	}
551		image.fread(image.device().machine().region("rslot")->base(), size - start);
	550	image.fread(image.device().machine().root_device().memregion("rslot")->base(), size - start);
552	551	}
553	552	else
554	553	{
555	554	size = image.get_software_region_length("rom");
556		memcpy(image.device().machine().region("rslot")->base(), image.get_software_region("rom"), size);
	555	memcpy(image.device().machine().root_device().memregion("rslot")->base(), image.get_software_region("rom"), size);
557	556	}
558	557
559	558	a800_cart_loaded |= (size > 0x0000) ? 2 : 0;
r14976	r14977
604	603
605	604	DEVICE_IMAGE_LOAD( a5200_cart )
606	605	{
607		UINT8 *mem = image.device().machine().region("maincpu")->base();
	606	UINT8 *mem = image.device().machine().root_device().memregion("maincpu")->base();
608	607	UINT32 size;
609	608	bool A13_mirr = FALSE;
610	609
r14976	r14977
644	643
645	644	DEVICE_IMAGE_UNLOAD( a5200_cart )
646	645	{
647		UINT8 *mem = image.device().machine().region("maincpu")->base();
	646	UINT8 *mem = image.device().machine().root_device().memregion("maincpu")->base();
648	647	/* zap the cartridge memory (again) */
649	648	memset(&mem[0x4000], 0x00, 0x8000);
650	649	}
r14976	r14977
660	659
661	660	static WRITE8_HANDLER( xegs_bankswitch )
662	661	{
663		UINT8 *cart = space->machine().region("user1")->base();
	662	UINT8 *cart = space->machine().root_device().memregion("user1")->base();
664	663	data &= xegs_banks - 1;
665		memory_set_bankptr(space->machine(), "bank0", cart + data * 0x2000);
	664	space->machine().root_device().membank("bank0")->set_base(cart + data * 0x2000);
666	665	}
667	666
668	667	MACHINE_START( xegs )
669	668	{
670	669	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
671		UINT8 *cart = space->machine().region("user1")->base();
672		UINT8 *cpu  = space->machine().region("maincpu")->base();
	670	UINT8 *cart = space->machine().root_device().memregion("user1")->base();
	671	UINT8 *cpu  = space->machine().root_device().memregion("maincpu")->base();
673	672
674	673	atari_machine_start(machine);
675	674	space->install_legacy_write_handler(0xd500, 0xd5ff, FUNC(xegs_bankswitch));
676	675
677	676	if (xegs_cart)
678	677	{
679		memory_set_bankptr(machine, "bank0", cart);
680		memory_set_bankptr(machine, "bank1", cart + (xegs_banks - 1) * 0x2000);
	678	machine.root_device().membank("bank0")->set_base(cart);
	679	machine.root_device().membank("bank1")->set_base(cart + (xegs_banks - 1) * 0x2000);
681	680	}
682	681	else
683	682	{
684	683	// point to built-in Missile Command (this does not work well, though... FIXME!!)
685		memory_set_bankptr(machine, "bank0", cpu + 0x10000);
686		memory_set_bankptr(machine, "bank1", cpu + 0x10000);
	684	machine.root_device().membank("bank0")->set_base(cpu + 0x10000);
	685	machine.root_device().membank("bank1")->set_base(cpu + 0x10000);
687	686	}
688	687	}
689	688
690	689	DEVICE_IMAGE_LOAD( xegs_cart )
691	690	{
692	691	UINT32 size;
693		UINT8 *ptr = image.device().machine().region("user1")->base();
	692	UINT8 *ptr = image.device().machine().root_device().memregion("user1")->base();
694	693
695	694	if (image.software_entry() == NULL)
696	695	{

src/mess/machine/apple3.c

r14976	r14977
275	275	static void apple3_setbank(running_machine &machine,const char *mame_bank, UINT16 bank, offs_t offset)
276	276	{
277	277	UINT8 *ptr;
278
	278	apple3_state *state = machine.driver_data<apple3_state>();
279	279	ptr = apple3_bankaddr(machine,bank, offset);
280		memory_set_bankptr(machine, mame_bank, ptr);
	280	state->membank(mame_bank)->set_base(ptr);
281	281
282	282	if (LOG_MEMORY)
283	283	{
r14976	r14977
438	438	else
439	439	space->install_write_bank(0xF000, 0xFFFF, "bank7");
440	440	if (state->m_via_0_a & 0x01)
441		memory_set_bankptr(machine,"bank7", machine.region("maincpu")->base());
	441	state->membank("bank7")->set_base(machine.root_device().memregion("maincpu")->base());
442	442	else
443	443	apple3_setbank(machine,"bank7", ~0, 0x7000);
444	444
r14976	r14977
632	632	else if (addr != (UINT8 *) ~0)
633	633	result = *addr;
634	634	else
635		result = machine().region("maincpu")->base()[offset % machine().region("maincpu")->bytes()];
	635	result = memregion("maincpu")->base()[offset % memregion("maincpu")->bytes()];
636	636	return result;
637	637	}
638	638
r14976	r14977
718	718	{
719	719	apple3_state *state = machine.driver_data<apple3_state>();
720	720	/* hack to get around VIA problem */
721		machine.region("maincpu")->base()[0x0685] = 0x00;
	721	state->memregion("maincpu")->base()[0x0685] = 0x00;
722	722
723	723	state->m_enable_mask = 0;
724	724	apple3_update_drives(machine.device("fdc"));

src/mess/machine/dai.c

r14976	r14977
37	37
38	38	static void dai_update_memory(running_machine &machine, int dai_rom_bank)
39	39	{
40		memory_set_bank(machine, "bank2", dai_rom_bank);
	40	dai_state *state = machine.driver_data<dai_state>();
	41	state->membank("bank2")->set_entry(dai_rom_bank);
41	42	}
42	43
43	44	static TIMER_CALLBACK(dai_bootstrap_callback)
r14976	r14977
147	148	state->m_sound = machine.device("custom");
148	149	state->m_tms5501 = machine.device("tms5501");
149	150
150		memory_configure_bank(machine, "bank2", 0, 4, machine.region("maincpu")->base() + 0x010000, 0x1000);
	151	state->membank("bank2")->configure_entries(0, 4, state->memregion("maincpu")->base() + 0x010000, 0x1000);
151	152	machine.scheduler().timer_set(attotime::zero, FUNC(dai_bootstrap_callback));
152	153	machine.scheduler().timer_pulse(attotime::from_hz(100), FUNC(dai_timer));   /* timer for tms5501 */
153	154	}
154	155
155	156	MACHINE_RESET( dai )
156	157	{
157		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	158	dai_state *state = machine.driver_data<dai_state>();
	159	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
158	160	}
159	161
160	162	/***************************************************************************

src/mess/machine/cbmb.c

r14976	r14977
283	283	static void cbmb_common_driver_init( running_machine &machine )
284	284	{
285	285	cbmb_state *state = machine.driver_data<cbmb_state>();
286		state->m_chargen = machine.region("maincpu")->base() + 0x100000;
	286	state->m_chargen = state->memregion("maincpu")->base() + 0x100000;
287	287	/*    memset(c64_memory, 0, 0xfd00); */
288	288
289	289	machine.scheduler().timer_pulse(attotime::from_msec(10), FUNC(cbmb_frame_interrupt));
r14976	r14977
472	472	{
473	473	UINT32 size = image.length();
474	474	const char *filetype = image.filetype();
475		UINT8 *cbmb_memory = image.device().machine().region("maincpu")->base();
	475	UINT8 *cbmb_memory = image.device().machine().root_device().memregion("maincpu")->base();
476	476	int address = 0;
477	477
478	478	/* Assign loading address according to extension */

src/mess/machine/mbee.c

r14976	r14977
266	266	address_space *mem = m_maincpu->memory().space(AS_PROGRAM);
267	267
268	268	// primary low banks
269		memory_set_bank(machine(), "boot", (data & 3) | ((data & 0x20) >> 3));
270		memory_set_bank(machine(), "bank1", (data & 3) | ((data & 0x20) >> 3));
	269	membank("boot")->set_entry((data & 3) | ((data & 0x20) >> 3));
	270	membank("bank1")->set_entry((data & 3) | ((data & 0x20) >> 3));
271	271
272	272	// 9000-EFFF
273		memory_set_bank(machine(), "bank9", (data & 4) ? 1 : 0);
	273	membank("bank9")->set_entry((data & 4) ? 1 : 0);
274	274
275	275	// 8000-8FFF, F000-FFFF
276	276	mem->unmap_readwrite (0x8000, 0x87ff);
r14976	r14977
285	285	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
286	286	mem->install_readwrite_handler (0xf000, 0xf7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
287	287	mem->install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
288		memory_set_bank(machine(), "bank8l", 0); // rom
289		memory_set_bank(machine(), "bank8h", 0); // rom
	288	membank("bank8l")->set_entry(0); // rom
	289	membank("bank8h")->set_entry(0); // rom
290	290	break;
291	291	case 0x04:
292	292	mem->install_read_bank (0x8000, 0x87ff, "bank8l");
293	293	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
294	294	mem->install_readwrite_handler (0xf000, 0xf7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
295	295	mem->install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
296		memory_set_bank(machine(), "bank8l", 1); // ram
297		memory_set_bank(machine(), "bank8h", 1); // ram
	296	membank("bank8l")->set_entry(1); // ram
	297	membank("bank8h")->set_entry(1); // ram
298	298	break;
299	299	case 0x08:
300	300	case 0x18:
r14976	r14977
302	302	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
303	303	mem->install_read_bank (0xf000, 0xf7ff, "bankfl");
304	304	mem->install_read_bank (0xf800, 0xffff, "bankfh");
305		memory_set_bank(machine(), "bank8l", 0); // rom
306		memory_set_bank(machine(), "bank8h", 0); // rom
307		memory_set_bank(machine(), "bankfl", 0); // ram
308		memory_set_bank(machine(), "bankfh", 0); // ram
	305	membank("bank8l")->set_entry(0); // rom
	306	membank("bank8h")->set_entry(0); // rom
	307	membank("bankfl")->set_entry(0); // ram
	308	membank("bankfh")->set_entry(0); // ram
309	309	break;
310	310	case 0x0c:
311	311	case 0x1c:
r14976	r14977
313	313	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
314	314	mem->install_read_bank (0xf000, 0xf7ff, "bankfl");
315	315	mem->install_read_bank (0xf800, 0xffff, "bankfh");
316		memory_set_bank(machine(), "bank8l", 1); // ram
317		memory_set_bank(machine(), "bank8h", 1); // ram
318		memory_set_bank(machine(), "bankfl", 0); // ram
319		memory_set_bank(machine(), "bankfh", 0); // ram
	316	membank("bank8l")->set_entry(1); // ram
	317	membank("bank8h")->set_entry(1); // ram
	318	membank("bankfl")->set_entry(0); // ram
	319	membank("bankfh")->set_entry(0); // ram
320	320	break;
321	321	case 0x10:
322	322	case 0x14:
r14976	r14977
324	324	mem->install_readwrite_handler (0x8800, 0x8fff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
325	325	mem->install_read_bank (0xf000, 0xf7ff, "bankfl");
326	326	mem->install_read_bank (0xf800, 0xffff, "bankfh");
327		memory_set_bank(machine(), "bankfl", 0); // ram
328		memory_set_bank(machine(), "bankfh", 0); // ram
	327	membank("bankfl")->set_entry(0); // ram
	328	membank("bankfh")->set_entry(0); // ram
329	329	break;
330	330	}
331	331	}
r14976	r14977
348	348	address_space *mem = m_maincpu->memory().space(AS_PROGRAM);
349	349
350	350	// primary low banks
351		memory_set_bank(machine(), "boot", (data & 3));
352		memory_set_bank(machine(), "bank1", (data & 3));
	351	membank("boot")->set_entry((data & 3));
	352	membank("bank1")->set_entry((data & 3));
353	353
354	354	// 9000-EFFF
355		memory_set_bank(machine(), "bank9", (data & 4) ? 1 : 0);
	355	membank("bank9")->set_entry((data & 4) ? 1 : 0);
356	356
357	357	// 8000-8FFF, F000-FFFF
358	358	mem->unmap_readwrite (0x8000, 0x87ff);
r14976	r14977
367	367	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
368	368	mem->install_readwrite_handler (0xf000, 0xf7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r),this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w),this));
369	369	mem->install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r),this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w),this));
370		memory_set_bank(machine(), "bank8l", 0); // rom
371		memory_set_bank(machine(), "bank8h", 0); // rom
	370	membank("bank8l")->set_entry(0); // rom
	371	membank("bank8h")->set_entry(0); // rom
372	372	break;
373	373	case 0x04:
374	374	mem->install_read_bank (0x8000, 0x87ff, "bank8l");
375	375	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
376	376	mem->install_readwrite_handler (0xf000, 0xf7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r),this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w),this));
377	377	mem->install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r),this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w),this));
378		memory_set_bank(machine(), "bank8l", 1); // ram
379		memory_set_bank(machine(), "bank8h", 1); // ram
	378	membank("bank8l")->set_entry(1); // ram
	379	membank("bank8h")->set_entry(1); // ram
380	380	break;
381	381	case 0x08:
382	382	case 0x18:
r14976	r14977
384	384	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
385	385	mem->install_read_bank (0xf000, 0xf7ff, "bankfl");
386	386	mem->install_read_bank (0xf800, 0xffff, "bankfh");
387		memory_set_bank(machine(), "bank8l", 0); // rom
388		memory_set_bank(machine(), "bank8h", 0); // rom
389		memory_set_bank(machine(), "bankfl", 0); // ram
390		memory_set_bank(machine(), "bankfh", 0); // ram
	387	membank("bank8l")->set_entry(0); // rom
	388	membank("bank8h")->set_entry(0); // rom
	389	membank("bankfl")->set_entry(0); // ram
	390	membank("bankfh")->set_entry(0); // ram
391	391	break;
392	392	case 0x0c:
393	393	case 0x1c:
r14976	r14977
395	395	mem->install_read_bank (0x8800, 0x8fff, "bank8h");
396	396	mem->install_read_bank (0xf000, 0xf7ff, "bankfl");
397	397	mem->install_read_bank (0xf800, 0xffff, "bankfh");
398		memory_set_bank(machine(), "bank8l", 1); // ram
399		memory_set_bank(machine(), "bank8h", 1); // ram
400		memory_set_bank(machine(), "bankfl", 0); // ram
401		memory_set_bank(machine(), "bankfh", 0); // ram
	398	membank("bank8l")->set_entry(1); // ram
	399	membank("bank8h")->set_entry(1); // ram
	400	membank("bankfl")->set_entry(0); // ram
	401	membank("bankfh")->set_entry(0); // ram
402	402	break;
403	403	case 0x10:
404	404	case 0x14:
r14976	r14977
406	406	mem->install_readwrite_handler (0x8800, 0x8fff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r),this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w),this));
407	407	mem->install_read_bank (0xf000, 0xf7ff, "bankfl");
408	408	mem->install_read_bank (0xf800, 0xffff, "bankfh");
409		memory_set_bank(machine(), "bankfl", 0); // ram
410		memory_set_bank(machine(), "bankfh", 0); // ram
	409	membank("bankfl")->set_entry(0); // ram
	410	membank("bankfh")->set_entry(0); // ram
411	411	break;
412	412	}
413	413	}
r14976	r14977
428	428	{
429	429	if BIT(data, 2)
430	430	{
431		memory_set_bank(machine(), "boot", 0);
432		memory_set_bank(machine(), "bankl", 0);
433		memory_set_bank(machine(), "bankh", 0);
	431	membank("boot")->set_entry(0);
	432	membank("bankl")->set_entry(0);
	433	membank("bankh")->set_entry(0);
434	434	}
435	435	else
436	436	{
437		memory_set_bank(machine(), "bankl", 1);
438		memory_set_bank(machine(), "bankh", 1);
	437	membank("bankl")->set_entry(1);
	438	membank("bankh")->set_entry(1);
439	439	}
440	440	}
441	441
r14976	r14977
464	464	WRITE8_MEMBER( mbee_state::mbeeic_0a_w )
465	465	{
466	466	m_0a = data;
467		memory_set_bank(machine(), "pak", data & 15);
	467	membank("pak")->set_entry(data & 15);
468	468	}
469	469
470	470	READ8_MEMBER( mbee_state::mbeepc_telcom_low_r )
471	471	{
472	472	/* Read of port 0A - set Telcom rom to first half */
473		memory_set_bank(machine(), "telcom", 0);
	473	membank("telcom")->set_entry(0);
474	474	return m_0a;
475	475	}
476	476
477	477	READ8_MEMBER( mbee_state::mbeepc_telcom_high_r )
478	478	{
479	479	/* Read of port 10A - set Telcom rom to 2nd half */
480		memory_set_bank(machine(), "telcom", 1);
	480	membank("telcom")->set_entry(1);
481	481	return m_0a;
482	482	}
483	483
r14976	r14977
497	497	/* after the first 4 bytes have been read from ROM, switch the ram back in */
498	498	static TIMER_CALLBACK( mbee_reset )
499	499	{
500		memory_set_bank(machine, "boot", 0);
	500	mbee_state *state = machine.driver_data<mbee_state>();
	501	state->membank("boot")->set_entry(0);
501	502	}
502	503
503	504	static void machine_reset_common_disk(running_machine &machine)
r14976	r14977
510	511
511	512	MACHINE_RESET( mbee )
512	513	{
513		memory_set_bank(machine, "boot", 1);
	514	mbee_state *state = machine.driver_data<mbee_state>();
	515	state->membank("boot")->set_entry(1);
514	516	machine.scheduler().timer_set(attotime::from_usec(4), FUNC(mbee_reset));
515	517	}
516	518
517	519	MACHINE_RESET( mbee56 )
518	520	{
	521	mbee_state *state = machine.driver_data<mbee_state>();
519	522	machine_reset_common_disk(machine);
520		memory_set_bank(machine, "boot", 1);
	523	state->membank("boot")->set_entry(1);
521	524	machine.scheduler().timer_set(attotime::from_usec(4), FUNC(mbee_reset));
522	525	}
523	526
524	527	MACHINE_RESET( mbee64 )
525	528	{
	529	mbee_state *state = machine.driver_data<mbee_state>();
526	530	machine_reset_common_disk(machine);
527		memory_set_bank(machine, "boot", 1);
528		memory_set_bank(machine, "bankl", 1);
529		memory_set_bank(machine, "bankh", 1);
	531	state->membank("boot")->set_entry(1);
	532	state->membank("bankl")->set_entry(1);
	533	state->membank("bankh")->set_entry(1);
530	534	}
531	535
532	536	MACHINE_RESET( mbee128 )
r14976	r14977
535	539	address_space *mem = machine.device("maincpu")->memory().space(AS_PROGRAM);
536	540	machine_reset_common_disk(machine);
537	541	state->mbee128_50_w(*mem,0,0); // set banks to default
538		memory_set_bank(machine, "boot", 4); // boot time
	542	state->membank("boot")->set_entry(4); // boot time
539	543	}
540	544
541	545	MACHINE_RESET( mbee256 )
r14976	r14977
547	551	for (i = 0; i < 15; i++) state->m_mbee256_was_pressed[i] = 0;
548	552	state->m_mbee256_q_pos = 0;
549	553	state->mbee256_50_w(*mem,0,0); // set banks to default
550		memory_set_bank(machine, "boot", 8); // boot time
	554	state->membank("boot")->set_entry(8); // boot time
551	555	machine.scheduler().timer_set(attotime::from_usec(4), FUNC(mbee_reset));
552	556	}
553	557
r14976	r14977
557	561	UINT8 i;
558	562	for (i = 0; i < 15; i++) state->m_mbee256_was_pressed[i] = 0;
559	563	state->m_mbee256_q_pos = 0;
560		memory_set_bank(machine, "boot", 1);
	564	state->membank("boot")->set_entry(1);
561	565	machine.scheduler().timer_set(attotime::from_usec(4), FUNC(mbee_reset));
562	566	}
563	567
r14976	r14977
588	592	DRIVER_INIT( mbee )
589	593	{
590	594	mbee_state *state = machine.driver_data<mbee_state>();
591		UINT8 *RAM = machine.region("maincpu")->base();
592		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x8000);
	595	UINT8 *RAM = state->memregion("maincpu")->base();
	596	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x8000);
593	597	state->m_size = 0x4000;
594	598	}
595	599
596	600	DRIVER_INIT( mbeeic )
597	601	{
598	602	mbee_state *state = machine.driver_data<mbee_state>();
599		UINT8 *RAM = machine.region("maincpu")->base();
600		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x8000);
	603	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	604	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x8000);
601	605
602		RAM = machine.region("pakrom")->base();
603		memory_configure_bank(machine, "pak", 0, 16, &RAM[0x0000], 0x2000);
	606	RAM = state->memregion("pakrom")->base();
	607	state->membank("pak")->configure_entries(0, 16, &RAM[0x0000], 0x2000);
604	608
605		memory_set_bank(machine, "pak", 0);
	609	state->membank("pak")->set_entry(0);
606	610	state->m_size = 0x8000;
607	611	}
608	612
609	613	DRIVER_INIT( mbeepc )
610	614	{
611	615	mbee_state *state = machine.driver_data<mbee_state>();
612		UINT8 *RAM = machine.region("maincpu")->base();
613		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x8000);
	616	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	617	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x8000);
614	618
615		RAM = machine.region("telcomrom")->base();
616		memory_configure_bank(machine, "telcom", 0, 2, &RAM[0x0000], 0x1000);
	619	RAM = machine.root_device().memregion("telcomrom")->base();
	620	state->membank("telcom")->configure_entries(0, 2, &RAM[0x0000], 0x1000);
617	621
618		RAM = machine.region("pakrom")->base();
619		memory_configure_bank(machine, "pak", 0, 16, &RAM[0x0000], 0x2000);
	622	RAM = state->memregion("pakrom")->base();
	623	state->membank("pak")->configure_entries(0, 16, &RAM[0x0000], 0x2000);
620	624
621		memory_set_bank(machine, "pak", 0);
622		memory_set_bank(machine, "telcom", 0);
	625	state->membank("pak")->set_entry(0);
	626	state->membank("telcom")->set_entry(0);
623	627	state->m_size = 0x8000;
624	628	}
625	629
626	630	DRIVER_INIT( mbeepc85 )
627	631	{
628	632	mbee_state *state = machine.driver_data<mbee_state>();
629		UINT8 *RAM = machine.region("maincpu")->base();
630		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x8000);
	633	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	634	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x8000);
631	635
632		RAM = machine.region("telcomrom")->base();
633		memory_configure_bank(machine, "telcom", 0, 2, &RAM[0x0000], 0x1000);
	636	RAM = machine.root_device().memregion("telcomrom")->base();
	637	state->membank("telcom")->configure_entries(0, 2, &RAM[0x0000], 0x1000);
634	638
635		RAM = machine.region("pakrom")->base();
636		memory_configure_bank(machine, "pak", 0, 16, &RAM[0x0000], 0x2000);
	639	RAM = state->memregion("pakrom")->base();
	640	state->membank("pak")->configure_entries(0, 16, &RAM[0x0000], 0x2000);
637	641
638		memory_set_bank(machine, "pak", 5);
639		memory_set_bank(machine, "telcom", 0);
	642	state->membank("pak")->set_entry(5);
	643	state->membank("telcom")->set_entry(0);
640	644	state->m_size = 0x8000;
641	645	}
642	646
643	647	DRIVER_INIT( mbeeppc )
644	648	{
645	649	mbee_state *state = machine.driver_data<mbee_state>();
646		UINT8 *RAM = machine.region("maincpu")->base();
647		memory_configure_bank(machine, "boot", 0, 1, &RAM[0x0000], 0x0000);
	650	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	651	state->membank("boot")->configure_entry(0, &RAM[0x0000]);
648	652
649		RAM = machine.region("basicrom")->base();
650		memory_configure_bank(machine, "basic", 0, 2, &RAM[0x0000], 0x2000);
651		memory_configure_bank(machine, "boot", 1, 1, &RAM[0x0000], 0x0000);
	653	RAM = machine.root_device().memregion("basicrom")->base();
	654	state->membank("basic")->configure_entries(0, 2, &RAM[0x0000], 0x2000);
	655	state->membank("boot")->configure_entry(1, &RAM[0x0000]);
652	656
653		RAM = machine.region("telcomrom")->base();
654		memory_configure_bank(machine, "telcom", 0, 2, &RAM[0x0000], 0x1000);
	657	RAM = machine.root_device().memregion("telcomrom")->base();
	658	state->membank("telcom")->configure_entries(0, 2, &RAM[0x0000], 0x1000);
655	659
656		RAM = machine.region("pakrom")->base();
657		memory_configure_bank(machine, "pak", 0, 16, &RAM[0x0000], 0x2000);
	660	RAM = state->memregion("pakrom")->base();
	661	state->membank("pak")->configure_entries(0, 16, &RAM[0x0000], 0x2000);
658	662
659		memory_set_bank(machine, "pak", 5);
660		memory_set_bank(machine, "telcom", 0);
661		memory_set_bank(machine, "basic", 0);
	663	state->membank("pak")->set_entry(5);
	664	state->membank("telcom")->set_entry(0);
	665	state->membank("basic")->set_entry(0);
662	666	state->m_size = 0x8000;
663	667	}
664	668
665	669	DRIVER_INIT( mbee56 )
666	670	{
667	671	mbee_state *state = machine.driver_data<mbee_state>();
668		UINT8 *RAM = machine.region("maincpu")->base();
669		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xe000);
	672	UINT8 *RAM = state->memregion("maincpu")->base();
	673	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xe000);
670	674	state->m_size = 0xe000;
671	675	}
672	676
673	677	DRIVER_INIT( mbee64 )
674	678	{
675	679	mbee_state *state = machine.driver_data<mbee_state>();
676		UINT8 *RAM = machine.region("maincpu")->base();
677		memory_configure_bank(machine, "boot", 0, 1, &RAM[0x0000], 0x0000);
678		memory_configure_bank(machine, "bankl", 0, 1, &RAM[0x1000], 0x0000);
679		memory_configure_bank(machine, "bankl", 1, 1, &RAM[0x9000], 0x0000);
680		memory_configure_bank(machine, "bankh", 0, 1, &RAM[0x8000], 0x0000);
	680	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	681	state->membank("boot")->configure_entry(0, &RAM[0x0000]);
	682	state->membank("bankl")->configure_entry(0, &RAM[0x1000]);
	683	state->membank("bankl")->configure_entry(1, &RAM[0x9000]);
	684	state->membank("bankh")->configure_entry(0, &RAM[0x8000]);
681	685
682		RAM = machine.region("bootrom")->base();
683		memory_configure_bank(machine, "bankh", 1, 1, &RAM[0x0000], 0x0000);
684		memory_configure_bank(machine, "boot", 1, 1, &RAM[0x0000], 0x0000);
	686	RAM = state->memregion("bootrom")->base();
	687	state->membank("bankh")->configure_entry(1, &RAM[0x0000]);
	688	state->membank("boot")->configure_entry(1, &RAM[0x0000]);
685	689
686	690	state->m_size = 0xf000;
687	691	}
r14976	r14977
689	693	DRIVER_INIT( mbee128 )
690	694	{
691	695	mbee_state *state = machine.driver_data<mbee_state>();
692		UINT8 *RAM = machine.region("maincpu")->base();
693		memory_configure_bank(machine, "boot", 0, 4, &RAM[0x0000], 0x8000); // standard banks 0000
694		memory_configure_bank(machine, "bank1", 0, 4, &RAM[0x1000], 0x8000); // standard banks 1000
695		memory_configure_bank(machine, "bank8l", 1, 1, &RAM[0x0000], 0x0000); // shadow ram
696		memory_configure_bank(machine, "bank8h", 1, 1, &RAM[0x0800], 0x0000); // shadow ram
697		memory_configure_bank(machine, "bank9", 1, 1, &RAM[0x1000], 0x0000); // shadow ram
698		memory_configure_bank(machine, "bankfl", 0, 1, &RAM[0xf000], 0x0000); // shadow ram
699		memory_configure_bank(machine, "bankfh", 0, 1, &RAM[0xf800], 0x0000); // shadow ram
	696	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	697	state->membank("boot")->configure_entries(0, 4, &RAM[0x0000], 0x8000); // standard banks 0000
	698	state->membank("bank1")->configure_entries(0, 4, &RAM[0x1000], 0x8000); // standard banks 1000
	699	state->membank("bank8l")->configure_entry(1, &RAM[0x0000]); // shadow ram
	700	state->membank("bank8h")->configure_entry(1, &RAM[0x0800]); // shadow ram
	701	state->membank("bank9")->configure_entry(1, &RAM[0x1000]); // shadow ram
	702	state->membank("bankfl")->configure_entry(0, &RAM[0xf000]); // shadow ram
	703	state->membank("bankfh")->configure_entry(0, &RAM[0xf800]); // shadow ram
700	704
701		RAM = machine.region("bootrom")->base();
702		memory_configure_bank(machine, "bank9", 0, 1, &RAM[0x1000], 0x0000); // rom
703		memory_configure_bank(machine, "boot", 4, 1, &RAM[0x0000], 0x0000); // rom at boot for 4usec
704		memory_configure_bank(machine, "bank8l", 0, 1, &RAM[0x0000], 0x0000); // rom
705		memory_configure_bank(machine, "bank8h", 0, 1, &RAM[0x0800], 0x0000); // rom
	705	RAM = state->memregion("bootrom")->base();
	706	state->membank("bank9")->configure_entry(0, &RAM[0x1000]); // rom
	707	state->membank("boot")->configure_entry(4, &RAM[0x0000]); // rom at boot for 4usec
	708	state->membank("bank8l")->configure_entry(0, &RAM[0x0000]); // rom
	709	state->membank("bank8h")->configure_entry(0, &RAM[0x0800]); // rom
706	710
707	711	state->m_size = 0x8000;
708	712	}
r14976	r14977
710	714	DRIVER_INIT( mbee256 )
711	715	{
712	716	mbee_state *state = machine.driver_data<mbee_state>();
713		UINT8 *RAM = machine.region("maincpu")->base();
714		memory_configure_bank(machine, "boot", 0, 8, &RAM[0x0000], 0x8000); // standard banks 0000
715		memory_configure_bank(machine, "bank1", 0, 8, &RAM[0x1000], 0x8000); // standard banks 1000
716		memory_configure_bank(machine, "bank8l", 1, 1, &RAM[0x0000], 0x0000); // shadow ram
717		memory_configure_bank(machine, "bank8h", 1, 1, &RAM[0x0800], 0x0000); // shadow ram
718		memory_configure_bank(machine, "bank9", 1, 1, &RAM[0x1000], 0x0000); // shadow ram
719		memory_configure_bank(machine, "bankfl", 0, 1, &RAM[0xf000], 0x0000); // shadow ram
720		memory_configure_bank(machine, "bankfh", 0, 1, &RAM[0xf800], 0x0000); // shadow ram
	717	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	718	state->membank("boot")->configure_entries(0, 8, &RAM[0x0000], 0x8000); // standard banks 0000
	719	state->membank("bank1")->configure_entries(0, 8, &RAM[0x1000], 0x8000); // standard banks 1000
	720	state->membank("bank8l")->configure_entry(1, &RAM[0x0000]); // shadow ram
	721	state->membank("bank8h")->configure_entry(1, &RAM[0x0800]); // shadow ram
	722	state->membank("bank9")->configure_entry(1, &RAM[0x1000]); // shadow ram
	723	state->membank("bankfl")->configure_entry(0, &RAM[0xf000]); // shadow ram
	724	state->membank("bankfh")->configure_entry(0, &RAM[0xf800]); // shadow ram
721	725
722		RAM = machine.region("bootrom")->base();
723		memory_configure_bank(machine, "bank9", 0, 1, &RAM[0x1000], 0x0000); // rom
724		memory_configure_bank(machine, "boot", 8, 1, &RAM[0x0000], 0x0000); // rom at boot for 4usec
725		memory_configure_bank(machine, "bank8l", 0, 1, &RAM[0x0000], 0x0000); // rom
726		memory_configure_bank(machine, "bank8h", 0, 1, &RAM[0x0800], 0x0000); // rom
	726	RAM = state->memregion("bootrom")->base();
	727	state->membank("bank9")->configure_entry(0, &RAM[0x1000]); // rom
	728	state->membank("boot")->configure_entry(8, &RAM[0x0000]); // rom at boot for 4usec
	729	state->membank("bank8l")->configure_entry(0, &RAM[0x0000]); // rom
	730	state->membank("bank8h")->configure_entry(0, &RAM[0x0800]); // rom
727	731
728	732	machine.scheduler().timer_pulse(attotime::from_hz(1), FUNC(mbee_rtc_irq));   /* timer for rtc */
729	733	machine.scheduler().timer_pulse(attotime::from_hz(25), FUNC(mbee256_kbd));   /* timer for kbd */
r14976	r14977
734	738	DRIVER_INIT( mbeett )
735	739	{
736	740	mbee_state *state = machine.driver_data<mbee_state>();
737		UINT8 *RAM = machine.region("maincpu")->base();
738		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x8000);
	741	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	742	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x8000);
739	743
740		RAM = machine.region("telcomrom")->base();
741		memory_configure_bank(machine, "telcom", 0, 2, &RAM[0x0000], 0x1000);
	744	RAM = machine.root_device().memregion("telcomrom")->base();
	745	state->membank("telcom")->configure_entries(0, 2, &RAM[0x0000], 0x1000);
742	746
743		RAM = machine.region("pakrom")->base();
744		memory_configure_bank(machine, "pak", 0, 16, &RAM[0x0000], 0x2000);
	747	RAM = state->memregion("pakrom")->base();
	748	state->membank("pak")->configure_entries(0, 16, &RAM[0x0000], 0x2000);
745	749
746		memory_set_bank(machine, "pak", 5);
747		memory_set_bank(machine, "telcom", 0);
	750	state->membank("pak")->set_entry(5);
	751	state->membank("telcom")->set_entry(0);
748	752
749	753	machine.scheduler().timer_pulse(attotime::from_hz(1), FUNC(mbee_rtc_irq));   /* timer for rtc */
750	754	machine.scheduler().timer_pulse(attotime::from_hz(25), FUNC(mbee256_kbd));   /* timer for kbd */

src/mess/machine/msx_slot.c

r14976	r14977
35	35	switch (page)
36	36	{
37	37	case 1:
38		memory_set_bankptr (machine,"bank1", mem);
	38	state->membank ("bank1")->set_base (mem);
39	39	break;
40	40	case 2:
41		memory_set_bankptr (machine,"bank2", mem);
	41	state->membank ("bank2")->set_base (mem);
42	42	break;
43	43	case 3:
44		memory_set_bankptr (machine,"bank3", mem);
	44	state->membank ("bank3")->set_base (mem);
45	45	break;
46	46	case 4:
47		memory_set_bankptr (machine,"bank4", mem);
48		memory_set_bankptr (machine,"bank5", mem + 0x1ff8);
	47	state->membank ("bank4")->set_base (mem);
	48	state->membank ("bank5")->set_base (mem + 0x1ff8);
49	49	space->install_read_bank(0x7ff8, 0x7fff, "bank5");
50	50	break;
51	51	case 5:
52		memory_set_bankptr (machine,"bank6", mem);
53		memory_set_bankptr (machine,"bank7", mem + 0x1800);
	52	state->membank ("bank6")->set_base (mem);
	53	state->membank ("bank7")->set_base (mem + 0x1800);
54	54	space->install_read_bank(0x9800, 0x9fff, "bank7");
55	55	break;
56	56	case 6:
57		memory_set_bankptr (machine,"bank8", mem);
58		memory_set_bankptr (machine,"bank9", mem + 0x1800);
	57	state->membank ("bank8")->set_base (mem);
	58	state->membank ("bank9")->set_base (mem + 0x1800);
59	59	space->install_read_bank(0xb800, 0xbfff, "bank9");
60	60	break;
61	61	case 7:
62		memory_set_bankptr (machine,"bank10", mem);
	62	state->membank ("bank10")->set_base (mem);
63	63	break;
64	64	case 8:
65		memory_set_bankptr (machine,"bank11", mem);
	65	state->membank ("bank11")->set_base (mem);
66	66	state->m_top_page = mem;
67	67	break;
68	68	}

src/mess/machine/pc1350.c

r14976	r14977
105	105	machine.scheduler().timer_set(attotime::from_seconds(1), FUNC(pc1350_power_up));
106	106
107	107	space->install_readwrite_bank(0x6000, 0x6fff, "bank1");
108		memory_set_bankptr(machine, "bank1", &machine.device<ram_device>(RAM_TAG)->pointer()[0x0000]);
	108	state->membank("bank1")->set_base(&machine.device<ram_device>(RAM_TAG)->pointer()[0x0000]);
109	109
110	110	if (machine.device<ram_device>(RAM_TAG)->size() >= 0x3000)
111	111	{
112	112	space->install_readwrite_bank(0x4000, 0x5fff, "bank2");
113		memory_set_bankptr(machine, "bank2", &machine.device<ram_device>(RAM_TAG)->pointer()[0x1000]);
	113	state->membank("bank2")->set_base(&machine.device<ram_device>(RAM_TAG)->pointer()[0x1000]);
114	114	}
115	115	else
116	116	{
r14976	r14977
120	120	if (machine.device<ram_device>(RAM_TAG)->size() >= 0x5000)
121	121	{
122	122	space->install_readwrite_bank(0x2000, 0x3fff, "bank3");
123		memory_set_bankptr(machine, "bank3", &machine.device<ram_device>(RAM_TAG)->pointer()[0x3000]);
	123	state->membank("bank3")->set_base(&machine.device<ram_device>(RAM_TAG)->pointer()[0x3000]);
124	124	}
125	125	else
126	126	{
r14976	r14977
128	128	}
129	129
130	130	device_t *main_cpu = machine.device("maincpu");
131		UINT8 *ram = machine.region("maincpu")->base() + 0x2000;
	131	UINT8 *ram = machine.root_device().memregion("maincpu")->base() + 0x2000;
132	132	UINT8 *cpu = sc61860_internal_ram(main_cpu);
133	133
134	134	machine.device<nvram_device>("cpu_nvram")->set_base(cpu, 96);

src/mess/machine/pokemini.c

r14976	r14977
1396	1396	image.fseek(0x2100, SEEK_SET);
1397	1397	size -= 0x2100;
1398	1398
1399		if (size != image.fread( image.device().machine().region("maincpu")->base() + 0x2100, size))
	1399	if (size != image.fread( image.device().machine().root_device().memregion("maincpu")->base() + 0x2100, size))
1400	1400	{
1401	1401	image.seterror(IMAGE_ERROR_UNSPECIFIED, "Error occurred while reading ROM image");
1402	1402	return IMAGE_INIT_FAIL;
r14976	r14977
1406	1406	{
1407	1407	UINT8 *cart_rom = image.get_software_region("rom");
1408	1408	UINT32 cart_rom_size = image.get_software_region_length("rom");
1409		memcpy(image.device().machine().region("maincpu")->base() + 0x2100, cart_rom + 0x2100, cart_rom_size - 0x2100);
	1409	memcpy(image.device().machine().root_device().memregion("maincpu")->base() + 0x2100, cart_rom + 0x2100, cart_rom_size - 0x2100);
1410	1410	}
1411	1411
1412	1412	return IMAGE_INIT_PASS;

src/mess/machine/gamecom.c

r14976	r14977
7	7
8	8	static TIMER_CALLBACK(gamecom_clock_timer_callback)
9	9	{
10		UINT8 * RAM = machine.region("maincpu")->base();
	10	UINT8 * RAM = machine.root_device().memregion("maincpu")->base();
11	11	UINT8 val = ( ( RAM[SM8521_CLKT] & 0x3F ) + 1 ) & 0x3F;
12	12	RAM[SM8521_CLKT] = ( RAM[SM8521_CLKT] & 0xC0 ) | val;
13	13	cputag_set_input_line(machine, "maincpu", CK_INT, ASSERT_LINE );
r14976	r14977
16	16	MACHINE_RESET( gamecom )
17	17	{
18	18	gamecom_state *state = machine.driver_data<gamecom_state>();
19		UINT8 *rom = machine.region("kernel")->base();
20		memory_set_bankptr( machine, "bank1", rom );
21		memory_set_bankptr( machine, "bank2", rom );
22		memory_set_bankptr( machine, "bank3", rom );
23		memory_set_bankptr( machine, "bank4", rom );
	19	UINT8 *rom = state->memregion("kernel")->base();
	20	state->membank( "bank1" )->set_base( rom );
	21	state->membank( "bank2" )->set_base( rom );
	22	state->membank( "bank3" )->set_base( rom );
	23	state->membank( "bank4" )->set_base( rom );
24	24
25	25	state->m_cartridge = NULL;
26	26	}
r14976	r14977
32	32	if (data < 0x20)
33	33	{
34	34	/* select internal ROM bank */
35		memory_set_bankptr( machine(), bank, machine().region("kernel")->base() + (data << 13) );
	35	membank( bank )->set_base( memregion("kernel")->base() + (data << 13) );
36	36	}
37	37	else
38	38	{
39	39	/* select cartridge bank */
40	40	if ( m_cartridge )
41		memory_set_bankptr( machine(), bank, m_cartridge + ( data << 13 ) );
	41	membank( bank )->set_base( m_cartridge + ( data << 13 ) );
42	42	}
43	43	}
44	44
r14976	r14977
345	345	void gamecom_handle_dma( device_t *device, int cycles )
346	346	{
347	347	gamecom_state *state = device->machine().driver_data<gamecom_state>();
348		UINT8 * RAM = device->machine().region("maincpu")->base();
	348	UINT8 * RAM = device->machine().root_device().memregion("maincpu")->base();
349	349	UINT8 data = RAM[SM8521_DMC];
350	350	state->m_dma.overwrite_mode = data & 0x01;
351	351	state->m_dma.transfer_mode = data & 0x06;
r14976	r14977
391	391	state->m_dma.source_width = 64;
392	392	state->m_dma.source_mask = 0x3FFF;
393	393	if ( RAM[SM8521_DMBR] < 16 )
394		state->m_dma.source_bank = device->machine().region("kernel")->base() + (RAM[SM8521_DMBR] << 14);
	394	state->m_dma.source_bank = state->memregion("kernel")->base() + (RAM[SM8521_DMBR] << 14);
395	395	else
396	396	if (state->m_cartridge)
397	397	state->m_dma.source_bank = state->m_cartridge + (RAM[SM8521_DMBR] << 14);
r14976	r14977
504	504	void gamecom_update_timers( device_t *device, int cycles )
505	505	{
506	506	gamecom_state *state = device->machine().driver_data<gamecom_state>();
507		UINT8 * RAM = device->machine().region("maincpu")->base();
	507	UINT8 * RAM = state->memregion("maincpu")->base();
508	508	if ( state->m_timer[0].enabled )
509	509	{
510	510	state->m_timer[0].state_count += cycles;
r14976	r14977
539	539	{
540	540	gamecom_state *state = machine.driver_data<gamecom_state>();
541	541	state->m_clock_timer = machine.scheduler().timer_alloc(FUNC(gamecom_clock_timer_callback));
542		state->m_p_ram = machine.region("maincpu")->base(); // required here because pio_w gets called before machine_reset
	542	state->m_p_ram = state->memregion("maincpu")->base(); // required here because pio_w gets called before machine_reset
543	543	}
544	544
545	545	DEVICE_IMAGE_LOAD( gamecom_cart1 )
r14976	r14977
548	548	UINT32 filesize;
549	549	UINT32 load_offset = 0;
550	550
551		state->m_cartridge1 = image.device().machine().region("cart1")->base();
	551	state->m_cartridge1 = state->memregion("cart1")->base();
552	552
553	553	if (image.software_entry() == NULL)
554	554	filesize = image.length();
r14976	r14977
595	595	UINT32 filesize;
596	596	UINT32 load_offset = 0;
597	597
598		state->m_cartridge2 = image.device().machine().region("cart2")->base();
	598	state->m_cartridge2 = state->memregion("cart2")->base();
599	599
600	600	//  if (image.software_entry() == NULL)
601	601	filesize = image.length();

src/mess/machine/coco_pak.c

r14976	r14977
113	113
114	114	UINT8* coco_pak_device::get_cart_base()
115	115	{
116		return subregion(CARTSLOT_TAG)->base();
	116	return memregion(CARTSLOT_TAG)->base();
117	117	}
118	118
119	119	/***************************************************************************
r14976	r14977
169	169	{
170	170	UINT64 pos;
171	171	UINT32 i;
172		UINT8 *rom = subregion(CARTSLOT_TAG)->base();
173		UINT32 rom_length = subregion(CARTSLOT_TAG)->bytes();
	172	UINT8 *rom = memregion(CARTSLOT_TAG)->base();
	173	UINT32 rom_length = memregion(CARTSLOT_TAG)->bytes();
174	174
175	175	pos = (bank * 0x4000) % m_cart->length();
176	176

src/mess/machine/pmd85.c

r14976	r14977
33	33
34	34	if (state->m_startup_mem_map)
35	35	{
36		UINT8 *mem = machine.region("maincpu")->base();
	36	UINT8 *mem = state->memregion("maincpu")->base();
37	37
38	38	space->unmap_write(0x0000, 0x0fff);
39	39	space->nop_write(0x1000, 0x1fff);
r14976	r14977
43	43	space->nop_read(0x1000, 0x1fff);
44	44	space->nop_read(0x3000, 0x3fff);
45	45
46		memory_set_bankptr(machine, "bank1", mem + 0x010000);
47		memory_set_bankptr(machine, "bank3", mem + 0x010000);
48		memory_set_bankptr(machine, "bank5", ram + 0xc000);
	46	state->membank("bank1")->set_base(mem + 0x010000);
	47	state->membank("bank3")->set_base(mem + 0x010000);
	48	state->membank("bank5")->set_base(ram + 0xc000);
49	49
50		memory_set_bankptr(machine, "bank6", mem + 0x010000);
51		memory_set_bankptr(machine, "bank7", mem + 0x010000);
52		memory_set_bankptr(machine, "bank8", ram + 0xc000);
	50	state->membank("bank6")->set_base(mem + 0x010000);
	51	state->membank("bank7")->set_base(mem + 0x010000);
	52	state->membank("bank8")->set_base(ram + 0xc000);
53	53	}
54	54	else
55	55	{
r14976	r14977
62	62	space->install_read_bank(0x1000, 0x1fff, "bank2");
63	63	space->install_read_bank(0x3000, 0x3fff, "bank4");
64	64
65		memory_set_bankptr(machine, "bank1", ram);
66		memory_set_bankptr(machine, "bank2", ram + 0x1000);
67		memory_set_bankptr(machine, "bank3", ram + 0x2000);
68		memory_set_bankptr(machine, "bank4", ram + 0x3000);
69		memory_set_bankptr(machine, "bank5", ram + 0x4000);
	65	state->membank("bank1")->set_base(ram);
	66	state->membank("bank2")->set_base(ram + 0x1000);
	67	state->membank("bank3")->set_base(ram + 0x2000);
	68	state->membank("bank4")->set_base(ram + 0x3000);
	69	state->membank("bank5")->set_base(ram + 0x4000);
70	70	}
71	71	}
72	72
r14976	r14977
78	78
79	79	if (state->m_startup_mem_map)
80	80	{
81		UINT8 *mem = machine.region("maincpu")->base();
	81	UINT8 *mem = state->memregion("maincpu")->base();
82	82
83	83	space->unmap_write(0x0000, 0x0fff);
84	84	space->unmap_write(0x2000, 0x2fff);
85	85
86		memory_set_bankptr(machine, "bank1", mem + 0x010000);
87		memory_set_bankptr(machine, "bank2", ram + 0x9000);
88		memory_set_bankptr(machine, "bank3", mem + 0x010000);
89		memory_set_bankptr(machine, "bank4", ram + 0xb000);
90		memory_set_bankptr(machine, "bank5", ram + 0xc000);
91		memory_set_bankptr(machine, "bank6", mem + 0x010000);
92		memory_set_bankptr(machine, "bank7", ram + 0x9000);
93		memory_set_bankptr(machine, "bank8", mem + 0x010000);
94		memory_set_bankptr(machine, "bank9", ram + 0xb000);
95		memory_set_bankptr(machine, "bank10", ram + 0xc000);
	86	state->membank("bank1")->set_base(mem + 0x010000);
	87	state->membank("bank2")->set_base(ram + 0x9000);
	88	state->membank("bank3")->set_base(mem + 0x010000);
	89	state->membank("bank4")->set_base(ram + 0xb000);
	90	state->membank("bank5")->set_base(ram + 0xc000);
	91	state->membank("bank6")->set_base(mem + 0x010000);
	92	state->membank("bank7")->set_base(ram + 0x9000);
	93	state->membank("bank8")->set_base(mem + 0x010000);
	94	state->membank("bank9")->set_base(ram + 0xb000);
	95	state->membank("bank10")->set_base(ram + 0xc000);
96	96
97	97	}
98	98	else
r14976	r14977
100	100	space->install_write_bank(0x0000, 0x0fff, "bank1");
101	101	space->install_write_bank(0x2000, 0x2fff, "bank3");
102	102
103		memory_set_bankptr(machine, "bank1", ram);
104		memory_set_bankptr(machine, "bank2", ram + 0x1000);
105		memory_set_bankptr(machine, "bank3", ram + 0x2000);
106		memory_set_bankptr(machine, "bank4", ram + 0x5000);
107		memory_set_bankptr(machine, "bank5", ram + 0x4000);
	103	state->membank("bank1")->set_base(ram);
	104	state->membank("bank2")->set_base(ram + 0x1000);
	105	state->membank("bank3")->set_base(ram + 0x2000);
	106	state->membank("bank4")->set_base(ram + 0x5000);
	107	state->membank("bank5")->set_base(ram + 0x4000);
108	108	}
109	109	}
110	110
111	111	static void pmd853_update_memory(running_machine &machine)
112	112	{
113	113	pmd85_state *state = machine.driver_data<pmd85_state>();
114		UINT8 *mem = machine.region("maincpu")->base();
	114	UINT8 *mem = state->memregion("maincpu")->base();
115	115	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
116	116
117	117	if (state->m_startup_mem_map)
118	118	{
119		memory_set_bankptr(machine, "bank1", mem + 0x010000);
120		memory_set_bankptr(machine, "bank2", mem + 0x010000);
121		memory_set_bankptr(machine, "bank3", mem + 0x010000);
122		memory_set_bankptr(machine, "bank4", mem + 0x010000);
123		memory_set_bankptr(machine, "bank5", mem + 0x010000);
124		memory_set_bankptr(machine, "bank6", mem + 0x010000);
125		memory_set_bankptr(machine, "bank7", mem + 0x010000);
126		memory_set_bankptr(machine, "bank8", mem + 0x010000);
127		memory_set_bankptr(machine, "bank9", ram);
128		memory_set_bankptr(machine, "bank10", ram + 0x2000);
129		memory_set_bankptr(machine, "bank11", ram + 0x4000);
130		memory_set_bankptr(machine, "bank12", ram + 0x6000);
131		memory_set_bankptr(machine, "bank13", ram + 0x8000);
132		memory_set_bankptr(machine, "bank14", ram + 0xa000);
133		memory_set_bankptr(machine, "bank15", ram + 0xc000);
134		memory_set_bankptr(machine, "bank16", ram + 0xe000);
	119	state->membank("bank1")->set_base(mem + 0x010000);
	120	state->membank("bank2")->set_base(mem + 0x010000);
	121	state->membank("bank3")->set_base(mem + 0x010000);
	122	state->membank("bank4")->set_base(mem + 0x010000);
	123	state->membank("bank5")->set_base(mem + 0x010000);
	124	state->membank("bank6")->set_base(mem + 0x010000);
	125	state->membank("bank7")->set_base(mem + 0x010000);
	126	state->membank("bank8")->set_base(mem + 0x010000);
	127	state->membank("bank9")->set_base(ram);
	128	state->membank("bank10")->set_base(ram + 0x2000);
	129	state->membank("bank11")->set_base(ram + 0x4000);
	130	state->membank("bank12")->set_base(ram + 0x6000);
	131	state->membank("bank13")->set_base(ram + 0x8000);
	132	state->membank("bank14")->set_base(ram + 0xa000);
	133	state->membank("bank15")->set_base(ram + 0xc000);
	134	state->membank("bank16")->set_base(ram + 0xe000);
135	135	}
136	136	else
137	137	{
138		memory_set_bankptr(machine,  "bank1", ram);
139		memory_set_bankptr(machine,  "bank2", ram + 0x2000);
140		memory_set_bankptr(machine,  "bank3", ram + 0x4000);
141		memory_set_bankptr(machine,  "bank4", ram + 0x6000);
142		memory_set_bankptr(machine,  "bank5", ram + 0x8000);
143		memory_set_bankptr(machine,  "bank6", ram + 0xa000);
144		memory_set_bankptr(machine,  "bank7", ram + 0xc000);
145		memory_set_bankptr(machine,  "bank8", state->m_pmd853_memory_mapping ? mem + 0x010000 : ram + 0xe000);
	138	state->membank("bank1")->set_base(ram);
	139	state->membank("bank2")->set_base(ram + 0x2000);
	140	state->membank("bank3")->set_base(ram + 0x4000);
	141	state->membank("bank4")->set_base(ram + 0x6000);
	142	state->membank("bank5")->set_base(ram + 0x8000);
	143	state->membank("bank6")->set_base(ram + 0xa000);
	144	state->membank("bank7")->set_base(ram + 0xc000);
	145	state->membank("bank8")->set_base(state->m_pmd853_memory_mapping ? mem + 0x010000 : ram + 0xe000);
146	146	}
147	147	}
148	148
r14976	r14977
154	154
155	155	if (state->m_startup_mem_map)
156	156	{
157		UINT8 *mem = machine.region("maincpu")->base();
	157	UINT8 *mem = state->memregion("maincpu")->base();
158	158
159	159	space->unmap_write(0x0000, 0x0fff);
160	160	space->unmap_write(0x1000, 0x33ff);
161	161	space->nop_write(0x3400, 0x3fff);
162	162
163		memory_set_bankptr(machine, "bank1", mem + 0x010000);
164		memory_set_bankptr(machine, "bank2", mem + 0x011000);
165		memory_set_bankptr(machine, "bank4", ram + 0xc000);
166		memory_set_bankptr(machine, "bank5", mem + 0x010000);
167		memory_set_bankptr(machine, "bank6", mem + 0x011000);
168		memory_set_bankptr(machine, "bank7", ram + 0xc000);
	163	state->membank("bank1")->set_base(mem + 0x010000);
	164	state->membank("bank2")->set_base(mem + 0x011000);
	165	state->membank("bank4")->set_base(ram + 0xc000);
	166	state->membank("bank5")->set_base(mem + 0x010000);
	167	state->membank("bank6")->set_base(mem + 0x011000);
	168	state->membank("bank7")->set_base(ram + 0xc000);
169	169	}
170	170	else
171	171	{
r14976	r14977
173	173	space->install_write_bank(0x1000, 0x33ff, "bank2");
174	174	space->install_write_bank(0x3400, 0x3fff, "bank3");
175	175
176		memory_set_bankptr(machine, "bank1", ram);
177		memory_set_bankptr(machine, "bank2", ram + 0x1000);
178		memory_set_bankptr(machine, "bank3", ram + 0x3400);
179		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	176	state->membank("bank1")->set_base(ram);
	177	state->membank("bank2")->set_base(ram + 0x1000);
	178	state->membank("bank3")->set_base(ram + 0x3400);
	179	state->membank("bank4")->set_base(ram + 0x4000);
180	180	}
181	181	}
182	182
r14976	r14977
188	188
189	189	if (state->m_startup_mem_map)
190	190	{
191		UINT8 *mem = machine.region("maincpu")->base();
	191	UINT8 *mem = state->memregion("maincpu")->base();
192	192
193	193	space->unmap_write(0x0000, 0x3fff);
194	194
195		memory_set_bankptr(machine, "bank1", mem + 0x010000);
196		memory_set_bankptr(machine, "bank2", ram + 0xc000);
197		memory_set_bankptr(machine, "bank3", mem + 0x010000);
198		memory_set_bankptr(machine, "bank4", ram + 0xc000);
	195	state->membank("bank1")->set_base(mem + 0x010000);
	196	state->membank("bank2")->set_base(ram + 0xc000);
	197	state->membank("bank3")->set_base(mem + 0x010000);
	198	state->membank("bank4")->set_base(ram + 0xc000);
199	199	}
200	200	else
201	201	{
202	202	space->install_write_bank(0x0000, 0x3fff, "bank1");
203	203
204		memory_set_bankptr(machine, "bank1", ram);
205		memory_set_bankptr(machine, "bank2", ram + 0x4000);
	204	state->membank("bank1")->set_base(ram);
	205	state->membank("bank2")->set_base(ram + 0x4000);
206	206	}
207	207	}
208	208
r14976	r14977
210	210	{
211	211	pmd85_state *state = machine.driver_data<pmd85_state>();
212	212	address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
213		UINT8 *mem = machine.region("maincpu")->base();
	213	UINT8 *mem = state->memregion("maincpu")->base();
214	214	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
215	215
216	216	if (state->m_startup_mem_map)
217	217	{
218	218	space->unmap_write(0x0000, 0x3fff);
219	219
220		memory_set_bankptr(machine, "bank1", mem + 0x010000);
221		memory_set_bankptr(machine, "bank2", ram + 0x4000);
222		memory_set_bankptr(machine, "bank3", mem + 0x010000);
223		memory_set_bankptr(machine, "bank4", ram + 0xc000);
	220	state->membank("bank1")->set_base(mem + 0x010000);
	221	state->membank("bank2")->set_base(ram + 0x4000);
	222	state->membank("bank3")->set_base(mem + 0x010000);
	223	state->membank("bank4")->set_base(ram + 0xc000);
224	224	}
225	225	else
226	226	{
227	227	space->install_write_bank(0x0000, 0x3fff, "bank1");
228		memory_set_bankptr(machine, "bank1", ram);
229		memory_set_bankptr(machine, "bank2", ram + 0x4000);
	228	state->membank("bank1")->set_base(ram);
	229	state->membank("bank2")->set_base(ram + 0x4000);
230	230	}
231	231	}
232	232
r14976	r14977
459	459	static READ8_DEVICE_HANDLER ( pmd85_ppi_3_porta_r )
460	460	{
461	461	pmd85_state *state = device->machine().driver_data<pmd85_state>();
462		if (device->machine().region("user1")->base() != NULL)
463		return device->machine().region("user1")->base()[state->m_ppi_port_outputs[3][1] | (state->m_ppi_port_outputs[3][2] << 8)];
	462	if (device->machine().root_device().memregion("user1")->base() != NULL)
	463	return state->memregion("user1")->base()[state->m_ppi_port_outputs[3][1] | (state->m_ppi_port_outputs[3][2] << 8)];
464	464	else
465	465	return 0;
466	466	}

src/mess/machine/egret.c

r14976	r14977
379	379	save_item(NAME(disk_pram));
380	380
381	381	astring tempstring;
382		UINT8 *rom = device().machine().region(device().subtag(tempstring, EGRET_CPU_TAG))->base();
	382	UINT8 *rom = device().machine().root_device().memregion(device().subtag(tempstring, EGRET_CPU_TAG))->base();
383	383
384	384	if (rom)
385	385	{

src/mess/machine/c2040.c

r14976	r14977
1464	1464	inline void base_c2040_device::initialize(int drives)
1465	1465	{
1466	1466	// find GCR ROM
1467		m_gcr = subregion("gcr")->base();
	1467	m_gcr = memregion("gcr")->base();
1468	1468
1469	1469	// install image callbacks
1470	1470	m_unit[0].m_image = m_image0;

src/mess/machine/c16.c

r14976	r14977
106	106	static void c16_bankswitch( running_machine &machine )
107	107	{
108	108	c16_state *state = machine.driver_data<c16_state>();
109		UINT8 *rom = machine.region("maincpu")->base();
110		memory_set_bankptr(machine, "bank9", state->m_messram->pointer());
	109	UINT8 *rom = state->memregion("maincpu")->base();
	110	state->membank("bank9")->set_base(state->m_messram->pointer());
111	111
112	112	switch (state->m_lowrom)
113	113	{
114	114	case 0:
115		memory_set_bankptr(machine, "bank2", rom + 0x10000);
	115	state->membank("bank2")->set_base(rom + 0x10000);
116	116	break;
117	117	case 1:
118		memory_set_bankptr(machine, "bank2", rom + 0x18000);
	118	state->membank("bank2")->set_base(rom + 0x18000);
119	119	break;
120	120	case 2:
121		memory_set_bankptr(machine, "bank2", rom + 0x20000);
	121	state->membank("bank2")->set_base(rom + 0x20000);
122	122	break;
123	123	case 3:
124		memory_set_bankptr(machine, "bank2", rom + 0x28000);
	124	state->membank("bank2")->set_base(rom + 0x28000);
125	125	break;
126	126	}
127	127
128	128	switch (state->m_highrom)
129	129	{
130	130	case 0:
131		memory_set_bankptr(machine, "bank3", rom + 0x14000);
132		memory_set_bankptr(machine, "bank8", rom + 0x17f20);
	131	state->membank("bank3")->set_base(rom + 0x14000);
	132	state->membank("bank8")->set_base(rom + 0x17f20);
133	133	break;
134	134	case 1:
135		memory_set_bankptr(machine, "bank3", rom + 0x1c000);
136		memory_set_bankptr(machine, "bank8", rom + 0x1ff20);
	135	state->membank("bank3")->set_base(rom + 0x1c000);
	136	state->membank("bank8")->set_base(rom + 0x1ff20);
137	137	break;
138	138	case 2:
139		memory_set_bankptr(machine, "bank3", rom + 0x24000);
140		memory_set_bankptr(machine, "bank8", rom + 0x27f20);
	139	state->membank("bank3")->set_base(rom + 0x24000);
	140	state->membank("bank8")->set_base(rom + 0x27f20);
141	141	break;
142	142	case 3:
143		memory_set_bankptr(machine, "bank3", rom + 0x2c000);
144		memory_set_bankptr(machine, "bank8", rom + 0x2ff20);
	143	state->membank("bank3")->set_base(rom + 0x2c000);
	144	state->membank("bank8")->set_base(rom + 0x2ff20);
145	145	break;
146	146	}
147		memory_set_bankptr(machine, "bank4", rom + 0x17c00);
	147	state->membank("bank4")->set_base(rom + 0x17c00);
148	148	}
149	149
150	150	WRITE8_HANDLER( c16_switch_to_rom )
r14976	r14977
186	186
187	187	ted7360_rom_switch_w(state->m_ted7360, 0);
188	188
189		memory_set_bankptr(space->machine(), "bank2", ram + (0x8000 % ram_size));
190		memory_set_bankptr(space->machine(), "bank3", ram + (0xc000 % ram_size));
191		memory_set_bankptr(space->machine(), "bank4", ram + (0xfc00 % ram_size));
192		memory_set_bankptr(space->machine(), "bank8", ram + (0xff20 % ram_size));
	189	state->membank("bank2")->set_base(ram + (0x8000 % ram_size));
	190	state->membank("bank3")->set_base(ram + (0xc000 % ram_size));
	191	state->membank("bank4")->set_base(ram + (0xfc00 % ram_size));
	192	state->membank("bank8")->set_base(ram + (0xff20 % ram_size));
193	193	}
194	194
195	195	UINT8 c16_read_keyboard( running_machine &machine, int databus )
r14976	r14977
396	396	static void c16_common_driver_init( running_machine &machine )
397	397	{
398	398	c16_state *state = machine.driver_data<c16_state>();
399		UINT8 *rom = machine.region("maincpu")->base();
	399	UINT8 *rom = state->memregion("maincpu")->base();
400	400
401	401	/* initial bankswitch (notice that TED7360 is init to ROM) */
402		memory_set_bankptr(machine, "bank2", rom + 0x10000);
403		memory_set_bankptr(machine, "bank3", rom + 0x14000);
404		memory_set_bankptr(machine, "bank4", rom + 0x17c00);
405		memory_set_bankptr(machine, "bank8", rom + 0x17f20);
	402	state->membank("bank2")->set_base(rom + 0x10000);
	403	state->membank("bank3")->set_base(rom + 0x14000);
	404	state->membank("bank4")->set_base(rom + 0x17c00);
	405	state->membank("bank8")->set_base(rom + 0x17f20);
406	406
407	407	state->m_mem10000 = rom + 0x10000;
408	408	state->m_mem14000 = rom + 0x14000;
r14976	r14977
466	466
467	467	if (state->m_pal)
468	468	{
469		memory_set_bankptr(machine, "bank1", ram + (0x4000 % ram_size));
	469	state->membank("bank1")->set_base(ram + (0x4000 % ram_size));
470	470
471		memory_set_bankptr(machine, "bank5", ram + (0x4000 % ram_size));
472		memory_set_bankptr(machine, "bank6", ram + (0x8000 % ram_size));
473		memory_set_bankptr(machine, "bank7", ram + (0xc000 % ram_size));
	471	state->membank("bank5")->set_base(ram + (0x4000 % ram_size));
	472	state->membank("bank6")->set_base(ram + (0x8000 % ram_size));
	473	state->membank("bank7")->set_base(ram + (0xc000 % ram_size));
474	474
475	475	space->install_write_bank(0xff20, 0xff3d,"bank10");
476	476	space->install_write_bank(0xff40, 0xffff, "bank11");
477		memory_set_bankptr(machine, "bank10", ram + (0xff20 % ram_size));
478		memory_set_bankptr(machine, "bank11", ram + (0xff40 % ram_size));
	477	state->membank("bank10")->set_base(ram + (0xff20 % ram_size));
	478	state->membank("bank11")->set_base(ram + (0xff40 % ram_size));
479	479	}
480	480	else
481	481	{
482	482	space->install_write_bank(0x4000, 0xfcff, "bank10");
483		memory_set_bankptr(machine, "bank10", ram + (0x4000 % ram_size));
	483	state->membank("bank10")->set_base(ram + (0x4000 % ram_size));
484	484	}
485	485	}
486	486
r14976	r14977
622	622
623	623	static void plus4_software_list_cartridge_load(device_image_interface &image)
624	624	{
625		UINT8 *mem = image.device().machine().region("maincpu")->base();
	625	UINT8 *mem = image.device().machine().root_device().memregion("maincpu")->base();
626	626
627	627	size_t size = image.get_software_region_length("c1l");
628	628	if (size)
r14976	r14977
643	643
644	644	static int plus4_crt_load( device_image_interface &image )
645	645	{
646		UINT8 *mem = image.device().machine().region("maincpu")->base();
	646	UINT8 *mem = image.device().machine().root_device().memregion("maincpu")->base();
647	647	int size = image.length(), test;
648	648	const char *filetype;
649	649	int address = 0;

src/mess/machine/at.c

r14976	r14977
296	296
297	297	static void init_at_common(running_machine &machine)
298	298	{
299		at_state *st = machine.driver_data<at_state>();
	299	at_state *state = machine.driver_data<at_state>();
300	300	address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
301	301
302	302	// The CS4031 chipset does this itself
303	303	if (machine.device("cs4031") == NULL)
304	304	{
305	305	/* MESS managed RAM */
306		memory_set_bankptr(machine, "bank10", machine.device<ram_device>(RAM_TAG)->pointer());
	306	state->membank("bank10")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
307	307
308	308	if (machine.device<ram_device>(RAM_TAG)->size() > 0x0a0000)
309	309	{
310	310	offs_t ram_limit = 0x100000 + machine.device<ram_device>(RAM_TAG)->size() - 0x0a0000;
311	311	space->install_read_bank(0x100000,  ram_limit - 1, "bank1");
312	312	space->install_write_bank(0x100000,  ram_limit - 1, "bank1");
313		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0xa0000);
	313	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xa0000);
314	314	}
315	315	}
316	316
317		st->m_at_offset1 = 0xff;
	317	state->m_at_offset1 = 0xff;
318	318	}
319	319
320	320	DRIVER_INIT( atcga )

src/mess/machine/electron.c

r14976	r14977
155	155
156	156	READ8_MEMBER(electron_state::electron_ula_r)
157	157	{
158		UINT8 data = ((UINT8 *)machine().region("user1")->base())[0x43E00 + offset];
	158	UINT8 data = ((UINT8 *)machine().root_device().memregion("user1")->base())[0x43E00 + offset];
159	159	switch ( offset & 0x0f )
160	160	{
161	161	case 0x00:   /* Interrupt status */
r14976	r14977
217	217	{
218	218	space.install_read_bank( 0x8000, 0xbfff, "bank2");
219	219	}
220		memory_set_bank(machine(), "bank2", m_ula.rompage);
	220	membank("bank2")->set_entry(m_ula.rompage);
221	221	}
222	222	if ( data & 0x10 )
223	223	{
r14976	r14977
325	325	static void electron_reset(running_machine &machine)
326	326	{
327	327	electron_state *state = machine.driver_data<electron_state>();
328		memory_set_bank(machine, "bank2", 0);
	328	state->membank("bank2")->set_entry(0);
329	329
330	330	state->m_ula.communication_mode = 0x04;
331	331	state->m_ula.screen_mode = 0;
r14976	r14977
343	343	MACHINE_START( electron )
344	344	{
345	345	electron_state *state = machine.driver_data<electron_state>();
346		memory_configure_bank(machine, "bank2", 0, 16, machine.region("user1")->base(), 0x4000);
	346	state->membank("bank2")->configure_entries(0, 16, state->memregion("user1")->base(), 0x4000);
347	347
348	348	state->m_ula.interrupt_status = 0x82;
349	349	state->m_ula.interrupt_control = 0x00;

src/mess/machine/orion.c

r14976	r14977
30	30	static READ8_DEVICE_HANDLER (orion_romdisk_porta_r )
31	31	{
32	32	orion_state *state = device->machine().driver_data<orion_state>();
33		UINT8 *romdisk = device->machine().region("maincpu")->base() + 0x10000;
	33	UINT8 *romdisk = state->memregion("maincpu")->base() + 0x10000;
34	34	return romdisk[state->m_romdisk_msb*256+state->m_romdisk_lsb];
35	35	}
36	36
r14976	r14977
150	150	{
151	151	if (data!=m_orion128_memory_page )
152	152	{
153		memory_set_bankptr(machine(), "bank1", machine().device<ram_device>(RAM_TAG)->pointer() + (data & 3) * 0x10000);
	153	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + (data & 3) * 0x10000);
154	154	m_orion128_memory_page = (data & 3);
155	155	}
156	156	}
r14976	r14977
161	161	state->m_orion128_video_page = 0;
162	162	state->m_orion128_video_mode = 0;
163	163	state->m_orion128_memory_page = -1;
164		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0xf800);
165		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
	164	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0xf800);
	165	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
166	166	state->m_orion128_video_width = SCREEN_WIDTH_384;
167	167	orion_set_video_mode(machine,384);
168	168	radio86_init_keyboard(machine);
r14976	r14977
279	279	space->install_write_bank(0x0000, 0x3fff, "bank1");
280	280	if ((state->m_orionz80_dispatcher & 0x80)==0)
281	281	{ // dispatcher on
282		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000 * bank_select + segment_select * 0x4000 );
	282	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000 * bank_select + segment_select * 0x4000 );
283	283	}
284	284	else
285	285	{ // dispatcher off
286		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000 * state->m_orionz80_memory_page);
	286	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000 * state->m_orionz80_memory_page);
287	287	}
288	288
289		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000 + 0x10000 * state->m_orionz80_memory_page);
	289	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000 + 0x10000 * state->m_orionz80_memory_page);
290	290
291	291	if ((state->m_orionz80_dispatcher & 0x20) == 0)
292	292	{
r14976	r14977
304	304	space->unmap_write(0xfc00, 0xfeff);
305	305	space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
306	306
307		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
308		memory_set_bankptr(machine, "bank5", machine.region("maincpu")->base() + 0xf800);
	307	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
	308	state->membank("bank5")->set_base(machine.root_device().memregion("maincpu")->base() + 0xf800);
309	309
310	310	}
311	311	else
312	312	{
313	313	/* if it is full memory access */
314		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000 + 0x10000 * state->m_orionz80_memory_page);
315		memory_set_bankptr(machine, "bank4", machine.device<ram_device>(RAM_TAG)->pointer() + 0xf400 + 0x10000 * state->m_orionz80_memory_page);
316		memory_set_bankptr(machine, "bank5", machine.device<ram_device>(RAM_TAG)->pointer() + 0xf800 + 0x10000 * state->m_orionz80_memory_page);
	314	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000 + 0x10000 * state->m_orionz80_memory_page);
	315	state->membank("bank4")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf400 + 0x10000 * state->m_orionz80_memory_page);
	316	state->membank("bank5")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf800 + 0x10000 * state->m_orionz80_memory_page);
317	317	}
318	318	}
319	319
r14976	r14977
353	353	space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
354	354
355	355
356		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0xf800);
357		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
358		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
359		memory_set_bankptr(machine, "bank5", machine.region("maincpu")->base() + 0xf800);
	356	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0xf800);
	357	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
	358	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
	359	state->membank("bank5")->set_base(state->memregion("maincpu")->base() + 0xf800);
360	360
361	361
362	362	state->m_orion128_video_page = 0;
r14976	r14977
438	438
439	439	if ((state->m_orionpro_dispatcher & 0x01)==0x00)
440	440	{   // RAM0 segment disabled
441		memory_set_bankptr(machine, "bank1", ram + 0x10000 * page);
442		memory_set_bankptr(machine, "bank2", ram + 0x10000 * page + 0x2000);
	441	state->membank("bank1")->set_base(ram + 0x10000 * page);
	442	state->membank("bank2")->set_base(ram + 0x10000 * page + 0x2000);
443	443	}
444	444	else
445	445	{
446		memory_set_bankptr(machine, "bank1", ram + (state->m_orionpro_ram0_segment & 31) * 0x4000);
447		memory_set_bankptr(machine, "bank2", ram + (state->m_orionpro_ram0_segment & 31) * 0x4000 + 0x2000);
	446	state->membank("bank1")->set_base(ram + (state->m_orionpro_ram0_segment & 31) * 0x4000);
	447	state->membank("bank2")->set_base(ram + (state->m_orionpro_ram0_segment & 31) * 0x4000 + 0x2000);
448	448	}
449	449	if ((state->m_orionpro_dispatcher & 0x10)==0x10)
450	450	{   // ROM1 enabled
451	451	space->unmap_write(0x0000, 0x1fff);
452		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x20000);
	452	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x20000);
453	453	}
454	454	if ((state->m_orionpro_dispatcher & 0x08)==0x08)
455	455	{   // ROM2 enabled
456	456	space->unmap_write(0x2000, 0x3fff);
457		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x22000 + (state->m_orionpro_rom2_segment & 7) * 0x2000);
	457	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x22000 + (state->m_orionpro_rom2_segment & 7) * 0x2000);
458	458	}
459	459
460	460	if ((state->m_orionpro_dispatcher & 0x02)==0x00)
461	461	{   // RAM1 segment disabled
462		memory_set_bankptr(machine, "bank3", ram + 0x10000 * page + 0x4000);
	462	state->membank("bank3")->set_base(ram + 0x10000 * page + 0x4000);
463	463	}
464	464	else
465	465	{
466		memory_set_bankptr(machine, "bank3", ram + (state->m_orionpro_ram1_segment & 31) * 0x4000);
	466	state->membank("bank3")->set_base(ram + (state->m_orionpro_ram1_segment & 31) * 0x4000);
467	467	}
468	468
469	469	if ((state->m_orionpro_dispatcher & 0x04)==0x00)
470	470	{   // RAM2 segment disabled
471		memory_set_bankptr(machine, "bank4", ram + 0x10000 * page + 0x8000);
	471	state->membank("bank4")->set_base(ram + 0x10000 * page + 0x8000);
472	472	}
473	473	else
474	474	{
475		memory_set_bankptr(machine, "bank4", ram + (state->m_orionpro_ram2_segment & 31) * 0x4000);
	475	state->membank("bank4")->set_base(ram + (state->m_orionpro_ram2_segment & 31) * 0x4000);
476	476	}
477	477
478		memory_set_bankptr(machine, "bank5", ram + 0x10000 * page + 0xc000);
	478	state->membank("bank5")->set_base(ram + 0x10000 * page + 0xc000);
479	479
480	480	if (is128)
481	481	{
482		memory_set_bankptr(machine, "bank6", ram + 0x10000 * 0 + 0xf000);
	482	state->membank("bank6")->set_base(ram + 0x10000 * 0 + 0xf000);
483	483
484	484	space->install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),state));
485	485	space->install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),state));
r14976	r14977
497	497	space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
498	498
499	499
500		memory_set_bankptr(machine, "bank8", ram + 0x10000 * 0 + 0xf800);
	500	state->membank("bank8")->set_base(ram + 0x10000 * 0 + 0xf800);
501	501	}
502	502	else
503	503	{
504	504	if ((state->m_orionpro_dispatcher & 0x40)==0x40)
505	505	{   // FIX F000 enabled
506		memory_set_bankptr(machine, "bank6", ram + 0x10000 * 0 + 0xf000);
507		memory_set_bankptr(machine, "bank7", ram + 0x10000 * 0 + 0xf400);
508		memory_set_bankptr(machine, "bank8", ram + 0x10000 * 0 + 0xf800);
	506	state->membank("bank6")->set_base(ram + 0x10000 * 0 + 0xf000);
	507	state->membank("bank7")->set_base(ram + 0x10000 * 0 + 0xf400);
	508	state->membank("bank8")->set_base(ram + 0x10000 * 0 + 0xf800);
509	509	}
510	510	else
511	511	{
512		memory_set_bankptr(machine, "bank6", ram + 0x10000 * page + 0xf000);
513		memory_set_bankptr(machine, "bank7", ram + 0x10000 * page + 0xf400);
514		memory_set_bankptr(machine, "bank8", ram + 0x10000 * page + 0xf800);
	512	state->membank("bank6")->set_base(ram + 0x10000 * page + 0xf000);
	513	state->membank("bank7")->set_base(ram + 0x10000 * page + 0xf400);
	514	state->membank("bank8")->set_base(ram + 0x10000 * page + 0xf800);
515	515	}
516	516	}
517	517	}

src/mess/machine/cpc_ssa1.c

r14976	r14977
190	190	address_space* space = cpu->memory().space(AS_IO);
191	191	m_slot = dynamic_cast<cpc_expansion_slot_device *>(owner());
192	192
193		m_rom = subregion("sp0256")->base();
	193	m_rom = memregion("sp0256")->base();
194	194
195	195	//  m_sp0256_device = subdevice("sp0256");
196	196
r14976	r14977
204	204	address_space* space = cpu->memory().space(AS_IO);
205	205	m_slot = dynamic_cast<cpc_expansion_slot_device *>(owner());
206	206
207		m_rom = subregion("sp0256")->base();
	207	m_rom = memregion("sp0256")->base();
208	208
209	209	//  m_sp0256_device = subdevice("sp0256");
210	210

src/mess/machine/kc_ram.c

r14976	r14977
60	60	{
61	61	m_slot = dynamic_cast<kcexp_slot_device *>(owner());
62	62
63		m_ram = machine().region_alloc(tag(), get_ram_size(), 1, ENDIANNESS_LITTLE)->base();
	63	m_ram = machine().memory().region_alloc(tag(), get_ram_size(), 1, ENDIANNESS_LITTLE)->base();
64	64	memset(m_ram, 0, get_ram_size());
65	65	}
66	66

src/mess/machine/a7800.c

r14976	r14977
73	73	{
74	74	a7800_state *state = machine.driver_data<a7800_state>();
75	75	address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
76		state->m_ROM = machine.region("maincpu")->base();
	76	state->m_ROM = state->memregion("maincpu")->base();
77	77	state->m_ispal = ispal;
78	78	state->m_lines = lines;
79	79	state->m_p1_one_button = 1;
80	80	state->m_p2_one_button = 1;
81	81
82	82	/* standard banks */
83		memory_set_bankptr(machine, "bank5", &state->m_ROM[0x2040]);      /* RAM0 */
84		memory_set_bankptr(machine, "bank6", &state->m_ROM[0x2140]);      /* RAM1 */
85		memory_set_bankptr(machine, "bank7", &state->m_ROM[0x2000]);      /* MAINRAM */
	83	state->membank("bank5")->set_base(&state->m_ROM[0x2040]);      /* RAM0 */
	84	state->membank("bank6")->set_base(&state->m_ROM[0x2140]);      /* RAM1 */
	85	state->membank("bank7")->set_base(&state->m_ROM[0x2000]);      /* MAINRAM */
86	86
87	87	/* Brutal hack put in as a consequence of new memory system; fix this */
88	88	space->install_readwrite_bank(0x0480, 0x04FF,"bank10");
89		memory_set_bankptr(machine, "bank10", state->m_ROM + 0x0480);
	89	state->membank("bank10")->set_base(state->m_ROM + 0x0480);
90	90	space->install_readwrite_bank(0x1800, 0x27FF, "bank11");
91		memory_set_bankptr(machine, "bank11", state->m_ROM + 0x1800);
	91	state->membank("bank11")->set_base(state->m_ROM + 0x1800);
92	92	}
93	93
94	94
r14976	r14977
115	115	state->m_maria_flag = 0;
116	116
117	117	/* set banks to default states */
118		memory = machine.region("maincpu")->base();
119		memory_set_bankptr(machine,  "bank1", memory + 0x4000 );
120		memory_set_bankptr(machine,  "bank2", memory + 0x8000 );
121		memory_set_bankptr(machine,  "bank3", memory + 0xA000 );
122		memory_set_bankptr(machine,  "bank4", memory + 0xC000 );
	118	memory = state->memregion("maincpu")->base();
	119	state->membank("bank1")->set_base(memory + 0x4000 );
	120	state->membank("bank2")->set_base(memory + 0x8000 );
	121	state->membank("bank3")->set_base(memory + 0xA000 );
	122	state->membank("bank4")->set_base(memory + 0xC000 );
123	123
124	124	/* pokey cartridge */
125	125	if (state->m_cart_type & 0x01)
r14976	r14977
197	197	DEVICE_START( a7800_cart )
198	198	{
199	199	a7800_state *state = device->machine().driver_data<a7800_state>();
200		UINT8 *memory = device->machine().region("maincpu")->base();
	200	UINT8 *memory = state->memregion("maincpu")->base();
201	201
202	202	state->m_bios_bkup = NULL;
203	203	state->m_cart_bkup = NULL;
r14976	r14977
257	257	a7800_state *state = image.device().machine().driver_data<a7800_state>();
258	258	UINT32 len = 0, start = 0;
259	259	unsigned char header[128];
260		UINT8 *memory = image.device().machine().region("maincpu")->base();
	260	UINT8 *memory = image.device().machine().root_device().memregion("maincpu")->base();
261	261	const char   *pcb_name;
262	262
263	263	// detect cart type either from xml or from header
r14976	r14977
402	402
403	403	WRITE8_MEMBER(a7800_state::a7800_cart_w)
404	404	{
405		UINT8 *memory = machine().region("maincpu")->base();
	405	UINT8 *memory = memregion("maincpu")->base();
406	406
407	407	if(offset < 0x4000)
408	408	{
r14976	r14977
432	432	{
433	433	data &= 0x07;
434	434	}
435		memory_set_bankptr(machine(), "bank2",memory + 0x10000 + (data << 14));
436		memory_set_bankptr(machine(), "bank3",memory + 0x12000 + (data << 14));
	435	membank("bank2")->set_base(memory + 0x10000 + (data << 14));
	436	membank("bank3")->set_base(memory + 0x12000 + (data << 14));
437	437	/*  logerror("BANK SEL: %d\n",data); */
438	438	}
439	439	else if(( m_cart_type == MBANK_TYPE_ABSOLUTE ) &&( offset == 0x4000 ) )
r14976	r14977
442	442	/*logerror( "F18 BANK SEL: %d\n", data );*/
443	443	if( data & 1 )
444	444	{
445		memory_set_bankptr(machine(), "bank1",memory + 0x10000 );
	445	membank("bank1")->set_base(memory + 0x10000 );
446	446	}
447	447	else if( data & 2 )
448	448	{
449		memory_set_bankptr(machine(), "bank1",memory + 0x14000 );
	449	membank("bank1")->set_base(memory + 0x14000 );
450	450	}
451	451	}
452	452	else if(( m_cart_type == MBANK_TYPE_ACTIVISION ) &&( offset >= 0xBF80 ) )
r14976	r14977
456	456
457	457	/*logerror( "Activision BANK SEL: %d\n", data );*/
458	458
459		memory_set_bankptr(machine(),  "bank3", memory + 0x10000 + ( data << 14 ) );
460		memory_set_bankptr(machine(),  "bank4", memory + 0x12000 + ( data << 14 ) );
	459	membank("bank3")->set_base(memory + 0x10000 + ( data << 14 ) );
	460	membank("bank4")->set_base(memory + 0x12000 + ( data << 14 ) );
461	461	}
462	462	}
463	463

src/mess/machine/nascom1.c

r14976	r14977
263	263
264	264	DRIVER_INIT( nascom1 )
265	265	{
	266	nascom1_state *state = machine.driver_data<nascom1_state>();
266	267	switch (machine.device<ram_device>(RAM_TAG)->size())
267	268	{
268	269	case 1 * 1024:
r14976	r14977
275	276	0x1400, 0x4fff, "bank1");
276	277	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_readwrite(
277	278	0x5000, 0xafff);
278		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	279	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
279	280	break;
280	281
281	282	case 32 * 1024:
r14976	r14977
283	284	0x1400, 0x8fff, "bank1");
284	285	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_readwrite(
285	286	0x9000, 0xafff);
286		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	287	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
287	288	break;
288	289
289	290	case 40 * 1024:
290	291	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(
291	292	0x1400, 0xafff, "bank1");
292		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	293	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
293	294	break;
294	295	}
295	296	}

src/mess/machine/microtan.c

r14976	r14977
514	514	DRIVER_INIT( microtan )
515	515	{
516	516	microtan_state *state = machine.driver_data<microtan_state>();
517		UINT8 *dst = machine.region("gfx2")->base();
	517	UINT8 *dst = state->memregion("gfx2")->base();
518	518	int i;
519	519	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
520	520

src/mess/machine/cs4031.c

r14976	r14977
127	127
128	128	device_t *cpu = machine().device(m_cputag);
129	129	m_space = cpu->memory().space(AS_PROGRAM);
130		m_isa = machine().region(m_isatag)->base();
131		m_bios = machine().region(m_biostag)->base();
	130	m_isa = memregion(m_isatag)->base();
	131	m_bios = memregion(m_biostag)->base();
132	132
133	133	m_ram = ram_dev->pointer();
134	134	UINT32 ram_size = ram_dev->size();
r14976	r14977
173	173	logerror("ROM read from %x to %x\n", start, end);
174	174
175	175	m_space->install_read_bank(start, end, region);
176		memory_set_bankptr(m_space->machine(), region, m_bios + start);
	176	membank(region)->set_base(m_bios + start);
177	177	}
178	178	else if (!BIT(m_registers[SHADOW_READ], index) && !BIT(m_registers[ROMCS], index))
179	179	{
r14976	r14977
181	181	logerror("ISA read from %x to %x\n", start, end);
182	182
183	183	m_space->install_read_bank(start, end, region);
184		memory_set_bankptr(m_space->machine(), region, m_isa + start - 0xc0000);
	184	membank(region)->set_base(m_isa + start - 0xc0000);
185	185	}
186	186	else if (BIT(m_registers[SHADOW_READ], index))
187	187	{
r14976	r14977
189	189	logerror("RAM read from %x to %x\n", start, end);
190	190
191	191	m_space->install_read_bank(start, end, region);
192		memory_set_bankptr(m_space->machine(), region, m_ram + start);
	192	membank(region)->set_base(m_ram + start);
193	193	}
194	194	else
195	195	{
r14976	r14977
208	208	logerror("ROM write from %x to %x\n", start, end);
209	209
210	210	m_space->install_write_bank(start, end, region);
211		memory_set_bankptr(m_space->machine(), region, m_bios + start);
	211	membank(region)->set_base(m_bios + start);
212	212	}
213	213	else if (!BIT(m_registers[SHADOW_WRITE], index) && !BIT(m_registers[ROMCS], index))
214	214	{
r14976	r14977
216	216	logerror("ISA write from %x to %x\n", start, end);
217	217
218	218	m_space->install_write_bank(start, end, region);
219		memory_set_bankptr(m_space->machine(), region, m_isa + start - 0xc0000);
	219	membank(region)->set_base(m_isa + start - 0xc0000);
220	220	}
221	221	else if (BIT(m_registers[SHADOW_WRITE], index))
222	222	{
r14976	r14977
224	224	logerror("RAM write from %x to %x\n", start, end);
225	225
226	226	m_space->install_write_bank(start, end, region);
227		memory_set_bankptr(m_space->machine(), region, m_ram + start);
	227	membank(region)->set_base(m_ram + start);
228	228	}
229	229	else
230	230	{

src/mess/machine/hecdisk2.c

r14976	r14977
149	149	upd765_reset_w(machine.device("upd765"), 1);
150	150	upd765_reset_w(machine.device("upd765"), 0);
151	151	// Select ROM memory to cold restart
152		memory_set_bank(machine, "bank3", DISCII_BANK_ROM);
	152	state->membank("bank3")->set_entry(DISCII_BANK_ROM);
153	153
154	154	// Clear the Hardware's buffers
155	155	state->m_hector_disc2_data_r_ready=0x0;   /* =ff when PC2 = true and data in read buffer (state->m_hector_disc2_data_read) */
r14976	r14977
165	165	/*****************************************************************************/
166	166	READ8_HANDLER( hector_disc2_io00_port_r)
167	167	{
	168	hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
168	169	/* Switch Disc 2 to RAM to let full RAM acces */
169		memory_set_bank(space->machine(), "bank3", DISCII_BANK_RAM);
	170	state->membank("bank3")->set_entry(DISCII_BANK_RAM);
170	171	return 0;
171	172	}
172	173	WRITE8_HANDLER( hector_disc2_io00_port_w)
173	174	{
	175	hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
174	176	/* Switch Disc 2 to RAM to let full RAM acces */
175		memory_set_bank(space->machine(), "bank3", DISCII_BANK_RAM);
	177	state->membank("bank3")->set_entry(DISCII_BANK_RAM);
176	178	}
177	179	READ8_HANDLER( hector_disc2_io20_port_r)
178	180	{

src/mess/machine/samcoupe.c

r14976	r14977
26	26	{
27	27	char bank[10];
28	28	sprintf(bank,"bank%d",bank_num);
29
	29	samcoupe_state *state = space->machine().driver_data<samcoupe_state>();
30	30	if (memory)
31	31	{
32		memory_set_bankptr(space->machine(), bank, memory);
	32	state->membank(bank)->set_base(memory);
33	33	space->install_read_bank (((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF, bank);
34	34	if (is_readonly) {
35	35	space->unmap_write(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF);
r14976	r14977
69	69	{
70	70	samcoupe_state *state = space->machine().driver_data<samcoupe_state>();
71	71	const int PAGE_MASK = ((space->machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) / 0x4000) - 1;
72		UINT8 *rom = space->machine().region("maincpu")->base();
	72	UINT8 *rom = state->memregion("maincpu")->base();
73	73	UINT8 *memory;
74	74	int is_readonly;
75	75

src/mess/machine/comx_fd.c

r14976	r14977
187	187	{
188	188	m_slot = dynamic_cast<comx_expansion_slot_device *>(owner());
189	189
190		m_rom = subregion("c000")->base();
	190	m_rom = memregion("c000")->base();
191	191
192	192	// state saving
193	193	save_item(NAME(m_ds));

src/mess/machine/trs80.c

r14976	r14977
217	217
218	218	/* get address space instead of io space */
219	219	address_space *mem = m_maincpu->memory().space(AS_PROGRAM);
220		UINT8 *base = machine().region("maincpu")->base();
	220	UINT8 *base = memregion("maincpu")->base();
221	221
222	222	m_mode = (m_mode & 0x73) | (data & 0x8c);
223	223
r14976	r14977
231	231	if (m_model4 & 4)   /* Model 4P gets RAM while Model 4 gets ROM */
232	232	{
233	233	if (m_model4 & 8)
234		memory_set_bankptr(machine(), "bank1", base);
	234	membank("bank1")->set_base(base);
235	235	else
236		memory_set_bankptr(machine(), "bank1", base + 0x10000);
	236	membank("bank1")->set_base(base + 0x10000);
237	237
238		memory_set_bankptr(machine(), "bank2", base + 0x11000);
239		memory_set_bankptr(machine(), "bank4", base + 0x137ea);
	238	membank("bank2")->set_base(base + 0x11000);
	239	membank("bank4")->set_base(base + 0x137ea);
240	240	}
241	241	else
242	242	{
243		memory_set_bankptr(machine(), "bank1", base);
244		memory_set_bankptr(machine(), "bank2", base + 0x01000);
245		memory_set_bankptr(machine(), "bank4", base + 0x037ea);
	243	membank("bank1")->set_base(base);
	244	membank("bank2")->set_base(base + 0x01000);
	245	membank("bank4")->set_base(base + 0x037ea);
246	246	}
247	247
248		memory_set_bankptr(machine(), "bank7", base + 0x14000);
249		memory_set_bankptr(machine(), "bank8", base + 0x1f400);
250		memory_set_bankptr(machine(), "bank9", base + 0x1f800);
251		memory_set_bankptr(machine(), "bank11", base + 0x05000);
252		memory_set_bankptr(machine(), "bank12", base + 0x06000);
253		memory_set_bankptr(machine(), "bank14", base + 0x09000);
254		memory_set_bankptr(machine(), "bank15", base + 0x0a000);
255		memory_set_bankptr(machine(), "bank17", base + 0x14000);
256		memory_set_bankptr(machine(), "bank18", base + 0x1f400);
257		memory_set_bankptr(machine(), "bank19", base + 0x1f800);
	248	membank("bank7")->set_base(base + 0x14000);
	249	membank("bank8")->set_base(base + 0x1f400);
	250	membank("bank9")->set_base(base + 0x1f800);
	251	membank("bank11")->set_base(base + 0x05000);
	252	membank("bank12")->set_base(base + 0x06000);
	253	membank("bank14")->set_base(base + 0x09000);
	254	membank("bank15")->set_base(base + 0x0a000);
	255	membank("bank17")->set_base(base + 0x14000);
	256	membank("bank18")->set_base(base + 0x1f400);
	257	membank("bank19")->set_base(base + 0x1f800);
258	258	mem->install_readwrite_handler (0x37e8, 0x37e9, read8_delegate(FUNC(trs80_state::trs80_printer_r), this), write8_delegate(FUNC(trs80_state::trs80_printer_w), this));   /* 3 & 13 */
259	259	mem->install_read_handler (0x3800, 0x3bff, read8_delegate(FUNC(trs80_state::trs80_keyboard_r), this));   /* 5 */
260	260	mem->install_readwrite_handler (0x3c00, 0x3fff, read8_delegate(FUNC(trs80_state::trs80_videoram_r), this), write8_delegate(FUNC(trs80_state::trs80_videoram_w), this));   /* 6 & 16 */
r14976	r14977
265	265	if (m_model4 & 4)   /* Model 4P gets RAM while Model 4 gets ROM */
266	266	{
267	267	if (m_model4 & 8)
268		memory_set_bankptr(machine(), "bank1", base);
	268	membank("bank1")->set_base(base);
269	269	else
270		memory_set_bankptr(machine(), "bank1", base + 0x10000);
	270	membank("bank1")->set_base(base + 0x10000);
271	271
272		memory_set_bankptr(machine(), "bank2", base + 0x11000);
273		memory_set_bankptr(machine(), "bank3", base + 0x137e8);
274		memory_set_bankptr(machine(), "bank4", base + 0x137ea);
	272	membank("bank2")->set_base(base + 0x11000);
	273	membank("bank3")->set_base(base + 0x137e8);
	274	membank("bank4")->set_base(base + 0x137ea);
275	275	}
276	276	else
277	277	{
278		memory_set_bankptr(machine(), "bank1", base);
279		memory_set_bankptr(machine(), "bank2", base + 0x01000);
280		memory_set_bankptr(machine(), "bank3", base + 0x037e8);
281		memory_set_bankptr(machine(), "bank4", base + 0x037ea);
	278	membank("bank1")->set_base(base);
	279	membank("bank2")->set_base(base + 0x01000);
	280	membank("bank3")->set_base(base + 0x037e8);
	281	membank("bank4")->set_base(base + 0x037ea);
282	282	}
283	283
284		memory_set_bankptr(machine(), "bank7", base + 0x14000);
285		memory_set_bankptr(machine(), "bank8", base + 0x1f400);
286		memory_set_bankptr(machine(), "bank9", base + 0x1f800);
287		memory_set_bankptr(machine(), "bank11", base + 0x10000);
288		memory_set_bankptr(machine(), "bank12", base + 0x11000);
289		memory_set_bankptr(machine(), "bank13", base + 0x137e8);
290		memory_set_bankptr(machine(), "bank14", base + 0x137ea);
291		memory_set_bankptr(machine(), "bank15", base + 0x0a000);
292		memory_set_bankptr(machine(), "bank17", base + 0x14000);
293		memory_set_bankptr(machine(), "bank18", base + 0x1f400);
294		memory_set_bankptr(machine(), "bank19", base + 0x1f800);
	284	membank("bank7")->set_base(base + 0x14000);
	285	membank("bank8")->set_base(base + 0x1f400);
	286	membank("bank9")->set_base(base + 0x1f800);
	287	membank("bank11")->set_base(base + 0x10000);
	288	membank("bank12")->set_base(base + 0x11000);
	289	membank("bank13")->set_base(base + 0x137e8);
	290	membank("bank14")->set_base(base + 0x137ea);
	291	membank("bank15")->set_base(base + 0x0a000);
	292	membank("bank17")->set_base(base + 0x14000);
	293	membank("bank18")->set_base(base + 0x1f400);
	294	membank("bank19")->set_base(base + 0x1f800);
295	295	mem->install_read_handler (0x3800, 0x3bff, read8_delegate(FUNC(trs80_state::trs80_keyboard_r), this));   /* 5 */
296	296	mem->install_readwrite_handler (0x3c00, 0x3fff, read8_delegate(FUNC(trs80_state::trs80_videoram_r), this), write8_delegate(FUNC(trs80_state::trs80_videoram_w), this));   /* 6 & 16 */
297	297	break;
298	298
299	299	case 2:   /* keyboard and video are moved to high memory, and the rest is ram */
300		memory_set_bankptr(machine(), "bank1", base + 0x10000);
301		memory_set_bankptr(machine(), "bank2", base + 0x11000);
302		memory_set_bankptr(machine(), "bank3", base + 0x137e8);
303		memory_set_bankptr(machine(), "bank4", base + 0x137ea);
304		memory_set_bankptr(machine(), "bank5", base + 0x13800);
305		memory_set_bankptr(machine(), "bank6", base + 0x13c00);
306		memory_set_bankptr(machine(), "bank7", base + 0x14000);
307		memory_set_bankptr(machine(), "bank11", base + 0x10000);
308		memory_set_bankptr(machine(), "bank12", base + 0x11000);
309		memory_set_bankptr(machine(), "bank13", base + 0x137e8);
310		memory_set_bankptr(machine(), "bank14", base + 0x137ea);
311		memory_set_bankptr(machine(), "bank15", base + 0x13800);
312		memory_set_bankptr(machine(), "bank16", base + 0x13c00);
313		memory_set_bankptr(machine(), "bank17", base + 0x14000);
314		memory_set_bankptr(machine(), "bank18", base + 0x0a000);
	300	membank("bank1")->set_base(base + 0x10000);
	301	membank("bank2")->set_base(base + 0x11000);
	302	membank("bank3")->set_base(base + 0x137e8);
	303	membank("bank4")->set_base(base + 0x137ea);
	304	membank("bank5")->set_base(base + 0x13800);
	305	membank("bank6")->set_base(base + 0x13c00);
	306	membank("bank7")->set_base(base + 0x14000);
	307	membank("bank11")->set_base(base + 0x10000);
	308	membank("bank12")->set_base(base + 0x11000);
	309	membank("bank13")->set_base(base + 0x137e8);
	310	membank("bank14")->set_base(base + 0x137ea);
	311	membank("bank15")->set_base(base + 0x13800);
	312	membank("bank16")->set_base(base + 0x13c00);
	313	membank("bank17")->set_base(base + 0x14000);
	314	membank("bank18")->set_base(base + 0x0a000);
315	315	mem->install_read_handler (0xf400, 0xf7ff, read8_delegate(FUNC(trs80_state::trs80_keyboard_r), this));   /* 8 */
316	316	mem->install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(trs80_state::trs80_videoram_r), this), write8_delegate(FUNC(trs80_state::trs80_videoram_w), this));   /* 9 & 19 */
317	317	m_model4++;
318	318	break;
319	319
320	320	case 3:   /* 64k of ram */
321		memory_set_bankptr(machine(), "bank1", base + 0x10000);
322		memory_set_bankptr(machine(), "bank2", base + 0x11000);
323		memory_set_bankptr(machine(), "bank3", base + 0x137e8);
324		memory_set_bankptr(machine(), "bank4", base + 0x137ea);
325		memory_set_bankptr(machine(), "bank5", base + 0x13800);
326		memory_set_bankptr(machine(), "bank6", base + 0x13c00);
327		memory_set_bankptr(machine(), "bank7", base + 0x14000);
328		memory_set_bankptr(machine(), "bank8", base + 0x1f400);
329		memory_set_bankptr(machine(), "bank9", base + 0x1f800);
330		memory_set_bankptr(machine(), "bank11", base + 0x10000);
331		memory_set_bankptr(machine(), "bank12", base + 0x11000);
332		memory_set_bankptr(machine(), "bank13", base + 0x137e8);
333		memory_set_bankptr(machine(), "bank14", base + 0x137ea);
334		memory_set_bankptr(machine(), "bank15", base + 0x13800);
335		memory_set_bankptr(machine(), "bank16", base + 0x13c00);
336		memory_set_bankptr(machine(), "bank17", base + 0x14000);
337		memory_set_bankptr(machine(), "bank18", base + 0x1f400);
338		memory_set_bankptr(machine(), "bank19", base + 0x1f800);
	321	membank("bank1")->set_base(base + 0x10000);
	322	membank("bank2")->set_base(base + 0x11000);
	323	membank("bank3")->set_base(base + 0x137e8);
	324	membank("bank4")->set_base(base + 0x137ea);
	325	membank("bank5")->set_base(base + 0x13800);
	326	membank("bank6")->set_base(base + 0x13c00);
	327	membank("bank7")->set_base(base + 0x14000);
	328	membank("bank8")->set_base(base + 0x1f400);
	329	membank("bank9")->set_base(base + 0x1f800);
	330	membank("bank11")->set_base(base + 0x10000);
	331	membank("bank12")->set_base(base + 0x11000);
	332	membank("bank13")->set_base(base + 0x137e8);
	333	membank("bank14")->set_base(base + 0x137ea);
	334	membank("bank15")->set_base(base + 0x13800);
	335	membank("bank16")->set_base(base + 0x13c00);
	336	membank("bank17")->set_base(base + 0x14000);
	337	membank("bank18")->set_base(base + 0x1f400);
	338	membank("bank19")->set_base(base + 0x1f800);
339	339	break;
340	340	}
341	341	}
r14976	r14977
362	362	switch (m_model4 & 8)
363	363	{
364	364	case 0:      /* Read-only RAM replaces rom */
365		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x10000);
	365	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
366	366	break;
367	367	case 8:      /* Normal setup - rom enabled */
368		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base());
	368	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
369	369	break;
370	370	}
371	371	}
r14976	r14977
574	574	{
575	575	mem->unmap_readwrite (0x0000, 0x3fff);
576	576	mem->install_read_bank (0x0000, 0x2fff, "bank1");
577		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base());
	577	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
578	578	mem->install_readwrite_handler (0x37e0, 0x37e3, read8_delegate(FUNC(trs80_state::trs80_irq_status_r), this), write8_delegate(FUNC(trs80_state::trs80_motor_w), this));
579	579	mem->install_readwrite_handler (0x37e8, 0x37eb, read8_delegate(FUNC(trs80_state::trs80_printer_r), this), write8_delegate(FUNC(trs80_state::trs80_printer_w), this));
580	580	mem->install_read_handler (0x37ec, 0x37ec, read8_delegate(FUNC(trs80_state::trs80_wd179x_r), this));

src/mess/machine/primo.c

r14976	r14977
52	52	{
53	53	case 0x00:   /* Original ROM */
54	54	space->unmap_write(0x0000, 0x3fff);
55		memory_set_bankptr(machine,"bank1", machine.region("maincpu")->base()+0x10000);
	55	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base()+0x10000);
56	56	break;
57	57	case 0x01:   /* EPROM extension 1 */
58	58	space->unmap_write(0x0000, 0x3fff);
59		memory_set_bankptr(machine,"bank1", machine.region("maincpu")->base()+0x14000);
	59	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base()+0x14000);
60	60	break;
61	61	case 0x02:   /* RAM */
62	62	space->install_write_bank(0x0000, 0x3fff, "bank1");
63		memory_set_bankptr(machine,"bank1", machine.region("maincpu")->base());
	63	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
64	64	break;
65	65	case 0x03:   /* EPROM extension 2 */
66	66	space->unmap_write(0x0000, 0x3fff);
67		memory_set_bankptr(machine,"bank1", machine.region("maincpu")->base()+0x18000);
	67	state->membank("bank1")->set_base(state->memregion("maincpu")->base()+0x18000);
68	68	break;
69	69	}
70	70	logerror ("Memory update: %02x\n", state->m_port_FD);

src/mess/machine/mface2.c

r14976	r14977
110	110	return;
111	111
112	112	t.cat(":multiface");
113		multiface_rom = machine().region(t)->base();
	113	multiface_rom = memregion(t)->base();
114	114
115	115	if ((m_multiface_flags & MULTIFACE_RAM_ROM_ENABLED)!=0 && m_romdis != 0)
116	116	{
117	117	/* set bank addressess */
118		memory_set_bankptr(machine(),"bank1", multiface_rom);
119		memory_set_bankptr(machine(),"bank2", m_multiface_ram);
120		memory_set_bankptr(machine(),"bank9", multiface_rom);
121		memory_set_bankptr(machine(),"bank10", m_multiface_ram);
	118	membank("bank1")->set_base(multiface_rom);
	119	membank("bank2")->set_base(m_multiface_ram);
	120	membank("bank9")->set_base(multiface_rom);
	121	membank("bank10")->set_base(m_multiface_ram);
122	122	}
123	123	}
124	124

src/mess/machine/svi318.c

r14976	r14977
91	91	DEVICE_IMAGE_LOAD( svi318_cart )
92	92	{
93	93	svi318_state *state = image.device().machine().driver_data<svi318_state>();
94		UINT8 *p = image.device().machine().region("user1")->base();
	94	UINT8 *p = state->memregion("user1")->base();
95	95	UINT32 size;
96	96
97	97	if (image.software_entry() == NULL)
r14976	r14977
373	373	svi318_state *state = machine.driver_data<svi318_state>();
374	374	/* 2K RAM, but allocating 4KB to make banking easier */
375	375	/* The upper 2KB will be set to FFs and will never be written to */
376		state->m_svi.svi806_ram = machine.region_alloc("gfx2", 0x1000, 1, ENDIANNESS_LITTLE );
	376	state->m_svi.svi806_ram = machine.memory().region_alloc("gfx2", 0x1000, 1, ENDIANNESS_LITTLE );
377	377	memset( state->m_svi.svi806_ram->base(), 0x00, 0x800 );
378	378	memset( state->m_svi.svi806_ram->base() + 0x800, 0xFF, 0x800 );
379		state->m_svi.svi806_gfx = machine.region("gfx1")->base();
	379	state->m_svi.svi806_gfx = state->memregion("gfx1")->base();
380	380	}
381	381
382	382
r14976	r14977
651	651	switch( state->m_svi.bankLow )
652	652	{
653	653	case SVI_INTERNAL:
654		state->m_svi.bankLow_ptr = machine.region("maincpu")->base();
	654	state->m_svi.bankLow_ptr = state->memregion("maincpu")->base();
655	655	break;
656	656	case SVI_CART:
657	657	if ( state->m_pcart )
r14976	r14977
731	731	}
732	732	}
733	733
734		memory_set_bankptr(machine, "bank1", state->m_svi.bankLow_ptr );
735		memory_set_bankptr(machine, "bank2", state->m_svi.bankHigh1_ptr );
736		memory_set_bankptr(machine, "bank3", state->m_svi.bankHigh2_ptr );
	734	state->membank("bank1")->set_base(state->m_svi.bankLow_ptr );
	735	state->membank("bank2")->set_base(state->m_svi.bankHigh1_ptr );
	736	state->membank("bank3")->set_base(state->m_svi.bankHigh2_ptr );
737	737
738	738	/* SVI-806 80 column card specific banking */
739	739	if ( state->m_svi.svi806_present )
740	740	{
741	741	if ( state->m_svi.svi806_ram_enabled )
742	742	{
743		memory_set_bankptr(machine, "bank4", state->m_svi.svi806_ram );
	743	state->membank("bank4")->set_base(state->m_svi.svi806_ram );
744	744	}
745	745	else
746	746	{
747		memory_set_bankptr(machine, "bank4", state->m_svi.bankHigh2_ptr + 0x3000 );
	747	state->membank("bank4")->set_base(state->m_svi.bankHigh2_ptr + 0x3000 );
748	748	}
749	749	}
750	750	}

src/mess/machine/c64_xl80.c

r14976	r14977
188	188	void c64_xl80_device::device_start()
189	189	{
190	190	// find memory regions
191		m_char_rom = subregion(HD46505SP_TAG)->base();
	191	m_char_rom = memregion(HD46505SP_TAG)->base();
192	192	c64_ram_pointer(machine(), RAM_SIZE);
193	193
194	194	// state saving

src/mess/machine/wswan.c

r14976	r14977
248	248	memset( &state->m_sound_dma, 0, sizeof( state->m_sound_dma ) );
249	249
250	250	/* Switch in the banks */
251		memory_set_bankptr( machine, "bank2", state->m_ROMMap[(state->m_ROMBanks - 1) & (state->m_ROMBanks - 1)] );
252		memory_set_bankptr( machine, "bank3", state->m_ROMMap[(state->m_ROMBanks - 1) & (state->m_ROMBanks - 1)] );
253		memory_set_bankptr( machine, "bank4", state->m_ROMMap[(state->m_ROMBanks - 12) & (state->m_ROMBanks - 1)] );
254		memory_set_bankptr( machine, "bank5", state->m_ROMMap[(state->m_ROMBanks - 11) & (state->m_ROMBanks - 1)] );
255		memory_set_bankptr( machine, "bank6", state->m_ROMMap[(state->m_ROMBanks - 10) & (state->m_ROMBanks - 1)] );
256		memory_set_bankptr( machine, "bank7", state->m_ROMMap[(state->m_ROMBanks - 9) & (state->m_ROMBanks - 1)] );
257		memory_set_bankptr( machine, "bank8", state->m_ROMMap[(state->m_ROMBanks - 8) & (state->m_ROMBanks - 1)] );
258		memory_set_bankptr( machine, "bank9", state->m_ROMMap[(state->m_ROMBanks - 7) & (state->m_ROMBanks - 1)] );
259		memory_set_bankptr( machine, "bank10", state->m_ROMMap[(state->m_ROMBanks - 6) & (state->m_ROMBanks - 1)] );
260		memory_set_bankptr( machine, "bank11", state->m_ROMMap[(state->m_ROMBanks - 5) & (state->m_ROMBanks - 1)] );
261		memory_set_bankptr( machine, "bank12", state->m_ROMMap[(state->m_ROMBanks - 4) & (state->m_ROMBanks - 1)] );
262		memory_set_bankptr( machine, "bank13", state->m_ROMMap[(state->m_ROMBanks - 3) & (state->m_ROMBanks - 1)] );
263		memory_set_bankptr( machine, "bank14", state->m_ROMMap[(state->m_ROMBanks - 2) & (state->m_ROMBanks - 1)] );
	251	state->membank( "bank2" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 1) & (state->m_ROMBanks - 1)] );
	252	state->membank( "bank3" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 1) & (state->m_ROMBanks - 1)] );
	253	state->membank( "bank4" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 12) & (state->m_ROMBanks - 1)] );
	254	state->membank( "bank5" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 11) & (state->m_ROMBanks - 1)] );
	255	state->membank( "bank6" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 10) & (state->m_ROMBanks - 1)] );
	256	state->membank( "bank7" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 9) & (state->m_ROMBanks - 1)] );
	257	state->membank( "bank8" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 8) & (state->m_ROMBanks - 1)] );
	258	state->membank( "bank9" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 7) & (state->m_ROMBanks - 1)] );
	259	state->membank( "bank10" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 6) & (state->m_ROMBanks - 1)] );
	260	state->membank( "bank11" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 5) & (state->m_ROMBanks - 1)] );
	261	state->membank( "bank12" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 4) & (state->m_ROMBanks - 1)] );
	262	state->membank( "bank13" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 3) & (state->m_ROMBanks - 1)] );
	263	state->membank( "bank14" )->set_base( state->m_ROMMap[(state->m_ROMBanks - 2) & (state->m_ROMBanks - 1)] );
264	264	state->m_bios_disabled = 0;
265		memory_set_bankptr( machine, "bank15", state->m_ws_bios_bank );
266		//  memory_set_bankptr( machine, 15, state->m_ROMMap[(state->m_ROMBanks - 1) & (state->m_ROMBanks - 1)] );
	265	state->membank( "bank15" )->set_base( state->m_ws_bios_bank );
	266	//  state->membank( 15 )->set_base( state->m_ROMMap[(state->m_ROMBanks - 1) & (state->m_ROMBanks - 1)] );
267	267	}
268	268
269	269	READ8_MEMBER( wswan_state::wswan_sram_r )
r14976	r14977
848	848	if ( ( data & 0x01 ) && !m_bios_disabled )
849	849	{
850	850	m_bios_disabled = 1;
851		memory_set_bankptr( machine(), "bank15", m_ROMMap[ ( ( ( m_ws_portram[0xc0] & 0x0F ) << 4 ) | 15 ) & ( m_ROMBanks - 1 ) ] );
	851	membank( "bank15" )->set_base( m_ROMMap[ ( ( ( m_ws_portram[0xc0] & 0x0F ) << 4 ) | 15 ) & ( m_ROMBanks - 1 ) ] );
852	852	}
853	853	break;
854	854	case 0xa2:   /* Timer control
r14976	r14977
1046	1046	Bit 0-3 - ROM bank base register for banks 4-15
1047	1047	Bit 4-7 - Unknown
1048	1048	*/
1049		memory_set_bankptr( machine(), "bank4", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 4 ) & ( m_ROMBanks - 1 ) ] );
1050		memory_set_bankptr( machine(), "bank5", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 5 ) & ( m_ROMBanks - 1 ) ] );
1051		memory_set_bankptr( machine(), "bank6", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 6 ) & ( m_ROMBanks - 1 ) ] );
1052		memory_set_bankptr( machine(), "bank7", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 7 ) & ( m_ROMBanks - 1 ) ] );
1053		memory_set_bankptr( machine(), "bank8", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 8 ) & ( m_ROMBanks - 1 ) ] );
1054		memory_set_bankptr( machine(), "bank9", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 9 ) & ( m_ROMBanks - 1 ) ] );
1055		memory_set_bankptr( machine(), "bank10", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 10 ) & ( m_ROMBanks - 1 ) ] );
1056		memory_set_bankptr( machine(), "bank11", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 11 ) & ( m_ROMBanks - 1 ) ] );
1057		memory_set_bankptr( machine(), "bank12", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 12 ) & ( m_ROMBanks - 1 ) ] );
1058		memory_set_bankptr( machine(), "bank13", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 13 ) & ( m_ROMBanks - 1 ) ] );
1059		memory_set_bankptr( machine(), "bank14", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 14 ) & ( m_ROMBanks - 1 ) ] );
	1049	membank( "bank4" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 4 ) & ( m_ROMBanks - 1 ) ] );
	1050	membank( "bank5" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 5 ) & ( m_ROMBanks - 1 ) ] );
	1051	membank( "bank6" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 6 ) & ( m_ROMBanks - 1 ) ] );
	1052	membank( "bank7" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 7 ) & ( m_ROMBanks - 1 ) ] );
	1053	membank( "bank8" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 8 ) & ( m_ROMBanks - 1 ) ] );
	1054	membank( "bank9" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 9 ) & ( m_ROMBanks - 1 ) ] );
	1055	membank( "bank10" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 10 ) & ( m_ROMBanks - 1 ) ] );
	1056	membank( "bank11" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 11 ) & ( m_ROMBanks - 1 ) ] );
	1057	membank( "bank12" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 12 ) & ( m_ROMBanks - 1 ) ] );
	1058	membank( "bank13" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 13 ) & ( m_ROMBanks - 1 ) ] );
	1059	membank( "bank14" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 14 ) & ( m_ROMBanks - 1 ) ] );
1060	1060	if ( m_bios_disabled )
1061	1061	{
1062		memory_set_bankptr( machine(), "bank15", m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 15 ) & ( m_ROMBanks - 1 ) ] );
	1062	membank( "bank15" )->set_base( m_ROMMap[ ( ( ( data & 0x0F ) << 4 ) | 15 ) & ( m_ROMBanks - 1 ) ] );
1063	1063	}
1064	1064	break;
1065	1065	case 0xc1:   /* SRAM bank select
r14976	r14977
1073	1073	case 0xc2:   /* ROM bank select for segment 2 (0x20000 - 0x2ffff)
1074	1074	Bit 0-7 - ROM bank for segment 2
1075	1075	*/
1076		memory_set_bankptr( machine(), "bank2", m_ROMMap[ data & ( m_ROMBanks - 1 ) ]);
	1076	membank( "bank2" )->set_base( m_ROMMap[ data & ( m_ROMBanks - 1 ) ]);
1077	1077	break;
1078	1078	case 0xc3:   /* ROM bank select for segment 3 (0x30000-0x3ffff)
1079	1079	Bit 0-7 - ROM bank for segment 3
1080	1080	*/
1081		memory_set_bankptr( machine(), "bank3", m_ROMMap[ data & ( m_ROMBanks - 1 ) ]);
	1081	membank( "bank3" )->set_base( m_ROMMap[ data & ( m_ROMBanks - 1 ) ]);
1082	1082	break;
1083	1083	case 0xc6:   /* EEPROM address lower bits port/EEPROM address and command port
1084	1084	1KBit EEPROM:

src/mess/machine/z80ne.c

r14976	r14977
78	78
79	79	DRIVER_INIT( z80ne )
80	80	{
	81	z80ne_state *state = machine.driver_data<z80ne_state>();
81	82	/* first two entries point to rom on reset */
82		UINT8 *RAM = machine.region("z80ne")->base();
83		memory_configure_bank(machine, "bank1", 0, 1, &RAM[0x00000], 0x0400); /* RAM   at 0x0000 */
84		memory_configure_bank(machine, "bank1", 1, 1, &RAM[0x14000], 0x0400); /* ep382 at 0x0000 */
85		memory_configure_bank(machine, "bank2", 0, 1, &RAM[0x14000], 0x0400); /* ep382 at 0x8000 */
	83	UINT8 *RAM = state->memregion("z80ne")->base();
	84	state->membank("bank1")->configure_entry(0, &RAM[0x00000]); /* RAM   at 0x0000 */
	85	state->membank("bank1")->configure_entry(1, &RAM[0x14000]); /* ep382 at 0x0000 */
	86	state->membank("bank2")->configure_entry(0, &RAM[0x14000]); /* ep382 at 0x8000 */
86	87	}
87	88
88	89	DRIVER_INIT( z80net )
r14976	r14977
96	97
97	98	DRIVER_INIT( z80netf )
98	99	{
	100	z80ne_state *state = machine.driver_data<z80ne_state>();
99	101	/* first two entries point to rom on reset */
100		UINT8 *RAM = machine.region("z80ne")->base();
101		memory_configure_bank(machine, "bank1", 0, 1, &RAM[0x00000], 0x0400); /* RAM   at 0x0000-0x03FF */
102		memory_configure_bank(machine, "bank1", 1, 3, &RAM[0x14400], 0x0400); /* ep390, ep1390, ep2390 at 0x0000-0x03FF */
103		memory_configure_bank(machine, "bank1", 4, 1, &RAM[0x14000], 0x0400); /* ep382 at 0x0000-0x03FF */
104		memory_configure_bank(machine, "bank1", 5, 1, &RAM[0x10000], 0x0400); /* ep548 at 0x0000-0x03FF */
	102	UINT8 *RAM = state->memregion("z80ne")->base();
	103	state->membank("bank1")->configure_entry(0, &RAM[0x00000]); /* RAM   at 0x0000-0x03FF */
	104	state->membank("bank1")->configure_entries(1, 3, &RAM[0x14400], 0x0400); /* ep390, ep1390, ep2390 at 0x0000-0x03FF */
	105	state->membank("bank1")->configure_entry(4, &RAM[0x14000]); /* ep382 at 0x0000-0x03FF */
	106	state->membank("bank1")->configure_entry(5, &RAM[0x10000]); /* ep548 at 0x0000-0x03FF */
105	107
106		memory_configure_bank(machine, "bank2", 0, 1, &RAM[0x00400], 0x3C00); /* RAM   at 0x0400 */
107		memory_configure_bank(machine, "bank2", 1, 1, &RAM[0x10400], 0x3C00); /* ep548 at 0x0400-0x3FFF */
	108	state->membank("bank2")->configure_entry(0, &RAM[0x00400]); /* RAM   at 0x0400 */
	109	state->membank("bank2")->configure_entry(1, &RAM[0x10400]); /* ep548 at 0x0400-0x3FFF */
108	110
109		memory_configure_bank(machine, "bank3", 0, 1, &RAM[0x08000], 0x0400); /* RAM   at 0x8000 */
110		memory_configure_bank(machine, "bank3", 1, 1, &RAM[0x14000], 0x0400); /* ep382 at 0x8000 */
	111	state->membank("bank3")->configure_entry(0, &RAM[0x08000]); /* RAM   at 0x8000 */
	112	state->membank("bank3")->configure_entry(1, &RAM[0x14000]); /* ep382 at 0x8000 */
111	113
112		memory_configure_bank(machine, "bank4", 0, 1, &RAM[0x0F000], 0x0400); /* RAM   at 0xF000 */
113		memory_configure_bank(machine, "bank4", 1, 3, &RAM[0x14400], 0x0400); /* ep390, ep1390, ep2390 at 0xF000 */
	114	state->membank("bank4")->configure_entry(0, &RAM[0x0F000]); /* RAM   at 0xF000 */
	115	state->membank("bank4")->configure_entries(1, 3, &RAM[0x14400], 0x0400); /* ep390, ep1390, ep2390 at 0xF000 */
114	116
115	117	}
116	118
r14976	r14977
199	201	/* remove this callback */
200	202	machine.device("z80ne")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_default), &machine));
201	203	/* and switch to RAM bank at address 0x0000 */
202		memory_set_bank( machine, "bank1", 0 ); /* RAM at 0x0000 (bank 1) */
	204	state->membank( "bank1" )->set_entry( 0 ); /* RAM at 0x0000 (bank 1) */
203	205	}
204	206	return address;
205	207	}
r14976	r14977
218	220	address_space *space = machine.device("z80ne")->memory().space(AS_PROGRAM);
219	221
220	222	/* switch to ROM bank at address 0x0000 */
221		memory_set_bank(machine, "bank1", 1);
222		memory_set_bank(machine, "bank2", 0);  /* ep382 at 0x8000 */
	223	state->membank("bank1")->set_entry(1);
	224	state->membank("bank2")->set_entry(0);  /* ep382 at 0x8000 */
223	225
224	226	/* after the first 3 bytes have been read from ROM, switch the RAM back in */
225	227	state->m_reset_delay_counter = 2;
r14976	r14977
236	238	case 0x01: /* EP382 Hex Monitor */
237	239	if (VERBOSE)
238	240	logerror("reset_lx390_banking: banking ep382\n");
239		memory_set_bank(machine, "bank1", 4);  /* ep382 at 0x0000 for 3 cycles, then RAM */
240		memory_set_bank(machine, "bank2", 0);  /* RAM   at 0x0400 */
241		memory_set_bank(machine, "bank3", 1);  /* ep382 at 0x8000 */
242		memory_set_bank(machine, "bank4", 0);  /* RAM   at 0xF000 */
	241	state->membank("bank1")->set_entry(4);  /* ep382 at 0x0000 for 3 cycles, then RAM */
	242	state->membank("bank2")->set_entry(0);  /* RAM   at 0x0400 */
	243	state->membank("bank3")->set_entry(1);  /* ep382 at 0x8000 */
	244	state->membank("bank4")->set_entry(0);  /* RAM   at 0xF000 */
243	245	/* after the first 3 bytes have been read from ROM, switch the RAM back in */
244	246	state->m_reset_delay_counter = 2;
245	247	space->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_reset_delay_count), &machine));
r14976	r14977
247	249	case 0x02: /* EP548  16k BASIC */
248	250	if (VERBOSE)
249	251	logerror("reset_lx390_banking: banking ep548\n");
250		memory_set_bank(machine, "bank1", 5);  /* ep548 at 0x0000-0x03FF */
251		memory_set_bank(machine, "bank2", 1);  /* ep548 at 0x0400-0x3FFF */
252		memory_set_bank(machine, "bank3", 0);  /* RAM   at 0x8000 */
253		memory_set_bank(machine, "bank4", 0);  /* RAM   at 0xF000 */
	252	state->membank("bank1")->set_entry(5);  /* ep548 at 0x0000-0x03FF */
	253	state->membank("bank2")->set_entry(1);  /* ep548 at 0x0400-0x3FFF */
	254	state->membank("bank3")->set_entry(0);  /* RAM   at 0x8000 */
	255	state->membank("bank4")->set_entry(0);  /* RAM   at 0xF000 */
254	256	machine.device("z80ne")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_default), &machine));
255	257	break;
256	258	case 0x03: /* EP390  Boot Loader for 5.5k floppy BASIC */
257	259	if (VERBOSE)
258	260	logerror("reset_lx390_banking: banking ep390\n");
259		memory_set_bank(machine, "bank1", 1);  /* ep390 at 0x0000-0 x03FF for 3 cycles, then RAM */
260		memory_set_bank(machine, "bank2", 0);  /* RAM   at 0x0400-0x3FFF */
261		memory_set_bank(machine, "bank3", 0);  /* RAM   at 0x8000 */
262		memory_set_bank(machine, "bank4", 1);  /* ep390 at 0xF000 */
	261	state->membank("bank1")->set_entry(1);  /* ep390 at 0x0000-0 x03FF for 3 cycles, then RAM */
	262	state->membank("bank2")->set_entry(0);  /* RAM   at 0x0400-0x3FFF */
	263	state->membank("bank3")->set_entry(0);  /* RAM   at 0x8000 */
	264	state->membank("bank4")->set_entry(1);  /* ep390 at 0xF000 */
263	265	machine.device("z80ne")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_default), &machine));
264	266	break;
265	267	case 0x04: /* EP1390 Boot Loader for NE DOS 1.0/1.5 */
266	268	if (VERBOSE)
267	269	logerror("reset_lx390_banking: banking ep1390\n");
268		memory_set_bank(machine, "bank1", 2);  /* ep1390 at 0x0000-0x03FF for 3 cycles, then RAM */
269		memory_set_bank(machine, "bank2", 0);  /* RAM   at 0x0400-0x3FFF */
270		memory_set_bank(machine, "bank3", 0);  /* RAM   at 0x8000 */
271		memory_set_bank(machine, "bank4", 2);  /* ep1390 at 0xF000 */
	270	state->membank("bank1")->set_entry(2);  /* ep1390 at 0x0000-0x03FF for 3 cycles, then RAM */
	271	state->membank("bank2")->set_entry(0);  /* RAM   at 0x0400-0x3FFF */
	272	state->membank("bank3")->set_entry(0);  /* RAM   at 0x8000 */
	273	state->membank("bank4")->set_entry(2);  /* ep1390 at 0xF000 */
272	274	machine.device("z80ne")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_default), &machine));
273	275	break;
274	276	case 0x05: /* EP2390 Boot Loader for NE DOS G.1 */
275	277	if (VERBOSE)
276	278	logerror("reset_lx390_banking: banking ep2390\n");
277		memory_set_bank(machine, "bank1", 3);  /* ep2390 at 0x0000-0x03FF for 3 cycles, then RAM */
278		memory_set_bank(machine, "bank2", 0);  /* RAM   at 0x0400-0x3FFF */
279		memory_set_bank(machine, "bank3", 0);  /* RAM   at 0x8000 */
280		memory_set_bank(machine, "bank4", 3);  /* ep2390 at 0xF000 */
	279	state->membank("bank1")->set_entry(3);  /* ep2390 at 0x0000-0x03FF for 3 cycles, then RAM */
	280	state->membank("bank2")->set_entry(0);  /* RAM   at 0x0400-0x3FFF */
	281	state->membank("bank3")->set_entry(0);  /* RAM   at 0x8000 */
	282	state->membank("bank4")->set_entry(3);  /* ep2390 at 0xF000 */
281	283	machine.device("z80ne")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_default), &machine));
282	284	break;
283	285	}
r14976	r14977
704	706	}
705	707
706	708	READ8_DEVICE_HANDLER(lx390_reset_bank)
707		{
	709	{
	710	z80ne_state *state = device->machine().driver_data<z80ne_state>();
708	711	offs_t pc;
709	712
710	713	/* if PC is not in range, we are under integrated debugger control, DON'T SWAP */
r14976	r14977
712	715	if((pc >= 0xf000) && (pc <=0xffff))
713	716	{
714	717	LOG(("lx390_reset_bank, reset memory bank 1\n"));
715		memory_set_bank(device->machine(), "bank1", 0); /* RAM at 0x0000 (bank 1) */
	718	state->membank("bank1")->set_entry(0); /* RAM at 0x0000 (bank 1) */
716	719	}
717	720	else
718	721	{

src/mess/machine/apple2gs.c

r14976	r14977
552	552	break;
553	553
554	554	case 0x07:   /* synchronize */
555		if (machine.region("maincpu")->bytes() == 0x40000)   /* HACK */
	555	if (state->memregion("maincpu")->bytes() == 0x40000)   /* HACK */
556	556	state->m_adb_command_length = 8;
557	557	else
558	558	state->m_adb_command_length = 4;
r14976	r14977
827	827
828	828	if (state->m_sndglu_ctrl & 0x40)   // docram access
829	829	{
830		UINT8 *docram = space->machine().region("es5503")->base();
	830	UINT8 *docram = state->memregion("es5503")->base();
831	831	state->m_sndglu_dummy_read = docram[state->m_sndglu_addr];
832	832	}
833	833	else
r14976	r14977
868	868	case 1:   // data write
869	869	if (state->m_sndglu_ctrl & 0x40)   // docram access
870	870	{
871		UINT8 *docram = space->machine().region("es5503")->base();
	871	UINT8 *docram = space->machine().root_device().memregion("es5503")->base();
872	872	docram[state->m_sndglu_addr] = data;
873	873	}
874	874	else
r14976	r14977
1047	1047	case 0x74: case 0x75: case 0x76: case 0x77:
1048	1048	case 0x78: case 0x79: case 0x7a: case 0x7b:
1049	1049	case 0x7c: case 0x7d: case 0x7e: case 0x7f:
1050		offset |= (space->machine().region("maincpu")->bytes() - 1) & ~0x3FFF;
1051		result = space->machine().region("maincpu")->base()[offset];
	1050	offset |= (space->machine().root_device().memregion("maincpu")->bytes() - 1) & ~0x3FFF;
	1051	result = space->machine().root_device().memregion("maincpu")->base()[offset];
1052	1052	break;
1053	1053
1054	1054	case 0x21:   /* C021 - MONOCOLOR */
r14976	r14977
1537	1537	assert(address >= 0xC000);
1538	1538	assert(address <= 0xCFFF);
1539	1539
1540		rom = machine.region("maincpu")->base();
1541		rom += 0x030000 % machine.region("maincpu")->bytes();
	1540	rom = machine.root_device().memregion("maincpu")->base();
	1541	rom += 0x030000 % machine.root_device().memregion("maincpu")->bytes();
1542	1542	return &rom[address];
1543	1543	}
1544	1544
r14976	r14977
1759	1759
1760	1760	// ROM 03 hardware: the quoted "1 MB" for a base machine doesn't include banks e0/e1, so map accordingly
1761	1761	space->install_readwrite_bank(0x010000, ramsize - 1, "bank1");
1762		memory_set_bankptr(machine,"bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0x010000);
	1762	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x010000);
1763	1763
1764	1764	space->install_legacy_read_handler( ramsize, 0xdfffff, FUNC(apple2gs_bank_echo_r));
1765	1765	state->m_echo_bank = (ramsize >> 16);
r14976	r14977
1770	1770
1771	1771	// ROM 00/01 hardware: the quoted "256K" for a base machine *does* include banks e0/e1.
1772	1772	space->install_readwrite_bank(0x010000, ramsize - 1 + 0x10000, "bank1");
1773		memory_set_bankptr(machine,"bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0x010000);
	1773	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x010000);
1774	1774
1775	1775	space->install_legacy_read_handler( ramsize + 0x10000, 0xdfffff, FUNC(apple2gs_bank_echo_r));
1776	1776	state->m_echo_bank = (ramsize+0x10000) >> 16;
r14976	r14977
1783	1783	space->install_legacy_write_handler(0xe02000, 0xe03fff, FUNC(apple2gs_E02xxx_w));
1784	1784	space->install_legacy_write_handler(0xe10400, 0xe107ff, FUNC(apple2gs_E104xx_w));
1785	1785	space->install_legacy_write_handler(0xe12000, 0xe13fff, FUNC(apple2gs_E12xxx_w));
1786		memory_set_bankptr(machine,"bank2", state->m_slowmem);
	1786	state->membank("bank2")->set_base(state->m_slowmem);
1787	1787
1788	1788	/* install alternate ROM bank */
1789		begin = 0x1000000 - machine.region("maincpu")->bytes();
	1789	begin = 0x1000000 - machine.root_device().memregion("maincpu")->bytes();
1790	1790	end = 0xffffff;
1791	1791	space->install_read_bank(begin, end, "bank3");
1792		memory_set_bankptr(machine,"bank3", machine.region("maincpu")->base());
	1792	state->membank("bank3")->set_base(machine.root_device().memregion("maincpu")->base());
1793	1793
1794	1794	/* install new xxC000-xxCFFF handlers */
1795	1795	space->install_legacy_read_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_r));

src/mess/machine/comx_thm.c

r14976	r14977
58	58	{
59	59	m_slot = dynamic_cast<comx_expansion_slot_device *>(owner());
60	60
61		m_rom = subregion("c000")->base();
	61	m_rom = memregion("c000")->base();
62	62	}
63	63
64	64

src/mess/machine/mpc105.c

r14976	r14977
119	119	if (m_bank_base > 0)
120	120	{
121	121	sprintf(bank_str,"bank%d",bank + m_bank_base);
122		memory_set_bankptr(machine(), bank_str, machine().device<ram_device>(RAM_TAG)->pointer());
	122	membank(bank_str)->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
123	123	}
124	124	}
125	125	}

src/mess/machine/iq151_minigraf.c

r14976	r14977
57	57
58	58	void iq151_minigraf_device::device_start()
59	59	{
60		m_rom = (UINT8*)subregion("minigraf")->base();
	60	m_rom = (UINT8*)memregion("minigraf")->base();
61	61
62	62	// allocate a bitmap for represent the paper
63	63	m_paper = auto_bitmap_ind16_alloc(machine(), PAPER_WIDTH, PAPER_HEIGHT);

src/mess/machine/iq151_rom.c

r14976	r14977
51	51
52	52	void iq151_rom_device::device_start()
53	53	{
54		m_rom = (UINT8*)subregion("rom")->base();
	54	m_rom = (UINT8*)memregion("rom")->base();
55	55	}
56	56
57	57	//-------------------------------------------------

src/mess/machine/nes.c

r14976	r14977
41	41	int prg_banks = (state->m_prg_chunks == 1) ? (2 * 2) : (state->m_prg_chunks * 2);
42	42	int i;
43	43
44		state->m_rom = machine.region("maincpu")->base();
45		state->m_ciram = machine.region("ciram")->base();
	44	state->m_rom = machine.root_device().memregion("maincpu")->base();
	45	state->m_ciram = machine.root_device().memregion("ciram")->base();
46	46	// other pointers got set in the loading routine
47	47
48	48	/* Brutal hack put in as a consequence of the new memory system; we really need to fix the NES code */
r14976	r14977
51	51	machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0, 0x1fff, FUNC(nes_chr_r), FUNC(nes_chr_w));
52	52	machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x2000, 0x3eff, FUNC(nes_nt_r), FUNC(nes_nt_w));
53	53
54		memory_set_bankptr(machine, "bank10", state->m_rom);
	54	state->membank("bank10")->set_base(state->m_rom);
55	55
56	56	/* If there is Disk Expansion and no cart has been loaded, setup memory accordingly */
57	57	if (state->m_disk_expansion && state->m_pcb_id == NO_BOARD)
r14976	r14977
75	75	space->install_write_handler(0x4020, 0x402f, write8_delegate(FUNC(nes_state::nes_fds_w),state));
76	76	space->install_write_bank(0x6000, 0xdfff, "bank2");
77	77
78		memory_set_bankptr(machine, "bank1", &state->m_rom[0xe000]);
79		memory_set_bankptr(machine, "bank2", state->m_fds_ram);
	78	state->membank("bank1")->set_base(&state->m_rom[0xe000]);
	79	state->membank("bank2")->set_base(state->m_fds_ram);
80	80	return;
81	81	}
82	82
r14976	r14977
93	93	/* configure banks 1-4 */
94	94	for (i = 0; i < 4; i++)
95	95	{
96		memory_configure_bank(machine, bank_names[i], 0, prg_banks, state->m_prg, 0x2000);
	96	state->membank(bank_names[i])->configure_entries(0, prg_banks, state->m_prg, 0x2000);
97	97	// some mappers (e.g. MMC5) can map PRG RAM in  0x8000-0xffff as well
98	98	if (state->m_prg_ram)
99		memory_configure_bank(machine, bank_names[i], prg_banks, state->m_wram_size / 0x2000, state->m_wram, 0x2000);
	99	state->membank(bank_names[i])->configure_entries(prg_banks, state->m_wram_size / 0x2000, state->m_wram, 0x2000);
100	100	// however, at start we point to PRG ROM
101		memory_set_bank(machine, bank_names[i], i);
	101	state->membank(bank_names[i])->set_entry(i);
102	102	state->m_prg_bank[i] = i;
103	103	}
104	104
105	105	/* bank 5 configuration is more delicate, since it can have PRG RAM, PRG ROM or SRAM mapped to it */
106	106	/* we first map PRG ROM banks, then the battery bank (if a battery is present), and finally PRG RAM (state->m_wram) */
107		memory_configure_bank(machine, "bank5", 0, prg_banks, state->m_prg, 0x2000);
	107	state->membank("bank5")->configure_entries(0, prg_banks, state->m_prg, 0x2000);
108	108	state->m_battery_bank5_start = prg_banks;
109	109	state->m_prgram_bank5_start = prg_banks;
110	110	state->m_empty_bank5_start = prg_banks;
r14976	r14977
114	114	{
115	115	UINT32 bank_size = (state->m_battery_size > 0x2000) ? 0x2000 : state->m_battery_size;
116	116	int bank_num = (state->m_battery_size > 0x2000) ? state->m_battery_size / 0x2000 : 1;
117		memory_configure_bank(machine, "bank5", prg_banks, bank_num, state->m_battery_ram, bank_size);
	117	state->membank("bank5")->configure_entries(prg_banks, bank_num, state->m_battery_ram, bank_size);
118	118	state->m_prgram_bank5_start += bank_num;
119	119	state->m_empty_bank5_start += bank_num;
120	120	}
121	121	/* add prg ram. */
122	122	if (state->m_prg_ram)
123	123	{
124		memory_configure_bank(machine, "bank5", state->m_prgram_bank5_start, state->m_wram_size / 0x2000, state->m_wram, 0x2000);
	124	state->membank("bank5")->configure_entries(state->m_prgram_bank5_start, state->m_wram_size / 0x2000, state->m_wram, 0x2000);
125	125	state->m_empty_bank5_start += state->m_wram_size / 0x2000;
126	126	}
127	127
128		memory_configure_bank(machine, "bank5", state->m_empty_bank5_start, 1, state->m_rom + 0x6000, 0x2000);
	128	state->membank("bank5")->configure_entry(state->m_empty_bank5_start, state->m_rom + 0x6000);
129	129
130	130	/* if we have any additional PRG RAM, point bank5 to its first bank */
131	131	if (state->m_battery || state->m_prg_ram)
r14976	r14977
133	133	else
134	134	state->m_prg_bank[4] = state->m_empty_bank5_start; // or shall we point to "maincpu" region at 0x6000? point is that we should never access this region if no sram or wram is present!
135	135
136		memory_set_bank(machine, "bank5", state->m_prg_bank[4]);
	136	state->membank("bank5")->set_entry(state->m_prg_bank[4]);
137	137
138	138	if (state->m_four_screen_vram)
139	139	{
r14976	r14977
228	228
229	229	static void nes_banks_restore(nes_state *state)
230	230	{
231		memory_set_bank(state->machine(), "bank1", state->m_prg_bank[0]);
232		memory_set_bank(state->machine(), "bank2", state->m_prg_bank[1]);
233		memory_set_bank(state->machine(), "bank3", state->m_prg_bank[2]);
234		memory_set_bank(state->machine(), "bank4", state->m_prg_bank[3]);
235		memory_set_bank(state->machine(), "bank5", state->m_prg_bank[4]);
	231	state->membank("bank1")->set_entry(state->m_prg_bank[0]);
	232	state->membank("bank2")->set_entry(state->m_prg_bank[1]);
	233	state->membank("bank3")->set_entry(state->m_prg_bank[2]);
	234	state->membank("bank4")->set_entry(state->m_prg_bank[3]);
	235	state->membank("bank5")->set_entry(state->m_prg_bank[4]);
236	236	}
237	237
238	238	static void nes_state_register( running_machine &machine )

src/mess/machine/lux21046.c

r14976	r14977
395	395	save_item(NAME(m_force_busy));
396	396
397	397	// patch out sector skew table
398		/*  UINT8 *rom = subregion(Z80_TAG)->base();
	398	/*  UINT8 *rom = memregion(Z80_TAG)->base();
399	399
400	400	for (int i = 0; i < 16; i++)
401	401	rom[0x2dd3 + i] = i + 1;*/

src/mess/machine/nes_mmc.c

r14976	r14977
260	260	bank &= (state->m_wram_size / 0x2000) - 1;
261	261	state->m_prg_bank[4] = state->m_prgram_bank5_start + bank;
262	262	}
263		memory_set_bank(machine, "bank5", state->m_prg_bank[4]);
	263	state->membank("bank5")->set_entry(state->m_prg_bank[4]);
264	264	}
265	265
266	266	INLINE void prg_bank_refresh( running_machine &machine )
267	267	{
268	268	nes_state *state = machine.driver_data<nes_state>();
269		memory_set_bank(machine, "bank1", state->m_prg_bank[0]);
270		memory_set_bank(machine, "bank2", state->m_prg_bank[1]);
271		memory_set_bank(machine, "bank3", state->m_prg_bank[2]);
272		memory_set_bank(machine, "bank4", state->m_prg_bank[3]);
	269	state->membank("bank1")->set_entry(state->m_prg_bank[0]);
	270	state->membank("bank2")->set_entry(state->m_prg_bank[1]);
	271	state->membank("bank3")->set_entry(state->m_prg_bank[2]);
	272	state->membank("bank4")->set_entry(state->m_prg_bank[3]);
273	273	}
274	274
275	275	/* PRG ROM in 8K, 16K or 32K blocks */
r14976	r14977
371	371	bank &= ((state->m_prg_chunks << 1) - 1);
372	372
373	373	state->m_prg_bank[4] = bank;
374		memory_set_bank(machine, "bank5", state->m_prg_bank[4]);
	374	state->membank("bank5")->set_entry(state->m_prg_bank[4]);
375	375	}
376	376
377	377	/* We also define an additional helper to map 8k PRG-ROM to one of the banks (passed as parameter) */

src/mess/machine/sym1.c

r14976	r14977
306	306	so that the CPU can find its reset vectors */
307	307	machine.device( "maincpu")->memory().space( AS_PROGRAM )->install_read_bank(0xf800, 0xffff, "bank1");
308	308	machine.device( "maincpu")->memory().space( AS_PROGRAM )->nop_write(0xf800, 0xffff);
309		memory_set_bankptr(machine, "bank1", state->m_monitor + 0x800);
	309	state->membank("bank1")->set_base(state->m_monitor + 0x800);
310	310	machine.device("maincpu")->reset();
311	311	}

src/mess/machine/ondra.c

r14976	r14977
40	40	static void ondra_update_banks(running_machine &machine)
41	41	{
42	42	ondra_state *state = machine.driver_data<ondra_state>();
43		UINT8 *mem = machine.region("maincpu")->base();
	43	UINT8 *mem = state->memregion("maincpu")->base();
44	44	if (state->m_bank1_status==0) {
45	45	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x0000, 0x3fff);
46		memory_set_bankptr(machine, "bank1", mem + 0x010000);
	46	state->membank("bank1")->set_base(mem + 0x010000);
47	47	} else {
48	48	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x0000, 0x3fff, "bank1");
49		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0x0000);
	49	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x0000);
50	50	}
51		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
	51	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
52	52	if (state->m_bank2_status==0) {
53	53	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xe000, 0xffff, "bank3");
54		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0xe000);
	54	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xe000);
55	55	} else {
56	56	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0xe000, 0xffff);
57	57	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_handler (0xe000, 0xffff, read8_delegate(FUNC(ondra_state::ondra_keyboard_r),state));

src/mess/machine/kaypro.c

r14976	r14977
48	48	{
49	49	mem->unmap_readwrite (0x0000, 0x3fff);
50	50	mem->install_read_bank (0x0000, 0x0fff, "bank1");
51		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base());
	51	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
52	52	mem->install_readwrite_handler (0x3000, 0x3fff, read8_delegate(FUNC(kaypro_state::kaypro_videoram_r), this), write8_delegate(FUNC(kaypro_state::kaypro_videoram_w), this));
53	53	}
54	54	else
r14976	r14977
56	56	mem->unmap_readwrite(0x0000, 0x3fff);
57	57	mem->install_read_bank (0x0000, 0x3fff, "bank2");
58	58	mem->install_write_bank (0x0000, 0x3fff, "bank3");
59		memory_set_bankptr(machine(), "bank2", machine().region("rambank")->base());
60		memory_set_bankptr(machine(), "bank3", machine().region("rambank")->base());
	59	membank("bank2")->set_base(machine().root_device().memregion("rambank")->base());
	60	membank("bank3")->set_base(machine().root_device().memregion("rambank")->base());
61	61	}
62	62
63	63	wd17xx_dden_w(m_fdc, BIT(data, 5));
r14976	r14977
161	161	{
162	162	mem->unmap_readwrite (0x0000, 0x3fff);
163	163	mem->install_read_bank (0x0000, 0x1fff, "bank1");
164		memory_set_bankptr(mem->machine(), "bank1", mem->machine().region("maincpu")->base());
	164	membank("bank1")->set_base(mem->machine().root_device().memregion("maincpu")->base());
165	165	}
166	166	else
167	167	{
168	168	mem->unmap_readwrite (0x0000, 0x3fff);
169	169	mem->install_read_bank (0x0000, 0x3fff, "bank2");
170	170	mem->install_write_bank (0x0000, 0x3fff, "bank3");
171		memory_set_bankptr(mem->machine(), "bank2", mem->machine().region("rambank")->base());
172		memory_set_bankptr(mem->machine(), "bank3", mem->machine().region("rambank")->base());
	171	membank("bank2")->set_base(mem->machine().root_device().memregion("rambank")->base());
	172	membank("bank3")->set_base(mem->machine().root_device().memregion("rambank")->base());
173	173	}
174	174
175	175	wd17xx_dden_w(m_fdc, BIT(data, 5));
r14976	r14977
375	375	{
376	376	kaypro_state *state = image.device().machine().driver_data<kaypro_state>();
377	377	address_space *space = state->m_maincpu->memory().space(AS_PROGRAM);
378		UINT8 *RAM = image.device().machine().region("rambank")->base();
	378	UINT8 *RAM = state->memregion("rambank")->base();
379	379	UINT16 i;
380	380	UINT8 data;
381	381
r14976	r14977
398	398	{
399	399	kaypro_state *state = image.device().machine().driver_data<kaypro_state>();
400	400	address_space *space = state->m_maincpu->memory().space(AS_PROGRAM);
401		UINT8 *RAM = image.device().machine().region("rambank")->base();
	401	UINT8 *RAM = state->memregion("rambank")->base();
402	402	UINT16 i;
403	403	UINT8 data;
404	404

src/mess/machine/partner.c

r14976	r14977
54	54	sprintf(bank,"bank%d",bank_num);
55	55	switch(state->m_win_mem_page) {
56	56	case 2 : // FDD BIOS
57		memory_set_bankptr(machine, bank, rom + 0x16000 + offset);
	57	state->membank(bank)->set_base(rom + 0x16000 + offset);
58	58	break;
59	59	case 4 : // MCPG BIOS
60		memory_set_bankptr(machine, bank, rom + 0x14000 + offset);
	60	state->membank(bank)->set_base(rom + 0x14000 + offset);
61	61	break;
62	62	default : // BIOS
63		memory_set_bankptr(machine, bank, rom + 0x10000 + offset);
	63	state->membank(bank)->set_base(rom + 0x10000 + offset);
64	64	break;
65	65	}
66	66	}
r14976	r14977
72	72	sprintf(bank,"bank%d",bank_num);
73	73	switch(state->m_win_mem_page) {
74	74	case 4 : // MCPG FONT
75		memory_set_bankptr(machine, bank, rom + 0x18000 + offset);
	75	state->membank(bank)->set_base(rom + 0x18000 + offset);
76	76	break;
77	77	default : // BIOS
78		memory_set_bankptr(machine, bank, rom + 0x10000 + offset);
	78	state->membank(bank)->set_base(rom + 0x10000 + offset);
79	79	break;
80	80	}
81	81	}
r14976	r14977
137	137	// Timer
138	138	break;
139	139	default : // BIOS
140		memory_set_bankptr(machine, "bank11", rom + 0x10000);
	140	state->membank("bank11")->set_base(rom + 0x10000);
141	141	break;
142	142	}
143	143	}
r14976	r14977
145	145	{
146	146	partner_state *state = machine.driver_data<partner_state>();
147	147	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
148		UINT8 *rom = machine.region("maincpu")->base();
	148	UINT8 *rom = state->memregion("maincpu")->base();
149	149	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
150	150
151	151	space->install_write_bank(0x0000, 0x07ff, "bank1");
r14976	r14977
166	166	// BANK 1 (0x0000 - 0x07ff)
167	167	if (state->m_mem_page==0) {
168	168	space->unmap_write(0x0000, 0x07ff);
169		memory_set_bankptr(machine, "bank1", rom + 0x10000);
	169	state->membank("bank1")->set_base(rom + 0x10000);
170	170	} else {
171	171	if (state->m_mem_page==7) {
172		memory_set_bankptr(machine, "bank1", ram + 0x8000);
	172	state->membank("bank1")->set_base(ram + 0x8000);
173	173	} else {
174		memory_set_bankptr(machine, "bank1", ram + 0x0000);
	174	state->membank("bank1")->set_base(ram + 0x0000);
175	175	}
176	176	}
177	177
178	178	// BANK 2 (0x0800 - 0x3fff)
179	179	if (state->m_mem_page==7) {
180		memory_set_bankptr(machine, "bank2", ram + 0x8800);
	180	state->membank("bank2")->set_base(ram + 0x8800);
181	181	} else {
182		memory_set_bankptr(machine, "bank2", ram + 0x0800);
	182	state->membank("bank2")->set_base(ram + 0x0800);
183	183	}
184	184
185	185	// BANK 3 (0x4000 - 0x5fff)
186	186	if (state->m_mem_page==7) {
187		memory_set_bankptr(machine, "bank3", ram + 0xC000);
	187	state->membank("bank3")->set_base(ram + 0xC000);
188	188	} else {
189	189	if (state->m_mem_page==10) {
190	190	//window 1
191	191	space->unmap_write(0x4000, 0x5fff);
192	192	partner_window_1(machine, 3, 0, rom);
193	193	} else {
194		memory_set_bankptr(machine, "bank3", ram + 0x4000);
	194	state->membank("bank3")->set_base(ram + 0x4000);
195	195	}
196	196	}
197	197
198	198	// BANK 4 (0x6000 - 0x7fff)
199	199	if (state->m_mem_page==7) {
200		memory_set_bankptr(machine, "bank4", ram + 0xe000);
	200	state->membank("bank4")->set_base(ram + 0xe000);
201	201	} else {
202		memory_set_bankptr(machine, "bank4", ram + 0x6000);
	202	state->membank("bank4")->set_base(ram + 0x6000);
203	203	}
204	204
205	205	// BANK 5 (0x8000 - 0x9fff)
r14976	r14977
217	217	partner_window_1(machine, 5, 0, rom);
218	218	break;
219	219	case 7:
220		memory_set_bankptr(machine, "bank5", ram + 0x0000);
	220	state->membank("bank5")->set_base(ram + 0x0000);
221	221	break;
222	222	default:
223		memory_set_bankptr(machine, "bank5", ram + 0x8000);
	223	state->membank("bank5")->set_base(ram + 0x8000);
224	224	break;
225	225	}
226	226
r14976	r14977
236	236	case 8:
237	237	//BASIC
238	238	space->unmap_write(0xa000, 0xb7ff);
239		memory_set_bankptr(machine, "bank6", rom + 0x12000); // BASIC
	239	state->membank("bank6")->set_base(rom + 0x12000); // BASIC
240	240	break;
241	241	case 7:
242		memory_set_bankptr(machine, "bank6", ram + 0x2000);
	242	state->membank("bank6")->set_base(ram + 0x2000);
243	243	break;
244	244	default:
245		memory_set_bankptr(machine, "bank6", ram + 0xa000);
	245	state->membank("bank6")->set_base(ram + 0xa000);
246	246	break;
247	247	}
248	248
r14976	r14977
259	259	case 8:
260	260	//BASIC
261	261	space->unmap_write(0xb800, 0xbfff);
262		memory_set_bankptr(machine, "bank7", rom + 0x13800); // BASIC
	262	state->membank("bank7")->set_base(rom + 0x13800); // BASIC
263	263	break;
264	264	case 7:
265		memory_set_bankptr(machine, "bank7", ram + 0x3800);
	265	state->membank("bank7")->set_base(ram + 0x3800);
266	266	break;
267	267	default:
268		memory_set_bankptr(machine, "bank7", ram + 0xb800);
	268	state->membank("bank7")->set_base(ram + 0xb800);
269	269	break;
270	270	}
271	271
272	272	// BANK 8 (0xc000 - 0xc7ff)
273	273	switch (state->m_mem_page) {
274	274	case 7:
275		memory_set_bankptr(machine, "bank8", ram + 0x4000);
	275	state->membank("bank8")->set_base(ram + 0x4000);
276	276	break;
277	277	case 8:
278	278	case 10:
279	279	space->unmap_write(0xc000, 0xc7ff);
280		memory_set_bankptr(machine, "bank8", rom + 0x10000);
	280	state->membank("bank8")->set_base(rom + 0x10000);
281	281	break;
282	282	default:
283		memory_set_bankptr(machine, "bank8", ram + 0xc000);
	283	state->membank("bank8")->set_base(ram + 0xc000);
284	284	break;
285	285	}
286	286
287	287	// BANK 9 (0xc800 - 0xcfff)
288	288	switch (state->m_mem_page) {
289	289	case 7:
290		memory_set_bankptr(machine, "bank9", ram + 0x4800);
	290	state->membank("bank9")->set_base(ram + 0x4800);
291	291	break;
292	292	case 8:
293	293	case 9:
r14976	r14977
297	297	break;
298	298	case 10:
299	299	space->unmap_write(0xc800, 0xcfff);
300		memory_set_bankptr(machine, "bank9", rom + 0x10800);
	300	state->membank("bank9")->set_base(rom + 0x10800);
301	301	break;
302	302	default:
303		memory_set_bankptr(machine, "bank9", ram + 0xc800);
	303	state->membank("bank9")->set_base(ram + 0xc800);
304	304	break;
305	305	}
306	306
307	307	// BANK 10 (0xd000 - 0xd7ff)
308	308	switch (state->m_mem_page) {
309	309	case 7:
310		memory_set_bankptr(machine, "bank10", ram + 0x5000);
	310	state->membank("bank10")->set_base(ram + 0x5000);
311	311	break;
312	312	case 8:
313	313	case 9:
r14976	r14977
316	316	partner_window_2(machine, 10, 0x0800, rom);
317	317	break;
318	318	default:
319		memory_set_bankptr(machine, "bank10", ram + 0xd000);
	319	state->membank("bank10")->set_base(ram + 0xd000);
320	320	break;
321	321	}
322	322
r14976	r14977
325	325
326	326	// BANK 12 (0xe000 - 0xe7ff)
327	327	if (state->m_mem_page==1) {
328		memory_set_bankptr(machine, "bank12", rom + 0x10000);
	328	state->membank("bank12")->set_base(rom + 0x10000);
329	329	} else {
330	330	//window 1
331	331	partner_window_1(machine, 12, 0, rom);
r14976	r14977
341	341	break;
342	342	default:
343	343	// BIOS
344		memory_set_bankptr(machine, "bank13", rom + 0x10800);
	344	state->membank("bank13")->set_base(rom + 0x10800);
345	345	break;
346	346	}
347	347	}

src/mess/machine/hec2hrp.c

r14976	r14977
171	171	/*General purpose port (0x08) for the minidisk I/O */
172	172	{
173	173	// Rom page bank switching
174		memory_set_bank(machine(), "bank2",BIT(data, 5) ? HECTOR_BANK_BASE : HECTOR_BANK_DISC );
	174	membank("bank2")->set_entry(BIT(data, 5) ? HECTOR_BANK_BASE : HECTOR_BANK_DISC );
175	175
176	176	// Set drive number
177	177	if (BIT(data, 6)) wd17xx_set_drive(fdc, 0);  // Set the correct drive number 0
r14976	r14977
190	190	{
191	191	if (offset==0x00)   {   /* 0x800 et 0x000=> video page, HR*/
192	192	if (isHectoreXtend(machine()))
193		memory_set_bank(machine(), "bank1", HECTOR_BANK_VIDEO);
	193	membank("bank1")->set_entry(HECTOR_BANK_VIDEO);
194	194	if (m_flag_clk ==1)
195	195	{
196	196	m_flag_clk=0;
r14976	r14977
200	200	if (offset==0x04)   {   /* 0x804 => video page, BR*/
201	201	m_hector_flag_hr=0;
202	202	if (isHectoreXtend(machine()))
203		memory_set_bank(machine(), "bank1", HECTOR_BANK_VIDEO);
	203	membank("bank1")->set_entry(HECTOR_BANK_VIDEO);
204	204	if (m_flag_clk ==0)
205	205	{
206	206	m_flag_clk=1;
r14976	r14977
209	209	}
210	210	if (offset==0x08)   {   /* 0x808 => base page, HR*/
211	211	if (isHectoreXtend(machine()))
212		memory_set_bank(machine(), "bank1", HECTOR_BANK_PROG);
	212	membank("bank1")->set_entry(HECTOR_BANK_PROG);
213	213	if (m_flag_clk ==1)
214	214	{
215	215	m_flag_clk=0;
r14976	r14977
220	220	if (offset==0x0c)   {   /* 0x80c => base page, BR*/
221	221	m_hector_flag_hr=0;
222	222	if (isHectoreXtend(machine()))
223		memory_set_bank(machine(), "bank1", HECTOR_BANK_PROG);
	223	membank("bank1")->set_entry(HECTOR_BANK_PROG);
224	224	if (m_flag_clk ==0)
225	225	{
226	226	m_flag_clk=1;
r14976	r14977
252	252	m_hector_flag_hr=1;
253	253	if (isHectoreXtend(machine()))
254	254	{
255		memory_set_bank(machine(), "bank1", HECTOR_BANK_PROG);
256		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE0);
	255	membank("bank1")->set_entry(HECTOR_BANK_PROG);
	256	membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
257	257	}
258	258	//RESET DISC II unit
259	259	if (isHectorWithDisc2(machine()) )
r14976	r14977
567	567	{
568	568	/* Bank switching on several address */
569	569	if ((offset &0x0ff) == 0x40) /* Port page 0*/
570		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE0);
	570	membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
571	571	if ((offset &0x0ff) == 0x41) /* Port page 1*/
572	572	{
573		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE1);
	573	membank("bank2")->set_entry(HECTORMX_BANK_PAGE1);
574	574	m_hector_flag_80c=0;
575	575	}
576	576	if ((offset &0x0ff) == 0x44) /* Port page 2  => 42 pour MX80*/
577		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE2);
	577	membank("bank2")->set_entry(HECTORMX_BANK_PAGE2);
578	578	if ((offset &0x0ff) == 0x49) /* Port screen resolution*/
579	579	m_hector_flag_80c=0;/* No 80c in 40c !*/
580	580	}
r14976	r14977
583	583	WRITE8_MEMBER(hec2hrp_state::hector_mx80_io_port_w)
584	584	{
585	585	if ((offset &0x0ff) == 0x40) /* Port page 0*/
586		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE0);
	586	membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
587	587	if ((offset &0x0ff) == 0x41) /* Port page 1*/
588	588	{
589		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE1);
	589	membank("bank2")->set_entry(HECTORMX_BANK_PAGE1);
590	590	m_hector_flag_80c=0;
591	591	}
592	592	if ((offset &0x0ff) == 0x42) /* Port page 2  => port different du MX40*/
593		memory_set_bank(machine(), "bank2", HECTORMX_BANK_PAGE2);
	593	membank("bank2")->set_entry(HECTORMX_BANK_PAGE2);
594	594	if ((offset &0x0ff) == 0x49) /* Port screen resolution*/
595	595	m_hector_flag_80c=1;
596	596	}

src/mess/machine/bebox.c

r14976	r14977
1071	1071	cputag_set_input_line(machine, "ppc1", INPUT_LINE_RESET, CLEAR_LINE);
1072	1072	cputag_set_input_line(machine, "ppc2", INPUT_LINE_RESET, ASSERT_LINE);
1073	1073
1074		memcpy(machine.device<fujitsu_29f016a_device>("flash")->space()->get_read_ptr(0),machine.region("user1")->base(),0x200000);
	1074	memcpy(machine.device<fujitsu_29f016a_device>("flash")->space()->get_read_ptr(0),state->memregion("user1")->base(),0x200000);
1075	1075	}
1076	1076
1077	1077	static void bebox_exit(running_machine &machine)
r14976	r14977
1089	1089
1090	1090	DRIVER_INIT( bebox )
1091	1091	{
	1092	bebox_state *state = machine.driver_data<bebox_state>();
1092	1093	address_space *space_0 = machine.device("ppc1")->memory().space(AS_PROGRAM);
1093	1094	address_space *space_1 = machine.device("ppc2")->memory().space(AS_PROGRAM);
1094	1095	offs_t vram_begin;
1095	1096	offs_t vram_end;
1096	1097
1097	1098	/* set up boot and flash ROM */
1098		memory_set_bankptr(machine, "bank2", machine.region("user2")->base());
	1099	state->membank("bank2")->set_base(machine.root_device().memregion("user2")->base());
1099	1100
1100	1101	/* install MESS managed RAM */
1101	1102	space_0->install_readwrite_bank(0, machine.device<ram_device>(RAM_TAG)->size() - 1, 0, 0x02000000, "bank3");
1102	1103	space_1->install_readwrite_bank(0, machine.device<ram_device>(RAM_TAG)->size() - 1, 0, 0x02000000, "bank3");
1103		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer());
	1104	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
1104	1105
1105	1106	kbdc8042_init(machine, &bebox_8042_interface);
1106	1107
r14976	r14977
1129	1130	U64(0x4E80042000000000)
1130	1131	};
1131	1132	space_1->install_read_bank(0x9421FFF0, 0x9421FFFF, "bank1");
1132		memory_set_bankptr(machine, "bank1", ops);
	1133	state->membank("bank1")->set_base(ops);
1133	1134	}
1134	1135	}

src/mess/machine/intv.c

r14976	r14977
16	16	COMBINE_DATA(&m_intvkbd_dualport_ram[offset]);
17	17
18	18	/* copy the LSB over to the 6502 OP RAM, in case they are opcodes */
19		RAM    = machine().region("keyboard")->base();
	19	RAM    = memregion("keyboard")->base();
20	20	RAM[offset] = (UINT8) (data >> 0);
21	21	}
22	22
r14976	r14977
33	33	m_intvkbd_dualport_ram[offset] |= ((UINT16) data) << 0;
34	34
35	35	/* copy over to the 6502 OP RAM, in case they are opcodes */
36		RAM    = machine().region("keyboard")->base();
	36	RAM    = memregion("keyboard")->base();
37	37	RAM[offset] = data;
38	38	}
39	39
r14976	r14977
338	338	{
339	339	if (data == 0x2A50)
340	340	{
341		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + (0x2000 << 1));
	341	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + (0x2000 << 1));
342	342	}
343	343	else if (data == 0x2A51)
344	344	{
345		memory_set_bankptr(machine(), "bank1", machine().region("ecs_rom")->base() + (0x2000 << 1));
	345	membank("bank1")->set_base(machine().root_device().memregion("ecs_rom")->base() + (0x2000 << 1));
346	346	}
347	347	}
348	348	}
r14976	r14977
353	353	{
354	354	if (data == 0x7A50)
355	355	{
356		memory_set_bankptr(machine(), "bank2", machine().region("ecs_rom")->base() + (0x7000 << 1)); // ECS ROM at 0x7000 is on page 1
	356	membank("bank2")->set_base(machine().root_device().memregion("ecs_rom")->base() + (0x7000 << 1)); // ECS ROM at 0x7000 is on page 1
357	357	}
358	358	else if (data == 0x7A51 )
359	359	{
360		memory_set_bankptr(machine(), "bank2", machine().region("maincpu")->base() + (0x7000 << 1));
	360	membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + (0x7000 << 1));
361	361	}
362	362	}
363	363	}
r14976	r14977
368	368	{
369	369	if (data == 0xEA50)
370	370	{
371		memory_set_bankptr(machine(), "bank3", machine().region("maincpu")->base() + (0xE000 << 1));
	371	membank("bank3")->set_base(machine().root_device().memregion("maincpu")->base() + (0xE000 << 1));
372	372	}
373	373	else if (data == 0xEA51)
374	374	{
375		memory_set_bankptr(machine(), "bank3", machine().region("ecs_rom")->base() + (0xE000 << 1));
	375	membank("bank3")->set_base(machine().root_device().memregion("ecs_rom")->base() + (0xE000 << 1));
376	376	}
377	377	}
378	378	}
r14976	r14977
384	384	{
385	385	if (data == 0xFA50)
386	386	{
387		memory_set_bankptr(machine(), "bank4", machine().region("maincpu")->base() + (0xF000 << 1));
	387	membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + (0xF000 << 1));
388	388	}
389	389	else if (data == 0xFA51)
390	390	{
391		memory_set_bankptr(machine(), "bank4", machine().region("ecs_rom")->base() + (0xF000 << 1));
	391	membank("bank4")->set_base(machine().root_device().memregion("ecs_rom")->base() + (0xF000 << 1));
392	392	}
393	393	}
394	394	}
r14976	r14977
408	408	UINT8 high_byte;
409	409	UINT8 low_byte;
410	410
411		UINT8 *memory = image.device().machine().region("maincpu")->base();
	411	UINT8 *memory = image.device().machine().root_device().memregion("maincpu")->base();
412	412	intv_state *state = image.device().machine().driver_data<intv_state>();
413	413	address_space *program = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
414	414	const char *filetype = image.filetype();
r14976	r14977
554	554	{
555	555	UINT16 offset[] = {0x4800, 0x5000, 0x6000, 0x7000, 0x9000, 0xa000, 0xc000, 0xd000, 0xf000};
556	556	const char* region_name[] = {"4800", "5000", "6000", "7000", "9000", "A000", "C000", "D000", "F000"};
557		UINT8 *memory = image.device().machine().region("maincpu")->base();
	557	UINT8 *memory = image.device().machine().root_device().memregion("maincpu")->base();
558	558	intv_state *state = image.device().machine().driver_data<intv_state>();
559	559	address_space *program = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
560	560
r14976	r14977
577	577	}
578	578	// deal with wsmlb paged rom
579	579
580		UINT8 *ecs_rom_region = image.device().machine().region("ecs_rom")->base();
	580	UINT8 *ecs_rom_region = image.device().machine().root_device().memregion("ecs_rom")->base();
581	581	size = image.get_software_region_length("F000_bank1");
582	582	if (size && ecs_rom_region) // only load if ecs is plugged in (should probably be done a different way)
583	583	{
r14976	r14977
632	632
633	633	MACHINE_RESET( intvecs )
634	634	{
635		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + (0x2000 << 1));
636		memory_set_bankptr(machine, "bank2", machine.region("ecs_rom")->base() + (0x7000 << 1));
637		memory_set_bankptr(machine, "bank3", machine.region("maincpu")->base() + (0xE000 << 1));
638		memory_set_bankptr(machine, "bank4", machine.region("maincpu")->base() + (0xF000 << 1));
	635	intv_state *state = machine.driver_data<intv_state>();
	636	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + (0x2000 << 1));
	637	state->membank("bank2")->set_base(machine.root_device().memregion("ecs_rom")->base() + (0x7000 << 1));
	638	state->membank("bank3")->set_base(machine.root_device().memregion("maincpu")->base() + (0xE000 << 1));
	639	state->membank("bank4")->set_base(machine.root_device().memregion("maincpu")->base() + (0xF000 << 1));
639	640
640	641	device_set_input_line_vector(machine.device("maincpu"), CP1610_RESET, 0x1000);
641	642
r14976	r14977
830	831	{
831	832	/* First, initialize these as empty so that the intellivision
832	833	* will think that the playcable is not attached */
833		UINT8 *memory = image.device().machine().region("maincpu")->base();
	834	UINT8 *memory = image.device().machine().root_device().memregion("maincpu")->base();
834	835
835	836	/* assume playcable is absent */
836	837	memory[0x4800 << 1] = 0xff;
r14976	r14977
841	842
842	843	if (strcmp(image.device().tag(),":cart2") == 0) /* Keyboard component cartridge slot */
843	844	{
844		UINT8 *memory = image.device().machine().region("keyboard")->base();
	845	UINT8 *memory = image.device().machine().root_device().memregion("keyboard")->base();
845	846
846	847	/* Assume an 8K cart, like BASIC */
847	848	image.fread( &memory[0xe000], 0x2000);

src/mess/machine/a2scsi.c

r14976	r14977
112	112	set_a2bus_device();
113	113
114	114	astring tempstring;
115		m_rom = device().machine().region(this->subtag(tempstring, SCSI_ROM_REGION))->base();
	115	m_rom = device().machine().root_device().memregion(this->subtag(tempstring, SCSI_ROM_REGION))->base();
116	116
117	117	memset(m_ram, 0, 8192);
118	118

src/mess/machine/mikro80.c

r14976	r14977
18	18	{
19	19	mikro80_state *state = machine.driver_data<mikro80_state>();
20	20	/* set initialy ROM to be visible on first bank */
21		UINT8 *RAM = machine.region("maincpu")->base();
	21	UINT8 *RAM = state->memregion("maincpu")->base();
22	22	memset(RAM,0x0000,0x0800); // make frist page empty by default
23		memory_configure_bank(machine, "bank1", 1, 2, RAM, 0x0000);
24		memory_configure_bank(machine, "bank1", 0, 2, RAM, 0xf800);
	23	state->membank("bank1")->configure_entries(1, 2, RAM, 0x0000);
	24	state->membank("bank1")->configure_entries(0, 2, RAM, 0xf800);
25	25	state->m_key_mask = 0x7f;
26	26	}
27	27
r14976	r14977
73	73
74	74	static TIMER_CALLBACK( mikro80_reset )
75	75	{
76		memory_set_bank(machine,"bank1", 0);
	76	mikro80_state *state = machine.driver_data<mikro80_state>();
	77	state->membank("bank1")->set_entry(0);
77	78	}
78	79
79	80	MACHINE_RESET( mikro80 )
80	81	{
81	82	mikro80_state *state = machine.driver_data<mikro80_state>();
82	83	machine.scheduler().timer_set(attotime::from_usec(10), FUNC(mikro80_reset));
83		memory_set_bank(machine, "bank1", 1);
	84	state->membank("bank1")->set_entry(1);
84	85	state->m_keyboard_mask = 0;
85	86	}
86	87

src/mess/machine/nubus.c

r14976	r14977
235	235	m_maincpu = machine().device(m_cputag);
236	236	address_space *space = m_maincpu->memory().space(AS_PROGRAM);
237	237	space->install_readwrite_bank(start, end, mask, mirror, tag );
238		memory_set_bankptr(machine(), tag, data);
	238	membank(tag)->set_base(data);
239	239	}
240	240
241	241	void nubus_device::set_irq_line(int slot, int state)
r14976	r14977
336	336	UINT8 *newrom = NULL;
337	337
338	338	astring tempstring;
339		UINT8 *rom = device().machine().region(dev->subtag(tempstring, romregion))->base();
340		UINT32 romlen = device().machine().region(dev->subtag(tempstring, romregion))->bytes();
	339	UINT8 *rom = device().machine().root_device().memregion(dev->subtag(tempstring, romregion))->base();
	340	UINT32 romlen = device().machine().root_device().memregion(dev->subtag(tempstring, romregion))->bytes();
341	341
342	342	//  printf("ROM length is %x, last bytes are %02x %02x\n", romlen, rom[romlen-2], rom[romlen-1]);
343	343

src/mess/machine/a2diskii.c

r14976	r14977
114	114	set_a2bus_device();
115	115
116	116	astring tempstring;
117		m_rom = device().machine().region(this->subtag(tempstring, DISKII_ROM_REGION))->base();
	117	m_rom = device().machine().root_device().memregion(this->subtag(tempstring, DISKII_ROM_REGION))->base();
118	118	}
119	119
120	120	void a2bus_floppy_device::device_reset()

src/mess/machine/ut88.c

r14976	r14977
19	19	DRIVER_INIT(ut88)
20	20	{
21	21	/* set initially ROM to be visible on first bank */
22		UINT8 *RAM = machine.region("maincpu")->base();
	22	ut88_state *state = machine.driver_data<ut88_state>();
	23	UINT8 *RAM = state->memregion("maincpu")->base();
23	24	memset(RAM,0x0000,0x0800); // make first page empty by default
24		memory_configure_bank(machine, "bank1", 1, 2, RAM, 0x0000);
25		memory_configure_bank(machine, "bank1", 0, 2, RAM, 0xf800);
	25	state->membank("bank1")->configure_entries(1, 2, RAM, 0x0000);
	26	state->membank("bank1")->configure_entries(0, 2, RAM, 0xf800);
26	27	}
27	28
28	29	READ8_MEMBER( ut88_state::ut88_8255_portb_r )
r14976	r14977
62	63
63	64	static TIMER_CALLBACK( ut88_reset )
64	65	{
65		memory_set_bank(machine, "bank1", 0);
	66	ut88_state *state = machine.driver_data<ut88_state>();
	67	state->membank("bank1")->set_entry(0);
66	68	}
67	69
68	70	MACHINE_RESET( ut88 )
69	71	{
70	72	ut88_state *state = machine.driver_data<ut88_state>();
71	73	machine.scheduler().timer_set(attotime::from_usec(10), FUNC(ut88_reset));
72		memory_set_bank(machine, "bank1", 1);
	74	state->membank("bank1")->set_entry(1);
73	75	state->m_keyboard_mask = 0;
74	76	}
75	77
r14976	r14977
101	103	READ8_MEMBER( ut88_state::ut88mini_keyboard_r )
102	104	{
103	105	// This is real keyboard implementation
104		UINT8 *keyrom1 = machine().region("proms")->base();
105		UINT8 *keyrom2 = machine().region("proms")->base()+100;
	106	UINT8 *keyrom1 = memregion("proms")->base();
	107	UINT8 *keyrom2 = memregion("proms")->base()+100;
106	108
107	109	UINT8 key = keyrom2[input_port_read(machine(), "LINE1")];
108	110

src/mess/machine/comx_epr.c

r14976	r14977
64	64	{
65	65	m_slot = dynamic_cast<comx_expansion_slot_device *>(owner());
66	66
67		m_rom = subregion("f800")->base();
68		m_eprom = subregion("eprom")->base();
	67	m_rom = memregion("f800")->base();
	68	m_eprom = memregion("eprom")->base();
69	69
70	70	// state saving
71	71	save_item(NAME(m_select));

src/mess/machine/snescart.c

r14976	r14977
642	642
643	643	if ((state->m_has_addon_chip >= HAS_DSP1) && (state->m_has_addon_chip <= HAS_DSP4))
644	644	{
645		UINT8 *dspsrc = (UINT8 *)(*machine.region("addons"));
646		UINT32 *dspprg = (UINT32 *)(*machine.region("dspprg"));
647		UINT16 *dspdata = (UINT16 *)(*machine.region("dspdata"));
	645	UINT8 *dspsrc = (UINT8 *)(*machine.root_device().memregion("addons"));
	646	UINT32 *dspprg = (UINT32 *)(*machine.root_device().memregion("dspprg"));
	647	UINT16 *dspdata = (UINT16 *)(*machine.root_device().memregion("dspdata"));
648	648
649	649	// copy DSP program
650	650	for (int i = 0; i < 0x2000; i+= 4)
r14976	r14977
662	662
663	663	if ((state->m_has_addon_chip == HAS_ST010) || (state->m_has_addon_chip == HAS_ST011))
664	664	{
665		UINT8 *dspsrc = (UINT8 *)(*machine.region("addons"));
666		UINT32 *dspprg = (UINT32 *)(*machine.region("dspprg"));
667		UINT16 *dspdata = (UINT16 *)(*machine.region("dspdata"));
	665	UINT8 *dspsrc = (UINT8 *)(*machine.root_device().memregion("addons"));
	666	UINT32 *dspprg = (UINT32 *)(*machine.root_device().memregion("dspprg"));
	667	UINT16 *dspdata = (UINT16 *)(*machine.root_device().memregion("dspdata"));
668	668
669	669	// copy DSP program
670	670	for (int i = 0; i < 0x10000; i+= 4)
r14976	r14977
766	766	address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM );
767	767	int total_blocks, read_blocks, has_bsx_slot = 0, st_bios = 0;
768	768	UINT32 offset, int_header_offs;
769		UINT8 *ROM = image.device().machine().region("cart")->base();
	769	UINT8 *ROM = state->memregion("cart")->base();
770	770
771	771	if (image.software_entry() == NULL)
772	772	state->m_cart_size = image.length();
r14976	r14977
1151	1151	int total_blocks, read_blocks;
1152	1152	int st_bios = 0, slot_id = 0;
1153	1153	UINT32 offset, st_data_offset = 0;
1154		UINT8 *ROM = image.device().machine().region(image.device().tag())->base();
	1154	UINT8 *ROM = image.device().machine().root_device().memregion(image.device().tag())->base();
1155	1155
1156		snes_ram = machine.region("maincpu")->base();
	1156	snes_ram = state->memregion("maincpu")->base();
1157	1157
1158	1158	if (strcmp(image.device().tag(), ":slot_a") == 0)
1159	1159	{
r14976	r14977
1256	1256	int total_blocks, read_blocks;
1257	1257	int has_bsx_slot = 0;
1258	1258	UINT32 offset, int_header_offs;
1259		UINT8 *ROM = image.device().machine().region("cart")->base();
	1259	UINT8 *ROM = state->memregion("cart")->base();
1260	1260
1261	1261	if (image.software_entry() == NULL)
1262	1262	state->m_cart_size = image.length();
r14976	r14977
1356	1356	running_machine &machine = image.device().machine();
1357	1357	snes_state *state = machine.driver_data<snes_state>();
1358	1358	UINT32 offset, int_header_offs;
1359		UINT8 *ROM = image.device().machine().region("flash")->base();
	1359	UINT8 *ROM = state->memregion("flash")->base();
1360	1360
1361	1361	if (image.software_entry() == NULL)
1362	1362	state->m_cart_size = image.length();
r14976	r14977
1454	1454
1455	1455	DRIVER_INIT( snes_mess )
1456	1456	{
1457		snes_ram = machine.region("maincpu")->base();
	1457	snes_ram = machine.root_device().memregion("maincpu")->base();
1458	1458	memset(snes_ram, 0, 0x1000000);
1459	1459	}
1460	1460
1461	1461	DRIVER_INIT( snesst )
1462	1462	{
1463	1463	snes_state *state = machine.driver_data<snes_state>();
1464		UINT8 *STBIOS = machine.region("sufami")->base();
	1464	UINT8 *STBIOS = state->memregion("sufami")->base();
1465	1465	int i, j;
1466	1466
1467	1467	state->m_cart[0].slot_in_use = 0;

src/mess/machine/z88_ram.c

r14976	r14977
76	76
77	77	void z88_32k_ram_device::device_start()
78	78	{
79		m_ram = machine().region_alloc(tag(), get_cart_size(), 1, ENDIANNESS_LITTLE)->base();
	79	m_ram = machine().memory().region_alloc(tag(), get_cart_size(), 1, ENDIANNESS_LITTLE)->base();
80	80	memset(m_ram, 0, get_cart_size());
81	81	}
82	82

src/mess/machine/c64.c

r14976	r14977
466	466	{
467	467	state->m_io_enabled = 1;      // charen has no effect in ultimax_mode
468	468
469		memory_set_bankptr(machine, "bank1", state->m_roml);
470		memory_set_bankptr(machine, "bank3", state->m_memory + 0xa000);
471		memory_set_bankptr(machine, "bank4", state->m_romh);
	469	state->membank("bank1")->set_base(state->m_roml);
	470	state->membank("bank3")->set_base(state->m_memory + 0xa000);
	471	state->membank("bank4")->set_base(state->m_romh);
472	472	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0xe000, 0xffff);
473	473	}
474	474	else
r14976	r14977
476	476	/* 0x8000-0x9000 */
477	477	if (loram && hiram && !state->m_exrom)
478	478	{
479		memory_set_bankptr(machine, "bank1", state->m_roml);
	479	state->membank("bank1")->set_base(state->m_roml);
480	480	}
481	481	else
482	482	{
483		memory_set_bankptr(machine, "bank1", state->m_memory + 0x8000);
	483	state->membank("bank1")->set_base(state->m_memory + 0x8000);
484	484	}
485	485
486	486	/* 0xa000 */
487	487	if (hiram && !state->m_game && !state->m_exrom)
488		memory_set_bankptr(machine, "bank3", state->m_romh);
	488	state->membank("bank3")->set_base(state->m_romh);
489	489
490	490	else if (loram && hiram && state->m_game)
491		memory_set_bankptr(machine, "bank3", state->m_basic);
	491	state->membank("bank3")->set_base(state->m_basic);
492	492
493	493	else
494		memory_set_bankptr(machine, "bank3", state->m_memory + 0xa000);
	494	state->membank("bank3")->set_base(state->m_memory + 0xa000);
495	495
496	496	/* 0xd000 */
497	497	// RAM
r14976	r14977
521	521	}
522	522
523	523	/* 0xe000-0xf000 */
524		memory_set_bankptr(machine, "bank4", hiram ? state->m_kernal : state->m_memory + 0xe000);
525		memory_set_bankptr(machine, "bank5", state->m_memory + 0xe000);
	524	state->membank("bank4")->set_base(hiram ? state->m_kernal : state->m_memory + 0xe000);
	525	state->membank("bank5")->set_base(state->m_memory + 0xe000);
526	526	}
527	527
528	528	/* make sure the opbase function gets called each time */
r14976	r14977
759	759
760	760	if (!state->m_ultimax)
761	761	{
762		UINT8 *mem = machine.region("maincpu")->base();
	762	UINT8 *mem = state->memregion("maincpu")->base();
763	763	state->m_basic    = mem + 0x10000;
764	764	state->m_kernal   = mem + 0x12000;
765	765	state->m_chargen  = mem + 0x14000;
r14976	r14977
1026	1026	const char *filetype = image.filetype();
1027	1027	int address = 0, new_start = 0;
1028	1028	// int lbank_end_addr = 0, hbank_end_addr = 0;
1029		UINT8 *cart_cpy = image.device().machine().region("user1")->base();
	1029	UINT8 *cart_cpy = state->memregion("user1")->base();
1030	1030
1031	1031	/* We support .crt files */
1032	1032	if (!mame_stricmp(filetype, "crt"))
r14976	r14977
1288	1288
1289	1289	INLINE void load_cartridge_region(device_image_interface &image, const char *name, offs_t offset, size_t size)
1290	1290	{
1291		UINT8 *cart = image.device().machine().region("user1")->base();
	1291	UINT8 *cart = image.device().machine().root_device().memregion("user1")->base();
1292	1292	UINT8 *rom = image.get_software_region(name);
1293	1293	memcpy(cart + offset, rom, size);
1294	1294	}
r14976	r14977
1296	1296	INLINE void map_cartridge_roml(running_machine &machine, offs_t offset)
1297	1297	{
1298	1298	legacy_c64_state *state = machine.driver_data<legacy_c64_state>();
1299		UINT8 *cart = machine.region("user1")->base();
	1299	UINT8 *cart = state->memregion("user1")->base();
1300	1300	memcpy(state->m_roml, cart + offset, 0x2000);
1301	1301	}
1302	1302
1303	1303	INLINE void map_cartridge_romh(running_machine &machine, offs_t offset)
1304	1304	{
1305	1305	legacy_c64_state *state = machine.driver_data<legacy_c64_state>();
1306		UINT8 *cart = machine.region("user1")->base();
	1306	UINT8 *cart = state->memregion("user1")->base();
1307	1307	memcpy(state->m_romh, cart + offset, 0x2000);
1308	1308	}
1309	1309
r14976	r14977
1348	1348
1349	1349	UINT8 *roml = image.get_software_region("roml");
1350	1350	UINT8 *romh = image.get_software_region("romh");
1351		UINT8 *decrypted = image.device().machine().region("user1")->base();
	1351	UINT8 *decrypted = image.device().machine().root_device().memregion("user1")->base();
1352	1352
1353	1353	// decrypt ROMs
1354	1354	for (offs_t offset = 0; offset < 0x2000; offset++)
r14976	r14977
1398	1398	BITSWAP8(_data,7,6,5,4,0,1,2,3)
1399	1399
1400	1400	UINT8 *roml = image.get_software_region("roml");
1401		UINT8 *decrypted = image.device().machine().region("user1")->base();
	1401	UINT8 *decrypted = image.device().machine().root_device().memregion("user1")->base();
1402	1402
1403	1403	// decrypt ROMs
1404	1404	for (offs_t offset = 0; offset < 0x20000; offset++)
r14976	r14977
1464	1464	*/
1465	1465
1466	1466	legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1467		UINT8 *cart = space->machine().region("user1")->base();
	1467	UINT8 *cart = state->memregion("user1")->base();
1468	1468
1469	1469	if (data == 0xff)
1470	1470	{
r14976	r14977
1516	1516	static WRITE8_HANDLER( multiscreen_bank_w )
1517	1517	{
1518	1518	legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1519		UINT8 *cart = space->machine().region("user1")->base();
	1519	UINT8 *cart = state->memregion("user1")->base();
1520	1520	int bank = data & 0x0f;
1521	1521	offs_t address = bank * 0x4000;
1522	1522
r14976	r14977
1715	1715	// not working:
1716	1716
1717	1717	UINT8 bank = data & 0x3f;
1718		UINT8 *cart = space->machine().region("user1")->base();
	1718	UINT8 *cart = state->memregion("user1")->base();
1719	1719
1720	1720	if (data & 0x40)
1721	1721	{
r14976	r14977
1745	1745	// not working: Pang, Robocop 2, Toki
1746	1746
1747	1747	UINT8 bank = data & 0x3f;
1748		UINT8 *cart = space->machine().region("user1")->base();
	1748	UINT8 *cart = state->memregion("user1")->base();
1749	1749
1750	1750	switch (state->m_cart.bank[bank].addr)
1751	1751	{
r14976	r14977
1780	1780	// not working:
1781	1781
1782	1782	UINT8 bank = data & 0x39, real_bank = 0;
1783		UINT8 *cart = space->machine().region("user1")->base();
	1783	UINT8 *cart = state->memregion("user1")->base();
1784	1784
1785	1785	/* This should be written after the bankswitch has happened. We log it to see if it is really working */
1786	1786	if (data == 0x86)
r14976	r14977
1810	1810	// not working:
1811	1811
1812	1812	UINT8 bank = data & 0x03, bit2 = data & 0x04;
1813		UINT8 *cart = space->machine().region("user1")->base();
	1813	UINT8 *cart = state->memregion("user1")->base();
1814	1814
1815	1815	if (data & 0x04)
1816	1816	{
r14976	r14977
1849	1849	// not working: The Last Ninja Remix
1850	1850
1851	1851	UINT8 bank = offset & 0xff;
1852		UINT8 *cart = space->machine().region("user1")->base();
	1852	UINT8 *cart = state->memregion("user1")->base();
1853	1853
1854	1854	if (bank > 0x3f)
1855	1855	logerror("Warning: This cart type should have at most 64 banks and the cart looked for bank %d... Something strange is going on!\n", bank);
r14976	r14977
1873	1873	// not working:
1874	1874
1875	1875	UINT8 bank = offset & 0xff;
1876		UINT8 *cart = space->machine().region("user1")->base();
	1876	UINT8 *cart = state->memregion("user1")->base();
1877	1877
1878	1878	if (bank > 0xf)
1879	1879	logerror("Warning: This cart type should have 16 banks and the cart looked for bank %d... Something strange is going on!\n", bank);
r14976	r14977
1898	1898	// not working:
1899	1899
1900	1900	UINT8 bank;
1901		UINT8 *cart = space->machine().region("user1")->base();
	1901	UINT8 *cart = state->memregion("user1")->base();
1902	1902
1903	1903	if (offset < 0x1000)
1904	1904	bank = 0;
r14976	r14977
1921	1921	// not working:
1922	1922
1923	1923	UINT8 bank = data & 0x7f;
1924		UINT8 *cart = space->machine().region("user1")->base();
	1924	UINT8 *cart = state->memregion("user1")->base();
1925	1925
1926	1926	if (data & 0x80)
1927	1927	{
r14976	r14977
1944	1944	// not working:
1945	1945
1946	1946	UINT8 bank = data & 0x83;
1947		UINT8 *cart = space->machine().region("user1")->base();
	1947	UINT8 *cart = state->memregion("user1")->base();
1948	1948
1949	1949	/* only valid values 0x80, 0x81, 0x82, 0x83 */
1950	1950	if (!(bank & 0x80))

src/mess/machine/pc.c

r14976	r14977
980	980
981	981	void mess_init_pc_common(running_machine &machine, UINT32 flags, void (*set_keyb_int_func)(running_machine &, int), void (*set_hdc_int_func)(running_machine &,int,int))
982	982	{
	983	pc_state *state = machine.driver_data<pc_state>();
983	984	if ( set_keyb_int_func != NULL )
984	985	init_pc_common(machine, flags, set_keyb_int_func);
985	986
986	987	/* MESS managed RAM */
987	988	if ( machine.device<ram_device>(RAM_TAG)->pointer() )
988		memory_set_bankptr( machine, "bank10", machine.device<ram_device>(RAM_TAG)->pointer() );
	989	state->membank( "bank10" )->set_base( machine.device<ram_device>(RAM_TAG)->pointer() );
989	990	}
990	991
991	992
r14976	r14977
1016	1017
1017	1018	DRIVER_INIT( europc )
1018	1019	{
1019		UINT8 *gfx = &machine.region("gfx1")->base()[0x8000];
1020		UINT8 *rom = &machine.region("maincpu")->base()[0];
	1020	UINT8 *gfx = &machine.root_device().memregion("gfx1")->base()[0x8000];
	1021	UINT8 *rom = &machine.root_device().memregion("maincpu")->base()[0];
1021	1022	int i;
1022	1023
1023	1024	/* just a plain bit pattern for graphics data generation */
r14976	r14977
1049	1050
1050	1051	DRIVER_INIT( pc200 )
1051	1052	{
1052		UINT8 *gfx = &machine.region("gfx1")->base()[0x8000];
	1053	UINT8 *gfx = &machine.root_device().memregion("gfx1")->base()[0x8000];
1053	1054	int i;
1054	1055
1055	1056	/* just a plain bit pattern for graphics data generation */
r14976	r14977
1061	1062
1062	1063	DRIVER_INIT( ppc512 )
1063	1064	{
1064		UINT8 *gfx = &machine.region("gfx1")->base()[0x8000];
	1065	UINT8 *gfx = &machine.root_device().memregion("gfx1")->base()[0x8000];
1065	1066	int i;
1066	1067
1067	1068	/* just a plain bit pattern for graphics data generation */
r14976	r14977
1072	1073	}
1073	1074	DRIVER_INIT( pc1512 )
1074	1075	{
1075		UINT8 *gfx = &machine.region("gfx1")->base()[0x8000];
	1076	UINT8 *gfx = &machine.root_device().memregion("gfx1")->base()[0x8000];
1076	1077	int i;
1077	1078
1078	1079	/* just a plain bit pattern for graphics data generation */
r14976	r14977
1206	1207
1207	1208	size = image.get_software_region_length("rom" );
1208	1209
1209		memcpy( image.device().machine().region("maincpu")->base() + address, cart, size );
	1210	memcpy( image.device().machine().root_device().memregion("maincpu")->base() + address, cart, size );
1210	1211	}
1211	1212	else
1212	1213	{
r14976	r14977
1235	1236	}
1236	1237
1237	1238	/* Read the cartridge contents */
1238		if ( ( image_size - 0x200 ) != image.fread(image.device().machine().region("maincpu")->base() + address, image_size - 0x200 ) )
	1239	if ( ( image_size - 0x200 ) != image.fread(image.device().machine().root_device().memregion("maincpu")->base() + address, image_size - 0x200 ) )
1239	1240	{
1240	1241	image.seterror(IMAGE_ERROR_UNSUPPORTED, "Unable to read cartridge contents" );
1241	1242	return IMAGE_INIT_FAIL;

src/mess/machine/pecom.c

r14976	r14977
27	27
28	28	MACHINE_RESET( pecom )
29	29	{
30		UINT8 *rom = machine.region(CDP1802_TAG)->base();
	30	UINT8 *rom = machine.root_device().memregion(CDP1802_TAG)->base();
31	31	address_space *space = machine.device(CDP1802_TAG)->memory().space(AS_PROGRAM);
32	32
33	33	pecom_state *state = machine.driver_data<pecom_state>();
r14976	r14977
38	38	space->unmap_write(0xf800, 0xffff);
39	39	space->install_read_bank (0xf000, 0xf7ff, "bank3");
40	40	space->install_read_bank (0xf800, 0xffff, "bank4");
41		memory_set_bankptr(machine, "bank1", rom + 0x8000);
42		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
43		memory_set_bankptr(machine, "bank3", rom + 0xf000);
44		memory_set_bankptr(machine, "bank4", rom + 0xf800);
	41	state->membank("bank1")->set_base(rom + 0x8000);
	42	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
	43	state->membank("bank3")->set_base(rom + 0xf000);
	44	state->membank("bank4")->set_base(rom + 0xf800);
45	45
46	46	state->m_reset = 0;
47	47	state->m_dma = 0;
r14976	r14977
71	71	WRITE8_MEMBER(pecom_state::pecom_bank_w)
72	72	{
73	73	address_space *space2 = machine().device(CDP1802_TAG)->memory().space(AS_PROGRAM);
74		UINT8 *rom = machine().region(CDP1802_TAG)->base();
	74	UINT8 *rom = memregion(CDP1802_TAG)->base();
75	75	machine().device(CDP1802_TAG)->memory().space(AS_PROGRAM)->install_write_bank(0x0000, 0x3fff, "bank1");
76		memory_set_bankptr(machine(), "bank1", machine().device<ram_device>(RAM_TAG)->pointer() + 0x0000);
	76	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x0000);
77	77
78	78	if (data==2)
79	79	{
r14976	r14977
88	88	space2->unmap_write(0xf800, 0xffff);
89	89	space2->install_read_bank (0xf000, 0xf7ff, "bank3");
90	90	space2->install_read_bank (0xf800, 0xffff, "bank4");
91		memory_set_bankptr(machine(), "bank3", rom + 0xf000);
92		memory_set_bankptr(machine(), "bank4", rom + 0xf800);
	91	membank("bank3")->set_base(rom + 0xf000);
	92	membank("bank4")->set_base(rom + 0xf800);
93	93	}
94	94	}
95	95

src/mess/machine/pce.c

r14976	r14977
111	111
112	112	WRITE8_MEMBER(pce_state::pce_sf2_banking_w)
113	113	{
114		memory_set_bankptr( machine(), "bank2", machine().region("user1")->base() + offset * 0x080000 + 0x080000 );
115		memory_set_bankptr( machine(), "bank3", machine().region("user1")->base() + offset * 0x080000 + 0x088000 );
116		memory_set_bankptr( machine(), "bank4", machine().region("user1")->base() + offset * 0x080000 + 0x0D0000 );
	114	membank( "bank2" )->set_base( memregion("user1")->base() + offset * 0x080000 + 0x080000 );
	115	membank( "bank3" )->set_base( memregion("user1")->base() + offset * 0x080000 + 0x088000 );
	116	membank( "bank4" )->set_base( memregion("user1")->base() + offset * 0x080000 + 0x0D0000 );
117	117	}
118	118
119	119	WRITE8_MEMBER(pce_state::pce_cartridge_ram_w)
r14976	r14977
131	131	logerror("*** DEVICE_IMAGE_LOAD(pce_cart) : %s\n", image.filename());
132	132
133	133	/* open file to get size */
134		ROM = image.device().machine().region("user1")->base();
	134	ROM = state->memregion("user1")->base();
135	135
136	136	if (image.software_entry() == NULL)
137	137	size = image.length();
r14976	r14977
212	212	memcpy(ROM + 0x080000, ROM, 0x080000);
213	213	}
214	214
215		memory_set_bankptr(image.device().machine(), "bank1", ROM);
216		memory_set_bankptr(image.device().machine(), "bank2", ROM + 0x080000);
217		memory_set_bankptr(image.device().machine(), "bank3", ROM + 0x088000);
218		memory_set_bankptr(image.device().machine(), "bank4", ROM + 0x0d0000);
	215	state->membank("bank1")->set_base(ROM);
	216	state->membank("bank2")->set_base(ROM + 0x080000);
	217	state->membank("bank3")->set_base(ROM + 0x088000);
	218	state->membank("bank4")->set_base(ROM + 0x0d0000);
219	219
220	220	/* Check for Street fighter 2 */
221	221	if (size == PCE_ROM_MAXSIZE)
r14976	r14977
227	227	if (!memcmp(ROM + 0x1F26, "POPULOUS", 8))
228	228	{
229	229	state->m_cartridge_ram = auto_alloc_array(image.device().machine(), UINT8, 0x8000);
230		memory_set_bankptr(image.device().machine(), "bank2", state->m_cartridge_ram);
	230	state->membank("bank2")->set_base(state->m_cartridge_ram);
231	231	image.device().machine().device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x080000, 0x087FFF, write8_delegate(FUNC(pce_state::pce_cartridge_ram_w),state));
232	232	}
233	233
r14976	r14977
242	242	if(state->m_sys3_card)
243	243	{
244	244	state->m_cartridge_ram = auto_alloc_array(image.device().machine(), UINT8, 0x30000);
245		memory_set_bankptr(image.device().machine(), "bank4", state->m_cartridge_ram);
	245	state->membank("bank4")->set_base(state->m_cartridge_ram);
246	246	image.device().machine().device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x0D0000, 0x0FFFFF, write8_delegate(FUNC(pce_state::pce_cartridge_ram_w),state));
247	247	image.device().machine().device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x080000, 0x087FFF, read8_delegate(FUNC(pce_state::pce_cd_acard_wram_r),state),write8_delegate(FUNC(pce_state::pce_cd_acard_wram_w),state));
248	248	}
r14976	r14977
380	380	{
381	381	pce_state *state = machine.driver_data<pce_state>();
382	382	pce_cd_t &pce_cd = state->m_cd;
383		memory_set_bankptr( machine, "bank10", pce_cd.bram + ( pce_cd.bram_locked ? PCE_BRAM_SIZE : 0 ) );
	383	state->membank( "bank10" )->set_base( pce_cd.bram + ( pce_cd.bram_locked ? PCE_BRAM_SIZE : 0 ) );
384	384	}
385	385
386	386	static void adpcm_stop(running_machine &machine, UINT8 irq_flag)

src/mess/machine/kc_rom.c

r14976	r14977
60	60	void kc_8k_device::device_start()
61	61	{
62	62	m_slot = dynamic_cast<kcexp_slot_device *>(owner());
63		m_rom = subregion(REGION_TAG)->base();
	63	m_rom = memregion(REGION_TAG)->base();
64	64	}
65	65
66	66	//-------------------------------------------------

src/mess/machine/bbc.c

r14976	r14977
36	36	/* for the model A just address the 4 on board ROM sockets */
37	37	WRITE8_MEMBER(bbc_state::bbc_page_selecta_w)
38	38	{
39		memory_set_bankptr(machine(),"bank4",machine().region("user1")->base()+((data&0x03)<<14));
	39	membank("bank4")->set_base(machine().root_device().memregion("user1")->base()+((data&0x03)<<14));
40	40	}
41	41
42	42
43	43	WRITE8_MEMBER(bbc_state::bbc_memorya1_w)
44	44	{
45		machine().region("maincpu")->base()[offset]=data;
	45	memregion("maincpu")->base()[offset]=data;
46	46	}
47	47
48	48	/*************************
r14976	r14977
56	56	m_rombank=data&0x0f;
57	57	if (m_rombank!=1)
58	58	{
59		memory_set_bankptr(machine(), "bank4", machine().region("user1")->base() + (m_rombank << 14));
	59	membank("bank4")->set_base(machine().root_device().memregion("user1")->base() + (m_rombank << 14));
60	60	}
61	61	else
62	62	{
63		memory_set_bankptr(machine(), "bank4", machine().region("user2")->base() + ((m_DFSType) << 14));
	63	membank("bank4")->set_base(machine().root_device().memregion("user2")->base() + ((m_DFSType) << 14));
64	64	}
65	65	}
66	66
r14976	r14977
69	69	{
70	70	if (m_RAMSize)
71	71	{
72		machine().region("maincpu")->base()[offset + 0x4000] = data;
	72	memregion("maincpu")->base()[offset + 0x4000] = data;
73	73	}
74	74	else
75	75	{
76		machine().region("maincpu")->base()[offset] = data;
	76	memregion("maincpu")->base()[offset] = data;
77	77	}
78	78
79	79	}
r14976	r14977
93	93	if (m_rombank == 1)
94	94	{
95	95	// special DFS case for Acorn DFS E00 Hack that can write to the DFS RAM Bank;
96		if (m_DFSType == 3) machine().region("user2")->base()[((m_DFSType) << 14) + offset] = data;
	96	if (m_DFSType == 3) memregion("user2")->base()[((m_DFSType) << 14) + offset] = data;
97	97	} else
98	98	{
99	99	switch (m_SWRAMtype)
100	100	{
101		case 1:   if (bbc_SWRAMtype1[m_userport]) machine().region("user1")->base()[(m_userport << 14) + offset] = data;
102		case 2:   if (bbc_SWRAMtype2[m_rombank])  machine().region("user1")->base()[(m_rombank << 14) + offset] = data;
103		case 3:   if (bbc_SWRAMtype3[m_rombank])  machine().region("user1")->base()[(m_rombank << 14) + offset] = data;
	101	case 1:   if (bbc_SWRAMtype1[m_userport]) memregion("user1")->base()[(m_userport << 14) + offset] = data;
	102	case 2:   if (bbc_SWRAMtype2[m_rombank])  memregion("user1")->base()[(m_rombank << 14) + offset] = data;
	103	case 3:   if (bbc_SWRAMtype3[m_rombank])  memregion("user1")->base()[(m_rombank << 14) + offset] = data;
104	104	}
105	105	}
106	106	}
r14976	r14977
137	137	if (m_pagedRAM)
138	138	{
139	139	/* if paged ram then set 8000 to afff to read from the ram 8000 to afff */
140		memory_set_bankptr(machine(), "bank4", machine().region("maincpu")->base() + 0x8000);
	140	membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x8000);
141	141	}
142	142	else
143	143	{
144	144	/* if paged rom then set the rom to be read from 8000 to afff */
145		memory_set_bankptr(machine(), "bank4", machine().region("user1")->base() + (m_rombank << 14));
	145	membank("bank4")->set_base(machine().root_device().memregion("user1")->base() + (m_rombank << 14));
146	146	};
147	147
148	148	/* set the rom to be read from b000 to bfff */
149		memory_set_bank(machine(), "bank6", m_rombank);
	149	membank("bank6")->set_entry(m_rombank);
150	150	}
151	151	else
152	152	{
r14976	r14977
154	154	m_vdusel=(data>>7)&0x01;
155	155	bbcbp_setvideoshadow(machine(), m_vdusel);
156	156	//need to make the video display do a full screen refresh for the new memory area
157		memory_set_bankptr(machine(), "bank2", machine().region("maincpu")->base()+0x3000);
	157	membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base()+0x3000);
158	158	}
159	159	}
160	160
r14976	r14977
165	165
166	166	WRITE8_MEMBER(bbc_state::bbc_memorybp1_w)
167	167	{
168		machine().region("maincpu")->base()[offset]=data;
	168	memregion("maincpu")->base()[offset]=data;
169	169	}
170	170
171	171
r14976	r14977
182	182	DIRECT_UPDATE_HANDLER( bbcbp_direct_handler )
183	183	{
184	184	bbc_state *state = machine.driver_data<bbc_state>();
185		UINT8 *ram = machine.region("maincpu")->base();
	185	UINT8 *ram = state->memregion("maincpu")->base();
186	186	if (state->m_vdusel == 0)
187	187	{
188	188	// not in shadow ram mode so just read normal ram
189		memory_set_bankptr(machine, "bank2", ram + 0x3000);
	189	state->membank("bank2")->set_base(ram + 0x3000);
190	190	}
191	191	else
192	192	{
193	193	if (vdudriverset(machine))
194	194	{
195	195	// if VDUDriver set then read from shadow ram
196		memory_set_bankptr(machine, "bank2", ram + 0xb000);
	196	state->membank("bank2")->set_base(ram + 0xb000);
197	197	}
198	198	else
199	199	{
200	200	// else read from normal ram
201		memory_set_bankptr(machine, "bank2", ram + 0x3000);
	201	state->membank("bank2")->set_base(ram + 0x3000);
202	202	}
203	203	}
204	204	return address;
r14976	r14977
207	207
208	208	WRITE8_MEMBER(bbc_state::bbc_memorybp2_w)
209	209	{
210		UINT8 *ram = machine().region("maincpu")->base();
	210	UINT8 *ram = memregion("maincpu")->base();
211	211	if (m_vdusel==0)
212	212	{
213	213	// not in shadow ram mode so just write to normal ram
r14976	r14977
235	235	{
236	236	if (m_pagedRAM)
237	237	{
238		machine().region("maincpu")->base()[offset+0x8000]=data;
	238	memregion("maincpu")->base()[offset+0x8000]=data;
239	239	}
240	240	}
241	241
r14976	r14977
255	255	{
256	256	if (m_pagedRAM)
257	257	{
258		machine().region("maincpu")->base()[offset+0x8000]=data;
	258	memregion("maincpu")->base()[offset+0x8000]=data;
259	259	}
260	260	else
261	261	{
262	262	if (bbc_b_plus_sideways_ram_banks[m_rombank])
263	263	{
264		machine().region("user1")->base()[offset+(m_rombank<<14)]=data;
	264	memregion("user1")->base()[offset+(m_rombank<<14)]=data;
265	265	}
266	266	}
267	267	}
r14976	r14977
270	270	{
271	271	if (bbc_b_plus_sideways_ram_banks[m_rombank])
272	272	{
273		machine().region("user1")->base()[offset+(m_rombank<<14)+0x3000]=data;
	273	memregion("user1")->base()[offset+(m_rombank<<14)+0x3000]=data;
274	274	}
275	275	}
276	276
r14976	r14977
360	360
361	361	if (m_ACCCON_Y)
362	362	{
363		memory_set_bankptr(machine(), "bank7", machine().region("maincpu")->base() + 0x9000);
	363	membank("bank7")->set_base(machine().root_device().memregion("maincpu")->base() + 0x9000);
364	364	}
365	365	else
366	366	{
367		memory_set_bankptr(machine(), "bank7", machine().region("user1")->base() + 0x40000);
	367	membank("bank7")->set_base(machine().root_device().memregion("user1")->base() + 0x40000);
368	368	}
369	369
370	370	bbcbp_setvideoshadow(machine(), m_ACCCON_D);
r14976	r14977
372	372
373	373	if (m_ACCCON_X)
374	374	{
375		memory_set_bankptr(machine(), "bank2", machine().region( "maincpu" )->base() + 0xb000 );
	375	membank("bank2")->set_base(machine().root_device().memregion( "maincpu" )->base() + 0xb000 );
376	376	}
377	377	else
378	378	{
379		memory_set_bankptr(machine(), "bank2", machine().region( "maincpu" )->base() + 0x3000 );
	379	membank("bank2")->set_base(machine().root_device().memregion( "maincpu" )->base() + 0x3000 );
380	380	}
381	381
382	382	/* ACCCON_TST controls paging of rom reads in the 0xFC00-0xFEFF reigon */
r14976	r14977
384	384	/* if 1 the the ROM is paged in for reads but writes still go to I/O   */
385	385	if (m_ACCCON_TST)
386	386	{
387		memory_set_bankptr(machine(), "bank8", machine().region("user1")->base()+0x43c00);
	387	membank("bank8")->set_base(machine().root_device().memregion("user1")->base()+0x43c00);
388	388	space.install_read_bank(0xFC00,0xFEFF,"bank8");
389	389	}
390	390	else
r14976	r14977
410	410
411	411	if (m_pagedRAM)
412	412	{
413		memory_set_bankptr(machine(), "bank4", machine().region("maincpu")->base() + 0x8000);
414		memory_set_bank(machine(), "bank5", m_rombank);
	413	membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x8000);
	414	membank("bank5")->set_entry(m_rombank);
415	415	}
416	416	else
417	417	{
418		memory_set_bankptr(machine(), "bank4", machine().region("user1")->base() + ((m_rombank) << 14));
419		memory_set_bank(machine(), "bank5", m_rombank);
	418	membank("bank4")->set_base(machine().root_device().memregion("user1")->base() + ((m_rombank) << 14));
	419	membank("bank5")->set_entry(m_rombank);
420	420	}
421	421	}
422	422
r14976	r14977
424	424
425	425	WRITE8_MEMBER(bbc_state::bbc_memorybm1_w)
426	426	{
427		machine().region("maincpu")->base()[offset] = data;
	427	memregion("maincpu")->base()[offset] = data;
428	428	}
429	429
430	430
r14976	r14977
433	433	bbc_state *state = machine.driver_data<bbc_state>();
434	434	if (state->m_ACCCON_X)
435	435	{
436		memory_set_bankptr( machine, "bank2", machine.region( "maincpu" )->base() + 0xb000 );
	436	state->membank( "bank2" )->set_base( state->memregion( "maincpu" )->base() + 0xb000 );
437	437	}
438	438	else
439	439	{
440	440	if (state->m_ACCCON_E && bbcm_vdudriverset(machine))
441	441	{
442		memory_set_bankptr( machine, "bank2", machine.region( "maincpu" )->base() + 0xb000 );
	442	state->membank( "bank2" )->set_base( machine.root_device().memregion( "maincpu" )->base() + 0xb000 );
443	443	}
444	444	else
445	445	{
446		memory_set_bankptr( machine, "bank2", machine.region( "maincpu" )->base() + 0x3000 );
	446	state->membank( "bank2" )->set_base( machine.root_device().memregion( "maincpu" )->base() + 0x3000 );
447	447	}
448	448	}
449	449
r14976	r14977
454	454
455	455	WRITE8_MEMBER(bbc_state::bbc_memorybm2_w)
456	456	{
457		UINT8 *ram = machine().region("maincpu")->base();
	457	UINT8 *ram = memregion("maincpu")->base();
458	458	if (m_ACCCON_X)
459	459	{
460	460	ram[offset + 0xb000] = data;
r14976	r14977
482	482	{
483	483	if (m_pagedRAM)
484	484	{
485		machine().region("maincpu")->base()[offset+0x8000]=data;
	485	memregion("maincpu")->base()[offset+0x8000]=data;
486	486	}
487	487	else
488	488	{
489	489	if (bbc_master_sideways_ram_banks[m_rombank])
490	490	{
491		machine().region("user1")->base()[offset+(m_rombank<<14)]=data;
	491	memregion("user1")->base()[offset+(m_rombank<<14)]=data;
492	492	}
493	493	}
494	494	}
r14976	r14977
498	498	{
499	499	if (bbc_master_sideways_ram_banks[m_rombank])
500	500	{
501		machine().region("user1")->base()[offset+(m_rombank<<14)+0x1000]=data;
	501	memregion("user1")->base()[offset+(m_rombank<<14)+0x1000]=data;
502	502	}
503	503	}
504	504
r14976	r14977
507	507	{
508	508	if (m_ACCCON_Y)
509	509	{
510		machine().region("maincpu")->base()[offset+0x9000]=data;
	510	memregion("maincpu")->base()[offset+0x9000]=data;
511	511	}
512	512	}
513	513
r14976	r14977
542	542	/* Now handled in bbcm_ACCCON_write PHS - 2008-10-11 */
543	543	//  if ( m_ACCCON_TST )
544	544	//  {
545		//      return machine().region("user1")->base()[offset+0x43c00];
	545	//      return memregion("user1")->base()[offset+0x43c00];
546	546	//  };
547	547
548	548	if (offset<=0x0ff) /* FRED */
r14976	r14977
1741	1741	}
1742	1742	else
1743	1743	{
1744		return machine().region("disks")->base()[offset + (m_opusbank << 8)];
	1744	return memregion("disks")->base()[offset + (m_opusbank << 8)];
1745	1745	}
1746	1746	}
1747	1747	return 0xff;
r14976	r14977
1783	1783	}
1784	1784	else
1785	1785	{
1786		machine().region("disks")->base()[offset + (m_opusbank << 8)] = data;
	1786	memregion("disks")->base()[offset + (m_opusbank << 8)] = data;
1787	1787	}
1788	1788	}
1789	1789	}
r14976	r14977
1928	1928	***************************************/
1929	1929	DEVICE_IMAGE_LOAD( bbcb_cart )
1930	1930	{
1931		UINT8 *mem = image.device().machine().region("user1")->base();
	1931	UINT8 *mem = image.device().machine().root_device().memregion("user1")->base();
1932	1932	int size, read_;
1933	1933	int addr = 0;
1934	1934	int index = 0;
r14976	r14977
2005	2005	MACHINE_RESET( bbca )
2006	2006	{
2007	2007	bbc_state *state = machine.driver_data<bbc_state>();
2008		UINT8 *ram = machine.region("maincpu")->base();
	2008	UINT8 *ram = machine.root_device().memregion("maincpu")->base();
2009	2009	state->m_RAMSize = 1;
2010		memory_set_bankptr(machine, "bank1",ram);
2011		memory_set_bankptr(machine, "bank3",ram);
	2010	state->membank("bank1")->set_base(ram);
	2011	state->membank("bank3")->set_base(ram);
2012	2012
2013		memory_set_bankptr(machine, "bank4",machine.region("user1")->base());          /* bank 4 is the paged ROMs     from 8000 to bfff */
2014		memory_set_bankptr(machine, "bank7",machine.region("user1")->base()+0x10000);  /* bank 7 points at the OS rom  from c000 to ffff */
	2013	state->membank("bank4")->set_base(machine.root_device().memregion("user1")->base());          /* bank 4 is the paged ROMs     from 8000 to bfff */
	2014	state->membank("bank7")->set_base(state->memregion("user1")->base()+0x10000);  /* bank 7 points at the OS rom  from c000 to ffff */
2015	2015
2016	2016	bbcb_IC32_initialise(state);
2017	2017	}
r14976	r14977
2040	2040	MACHINE_RESET( bbcb )
2041	2041	{
2042	2042	bbc_state *state = machine.driver_data<bbc_state>();
2043		UINT8 *ram = machine.region("maincpu")->base();
	2043	UINT8 *ram = state->memregion("maincpu")->base();
2044	2044	state->m_DFSType=    (input_port_read(machine, "BBCCONFIG") >> 0) & 0x07;
2045	2045	state->m_SWRAMtype = (input_port_read(machine, "BBCCONFIG") >> 3) & 0x03;
2046	2046	state->m_RAMSize=    (input_port_read(machine, "BBCCONFIG") >> 5) & 0x01;
2047	2047
2048		memory_set_bankptr(machine, "bank1",ram);
	2048	state->membank("bank1")->set_base(ram);
2049	2049	if (state->m_RAMSize)
2050	2050	{
2051	2051	/* 32K Model B */
2052		memory_set_bankptr(machine, "bank3", ram + 0x4000);
	2052	state->membank("bank3")->set_base(ram + 0x4000);
2053	2053	state->m_memorySize=32;
2054	2054	}
2055	2055	else
2056	2056	{
2057	2057	/* 16K just repeat the lower 16K*/
2058		memory_set_bankptr(machine, "bank3", ram);
	2058	state->membank("bank3")->set_base(ram);
2059	2059	state->m_memorySize=16;
2060	2060	}
2061	2061
2062		memory_set_bankptr(machine, "bank4", machine.region("user1")->base());          /* bank 4 is the paged ROMs     from 8000 to bfff */
2063		memory_set_bankptr(machine, "bank7", machine.region("user1")->base() + 0x40000);  /* bank 7 points at the OS rom  from c000 to ffff */
	2062	state->membank("bank4")->set_base(machine.root_device().memregion("user1")->base());          /* bank 4 is the paged ROMs     from 8000 to bfff */
	2063	state->membank("bank7")->set_base(machine.root_device().memregion("user1")->base() + 0x40000);  /* bank 7 points at the OS rom  from c000 to ffff */
2064	2064
2065	2065	bbcb_IC32_initialise(state);
2066	2066
r14976	r14977
2084	2084	machine.device("maincpu")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(bbcbp_direct_handler), &machine));
2085	2085
2086	2086	/* bank 6 is the paged ROMs     from b000 to bfff */
2087		memory_configure_bank(machine, "bank6", 0, 16, machine.region("user1")->base() + 0x3000, 1<<14);
	2087	state->membank("bank6")->configure_entries(0, 16, state->memregion("user1")->base() + 0x3000, 1<<14);
2088	2088	}
2089	2089
2090	2090	MACHINE_RESET( bbcbp )
2091	2091	{
2092	2092	bbc_state *state = machine.driver_data<bbc_state>();
2093		memory_set_bankptr(machine, "bank1",machine.region("maincpu")->base());
2094		memory_set_bankptr(machine, "bank2",machine.region("maincpu")->base()+0x03000);  /* bank 2 screen/shadow ram     from 3000 to 7fff */
2095		memory_set_bankptr(machine, "bank4",machine.region("user1")->base());         /* bank 4 is paged ROM or RAM   from 8000 to afff */
2096		memory_set_bank(machine, "bank6", 0);
2097		memory_set_bankptr(machine, "bank7",machine.region("user1")->base()+0x40000); /* bank 7 points at the OS rom  from c000 to ffff */
	2093	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
	2094	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base()+0x03000);  /* bank 2 screen/shadow ram     from 3000 to 7fff */
	2095	state->membank("bank4")->set_base(machine.root_device().memregion("user1")->base());         /* bank 4 is paged ROM or RAM   from 8000 to afff */
	2096	state->membank("bank6")->set_entry(0);
	2097	state->membank("bank7")->set_base(state->memregion("user1")->base()+0x40000); /* bank 7 points at the OS rom  from c000 to ffff */
2098	2098
2099	2099	bbcb_IC32_initialise(state);
2100	2100
r14976	r14977
2112	2112	machine.device("maincpu")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate(FUNC(bbcm_direct_handler), &machine));
2113	2113
2114	2114	/* bank 5 is the paged ROMs     from 9000 to bfff */
2115		memory_configure_bank(machine, "bank5", 0, 16, machine.region("user1")->base()+0x01000, 1<<14);
	2115	state->membank("bank5")->configure_entries(0, 16, machine.root_device().memregion("user1")->base()+0x01000, 1<<14);
2116	2116
2117	2117	/* Set ROM/IO bank to point to rom */
2118		memory_set_bankptr( machine, "bank8", machine.region("user1")->base()+0x43c00);
	2118	state->membank( "bank8" )->set_base( state->memregion("user1")->base()+0x43c00);
2119	2119	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0xFC00, 0xFEFF, "bank8");
2120	2120	}
2121	2121
2122	2122	MACHINE_RESET( bbcm )
2123	2123	{
2124	2124	bbc_state *state = machine.driver_data<bbc_state>();
2125		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base());         /* bank 1 regular lower ram     from 0000 to 2fff */
2126		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x3000);   /* bank 2 screen/shadow ram     from 3000 to 7fff */
2127		memory_set_bankptr(machine, "bank4", machine.region("user1")->base());         /* bank 4 is paged ROM or RAM   from 8000 to 8fff */
2128		memory_set_bank(machine, "bank5", 0);
2129		memory_set_bankptr(machine, "bank7", machine.region("user1")->base() + 0x40000); /* bank 6 OS rom of RAM          from c000 to dfff */
	2125	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());         /* bank 1 regular lower ram     from 0000 to 2fff */
	2126	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x3000);   /* bank 2 screen/shadow ram     from 3000 to 7fff */
	2127	state->membank("bank4")->set_base(machine.root_device().memregion("user1")->base());         /* bank 4 is paged ROM or RAM   from 8000 to 8fff */
	2128	state->membank("bank5")->set_entry(0);
	2129	state->membank("bank7")->set_base(state->memregion("user1")->base() + 0x40000); /* bank 6 OS rom of RAM          from c000 to dfff */
2130	2130
2131	2131	bbcb_IC32_initialise(state);
2132	2132

src/mess/machine/comx_clm.c

r14976	r14977
210	210	{
211	211	m_slot = dynamic_cast<comx_expansion_slot_device *>(owner());
212	212
213		m_rom = subregion("c000")->base();
214		m_char_rom = subregion(MC6845_TAG)->base();
	213	m_rom = memregion("c000")->base();
	214	m_char_rom = memregion(MC6845_TAG)->base();
215	215	m_video_ram = auto_alloc_array(machine(), UINT8, VIDEORAM_SIZE);
216	216
217	217	// state saving

src/mess/machine/comxpl80.c

r14976	r14977
243	243	// read data from font ROM
244	244	int font_rom = (input_port_read(*this, "FONT") & 0x03) * 0x2000;
245	245
246		m_plotter_data = machine().region("gfx2")->base()[font_rom | m_font_addr];
	246	m_plotter_data = memregion("gfx2")->base()[font_rom | m_font_addr];
247	247	}
248	248
249	249	if (!BIT(data, 6))

src/mess/machine/cuda.c

r14976	r14977
419	419	save_item(NAME(disk_pram));
420	420
421	421	astring tempstring;
422		UINT8 *rom = device().machine().region(device().subtag(tempstring, CUDA_CPU_TAG))->base();
	422	UINT8 *rom = device().machine().root_device().memregion(device().subtag(tempstring, CUDA_CPU_TAG))->base();
423	423
424	424	if (rom)
425	425	{

src/mess/machine/hp48.c

r14976	r14977
797	797
798	798	if ( state->m_modules[i].data )
799	799	{
800		memory_set_bankptr( space->machine(), bank, state->m_modules[i].data );
	800	state->membank( bank )->set_base( state->m_modules[i].data );
801	801	}
802	802
803	803	if ( i == 0 )
r14976	r14977
1134	1134	/* ROM load */
1135	1135	rom_size = HP48_S_SERIES ? (256 * 1024) : (512 * 1024);
1136	1136	rom = auto_alloc_array(machine, UINT8, 2 * rom_size);
1137		hp48_decode_nibble( rom, machine.region( "maincpu" )->base(), rom_size );
	1137	hp48_decode_nibble( rom, state->memregion( "maincpu" )->base(), rom_size );
1138	1138
1139	1139	/* init state */
1140	1140	memset( ram, 0, 2 * ram_size );

src/mess/machine/c65.c

r14976	r14977
665	665
666	666	if (data == 0x00) {
667	667	space->install_readwrite_bank(expansion_ram_begin, expansion_ram_end,"bank16");
668		memory_set_bankptr(space->machine(), "bank16", space->machine().device<ram_device>(RAM_TAG)->pointer() + 128*1024);
	668	state->membank("bank16")->set_base(space->machine().device<ram_device>(RAM_TAG)->pointer() + 128*1024);
669	669	} else {
670	670	space->nop_readwrite(expansion_ram_begin, expansion_ram_end);
671	671	}
r14976	r14977
817	817	{
818	818	if (value & 1)
819	819	{
820		memory_set_bankptr(machine, "bank8", state->m_colorram + 0x400);
821		memory_set_bankptr(machine, "bank9", state->m_colorram + 0x400);
	820	state->membank("bank8")->set_base(state->m_colorram + 0x400);
	821	state->membank("bank9")->set_base(state->m_colorram + 0x400);
822	822	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0dc00, 0x0dfff, "bank8");
823	823	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x0dc00, 0x0dfff, "bank9");
824	824	}
r14976	r14977
833	833	#if 0
834	834	/* cartridge roms !?*/
835	835	if (value & 0x08)
836		memory_set_bankptr(machine, "bank1", state->m_roml);
	836	state->membank("bank1")->set_base(state->m_roml);
837	837	else
838		memory_set_bankptr(machine, "bank1", state->m_memory + 0x8000);
	838	state->membank("bank1")->set_base(state->m_memory + 0x8000);
839	839
840	840	if (value & 0x10)
841		memory_set_bankptr(machine, "bank2", state->m_basic);
	841	state->membank("bank2")->set_base(state->m_basic);
842	842	else
843		memory_set_bankptr(machine, "bank2", state->m_memory + 0xa000);
	843	state->membank("bank2")->set_base(state->m_memory + 0xa000);
844	844	#endif
845	845	if ((state->m_old_value^value) & 0x20)
846	846	{
847	847	/* bankswitching faulty when doing actual page */
848	848	if (value & 0x20)
849		memory_set_bankptr(machine, "bank3", state->m_interface);
	849	state->membank("bank3")->set_base(state->m_interface);
850	850	else
851		memory_set_bankptr(machine, "bank3", state->m_memory + 0xc000);
	851	state->membank("bank3")->set_base(state->m_memory + 0xc000);
852	852	}
853	853	state->m_charset_select = value & 0x40;
854	854	#if 0
855	855	/* cartridge roms !?*/
856	856	if (value & 0x80)
857		memory_set_bankptr(machine, "bank8", state->m_kernal);
	857	state->membank("bank8")->set_base(state->m_kernal);
858	858	else
859		memory_set_bankptr(machine, "bank6", state->m_memory + 0xe000);
	859	state->membank("bank6")->set_base(state->m_memory + 0xe000);
860	860	#endif
861	861	state->m_old_value = value;
862	862	}
r14976	r14977
876	876	charen = (data & 4) ? 1 : 0;
877	877
878	878	if ((!state->m_game && state->m_exrom) || (loram && hiram && !state->m_exrom))
879		memory_set_bankptr(machine, "bank1", state->m_roml);
	879	state->membank("bank1")->set_base(state->m_roml);
880	880	else
881		memory_set_bankptr(machine, "bank1", state->m_memory + 0x8000);
	881	state->membank("bank1")->set_base(state->m_memory + 0x8000);
882	882
883	883	if ((!state->m_game && state->m_exrom && hiram) || (!state->m_exrom))
884		memory_set_bankptr(machine, "bank2", state->m_romh);
	884	state->membank("bank2")->set_base(state->m_romh);
885	885	else if (loram && hiram)
886		memory_set_bankptr(machine, "bank2", state->m_basic);
	886	state->membank("bank2")->set_base(state->m_basic);
887	887	else
888		memory_set_bankptr(machine, "bank2", state->m_memory + 0xa000);
	888	state->membank("bank2")->set_base(state->m_memory + 0xa000);
889	889
890	890	if ((!state->m_game && state->m_exrom) || (charen && (loram || hiram)))
891	891	{
892	892	state->m_io_on = 1;
893		memory_set_bankptr(machine, "bank6", state->m_colorram);
894		memory_set_bankptr(machine, "bank7", state->m_colorram);
	893	state->membank("bank6")->set_base(state->m_colorram);
	894	state->membank("bank7")->set_base(state->m_colorram);
895	895
896	896	if (state->m_io_dc00_on)
897	897	{
r14976	r14977
902	902	{
903	903	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0dc00, 0x0dfff, "bank8");
904	904	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x0dc00, 0x0dfff, "bank9");
905		memory_set_bankptr(machine, "bank8", state->m_colorram + 0x400);
906		memory_set_bankptr(machine, "bank9", state->m_colorram + 0x400);
	905	state->membank("bank8")->set_base(state->m_colorram + 0x400);
	906	state->membank("bank9")->set_base(state->m_colorram + 0x400);
907	907	}
908	908	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x0d000, 0x0d7ff, FUNC(c65_read_io));
909	909	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x0d000, 0x0d7ff, FUNC(c65_write_io));
r14976	r14977
911	911	else
912	912	{
913	913	state->m_io_on = 0;
914		memory_set_bankptr(machine, "bank5", state->m_memory + 0xd000);
915		memory_set_bankptr(machine, "bank7", state->m_memory + 0xd800);
916		memory_set_bankptr(machine, "bank9", state->m_memory + 0xdc00);
	914	state->membank("bank5")->set_base(state->m_memory + 0xd000);
	915	state->membank("bank7")->set_base(state->m_memory + 0xd800);
	916	state->membank("bank9")->set_base(state->m_memory + 0xdc00);
917	917	if (!charen && (loram || hiram))
918	918	{
919		memory_set_bankptr(machine, "bank4", state->m_chargen);
920		memory_set_bankptr(machine, "bank6", state->m_chargen + 0x800);
921		memory_set_bankptr(machine, "bank8", state->m_chargen + 0xc00);
	919	state->membank("bank4")->set_base(state->m_chargen);
	920	state->membank("bank6")->set_base(state->m_chargen + 0x800);
	921	state->membank("bank8")->set_base(state->m_chargen + 0xc00);
922	922	}
923	923	else
924	924	{
925		memory_set_bankptr(machine, "bank4", state->m_memory + 0xd000);
926		memory_set_bankptr(machine, "bank6", state->m_memory + 0xd800);
927		memory_set_bankptr(machine, "bank8", state->m_memory + 0xdc00);
	925	state->membank("bank4")->set_base(state->m_memory + 0xd000);
	926	state->membank("bank6")->set_base(state->m_memory + 0xd800);
	927	state->membank("bank8")->set_base(state->m_memory + 0xdc00);
928	928	}
929	929	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0d000, 0x0d7ff, "bank4");
930	930	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x0d000, 0x0d7ff, "bank5");
r14976	r14977
932	932
933	933	if (!state->m_game && state->m_exrom)
934	934	{
935		memory_set_bankptr(machine, "bank10", state->m_romh);
	935	state->membank("bank10")->set_base(state->m_romh);
936	936	}
937	937	else
938	938	{
939	939	if (hiram)
940	940	{
941		memory_set_bankptr(machine, "bank10", state->m_kernal);
	941	state->membank("bank10")->set_base(state->m_kernal);
942	942	}
943	943	else
944	944	{
945		memory_set_bankptr(machine, "bank10", state->m_memory + 0xe000);
	945	state->membank("bank10")->set_base(state->m_memory + 0xe000);
946	946	}
947	947	}
948	948	state->m_old_data = data;
r14976	r14977
997	997	{
998	998	c65_state *state = machine.driver_data<c65_state>();
999	999	state->m_memory = auto_alloc_array_clear(machine, UINT8, 0x10000);
1000		memory_set_bankptr(machine, "bank11", state->m_memory + 0x00000);
1001		memory_set_bankptr(machine, "bank12", state->m_memory + 0x08000);
1002		memory_set_bankptr(machine, "bank13", state->m_memory + 0x0a000);
1003		memory_set_bankptr(machine, "bank14", state->m_memory + 0x0c000);
1004		memory_set_bankptr(machine, "bank15", state->m_memory + 0x0e000);
	1000	state->membank("bank11")->set_base(state->m_memory + 0x00000);
	1001	state->membank("bank12")->set_base(state->m_memory + 0x08000);
	1002	state->membank("bank13")->set_base(state->m_memory + 0x0a000);
	1003	state->membank("bank14")->set_base(state->m_memory + 0x0c000);
	1004	state->membank("bank15")->set_base(state->m_memory + 0x0e000);
1005	1005
1006	1006	cbm_common_init();
1007	1007	state->m_keyline = 0xff;

src/mess/machine/abc_sio.c

r14976	r14977
190	190
191	191	if (offset >= 0x4000 && offset < 0x5000) // TODO where is this mapped?
192	192	{
193		data = subregion("abc80")->base()[offset & 0xfff];
	193	data = memregion("abc80")->base()[offset & 0xfff];
194	194	}
195	195
196	196	return data;

src/mess/machine/rm380z.c

r14976	r14977
283	283	void rm380z_state::config_memory_map()
284	284	{
285	285	address_space *program = m_maincpu->space(AS_PROGRAM);
286		UINT8 *rom = machine().region(RM380Z_MAINCPU_TAG)->base();
	286	UINT8 *rom = memregion(RM380Z_MAINCPU_TAG)->base();
287	287	UINT8* m_ram_p = m_messram->pointer();
288	288
289	289	if ( RM380Z_PORTS_ENABLED_HIGH )

src/mess/machine/ti99/grom.c

r14976	r14977
281	281	m_waddr_LSB = false;
282	282	m_buffer = 0;
283	283
284		m_memptr = owner()->subregion(m_regionname)->base();
	284	m_memptr = owner()->memregion(m_regionname)->base();
285	285	assert (m_memptr!=NULL);
286	286
287	287	m_memptr += m_offset_reg;

src/mess/machine/ti99/gromport.c

r14976	r14977
982	982
983	983	UINT8* grom_ptr;
984	984
985		const memory_region *regg;
986		const memory_region *regr;
987		const memory_region *regr2;
	985	memory_region *regg;
	986	memory_region *regr;
	987	memory_region *regr2;
988	988
989	989	m_pcb->m_grom_size = m_softlist? get_software_region_length("grom_socket") : m_rpk->get_resource_length("grom_socket");
990	990	if (VERBOSE>6) LOG("gromport: grom_socket.size=0x%04x\n", m_pcb->m_grom_size);
991	991
992	992	if (m_pcb->m_grom_size > 0)
993	993	{
994		regg = subregion("grom_contents");
	994	regg = memregion("grom_contents");
995	995	grom_ptr = m_softlist? get_software_region("grom_socket") : (UINT8*)m_rpk->get_contents_of_socket("grom_socket");
996	996	memcpy(regg->base(), grom_ptr, m_pcb->m_grom_size);
997	997
r14976	r14977
1012	1012	m_pcb->m_rom_size = m_softlist? get_software_region_length("rom_socket") : m_rpk->get_resource_length("rom_socket");
1013	1013	if (m_pcb->m_rom_size > 0)
1014	1014	{
1015		regr = subregion("rom_contents");
	1015	regr = memregion("rom_contents");
1016	1016	m_pcb->m_rom_ptr = m_softlist? get_software_region("rom_socket") : (UINT8*)m_rpk->get_contents_of_socket("rom_socket");
1017	1017	memcpy(regr->base(), m_pcb->m_rom_ptr, m_pcb->m_rom_size);
1018	1018	}
r14976	r14977
1021	1021	if (rom2_length > 0)
1022	1022	{
1023	1023	// sizes do not differ between rom and rom2
1024		regr2 = subregion("rom2_contents");
	1024	regr2 = memregion("rom2_contents");
1025	1025	m_pcb->m_rom2_ptr = m_softlist? get_software_region("rom2_socket") : (UINT8*)m_rpk->get_contents_of_socket("rom2_socket");
1026	1026	memcpy(regr2->base(), m_pcb->m_rom2_ptr, rom2_length);
1027	1027	}

src/mess/machine/ti99/genboard.c

r14976	r14977
817	817	// This is a preliminary setting; the initial context switch occurs before
818	818	// device_reset. Luckily, the reset vector at >0000/>0002 is the same for
819	819	// all variants of the boot eprom.
820		m_eprom = machine().region("maincpu")->base();
	820	m_eprom = memregion("maincpu")->base();
821	821
822		m_sram = machine().region(SRAM_TAG)->base();
823		m_dram = machine().region(DRAM_TAG)->base();
	822	m_sram = memregion(SRAM_TAG)->base();
	823	m_dram = memregion(DRAM_TAG)->base();
824	824
825	825	m_geneve_mode = false;
826	826	m_direct_mode = true;
r14976	r14977
857	857	{
858	858	case GENEVE_098:
859	859	if (VERBOSE>0) LOG("geneve: Using 0.98 boot eprom\n");
860		m_eprom = machine().region("maincpu")->base() + 0x4000;
	860	m_eprom = memregion("maincpu")->base() + 0x4000;
861	861	break;
862	862	case GENEVE_100:
863	863	if (VERBOSE>0) LOG("geneve: Using 1.00 boot eprom\n");
864		m_eprom = machine().region("maincpu")->base();
	864	m_eprom = memregion("maincpu")->base();
865	865	break;
866	866	}
867	867	}
868	868	else
869	869	{
870	870	if (VERBOSE>0) LOG("geneve: Using GenMod modification\n");
871		m_eprom = machine().region("maincpu")->base() + 0x8000;
	871	m_eprom = memregion("maincpu")->base() + 0x8000;
872	872	if (m_eprom[0] != 0xf0)
873	873	{
874	874	fatalerror("genboard: GenMod boot rom missing.\n");

src/mess/machine/ti99/ti_fdc.c

r14976	r14977
262	262	void ti_fdc_device::device_start(void)
263	263	{
264	264	if (VERBOSE>5) LOG("ti_fdc: TI FDC start\n");
265		m_dsrrom = subregion(DSRROM)->base();
	265	m_dsrrom = memregion(DSRROM)->base();
266	266	m_motor_on_timer = timer_alloc(MOTOR_TIMER);
267	267	m_controller = subdevice(FDC_TAG);
268	268

src/mess/machine/ti99/p_code.c

r14976	r14977
248	248	m_grom[5] = static_cast<ti99_grom_device*>(subdevice(PGROM5_TAG));
249	249	m_grom[6] = static_cast<ti99_grom_device*>(subdevice(PGROM6_TAG));
250	250	m_grom[7] = static_cast<ti99_grom_device*>(subdevice(PGROM7_TAG));
251		m_rom = subregion(PCODE_ROM_TAG)->base();
	251	m_rom = memregion(PCODE_ROM_TAG)->base();
252	252	}
253	253
254	254	void ti_pcode_card_device::device_reset()

src/mess/machine/ti99/tn_usbsm.c

r14976	r14977
266	266
267	267	void nouspikel_usb_smartmedia_device::device_start()
268	268	{
269		m_ram = (UINT16*)(*subregion(BUFFER_TAG));
	269	m_ram = (UINT16*)(*memregion(BUFFER_TAG));
270	270	/* auto_alloc_array(device->machine(), UINT16, 0x100000/2); */
271	271	m_smartmedia = subdevice<smartmedia_image_device>("smartmedia");
272	272	m_strata = subdevice("strata");

src/mess/machine/ti99/ti32kmem.c

r14976	r14977
92	92
93	93	void ti_32k_expcard_device::device_start(void)
94	94	{
95		m_ram_ptr = subregion(RAMREGION)->base();
	95	m_ram_ptr = memregion(RAMREGION)->base();
96	96	m_cru_base = 0;
97	97	}
98	98

src/mess/machine/ti99/evpc.c

r14976	r14977
306	306
307	307	void snug_enhanced_video_device::device_start()
308	308	{
309		m_dsrrom = subregion(DSRROM)->base();
	309	m_dsrrom = memregion(DSRROM)->base();
310	310	m_novram = (UINT8*)malloc(NOVRAM_SIZE);
311	311	}
312	312

src/mess/machine/ti99/speech8.c

r14976	r14977
183	183
184	184	void ti998_spsyn_device::device_reset()
185	185	{
186		m_speechrom = subregion(SPEECHROM_TAG)->base();
187		m_sprom_length = subregion(SPEECHROM_TAG)->bytes();
	186	m_speechrom = memregion(SPEECHROM_TAG)->base();
	187	m_sprom_length = memregion(SPEECHROM_TAG)->bytes();
188	188	m_sprom_address = 0;
189	189	m_load_pointer = 0;
190	190	m_rombits_count = 0;

src/mess/machine/ti99/tn_ide.c

r14976	r14977
301	301	m_rtc = subdevice<rtc65271_device>("ide_rtc");
302	302	m_ide = subdevice("ide");
303	303
304		m_ram = subregion(BUFFER_TAG)->base();
	304	m_ram = memregion(BUFFER_TAG)->base();
305	305	m_sram_enable_dip = false; // TODO: what is this?
306	306	}
307	307

src/mess/machine/ti99/samsmem.c

r14976	r14977
113	113	void sams_memory_expansion_device::device_start()
114	114	{
115	115	if (VERBOSE>5) LOG("SuperAMS: start\n");
116		m_ram = subregion(RAMREGION)->base();
	116	m_ram = memregion(RAMREGION)->base();
117	117	}
118	118
119	119	void sams_memory_expansion_device::device_reset()

src/mess/machine/ti99/hfdc.c

r14976	r14977
498	498	if (VERBOSE>5) LOG("hfdc: start\n");
499	499	m_hdc9234 = static_cast<smc92x4_device *>(subdevice(FDC_TAG));
500	500	m_clock = subdevice(CLOCK_TAG);
501		m_dsrrom = subregion(DSRROM)->base();
502		m_buffer_ram = subregion(BUFFER)->base();
	501	m_dsrrom = memregion(DSRROM)->base();
	502	m_buffer_ram = memregion(BUFFER)->base();
503	503
504	504	m_motor_on_timer = timer_alloc(MOTOR_TIMER);
505	505

src/mess/machine/ti99/ti_rs232.c

r14976	r14977
1025	1025
1026	1026	void ti_rs232_pio_device::device_start()
1027	1027	{
1028		m_dsrrom = subregion(DSRROM)->base();
	1028	m_dsrrom = memregion(DSRROM)->base();
1029	1029	m_uart[0] = subdevice<tms9902_device>("tms9902_0");
1030	1030	m_uart[1] = subdevice<tms9902_device>("tms9902_1");
1031	1031	m_serdev[0] = subdevice<ti_rs232_attached_device>("serdev0");

src/mess/machine/ti99/myarcmem.c

r14976	r14977
182	182	void myarc_memory_expansion_device::device_start()
183	183	{
184	184	if (VERBOSE>5) LOG("myarc memexp: start\n");
185		m_dsrrom = subregion(DSRROM)->base();
186		m_ram = subregion(RAMREGION)->base();
	185	m_dsrrom = memregion(DSRROM)->base();
	186	m_ram = memregion(RAMREGION)->base();
187	187	}
188	188
189	189	void myarc_memory_expansion_device::device_reset()

src/mess/machine/ti99/memex.c

r14976	r14977
115	115
116	116	void geneve_memex_device::device_start()
117	117	{
118		m_ram = subregion(RAMREGION)->base();
	118	m_ram = memregion(RAMREGION)->base();
119	119	}
120	120
121	121	void geneve_memex_device::device_reset()

src/mess/machine/ti99/mapper8.c

r14976	r14977
447	447	if (VERBOSE>5) LOG("ti99_8: Starting mapper\n");
448	448
449	449	const mapper8_list_entry *entry = reinterpret_cast<const mapper8_list_entry *>(static_config());
450		m_sram = machine().region(SRAM_TAG)->base();
451		m_dram = machine().region(DRAM_TAG)->base();
452		m_rom  = machine().region("maincpu")->base();
	450	m_sram = memregion(SRAM_TAG)->base();
	451	m_dram = memregion(DRAM_TAG)->base();
	452	m_rom  = memregion("maincpu")->base();
453	453
454	454	// Clear the lists
455	455	m_logcomp.reset();

src/mess/machine/ti99/bwg.c

r14976	r14977
383	383	void snug_bwg_device::device_start(void)
384	384	{
385	385	if (VERBOSE>5) LOG("bwg: BWG start\n");
386		m_dsrrom = subregion(DSRROM)->base();
387		m_buffer_ram = subregion(BUFFER)->base();
	386	m_dsrrom = memregion(DSRROM)->base();
	387	m_buffer_ram = memregion(BUFFER)->base();
388	388	m_motor_on_timer = timer_alloc(MOTOR_TIMER);
389	389	m_controller = subdevice(FDC_TAG);
390	390	m_clock = subdevice(CLOCK_TAG);

src/mess/machine/ti99/spchsyn.c

r14976	r14977
189	189
190	190	void ti_speech_synthesizer_device::device_reset()
191	191	{
192		m_speechrom = subregion(SPEECHROM_TAG)->base();
193		m_sprom_length = subregion(SPEECHROM_TAG)->bytes();
	192	m_speechrom = memregion(SPEECHROM_TAG)->base();
	193	m_sprom_length = memregion(SPEECHROM_TAG)->bytes();
194	194	m_sprom_address = 0;
195	195	m_load_pointer = 0;
196	196	m_rombits_count = 0;

src/mess/machine/ti99/horizon.c

r14976	r14977
331	331
332	332	void horizon_ramdisk_device::device_start(void)
333	333	{
334		m_nvram = subregion(NVRAMREGION)->base();
335		m_ram = subregion(RAMREGION)->base();
	334	m_nvram = memregion(NVRAMREGION)->base();
	335	m_ram = memregion(RAMREGION)->base();
336	336	m_ros = m_nvram + MAXRAM_SIZE - 8192;
337	337	m_cru_horizon = 0;
338	338	m_cru_phoenix = 0;

src/mess/machine/abc_fd2.c

r14976	r14977
220	220
221	221	if (offset >= 0x6000 && offset < 0x6400) // TODO is this mirrored?
222	222	{
223		data = subregion("abc80")->base()[offset & 0x3ff];
	223	data = memregion("abc80")->base()[offset & 0x3ff];
224	224	}
225	225
226	226	return data;

src/mess/machine/a2cffa.c

r14976	r14977
109	109	set_a2bus_device();
110	110
111	111	astring tempstring;
112		m_rom = device().machine().region(this->subtag(tempstring, CFFA2_ROM_REGION))->base();
	112	m_rom = device().machine().root_device().memregion(this->subtag(tempstring, CFFA2_ROM_REGION))->base();
113	113
114	114	// patch default setting so slave device is enabled
115	115	m_rom[0x801] = 4;

src/mess/machine/s100_dj2db.c

r14976	r14977
278	278	{
279	279	m_s100 = machine().device<s100_device>("s100");
280	280
281		m_rom = subregion("dj2db")->base();
	281	m_rom = memregion("dj2db")->base();
282	282	m_ram = auto_alloc_array(machine(), UINT8, 0x400);
283	283
284	284	// find floppy devices

src/mess/machine/gb.c

r14976	r14977
125	125
126	126	static void gb_rom16_0000( running_machine &machine, UINT8 *addr )
127	127	{
128		memory_set_bankptr( machine, "bank5", addr );
129		memory_set_bankptr( machine, "bank10", addr + 0x0100 );
130		memory_set_bankptr( machine, "bank6", addr + 0x0200 );
131		memory_set_bankptr( machine, "bank11", addr + 0x0900 );
	128	gb_state *state = machine.driver_data<gb_state>();
	129	state->membank( "bank5" )->set_base( addr );
	130	state->membank( "bank10" )->set_base( addr + 0x0100 );
	131	state->membank( "bank6" )->set_base( addr + 0x0200 );
	132	state->membank( "bank11" )->set_base( addr + 0x0900 );
132	133	}
133	134
134	135	static void gb_rom16_4000( running_machine &machine, UINT8 *addr )
135	136	{
136		memory_set_bankptr( machine, "bank1", addr );
137		memory_set_bankptr( machine, "bank4", addr + 0x2000 );
	137	gb_state *state = machine.driver_data<gb_state>();
	138	state->membank( "bank1" )->set_base( addr );
	139	state->membank( "bank4" )->set_base( addr + 0x2000 );
138	140	}
139	141
140	142	static void gb_rom8_4000( running_machine &machine, UINT8 *addr )
141	143	{
142		memory_set_bankptr( machine, "bank1", addr );
	144	gb_state *state = machine.driver_data<gb_state>();
	145	state->membank( "bank1" )->set_base( addr );
143	146	}
144	147
145	148	static void gb_rom8_6000( running_machine &machine, UINT8 *addr )
146	149	{
147		memory_set_bankptr( machine, "bank4", addr );
	150	gb_state *state = machine.driver_data<gb_state>();
	151	state->membank( "bank4" )->set_base( addr );
148	152	}
149	153
150	154	static void gb_init(running_machine &machine)
r14976	r14977
163	167	if ( state->m_MBCType != MBC_MEGADUCK )
164	168	{
165	169	gb_rom16_4000( machine, state->m_ROMMap[state->m_ROMBank] );
166		memory_set_bankptr (machine, "bank2", state->m_RAMMap[state->m_RAMBank] ? state->m_RAMMap[state->m_RAMBank] : state->m_gb_dummy_ram_bank);
	170	state->membank ("bank2")->set_base (state->m_RAMMap[state->m_RAMBank] ? state->m_RAMMap[state->m_RAMBank] : state->m_gb_dummy_ram_bank);
167	171	}
168	172	else
169	173	{
170		memory_set_bankptr( machine, "bank1", state->m_ROMMap[state->m_ROMBank] );
171		memory_set_bankptr( machine, "bank10", state->m_ROMMap[0] );
	174	state->membank( "bank1" )->set_base( state->m_ROMMap[state->m_ROMBank] );
	175	state->membank( "bank10" )->set_base( state->m_ROMMap[0] );
172	176	}
173	177	}
174	178
r14976	r14977
275	279	gb_rom16_0000( machine, state->m_ROMMap[state->m_ROMBank00] );
276	280
277	281	/* Enable BIOS rom */
278		memory_set_bankptr(machine, "bank5", machine.region("maincpu")->base() );
	282	state->membank("bank5")->set_base(state->memregion("maincpu")->base() );
279	283
280	284	state->m_divcount = 0x0004;
281	285	}
r14976	r14977
309	313	gb_rom16_0000( machine, state->m_ROMMap[state->m_ROMBank00] ? state->m_ROMMap[state->m_ROMBank00] : state->m_gb_dummy_rom_bank );
310	314
311	315	/* Enable BIOS rom */
312		memory_set_bankptr(machine, "bank5", machine.region("maincpu")->base() );
	316	state->membank("bank5")->set_base(state->memregion("maincpu")->base() );
313	317
314	318	memset( state->m_sgb_tile_data, 0, 0x2000 );
315	319
r14976	r14977
366	370	gb_rom16_0000( machine, state->m_ROMMap[state->m_ROMBank00] ? state->m_ROMMap[state->m_ROMBank00] : state->m_gb_dummy_rom_bank );
367	371
368	372	/* Enable BIOS rom */
369		memory_set_bankptr(machine, "bank5", machine.region("maincpu")->base() );
370		memory_set_bankptr(machine, "bank6", machine.region("maincpu")->base() + 0x100 );
	373	state->membank("bank5")->set_base(machine.root_device().memregion("maincpu")->base() );
	374	state->membank("bank6")->set_base(state->memregion("maincpu")->base() + 0x100 );
371	375
372	376	/* Allocate memory for internal ram */
373	377	for( ii = 0; ii < 8; ii++ )
r14976	r14977
395	399	{
396	400	gb_state *state = machine.driver_data<gb_state>();
397	401	gb_rom16_4000( machine, state->m_ROMMap[ state->m_ROMBank ] );
398		memory_set_bankptr( machine, "bank2", state->m_RAMMap[ state->m_MBC1Mode ? ( state->m_ROMBank >> 5 ) : 0 ] );
	402	state->membank( "bank2" )->set_base( state->m_RAMMap[ state->m_MBC1Mode ? ( state->m_ROMBank >> 5 ) : 0 ] );
399	403	}
400	404
401	405	WRITE8_MEMBER(gb_state::gb_rom_bank_select_mbc1)
r14976	r14977
527	531	logerror( "0x%04X: wisdom tree mapper write to address 0x%04X\n", cpu_get_pc( &space.device() ), offset );
528	532	/* The address determines the bank to select */
529	533	m_ROMBank = ( offset << 1 ) & 0x1FF;
530		memory_set_bankptr( machine(), "bank5", m_ROMMap[ m_ROMBank ] );
531		memory_set_bankptr( machine(), "bank10", m_ROMMap[ m_ROMBank ] + 0x0100 );
	534	membank( "bank5" )->set_base( m_ROMMap[ m_ROMBank ] );
	535	membank( "bank10" )->set_base( m_ROMMap[ m_ROMBank ] + 0x0100 );
532	536	gb_rom16_4000( machine(), m_ROMMap[ m_ROMBank + 1 ] );
533	537	}
534	538
r14976	r14977
554	558	if ( data < 5 )
555	559	{
556	560	memset( m_MBC3RTCData, m_MBC3RTCMap[m_MBC3RTCBank], 0x2000 );
557		memory_set_bankptr( machine(), "bank2", m_MBC3RTCData );
	561	membank( "bank2" )->set_base( m_MBC3RTCData );
558	562	}
559	563	}
560	564	}
r14976	r14977
563	567	m_RAMBank = data & 0x3;
564	568	m_MBC3RTCBank = 0xFF;
565	569	/* Switch banks */
566		memory_set_bankptr( machine(), "bank2", m_RAMMap[m_RAMBank] );
	570	membank( "bank2" )->set_base( m_RAMMap[m_RAMBank] );
567	571	}
568	572	}
569	573
r14976	r14977
577	581	}
578	582	m_RAMBank = data;
579	583	/* Switch banks */
580		memory_set_bankptr (machine(), "bank2", m_RAMMap[m_RAMBank] );
	584	membank ("bank2")->set_base (m_RAMMap[m_RAMBank] );
581	585	}
582	586
583	587	WRITE8_MEMBER(gb_state::gb_ram_enable)
r14976	r14977
671	675	break;
672	676	case 0x0A:      /* Are we ready for the next command? */
673	677	m_MBC3RTCData[0] = 0x01;
674		memory_set_bankptr( machine(), "bank2", m_MBC3RTCData );
	678	membank( "bank2" )->set_base( m_MBC3RTCData );
675	679	break;
676	680	case 0x0C:      /* Data read register lo */
677	681	m_MBC3RTCData[0] = m_gbTama5Byte & 0x0F;
r14976	r14977
697	701	if ( data & 0x40 )
698	702	{
699	703	m_mmm01_bank_offset = m_mmm01_reg1;
700		memory_set_bankptr( machine(), "bank5", m_ROMMap[ m_mmm01_bank_offset ] );
701		memory_set_bankptr( machine(), "bank10", m_ROMMap[ m_mmm01_bank_offset ] + 0x0100 );
	704	membank( "bank5" )->set_base( m_ROMMap[ m_mmm01_bank_offset ] );
	705	membank( "bank10" )->set_base( m_ROMMap[ m_mmm01_bank_offset ] + 0x0100 );
702	706	gb_rom16_4000( machine(), m_ROMMap[ m_mmm01_bank_offset + m_mmm01_bank ] );
703	707	}
704	708	}
r14976	r14977
744	748	gb_rom16_0000( machine, state->m_ROMMap[ state->m_ROMBank & 0x30 ] );
745	749	}
746	750	gb_rom16_4000( machine, state->m_ROMMap[ state->m_ROMBank ] );
747		memory_set_bankptr( machine, "bank2", state->m_RAMMap[ state->m_MBC1Mode ? ( state->m_ROMBank >> 5 ) : 0 ] );
	751	state->membank( "bank2" )->set_base( state->m_RAMMap[ state->m_MBC1Mode ? ( state->m_ROMBank >> 5 ) : 0 ] );
748	752	}
749	753
750	754	WRITE8_MEMBER(gb_state::gb_rom_bank_select_mbc1_kor)
r14976	r14977
1987	1991	m_GBC_RAMBank = data & 0x7;
1988	1992	if ( ! m_GBC_RAMBank )
1989	1993	m_GBC_RAMBank = 1;
1990		memory_set_bankptr (machine(), "bank3", m_GBC_RAMMap[m_GBC_RAMBank]);
	1994	membank ("bank3")->set_base (m_GBC_RAMMap[m_GBC_RAMBank]);
1991	1995	break;
1992	1996	default:
1993	1997	break;
r14976	r14977
2148	2152	m_ROMBank = data & m_ROMMask;
2149	2153
2150	2154	/* Switch banks */
2151		memory_set_bankptr (machine(), "bank1", m_ROMMap[m_ROMBank]);
	2155	membank ("bank1")->set_base (m_ROMMap[m_ROMBank]);
2152	2156	}
2153	2157	}
2154	2158
r14976	r14977
2159	2163	m_ROMBank = (data << 1) & m_ROMMask;
2160	2164
2161	2165	/* Switch banks */
2162		memory_set_bankptr( machine(), "bank10", m_ROMMap[m_ROMBank]);
2163		memory_set_bankptr( machine(), "bank1", m_ROMMap[m_ROMBank + 1]);
	2166	membank( "bank10" )->set_base( m_ROMMap[m_ROMBank]);
	2167	membank( "bank1" )->set_base( m_ROMMap[m_ROMBank + 1]);
2164	2168	}
2165	2169	}
2166	2170

src/mess/machine/radio86.c

r14976	r14977
27	27	/* Driver initialization */
28	28	DRIVER_INIT(radio86)
29	29	{
	30	radio86_state *state = machine.driver_data<radio86_state>();
30	31	/* set initialy ROM to be visible on first bank */
31		UINT8 *RAM = machine.region("maincpu")->base();
	32	UINT8 *RAM = state->memregion("maincpu")->base();
32	33	memset(RAM,0x0000,0x1000); // make frist page empty by default
33		memory_configure_bank(machine, "bank1", 1, 2, RAM, 0x0000);
34		memory_configure_bank(machine, "bank1", 0, 2, RAM, 0xf800);
	34	state->membank("bank1")->configure_entries(1, 2, RAM, 0x0000);
	35	state->membank("bank1")->configure_entries(0, 2, RAM, 0xf800);
35	36	radio86_init_keyboard(machine);
36	37	}
37	38
r14976	r14977
157	158
158	159	static TIMER_CALLBACK( radio86_reset )
159	160	{
160		memory_set_bank(machine, "bank1", 0);
	161	radio86_state *state = machine.driver_data<radio86_state>();
	162	state->membank("bank1")->set_entry(0);
161	163	}
162	164
163	165
r14976	r14977
180	182	{
181	183	radio86_state *state = machine.driver_data<radio86_state>();
182	184	machine.scheduler().timer_set(attotime::from_usec(10), FUNC(radio86_reset));
183		memory_set_bank(machine, "bank1", 1);
	185	state->membank("bank1")->set_entry(1);
184	186
185	187	state->m_keyboard_mask = 0;
186	188	state->m_disk_sel = 0;
r14976	r14977
195	197	static READ8_DEVICE_HANDLER (radio86_romdisk_porta_r )
196	198	{
197	199	radio86_state *state = device->machine().driver_data<radio86_state>();
198		UINT8 *romdisk = device->machine().region("maincpu")->base() + 0x10000;
	200	UINT8 *romdisk = state->memregion("maincpu")->base() + 0x10000;
199	201	if ((state->m_disk_sel & 0x0f) ==0) {
200	202	return romdisk[state->m_romdisk_msb*256+state->m_romdisk_lsb];
201	203	} else {

src/mess/machine/advision.c

r14976	r14977
28	28	void advision_state::machine_start()
29	29	{
30	30	/* configure EA banking */
31		memory_configure_bank(machine(), "bank1", 0, 1, machine().region("bios")->base(), 0);
32		memory_configure_bank(machine(), "bank1", 1, 1, machine().region(I8048_TAG)->base(), 0);
	31	membank("bank1")->configure_entry(0, memregion("bios")->base());
	32	membank("bank1")->configure_entry(1, memregion(I8048_TAG)->base());
33	33	m_maincpu->memory().space(AS_PROGRAM)->install_readwrite_bank(0x0000, 0x03ff, "bank1");
34		memory_set_bank(machine(), "bank1", 0);
	34	membank("bank1")->set_entry(0);
35	35
36	36	/* allocate external RAM */
37	37	m_ext_ram = auto_alloc_array(machine(), UINT8, 0x400);
r14976	r14977
41	41	{
42	42	/* enable internal ROM */
43	43	device_set_input_line(m_maincpu, MCS48_INPUT_EA, CLEAR_LINE);
44		memory_set_bank(machine(), "bank1", 0);
	44	membank("bank1")->set_entry(0);
45	45
46	46	/* reset sound CPU */
47	47	device_set_input_line(m_soundcpu, INPUT_LINE_RESET, ASSERT_LINE);
r14976	r14977
60	60
61	61	device_set_input_line(m_maincpu, MCS48_INPUT_EA, ea ? ASSERT_LINE : CLEAR_LINE);
62	62
63		memory_set_bank(machine(), "bank1", ea);
	63	membank("bank1")->set_entry(ea);
64	64
65	65	m_rambank = (data & 0x03) << 8;
66	66	}

src/mess/machine/b2m.c

r14976	r14977
53	53	space->install_write_bank(0x7000, 0xdfff, "bank4");
54	54	space->install_write_bank(0xe000, 0xffff, "bank5");
55	55
56		rom = machine.region("maincpu")->base();
	56	rom = state->memregion("maincpu")->base();
57	57	switch(bank) {
58	58	case 0 :
59	59	case 1 :
60	60	space->unmap_write(0xe000, 0xffff);
61	61
62		memory_set_bankptr(machine, "bank1", ram);
63		memory_set_bankptr(machine, "bank2", ram + 0x2800);
64		memory_set_bankptr(machine, "bank3", ram + 0x3000);
65		memory_set_bankptr(machine, "bank4", ram + 0x7000);
66		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	62	state->membank("bank1")->set_base(ram);
	63	state->membank("bank2")->set_base(ram + 0x2800);
	64	state->membank("bank3")->set_base(ram + 0x3000);
	65	state->membank("bank4")->set_base(ram + 0x7000);
	66	state->membank("bank5")->set_base(rom + 0x10000);
67	67	break;
68	68	#if 0
69	69	case 1 :
70	70	space->unmap_write(0x3000, 0x6fff);
71	71	space->unmap_write(0xe000, 0xffff);
72	72
73		memory_set_bankptr(machine, "bank1", ram);
74		memory_set_bankptr(machine, "bank2", ram + 0x2800);
75		memory_set_bankptr(machine, "bank3", rom + 0x12000);
76		memory_set_bankptr(machine, "bank4", rom + 0x16000);
77		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	73	state->membank("bank1")->set_base(ram);
	74	state->membank("bank2")->set_base(ram + 0x2800);
	75	state->membank("bank3")->set_base(rom + 0x12000);
	76	state->membank("bank4")->set_base(rom + 0x16000);
	77	state->membank("bank5")->set_base(rom + 0x10000);
78	78	break;
79	79	#endif
80	80	case 2 :
81	81	space->unmap_write(0x2800, 0x2fff);
82	82	space->unmap_write(0xe000, 0xffff);
83	83
84		memory_set_bankptr(machine, "bank1", ram);
	84	state->membank("bank1")->set_base(ram);
85	85	space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
86		memory_set_bankptr(machine, "bank3", ram + 0x10000);
87		memory_set_bankptr(machine, "bank4", ram + 0x7000);
88		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	86	state->membank("bank3")->set_base(ram + 0x10000);
	87	state->membank("bank4")->set_base(ram + 0x7000);
	88	state->membank("bank5")->set_base(rom + 0x10000);
89	89	break;
90	90	case 3 :
91	91	space->unmap_write(0x2800, 0x2fff);
92	92	space->unmap_write(0xe000, 0xffff);
93	93
94		memory_set_bankptr(machine, "bank1", ram);
	94	state->membank("bank1")->set_base(ram);
95	95	space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
96		memory_set_bankptr(machine, "bank3", ram + 0x14000);
97		memory_set_bankptr(machine, "bank4", ram + 0x7000);
98		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	96	state->membank("bank3")->set_base(ram + 0x14000);
	97	state->membank("bank4")->set_base(ram + 0x7000);
	98	state->membank("bank5")->set_base(rom + 0x10000);
99	99	break;
100	100	case 4 :
101	101	space->unmap_write(0x2800, 0x2fff);
102	102	space->unmap_write(0xe000, 0xffff);
103	103
104		memory_set_bankptr(machine, "bank1", ram);
	104	state->membank("bank1")->set_base(ram);
105	105	space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
106		memory_set_bankptr(machine, "bank3", ram + 0x18000);
107		memory_set_bankptr(machine, "bank4", ram + 0x7000);
108		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	106	state->membank("bank3")->set_base(ram + 0x18000);
	107	state->membank("bank4")->set_base(ram + 0x7000);
	108	state->membank("bank5")->set_base(rom + 0x10000);
109	109
110	110	break;
111	111	case 5 :
112	112	space->unmap_write(0x2800, 0x2fff);
113	113	space->unmap_write(0xe000, 0xffff);
114	114
115		memory_set_bankptr(machine, "bank1", ram);
	115	state->membank("bank1")->set_base(ram);
116	116	space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
117		memory_set_bankptr(machine, "bank3", ram + 0x1c000);
118		memory_set_bankptr(machine, "bank4", ram + 0x7000);
119		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	117	state->membank("bank3")->set_base(ram + 0x1c000);
	118	state->membank("bank4")->set_base(ram + 0x7000);
	119	state->membank("bank5")->set_base(rom + 0x10000);
120	120
121	121	break;
122	122	case 6 :
123		memory_set_bankptr(machine, "bank1", ram);
124		memory_set_bankptr(machine, "bank2", ram + 0x2800);
125		memory_set_bankptr(machine, "bank3", ram + 0x3000);
126		memory_set_bankptr(machine, "bank4", ram + 0x7000);
127		memory_set_bankptr(machine, "bank5", ram + 0xe000);
	123	state->membank("bank1")->set_base(ram);
	124	state->membank("bank2")->set_base(ram + 0x2800);
	125	state->membank("bank3")->set_base(ram + 0x3000);
	126	state->membank("bank4")->set_base(ram + 0x7000);
	127	state->membank("bank5")->set_base(ram + 0xe000);
128	128	break;
129	129	case 7 :
130	130	space->unmap_write(0x0000, 0x27ff);
r14976	r14977
133	133	space->unmap_write(0x7000, 0xdfff);
134	134	space->unmap_write(0xe000, 0xffff);
135	135
136		memory_set_bankptr(machine, "bank1", rom + 0x10000);
137		memory_set_bankptr(machine, "bank2", rom + 0x10000);
138		memory_set_bankptr(machine, "bank3", rom + 0x10000);
139		memory_set_bankptr(machine, "bank4", rom + 0x10000);
140		memory_set_bankptr(machine, "bank5", rom + 0x10000);
	136	state->membank("bank1")->set_base(rom + 0x10000);
	137	state->membank("bank2")->set_base(rom + 0x10000);
	138	state->membank("bank3")->set_base(rom + 0x10000);
	139	state->membank("bank4")->set_base(rom + 0x10000);
	140	state->membank("bank5")->set_base(rom + 0x10000);
141	141	break;
142	142	}
143	143	}
r14976	r14977
245	245	{
246	246	b2m_state *state = device->machine().driver_data<b2m_state>();
247	247
248		UINT8 *romdisk = device->machine().region("maincpu")->base() + 0x12000;
	248	UINT8 *romdisk = state->memregion("maincpu")->base() + 0x12000;
249	249	return romdisk[state->m_b2m_romdisk_msb*256+state->m_b2m_romdisk_lsb];
250	250	}
251	251

src/mess/machine/thomson.c

r14976	r14977
401	401	DEVICE_IMAGE_LOAD( to7_cartridge )
402	402	{
403	403	int i,j;
404		UINT8* pos = image.device().machine().region("maincpu" )->base() + 0x10000;
	404	UINT8* pos = image.device().machine().root_device().memregion("maincpu" )->base() + 0x10000;
405	405	offs_t size = image.length();
406	406	char name[129];
407	407
r14976	r14977
457	457	if ( bank != old_cart_bank )
458	458	LOG_BANK(( "to7_update_cart_bank: CART is cartridge bank %i\n", bank ));
459	459
460		memory_set_bank( machine, THOM_CART_BANK, bank );
	460	machine.root_device().membank( THOM_CART_BANK )->set_entry( bank );
461	461	old_cart_bank = bank;
462	462	}
463	463
r14976	r14977
485	485	/* read signal to 0000-0003 generates a bank switch */
486	486	READ8_HANDLER ( to7_cartridge_r )
487	487	{
488		UINT8* pos = space->machine().region( "maincpu" )->base() + 0x10000;
	488	UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
489	489	UINT8 data = pos[offset + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
490	490	thom_cart_bank = offset & 3;
491	491	to7_update_cart_bank(space->machine());
r14976	r14977
1473	1473	MACHINE_START ( to7 )
1474	1474	{
1475	1475	address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1476		UINT8* mem = machine.region("maincpu")->base();
	1476	UINT8* mem = machine.root_device().memregion("maincpu")->base();
1477	1477	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
1478	1478
1479	1479	LOG (( "to7: machine start called\n" ));
r14976	r14977
1488	1488	/* memory */
1489	1489	thom_cart_bank = 0;
1490	1490	thom_vram = ram;
1491		memory_configure_bank( machine, THOM_BASE_BANK, 0, 1, ram + 0x4000, 0x2000 );
1492		memory_configure_bank( machine, THOM_VRAM_BANK, 0, 2, thom_vram, 0x2000 );
1493		memory_configure_bank( machine, THOM_CART_BANK, 0, 4, mem + 0x10000, 0x4000 );
1494		memory_set_bank( machine, THOM_BASE_BANK, 0 );
1495		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
1496		memory_set_bank( machine, THOM_CART_BANK, 0 );
	1491	machine.root_device().membank( THOM_BASE_BANK )->configure_entry( 0, ram + 0x4000);
	1492	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0, 2, thom_vram, 0x2000 );
	1493	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0, 4, mem + 0x10000, 0x4000 );
	1494	machine.root_device().membank( THOM_BASE_BANK )->set_entry( 0 );
	1495	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	1496	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
1497	1497
1498	1498	if ( machine.device<ram_device>(RAM_TAG)->size() > 24*1024 )
1499	1499	{
r14976	r14977
1502	1502	int extram = machine.device<ram_device>(RAM_TAG)->size() - 24*1024;
1503	1503	space->install_write_bank(0x8000, 0x8000 + extram - 1, THOM_RAM_BANK);
1504	1504	space->install_read_bank(0x8000, 0x8000 + extram - 1, THOM_RAM_BANK );
1505		memory_configure_bank( machine, THOM_RAM_BANK,  0, 1, ram + 0x6000, extram );
1506		memory_set_bank( machine, THOM_RAM_BANK, 0 );
	1505	machine.root_device().membank( THOM_RAM_BANK )->configure_entry( 0, ram + 0x6000);
	1506	machine.root_device().membank( THOM_RAM_BANK )->set_entry( 0 );
1507	1507	}
1508	1508
1509	1509	/* force 2 topmost color bits to 1 */
r14976	r14977
1582	1582
1583	1583	if ( machine.device<ram_device>(RAM_TAG)->size() == 128*1024 || bank < 2 )
1584	1584	{
1585		memory_set_bank( machine, THOM_RAM_BANK, bank );
	1585	machine.root_device().membank( THOM_RAM_BANK )->set_entry( bank );
1586	1586	space->install_write_bank(0xa000, 0xdfff, THOM_RAM_BANK);
1587	1587	}
1588	1588	else
r14976	r14977
1729	1729
1730	1730	MACHINE_START ( to770 )
1731	1731	{
1732		UINT8* mem = machine.region("maincpu")->base();
	1732	UINT8* mem = machine.root_device().memregion("maincpu")->base();
1733	1733	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
1734	1734
1735	1735	LOG (( "to770: machine start called\n" ));
r14976	r14977
1744	1744	/* memory */
1745	1745	thom_cart_bank = 0;
1746	1746	thom_vram = ram;
1747		memory_configure_bank( machine, THOM_BASE_BANK, 0, 1, ram + 0x4000, 0x4000 );
1748		memory_configure_bank( machine, THOM_RAM_BANK,  0, 6, ram + 0x8000, 0x4000 );
1749		memory_configure_bank( machine, THOM_VRAM_BANK, 0, 2, thom_vram, 0x2000 );
1750		memory_configure_bank( machine, THOM_CART_BANK, 0, 4, mem + 0x10000, 0x4000 );
1751		memory_set_bank( machine, THOM_BASE_BANK, 0 );
1752		memory_set_bank( machine, THOM_RAM_BANK,  0 );
1753		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
1754		memory_set_bank( machine, THOM_CART_BANK, 0 );
	1747	machine.root_device().membank( THOM_BASE_BANK )->configure_entry( 0, ram + 0x4000);
	1748	machine.root_device().membank( THOM_RAM_BANK )->configure_entries( 0, 6, ram + 0x8000, 0x4000 );
	1749	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0, 2, thom_vram, 0x2000 );
	1750	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0, 4, mem + 0x10000, 0x4000 );
	1751	machine.root_device().membank( THOM_BASE_BANK )->set_entry( 0 );
	1752	machine.root_device().membank( THOM_RAM_BANK )->set_entry( 0 );
	1753	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	1754	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
1755	1755
1756	1756	/* save-state */
1757	1757	state_save_register_global( machine, thom_cart_nb_banks );
r14976	r14977
1930	1930
1931	1931	DEVICE_IMAGE_LOAD( mo5_cartridge )
1932	1932	{
1933		UINT8* pos = image.device().machine().region("maincpu")->base() + 0x10000;
	1933	UINT8* pos = image.device().machine().root_device().memregion("maincpu")->base() + 0x10000;
1934	1934	UINT64 size = image.length();
1935	1935	int i,j;
1936	1936	char name[129];
r14976	r14977
2015	2015	if ( bank != old_cart_bank )
2016	2016	LOG_BANK(( "mo5_update_cart_bank: CART is internal / cartridge bank %i\n", thom_cart_bank ));
2017	2017	}
2018		memory_set_bank( machine, THOM_CART_BANK, bank );
	2018	machine.root_device().membank( THOM_CART_BANK )->set_entry( bank );
2019	2019	old_cart_bank = bank;
2020	2020	}
2021	2021
r14976	r14977
2043	2043	/* read signal to bffc-bfff generates a bank switch */
2044	2044	READ8_HANDLER ( mo5_cartridge_r )
2045	2045	{
2046		UINT8* pos = space->machine().region( "maincpu" )->base() + 0x10000;
	2046	UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
2047	2047	UINT8 data = pos[offset + 0xbffc + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
2048	2048	thom_cart_bank = offset & 3;
2049	2049	mo5_update_cart_bank(space->machine());
r14976	r14977
2101	2101
2102	2102	MACHINE_START ( mo5 )
2103	2103	{
2104		UINT8* mem = machine.region("maincpu")->base();
	2104	UINT8* mem = machine.root_device().memregion("maincpu")->base();
2105	2105	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
2106	2106
2107	2107	LOG (( "mo5: machine start called\n" ));
r14976	r14977
2118	2118	thom_cart_bank = 0;
2119	2119	mo5_reg_cart = 0;
2120	2120	thom_vram = ram;
2121		memory_configure_bank( machine, THOM_BASE_BANK, 0, 1, ram + 0x4000, 0x8000 );
2122		memory_configure_bank( machine, THOM_CART_BANK, 0, 4, mem + 0x10000, 0x4000 );
2123		memory_configure_bank( machine, THOM_CART_BANK, 4, 4, ram + 0xc000, 0x4000 );
2124		memory_configure_bank( machine, THOM_VRAM_BANK, 0, 2, thom_vram, 0x2000 );
2125		memory_set_bank( machine, THOM_BASE_BANK, 0 );
2126		memory_set_bank( machine, THOM_CART_BANK, 0 );
2127		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
	2121	machine.root_device().membank( THOM_BASE_BANK )->configure_entry( 0, ram + 0x4000);
	2122	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0, 4, mem + 0x10000, 0x4000 );
	2123	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 4, 4, ram + 0xc000, 0x4000 );
	2124	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0, 2, thom_vram, 0x2000 );
	2125	machine.root_device().membank( THOM_BASE_BANK )->set_entry( 0 );
	2126	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
	2127	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
2128	2128
2129	2129	/* save-state */
2130	2130	state_save_register_global( machine, thom_cart_nb_banks );
r14976	r14977
2379	2379	break;
2380	2380	}
2381	2381
2382		memory_set_bank( machine, THOM_CART_BANK, bank );
	2382	machine.root_device().membank( THOM_CART_BANK )->set_entry( bank );
2383	2383	old_cart_bank = bank;
2384	2384	}
2385	2385
r14976	r14977
2412	2412	/* read signal to 0000-0003 generates a bank switch */
2413	2413	READ8_HANDLER ( to9_cartridge_r )
2414	2414	{
2415		UINT8* pos = space->machine().region( "maincpu" )->base() + 0x10000;
	2415	UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
2416	2416	UINT8 data = pos[offset + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
2417	2417	thom_cart_bank = offset & 3;
2418	2418	to9_update_cart_bank(space->machine());
r14976	r14977
2456	2456
2457	2457	if ( machine.device<ram_device>(RAM_TAG)->size() == 192*1024 || bank < 6 )
2458	2458	{
2459		memory_set_bank( machine, THOM_RAM_BANK, bank );
	2459	machine.root_device().membank( THOM_RAM_BANK )->set_entry( bank );
2460	2460	space->install_write_bank( 0xa000, 0xdfff, THOM_RAM_BANK);
2461	2461	}
2462	2462	else
r14976	r14977
3065	3065
3066	3066	MACHINE_START ( to9 )
3067	3067	{
3068		UINT8* mem = machine.region("maincpu")->base();
	3068	UINT8* mem = machine.root_device().memregion("maincpu")->base();
3069	3069	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
3070	3070
3071	3071	LOG (( "to9: machine start called\n" ));
r14976	r14977
3082	3082	/* memory */
3083	3083	thom_vram = ram;
3084	3084	thom_cart_bank = 0;
3085		memory_configure_bank( machine, THOM_VRAM_BANK, 0,  2, thom_vram, 0x2000 );
3086		memory_configure_bank( machine, THOM_CART_BANK, 0, 12, mem + 0x10000, 0x4000 );
3087		memory_configure_bank( machine, THOM_BASE_BANK, 0,  1, ram + 0x4000, 0x4000 );
3088		memory_configure_bank( machine, THOM_RAM_BANK,  0, 10, ram + 0x8000, 0x4000 );
3089		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
3090		memory_set_bank( machine, THOM_CART_BANK, 0 );
3091		memory_set_bank( machine, THOM_BASE_BANK, 0 );
3092		memory_set_bank( machine, THOM_RAM_BANK,  0 );
	3085	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0,  2, thom_vram, 0x2000 );
	3086	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0, 12, mem + 0x10000, 0x4000 );
	3087	machine.root_device().membank( THOM_BASE_BANK )->configure_entry( 0,  ram + 0x4000);
	3088	machine.root_device().membank( THOM_RAM_BANK )->configure_entries( 0, 10, ram + 0x8000, 0x4000 );
	3089	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	3090	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
	3091	machine.root_device().membank( THOM_BASE_BANK )->set_entry( 0 );
	3092	machine.root_device().membank( THOM_RAM_BANK )->set_entry( 0 );
3093	3093
3094	3094	/* save-state */
3095	3095	state_save_register_global( machine, thom_cart_nb_banks );
r14976	r14977
3467	3467	LOG_BANK(( "to8_update_floppy_bank: floppy ROM is %s bank %i\n",
3468	3468	(to8_reg_sys1 & 0x80) ? "external" : "internal",
3469	3469	bank % TO7_NB_FLOP_BANK ));
3470		memory_set_bank( machine, THOM_FLOP_BANK, bank );
	3470	machine.root_device().membank( THOM_FLOP_BANK )->set_entry( bank );
3471	3471	old_floppy_bank = bank;
3472	3472	}
3473	3473
r14976	r14977
3524	3524	to8_data_vpage = bank;
3525	3525	if ( machine.device<ram_device>(RAM_TAG)->size() == 512*1024 || to8_data_vpage < 16 )
3526	3526	{
3527		memory_set_bank( machine, TO8_DATA_LO, to8_data_vpage );
3528		memory_set_bank( machine, TO8_DATA_HI, to8_data_vpage );
	3527	machine.root_device().membank( TO8_DATA_LO )->set_entry( to8_data_vpage );
	3528	machine.root_device().membank( TO8_DATA_HI )->set_entry( to8_data_vpage );
3529	3529
3530	3530	if (to8_data_vpage <= 4) {
3531	3531	space->install_legacy_write_handler( 0xa000, 0xbfff, FUNC(to8_data_lo_w));
r14976	r14977
3604	3604
3605	3605	if ( machine.device<ram_device>(RAM_TAG)->size() == 512*1024 || bank < 16 )
3606	3606	{
3607		memory_set_bank( machine, THOM_CART_BANK, bank );
	3607	machine.root_device().membank( THOM_CART_BANK )->set_entry( bank );
3608	3608	}
3609	3609
3610	3610	old_cart_bank = bank;
r14976	r14977
3638	3638	/* read signal to 0000-0003 generates a bank switch */
3639	3639	READ8_HANDLER ( to8_cartridge_r )
3640	3640	{
3641		UINT8* pos = space->machine().region( "maincpu" )->base() + 0x10000;
	3641	UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
3642	3642	UINT8 data = pos[offset + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
3643	3643	thom_cart_bank = offset & 3;
3644	3644	to8_update_cart_bank(space->machine());
r14976	r14977
3652	3652
3653	3653	static void to8_floppy_init( running_machine &machine )
3654	3654	{
3655		UINT8* mem = machine.region("maincpu")->base();
	3655	UINT8* mem = machine.root_device().memregion("maincpu")->base();
3656	3656	to7_floppy_init( machine, mem + 0x34000 );
3657	3657	}
3658	3658
r14976	r14977
3660	3660
3661	3661	static void to8_floppy_reset( running_machine &machine )
3662	3662	{
3663		UINT8* mem = machine.region("maincpu")->base();
	3663	UINT8* mem = machine.root_device().memregion("maincpu")->base();
3664	3664	to7_floppy_reset(machine);
3665	3665	if ( THOM_FLOPPY_INT )
3666	3666	thmfc_floppy_reset(machine);
3667		memory_configure_bank( machine, THOM_FLOP_BANK, TO7_NB_FLOP_BANK, 2, mem + 0x30000, 0x2000 );
	3667	machine.root_device().membank( THOM_FLOP_BANK )->configure_entries( TO7_NB_FLOP_BANK, 2, mem + 0x30000, 0x2000 );
3668	3668	}
3669	3669
3670	3670
r14976	r14977
3962	3962	int ack = (data & 0x20) ? 1 : 0;       /* bit 5: keyboard ACK */
3963	3963	to8_bios_bank = (data & 0x10) ? 1 : 0; /* bit 4: BIOS bank*/
3964	3964	thom_set_mode_point( device->machine(), data & 1 );       /* bit 0: video bank switch */
3965		memory_set_bank( device->machine(), TO8_BIOS_BANK, to8_bios_bank );
	3965	device->machine().root_device().membank( TO8_BIOS_BANK )->set_entry( to8_bios_bank );
3966	3966	to8_soft_select = (data & 0x04) ? 1 : 0; /* bit 2: internal ROM select */
3967	3967	to8_update_floppy_bank(device->machine());
3968	3968	to8_update_cart_bank(device->machine());
r14976	r14977
4051	4051	to8_update_ram_bank(machine);
4052	4052	to8_update_cart_bank(machine);
4053	4053	to8_update_floppy_bank(machine);
4054		memory_set_bank( machine, TO8_BIOS_BANK, 0 );
	4054	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( 0 );
4055	4055	/* thom_cart_bank not reset */
4056	4056	}
4057	4057
r14976	r14977
4059	4059
4060	4060	MACHINE_START ( to8 )
4061	4061	{
4062		UINT8* mem = machine.region("maincpu")->base();
	4062	UINT8* mem = machine.root_device().memregion("maincpu")->base();
4063	4063	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
4064	4064
4065	4065	LOG (( "to8: machine start called\n" ));
r14976	r14977
4076	4076	/* memory */
4077	4077	thom_cart_bank = 0;
4078	4078	thom_vram = ram;
4079		memory_configure_bank( machine, THOM_CART_BANK, 0,  8, mem + 0x10000, 0x4000 );
4080		memory_configure_bank( machine, THOM_CART_BANK, 8, 32, ram, 0x4000 );
4081		memory_configure_bank( machine, THOM_VRAM_BANK, 0,  2, ram, 0x2000 );
4082		memory_configure_bank( machine, TO8_SYS_LO,     0,  1, ram + 0x6000, 0x4000 );
4083		memory_configure_bank( machine, TO8_SYS_HI,     0,  1, ram + 0x4000, 0x4000 );
4084		memory_configure_bank( machine, TO8_DATA_LO,    0, 32, ram + 0x2000, 0x4000 );
4085		memory_configure_bank( machine, TO8_DATA_HI,    0, 32, ram + 0x0000, 0x4000 );
4086		memory_configure_bank( machine, TO8_BIOS_BANK,  0,  2, mem + 0x30800, 0x2000 );
4087		memory_set_bank( machine, THOM_CART_BANK, 0 );
4088		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
4089		memory_set_bank( machine, TO8_SYS_LO,  0 );
4090		memory_set_bank( machine, TO8_SYS_HI,  0 );
4091		memory_set_bank( machine, TO8_DATA_LO, 0 );
4092		memory_set_bank( machine, TO8_DATA_HI, 0 );
4093		memory_set_bank( machine, TO8_BIOS_BANK, 0 );
	4079	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0,  8, mem + 0x10000, 0x4000 );
	4080	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 8, 32, ram, 0x4000 );
	4081	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0,  2, ram, 0x2000 );
	4082	machine.root_device().membank( TO8_SYS_LO )->configure_entry( 0,  ram + 0x6000);
	4083	machine.root_device().membank( TO8_SYS_HI )->configure_entry( 0,  ram + 0x4000);
	4084	machine.root_device().membank( TO8_DATA_LO )->configure_entries( 0, 32, ram + 0x2000, 0x4000 );
	4085	machine.root_device().membank( TO8_DATA_HI )->configure_entries( 0, 32, ram + 0x0000, 0x4000 );
	4086	machine.root_device().membank( TO8_BIOS_BANK )->configure_entries( 0,  2, mem + 0x30800, 0x2000 );
	4087	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
	4088	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	4089	machine.root_device().membank( TO8_SYS_LO )->set_entry( 0 );
	4090	machine.root_device().membank( TO8_SYS_HI )->set_entry( 0 );
	4091	machine.root_device().membank( TO8_DATA_LO )->set_entry( 0 );
	4092	machine.root_device().membank( TO8_DATA_HI )->set_entry( 0 );
	4093	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( 0 );
4094	4094
4095	4095	/* save-state */
4096	4096	state_save_register_global( machine, thom_cart_nb_banks );
r14976	r14977
4160	4160	{
4161	4161	int bios_bank = (data & 0x10) ? 1 : 0; /* bit 4: BIOS bank */
4162	4162	thom_set_mode_point( device->machine(), data & 1 );       /* bit 0: video bank switch */
4163		memory_set_bank( device->machine(), TO8_BIOS_BANK, bios_bank );
	4163	device->machine().root_device().membank( TO8_BIOS_BANK )->set_entry( bios_bank );
4164	4164	to8_soft_select = (data & 0x04) ? 1 : 0; /* bit 2: internal ROM select */
4165	4165	to8_update_floppy_bank(device->machine());
4166	4166	to8_update_cart_bank(device->machine());
r14976	r14977
4222	4222	to8_update_ram_bank(machine);
4223	4223	to8_update_cart_bank(machine);
4224	4224	to8_update_floppy_bank(machine);
4225		memory_set_bank( machine, TO8_BIOS_BANK, 0 );
	4225	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( 0 );
4226	4226	/* thom_cart_bank not reset */
4227	4227	}
4228	4228
r14976	r14977
4230	4230
4231	4231	MACHINE_START ( to9p )
4232	4232	{
4233		UINT8* mem = machine.region("maincpu")->base();
	4233	UINT8* mem = machine.root_device().memregion("maincpu")->base();
4234	4234	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
4235	4235
4236	4236	LOG (( "to9p: machine start called\n" ));
r14976	r14977
4247	4247	/* memory */
4248	4248	thom_cart_bank = 0;
4249	4249	thom_vram = ram;
4250		memory_configure_bank( machine, THOM_CART_BANK, 0,  8, mem + 0x10000, 0x4000 );
4251		memory_configure_bank( machine, THOM_CART_BANK, 8, 32, ram, 0x4000 );
4252		memory_configure_bank( machine, THOM_VRAM_BANK, 0,  2, ram, 0x2000 );
4253		memory_configure_bank( machine, TO8_SYS_LO,     0,  1, ram + 0x6000, 0x4000 );
4254		memory_configure_bank( machine, TO8_SYS_HI,     0,  1, ram + 0x4000, 0x4000 );
4255		memory_configure_bank( machine, TO8_DATA_LO,    0, 32, ram + 0x2000, 0x4000 );
4256		memory_configure_bank( machine, TO8_DATA_HI,    0, 32, ram + 0x0000, 0x4000 );
4257		memory_configure_bank( machine, TO8_BIOS_BANK,  0,  2, mem + 0x30800, 0x2000 );
4258		memory_set_bank( machine, THOM_CART_BANK, 0 );
4259		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
4260		memory_set_bank( machine, TO8_SYS_LO,  0 );
4261		memory_set_bank( machine, TO8_SYS_HI,  0 );
4262		memory_set_bank( machine, TO8_DATA_LO, 0 );
4263		memory_set_bank( machine, TO8_DATA_HI, 0 );
4264		memory_set_bank( machine, TO8_BIOS_BANK, 0 );
	4250	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0,  8, mem + 0x10000, 0x4000 );
	4251	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 8, 32, ram, 0x4000 );
	4252	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0,  2, ram, 0x2000 );
	4253	machine.root_device().membank( TO8_SYS_LO )->configure_entry( 0,  ram + 0x6000);
	4254	machine.root_device().membank( TO8_SYS_HI )->configure_entry( 0,  ram + 0x4000);
	4255	machine.root_device().membank( TO8_DATA_LO )->configure_entries( 0, 32, ram + 0x2000, 0x4000 );
	4256	machine.root_device().membank( TO8_DATA_HI )->configure_entries( 0, 32, ram + 0x0000, 0x4000 );
	4257	machine.root_device().membank( TO8_BIOS_BANK )->configure_entries( 0,  2, mem + 0x30800, 0x2000 );
	4258	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
	4259	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	4260	machine.root_device().membank( TO8_SYS_LO )->set_entry( 0 );
	4261	machine.root_device().membank( TO8_SYS_HI )->set_entry( 0 );
	4262	machine.root_device().membank( TO8_DATA_LO )->set_entry( 0 );
	4263	machine.root_device().membank( TO8_DATA_HI )->set_entry( 0 );
	4264	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( 0 );
4265	4265
4266	4266	/* save-state */
4267	4267	state_save_register_global( machine, thom_cart_nb_banks );
r14976	r14977
4305	4305	LOG_BANK(( "mo6_update_ram_bank: select bank %i (new style)\n", bank ));
4306	4306	}
4307	4307	to8_data_vpage = bank;
4308		memory_set_bank( machine, TO8_DATA_LO, to8_data_vpage );
4309		memory_set_bank( machine, TO8_DATA_HI, to8_data_vpage );
	4308	machine.root_device().membank( TO8_DATA_LO )->set_entry( to8_data_vpage );
	4309	machine.root_device().membank( TO8_DATA_HI )->set_entry( to8_data_vpage );
4310	4310	}
4311	4311
4312	4312
r14976	r14977
4399	4399	}
4400	4400
4401	4401	old_cart_bank = bank;
4402		memory_set_bank( machine, THOM_CART_BANK, bank );
4403		memory_set_bank( machine, TO8_BIOS_BANK, b );
	4402	machine.root_device().membank( THOM_CART_BANK )->set_entry( bank );
	4403	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( b );
4404	4404	}
4405	4405
4406	4406
r14976	r14977
4427	4427	/* read signal generates a bank switch */
4428	4428	READ8_HANDLER ( mo6_cartridge_r )
4429	4429	{
4430		UINT8* pos = space->machine().region( "maincpu" )->base() + 0x10000;
	4430	UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
4431	4431	UINT8 data = pos[offset + 0xbffc + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
4432	4432	thom_cart_bank = offset & 3;
4433	4433	mo6_update_cart_bank(space->machine());
r14976	r14977
4853	4853
4854	4854	MACHINE_START ( mo6 )
4855	4855	{
4856		UINT8* mem = machine.region("maincpu")->base();
	4856	UINT8* mem = machine.root_device().memregion("maincpu")->base();
4857	4857	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
4858	4858
4859	4859	LOG (( "mo6: machine start called\n" ));
r14976	r14977
4871	4871	thom_cart_bank = 0;
4872	4872	mo5_reg_cart = 0;
4873	4873	thom_vram = ram;
4874		memory_configure_bank( machine, THOM_CART_BANK, 0, 4, mem + 0x10000, 0x4000 );
4875		memory_configure_bank( machine, THOM_CART_BANK, 4, 2, mem + 0x1f000, 0x4000 );
4876		memory_configure_bank( machine, THOM_CART_BANK, 6, 2, mem + 0x28000, 0x4000 );
4877		memory_configure_bank( machine, THOM_CART_BANK, 8, 8, ram, 0x4000 );
4878		memory_configure_bank( machine, THOM_VRAM_BANK, 0, 2, ram, 0x2000 );
4879		memory_configure_bank( machine, TO8_SYS_LO,     0, 1, ram + 0x6000, 0x4000 );
4880		memory_configure_bank( machine, TO8_SYS_HI,     0, 1, ram + 0x4000, 0x4000 );
4881		memory_configure_bank( machine, TO8_DATA_LO,    0, 8, ram + 0x2000, 0x4000 );
4882		memory_configure_bank( machine, TO8_DATA_HI,    0, 8, ram + 0x0000, 0x4000 );
4883		memory_configure_bank( machine, TO8_BIOS_BANK,  0, 2, mem + 0x23000, 0x4000 );
4884		memory_set_bank( machine, THOM_CART_BANK, 0 );
4885		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
4886		memory_set_bank( machine, TO8_SYS_LO,  0 );
4887		memory_set_bank( machine, TO8_SYS_HI,  0 );
4888		memory_set_bank( machine, TO8_DATA_LO, 0 );
4889		memory_set_bank( machine, TO8_DATA_HI, 0 );
4890		memory_set_bank( machine, TO8_BIOS_BANK, 0 );
	4874	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0, 4, mem + 0x10000, 0x4000 );
	4875	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 4, 2, mem + 0x1f000, 0x4000 );
	4876	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 6, 2, mem + 0x28000, 0x4000 );
	4877	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 8, 8, ram, 0x4000 );
	4878	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0, 2, ram, 0x2000 );
	4879	machine.root_device().membank( TO8_SYS_LO )->configure_entry( 0, ram + 0x6000);
	4880	machine.root_device().membank( TO8_SYS_HI )->configure_entry( 0, ram + 0x4000);
	4881	machine.root_device().membank( TO8_DATA_LO )->configure_entries( 0, 8, ram + 0x2000, 0x4000 );
	4882	machine.root_device().membank( TO8_DATA_HI )->configure_entries( 0, 8, ram + 0x0000, 0x4000 );
	4883	machine.root_device().membank( TO8_BIOS_BANK )->configure_entries( 0, 2, mem + 0x23000, 0x4000 );
	4884	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
	4885	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	4886	machine.root_device().membank( TO8_SYS_LO )->set_entry( 0 );
	4887	machine.root_device().membank( TO8_SYS_HI )->set_entry( 0 );
	4888	machine.root_device().membank( TO8_DATA_LO )->set_entry( 0 );
	4889	machine.root_device().membank( TO8_DATA_HI )->set_entry( 0 );
	4890	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( 0 );
4891	4891
4892	4892	/* save-state */
4893	4893	state_save_register_global( machine, thom_cart_nb_banks );
r14976	r14977
5114	5114
5115	5115	MACHINE_START ( mo5nr )
5116	5116	{
5117		UINT8* mem = machine.region("maincpu")->base();
	5117	UINT8* mem = machine.root_device().memregion("maincpu")->base();
5118	5118	UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
5119	5119
5120	5120	LOG (( "mo5nr: machine start called\n" ));
r14976	r14977
5132	5132	thom_cart_bank = 0;
5133	5133	mo5_reg_cart = 0;
5134	5134	thom_vram = ram;
5135		memory_configure_bank( machine, THOM_CART_BANK, 0, 4, mem + 0x10000, 0x4000 );
5136		memory_configure_bank( machine, THOM_CART_BANK, 4, 2, mem + 0x1f000, 0x4000 );
5137		memory_configure_bank( machine, THOM_CART_BANK, 6, 2, mem + 0x28000, 0x4000 );
5138		memory_configure_bank( machine, THOM_CART_BANK, 8, 8, ram, 0x4000 );
5139		memory_configure_bank( machine, THOM_VRAM_BANK, 0, 2, ram, 0x2000 );
5140		memory_configure_bank( machine, TO8_SYS_LO,     0, 1, ram + 0x6000, 0x4000 );
5141		memory_configure_bank( machine, TO8_SYS_HI,     0, 1, ram + 0x4000, 0x4000 );
5142		memory_configure_bank( machine, TO8_DATA_LO,    0, 8, ram + 0x2000, 0x4000 );
5143		memory_configure_bank( machine, TO8_DATA_HI,    0, 8, ram + 0x0000, 0x4000 );
5144		memory_configure_bank( machine, TO8_BIOS_BANK,  0, 2, mem + 0x23000, 0x4000 );
5145		memory_set_bank( machine, THOM_CART_BANK, 0 );
5146		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
5147		memory_set_bank( machine, TO8_SYS_LO,  0 );
5148		memory_set_bank( machine, TO8_SYS_HI,  0 );
5149		memory_set_bank( machine, TO8_DATA_LO, 0 );
5150		memory_set_bank( machine, TO8_DATA_HI, 0 );
5151		memory_set_bank( machine, TO8_BIOS_BANK, 0 );
	5135	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 0, 4, mem + 0x10000, 0x4000 );
	5136	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 4, 2, mem + 0x1f000, 0x4000 );
	5137	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 6, 2, mem + 0x28000, 0x4000 );
	5138	machine.root_device().membank( THOM_CART_BANK )->configure_entries( 8, 8, ram, 0x4000 );
	5139	machine.root_device().membank( THOM_VRAM_BANK )->configure_entries( 0, 2, ram, 0x2000 );
	5140	machine.root_device().membank( TO8_SYS_LO )->configure_entry( 0, ram + 0x6000);
	5141	machine.root_device().membank( TO8_SYS_HI )->configure_entry( 0, ram + 0x4000);
	5142	machine.root_device().membank( TO8_DATA_LO )->configure_entries( 0, 8, ram + 0x2000, 0x4000 );
	5143	machine.root_device().membank( TO8_DATA_HI )->configure_entries( 0, 8, ram + 0x0000, 0x4000 );
	5144	machine.root_device().membank( TO8_BIOS_BANK )->configure_entries( 0, 2, mem + 0x23000, 0x4000 );
	5145	machine.root_device().membank( THOM_CART_BANK )->set_entry( 0 );
	5146	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
	5147	machine.root_device().membank( TO8_SYS_LO )->set_entry( 0 );
	5148	machine.root_device().membank( TO8_SYS_HI )->set_entry( 0 );
	5149	machine.root_device().membank( TO8_DATA_LO )->set_entry( 0 );
	5150	machine.root_device().membank( TO8_DATA_HI )->set_entry( 0 );
	5151	machine.root_device().membank( TO8_BIOS_BANK )->set_entry( 0 );
5152	5152
5153	5153	/* save-state */
5154	5154	state_save_register_global( machine, thom_cart_nb_banks );

src/mess/machine/coco_fdc.c

r14976	r14977
249	249
250	250	UINT8* coco_fdc_device::get_cart_base()
251	251	{
252		return subregion("eprom")->base();
	252	return memregion("eprom")->base();
253	253	}
254	254
255	255	/*-------------------------------------------------

src/mess/machine/c128.c

r14976	r14977
496	496	charen = (data & 4) ? 1 : 0;
497	497
498	498	if ((!state->m_game && state->m_exrom) || (loram && hiram && !state->m_exrom))
499		memory_set_bankptr(machine, "bank8", state->m_roml);
	499	state->membank("bank8")->set_base(state->m_roml);
500	500	else
501		memory_set_bankptr(machine, "bank8", state->m_memory + 0x8000);
	501	state->membank("bank8")->set_base(state->m_memory + 0x8000);
502	502
503	503	if ((!state->m_game && state->m_exrom && hiram) || (!state->m_exrom))
504		memory_set_bankptr(machine, "bank9", state->m_romh);
	504	state->membank("bank9")->set_base(state->m_romh);
505	505	else if (loram && hiram)
506		memory_set_bankptr(machine, "bank9", state->m_basic);
	506	state->membank("bank9")->set_base(state->m_basic);
507	507	else
508		memory_set_bankptr(machine, "bank9", state->m_memory + 0xa000);
	508	state->membank("bank9")->set_base(state->m_memory + 0xa000);
509	509
510	510	if ((!state->m_game && state->m_exrom) || (charen && (loram || hiram)))
511	511	{
r14976	r14977
517	517	machine.device("m8502")->memory().space(AS_PROGRAM)->install_read_bank(0xd000, 0xdfff, "bank5");
518	518	state->m_write_io = 0;
519	519	if ((!charen && (loram || hiram)))
520		memory_set_bankptr(machine, "bank13", state->m_chargen);
	520	state->membank("bank13")->set_base(state->m_chargen);
521	521	else
522		memory_set_bankptr(machine, "bank13", state->m_memory + 0xd000);
	522	state->membank("bank13")->set_base(state->m_memory + 0xd000);
523	523	}
524	524
525	525	if (!state->m_game && state->m_exrom)
526	526	{
527		memory_set_bankptr(machine, "bank14", state->m_romh);
528		memory_set_bankptr(machine, "bank15", state->m_romh+0x1f00);
529		memory_set_bankptr(machine, "bank16", state->m_romh+0x1f05);
	527	state->membank("bank14")->set_base(state->m_romh);
	528	state->membank("bank15")->set_base(state->m_romh+0x1f00);
	529	state->membank("bank16")->set_base(state->m_romh+0x1f05);
530	530	}
531	531	else
532	532	{
533	533	if (hiram)
534	534	{
535		memory_set_bankptr(machine, "bank14", state->m_kernal);
536		memory_set_bankptr(machine, "bank15", state->m_kernal+0x1f00);
537		memory_set_bankptr(machine, "bank16", state->m_kernal+0x1f05);
	535	state->membank("bank14")->set_base(state->m_kernal);
	536	state->membank("bank15")->set_base(state->m_kernal+0x1f00);
	537	state->membank("bank16")->set_base(state->m_kernal+0x1f05);
538	538	}
539	539	else
540	540	{
541		memory_set_bankptr(machine, "bank14", state->m_memory + 0xe000);
542		memory_set_bankptr(machine, "bank15", state->m_memory + 0xff00);
543		memory_set_bankptr(machine, "bank16", state->m_memory + 0xff05);
	541	state->membank("bank14")->set_base(state->m_memory + 0xe000);
	542	state->membank("bank15")->set_base(state->m_memory + 0xff00);
	543	state->membank("bank16")->set_base(state->m_memory + 0xff05);
544	544	}
545	545	}
546	546	state->m_old_data = data;
r14976	r14977
556	556	state->m_ram = state->m_memory + MMU_RAM_ADDR;
557	557	state->m_va1617 = MMU_VIC_ADDR;
558	558	#if 1
559		memory_set_bankptr(machine, "bank10", state->m_z80);
560		memory_set_bankptr(machine, "bank11", state->m_ram + 0x1000);
	559	state->membank("bank10")->set_base(state->m_z80);
	560	state->membank("bank11")->set_base(state->m_ram + 0x1000);
561	561	if ( (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x02 ) && (MMU_RAM_ADDR >= 0x40000))
562	562	|| (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x00) && (MMU_RAM_ADDR >= 0x20000)) )
563	563	state->m_ram = NULL;
r14976	r14977
568	568	state->m_ram_bottom = 0;
569	569
570	570	if (MMU_RAM_ADDR==0) { /* this is used in z80 mode for rom on/off switching !*/
571		memory_set_bankptr(machine, "bank10", state->m_z80);
572		memory_set_bankptr(machine, "bank11", state->m_z80 + 0x400);
	571	state->membank("bank10")->set_base(state->m_z80);
	572	state->membank("bank11")->set_base(state->m_z80 + 0x400);
573	573	}
574	574	else
575	575	{
576		memory_set_bankptr(machine, "bank10", (state->m_ram_bottom > 0 ? state->m_memory : state->m_ram));
577		memory_set_bankptr(machine, "bank11", (state->m_ram_bottom > 0x400 ? state->m_memory : state->m_ram) + 0x400);
	576	state->membank("bank10")->set_base((state->m_ram_bottom > 0 ? state->m_memory : state->m_ram));
	577	state->membank("bank11")->set_base((state->m_ram_bottom > 0x400 ? state->m_memory : state->m_ram) + 0x400);
578	578	}
579	579
580		memory_set_bankptr(machine, "bank1", (state->m_ram_bottom > 0 ? state->m_memory : state->m_ram));
581		memory_set_bankptr(machine, "bank2", (state->m_ram_bottom > 0x400 ? state->m_memory : state->m_ram) + 0x400);
	580	state->membank("bank1")->set_base((state->m_ram_bottom > 0 ? state->m_memory : state->m_ram));
	581	state->membank("bank2")->set_base((state->m_ram_bottom > 0x400 ? state->m_memory : state->m_ram) + 0x400);
582	582
583		memory_set_bankptr(machine, "bank3", (state->m_ram_bottom > 0x1000 ? state->m_memory : state->m_ram) + 0x1000);
584		memory_set_bankptr(machine, "bank4", (state->m_ram_bottom > 0x2000 ? state->m_memory : state->m_ram) + 0x2000);
585		memory_set_bankptr(machine, "bank5", state->m_ram + 0x4000);
	583	state->membank("bank3")->set_base((state->m_ram_bottom > 0x1000 ? state->m_memory : state->m_ram) + 0x1000);
	584	state->membank("bank4")->set_base((state->m_ram_bottom > 0x2000 ? state->m_memory : state->m_ram) + 0x2000);
	585	state->membank("bank5")->set_base(state->m_ram + 0x4000);
586	586
587	587	if (MMU_TOP)
588	588	state->m_ram_top = 0x10000 - MMU_SIZE;
r14976	r14977
590	590	state->m_ram_top = 0x10000;
591	591
592	592	if (state->m_ram_top > 0xc000)
593		memory_set_bankptr(machine, "bank6", state->m_ram + 0xc000);
	593	state->membank("bank6")->set_base(state->m_ram + 0xc000);
594	594	else
595		memory_set_bankptr(machine, "bank6", state->m_memory + 0xc000);
	595	state->membank("bank6")->set_base(state->m_memory + 0xc000);
596	596
597	597	if (state->m_ram_top > 0xe000)
598		memory_set_bankptr(machine, "bank7", state->m_ram + 0xe000);
	598	state->membank("bank7")->set_base(state->m_ram + 0xe000);
599	599	else
600		memory_set_bankptr(machine, "bank7", state->m_memory + 0xd000);
	600	state->membank("bank7")->set_base(state->m_memory + 0xd000);
601	601
602	602	if (state->m_ram_top > 0xf000)
603		memory_set_bankptr(machine, "bank8", state->m_ram + 0xf000);
	603	state->membank("bank8")->set_base(state->m_ram + 0xf000);
604	604	else
605		memory_set_bankptr(machine, "bank8", state->m_memory + 0xe000);
	605	state->membank("bank8")->set_base(state->m_memory + 0xe000);
606	606
607	607	if (state->m_ram_top > 0xff05)
608		memory_set_bankptr(machine, "bank9", state->m_ram + 0xff05);
	608	state->membank("bank9")->set_base(state->m_ram + 0xff05);
609	609	else
610		memory_set_bankptr(machine, "bank9", state->m_memory + 0xff05);
	610	state->membank("bank9")->set_base(state->m_memory + 0xff05);
611	611
612	612	if ( (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x02 ) && (MMU_RAM_ADDR >= 0x40000))
613	613	|| (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x00) && (MMU_RAM_ADDR >= 0x20000)) )
r14976	r14977
627	627	state->m_ram_bottom = 0;
628	628	state->m_ram_top = 0x10000;
629	629
630		memory_set_bankptr(machine, "bank1", state->m_memory);
631		memory_set_bankptr(machine, "bank2", state->m_memory + 0x100);
	630	state->membank("bank1")->set_base(state->m_memory);
	631	state->membank("bank2")->set_base(state->m_memory + 0x100);
632	632
633		memory_set_bankptr(machine, "bank3", state->m_memory + 0x200);
634		memory_set_bankptr(machine, "bank4", state->m_memory + 0x400);
635		memory_set_bankptr(machine, "bank5", state->m_memory + 0x1000);
636		memory_set_bankptr(machine, "bank6", state->m_memory + 0x2000);
	633	state->membank("bank3")->set_base(state->m_memory + 0x200);
	634	state->membank("bank4")->set_base(state->m_memory + 0x400);
	635	state->membank("bank5")->set_base(state->m_memory + 0x1000);
	636	state->membank("bank6")->set_base(state->m_memory + 0x2000);
637	637
638		memory_set_bankptr(machine, "bank7", state->m_memory + 0x4000);
	638	state->membank("bank7")->set_base(state->m_memory + 0x4000);
639	639
640		memory_set_bankptr(machine, "bank12", state->m_memory + 0xc000);
	640	state->membank("bank12")->set_base(state->m_memory + 0xc000);
641	641
642	642	c128_bankswitch_64(machine, reset);
643	643	}
r14976	r14977
645	645	{
646	646	state->m_ram = state->m_memory + MMU_RAM_ADDR;
647	647	state->m_va1617 = MMU_VIC_ADDR;
648		memory_set_bankptr(machine, "bank1", state->m_memory + state->m_mmu_page0);
649		memory_set_bankptr(machine, "bank2", state->m_memory + state->m_mmu_page1);
	648	state->membank("bank1")->set_base(state->m_memory + state->m_mmu_page0);
	649	state->membank("bank2")->set_base(state->m_memory + state->m_mmu_page1);
650	650	if (MMU_BOTTOM)
651	651	{
652	652	state->m_ram_bottom = MMU_SIZE;
653	653	}
654	654	else
655	655	state->m_ram_bottom = 0;
656		memory_set_bankptr(machine, "bank3", (state->m_ram_bottom > 0x200 ? state->m_memory : state->m_ram) + 0x200);
657		memory_set_bankptr(machine, "bank4", (state->m_ram_bottom > 0x400 ? state->m_memory : state->m_ram) + 0x400);
658		memory_set_bankptr(machine, "bank5", (state->m_ram_bottom > 0x1000 ? state->m_memory : state->m_ram) + 0x1000);
659		memory_set_bankptr(machine, "bank6", (state->m_ram_bottom > 0x2000 ? state->m_memory : state->m_ram) + 0x2000);
	656	state->membank("bank3")->set_base((state->m_ram_bottom > 0x200 ? state->m_memory : state->m_ram) + 0x200);
	657	state->membank("bank4")->set_base((state->m_ram_bottom > 0x400 ? state->m_memory : state->m_ram) + 0x400);
	658	state->membank("bank5")->set_base((state->m_ram_bottom > 0x1000 ? state->m_memory : state->m_ram) + 0x1000);
	659	state->membank("bank6")->set_base((state->m_ram_bottom > 0x2000 ? state->m_memory : state->m_ram) + 0x2000);
660	660
661	661	if (MMU_RAM_LO)
662	662	{
663		memory_set_bankptr(machine, "bank7", state->m_ram + 0x4000);
	663	state->membank("bank7")->set_base(state->m_ram + 0x4000);
664	664	}
665	665	else
666	666	{
667		memory_set_bankptr(machine, "bank7", state->m_c128_basic);
	667	state->membank("bank7")->set_base(state->m_c128_basic);
668	668	}
669	669
670	670	if (MMU_RAM_MID)
671	671	{
672		memory_set_bankptr(machine, "bank8", state->m_ram + 0x8000);
673		memory_set_bankptr(machine, "bank9", state->m_ram + 0xa000);
	672	state->membank("bank8")->set_base(state->m_ram + 0x8000);
	673	state->membank("bank9")->set_base(state->m_ram + 0xa000);
674	674	}
675	675	else if (MMU_ROM_MID)
676	676	{
677		memory_set_bankptr(machine, "bank8", state->m_c128_basic + 0x4000);
678		memory_set_bankptr(machine, "bank9", state->m_c128_basic + 0x6000);
	677	state->membank("bank8")->set_base(state->m_c128_basic + 0x4000);
	678	state->membank("bank9")->set_base(state->m_c128_basic + 0x6000);
679	679	}
680	680	else if (MMU_INTERNAL_ROM_MID)
681	681	{
682		memory_set_bankptr(machine, "bank8", state->m_internal_function);
683		memory_set_bankptr(machine, "bank9", state->m_internal_function + 0x2000);
	682	state->membank("bank8")->set_base(state->m_internal_function);
	683	state->membank("bank9")->set_base(state->m_internal_function + 0x2000);
684	684	}
685	685	else
686	686	{
687		memory_set_bankptr(machine, "bank8", state->m_external_function);
688		memory_set_bankptr(machine, "bank9", state->m_external_function + 0x2000);
	687	state->membank("bank8")->set_base(state->m_external_function);
	688	state->membank("bank9")->set_base(state->m_external_function + 0x2000);
689	689	}
690	690
691	691	if (MMU_TOP)
r14976	r14977
713	713	{
714	714	if (state->m_ram_top > 0xc000)
715	715	{
716		memory_set_bankptr(machine, "bank12", state->m_ram + 0xc000);
	716	state->membank("bank12")->set_base(state->m_ram + 0xc000);
717	717	}
718	718	else
719	719	{
720		memory_set_bankptr(machine, "bank12", state->m_memory + 0xc000);
	720	state->membank("bank12")->set_base(state->m_memory + 0xc000);
721	721	}
722	722	if (!MMU_IO_ON)
723	723	{
724	724	if (state->m_ram_top > 0xd000)
725	725	{
726		memory_set_bankptr(machine, "bank13", state->m_ram + 0xd000);
	726	state->membank("bank13")->set_base(state->m_ram + 0xd000);
727	727	}
728	728	else
729	729	{
730		memory_set_bankptr(machine, "bank13", state->m_memory + 0xd000);
	730	state->membank("bank13")->set_base(state->m_memory + 0xd000);
731	731	}
732	732	}
733	733	if (state->m_ram_top > 0xe000)
734	734	{
735		memory_set_bankptr(machine, "bank14", state->m_ram + 0xe000);
	735	state->membank("bank14")->set_base(state->m_ram + 0xe000);
736	736	}
737	737	else
738	738	{
739		memory_set_bankptr(machine, "bank14", state->m_memory + 0xe000);
	739	state->membank("bank14")->set_base(state->m_memory + 0xe000);
740	740	}
741	741	if (state->m_ram_top > 0xff05)
742	742	{
743		memory_set_bankptr(machine, "bank16", state->m_ram + 0xff05);
	743	state->membank("bank16")->set_base(state->m_ram + 0xff05);
744	744	}
745	745	else
746	746	{
747		memory_set_bankptr(machine, "bank16", state->m_memory + 0xff05);
	747	state->membank("bank16")->set_base(state->m_memory + 0xff05);
748	748	}
749	749	}
750	750	else if (MMU_ROM_HI)
751	751	{
752		memory_set_bankptr(machine, "bank12", state->m_editor);
	752	state->membank("bank12")->set_base(state->m_editor);
753	753	if (!MMU_IO_ON) {
754		memory_set_bankptr(machine, "bank13", state->m_c128_chargen);
	754	state->membank("bank13")->set_base(state->m_c128_chargen);
755	755	}
756		memory_set_bankptr(machine, "bank14", state->m_c128_kernal);
757		memory_set_bankptr(machine, "bank16", state->m_c128_kernal + 0x1f05);
	756	state->membank("bank14")->set_base(state->m_c128_kernal);
	757	state->membank("bank16")->set_base(state->m_c128_kernal + 0x1f05);
758	758	}
759	759	else if (MMU_INTERNAL_ROM_HI)
760	760	{
761		memory_set_bankptr(machine, "bank12", state->m_internal_function);
	761	state->membank("bank12")->set_base(state->m_internal_function);
762	762	if (!MMU_IO_ON) {
763		memory_set_bankptr(machine, "bank13", state->m_internal_function + 0x1000);
	763	state->membank("bank13")->set_base(state->m_internal_function + 0x1000);
764	764	}
765		memory_set_bankptr(machine, "bank14", state->m_internal_function + 0x2000);
766		memory_set_bankptr(machine, "bank16", state->m_internal_function + 0x3f05);
	765	state->membank("bank14")->set_base(state->m_internal_function + 0x2000);
	766	state->membank("bank16")->set_base(state->m_internal_function + 0x3f05);
767	767	}
768	768	else                  /*if (MMU_EXTERNAL_ROM_HI) */
769	769	{
770		memory_set_bankptr(machine, "bank12", state->m_external_function);
	770	state->membank("bank12")->set_base(state->m_external_function);
771	771	if (!MMU_IO_ON) {
772		memory_set_bankptr(machine, "bank13", state->m_external_function + 0x1000);
	772	state->membank("bank13")->set_base(state->m_external_function + 0x1000);
773	773	}
774		memory_set_bankptr(machine, "bank14", state->m_external_function + 0x2000);
775		memory_set_bankptr(machine, "bank16", state->m_external_function + 0x3f05);
	774	state->membank("bank14")->set_base(state->m_external_function + 0x2000);
	775	state->membank("bank16")->set_base(state->m_external_function + 0x3f05);
776	776	}
777	777
778	778	if ( (( (input_port_read(machine, "SPECIAL") & 0x06) == 0x02 ) && (MMU_RAM_ADDR >= 0x40000))
r14976	r14977
1139	1139	static void c128_common_driver_init( running_machine &machine )
1140	1140	{
1141	1141	c128_state *state = machine.driver_data<c128_state>();
1142		UINT8 *gfx=machine.region("gfx1")->base();
1143		UINT8 *ram = machine.region("maincpu")->base();
	1142	UINT8 *gfx=machine.root_device().memregion("gfx1")->base();
	1143	UINT8 *ram = state->memregion("maincpu")->base();
1144	1144	int i;
1145	1145
1146	1146	state->m_memory = ram;

src/mess/machine/coco12.c

r14976	r14977
42	42	cococart_slot_device *cart = m_cococart;
43	43	UINT8 *ram = m_ram->pointer();
44	44	UINT32 ram_size = m_ram->size();
45		UINT8 *rom = machine().region(MAINCPU_TAG)->base();
	45	UINT8 *rom = memregion(MAINCPU_TAG)->base();
46	46	UINT8 *cart_rom = cart->get_cart_base();
47	47
48	48	m_sam->configure_bank(0, ram, ram_size, false);         // $0000-$7FFF

src/mess/machine/thomflop.c

r14976	r14977
1760	1760
1761	1761	void to7_floppy_init ( running_machine &machine, void* base )
1762	1762	{
1763		memory_configure_bank( machine, THOM_FLOP_BANK, 0, TO7_NB_FLOP_BANK, base, 0x800 );
	1763	machine.root_device().membank( THOM_FLOP_BANK )->configure_entries( 0, TO7_NB_FLOP_BANK, base, 0x800 );
1764	1764	state_save_register_global( machine, to7_controller_type );
1765	1765	state_save_register_global( machine, to7_floppy_bank );
1766	1766	to7_5p14sd_init(machine);
r14976	r14977
1809	1809	break;
1810	1810	}
1811	1811
1812		memory_set_bank( machine, THOM_FLOP_BANK, to7_floppy_bank );
	1812	machine.root_device().membank( THOM_FLOP_BANK )->set_entry( to7_floppy_bank );
1813	1813	}
1814	1814
1815	1815
r14976	r14977
1857	1857	if ( offset == 8 )
1858	1858	{
1859	1859	to7_floppy_bank = 3 + (data & 3);
1860		memory_set_bank( space->machine(), THOM_FLOP_BANK, to7_floppy_bank );
	1860	space->machine().root_device().membank( THOM_FLOP_BANK )->set_entry( to7_floppy_bank );
1861	1861	VLOG (( "to7_floppy_w: set CD 90-351 ROM bank to %i\n", data & 3 ));
1862	1862	}
1863	1863	else
r14976	r14977
1887	1887	void to9_floppy_init( running_machine &machine, void* int_base, void* ext_base )
1888	1888	{
1889	1889	to7_floppy_init( machine, ext_base );
1890		memory_configure_bank( machine, THOM_FLOP_BANK, TO7_NB_FLOP_BANK, 1, int_base, 0x800 );
	1890	machine.root_device().membank( THOM_FLOP_BANK )->configure_entry( TO7_NB_FLOP_BANK, int_base);
1891	1891	}
1892	1892
1893	1893
r14976	r14977
1903	1903	{
1904	1904	LOG(( "to9_floppy_reset: internal controller\n" ));
1905	1905	to7_5p14_reset(machine);
1906		memory_set_bank( machine, THOM_FLOP_BANK, TO7_NB_FLOP_BANK );
	1906	machine.root_device().membank( THOM_FLOP_BANK )->set_entry( TO7_NB_FLOP_BANK );
1907	1907	}
1908	1908	}
1909	1909

src/mess/machine/pet.c

r14976	r14977
490	490	if (data & 0x20)
491	491	{
492	492	state->m_pet80_bank1_base = state->m_memory + 0x8000;
493		memory_set_bankptr(space->machine(), "bank1", state->m_pet80_bank1_base);
	493	state->membank("bank1")->set_base(state->m_pet80_bank1_base);
494	494	space->install_legacy_write_handler(0x8000, 0x8fff, FUNC(pet80_bank1_w));
495	495	}
496	496	else
r14976	r14977
516	516	if (!(data & 0x20))
517	517	{
518	518	state->m_pet80_bank1_base = state->m_memory + 0x14000;
519		memory_set_bankptr(space->machine(), "bank1", state->m_pet80_bank1_base);
	519	state->membank("bank1")->set_base(state->m_pet80_bank1_base);
520	520	}
521		memory_set_bankptr(space->machine(), "bank2", state->m_memory + 0x15000);
522		memory_set_bankptr(space->machine(), "bank3", state->m_memory + 0x16000);
523		memory_set_bankptr(space->machine(), "bank4", state->m_memory + 0x17000);
	521	state->membank("bank2")->set_base(state->m_memory + 0x15000);
	522	state->membank("bank3")->set_base(state->m_memory + 0x16000);
	523	state->membank("bank4")->set_base(state->m_memory + 0x17000);
524	524	}
525	525	else
526	526	{
527	527	if (!(data & 0x20))
528	528	{
529	529	state->m_pet80_bank1_base = state->m_memory + 0x10000;
530		memory_set_bankptr(space->machine(), "bank1", state->m_pet80_bank1_base);
	530	state->membank("bank1")->set_base(state->m_pet80_bank1_base);
531	531	}
532		memory_set_bankptr(space->machine(), "bank2", state->m_memory + 0x11000);
533		memory_set_bankptr(space->machine(), "bank3", state->m_memory + 0x12000);
534		memory_set_bankptr(space->machine(), "bank4", state->m_memory + 0x13000);
	532	state->membank("bank2")->set_base(state->m_memory + 0x11000);
	533	state->membank("bank3")->set_base(state->m_memory + 0x12000);
	534	state->membank("bank4")->set_base(state->m_memory + 0x13000);
535	535	}
536	536
537	537	if (data & 8)
538	538	{
539	539	if (!(data & 0x40))
540	540	{
541		memory_set_bankptr(space->machine(), "bank7", state->m_memory + 0x1e800);
	541	state->membank("bank7")->set_base(state->m_memory + 0x1e800);
542	542	}
543		memory_set_bankptr(space->machine(), "bank6", state->m_memory + 0x1c000);
544		memory_set_bankptr(space->machine(), "bank8", state->m_memory + 0x1f000);
545		memory_set_bankptr(space->machine(), "bank9", state->m_memory + 0x1fff1);
	543	state->membank("bank6")->set_base(state->m_memory + 0x1c000);
	544	state->membank("bank8")->set_base(state->m_memory + 0x1f000);
	545	state->membank("bank9")->set_base(state->m_memory + 0x1fff1);
546	546	}
547	547	else
548	548	{
549	549	if (!(data & 0x40))
550	550	{
551		memory_set_bankptr(space->machine(), "bank7", state->m_memory+ 0x1a800);
	551	state->membank("bank7")->set_base(state->m_memory+ 0x1a800);
552	552	}
553		memory_set_bankptr(space->machine(), "bank6", state->m_memory + 0x18000);
554		memory_set_bankptr(space->machine(), "bank8", state->m_memory + 0x1b000);
555		memory_set_bankptr(space->machine(), "bank9", state->m_memory + 0x1bff1);
	553	state->membank("bank6")->set_base(state->m_memory + 0x18000);
	554	state->membank("bank8")->set_base(state->m_memory + 0x1b000);
	555	state->membank("bank9")->set_base(state->m_memory + 0x1bff1);
556	556	}
557	557	}
558	558	else
559	559	{
560	560	state->m_pet80_bank1_base = state->m_memory + 0x8000;
561		memory_set_bankptr(space->machine(), "bank1", state->m_pet80_bank1_base );
	561	state->membank("bank1")->set_base(state->m_pet80_bank1_base );
562	562	space->install_legacy_write_handler(0x8000, 0x8fff, FUNC(pet80_bank1_w));
563	563
564		memory_set_bankptr(space->machine(), "bank2", state->m_memory + 0x9000);
	564	state->membank("bank2")->set_base(state->m_memory + 0x9000);
565	565	space->unmap_write(0x9000, 0x9fff);
566	566
567		memory_set_bankptr(space->machine(), "bank3", state->m_memory + 0xa000);
	567	state->membank("bank3")->set_base(state->m_memory + 0xa000);
568	568	space->unmap_write(0xa000, 0xafff);
569	569
570		memory_set_bankptr(space->machine(), "bank4", state->m_memory + 0xb000);
	570	state->membank("bank4")->set_base(state->m_memory + 0xb000);
571	571	space->unmap_write(0xb000, 0xbfff);
572	572
573		memory_set_bankptr(space->machine(), "bank6", state->m_memory + 0xc000);
	573	state->membank("bank6")->set_base(state->m_memory + 0xc000);
574	574	space->unmap_write(0xc000, 0xe7ff);
575	575
576	576	space->install_legacy_read_handler(0xe800, 0xefff, FUNC(cbm8096_io_r));
577	577	space->install_legacy_write_handler(0xe800, 0xefff, FUNC(cbm8096_io_w));
578	578
579		memory_set_bankptr(space->machine(), "bank8", state->m_memory + 0xf000);
	579	state->membank("bank8")->set_base(state->m_memory + 0xf000);
580	580	space->unmap_write(0xf000, 0xffef);
581	581
582		memory_set_bankptr(space->machine(), "bank9", state->m_memory + 0xfff1);
	582	state->membank("bank9")->set_base(state->m_memory + 0xfff1);
583	583	space->unmap_write(0xfff1, 0xffff);
584	584	}
585	585	}
r14976	r14977
606	606	case 4:
607	607	case 5:
608	608	state->m_spet.bank = data & 0xf;
609		memory_configure_bank(space->machine(), "bank1", 0, 16, state->m_supermemory, 0x1000);
610		memory_set_bank(space->machine(), "bank1", state->m_spet.bank);
	609	state->membank("bank1")->configure_entries(0, 16, state->m_supermemory, 0x1000);
	610	state->membank("bank1")->set_entry(state->m_spet.bank);
611	611	/* 7 low writeprotects systemlatch */
612	612	break;
613	613
r14976	r14977
657	657	state->m_cbm8096 = 0;
658	658
659	659	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0x0000, machine.device<ram_device>(RAM_TAG)->size() - 1, "bank10");
660		memory_set_bankptr(machine, "bank10", state->m_memory);
	660	state->membank("bank10")->set_base(state->m_memory);
661	661
662	662	if (machine.device<ram_device>(RAM_TAG)->size() < 0x8000)
663	663	{
r14976	r14977
699	699	DRIVER_INIT( pet80 )
700	700	{
701	701	pet_state *state = machine.driver_data<pet_state>();
702		state->m_memory.set_target(machine.region("maincpu")->base(),state->m_memory.bytes());
	702	state->m_memory.set_target(state->memregion("maincpu")->base(),state->m_memory.bytes());
703	703
704	704	pet_common_driver_init(machine);
705	705	state->m_cbm8096 = 1;
r14976	r14977
717	717
718	718	state->m_supermemory = auto_alloc_array(machine, UINT8, 0x10000);
719	719
720		memory_configure_bank(machine, "bank1", 0, 16, state->m_supermemory, 0x1000);
721		memory_set_bank(machine, "bank1", 0);
	720	state->membank("bank1")->configure_entries(0, 16, state->m_supermemory, 0x1000);
	721	state->membank("bank1")->set_entry(0);
722	722
723	723	superpet_vh_init(machine);
724	724	}

src/mess/machine/oric.c

r14976	r14977
478	478
479	479	space->install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
480	480	space->install_legacy_write_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_w));
481		memory_set_bankptr(machine, "bank4",   machine.region("maincpu")->base() + 0x014000 + 0x020);
	481	state->membank("bank4")->set_base(   state->memregion("maincpu")->base() + 0x014000 + 0x020);
482	482	}
483	483
484	484
r14976	r14977
551	551	/*  logerror("apple 2 interface v2 rom page: %01x\n",(offset & 0x02)>>1); */
552	552
553	553	/* bit 0 is 0 for page 0, 1 for page 1 */
554		memory_set_bankptr(machine(), "bank4", machine().region("maincpu")->base() + 0x014000 + 0x0100 + (((offset & 0x02)>>1)<<8));
	554	membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x014000 + 0x0100 + (((offset & 0x02)>>1)<<8));
555	555
556	556	oric_enable_memory(machine(), 1, 3, TRUE, TRUE);
557	557
r14976	r14977
563	563	/* logerror("apple 2 interface v2: rom enabled\n"); */
564	564
565	565	/* enable rom */
566		rom_ptr = machine().region("maincpu")->base() + 0x010000;
567		memory_set_bankptr(machine(), "bank1", rom_ptr);
568		memory_set_bankptr(machine(), "bank2", rom_ptr+0x02000);
569		memory_set_bankptr(machine(), "bank3", rom_ptr+0x03800);
570		memory_set_bankptr(machine(), "bank5", m_ram_0x0c000);
571		memory_set_bankptr(machine(), "bank6", m_ram_0x0c000+0x02000);
572		memory_set_bankptr(machine(), "bank7", m_ram_0x0c000+0x03800);
	566	rom_ptr = memregion("maincpu")->base() + 0x010000;
	567	membank("bank1")->set_base(rom_ptr);
	568	membank("bank2")->set_base(rom_ptr+0x02000);
	569	membank("bank3")->set_base(rom_ptr+0x03800);
	570	membank("bank5")->set_base(m_ram_0x0c000);
	571	membank("bank6")->set_base(m_ram_0x0c000+0x02000);
	572	membank("bank7")->set_base(m_ram_0x0c000+0x03800);
573	573	}
574	574	else
575	575	{
576	576	/*logerror("apple 2 interface v2: ram enabled\n"); */
577	577
578	578	/* enable ram */
579		memory_set_bankptr(machine(), "bank1", m_ram_0x0c000);
580		memory_set_bankptr(machine(), "bank2", m_ram_0x0c000+0x02000);
581		memory_set_bankptr(machine(), "bank3", m_ram_0x0c000+0x03800);
582		memory_set_bankptr(machine(), "bank5", m_ram_0x0c000);
583		memory_set_bankptr(machine(), "bank6", m_ram_0x0c000+0x02000);
584		memory_set_bankptr(machine(), "bank7", m_ram_0x0c000+0x03800);
	579	membank("bank1")->set_base(m_ram_0x0c000);
	580	membank("bank2")->set_base(m_ram_0x0c000+0x02000);
	581	membank("bank3")->set_base(m_ram_0x0c000+0x03800);
	582	membank("bank5")->set_base(m_ram_0x0c000);
	583	membank("bank6")->set_base(m_ram_0x0c000+0x02000);
	584	membank("bank7")->set_base(m_ram_0x0c000+0x03800);
585	585	}
586	586	}
587	587
r14976	r14977
642	642
643	643	oric_enable_memory(machine, 1, 3, TRUE, FALSE);
644	644
645		rom_ptr = machine.region("maincpu")->base() + 0x010000;
646		memory_set_bankptr(machine, "bank1", rom_ptr);
647		memory_set_bankptr(machine, "bank2", rom_ptr+0x02000);
648		memory_set_bankptr(machine, "bank3", rom_ptr+0x03800);
	645	rom_ptr = state->memregion("maincpu")->base() + 0x010000;
	646	state->membank("bank1")->set_base(rom_ptr);
	647	state->membank("bank2")->set_base(rom_ptr+0x02000);
	648	state->membank("bank3")->set_base(rom_ptr+0x03800);
649	649	}
650	650	else
651	651	{
r14976	r14977
653	653
654	654	oric_enable_memory(machine, 1, 3, TRUE, TRUE);
655	655
656		memory_set_bankptr(machine, "bank1", state->m_ram_0x0c000);
657		memory_set_bankptr(machine, "bank2", state->m_ram_0x0c000+0x02000);
658		memory_set_bankptr(machine, "bank3", state->m_ram_0x0c000+0x03800);
659		memory_set_bankptr(machine, "bank5", state->m_ram_0x0c000);
660		memory_set_bankptr(machine, "bank6", state->m_ram_0x0c000+0x02000);
661		memory_set_bankptr(machine, "bank7", state->m_ram_0x0c000+0x03800);
	656	state->membank("bank1")->set_base(state->m_ram_0x0c000);
	657	state->membank("bank2")->set_base(state->m_ram_0x0c000+0x02000);
	658	state->membank("bank3")->set_base(state->m_ram_0x0c000+0x03800);
	659	state->membank("bank5")->set_base(state->m_ram_0x0c000);
	660	state->membank("bank6")->set_base(state->m_ram_0x0c000+0x02000);
	661	state->membank("bank7")->set_base(state->m_ram_0x0c000+0x03800);
662	662	}
663	663	}
664	664	else
r14976	r14977
677	677	/*logerror("&c000-&f8ff is ram!\n"); */
678	678	oric_enable_memory(machine, 1, 2, TRUE, TRUE);
679	679
680		memory_set_bankptr(machine, "bank1", state->m_ram_0x0c000);
681		memory_set_bankptr(machine, "bank2", state->m_ram_0x0c000+0x02000);
682		memory_set_bankptr(machine, "bank5", state->m_ram_0x0c000);
683		memory_set_bankptr(machine, "bank6", state->m_ram_0x0c000+0x02000);
	680	state->membank("bank1")->set_base(state->m_ram_0x0c000);
	681	state->membank("bank2")->set_base(state->m_ram_0x0c000+0x02000);
	682	state->membank("bank5")->set_base(state->m_ram_0x0c000);
	683	state->membank("bank6")->set_base(state->m_ram_0x0c000+0x02000);
684	684	}
685	685
686	686	{
r14976	r14977
690	690	/*logerror("&f800-&ffff is jasmin rom\n"); */
691	691	/* jasmin rom enabled */
692	692	oric_enable_memory(machine, 3, 3, TRUE, TRUE);
693		rom_ptr = machine.region("maincpu")->base() + 0x010000+0x04000+0x02000;
694		memory_set_bankptr(machine, "bank3", rom_ptr);
695		memory_set_bankptr(machine, "bank7", rom_ptr);
	693	rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x010000+0x04000+0x02000;
	694	state->membank("bank3")->set_base(rom_ptr);
	695	state->membank("bank7")->set_base(rom_ptr);
696	696	}
697	697	}
698	698	}
r14976	r14977
871	871	/*logerror("&c000-&dfff is ram\n"); */
872	872	/* rom disabled enable ram */
873	873	oric_enable_memory(machine, 1, 1, TRUE, TRUE);
874		memory_set_bankptr(machine, "bank1", state->m_ram_0x0c000);
875		memory_set_bankptr(machine, "bank5", state->m_ram_0x0c000);
	874	state->membank("bank1")->set_base(state->m_ram_0x0c000);
	875	state->membank("bank5")->set_base(state->m_ram_0x0c000);
876	876	}
877	877	else
878	878	{
r14976	r14977
880	880	/*logerror("&c000-&dfff is os rom\n"); */
881	881	/* basic rom */
882	882	oric_enable_memory(machine, 1, 1, TRUE, FALSE);
883		rom_ptr = machine.region("maincpu")->base() + 0x010000;
884		memory_set_bankptr(machine, "bank1", rom_ptr);
885		memory_set_bankptr(machine, "bank5", rom_ptr);
	883	rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x010000;
	884	state->membank("bank1")->set_base(rom_ptr);
	885	state->membank("bank5")->set_base(rom_ptr);
886	886	}
887	887
888	888	/* for 0x0e000-0x0ffff */
r14976	r14977
893	893	/*logerror("&e000-&ffff is os rom\n"); */
894	894	/* basic rom */
895	895	oric_enable_memory(machine, 2, 3, TRUE, FALSE);
896		rom_ptr = machine.region("maincpu")->base() + 0x010000;
897		memory_set_bankptr(machine, "bank2", rom_ptr+0x02000);
898		memory_set_bankptr(machine, "bank3", rom_ptr+0x03800);
899		memory_set_bankptr(machine, "bank6", rom_ptr+0x02000);
900		memory_set_bankptr(machine, "bank7", rom_ptr+0x03800);
	896	rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x010000;
	897	state->membank("bank2")->set_base(rom_ptr+0x02000);
	898	state->membank("bank3")->set_base(rom_ptr+0x03800);
	899	state->membank("bank6")->set_base(rom_ptr+0x02000);
	900	state->membank("bank7")->set_base(rom_ptr+0x03800);
901	901
902	902	}
903	903	else
r14976	r14977
909	909	/*logerror("&e000-&ffff is disk rom\n"); */
910	910	oric_enable_memory(machine, 2, 3, TRUE, FALSE);
911	911	/* enable rom of microdisc interface */
912		rom_ptr = machine.region("maincpu")->base() + 0x014000;
913		memory_set_bankptr(machine, "bank2", rom_ptr);
914		memory_set_bankptr(machine, "bank3", rom_ptr+0x01800);
	912	rom_ptr = machine.root_device().memregion("maincpu")->base() + 0x014000;
	913	state->membank("bank2")->set_base(rom_ptr);
	914	state->membank("bank3")->set_base(rom_ptr+0x01800);
915	915	}
916	916	else
917	917	{
918	918	/*logerror("&e000-&ffff is ram\n"); */
919	919	/* rom disabled enable ram */
920	920	oric_enable_memory(machine, 2, 3, TRUE, TRUE);
921		memory_set_bankptr(machine, "bank2", state->m_ram_0x0c000+0x02000);
922		memory_set_bankptr(machine, "bank3", state->m_ram_0x0c000+0x03800);
923		memory_set_bankptr(machine, "bank6", state->m_ram_0x0c000+0x02000);
924		memory_set_bankptr(machine, "bank7", state->m_ram_0x0c000+0x03800);
	921	state->membank("bank2")->set_base(state->m_ram_0x0c000+0x02000);
	922	state->membank("bank3")->set_base(state->m_ram_0x0c000+0x03800);
	923	state->membank("bank6")->set_base(state->m_ram_0x0c000+0x02000);
	924	state->membank("bank7")->set_base(state->m_ram_0x0c000+0x03800);
925	925	}
926	926	}
927	927	}
r14976	r14977
1111	1111
1112	1112	/* os rom */
1113	1113	oric_enable_memory(machine, 1, 3, TRUE, FALSE);
1114		rom_ptr = machine.region("maincpu")->base() + 0x010000;
1115		memory_set_bankptr(machine, "bank1", rom_ptr);
1116		memory_set_bankptr(machine, "bank2", rom_ptr+0x02000);
1117		memory_set_bankptr(machine, "bank3", rom_ptr+0x03800);
1118		memory_set_bankptr(machine, "bank5", rom_ptr);
1119		memory_set_bankptr(machine, "bank6", rom_ptr+0x02000);
1120		memory_set_bankptr(machine, "bank7", rom_ptr+0x03800);
	1114	rom_ptr = state->memregion("maincpu")->base() + 0x010000;
	1115	state->membank("bank1")->set_base(rom_ptr);
	1116	state->membank("bank2")->set_base(rom_ptr+0x02000);
	1117	state->membank("bank3")->set_base(rom_ptr+0x03800);
	1118	state->membank("bank5")->set_base(rom_ptr);
	1119	state->membank("bank6")->set_base(rom_ptr+0x02000);
	1120	state->membank("bank7")->set_base(rom_ptr+0x03800);
1121	1121
1122	1122
1123	1123	if (disc_interface_id==ORIC_FLOPPY_INTERFACE_APPLE2)
r14976	r14977
1295	1295	{
1296	1296	case TELESTRAT_MEM_BLOCK_RAM:
1297	1297	{
1298		memory_set_bankptr(machine, "bank1", mem_block->ptr);
1299		memory_set_bankptr(machine, "bank2", mem_block->ptr);
	1298	state->membank("bank1")->set_base(mem_block->ptr);
	1299	state->membank("bank2")->set_base(mem_block->ptr);
1300	1300	space->install_read_bank(0xc000, 0xffff, "bank1");
1301	1301	space->install_write_bank(0xc000, 0xffff, "bank2");
1302	1302	}
r14976	r14977
1304	1304
1305	1305	case TELESTRAT_MEM_BLOCK_ROM:
1306	1306	{
1307		memory_set_bankptr(machine, "bank1", mem_block->ptr);
	1307	state->membank("bank1")->set_base(mem_block->ptr);
1308	1308	space->install_read_bank(0xc000, 0xffff, "bank1");
1309	1309	space->nop_write(0xc000, 0xffff);
1310	1310	}
r14976	r14977
1422	1422	MACHINE_START( telestrat )
1423	1423	{
1424	1424	oric_state *state = machine.driver_data<oric_state>();
1425		UINT8 *mem = machine.region("maincpu")->base();
	1425	UINT8 *mem = state->memregion("maincpu")->base();
1426	1426
1427	1427	oric_common_init_machine(machine);
1428	1428

src/mess/machine/genpc.c

r14976	r14977
634	634	install_device_write(this,    0x00a0, 0x00a1, 0, 0, FUNC(nmi_enable_w));
635	635	/* MESS managed RAM */
636	636	if ( machine().device<ram_device>(RAM_TAG)->pointer() )
637		memory_set_bankptr( machine(), "bank10", machine().device<ram_device>(RAM_TAG)->pointer() );
	637	membank( "bank10" )->set_base( machine().device<ram_device>(RAM_TAG)->pointer() );
638	638	}
639	639
640	640	IRQ_CALLBACK(ibm5160_mb_device::pc_irq_callback)

src/mess/machine/vector06.c

r14976	r14977
66	66
67	67	READ8_MEMBER( vector06_state::vector06_romdisk_portb_r )
68	68	{
69		UINT8 *romdisk = machine().region("maincpu")->base() + 0x18000;
	69	UINT8 *romdisk = memregion("maincpu")->base() + 0x18000;
70	70	UINT16 addr = (m_romdisk_msb | m_romdisk_lsb) & 0x7fff;
71	71	return romdisk[addr];
72	72	}
r14976	r14977
139	139
140	140	static TIMER_CALLBACK( reset_check_callback )
141	141	{
	142	vector06_state *state = machine.driver_data<vector06_state>();
142	143	UINT8 val = input_port_read(machine, "RESET");
143	144
144	145	if (BIT(val, 0))
145	146	{
146		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x10000);
	147	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x10000);
147	148	machine.device("maincpu")->reset();
148	149	}
149	150
150	151	if (BIT(val, 1))
151	152	{
152		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer() + 0x0000);
	153	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x0000);
153	154	machine.device("maincpu")->reset();
154	155	}
155	156	}
r14976	r14977
178	179	space->install_read_bank (0x8000, 0xffff, "bank3");
179	180	space->install_write_bank(0x8000, 0xffff, "bank4");
180	181
181		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x10000);
182		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x0000);
183		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
184		memory_set_bankptr(machine, "bank4", machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
	182	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x10000);
	183	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x0000);
	184	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
	185	state->membank("bank4")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
185	186
186	187	state->m_keyboard_mask = 0;
187	188	state->m_color_index = 0;

src/mess/machine/a2thunderclock.c

r14976	r14977
106	106	set_a2bus_device();
107	107
108	108	astring tempstring;
109		m_rom = device().machine().region(this->subtag(tempstring, THUNDERCLOCK_ROM_REGION))->base();
	109	m_rom = device().machine().root_device().memregion(this->subtag(tempstring, THUNDERCLOCK_ROM_REGION))->base();
110	110
111	111	save_item(NAME(m_dataout));
112	112	}

src/mess/machine/sorcerer.c

r14976	r14977
134	134	/* after the first 4 bytes have been read from ROM, switch the ram back in */
135	135	static TIMER_CALLBACK( sorcerer_reset )
136	136	{
137		memory_set_bank(machine, "boot", 0);
	137	sorcerer_state *state = machine.driver_data<sorcerer_state>();
	138	state->membank("boot")->set_entry(0);
138	139	}
139	140
140	141	WRITE8_MEMBER(sorcerer_state::sorcerer_fc_w)
r14976	r14977
305	306	SNAPSHOT_LOAD(sorcerer)
306	307	{
307	308	device_t *cpu = image.device().machine().device("maincpu");
308		UINT8 *RAM = image.device().machine().region(cpu->tag())->base();
	309	UINT8 *RAM = image.device().machine().root_device().memregion(cpu->tag())->base();
309	310	address_space *space = cpu->memory().space(AS_PROGRAM);
310	311	UINT8 header[28];
311	312	unsigned char s_byte;
r14976	r14977
421	422	state->m_fe = 0xff;
422	423	state->sorcerer_fe_w(*space, 0, 0, 0xff);
423	424
424		memory_set_bank(machine, "boot", 1);
	425	state->membank("boot")->set_entry(1);
425	426	machine.scheduler().timer_set(attotime::from_usec(10), FUNC(sorcerer_reset));
426	427	}

src/mess/machine/sapi1.c

r14976	r14977
45	45	{
46	46	sapi1_state *state = machine.driver_data<sapi1_state>();
47	47	state->m_keyboard_mask = 0;
48		memory_set_bank(machine, "bank1", 1);
	48	state->membank("bank1")->set_entry(1);
49	49	}
50	50
51	51	DRIVER_INIT( sapizps3 )
52	52	{
53		UINT8 *RAM = machine.region("maincpu")->base();
54		memory_configure_bank(machine, "bank1", 0, 2, &RAM[0x0000], 0xf800);
	53	sapi1_state *state = machine.driver_data<sapi1_state>();
	54	UINT8 *RAM = state->memregion("maincpu")->base();
	55	state->membank("bank1")->configure_entries(0, 2, &RAM[0x0000], 0xf800);
55	56	}

src/mess/machine/amigacrt.c

r14976	r14977
40	40
41	41	static int check_kickstart_12_13( running_machine &machine, const char *cart_name )
42	42	{
43		UINT16 * ksmem = (UINT16 *)(*machine.region( "user1" ));
	43	UINT16 * ksmem = (UINT16 *)(*machine.root_device().memregion( "user1" ));
44	44
45	45	if ( ksmem[2] == 0x00FC )
46	46	return 1;
r14976	r14977
138	138
139	139	static void amiga_ar1_init( running_machine &machine )
140	140	{
	141	amiga_state *state = machine.driver_data<amiga_state>();
141	142	void *ar_ram;
142	143
143	144	/* check kickstart version */
r14976	r14977
159	160	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0x9fc000, 0x9fffff, "bank3");
160	161
161	162	/* Configure Banks */
162		memory_set_bankptr(machine, "bank2", machine.region("user2")->base());
163		memory_set_bankptr(machine, "bank3", ar_ram);
	163	state->membank("bank2")->set_base(machine.root_device().memregion("user2")->base());
	164	state->membank("bank3")->set_base(ar_ram);
164	165
165	166	amigacrt.ar1_spurious = 0;
166	167
r14976	r14977
221	222	static READ16_HANDLER( amiga_ar23_mode_r )
222	223	{
223	224	amiga_state *state = space->machine().driver_data<amiga_state>();
224		UINT16 *mem = (UINT16 *)(*space->machine().region( "user2" ));
	225	UINT16 *mem = (UINT16 *)(*state->memregion( "user2" ));
225	226
226	227	if ( ACCESSING_BITS_0_7 )
227	228	{
r14976	r14977
232	233	{
233	234	UINT32 mirror_mask = state->m_chip_ram.bytes();
234	235
235		memory_set_bank(space->machine(), "bank1", 0);
	236	state->membank("bank1")->set_entry(0);
236	237
237	238	while( (mirror_mask<<1) < 0x100000 )
238	239	{
r14976	r14977
279	280	}
280	281
281	282	/* overlay the cart rom's in chipram */
282		memory_set_bank(machine, "bank1", 2);
	283	state->membank("bank1")->set_entry(2);
283	284
284	285	/* writes go to chipram */
285	286	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x000000, state->m_chip_ram.bytes() - 1, FUNC(amiga_ar23_chipmem_w));
r14976	r14977
382	383	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x400000, 0x400003, 0, mirror, FUNC(amiga_ar23_mode_w));
383	384
384	385	/* Configure Banks */
385		memory_set_bankptr(machine, "bank2", machine.region("user2")->base());
386		memory_set_bankptr(machine, "bank3", ar_ram);
	386	state->membank("bank2")->set_base(machine.root_device().memregion("user2")->base());
	387	state->membank("bank3")->set_base(ar_ram);
387	388
388		memory_configure_bank(machine, "bank1", 0, 2, state->m_chip_ram, 0);
389		memory_configure_bank(machine, "bank1", 1, 2, machine.region("user1")->base(), 0);
390		memory_configure_bank(machine, "bank1", 2, 2, machine.region("user2")->base(), 0);
	389	state->membank("bank1")->configure_entries(0, 2, state->m_chip_ram, 0);
	390	state->membank("bank1")->configure_entries(1, 2, machine.root_device().memregion("user1")->base(), 0);
	391	state->membank("bank1")->configure_entries(2, 2, machine.root_device().memregion("user2")->base(), 0);
391	392
392	393	amigacrt.ar23_mode = 3;
393	394	}
r14976	r14977
401	402	void amiga_cart_init( running_machine &machine )
402	403	{
403	404	/* see what is there */
404		UINT16 *mem = (UINT16 *)(*machine.region( "user2" ));
	405	UINT16 *mem = (UINT16 *)(*machine.root_device().memregion( "user2" ));
405	406
406	407	amigacrt.cart_type = -1;
407	408

src/mess/machine/osborne1.c

r14976	r14977
152	152	}
153	153	if ( m_bank2_enabled )
154	154	{
155		memory_set_bankptr(machine(),"bank1", machine().region("maincpu")->base() );
156		memory_set_bankptr(machine(),"bank2", m_empty_4K );
157		memory_set_bankptr(machine(),"bank3", m_empty_4K );
	155	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() );
	156	membank("bank2")->set_base(m_empty_4K );
	157	membank("bank3")->set_base(m_empty_4K );
158	158	}
159	159	else
160	160	{
161		memory_set_bankptr(machine(),"bank1", machine().device<ram_device>(RAM_TAG)->pointer() );
162		memory_set_bankptr(machine(),"bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000 );
163		memory_set_bankptr(machine(),"bank3", machine().device<ram_device>(RAM_TAG)->pointer() + 0x3000 );
	161	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() );
	162	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000 );
	163	membank("bank3")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x3000 );
164	164	}
165	165	m_bank4_ptr = machine().device<ram_device>(RAM_TAG)->pointer() + ( ( m_bank3_enabled ) ? 0x10000 : 0xF000 );
166		memory_set_bankptr(machine(),"bank4", m_bank4_ptr );
	166	membank("bank4")->set_base(m_bank4_ptr );
167	167	m_bankswitch = offset;
168	168	m_in_irq_handler = 0;
169	169	}
r14976	r14977
383	383	state->m_pia_1_irq_state = FALSE;
384	384	state->m_in_irq_handler = 0;
385	385
386		state->m_p_chargen = machine.region( "chargen" )->base();
	386	state->m_p_chargen = state->memregion( "chargen" )->base();
387	387
388	388	memset( machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000, 0xFF, 0x1000 );
389	389

src/mess/machine/amstrad.c

r14976	r14977
284	284	and not supported by this driver */
285	285	PALETTE_INIT( kccomp )
286	286	{
287		const UINT8 *color_prom = machine.region("proms")->base();
	287	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
288	288	int i;
289	289
290	290	color_prom = color_prom+0x018000;
r14976	r14977
332	332	int i;
333	333
334	334	/* CPC Colour data is stored in the colour ROM (RFCOLDAT.BIN) at 0x140-0x17f */
335		unsigned char* pal = machine.region("user4")->base();
	335	unsigned char* pal = machine.root_device().memregion("user4")->base();
336	336
337	337	for(i=0; i<32; i++)
338	338	{
r14976	r14977
1173	1173	{
1174	1174	if ((state->m_gate_array.mrer & (1<<2)) == 0 && state->m_gate_array.romdis == 0)
1175	1175	{
1176		bank_base = &machine.region("maincpu")->base()[0x010000];
	1176	bank_base = &state->memregion("maincpu")->base()[0x010000];
1177	1177	}
1178	1178	else
1179	1179	{
r14976	r14977
1182	1182	else
1183	1183	bank_base = state->m_AmstradCPC_RamBanks[0];
1184	1184	}
1185		memory_set_bankptr(machine,"bank1", bank_base);
1186		memory_set_bankptr(machine,"bank2", bank_base+0x02000);
	1185	state->membank("bank1")->set_base(bank_base);
	1186	state->membank("bank2")->set_base(bank_base+0x02000);
1187	1187	}
1188	1188	else  // CPC+/GX4000
1189	1189	{
r14976	r14977
1206	1206
1207	1207	if(state->m_AmstradCPC_RamBanks[0] != NULL)
1208	1208	{
1209		memory_set_bankptr(machine,"bank1", state->m_AmstradCPC_RamBanks[0]);
1210		memory_set_bankptr(machine,"bank2", state->m_AmstradCPC_RamBanks[0]+0x2000);
1211		memory_set_bankptr(machine,"bank3", state->m_AmstradCPC_RamBanks[1]);
1212		memory_set_bankptr(machine,"bank4", state->m_AmstradCPC_RamBanks[1]+0x2000);
1213		memory_set_bankptr(machine,"bank5", state->m_AmstradCPC_RamBanks[2]);
1214		memory_set_bankptr(machine,"bank6", state->m_AmstradCPC_RamBanks[2]+0x2000);
	1209	state->membank("bank1")->set_base(state->m_AmstradCPC_RamBanks[0]);
	1210	state->membank("bank2")->set_base(state->m_AmstradCPC_RamBanks[0]+0x2000);
	1211	state->membank("bank3")->set_base(state->m_AmstradCPC_RamBanks[1]);
	1212	state->membank("bank4")->set_base(state->m_AmstradCPC_RamBanks[1]+0x2000);
	1213	state->membank("bank5")->set_base(state->m_AmstradCPC_RamBanks[2]);
	1214	state->membank("bank6")->set_base(state->m_AmstradCPC_RamBanks[2]+0x2000);
1215	1215	}
1216	1216
1217	1217	if ( (state->m_gate_array.mrer & (1<<2)) == 0 && state->m_gate_array.romdis == 0)
r14976	r14977
1219	1219	if ( state->m_asic.enabled )
1220	1220	{
1221	1221	//              logerror("L-ROM: Lower ROM enabled, cart bank %i\n", state->m_asic.rmr2 & 0x07 );
1222		bank_base = &machine.region("maincpu")->base()[0x4000 * ( state->m_asic.rmr2 & 0x07 )];
	1222	bank_base = &machine.root_device().memregion("maincpu")->base()[0x4000 * ( state->m_asic.rmr2 & 0x07 )];
1223	1223	switch( state->m_asic.rmr2 & 0x18 )
1224	1224	{
1225	1225	case 0x00:
1226	1226	//                  logerror("L-ROM: located at &0000\n");
1227		memory_set_bankptr(machine,"bank1", bank_base);
1228		memory_set_bankptr(machine,"bank2", bank_base+0x02000);
	1227	state->membank("bank1")->set_base(bank_base);
	1228	state->membank("bank2")->set_base(bank_base+0x02000);
1229	1229	break;
1230	1230	case 0x08:
1231	1231	//                  logerror("L-ROM: located at &4000\n");
1232		memory_set_bankptr(machine,"bank3", bank_base);
1233		memory_set_bankptr(machine,"bank4", bank_base+0x02000);
	1232	state->membank("bank3")->set_base(bank_base);
	1233	state->membank("bank4")->set_base(bank_base+0x02000);
1234	1234	break;
1235	1235	case 0x10:
1236	1236	//                  logerror("L-ROM: located at &8000\n");
1237		memory_set_bankptr(machine,"bank5", bank_base);
1238		memory_set_bankptr(machine,"bank6", bank_base+0x02000);
	1237	state->membank("bank5")->set_base(bank_base);
	1238	state->membank("bank6")->set_base(bank_base+0x02000);
1239	1239	break;
1240	1240	case 0x18:
1241	1241	//                  logerror("L-ROM: located at &0000, ASIC registers enabled\n");
1242		memory_set_bankptr(machine,"bank1", bank_base);
1243		memory_set_bankptr(machine,"bank2", bank_base+0x02000);
	1242	state->membank("bank1")->set_base(bank_base);
	1243	state->membank("bank2")->set_base(bank_base+0x02000);
1244	1244	break;
1245	1245	}
1246	1246	}
1247	1247	else
1248	1248	{
1249		memory_set_bankptr( machine, "bank1", machine.region( "maincpu" )->base() );
1250		memory_set_bankptr( machine, "bank2", machine.region( "maincpu" )->base() + 0x2000 );
	1249	state->membank( "bank1" )->set_base( machine.root_device().memregion( "maincpu" )->base() );
	1250	state->membank( "bank2" )->set_base( machine.root_device().memregion( "maincpu" )->base() + 0x2000 );
1251	1251	}
1252	1252	}
1253	1253	}
r14976	r14977
1277	1277
1278	1278	if (bank_base)
1279	1279	{
1280		memory_set_bankptr(machine,"bank7", bank_base);
1281		memory_set_bankptr(machine,"bank8", bank_base+0x2000);
	1280	state->membank("bank7")->set_base(bank_base);
	1281	state->membank("bank8")->set_base(bank_base+0x2000);
1282	1282	}
1283	1283	}
1284	1284
r14976	r14977
1725	1725	switch(page)
1726	1726	{
1727	1727	case 0:  /* 0x0000 - 0x3fff */
1728		memory_set_bankptr(machine(),"bank1",ram+ramptr);
1729		memory_set_bankptr(machine(),"bank2",ram+ramptr+0x2000);
1730		memory_set_bankptr(machine(),"bank9",ram+ramptr);
1731		memory_set_bankptr(machine(),"bank10",ram+ramptr+0x2000);
	1728	membank("bank1")->set_base(ram+ramptr);
	1729	membank("bank2")->set_base(ram+ramptr+0x2000);
	1730	membank("bank9")->set_base(ram+ramptr);
	1731	membank("bank10")->set_base(ram+ramptr+0x2000);
1732	1732	m_Aleste_RamBanks[0] = ram+ramptr;
1733	1733	m_aleste_active_page[0] = data;
1734	1734	logerror("RAM: RAM location 0x%06x (page %02x) mapped to 0x0000\n",ramptr,rampage);
1735	1735	break;
1736	1736	case 1:  /* 0x4000 - 0x7fff */
1737		memory_set_bankptr(machine(),"bank3",ram+ramptr);
1738		memory_set_bankptr(machine(),"bank4",ram+ramptr+0x2000);
1739		memory_set_bankptr(machine(),"bank11",ram+ramptr);
1740		memory_set_bankptr(machine(),"bank12",ram+ramptr+0x2000);
	1737	membank("bank3")->set_base(ram+ramptr);
	1738	membank("bank4")->set_base(ram+ramptr+0x2000);
	1739	membank("bank11")->set_base(ram+ramptr);
	1740	membank("bank12")->set_base(ram+ramptr+0x2000);
1741	1741	m_Aleste_RamBanks[1] = ram+ramptr;
1742	1742	m_aleste_active_page[1] = data;
1743	1743	logerror("RAM: RAM location 0x%06x (page %02x) mapped to 0x4000\n",ramptr,rampage);
1744	1744	break;
1745	1745	case 2:  /* 0x8000 - 0xbfff */
1746		memory_set_bankptr(machine(),"bank5",ram+ramptr);
1747		memory_set_bankptr(machine(),"bank6",ram+ramptr+0x2000);
1748		memory_set_bankptr(machine(),"bank13",ram+ramptr);
1749		memory_set_bankptr(machine(),"bank14",ram+ramptr+0x2000);
	1746	membank("bank5")->set_base(ram+ramptr);
	1747	membank("bank6")->set_base(ram+ramptr+0x2000);
	1748	membank("bank13")->set_base(ram+ramptr);
	1749	membank("bank14")->set_base(ram+ramptr+0x2000);
1750	1750	m_Aleste_RamBanks[2] = ram+ramptr;
1751	1751	m_aleste_active_page[2] = data;
1752	1752	logerror("RAM: RAM location 0x%06x (page %02x) mapped to 0x8000\n",ramptr,rampage);
1753	1753	break;
1754	1754	case 3:  /* 0xc000 - 0xffff */
1755		memory_set_bankptr(machine(),"bank7",ram+ramptr);
1756		memory_set_bankptr(machine(),"bank8",ram+ramptr+0x2000);
1757		memory_set_bankptr(machine(),"bank15",ram+ramptr);
1758		memory_set_bankptr(machine(),"bank16",ram+ramptr+0x2000);
	1755	membank("bank7")->set_base(ram+ramptr);
	1756	membank("bank8")->set_base(ram+ramptr+0x2000);
	1757	membank("bank15")->set_base(ram+ramptr);
	1758	membank("bank16")->set_base(ram+ramptr+0x2000);
1759	1759	m_Aleste_RamBanks[3] = ram+ramptr;
1760	1760	m_aleste_active_page[3] = data;
1761	1761	logerror("RAM: RAM location 0x%06x (page %02x) mapped to 0xc000\n",ramptr,rampage);
r14976	r14977
2314	2314	{
2315	2315	if(state->m_aleste_mode & 0x04)
2316	2316	{
2317		memory_set_bankptr(machine,"bank3", state->m_Aleste_RamBanks[1]);
2318		memory_set_bankptr(machine,"bank4", state->m_Aleste_RamBanks[1]+0x2000);
	2317	state->membank("bank3")->set_base(state->m_Aleste_RamBanks[1]);
	2318	state->membank("bank4")->set_base(state->m_Aleste_RamBanks[1]+0x2000);
2319	2319	/* bank 2 - 0x08000..0x0bfff */
2320		memory_set_bankptr(machine,"bank5", state->m_Aleste_RamBanks[2]);
2321		memory_set_bankptr(machine,"bank6", state->m_Aleste_RamBanks[2]+0x2000);
	2320	state->membank("bank5")->set_base(state->m_Aleste_RamBanks[2]);
	2321	state->membank("bank6")->set_base(state->m_Aleste_RamBanks[2]+0x2000);
2322	2322	}
2323	2323	else
2324	2324	{
2325		memory_set_bankptr(machine,"bank3", state->m_AmstradCPC_RamBanks[1]);
2326		memory_set_bankptr(machine,"bank4", state->m_AmstradCPC_RamBanks[1]+0x2000);
	2325	state->membank("bank3")->set_base(state->m_AmstradCPC_RamBanks[1]);
	2326	state->membank("bank4")->set_base(state->m_AmstradCPC_RamBanks[1]+0x2000);
2327	2327	/* bank 2 - 0x08000..0x0bfff */
2328		memory_set_bankptr(machine,"bank5", state->m_AmstradCPC_RamBanks[2]);
2329		memory_set_bankptr(machine,"bank6", state->m_AmstradCPC_RamBanks[2]+0x2000);
	2328	state->membank("bank5")->set_base(state->m_AmstradCPC_RamBanks[2]);
	2329	state->membank("bank6")->set_base(state->m_AmstradCPC_RamBanks[2]+0x2000);
2330	2330	}
2331	2331	}
2332	2332	else
r14976	r14977
2338	2338	/* other banks */
2339	2339	if(state->m_aleste_mode & 0x04)
2340	2340	{
2341		memory_set_bankptr(machine,"bank9", state->m_Aleste_RamBanks[0]);
2342		memory_set_bankptr(machine,"bank10", state->m_Aleste_RamBanks[0]+0x2000);
2343		memory_set_bankptr(machine,"bank11", state->m_Aleste_RamBanks[1]);
2344		memory_set_bankptr(machine,"bank12", state->m_Aleste_RamBanks[1]+0x2000);
2345		memory_set_bankptr(machine,"bank13", state->m_Aleste_RamBanks[2]);
2346		memory_set_bankptr(machine,"bank14", state->m_Aleste_RamBanks[2]+0x2000);
2347		memory_set_bankptr(machine,"bank15", state->m_Aleste_RamBanks[3]);
2348		memory_set_bankptr(machine,"bank16", state->m_Aleste_RamBanks[3]+0x2000);
	2341	state->membank("bank9")->set_base(state->m_Aleste_RamBanks[0]);
	2342	state->membank("bank10")->set_base(state->m_Aleste_RamBanks[0]+0x2000);
	2343	state->membank("bank11")->set_base(state->m_Aleste_RamBanks[1]);
	2344	state->membank("bank12")->set_base(state->m_Aleste_RamBanks[1]+0x2000);
	2345	state->membank("bank13")->set_base(state->m_Aleste_RamBanks[2]);
	2346	state->membank("bank14")->set_base(state->m_Aleste_RamBanks[2]+0x2000);
	2347	state->membank("bank15")->set_base(state->m_Aleste_RamBanks[3]);
	2348	state->membank("bank16")->set_base(state->m_Aleste_RamBanks[3]+0x2000);
2349	2349	}
2350	2350	else
2351	2351	{
2352		memory_set_bankptr(machine,"bank9", state->m_AmstradCPC_RamBanks[0]);
2353		memory_set_bankptr(machine,"bank10", state->m_AmstradCPC_RamBanks[0]+0x2000);
2354		memory_set_bankptr(machine,"bank11", state->m_AmstradCPC_RamBanks[1]);
2355		memory_set_bankptr(machine,"bank12", state->m_AmstradCPC_RamBanks[1]+0x2000);
2356		memory_set_bankptr(machine,"bank13", state->m_AmstradCPC_RamBanks[2]);
2357		memory_set_bankptr(machine,"bank14", state->m_AmstradCPC_RamBanks[2]+0x2000);
2358		memory_set_bankptr(machine,"bank15", state->m_AmstradCPC_RamBanks[3]);
2359		memory_set_bankptr(machine,"bank16", state->m_AmstradCPC_RamBanks[3]+0x2000);
	2352	state->membank("bank9")->set_base(state->m_AmstradCPC_RamBanks[0]);
	2353	state->membank("bank10")->set_base(state->m_AmstradCPC_RamBanks[0]+0x2000);
	2354	state->membank("bank11")->set_base(state->m_AmstradCPC_RamBanks[1]);
	2355	state->membank("bank12")->set_base(state->m_AmstradCPC_RamBanks[1]+0x2000);
	2356	state->membank("bank13")->set_base(state->m_AmstradCPC_RamBanks[2]);
	2357	state->membank("bank14")->set_base(state->m_AmstradCPC_RamBanks[2]+0x2000);
	2358	state->membank("bank15")->set_base(state->m_AmstradCPC_RamBanks[3]);
	2359	state->membank("bank16")->set_base(state->m_AmstradCPC_RamBanks[3]+0x2000);
2360	2360	}
2361	2361
2362	2362	/* multiface hardware enabled? */
r14976	r14977
2912	2912	{
2913	2913	amstrad_state *state = machine.driver_data<amstrad_state>();
2914	2914	int i;
2915		UINT8 *rom = machine.region("maincpu")->base();
	2915	UINT8 *rom = state->memregion("maincpu")->base();
2916	2916
2917	2917	for (i=0; i<256; i++)
2918	2918	{
r14976	r14977
2936	2936	MACHINE_START( plus )
2937	2937	{
2938	2938	amstrad_state *state = machine.driver_data<amstrad_state>();
2939		state->m_asic.ram = machine.region("user1")->base();  // 16kB RAM for ASIC, memory-mapped registers.
	2939	state->m_asic.ram = state->memregion("user1")->base();  // 16kB RAM for ASIC, memory-mapped registers.
2940	2940	state->m_system_type = SYSTEM_PLUS;
2941	2941	}
2942	2942
r14976	r14977
2945	2945	{
2946	2946	amstrad_state *state = machine.driver_data<amstrad_state>();
2947	2947	int i;
2948		UINT8 *rom = machine.region("maincpu")->base();
	2948	UINT8 *rom = state->memregion("maincpu")->base();
2949	2949
2950	2950	for (i=0; i<128; i++)  // fill ROM table
2951	2951	{
r14976	r14977
2983	2983	MACHINE_START( gx4000 )
2984	2984	{
2985	2985	amstrad_state *state = machine.driver_data<amstrad_state>();
2986		state->m_asic.ram = machine.region("user1")->base();  // 16kB RAM for ASIC, memory-mapped registers.
	2986	state->m_asic.ram = state->memregion("user1")->base();  // 16kB RAM for ASIC, memory-mapped registers.
2987	2987	state->m_system_type = SYSTEM_GX4000;
2988	2988	}
2989	2989
r14976	r14977
2991	2991	{
2992	2992	amstrad_state *state = machine.driver_data<amstrad_state>();
2993	2993	int i;
2994		UINT8 *rom = machine.region("maincpu")->base();
	2994	UINT8 *rom = state->memregion("maincpu")->base();
2995	2995
2996	2996	for (i=0; i<128; i++)  // fill ROM table
2997	2997	{
r14976	r14977
3037	3037	{
3038	3038	amstrad_state *state = machine.driver_data<amstrad_state>();
3039	3039	int i;
3040		UINT8 *rom = machine.region("maincpu")->base();
	3040	UINT8 *rom = state->memregion("maincpu")->base();
3041	3041
3042	3042	for (i=0; i<256; i++)
3043	3043	{
r14976	r14977
3067	3067	{
3068	3068	amstrad_state *state = machine.driver_data<amstrad_state>();
3069	3069	int i;
3070		UINT8 *rom = machine.region("maincpu")->base();
	3070	UINT8 *rom = state->memregion("maincpu")->base();
3071	3071
3072	3072	for (i=0; i<256; i++)
3073	3073	{
r14976	r14977
3128	3128	int chunksize;                // chunk length, calcaulated from the above
3129	3129	int ramblock;                 // 16k RAM block chunk is to be loaded in to
3130	3130	unsigned int bytes_to_read;   // total bytes to read, as mame_feof doesn't react to EOF without trying to go past it.
3131		unsigned char* mem = image.device().machine().region("maincpu")->base();
	3131	unsigned char* mem = image.device().machine().root_device().memregion("maincpu")->base();
3132	3132
3133	3133	if (image.software_entry() == NULL)
3134	3134	{

src/mess/machine/sms.c

r14976	r14977
84	84	case 0x0000:
85	85	m_banking_cart[1] = bank_start;
86	86	m_banking_cart[2] = bank_start + 0x400;
87		memory_set_bankptr(machine(), "bank1", m_banking_cart[1]);
88		memory_set_bankptr(machine(), "bank2", m_banking_cart[2]);
	87	membank("bank1")->set_base(m_banking_cart[1]);
	88	membank("bank2")->set_base(m_banking_cart[2]);
89	89	break;
90	90
91	91	case 0x0400:
92	92	m_banking_cart[2] = bank_start + 0x400;
93		memory_set_bankptr(machine(), "bank2", m_banking_cart[2]);
	93	membank("bank2")->set_base(m_banking_cart[2]);
94	94	break;
95	95
96	96	case 0x2000:
97	97	m_banking_cart[7] = bank_start;
98		memory_set_bankptr(machine(), "bank7", m_banking_cart[7]);
	98	membank("bank7")->set_base(m_banking_cart[7]);
99	99	break;
100	100
101	101	case 0x4000:
102	102	m_banking_cart[3] = bank_start;
103		memory_set_bankptr(machine(), "bank3", m_banking_cart[3]);
	103	membank("bank3")->set_base(m_banking_cart[3]);
104	104	break;
105	105
106	106	case 0x6000:
107	107	m_banking_cart[4] = bank_start;
108		memory_set_bankptr(machine(), "bank4", m_banking_cart[4]);
	108	membank("bank4")->set_base(m_banking_cart[4]);
109	109	break;
110	110
111	111	case 0x8000:
112	112	m_banking_cart[5] = bank_start;
113		memory_set_bankptr(machine(), "bank5", m_banking_cart[5]);
	113	membank("bank5")->set_base(m_banking_cart[5]);
114	114	break;
115	115
116	116	case 0xA000:
117	117	m_banking_cart[6] = bank_start;
118		memory_set_bankptr(machine(), "bank6", m_banking_cart[6]);
	118	membank("bank6")->set_base(m_banking_cart[6]);
119	119	break;
120	120
121	121	default:
r14976	r14977
169	169	{
170	170	case 0x0000:
171	171	m_banking_bios[1] = bank_start;
172		memory_set_bankptr(machine(), "bank1", m_banking_bios[1]);
	172	membank("bank1")->set_base(m_banking_bios[1]);
173	173	break;
174	174
175	175	case 0x0400:
r14976	r14977
178	178	break;
179	179	}
180	180	m_banking_bios[2] = bank_start + 0x400;
181		memory_set_bankptr(machine(), "bank2", m_banking_bios[2]);
	181	membank("bank2")->set_base(m_banking_bios[2]);
182	182	break;
183	183
184	184	case 0x2000:
r14976	r14977
187	187	break;
188	188	}
189	189	m_banking_bios[7] = bank_start;
190		memory_set_bankptr(machine(), "bank7", m_banking_bios[7]);
	190	membank("bank7")->set_base(m_banking_bios[7]);
191	191	break;
192	192
193	193	case 0x4000:
r14976	r14977
196	196	break;
197	197	}
198	198	m_banking_bios[3] = bank_start;
199		memory_set_bankptr(machine(), "bank3", m_banking_bios[3]);
	199	membank("bank3")->set_base(m_banking_bios[3]);
200	200	break;
201	201
202	202	case 0x6000:
r14976	r14977
205	205	break;
206	206	}
207	207	m_banking_bios[4] = bank_start;
208		memory_set_bankptr(machine(), "bank4", m_banking_bios[4]);
	208	membank("bank4")->set_base(m_banking_bios[4]);
209	209	break;
210	210
211	211	case 0x8000:
r14976	r14977
214	214	break;
215	215	}
216	216	m_banking_bios[5] = bank_start;
217		memory_set_bankptr(machine(), "bank5", m_banking_bios[5]);
	217	membank("bank5")->set_base(m_banking_bios[5]);
218	218	break;
219	219
220	220	case 0xA000:
r14976	r14977
223	223	break;
224	224	}
225	225	m_banking_bios[6] = bank_start;
226		memory_set_bankptr(machine(), "bank6", m_banking_bios[6]);
	226	membank("bank6")->set_base(m_banking_bios[6]);
227	227	break;
228	228
229	229	default:
r14976	r14977
1019	1019	{
1020	1020	sram = m_cartridge[m_current_cartridge].cartSRAM;
1021	1021	}
1022		memory_set_bankptr(machine(),  "bank5", sram);
1023		memory_set_bankptr(machine(),  "bank6", sram + 0x2000);
	1022	membank("bank5")->set_base(sram);
	1023	membank("bank6")->set_base(sram + 0x2000);
1024	1024	}
1025	1025	}
1026	1026	else /* it's rom */
r14976	r14977
1155	1155	if (data & 0x80)
1156	1156	{
1157	1157	m_cartridge[m_current_cartridge].ram_page = data & 0x07;
1158		memory_set_bankptr(machine(), "bank6", m_cartridge[m_current_cartridge].cartRAM + m_cartridge[m_current_cartridge].ram_page * 0x2000);
	1158	membank("bank6")->set_base(m_cartridge[m_current_cartridge].cartRAM + m_cartridge[m_current_cartridge].ram_page * 0x2000);
1159	1159	}
1160	1160	else
1161	1161	{
1162	1162	map_cart_16k( 0x4000, data );
1163		memory_set_bankptr(machine(), "bank6", m_banking_cart[5] + 0x2000);
	1163	membank("bank6")->set_base(m_banking_cart[5] + 0x2000);
1164	1164	}
1165	1165	}
1166	1166	}
r14976	r14977
1285	1285	if (!m_cartridge[m_current_cartridge].ROM)
1286	1286	return;
1287	1287	m_banking_cart[5] = m_cartridge[m_current_cartridge].ROM + page * 0x4000;
1288		memory_set_bankptr(machine(), "bank5", m_banking_cart[5]);
1289		memory_set_bankptr(machine(), "bank6", m_banking_cart[5] + 0x2000);
	1288	membank("bank5")->set_base(m_banking_cart[5]);
	1289	membank("bank6")->set_base(m_banking_cart[5] + 0x2000);
1290	1290	LOG(("rom 2 paged in %x (Codemasters mapper).\n", page));
1291	1291	}
1292	1292	else if (m_cartridge[m_current_cartridge].features & CF_ONCART_RAM)
r14976	r14977
1366	1366	static void setup_rom( address_space *space )
1367	1367	{
1368	1368	sms_state *state = space->machine().driver_data<sms_state>();
1369		running_machine &machine = space->machine();
1370
	1369
1371	1370	/* 1. set up bank pointers to point to nothing */
1372		memory_set_bankptr(machine, "bank1", state->m_banking_none);
1373		memory_set_bankptr(machine, "bank2", state->m_banking_none);
1374		memory_set_bankptr(machine, "bank7", state->m_banking_none);
1375		memory_set_bankptr(machine, "bank3", state->m_banking_none);
1376		memory_set_bankptr(machine, "bank4", state->m_banking_none);
1377		memory_set_bankptr(machine, "bank5", state->m_banking_none);
1378		memory_set_bankptr(machine, "bank6", state->m_banking_none);
	1371	state->membank("bank1")->set_base(state->m_banking_none);
	1372	state->membank("bank2")->set_base(state->m_banking_none);
	1373	state->membank("bank7")->set_base(state->m_banking_none);
	1374	state->membank("bank3")->set_base(state->m_banking_none);
	1375	state->membank("bank4")->set_base(state->m_banking_none);
	1376	state->membank("bank5")->set_base(state->m_banking_none);
	1377	state->membank("bank6")->set_base(state->m_banking_none);
1379	1378
1380	1379	/* 2. check and set up expansion port */
1381	1380	if (!(state->m_bios_port & IO_EXPANSION) && (state->m_bios_port & IO_CARTRIDGE) && (state->m_bios_port & IO_CARD))
r14976	r14977
1396	1395	/* Out Run Europa initially writes a value to port 3E where IO_CARTRIDGE, IO_EXPANSION and IO_CARD are reset */
1397	1396	if ((!(state->m_bios_port & IO_CARTRIDGE)) || state->m_is_gamegear)
1398	1397	{
1399		memory_set_bankptr(machine, "bank1", state->m_banking_cart[1]);
1400		memory_set_bankptr(machine, "bank2", state->m_banking_cart[2]);
1401		memory_set_bankptr(machine, "bank7", state->m_banking_cart[7]);
1402		memory_set_bankptr(machine, "bank3", state->m_banking_cart[3]);
1403		memory_set_bankptr(machine, "bank4", state->m_banking_cart[3] + 0x2000);
1404		memory_set_bankptr(machine, "bank5", state->m_banking_cart[5]);
1405		memory_set_bankptr(machine, "bank6", state->m_banking_cart[5] + 0x2000);
	1398	state->membank("bank1")->set_base(state->m_banking_cart[1]);
	1399	state->membank("bank2")->set_base(state->m_banking_cart[2]);
	1400	state->membank("bank7")->set_base(state->m_banking_cart[7]);
	1401	state->membank("bank3")->set_base(state->m_banking_cart[3]);
	1402	state->membank("bank4")->set_base(state->m_banking_cart[3] + 0x2000);
	1403	state->membank("bank5")->set_base(state->m_banking_cart[5]);
	1404	state->membank("bank6")->set_base(state->m_banking_cart[5] + 0x2000);
1406	1405	logerror("Switched in cartridge rom.\n");
1407	1406	}
1408	1407
r14976	r14977
1412	1411	/* 0x0400 bioses */
1413	1412	if (state->m_has_bios_0400)
1414	1413	{
1415		memory_set_bankptr(machine, "bank1", state->m_banking_bios[1]);
	1414	state->membank("bank1")->set_base(state->m_banking_bios[1]);
1416	1415	logerror("Switched in 0x0400 bios.\n");
1417	1416	}
1418	1417	/* 0x2000 bioses */
1419	1418	if (state->m_has_bios_2000)
1420	1419	{
1421		memory_set_bankptr(machine, "bank1", state->m_banking_bios[1]);
1422		memory_set_bankptr(machine, "bank2", state->m_banking_bios[2]);
	1420	state->membank("bank1")->set_base(state->m_banking_bios[1]);
	1421	state->membank("bank2")->set_base(state->m_banking_bios[2]);
1423	1422	logerror("Switched in 0x2000 bios.\n");
1424	1423	}
1425	1424	if (state->m_has_bios_full)
1426	1425	{
1427		memory_set_bankptr(machine, "bank1", state->m_banking_bios[1]);
1428		memory_set_bankptr(machine, "bank2", state->m_banking_bios[2]);
1429		memory_set_bankptr(machine, "bank7", state->m_banking_bios[7]);
1430		memory_set_bankptr(machine, "bank3", state->m_banking_bios[3]);
1431		memory_set_bankptr(machine, "bank4", state->m_banking_bios[3] + 0x2000);
1432		memory_set_bankptr(machine, "bank5", state->m_banking_bios[5]);
1433		memory_set_bankptr(machine, "bank6", state->m_banking_bios[5] + 0x2000);
	1426	state->membank("bank1")->set_base(state->m_banking_bios[1]);
	1427	state->membank("bank2")->set_base(state->m_banking_bios[2]);
	1428	state->membank("bank7")->set_base(state->m_banking_bios[7]);
	1429	state->membank("bank3")->set_base(state->m_banking_bios[3]);
	1430	state->membank("bank4")->set_base(state->m_banking_bios[3] + 0x2000);
	1431	state->membank("bank5")->set_base(state->m_banking_bios[5]);
	1432	state->membank("bank6")->set_base(state->m_banking_bios[5] + 0x2000);
1434	1433	logerror("Switched in full bios.\n");
1435	1434	}
1436	1435	}
1437	1436
1438	1437	if (state->m_cartridge[state->m_current_cartridge].features & CF_ONCART_RAM)
1439	1438	{
1440		memory_set_bankptr(machine, "bank5", state->m_cartridge[state->m_current_cartridge].cartRAM);
1441		memory_set_bankptr(machine, "bank6", state->m_cartridge[state->m_current_cartridge].cartRAM);
	1439	state->membank("bank5")->set_base(state->m_cartridge[state->m_current_cartridge].cartRAM);
	1440	state->membank("bank6")->set_base(state->m_cartridge[state->m_current_cartridge].cartRAM);
1442	1441	}
1443	1442	}
1444	1443
r14976	r14977
1890	1889	static void setup_banks( running_machine &machine )
1891	1890	{
1892	1891	sms_state *state = machine.driver_data<sms_state>();
1893		UINT8 *mem = machine.region("maincpu")->base();
	1892	UINT8 *mem = machine.root_device().memregion("maincpu")->base();
1894	1893	state->m_banking_none = mem;
1895	1894	state->m_banking_bios[1] = state->m_banking_cart[1] = mem;
1896	1895	state->m_banking_bios[2] = state->m_banking_cart[2] = mem;
r14976	r14977
1900	1899	state->m_banking_bios[6] = state->m_banking_cart[6] = mem;
1901	1900	state->m_banking_bios[7] = state->m_banking_cart[7] = mem;
1902	1901
1903		state->m_BIOS = machine.region("user1")->base();
	1902	state->m_BIOS = machine.root_device().memregion("user1")->base();
1904	1903
1905		state->m_bios_page_count = (state->m_BIOS ? machine.region("user1")->bytes() / 0x4000 : 0);
	1904	state->m_bios_page_count = (state->m_BIOS ? state->memregion("user1")->bytes() / 0x4000 : 0);
1906	1905
1907	1906	setup_cart_banks(machine);
1908	1907
r14976	r14977
2063	2062	m_current_cartridge = slot;
2064	2063
2065	2064	setup_cart_banks(machine());
2066		memory_set_bankptr(machine(), "bank10", m_banking_cart[3] + 0x2000);
	2065	membank("bank10")->set_base(m_banking_cart[3] + 0x2000);
2067	2066	setup_rom(&space);
2068	2067	}
2069	2068

src/mess/machine/nes_pcb.c

r14976	r14977
1729	1729	{
1730	1730	state->m_prg_bank[0] = state->m_prg_chunks + (bank1 & 0x06);
1731	1731	state->m_prg_bank[1] = state->m_prg_chunks + (bank1 & 0x06) + 1;
1732		memory_set_bank(machine, "bank1", state->m_prg_bank[0]);
1733		memory_set_bank(machine, "bank2", state->m_prg_bank[1]);
	1732	state->membank("bank1")->set_entry(state->m_prg_bank[0]);
	1733	state->membank("bank2")->set_entry(state->m_prg_bank[1]);
1734	1734	}
1735	1735	else
1736	1736	prg16_89ab(machine, bank1 >> 1);
r14976	r14977
1747	1747	{
1748	1748	state->m_prg_bank[0] = state->m_prg_chunks + (bank1 & 0x06);
1749	1749	state->m_prg_bank[1] = state->m_prg_chunks + (bank1 & 0x06) + 1;
1750		memory_set_bank(machine, "bank1", state->m_prg_bank[0]);
1751		memory_set_bank(machine, "bank2", state->m_prg_bank[1]);
	1750	state->membank("bank1")->set_entry(state->m_prg_bank[0]);
	1751	state->membank("bank2")->set_entry(state->m_prg_bank[1]);
1752	1752	}
1753	1753	else
1754	1754	prg16_89ab(machine, (bank1 & 0x7f) >> 1);
r14976	r14977
1756	1756	if (!BIT(bank3, 7))
1757	1757	{
1758	1758	state->m_prg_bank[2] = state->m_prg_chunks + (bank3 & 0x07);
1759		memory_set_bank(machine, "bank3", state->m_prg_bank[2]);
	1759	state->membank("bank3")->set_entry(state->m_prg_bank[2]);
1760	1760	}
1761	1761	else
1762	1762	prg8_cd(machine, bank3 & 0x7f);
r14976	r14977
1773	1773	if (!BIT(bank1, 7))
1774	1774	{
1775	1775	state->m_prg_bank[0] = state->m_prg_chunks + (bank1 & 0x07);
1776		memory_set_bank(machine, "bank1", state->m_prg_bank[0]);
	1776	state->membank("bank1")->set_entry(state->m_prg_bank[0]);
1777	1777	}
1778	1778	else
1779	1779	prg8_89(machine, bank1 & 0x7f);
r14976	r14977
1781	1781	if (!BIT(bank2, 7))
1782	1782	{
1783	1783	state->m_prg_bank[1] = state->m_prg_chunks + (bank2 & 0x07);
1784		memory_set_bank(machine, "bank2", state->m_prg_bank[1]);
	1784	state->membank("bank2")->set_entry(state->m_prg_bank[1]);
1785	1785	}
1786	1786	else
1787	1787	prg8_ab(machine, bank2 & 0x7f);
r14976	r14977
1789	1789	if (!BIT(bank3, 7))
1790	1790	{
1791	1791	state->m_prg_bank[2] = state->m_prg_chunks + (bank3 & 0x07);
1792		memory_set_bank(machine, "bank3", state->m_prg_bank[2]);
	1792	state->membank("bank3")->set_entry(state->m_prg_bank[2]);
1793	1793	}
1794	1794	else
1795	1795	prg8_cd(machine, bank3 & 0x7f);
r14976	r14977
2500	2500	// is PRG RAM
2501	2501	space->install_write_bank(0x6000, 0x7fff, "bank5");
2502	2502	state->m_prg_bank[4] = state->m_battery_bank5_start + (data & 0x3f);
2503		memory_set_bank(space->machine(), "bank5", state->m_prg_bank[4]);
	2503	state->membank("bank5")->set_entry(state->m_prg_bank[4]);
2504	2504	}
2505	2505	break;
2506	2506
r14976	r14977
8854	8854	{
8855	8855	if (bank * 2 >= state->m_prg_chunks)
8856	8856	{
8857		memory_set_bankptr(space->machine(), "bank3", state->m_wram);
8858		memory_set_bankptr(space->machine(), "bank4", state->m_wram);
	8857	state->membank("bank3")->set_base(state->m_wram);
	8858	state->membank("bank4")->set_base(state->m_wram);
8859	8859	}
8860	8860	else
8861	8861	{
r14976	r14977
8867	8867	{
8868	8868	if (bank * 2 >= state->m_prg_chunks)
8869	8869	{
8870		memory_set_bankptr(space->machine(), "bank1", state->m_wram);
8871		memory_set_bankptr(space->machine(), "bank2", state->m_wram);
	8870	state->membank("bank1")->set_base(state->m_wram);
	8871	state->membank("bank2")->set_base(state->m_wram);
8872	8872	}
8873	8873	else
8874	8874	{
r14976	r14977
8881	8881	{
8882	8882	if (bank * 2 >= state->m_prg_chunks)
8883	8883	{
8884		memory_set_bankptr(space->machine(), "bank1", state->m_wram);
8885		memory_set_bankptr(space->machine(), "bank2", state->m_wram);
8886		memory_set_bankptr(space->machine(), "bank3", state->m_wram);
8887		memory_set_bankptr(space->machine(), "bank4", state->m_wram);
	8884	state->membank("bank1")->set_base(state->m_wram);
	8885	state->membank("bank2")->set_base(state->m_wram);
	8886	state->membank("bank3")->set_base(state->m_wram);
	8887	state->membank("bank4")->set_base(state->m_wram);
8888	8888	}
8889	8889	else
8890	8890	{

src/mess/machine/llc.c

r14976	r14977
112	112
113	113	MACHINE_RESET( llc2 )
114	114	{
	115	llc_state *state = machine.driver_data<llc_state>();
115	116	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
116	117
117	118	space->unmap_write(0x0000, 0x3fff);
118		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base());
	119	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
119	120
120	121	space->unmap_write(0x4000, 0x5fff);
121		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x4000);
	122	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x4000);
122	123
123	124	space->unmap_write(0x6000, 0xbfff);
124		memory_set_bankptr(machine, "bank3", machine.region("maincpu")->base() + 0x6000);
	125	state->membank("bank3")->set_base(machine.root_device().memregion("maincpu")->base() + 0x6000);
125	126
126	127	space->install_write_bank(0xc000, 0xffff, "bank4");
127		memory_set_bankptr(machine, "bank4", machine.device<ram_device>(RAM_TAG)->pointer() + 0xc000);
	128	state->membank("bank4")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xc000);
128	129
129	130	}
130	131
r14976	r14977
134	135	UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
135	136
136	137	mem_space->install_write_bank(0x0000, 0xbfff, "bank1");
137		memory_set_bankptr(machine(), "bank1", ram);
	138	membank("bank1")->set_base(ram);
138	139
139	140	mem_space->install_write_bank(0x4000, 0x5fff, "bank2");
140		memory_set_bankptr(machine(), "bank2", ram + 0x4000);
	141	membank("bank2")->set_base(ram + 0x4000);
141	142
142	143	mem_space->install_write_bank(0x6000, 0xbfff, "bank3");
143		memory_set_bankptr(machine(), "bank3", ram + 0x6000);
	144	membank("bank3")->set_base(ram + 0x6000);
144	145
145	146	mem_space->install_write_bank(0xc000, 0xffff, "bank4");
146		memory_set_bankptr(machine(), "bank4", ram + 0xc000);
	147	membank("bank4")->set_base(ram + 0xc000);
147	148
148	149	}
149	150
r14976	r14977
153	154	address_space *mem_space = machine().device("maincpu")->memory().space(AS_PROGRAM);
154	155	if (data & 0x02) {
155	156	mem_space->unmap_write(0x4000, 0x5fff);
156		memory_set_bankptr(machine(), "bank2", machine().region("maincpu")->base() + 0x10000);
	157	membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
157	158	} else {
158	159	mem_space->install_write_bank(0x4000, 0x5fff, "bank2");
159		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0x4000);
	160	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x4000);
160	161	}
161	162
162	163	}
r14976	r14977
178	179	}
179	180	static READ8_DEVICE_HANDLER (llc2_port_a_r)
180	181	{
181		UINT8 *k7659 = device->machine().region("k7659")->base();
	182	UINT8 *k7659 = device->machine().root_device().memregion("k7659")->base();
182	183	UINT8 retVal = 0;
183	184	UINT8 a1 = input_port_read(device->machine(), "A1");
184	185	UINT8 a2 = input_port_read(device->machine(), "A2");

src/mess/machine/odyssey2.c

r14976	r14977
19	19	switch ( state->m_cart_size ) {
20	20	case 12288:
21	21	/* 12KB cart support (for instance, KTAA as released) */
22		memory_set_bankptr( machine, "bank1", machine.region("user1")->base() + (state->m_p1 & 0x03) * 0xC00 );
23		memory_set_bankptr( machine, "bank2", machine.region("user1")->base() + (state->m_p1 & 0x03) * 0xC00 + 0x800 );
	22	state->membank( "bank1" )->set_base( machine.root_device().memregion("user1")->base() + (state->m_p1 & 0x03) * 0xC00 );
	23	state->membank( "bank2" )->set_base( machine.root_device().memregion("user1")->base() + (state->m_p1 & 0x03) * 0xC00 + 0x800 );
24	24	break;
25	25	case 16384:
26	26	/* 16KB cart support (for instance, full sized version KTAA) */
27		memory_set_bankptr( machine, "bank1", machine.region("user1")->base() + (state->m_p1 & 0x03) * 0x1000 + 0x400 );
28		memory_set_bankptr( machine, "bank2", machine.region("user1")->base() + (state->m_p1 & 0x03) * 0x1000 + 0xC00 );
	27	state->membank( "bank1" )->set_base( machine.root_device().memregion("user1")->base() + (state->m_p1 & 0x03) * 0x1000 + 0x400 );
	28	state->membank( "bank2" )->set_base( machine.root_device().memregion("user1")->base() + (state->m_p1 & 0x03) * 0x1000 + 0xC00 );
29	29	break;
30	30	default:
31		memory_set_bankptr(machine, "bank1", machine.region("user1")->base() + (state->m_p1 & 0x03) * 0x800);
32		memory_set_bankptr(machine, "bank2", machine.region("user1")->base() + (state->m_p1 & 0x03) * 0x800 );
	31	state->membank("bank1")->set_base(machine.root_device().memregion("user1")->base() + (state->m_p1 & 0x03) * 0x800);
	32	state->membank("bank2")->set_base(state->memregion("user1")->base() + (state->m_p1 & 0x03) * 0x800 );
33	33	break;
34	34	}
35	35	}
r14976	r14977
48	48	odyssey2_state *state = machine.driver_data<odyssey2_state>();
49	49	int i;
50	50	int size = 0;
51		UINT8 *gfx = machine.region("gfx1")->base();
	51	UINT8 *gfx = state->memregion("gfx1")->base();
52	52	device_image_interface *image = dynamic_cast<device_image_interface *>(machine.device("cart"));
53	53
54	54	state->m_ram        = auto_alloc_array(machine, UINT8, 256);

src/mess/machine/kc_d004.c

r14976	r14977
142	142
143	143	void kc_d004_device::device_start()
144	144	{
145		m_rom  = subregion(Z80_TAG)->base();
	145	m_rom  = memregion(Z80_TAG)->base();
146	146
147	147	m_reset_timer = timer_alloc(TIMER_RESET);
148	148	m_tc_clear_timer = timer_alloc(TIMER_TC_CLEAR);

src/mess/machine/tandy1t.c

r14976	r14977
245	245
246	246	static void tandy1000_set_bios_bank( running_machine &machine )
247	247	{
248		memory_set_bankptr( machine, "bank11", machine.region("maincpu")->base() + ( tandy.bios_bank & 0x07 ) * 0x10000 );
	248	machine.root_device().membank( "bank11" )->set_base( machine.root_device().memregion("maincpu")->base() + ( tandy.bios_bank & 0x07 ) * 0x10000 );
249	249	}
250	250
251	251

src/mess/machine/ti85.c

r14976	r14977
40	40
41	41	inline void ti8x_update_bank(address_space *space, UINT8 bank, UINT8 *base, UINT8 page, bool is_ram)
42	42	{
	43	ti85_state *state = space->machine().driver_data<ti85_state>();
43	44	static const char *const tag[] = {"bank1", "bank2", "bank3", "bank4"};
44	45
45		memory_set_bankptr(space->machine(), tag[bank&3], base + (0x4000 * page));
	46	state->membank(tag[bank&3])->set_base(base + (0x4000 * page));
46	47
47	48	if (is_ram)
48	49	space->install_write_bank(bank * 0x4000, bank * 0x4000 + 0x3fff, tag[bank&3]);
r14976	r14977
53	54	static void update_ti85_memory (running_machine &machine)
54	55	{
55	56	ti85_state *state = machine.driver_data<ti85_state>();
56		memory_set_bankptr(machine, "bank2", state->m_bios + 0x004000*state->m_ti8x_memory_page_1);
	57	state->membank("bank2")->set_base(state->m_bios + 0x004000*state->m_ti8x_memory_page_1);
57	58	}
58	59
59	60	static void update_ti83p_memory (running_machine &machine)
r14976	r14977
113	114	{
114	115	ti85_state *state = machine.driver_data<ti85_state>();
115	116	address_space *space = state->m_maincpu->memory().space(AS_PROGRAM);
116		state->m_bios = machine.region("bios")->base();
	117	state->m_bios = state->memregion("bios")->base();
117	118
118	119	state->m_timer_interrupt_mask = 0;
119	120	state->m_timer_interrupt_status = 0;
r14976	r14977
135	136
136	137	space->unmap_write(0x0000, 0x3fff);
137	138	space->unmap_write(0x4000, 0x7fff);
138		memory_set_bankptr(machine, "bank1", state->m_bios);
139		memory_set_bankptr(machine, "bank2", state->m_bios + 0x04000);
	139	state->membank("bank1")->set_base(state->m_bios);
	140	state->membank("bank2")->set_base(state->m_bios + 0x04000);
140	141	}
141	142
142	143	MACHINE_RESET( ti85 )
r14976	r14977
152	153	{
153	154	ti85_state *state = machine.driver_data<ti85_state>();
154	155	address_space *space = state->m_maincpu->memory().space(AS_PROGRAM);
155		state->m_bios = machine.region("bios")->base();
	156	state->m_bios = state->memregion("bios")->base();
156	157
157	158	state->m_timer_interrupt_mask = 0;
158	159	state->m_timer_interrupt_status = 0;
r14976	r14977
177	178	space->unmap_write(0x4000, 0x7fff);
178	179	space->unmap_write(0x8000, 0xbfff);
179	180
180		memory_set_bankptr(machine, "bank1", state->m_bios);
181		memory_set_bankptr(machine, "bank2", state->m_bios);
182		memory_set_bankptr(machine, "bank3", state->m_bios);
183		memory_set_bankptr(machine, "bank4", state->m_ti8x_ram);
	181	state->membank("bank1")->set_base(state->m_bios);
	182	state->membank("bank2")->set_base(state->m_bios);
	183	state->membank("bank3")->set_base(state->m_bios);
	184	state->membank("bank4")->set_base(state->m_ti8x_ram);
184	185
185	186	machine.scheduler().timer_pulse(attotime::from_hz(200), FUNC(ti85_timer_callback));
186	187
r14976	r14977
191	192	{
192	193	ti85_state *state = machine.driver_data<ti85_state>();
193	194	address_space *space = state->m_maincpu->memory().space(AS_PROGRAM);
194		state->m_bios = machine.region("bios")->base();
	195	state->m_bios = state->memregion("bios")->base();
195	196
196	197	state->m_timer_interrupt_mask = 0;
197	198	state->m_timer_interrupt_status = 0;
r14976	r14977
214	215
215	216	space->unmap_write(0x0000, 0x3fff);
216	217
217		memory_set_bankptr(machine, "bank1", state->m_bios);
218		memory_set_bankptr(machine, "bank2", state->m_bios + 0x04000);
	218	state->membank("bank1")->set_base(state->m_bios);
	219	state->membank("bank2")->set_base(state->m_bios + 0x04000);
219	220
220		memory_set_bankptr(machine, "bank4", state->m_ti8x_ram);
	221	state->membank("bank4")->set_base(state->m_ti8x_ram);
221	222
222	223	machine.scheduler().timer_pulse(attotime::from_hz(200), FUNC(ti85_timer_callback));
223	224	}

src/mess/machine/galaxy.c

r14976	r14977
155	155
156	156	DRIVER_INIT( galaxy )
157	157	{
	158	galaxy_state *state = machine.driver_data<galaxy_state>();
158	159	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
159	160	space->install_readwrite_bank( 0x2800, 0x2800 + machine.device<ram_device>(RAM_TAG)->size() - 1, "bank1");
160		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	161	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
161	162
162	163	if (machine.device<ram_device>(RAM_TAG)->size() < (6 + 48) * 1024)
163	164	{
r14976	r14977
183	184	space->nop_write(0x1000, 0x1fff);
184	185
185	186	if (input_port_read(machine, "ROM2"))
186		memory_set_bankptr(machine,"bank10", machine.region("maincpu")->base() + 0x1000);
	187	state->membank("bank10")->set_base(machine.root_device().memregion("maincpu")->base() + 0x1000);
187	188
188	189	device_set_irq_callback(machine.device("maincpu"), galaxy_irq_callback);
189	190	state->m_interrupts_enabled = TRUE;
r14976	r14977
197	198	MACHINE_RESET( galaxyp )
198	199	{
199	200	galaxy_state *state = machine.driver_data<galaxy_state>();
200		UINT8 *ROM = machine.region("maincpu")->base();
	201	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
201	202	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
202	203
203	204	device_set_irq_callback(machine.device("maincpu"), galaxy_irq_callback);
r14976	r14977
209	210
210	211	space->install_read_bank(0xe000, 0xefff, "bank11");
211	212	space->nop_write(0xe000, 0xefff);
212		memory_set_bankptr(machine,"bank11", machine.region("maincpu")->base() + 0xe000);
	213	state->membank("bank11")->set_base(state->memregion("maincpu")->base() + 0xe000);
213	214	state->m_interrupts_enabled = TRUE;
214	215	}

src/mess/machine/vtech2.c

r14976	r14977
84	84	DRIVER_INIT(laser)
85	85	{
86	86	vtech2_state *state = machine.driver_data<vtech2_state>();
87		UINT8 *gfx = machine.region("gfx2")->base();
	87	UINT8 *gfx = machine.root_device().memregion("gfx2")->base();
88	88	int i;
89	89
90	90	state->m_laser_track_x2[0] = state->m_laser_track_x2[1] = 80;
r14976	r14977
95	95	gfx[i] = i;
96	96
97	97	state->m_laser_latch = -1;
98		state->m_mem = machine.region("maincpu")->base();
	98	state->m_mem = state->memregion("maincpu")->base();
99	99
100	100	for (i = 0; i < ARRAY_LENGTH(state->m_laser_bank); i++)
101	101	state->m_laser_bank[i] = -1;
r14976	r14977
162	162	else
163	163	{
164	164	sprintf(bank,"bank%d",offset+1);
165		memory_set_bankptr(machine(), bank, &m_mem[0x4000*m_laser_bank[offset]]);
	165	membank(bank)->set_base(&m_mem[0x4000*m_laser_bank[offset]]);
166	166	if( m_laser_bank_mask & (1 << data) )
167	167	{
168	168	/* video RAM bank selected? */

src/mess/machine/zx.c

r14976	r14977
20	20
21	21	WRITE8_MEMBER(zx_state::zx_ram_w)
22	22	{
23		UINT8 *RAM = machine().region("maincpu")->base();
	23	UINT8 *RAM = memregion("maincpu")->base();
24	24	RAM[offset + 0x4000] = data;
25	25
26	26	if (data & 0x40)
r14976	r14977
38	38	/* I know this looks really pointless... but it has to be here */
39	39	READ8_MEMBER( zx_state::zx_ram_r )
40	40	{
41		UINT8 *RAM = machine().region("maincpu")->base();
	41	UINT8 *RAM = memregion("maincpu")->base();
42	42	return RAM[offset | 0xc000];
43	43	}
44	44
r14976	r14977
49	49
50	50	space->install_read_bank(0x4000, 0x4000 + machine.device<ram_device>(RAM_TAG)->size() - 1, "bank1");
51	51	space->install_write_handler(0x4000, 0x4000 + machine.device<ram_device>(RAM_TAG)->size() - 1, write8_delegate(FUNC(zx_state::zx_ram_w),state));
52		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x4000);
	52	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x4000);
53	53	}
54	54
55	55	DIRECT_UPDATE_HANDLER( zx_setdirect )

src/mess/machine/pc1401.c

r14976	r14977
117	117	MACHINE_START( pc1401 )
118	118	{
119	119	device_t *main_cpu = machine.device("maincpu");
120		UINT8 *ram = machine.region("maincpu")->base() + 0x2000;
	120	UINT8 *ram = machine.root_device().memregion("maincpu")->base() + 0x2000;
121	121	UINT8 *cpu = sc61860_internal_ram(main_cpu);
122	122
123	123	machine.device<nvram_device>("cpu_nvram")->set_base(cpu, 96);
r14976	r14977
134	134	{
135	135	pc1401_state *state = machine.driver_data<pc1401_state>();
136	136	int i;
137		UINT8 *gfx=machine.region("gfx1")->base();
	137	UINT8 *gfx=state->memregion("gfx1")->base();
138	138	#if 0
139	139	static const char sucker[]={
140	140	/* this routine dump the memory (start 0)

src/mess/machine/comx_prn.c

r14976	r14977
64	64	{
65	65	m_slot = dynamic_cast<comx_expansion_slot_device *>(owner());
66	66
67		m_rom = subregion("c000")->base();
	67	m_rom = memregion("c000")->base();
68	68	}
69	69
70	70

src/mess/machine/mac.c

r14976	r14977
211	211	static void mac_install_memory(running_machine &machine, offs_t memory_begin, offs_t memory_end,
212	212	offs_t memory_size, void *memory_data, int is_rom, const char *bank)
213	213	{
	214	mac_state *state = machine.driver_data<mac_state>();
214	215	address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
215	216	offs_t memory_mask;
216	217
r14976	r14977
227	228	space->install_read_bank(memory_begin, memory_end, memory_mask, 0, bank);
228	229	}
229	230
230		memory_set_bankptr(machine, bank, memory_data);
	231	state->membank(bank)->set_base(memory_data);
231	232
232	233	if (LOG_MEMORY)
233	234	{
r14976	r14977
389	390	if (is_rom)
390	391	{
391	392	/* ROM mirror */
392		memory_size = machine().region("bootrom")->bytes();
393		memory_data = machine().region("bootrom")->base();
	393	memory_size = memregion("bootrom")->bytes();
	394	memory_data = memregion("bootrom")->base();
394	395	is_rom = TRUE;
395	396	}
396	397	else
r14976	r14977
468	469	if (overlay)
469	470	{
470	471	/* ROM mirror */
471		memory_size = machine().region("bootrom")->bytes();
472		memory_data = machine().region("bootrom")->base();
	472	memory_size = memregion("bootrom")->bytes();
	473	memory_data = memregion("bootrom")->base();
473	474	is_rom = TRUE;
474	475	}
475	476	else
r14976	r14977
2096	2097
2097	2098	/* set up ROM at 0x400000-0x43ffff (-0x5fffff for mac 128k/512k/512ke) */
2098	2099	mac_install_memory(machine, 0x400000, (model >= MODEL_MAC_PLUS) ? 0x43ffff : 0x5fffff,
2099		machine.region("bootrom")->bytes(), machine.region("bootrom")->base(), TRUE, "bank3");
	2100	machine.root_device().memregion("bootrom")->bytes(), machine.root_device().memregion("bootrom")->base(), TRUE, "bank3");
2100	2101	}
2101	2102
2102	2103	mac->m_overlay = -1;

src/mess/machine/z88_rom.c

r14976	r14977
65	65
66	66	void z88_32k_rom_device::device_start()
67	67	{
68		m_rom = machine().region_alloc(tag(), get_cart_size(), 1, ENDIANNESS_LITTLE)->base();
	68	m_rom = machine().memory().region_alloc(tag(), get_cart_size(), 1, ENDIANNESS_LITTLE)->base();
69	69	}
70	70
71	71	/*-------------------------------------------------

src/mess/machine/iq151_ms151a.c

r14976	r14977
56	56
57	57	void iq151_ms151a_device::device_start()
58	58	{
59		m_rom = (UINT8*)subregion("ms151a")->base();
	59	m_rom = (UINT8*)memregion("ms151a")->base();
60	60
61	61	// allocate a bitmap for represent the paper
62	62	m_paper = auto_bitmap_ind16_alloc(machine(), PAPER_WIDTH, PAPER_HEIGHT);

src/mess/machine/msx.c

r14976	r14977
891	891	/* Check whether the optional FM-PAC rom is present */
892	892	option = 0x10000;
893	893	size = 0x10000;
894		mem = machine.region("maincpu")->base() + option;
895		if (machine.region("maincpu")->bytes() >= size + option && mem[0] == 'A' && mem[1] == 'B') {
	894	mem = machine.root_device().memregion("maincpu")->base() + option;
	895	if (machine.root_device().memregion("maincpu")->bytes() >= size + option && mem[0] == 'A' && mem[1] == 'B') {
896	896	slot = &msx_slot_list[SLOT_FMPAC];
897	897	}
898	898	else {
r14976	r14977
906	906
907	907	case MSX_MEM_HANDLER:
908	908	case MSX_MEM_ROM:
909		mem = machine.region("maincpu")->base() + option;
	909	mem = machine.root_device().memregion("maincpu")->base() + option;
910	910	break;
911	911	case MSX_MEM_RAM:
912	912	mem = NULL;
r14976	r14977
931	931	}
932	932	break;
933	933	case MSX_LAYOUT_KANJI_ENTRY:
934		state->m_kanji_mem = machine.region("maincpu")->base() + layout->option;
	934	state->m_kanji_mem = machine.root_device().memregion("maincpu")->base() + layout->option;
935	935	break;
936	936	case MSX_LAYOUT_RAMIO_SET_BITS_ENTRY:
937	937	state->m_ramio_set_bits = (UINT8)layout->option;

src/mess/machine/mz700.c

r14976	r14977
153	153	/* switch in cgrom */
154	154	spc->install_read_bank(0x1000, 0x1fff, "bank2");
155	155	spc->nop_write(0x1000, 0x1fff);
156		memory_set_bankptr(machine(), "bank2", machine().region("monitor")->base() + 0x1000);
	156	membank("bank2")->set_base(machine().root_device().memregion("monitor")->base() + 0x1000);
157	157
158	158	if (m_mz700_mode)
159	159	{
160	160	/* cgram from 0xc000 to 0xcfff */
161	161	spc->install_read_bank(0xc000, 0xcfff, "bank6");
162	162	spc->install_write_handler(0xc000, 0xcfff, write8_delegate(FUNC(mz_state::mz800_cgram_w),this));
163		memory_set_bankptr(machine(), "bank6", m_cgram);
	163	membank("bank6")->set_base(m_cgram);
164	164	}
165	165	else
166	166	{
r14976	r14977
168	168	{
169	169	/* vram from 0x8000 to 0xbfff */
170	170	spc->install_readwrite_bank(0x8000, 0xbfff, "bank4");
171		memory_set_bankptr(machine(), "bank4", videoram);
	171	membank("bank4")->set_base(videoram);
172	172	}
173	173	else
174	174	{
175	175	/* vram from 0x8000 to 0x9fff */
176	176	spc->install_readwrite_bank(0x8000, 0x9fff, "bank4");
177		memory_set_bankptr(machine(), "bank4", videoram);
	177	membank("bank4")->set_base(videoram);
178	178
179	179	/* ram from 0xa000 to 0xbfff */
180	180	spc->install_readwrite_bank(0xa000, 0xbfff, "bank5");
181		memory_set_bankptr(machine(), "bank5", machine().device<ram_device>(RAM_TAG)->pointer() + 0xa000);
	181	membank("bank5")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xa000);
182	182	}
183	183	}
184	184
r14976	r14977
190	190	address_space *spc = machine().device("maincpu")->memory().space(AS_PROGRAM);
191	191
192	192	spc->install_readwrite_bank(0x0000, 0x0fff, "bank1");
193		memory_set_bankptr(machine(), "bank1", machine().device<ram_device>(RAM_TAG)->pointer());
	193	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
194	194	}
195	195
196	196	WRITE8_MEMBER(mz_state::mz800_bank_0_w)
r14976	r14977
198	198	address_space *spc = machine().device("maincpu")->memory().space(AS_PROGRAM);
199	199
200	200	spc->install_readwrite_bank(0x0000, 0x7fff, "bank1");
201		memory_set_bankptr(machine(), "bank1", machine().device<ram_device>(RAM_TAG)->pointer());
	201	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
202	202	}
203	203
204	204	READ8_MEMBER(mz_state::mz800_bank_1_r)
r14976	r14977
207	207
208	208	/* switch in ram from 0x1000 to 0x1fff */
209	209	spc->install_readwrite_bank(0x1000, 0x1fff, "bank2");
210		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
	210	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
211	211
212	212	if (m_mz700_mode)
213	213	{
214	214	/* ram from 0xc000 to 0xcfff */
215	215	spc->install_readwrite_bank(0xc000, 0xcfff, "bank6");
216		memory_set_bankptr(machine(), "bank6", machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
	216	membank("bank6")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
217	217	}
218	218	else
219	219	{
220	220	/* ram from 0x8000 to 0xbfff */
221	221	spc->install_readwrite_bank(0x8000, 0xbfff, "bank4");
222		memory_set_bankptr(machine(), "bank4", machine().device<ram_device>(RAM_TAG)->pointer() + 0x8000);
	222	membank("bank4")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x8000);
223	223	}
224	224
225	225	return 0xff;
r14976	r14977
235	235	if (!m_mz700_ram_lock)
236	236	{
237	237	spc->install_readwrite_bank(0xd000, 0xffff, "bank7");
238		memory_set_bankptr(machine(), "bank7", machine().device<ram_device>(RAM_TAG)->pointer() + 0xd000);
	238	membank("bank7")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xd000);
239	239	m_mz700_ram_vram = FALSE;
240	240	}
241	241	}
r14976	r14977
245	245	if (!m_mz800_ram_lock)
246	246	{
247	247	spc->install_readwrite_bank(0xe000, 0xffff, "bank8");
248		memory_set_bankptr(machine(), "bank8", machine().device<ram_device>(RAM_TAG)->pointer() + 0xe000);
	248	membank("bank8")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xe000);
249	249	m_mz800_ram_monitor = FALSE;
250	250	}
251	251	}
r14976	r14977
257	257
258	258	spc->install_read_bank(0x0000, 0x0fff, "bank1");
259	259	spc->nop_write(0x0000, 0x0fff);
260		memory_set_bankptr(machine(), "bank1", machine().region("monitor")->base());
	260	membank("bank1")->set_base(machine().root_device().memregion("monitor")->base());
261	261	}
262	262
263	263	WRITE8_MEMBER(mz_state::mz700_bank_3_w)
r14976	r14977
271	271	{
272	272	/* switch in videoram */
273	273	spc->install_readwrite_bank(0xd000, 0xd7ff, "bank7");
274		memory_set_bankptr(machine(), "bank7", videoram);
	274	membank("bank7")->set_base(videoram);
275	275
276	276	/* switch in colorram */
277	277	spc->install_readwrite_bank(0xd800, 0xdfff, "bank9");
278		memory_set_bankptr(machine(), "bank9", m_colorram);
	278	membank("bank9")->set_base(m_colorram);
279	279
280	280	m_mz700_ram_vram = TRUE;
281	281
r14976	r14977
301	301	/* switch in mz800 monitor rom if not locked */
302	302	spc->install_read_bank(0xe000, 0xffff, "bank8");
303	303	spc->nop_write(0xe000, 0xffff);
304		memory_set_bankptr(machine(), "bank8", machine().region("monitor")->base() + 0x2000);
	304	membank("bank8")->set_base(machine().root_device().memregion("monitor")->base() + 0x2000);
305	305	m_mz800_ram_monitor = TRUE;
306	306	}
307	307	}
r14976	r14977
320	320
321	321	/* rest is ram is always ram in mz700 mode */
322	322	spc->install_readwrite_bank(0x1000, 0xcfff, "bank2");
323		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
	323	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
324	324	}
325	325	else
326	326	{
327	327	/* monitor rom and cgrom */
328	328	spc->install_read_bank(0x0000, 0x1fff, "bank1");
329	329	spc->nop_write(0x0000, 0x1fff);
330		memory_set_bankptr(machine(), "bank1", machine().region("monitor")->base());
	330	membank("bank1")->set_base(machine().root_device().memregion("monitor")->base());
331	331
332	332	/* ram from 0x2000 to 0x7fff */
333	333	spc->install_readwrite_bank(0x2000, 0x7fff, "bank3");
334		memory_set_bankptr(machine(), "bank3", machine().device<ram_device>(RAM_TAG)->pointer());
	334	membank("bank3")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
335	335
336	336	if (m_hires_mode)
337	337	{
338	338	/* vram from 0x8000 to 0xbfff */
339	339	spc->install_readwrite_bank(0x8000, 0xbfff, "bank4");
340		memory_set_bankptr(machine(), "bank4", videoram);
	340	membank("bank4")->set_base(videoram);
341	341	}
342	342	else
343	343	{
344	344	/* vram from 0x8000 to 0x9fff */
345	345	spc->install_readwrite_bank(0x8000, 0x9fff, "bank4");
346		memory_set_bankptr(machine(), "bank4", videoram);
	346	membank("bank4")->set_base(videoram);
347	347
348	348	/* ram from 0xa000 to 0xbfff */
349	349	spc->install_readwrite_bank(0xa000, 0xbfff, "bank5");
350		memory_set_bankptr(machine(), "bank5", machine().device<ram_device>(RAM_TAG)->pointer() + 0xa000);
	350	membank("bank5")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xa000);
351	351	}
352	352
353	353	/* ram from 0xc000 to 0xdfff */
354	354	spc->install_readwrite_bank(0xc000, 0xdfff, "bank6");
355		memory_set_bankptr(machine(), "bank6", machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
	355	membank("bank6")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
356	356
357	357	/* mz800 monitor rom from 0xe000 to 0xffff */
358	358	spc->install_read_bank(0xe000, 0xffff, "bank8");
359	359	spc->nop_write(0xe000, 0xffff);
360		memory_set_bankptr(machine(), "bank8", machine().region("monitor")->base() + 0x2000);
	360	membank("bank8")->set_base(machine().root_device().memregion("monitor")->base() + 0x2000);
361	361	m_mz800_ram_monitor = TRUE;
362	362
363	363	m_mz800_ram_lock = FALSE; /* reset lock? */
r14976	r14977
600	600	/* port EA */
601	601	READ8_MEMBER(mz_state::mz800_ramdisk_r)
602	602	{
603		UINT8 *mem = space.machine().region("user1")->base();
	603	UINT8 *mem = space.machine().root_device().memregion("user1")->base();
604	604	UINT8 data = mem[m_mz800_ramaddr];
605	605	LOG(2,"mz800_ramdisk_r",("[%04X] -> %02X\n", m_mz800_ramaddr, data),machine());
606	606	if (m_mz800_ramaddr++ == 0)
r14976	r14977
651	651	/* port EA */
652	652	WRITE8_MEMBER(mz_state::mz800_ramdisk_w)
653	653	{
654		UINT8 *mem = machine().region("user1")->base();
	654	UINT8 *mem = memregion("user1")->base();
655	655	LOG(2,"mz800_ramdisk_w",("[%04X] <- %02X\n", m_mz800_ramaddr, data),machine());
656	656	mem[m_mz800_ramaddr] = data;
657	657	if (m_mz800_ramaddr++ == 0)

src/mess/machine/a2memexp.c

r14976	r14977
105	105	set_a2bus_device();
106	106
107	107	astring tempstring;
108		m_rom = device().machine().region(this->subtag(tempstring, MEMEXP_ROM_REGION))->base();
	108	m_rom = device().machine().root_device().memregion(this->subtag(tempstring, MEMEXP_ROM_REGION))->base();
109	109
110	110	memset(m_ram, 0xff, 1024*1024*sizeof(UINT8));
111	111

src/mess/machine/lisa.c

r14976	r14977
1002	1002	DRIVER_INIT( lisa2 )
1003	1003	{
1004	1004	lisa_state *state = machine.driver_data<lisa_state>();
1005		state->m_ram_ptr = machine.region("maincpu")->base() + RAM_OFFSET;
1006		state->m_rom_ptr = machine.region("maincpu")->base() + ROM_OFFSET;
	1005	state->m_ram_ptr = machine.root_device().memregion("maincpu")->base() + RAM_OFFSET;
	1006	state->m_rom_ptr = state->memregion("maincpu")->base() + ROM_OFFSET;
1007	1007	state->m_model = lisa2;
1008	1008	state->m_features.has_fast_timers = 0;
1009	1009	state->m_features.floppy_hardware = sony_lisa2;
r14976	r14977
1016	1016	DRIVER_INIT( lisa210 )
1017	1017	{
1018	1018	lisa_state *state = machine.driver_data<lisa_state>();
1019		state->m_ram_ptr = machine.region("maincpu")->base() + RAM_OFFSET;
1020		state->m_rom_ptr = machine.region("maincpu")->base() + ROM_OFFSET;
	1019	state->m_ram_ptr = machine.root_device().memregion("maincpu")->base() + RAM_OFFSET;
	1020	state->m_rom_ptr = state->memregion("maincpu")->base() + ROM_OFFSET;
1021	1021	state->m_model = lisa210;
1022	1022	state->m_features.has_fast_timers = 1;
1023	1023	state->m_features.floppy_hardware = sony_lisa210;
r14976	r14977
1030	1030	DRIVER_INIT( mac_xl )
1031	1031	{
1032	1032	lisa_state *state = machine.driver_data<lisa_state>();
1033		state->m_ram_ptr = machine.region("maincpu")->base() + RAM_OFFSET;
1034		state->m_rom_ptr = machine.region("maincpu")->base() + ROM_OFFSET;
	1033	state->m_ram_ptr = machine.root_device().memregion("maincpu")->base() + RAM_OFFSET;
	1034	state->m_rom_ptr = state->memregion("maincpu")->base() + ROM_OFFSET;
1035	1035	state->m_model = mac_xl;
1036	1036	state->m_features.has_fast_timers = 1;
1037	1037	state->m_features.floppy_hardware = sony_lisa210;
r14976	r14977
1053	1053	MACHINE_RESET( lisa )
1054	1054	{
1055	1055	lisa_state *state = machine.driver_data<lisa_state>();
1056		state->m_ram_ptr = machine.region("maincpu")->base() + RAM_OFFSET;
1057		state->m_rom_ptr = machine.region("maincpu")->base() + ROM_OFFSET;
1058		state->m_videoROM_ptr = machine.region("gfx1")->base();
	1056	state->m_ram_ptr = machine.root_device().memregion("maincpu")->base() + RAM_OFFSET;
	1057	state->m_rom_ptr = machine.root_device().memregion("maincpu")->base() + ROM_OFFSET;
	1058	state->m_videoROM_ptr = state->memregion("gfx1")->base();
1059	1059
1060	1060	//  machine.device("maincpu")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate_create_static(lisa_OPbaseoverride, *machine));
1061	1061	//  m68k_set_reset_callback(machine.device("maincpu"), /*lisa_reset_instr_callback*/NULL);

src/mess/machine/lynx.c

r14976	r14977
1039	1039	value = input_port_read(machine(), "PAUSE");
1040	1040	break;
1041	1041	case RCART:
1042		value = *(machine().region("user1")->base() + (m_suzy.high * m_granularity) + m_suzy.low);
	1042	value = *(machine().root_device().memregion("user1")->base() + (m_suzy.high * m_granularity) + m_suzy.low);
1043	1043	m_suzy.low = (m_suzy.low + 1) & (m_granularity - 1);
1044	1044	break;
1045	1045	//case RCART_BANK1: /* we need bank 1 emulation!!! */
r14976	r14977
1917	1917	}
1918	1918
1919	1919	if (data & 1)
1920		memory_set_bankptr(machine(), "bank1", m_mem_fc00);
	1920	membank("bank1")->set_base(m_mem_fc00);
1921	1921	if (data & 2)
1922		memory_set_bankptr(machine(), "bank2", m_mem_fd00);
1923		memory_set_bank(machine(), "bank3", (data & 4) ? 1 : 0);
1924		memory_set_bank(machine(), "bank4", (data & 8) ? 1 : 0);
	1922	membank("bank2")->set_base(m_mem_fd00);
	1923	membank("bank3")->set_entry((data & 4) ? 1 : 0);
	1924	membank("bank4")->set_entry((data & 8) ? 1 : 0);
1925	1925	}
1926	1926
1927	1927	static void lynx_reset(running_machine &machine)
r14976	r14977
1972	1972	state->save_pointer(NAME(state->m_mem_fe00.target()), state->m_mem_fe00.bytes());
1973	1973	machine.save().register_postload(save_prepost_delegate(FUNC(lynx_postload), state));
1974	1974
1975		memory_configure_bank(machine, "bank3", 0, 1, machine.region("maincpu")->base() + 0x0000, 0);
1976		memory_configure_bank(machine, "bank3", 1, 1, state->m_mem_fe00, 0);
1977		memory_configure_bank(machine, "bank4", 0, 1, machine.region("maincpu")->base() + 0x01fa, 0);
1978		memory_configure_bank(machine, "bank4", 1, 1, state->m_mem_fffa, 0);
	1975	state->membank("bank3")->configure_entry(0, machine.root_device().memregion("maincpu")->base() + 0x0000);
	1976	state->membank("bank3")->configure_entry(1, state->m_mem_fe00);
	1977	state->membank("bank4")->configure_entry(0, state->memregion("maincpu")->base() + 0x01fa);
	1978	state->membank("bank4")->configure_entry(1, state->m_mem_fffa);
1979	1979
1980	1980	state->m_audio = machine.device("custom");
1981	1981
r14976	r14977
2044	2044	512, 1024 or 2048 bytes. Commercial roms use all 256 banks.*/
2045	2045
2046	2046	lynx_state *state = image.device().machine().driver_data<lynx_state>();
2047		UINT8 *rom = image.device().machine().region("user1")->base();
	2047	UINT8 *rom = state->memregion("user1")->base();
2048	2048	UINT32 size;
2049	2049	UINT8 header[0x40];
2050	2050

src/mess/machine/cgenie.c

r14976	r14977
50	50	cgenie_state *state = machine.driver_data<cgenie_state>();
51	51	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
52	52	device_t *ay8910 = machine.device("ay8910");
53		UINT8 *ROM = machine.region("maincpu")->base();
	53	UINT8 *ROM = state->memregion("maincpu")->base();
54	54
55	55	/* reset the AY8910 to be quiet, since the cgenie BIOS doesn't */
56	56	AYWriteReg(0, 0, 0);
r14976	r14977
87	87	{
88	88	space->install_read_bank(0xc000, 0xdfff, "bank10");
89	89	space->nop_write(0xc000, 0xdfff);
90		memory_set_bankptr(machine, "bank10", &ROM[0x0c000]);
	90	state->membank("bank10")->set_base(&ROM[0x0c000]);
91	91	logerror("cgenie DOS enabled\n");
92	92	memcpy(&ROM[0x0c000],&ROM[0x10000], 0x2000);
93	93	}
r14976	r14977
101	101	{
102	102	space->nop_readwrite(0xc000, 0xdfff);
103	103	logerror("cgenie DOS disabled\n");
104		memset(&machine.region("maincpu")->base()[0x0c000], 0x00, 0x2000);
	104	memset(&machine.root_device().memregion("maincpu")->base()[0x0c000], 0x00, 0x2000);
105	105	}
106	106
107	107	/* copy EXT ROM, if enabled or wipe out that memory area */
r14976	r14977
109	109	{
110	110	space->install_rom(0xe000, 0xefff, 0); // mess 0135u3 need to check
111	111	logerror("cgenie EXT enabled\n");
112		memcpy(&machine.region("maincpu")->base()[0x0e000],
113		&machine.region("maincpu")->base()[0x12000], 0x1000);
	112	memcpy(&machine.root_device().memregion("maincpu")->base()[0x0e000],
	113	&machine.root_device().memregion("maincpu")->base()[0x12000], 0x1000);
114	114	}
115	115	else
116	116	{
117	117	space->nop_readwrite(0xe000, 0xefff);
118	118	logerror("cgenie EXT disabled\n");
119		memset(&machine.region("maincpu")->base()[0x0e000], 0x00, 0x1000);
	119	memset(&machine.root_device().memregion("maincpu")->base()[0x0e000], 0x00, 0x1000);
120	120	}
121	121
122	122	state->m_cass_level = 0;
r14976	r14977
127	127	{
128	128	cgenie_state *state = machine.driver_data<cgenie_state>();
129	129	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
130		UINT8 *gfx = machine.region("gfx2")->base();
	130	UINT8 *gfx = state->memregion("gfx2")->base();
131	131	int i;
132	132
133	133	/* initialize static variables */
r14976	r14977
152	152	space->install_read_bank(0x4000, 0x4000 + machine.device<ram_device>(RAM_TAG)->size() - 1, "bank1");
153	153	space->install_legacy_write_handler(0x4000, 0x4000 + machine.device<ram_device>(RAM_TAG)->size() - 1, FUNC(cgenie_videoram_w));
154	154	state->m_videoram = machine.device<ram_device>(RAM_TAG)->pointer();
155		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	155	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
156	156	machine.scheduler().timer_pulse(attotime::from_hz(11025), FUNC(handle_cassette_input));
157	157	}
158	158

src/mess/machine/super80.c

r14976	r14977
100	100	/* after the first 4 bytes have been read from ROM, switch the ram back in */
101	101	static TIMER_CALLBACK( super80_reset )
102	102	{
103		memory_set_bank(machine, "boot", 0);
	103	super80_state *state = machine.driver_data<super80_state>();
	104	state->membank("boot")->set_entry(0);
104	105	}
105	106
106	107	static TIMER_CALLBACK( super80_halfspeed )
r14976	r14977
202	203	{
203	204	m_shared=0xff;
204	205	machine().scheduler().timer_set(attotime::from_usec(10), FUNC(super80_reset));
205		memory_set_bank(machine(), "boot", 1);
	206	membank("boot")->set_entry(1);
206	207	}
207	208
208	209	static void driver_init_common( running_machine &machine )
209	210	{
210		UINT8 *RAM = machine.region("maincpu")->base();
211		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xc000);
	211	super80_state *state = machine.driver_data<super80_state>();
	212	UINT8 *RAM = state->memregion("maincpu")->base();
	213	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xc000);
212	214	machine.scheduler().timer_pulse(attotime::from_hz(200000), FUNC(super80_timer));   /* timer for keyboard and cassette */
213	215	}
214	216

src/mess/machine/isa.c

r14976	r14977
316	316	{
317	317	address_space *space = m_maincpu->memory().space(AS_PROGRAM);
318	318	space->install_readwrite_bank(start, end, mask, mirror, tag );
319		memory_set_bankptr(machine(), tag, data);
	319	membank(tag)->set_base(data);
320	320	}
321	321
322	322	void isa8_device::unmap_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror)
r14976	r14977
328	328	void isa8_device::install_rom(device_t *dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, const char *region)
329	329	{
330	330	astring tempstring;
331		if (machine().region("isa")) {
332		UINT8 *src = machine().region(dev->subtag(tempstring, region))->base();
333		UINT8 *dest = machine().region("isa")->base() + start - 0xc0000;
	331	if (machine().root_device().memregion("isa")) {
	332	UINT8 *src = memregion(dev->subtag(tempstring, region))->base();
	333	UINT8 *dest = memregion("isa")->base() + start - 0xc0000;
334	334	memcpy(dest,src, end - start + 1);
335	335	} else {
336	336	address_space *space = m_maincpu->memory().space(AS_PROGRAM);
337	337	space->install_read_bank(start, end, mask, mirror, tag);
338	338	space->unmap_write(start, end, mask, mirror);
339		memory_set_bankptr(machine(), tag, machine().region(dev->subtag(tempstring, region))->base());
	339	membank(tag)->set_base(machine().root_device().memregion(dev->subtag(tempstring, region))->base());
340	340	}
341	341	}
342	342

src/mess/machine/i82439tx.c

r14976	r14977
293	293	i82439tx->space = cpu->memory().space(AS_PROGRAM);
294	294
295	295	/* get rom region */
296		i82439tx->rom = device->machine().region(config->rom_region)->base();
	296	i82439tx->rom = device->machine().root_device().memregion(config->rom_region)->base();
297	297
298	298	/* setup save states */
299	299	device->save_item(NAME(i82439tx->regs));

src/mess/machine/c64_dela_ep64.c

r14976	r14977
83	83
84	84	void c64_dela_ep64_cartridge_device::device_start()
85	85	{
86		m_rom = subregion("rom")->base();
	86	m_rom = memregion("rom")->base();
87	87
88	88	// state saving
89	89	save_item(NAME(m_bank));

src/mess/machine/lviv.c

r14976	r14977
31	31
32	32	if (state->m_ppi_port_outputs[0][2] & 0x02)
33	33	{
34		memory_set_bankptr(machine,"bank1", ram);
35		memory_set_bankptr(machine,"bank2", ram + 0x4000);
	34	state->membank("bank1")->set_base(ram);
	35	state->membank("bank2")->set_base(ram + 0x4000);
36	36	}
37	37	else
38	38	{
39		memory_set_bankptr(machine,"bank1", ram + 0x8000);
40		memory_set_bankptr(machine,"bank2", ram + 0xc000);
	39	state->membank("bank1")->set_base(ram + 0x8000);
	40	state->membank("bank2")->set_base(ram + 0xc000);
41	41	}
42	42	}
43	43
r14976	r14977
184	184	cpuspace->install_write_bank(0x8000, 0xbfff, "bank3");
185	185	cpuspace->unmap_write(0xC000, 0xffff);
186	186
187		memory_set_bankptr(machine(),"bank1", ram);
188		memory_set_bankptr(machine(),"bank2", ram + 0x4000);
189		memory_set_bankptr(machine(),"bank3", ram + 0x8000);
190		memory_set_bankptr(machine(),"bank4", machine().region("maincpu")->base() + 0x010000);
	187	membank("bank1")->set_base(ram);
	188	membank("bank2")->set_base(ram + 0x4000);
	189	membank("bank3")->set_base(ram + 0x8000);
	190	membank("bank4")->set_base(machine().root_device().memregion("maincpu")->base() + 0x010000);
191	191	}
192	192	else
193	193	{
r14976	r14977
247	247	space->unmap_write(0x8000, 0xbfff);
248	248	space->unmap_write(0xC000, 0xffff);
249	249
250		mem = machine.region("maincpu")->base();
251		memory_set_bankptr(machine,"bank1", mem + 0x010000);
252		memory_set_bankptr(machine,"bank2", mem + 0x010000);
253		memory_set_bankptr(machine,"bank3", mem + 0x010000);
254		memory_set_bankptr(machine,"bank4", mem + 0x010000);
	250	mem = state->memregion("maincpu")->base();
	251	state->membank("bank1")->set_base(mem + 0x010000);
	252	state->membank("bank2")->set_base(mem + 0x010000);
	253	state->membank("bank3")->set_base(mem + 0x010000);
	254	state->membank("bank4")->set_base(mem + 0x010000);
255	255
256	256	/*machine.scheduler().timer_pulse(TIME_IN_NSEC(200), FUNC(lviv_draw_pixel));*/
257	257

src/mess/machine/c64_dela_ep256.c

r14976	r14977
102	102
103	103	void c64_dela_ep256_cartridge_device::device_start()
104	104	{
105		m_rom = subregion("rom")->base();
	105	m_rom = memregion("rom")->base();
106	106
107	107	// state saving
108	108	save_item(NAME(m_bank));

src/mess/machine/mbc55x.c

r14976	r14977
362	362
363	363	if(bankno<nobanks)
364	364	{
365		memory_set_bankptr(machine, bank, map_base);
	365	state->membank(bank)->set_base(map_base);
366	366	space->install_readwrite_bank(bank_base, bank_base+(RAM_BANK_SIZE-1), bank);
367	367	logerror("Mapping bank %d at %05X to RAM\n",bankno,bank_base);
368	368	}
r14976	r14977
374	374	}
375	375
376	376	// Graphics red and blue plane memory mapping, green is in main memory
377		memory_set_bankptr(machine, RED_PLANE_TAG, &state->m_video_mem[RED_PLANE_OFFSET]);
	377	state->membank(RED_PLANE_TAG)->set_base(&state->m_video_mem[RED_PLANE_OFFSET]);
378	378	space->install_readwrite_bank(RED_PLANE_MEMBASE, RED_PLANE_MEMBASE+(COLOUR_PLANE_SIZE-1), RED_PLANE_TAG);
379		memory_set_bankptr(machine, BLUE_PLANE_TAG, &state->m_video_mem[BLUE_PLANE_OFFSET]);
	379	state->membank(BLUE_PLANE_TAG)->set_base(&state->m_video_mem[BLUE_PLANE_OFFSET]);
380	380	space->install_readwrite_bank(BLUE_PLANE_MEMBASE, BLUE_PLANE_MEMBASE+(COLOUR_PLANE_SIZE-1), BLUE_PLANE_TAG);
381	381	}
382	382

src/mess/machine/pc1403.c

r14976	r14977
30	30	logerror ("asic write %.4x %.2x\n",offset, data);
31	31	break;
32	32	case 2/*0x3c00*/:
33		memory_set_bankptr(space->machine(), "bank1", space->machine().region("user1")->base()+((data&7)<<14));
	33	state->membank("bank1")->set_base(state->memregion("user1")->base()+((data&7)<<14));
34	34	logerror ("asic write %.4x %.2x\n",offset, data);
35	35	break;
36	36	case 3/*0x3e00*/: break;
r14976	r14977
145	145	MACHINE_START( pc1403 )
146	146	{
147	147	device_t *main_cpu = machine.device("maincpu");
148		UINT8 *ram = machine.region("maincpu")->base() + 0x8000;
	148	UINT8 *ram = machine.root_device().memregion("maincpu")->base() + 0x8000;
149	149	UINT8 *cpu = sc61860_internal_ram(main_cpu);
150	150
151	151	machine.device<nvram_device>("cpu_nvram")->set_base(cpu, 96);
r14976	r14977
162	162	{
163	163	pc1403_state *state = machine.driver_data<pc1403_state>();
164	164	int i;
165		UINT8 *gfx=machine.region("gfx1")->base();
	165	UINT8 *gfx=machine.root_device().memregion("gfx1")->base();
166	166
167	167	for (i=0; i<128; i++) gfx[i]=i;
168	168
169	169	state->m_power = 1;
170	170	machine.scheduler().timer_set(attotime::from_seconds(1), FUNC(pc1403_power_up));
171	171
172		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
	172	state->membank("bank1")->set_base(state->memregion("user1")->base());
173	173	}

src/mess/machine/apple1.c

r14976	r14977
143	143
144	144	DRIVER_INIT( apple1 )
145	145	{
	146	apple1_state *state = machine.driver_data<apple1_state>();
146	147	address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
147	148	/* Set up the handlers for MESS's dynamically-sized RAM. */
148	149	space->install_readwrite_bank(0x0000, machine.device<ram_device>(RAM_TAG)->size() - 1, "bank1");
149		memory_set_bankptr(machine,"bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	150	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
150	151
151	152	/* Poll the keyboard input ports periodically.  These include both
152	153	ordinary keys and the RESET and CLEAR SCREEN pushbutton

src/mess/machine/iq151_disc2.c

r14976	r14977
80	80
81	81	void iq151_disc2_device::device_start()
82	82	{
83		m_rom = (UINT8*)subregion("disc2")->base();
	83	m_rom = (UINT8*)memregion("disc2")->base();
84	84	}
85	85
86	86	//-------------------------------------------------

src/mess/machine/c64_rex_ep256.c

r14976	r14977
102	102
103	103	void c64_rex_ep256_cartridge_device::device_start()
104	104	{
105		m_rom = subregion("rom")->base();
	105	m_rom = memregion("rom")->base();
106	106
107	107	// state saving
108	108	save_item(NAME(m_bank));

src/mess/machine/mtx.c

r14976	r14977
73	73	7       RELCPMH
74	74
75	75	*/
76
	76	mtx_state *state = machine.driver_data<mtx_state>();
77	77	address_space *program = machine.device(Z80_TAG)->memory().space(AS_PROGRAM);
78	78	ram_device *messram = machine.device<ram_device>(RAM_TAG);
79	79
r14976	r14977
82	82	UINT8 ram_page = data >> 0 & 0x0f;
83	83
84	84	/* set rom bank (switches between basic and assembler rom or cartridges) */
85		memory_set_bank(machine, "bank2", rom_page);
	85	state->membank("bank2")->set_entry(rom_page);
86	86
87	87	/* set ram bank, for invalid pages a nop-handler will be installed */
88	88	if (ram_page >= messram->size()/0x8000)
r14976	r14977
94	94	{
95	95	program->nop_readwrite(0x4000, 0x7fff);
96	96	program->install_readwrite_bank(0x8000, 0xbfff, "bank4");
97		memory_set_bank(machine, "bank4", ram_page);
	97	state->membank("bank4")->set_entry(ram_page);
98	98	}
99	99	else
100	100	{
101	101	program->install_readwrite_bank(0x4000, 0x7fff, "bank3");
102	102	program->install_readwrite_bank(0x8000, 0xbfff, "bank4");
103		memory_set_bank(machine, "bank3", ram_page);
104		memory_set_bank(machine, "bank4", ram_page);
	103	state->membank("bank3")->set_entry(ram_page);
	104	state->membank("bank4")->set_entry(ram_page);
105	105	}
106	106	}
107	107
r14976	r14977
383	383	state->m_cassette = machine.device<cassette_image_device>(CASSETTE_TAG);
384	384
385	385	/* configure memory */
386		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
387		memory_configure_bank(machine, "bank2", 0, 8, machine.region("user2")->base(), 0x2000);
388		memory_configure_bank(machine, "bank3", 0, messram->size()/0x4000/2, messram->pointer(), 0x4000);
389		memory_configure_bank(machine, "bank4", 0, messram->size()/0x4000/2, messram->pointer() + messram->size()/2, 0x4000);
	386	state->membank("bank1")->set_base(machine.root_device().memregion("user1")->base());
	387	state->membank("bank2")->configure_entries(0, 8, state->memregion("user2")->base(), 0x2000);
	388	state->membank("bank3")->configure_entries(0, messram->size()/0x4000/2, messram->pointer(), 0x4000);
	389	state->membank("bank4")->configure_entries(0, messram->size()/0x4000/2, messram->pointer() + messram->size()/2, 0x4000);
390	390	}
391	391
392	392	/*-------------------------------------------------

src/mess/machine/lux10828.c

r14976	r14977
429	429	save_item(NAME(m_sel1));
430	430
431	431	// patch out protection checks
432		UINT8 *rom = subregion("abc830")->base();
	432	UINT8 *rom = memregion("abc830")->base();
433	433	rom[0x00fa] = 0xff;
434	434	rom[0x0336] = 0xff;
435	435	rom[0x0718] = 0xff;

src/mess/machine/special.c

r14976	r14977
15	15	/* Driver initialization */
16	16	DRIVER_INIT(special)
17	17	{
	18	special_state *state = machine.driver_data<special_state>();
18	19	/* set initialy ROM to be visible on first bank */
19		UINT8 *RAM = machine.region("maincpu")->base();
	20	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
20	21	memset(RAM,0x0000,0x3000); // make first page empty by default
21		memory_configure_bank(machine, "bank1", 1, 2, RAM, 0x0000);
22		memory_configure_bank(machine, "bank1", 0, 2, RAM, 0xc000);
	22	state->membank("bank1")->configure_entries(1, 2, RAM, 0x0000);
	23	state->membank("bank1")->configure_entries(0, 2, RAM, 0xc000);
23	24	}
24	25
25	26	READ8_MEMBER( special_state::specialist_8255_porta_r )
r14976	r14977
103	104
104	105	static TIMER_CALLBACK( special_reset )
105	106	{
106		memory_set_bank(machine, "bank1", 0);
	107	special_state *state = machine.driver_data<special_state>();
	108	state->membank("bank1")->set_entry(0);
107	109	}
108	110
109	111
110	112	MACHINE_RESET( special )
111	113	{
	114	special_state *state = machine.driver_data<special_state>();
112	115	machine.scheduler().timer_set(attotime::from_usec(10), FUNC(special_reset));
113		memory_set_bank(machine, "bank1", 1);
	116	state->membank("bank1")->set_entry(1);
114	117	}
115	118
116	119
r14976	r14977
140	143
141	144	space->install_write_bank(0xc000, 0xffbf, "bank3");
142	145	space->install_write_bank(0xffc0, 0xffdf, "bank4");
143		memory_set_bankptr(machine(), "bank4", ram + 0xffc0);
	146	membank("bank4")->set_base(ram + 0xffc0);
144	147	switch(i)
145	148	{
146	149	case 0 :
147	150	space->install_write_bank(0x0000, 0x8fff, "bank1");
148	151	space->install_write_handler(0x9000, 0xbfff, write8_delegate(FUNC(special_state::video_memory_w), this));
149	152
150		memory_set_bankptr(machine(), "bank1", ram);
151		memory_set_bankptr(machine(), "bank2", ram + 0x9000);
152		memory_set_bankptr(machine(), "bank3", ram + 0xc000);
	153	membank("bank1")->set_base(ram);
	154	membank("bank2")->set_base(ram + 0x9000);
	155	membank("bank3")->set_base(ram + 0xc000);
153	156	break;
154	157	case 1 :
155	158	space->install_write_bank(0x0000, 0x8fff, "bank1");
156	159	space->install_write_bank(0x9000, 0xbfff, "bank2");
157	160
158		memory_set_bankptr(machine(), "bank1", ram + 0x10000);
159		memory_set_bankptr(machine(), "bank2", ram + 0x19000);
160		memory_set_bankptr(machine(), "bank3", ram + 0x1c000);
	161	membank("bank1")->set_base(ram + 0x10000);
	162	membank("bank2")->set_base(ram + 0x19000);
	163	membank("bank3")->set_base(ram + 0x1c000);
161	164	break;
162	165	case 2 :
163	166	space->unmap_write(0x0000, 0x8fff);
164	167	space->unmap_write(0x9000, 0xbfff);
165	168
166		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x10000);
167		memory_set_bankptr(machine(), "bank2", machine().region("maincpu")->base() + 0x19000);
	169	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
	170	membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + 0x19000);
168	171
169	172	if (data & 0x80)
170		memory_set_bankptr(machine(), "bank3", ram + 0x1c000);
	173	membank("bank3")->set_base(ram + 0x1c000);
171	174	else
172		memory_set_bankptr(machine(), "bank3", ram + 0xc000);
	175	membank("bank3")->set_base(ram + 0xc000);
173	176
174	177	break;
175	178	}
r14976	r14977
272	275	UINT8 bank2 = (m_RR_register >> 2) & 3;
273	276	UINT8 bank3 = (m_RR_register >> 4) & 3;
274	277	UINT8 bank4 = (m_RR_register >> 6) & 3;
275		UINT8 *mem = machine().region("maincpu")->base();
	278	UINT8 *mem = memregion("maincpu")->base();
276	279	UINT8 *ram = m_ram->pointer();
277	280	address_space *space = m_maincpu->memory().space(AS_PROGRAM);
278	281
r14976	r14977
288	291	case   1:
289	292	case   2:
290	293	case   3:
291		memory_set_bankptr(machine(), "bank1", ram + 0x10000*(bank1-1));
	294	membank("bank1")->set_base(ram + 0x10000*(bank1-1));
292	295	break;
293	296	case   0:
294	297	space->unmap_write(0x0000, 0x3fff);
295		memory_set_bankptr(machine(), "bank1", mem + 0x10000);
	298	membank("bank1")->set_base(mem + 0x10000);
296	299	break;
297	300	}
298	301	switch(bank2)
r14976	r14977
300	303	case   1:
301	304	case   2:
302	305	case   3:
303		memory_set_bankptr(machine(), "bank2", ram + 0x10000*(bank2-1) + 0x4000);
	306	membank("bank2")->set_base(ram + 0x10000*(bank2-1) + 0x4000);
304	307	break;
305	308	case   0:
306	309	space->unmap_write(0x4000, 0x8fff);
307		memory_set_bankptr(machine(), "bank2", mem + 0x14000);
	310	membank("bank2")->set_base(mem + 0x14000);
308	311	break;
309	312	}
310	313	switch(bank3)
r14976	r14977
312	315	case   1:
313	316	case   2:
314	317	case   3:
315		memory_set_bankptr(machine(), "bank3", ram + 0x10000*(bank3-1) + 0x9000);
	318	membank("bank3")->set_base(ram + 0x10000*(bank3-1) + 0x9000);
316	319	break;
317	320	case   0:
318	321	space->unmap_write(0x9000, 0xbfff);
319		memory_set_bankptr(machine(), "bank3", mem + 0x19000);
	322	membank("bank3")->set_base(mem + 0x19000);
320	323	break;
321	324	}
322	325	switch(bank4)
r14976	r14977
324	327	case   1:
325	328	case   2:
326	329	case   3:
327		memory_set_bankptr(machine(), "bank4", ram + 0x10000*(bank4-1) + 0x0c000);
328		memory_set_bankptr(machine(), "bank5", ram + 0x10000*(bank4-1) + 0x0f000);
329		memory_set_bankptr(machine(), "bank6", ram + 0x10000*(bank4-1) + 0x0f800);
	330	membank("bank4")->set_base(ram + 0x10000*(bank4-1) + 0x0c000);
	331	membank("bank5")->set_base(ram + 0x10000*(bank4-1) + 0x0f000);
	332	membank("bank6")->set_base(ram + 0x10000*(bank4-1) + 0x0f800);
330	333	break;
331	334	case   0:
332	335	space->unmap_write(0xc000, 0xefff);
333		memory_set_bankptr(machine(), "bank4", mem + 0x1c000);
	336	membank("bank4")->set_base(mem + 0x1c000);
334	337	space->unmap_write(0xf000, 0xf7ff);
335	338	space->nop_read(0xf000, 0xf7ff);
336	339	space->install_readwrite_handler(0xf800, 0xf803, 0, 0x7fc, read8_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi));

src/mess/machine/jupiter.c

r14976	r14977
29	29
30	30	SNAPSHOT_LOAD(jupiter)
31	31	{
32		UINT8 *RAM = image.device().machine().region("maincpu")->base();
	32	UINT8 *RAM = image.device().machine().root_device().memregion("maincpu")->base();
33	33	device_t *cpu = image.device().machine().device("maincpu");
34	34	address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
35	35	unsigned char jupiter_repeat, jupiter_byte, loop;

src/mess/machine/rmnimbus.c

r14976	r14977
2050	2050	{
2051	2051	map_base=(ramsel==0x07) ? map_blocks[map_blockno] : &map_blocks[map_blockno][block_ofs*1024];
2052	2052
2053		memory_set_bankptr(machine, bank, map_base);
	2053	state->membank(bank)->set_base(map_base);
2054	2054	space->install_readwrite_bank(memmap[blockno].start, memmap[blockno].end, bank);
2055	2055	//if(LOG_RAM) logerror(", base=%X\n",(int)map_base);
2056	2056	}

src/mess/machine/cybiko.c

r14976	r14977
42	42	{
43	43	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(start, start + size - 1, 0, mirror - size, "bank1");
44	44	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(start, start + size - 1, 0, mirror - size, "bank1");
45		memory_set_bankptr( machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	45	machine.root_device().membank( "bank1" )->set_base( machine.device<ram_device>(RAM_TAG)->pointer());
46	46	}
47	47
48	48	DRIVER_INIT( cybikov1 )
r14976	r14977
202	202	nvram_system_load( machine, "flash1", cybiko_at45dbxx_load, 1);
203	203	// multi-purpose flash
204	204	nvram_system_load( machine, "flash2", cybiko_sst39vfx_load, 1);
205		memory_set_bankptr( machine, "bank2", sst39vfx_get_base(flash2));
	205	machine.root_device().membank( "bank2" )->set_base( sst39vfx_get_base(flash2));
206	206	// serial port
207	207	cybiko_rs232_init(machine);
208	208	// other
r14976	r14977
217	217	nvram_system_load( machine, "rtc", cybiko_pcf8593_load, 0);
218	218	// multi-purpose flash
219	219	nvram_system_load( machine, "flash2", cybiko_sst39vfx_load, 1);
220		memory_set_bankptr( machine, "bank2", sst39vfx_get_base(flash2));
	220	machine.root_device().membank( "bank2" )->set_base( sst39vfx_get_base(flash2));
221	221	// ramdisk
222	222	nvram_system_load( machine, "ramdisk", cybiko_ramdisk_load, 0);
223	223	// serial port

src/mess/machine/pp01.c

r14976	r14977
84	84	static void pp01_set_memory(running_machine &machine,UINT8 block, UINT8 data)
85	85	{
86	86	pp01_state *state = machine.driver_data<pp01_state>();
87		UINT8 *mem = machine.region("maincpu")->base();
	87	UINT8 *mem = state->memregion("maincpu")->base();
88	88	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
89	89	UINT16 startaddr = block*0x1000;
90	90	UINT16 endaddr   = ((block+1)*0x1000)-1;
r14976	r14977
119	119	break;
120	120	}
121	121
122		memory_set_bankptr(machine, bank, machine.device<ram_device>(RAM_TAG)->pointer() + (data & 0x0F)* 0x1000);
	122	state->membank(bank)->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + (data & 0x0F)* 0x1000);
123	123	} else if (data>=0xF8) {
124	124	space->install_read_bank (startaddr, endaddr, bank);
125	125	space->unmap_write(startaddr, endaddr);
126		memory_set_bankptr(machine, bank, mem + ((data & 0x0F)-8)* 0x1000+0x10000);
	126	state->membank(bank)->set_base(mem + ((data & 0x0F)-8)* 0x1000+0x10000);
127	127	} else {
128	128	logerror("%02x %02x\n",block,data);
129	129	space->unmap_readwrite (startaddr, endaddr);

src/mess/machine/apple2.c

r14976	r14977
124	124	}
125	125
126	126	/* get critical info */
127		rom = machine.region("maincpu")->base();
128		rom_length = machine.region("maincpu")->bytes() & ~0xFFF;
	127	rom = machine.root_device().memregion("maincpu")->base();
	128	rom_length = machine.root_device().memregion("maincpu")->bytes() & ~0xFFF;
129	129
130	130	/* loop through the entire memory map */
131	131	bank = state->m_mem_config.first_bank;
r14976	r14977
226	226	/* set the memory bank */
227	227	if (rbase)
228	228	{
229		memory_set_bankptr(machine, rbank, rbase);
	229	state->membank(rbank)->set_base(rbase);
230	230	}
231	231
232	232	/* record the current settings */
r14976	r14977
322	322	/* set the memory bank */
323	323	if (wbase)
324	324	{
325		memory_set_bankptr(machine, wbank, wbase);
	325	state->membank(wbank)->set_base(wbase);
326	326	}
327	327
328	328	/* record the current settings */
r14976	r14977
441	441	UINT32 rom_length, slot_length;
442	442
443	443	// find slot_ram if any
444		rom = machine.region("maincpu")->base();
445		rom_length = machine.region("maincpu")->bytes() & ~0xFFF;
446		slot_length = machine.region("maincpu")->bytes() - rom_length;
	444	rom = machine.root_device().memregion("maincpu")->base();
	445	rom_length = machine.root_device().memregion("maincpu")->bytes() & ~0xFFF;
	446	slot_length = state->memregion("maincpu")->bytes() - rom_length;
447	447	slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
448	448
449	449	if (slot_ram)
r14976	r14977
492	492	UINT32 rom_length, slot_length;
493	493
494	494	// find slot_ram if any
495		rom = space->machine().region("maincpu")->base();
496		rom_length = space->machine().region("maincpu")->bytes() & ~0xFFF;
497		slot_length = space->machine().region("maincpu")->bytes() - rom_length;
	495	rom = space->machine().root_device().memregion("maincpu")->base();
	496	rom_length = space->machine().root_device().memregion("maincpu")->bytes() & ~0xFFF;
	497	slot_length = state->memregion("maincpu")->bytes() - rom_length;
498	498	slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
499	499
500	500	slotnum = ((offset>>8) & 0xf) + 1;
r14976	r14977
547	547	UINT32 rom_length, slot_length;
548	548
549	549	// find slot_ram if any
550		rom = space->machine().region("maincpu")->base();
551		rom_length = space->machine().region("maincpu")->bytes() & ~0xFFF;
552		slot_length = space->machine().region("maincpu")->bytes() - rom_length;
	550	rom = space->machine().root_device().memregion("maincpu")->base();
	551	rom_length = space->machine().root_device().memregion("maincpu")->bytes() & ~0xFFF;
	552	slot_length = state->memregion("maincpu")->bytes() - rom_length;
553	553	slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
554	554
555	555	slotnum = 3;
r14976	r14977
604	604	UINT32 rom_length, slot_length;
605	605
606	606	// find slot_ram if any
607		rom = space->machine().region("maincpu")->base();
608		rom_length = space->machine().region("maincpu")->bytes() & ~0xFFF;
609		slot_length = space->machine().region("maincpu")->bytes() - rom_length;
	607	rom = space->machine().root_device().memregion("maincpu")->base();
	608	rom_length = space->machine().root_device().memregion("maincpu")->bytes() & ~0xFFF;
	609	slot_length = state->memregion("maincpu")->bytes() - rom_length;
610	610	slot_ram = (slot_length > 0) ? &rom[rom_length] : NULL;
611	611
612	612	slotnum = ((offset>>8) & 0xf) + 4;
r14976	r14977
1686	1686	state->m_a2_set = 0;
1687	1687
1688	1688	/* disable VAR_ROMSWITCH if the ROM is only 16k */
1689		if (machine.region("maincpu")->bytes() < 0x8000)
	1689	if (state->memregion("maincpu")->bytes() < 0x8000)
1690	1690	state->m_a2_mask &= ~VAR_ROMSWITCH;
1691	1691
1692	1692	if (machine.device<ram_device>(RAM_TAG)->size() <= 64*1024)

src/mess/machine/ecb_grip.c

r14976	r14977
749	749	m_video_ram = auto_alloc_array(machine(), UINT8, VIDEORAM_SIZE);
750	750
751	751	// setup GRIP memory banking
752		memory_configure_bank(machine(), "videoram", 0, 2, m_video_ram, 0x8000);
753		memory_set_bank(machine(), "videoram", 0);
	752	membank("videoram")->configure_entries(0, 2, m_video_ram, 0x8000);
	753	membank("videoram")->set_entry(0);
754	754
755	755	// allocate keyboard scan timer
756	756	m_kb_timer = timer_alloc();
r14976	r14977
773	773	grip_device::machine_start();
774	774
775	775	// setup ROM banking
776		memory_configure_bank(machine(), "eprom", 0, 2, machine().region(Z80_TAG)->base(), 0x4000);
777		memory_set_bank(*this, "eprom", 0);
	776	membank("eprom")->configure_entries(0, 2, memregion(Z80_TAG)->base(), 0x4000);
	777	*this.root_device().membank("eprom")->set_entry(0);
778	778
779	779	// register for state saving
780	780	save_item(NAME(m_dpage));
r14976	r14977
842	842	{
843	843	m_page = BIT(data, 7);
844	844
845		memory_set_bank(machine(), "videoram", m_page);
	845	membank("videoram")->set_entry(m_page);
846	846	}
847	847
848	848
r14976	r14977
956	956
957	957	WRITE8_MEMBER( grip5_state::eprom_w )
958	958	{
959		memory_set_bank(machine(), "eprom", BIT(data, 0));
	959	membank("eprom")->set_entry(BIT(data, 0));
960	960	}
961	961
962	962

src/mess/machine/pc1251.c

r14976	r14977
93	93	MACHINE_START( pc1251 )
94	94	{
95	95	device_t *main_cpu = machine.device("maincpu");
96		UINT8 *ram = machine.region("maincpu")->base() + 0x8000;
	96	UINT8 *ram = machine.root_device().memregion("maincpu")->base() + 0x8000;
97	97	UINT8 *cpu = sc61860_internal_ram(main_cpu);
98	98
99	99	machine.device<nvram_device>("cpu_nvram")->set_base(cpu, 96);
r14976	r14977
110	110	{
111	111	pc1251_state *state = machine.driver_data<pc1251_state>();
112	112	int i;
113		UINT8 *gfx = machine.region("gfx1")->base();
	113	UINT8 *gfx = state->memregion("gfx1")->base();
114	114	for (i=0; i<128; i++) gfx[i]=i;
115	115
116	116	state->m_power = 1;

src/mess/machine/comx_eb.c

r14976	r14977
254	254	m_ef4[slot] = CLEAR_LINE;
255	255	}
256	256
257		m_rom = subregion("e000")->base();
	257	m_rom = memregion("e000")->base();
258	258	}
259	259
260	260

src/mess/machine/c64_dela_ep7x8.c

r14976	r14977
98	98
99	99	void c64_dela_ep7x8_cartridge_device::device_start()
100	100	{
101		m_rom = subregion("rom")->base();
	101	m_rom = memregion("rom")->base();
102	102
103	103	// state saving
104	104	save_item(NAME(m_bank));

src/mess/machine/pk8020.c

r14976	r14977
232	232	{
233	233	pk8020_state *state = machine.driver_data<pk8020_state>();
234	234	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
235		UINT8 *mem = machine.region("maincpu")->base();
	235	UINT8 *mem = state->memregion("maincpu")->base();
236	236	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
237	237
238	238	switch(data & 0x1F) {
r14976	r14977
241	241	// ROM
242	242	space->install_read_bank (0x0000, 0x37ff, "bank1");
243	243	space->install_write_bank(0x0000, 0x37ff, "bank2");
244		memory_set_bankptr(machine, "bank1", mem + 0x10000);
245		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	244	state->membank("bank1")->set_base(mem + 0x10000);
	245	state->membank("bank2")->set_base(ram + 0x0000);
246	246	// Keyboard
247	247	space->install_read_handler (0x3800, 0x39ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
248	248	space->install_write_bank(0x3800, 0x39ff, "bank3");
249		memory_set_bankptr(machine, "bank3", ram + 0x3800);
	249	state->membank("bank3")->set_base(ram + 0x3800);
250	250	// System reg
251	251	space->install_read_handler (0x3a00, 0x3aff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
252	252	space->install_write_handler(0x3a00, 0x3aff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
259	259	// RAM
260	260	space->install_read_bank (0x4000, 0xffff, "bank4");
261	261	space->install_write_bank(0x4000, 0xffff, "bank5");
262		memory_set_bankptr(machine, "bank4", ram + 0x4000);
263		memory_set_bankptr(machine, "bank5", ram + 0x4000);
	262	state->membank("bank4")->set_base(ram + 0x4000);
	263	state->membank("bank5")->set_base(ram + 0x4000);
264	264	}
265	265	break;
266	266	case 0x01 : {
267	267	// ROM
268	268	space->install_read_bank (0x0000, 0x1fff, "bank1");
269	269	space->install_write_bank(0x0000, 0x1fff, "bank2");
270		memory_set_bankptr(machine, "bank1", mem + 0x10000);
271		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	270	state->membank("bank1")->set_base(mem + 0x10000);
	271	state->membank("bank2")->set_base(ram + 0x0000);
272	272	// RAM
273	273	space->install_read_bank (0x2000, 0xffff, "bank3");
274	274	space->install_write_bank(0x2000, 0xffff, "bank4");
275		memory_set_bankptr(machine, "bank3", ram + 0x2000);
276		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	275	state->membank("bank3")->set_base(ram + 0x2000);
	276	state->membank("bank4")->set_base(ram + 0x2000);
277	277	}
278	278	break;
279	279	case 0x02 : {
280	280	// ROM
281	281	space->install_read_bank (0x0000, 0x3fff, "bank1");
282	282	space->install_write_bank(0x0000, 0x3fff, "bank2");
283		memory_set_bankptr(machine, "bank1", mem + 0x10000);
284		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	283	state->membank("bank1")->set_base(mem + 0x10000);
	284	state->membank("bank2")->set_base(ram + 0x0000);
285	285	// RAM
286	286	space->install_read_bank (0x4000, 0xffff, "bank3");
287	287	space->install_write_bank(0x4000, 0xffff, "bank4");
288		memory_set_bankptr(machine, "bank3", ram + 0x4000);
289		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	288	state->membank("bank3")->set_base(ram + 0x4000);
	289	state->membank("bank4")->set_base(ram + 0x4000);
290	290	}
291	291	break;
292	292	case 0x03 : {
293	293	// RAM
294	294	space->install_read_bank (0x0000, 0xffff, "bank1");
295	295	space->install_write_bank(0x0000, 0xffff, "bank2");
296		memory_set_bankptr(machine, "bank1", ram);
297		memory_set_bankptr(machine, "bank2", ram);
	296	state->membank("bank1")->set_base(ram);
	297	state->membank("bank2")->set_base(ram);
298	298	}
299	299	break;
300	300	case 0x04 :
r14976	r14977
303	303	// ROM
304	304	space->install_read_bank (0x0000, 0x1fff, "bank1");
305	305	space->install_write_bank(0x0000, 0x1fff, "bank2");
306		memory_set_bankptr(machine, "bank1", mem + 0x10000);
307		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	306	state->membank("bank1")->set_base(mem + 0x10000);
	307	state->membank("bank2")->set_base(ram + 0x0000);
308	308	// RAM
309	309	space->install_read_bank (0x2000, 0xf7ff, "bank3");
310	310	space->install_write_bank(0x2000, 0xf7ff, "bank4");
311		memory_set_bankptr(machine, "bank3", ram + 0x2000);
312		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	311	state->membank("bank3")->set_base(ram + 0x2000);
	312	state->membank("bank4")->set_base(ram + 0x2000);
313	313	// Keyboard
314	314	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
315	315	space->install_write_bank(0xf800, 0xf9ff, "bank5");
316		memory_set_bankptr(machine, "bank5", ram + 0xf800);
	316	state->membank("bank5")->set_base(ram + 0xf800);
317	317	// System reg
318	318	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
319	319	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
330	330	// ROM
331	331	space->install_read_bank (0x0000, 0x3fff, "bank1");
332	332	space->install_write_bank(0x0000, 0x3fff, "bank2");
333		memory_set_bankptr(machine, "bank1", mem + 0x10000);
334		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	333	state->membank("bank1")->set_base(mem + 0x10000);
	334	state->membank("bank2")->set_base(ram + 0x0000);
335	335	// RAM
336	336	space->install_read_bank (0x4000, 0xf7ff, "bank3");
337	337	space->install_write_bank(0x4000, 0xf7ff, "bank4");
338		memory_set_bankptr(machine, "bank3", ram + 0x4000);
339		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	338	state->membank("bank3")->set_base(ram + 0x4000);
	339	state->membank("bank4")->set_base(ram + 0x4000);
340	340	// Keyboard
341	341	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
342	342	space->install_write_bank(0xf800, 0xf9ff, "bank5");
343		memory_set_bankptr(machine, "bank5", ram + 0xf800);
	343	state->membank("bank5")->set_base(ram + 0xf800);
344	344	// System reg
345	345	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
346	346	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
357	357	// RAM
358	358	space->install_read_bank (0x0000, 0xf7ff, "bank1");
359	359	space->install_write_bank(0x0000, 0xf7ff, "bank2");
360		memory_set_bankptr(machine, "bank1", ram);
361		memory_set_bankptr(machine, "bank2", ram);
	360	state->membank("bank1")->set_base(ram);
	361	state->membank("bank2")->set_base(ram);
362	362	// Keyboard
363	363	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
364	364	space->install_write_bank(0xf800, 0xf9ff, "bank3");
365		memory_set_bankptr(machine, "bank3", ram + 0xf800);
	365	state->membank("bank3")->set_base(ram + 0xf800);
366	366	// System reg
367	367	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
368	368	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
379	379	// ROM
380	380	space->install_read_bank (0x0000, 0x3fff, "bank1");
381	381	space->install_write_bank(0x0000, 0x3fff, "bank2");
382		memory_set_bankptr(machine, "bank1", mem + 0x10000);
383		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	382	state->membank("bank1")->set_base(mem + 0x10000);
	383	state->membank("bank2")->set_base(ram + 0x0000);
384	384	// Keyboard
385	385	space->install_read_handler (0x3800, 0x39ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
386	386	space->install_write_bank(0x3800, 0x39ff, "bank3");
387		memory_set_bankptr(machine, "bank3", ram + 0x3800);
	387	state->membank("bank3")->set_base(ram + 0x3800);
388	388	// System reg
389	389	space->install_read_handler (0x3a00, 0x3aff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
390	390	space->install_write_handler(0x3a00, 0x3aff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
397	397	// RAM
398	398	space->install_read_bank (0x4000, 0xbfff, "bank4");
399	399	space->install_write_bank(0x4000, 0xbfff, "bank5");
400		memory_set_bankptr(machine, "bank4", ram + 0x4000);
401		memory_set_bankptr(machine, "bank5", ram + 0x4000);
	400	state->membank("bank4")->set_base(ram + 0x4000);
	401	state->membank("bank5")->set_base(ram + 0x4000);
402	402	// Video RAM
403	403	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
404	404	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
410	410	// ROM
411	411	space->install_read_bank (0x0000, 0x1fff, "bank1");
412	412	space->install_write_bank(0x0000, 0x1fff, "bank2");
413		memory_set_bankptr(machine, "bank1", mem + 0x10000);
414		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	413	state->membank("bank1")->set_base(mem + 0x10000);
	414	state->membank("bank2")->set_base(ram + 0x0000);
415	415	// RAM
416	416	space->install_read_bank (0x2000, 0xbfff, "bank3");
417	417	space->install_write_bank(0x2000, 0xbfff, "bank4");
418		memory_set_bankptr(machine, "bank3", ram + 0x2000);
419		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	418	state->membank("bank3")->set_base(ram + 0x2000);
	419	state->membank("bank4")->set_base(ram + 0x2000);
420	420	// Video RAM
421	421	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
422	422	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
427	427	// ROM
428	428	space->install_read_bank (0x0000, 0x3fff, "bank1");
429	429	space->install_write_bank(0x0000, 0x3fff, "bank2");
430		memory_set_bankptr(machine, "bank1", mem + 0x10000);
431		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	430	state->membank("bank1")->set_base(mem + 0x10000);
	431	state->membank("bank2")->set_base(ram + 0x0000);
432	432	// RAM
433	433	space->install_read_bank (0x4000, 0xbfff, "bank3");
434	434	space->install_write_bank(0x4000, 0xbfff, "bank4");
435		memory_set_bankptr(machine, "bank3", ram + 0x4000);
436		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	435	state->membank("bank3")->set_base(ram + 0x4000);
	436	state->membank("bank4")->set_base(ram + 0x4000);
437	437	// Video RAM
438	438	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
439	439	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
444	444	// RAM
445	445	space->install_read_bank (0x0000, 0xbfff, "bank1");
446	446	space->install_write_bank(0x0000, 0xbfff, "bank2");
447		memory_set_bankptr(machine, "bank1", ram + 0x0000);
448		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	447	state->membank("bank1")->set_base(ram + 0x0000);
	448	state->membank("bank2")->set_base(ram + 0x0000);
449	449	// Video RAM
450	450	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
451	451	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
457	457	// ROM
458	458	space->install_read_bank (0x0000, 0x1fff, "bank1");
459	459	space->install_write_bank(0x0000, 0x1fff, "bank2");
460		memory_set_bankptr(machine, "bank1", mem + 0x10000);
461		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	460	state->membank("bank1")->set_base(mem + 0x10000);
	461	state->membank("bank2")->set_base(ram + 0x0000);
462	462	// RAM
463	463	space->install_read_bank (0x2000, 0x3fff, "bank3");
464	464	space->install_write_bank(0x2000, 0x3fff, "bank4");
465		memory_set_bankptr(machine, "bank3", ram + 0x2000);
466		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	465	state->membank("bank3")->set_base(ram + 0x2000);
	466	state->membank("bank4")->set_base(ram + 0x2000);
467	467	// Video RAM
468	468	space->install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
469	469	space->install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
470	470	// RAM
471	471	space->install_read_bank (0x8000, 0xfdff, "bank5");
472	472	space->install_write_bank(0x8000, 0xfdff, "bank6");
473		memory_set_bankptr(machine, "bank5", ram + 0x8000);
474		memory_set_bankptr(machine, "bank6", ram + 0x8000);
	473	state->membank("bank5")->set_base(ram + 0x8000);
	474	state->membank("bank6")->set_base(ram + 0x8000);
475	475	// Devices
476	476	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
477	477	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
485	485	// ROM
486	486	space->install_read_bank (0x0000, 0x3fff, "bank1");
487	487	space->install_write_bank(0x0000, 0x3fff, "bank2");
488		memory_set_bankptr(machine, "bank1", mem + 0x10000);
489		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	488	state->membank("bank1")->set_base(mem + 0x10000);
	489	state->membank("bank2")->set_base(ram + 0x0000);
490	490	// Video RAM
491	491	space->install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
492	492	space->install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
493	493	// RAM
494	494	space->install_read_bank (0x8000, 0xfdff, "bank5");
495	495	space->install_write_bank(0x8000, 0xfdff, "bank6");
496		memory_set_bankptr(machine, "bank5", ram + 0x8000);
497		memory_set_bankptr(machine, "bank6", ram + 0x8000);
	496	state->membank("bank5")->set_base(ram + 0x8000);
	497	state->membank("bank6")->set_base(ram + 0x8000);
498	498	// Devices
499	499	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
500	500	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
508	508	// RAM
509	509	space->install_read_bank (0x0000, 0x3fff, "bank1");
510	510	space->install_write_bank(0x0000, 0x3fff, "bank2");
511		memory_set_bankptr(machine, "bank1", ram + 0x0000);
512		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	511	state->membank("bank1")->set_base(ram + 0x0000);
	512	state->membank("bank2")->set_base(ram + 0x0000);
513	513	// Video RAM
514	514	space->install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
515	515	space->install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
516	516	// RAM
517	517	space->install_read_bank (0x8000, 0xfdff, "bank3");
518	518	space->install_write_bank(0x8000, 0xfdff, "bank4");
519		memory_set_bankptr(machine, "bank3", ram + 0x8000);
520		memory_set_bankptr(machine, "bank4", ram + 0x8000);
	519	state->membank("bank3")->set_base(ram + 0x8000);
	520	state->membank("bank4")->set_base(ram + 0x8000);
521	521	// Devices
522	522	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
523	523	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
531	531	// ROM
532	532	space->install_read_bank (0x0000, 0x5fff, "bank1");
533	533	space->install_write_bank(0x0000, 0x5fff, "bank2");
534		memory_set_bankptr(machine, "bank1", mem + 0x10000);
535		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	534	state->membank("bank1")->set_base(mem + 0x10000);
	535	state->membank("bank2")->set_base(ram + 0x0000);
536	536	// RAM
537	537	space->install_read_bank (0x6000, 0xf7ff, "bank3");
538	538	space->install_write_bank(0x6000, 0xf7ff, "bank4");
539		memory_set_bankptr(machine, "bank3", ram + 0x6000);
540		memory_set_bankptr(machine, "bank4", ram + 0x6000);
	539	state->membank("bank3")->set_base(ram + 0x6000);
	540	state->membank("bank4")->set_base(ram + 0x6000);
541	541	// Keyboard
542	542	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
543	543	space->install_write_bank(0xf800, 0xf9ff, "bank5");
544		memory_set_bankptr(machine, "bank5", ram + 0xf800);
	544	state->membank("bank5")->set_base(ram + 0xf800);
545	545	// System reg
546	546	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
547	547	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
558	558	// ROM
559	559	space->install_read_bank (0x0000, 0x1fff, "bank1");
560	560	space->install_write_bank(0x0000, 0x1fff, "bank2");
561		memory_set_bankptr(machine, "bank1", mem + 0x10000);
562		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	561	state->membank("bank1")->set_base(mem + 0x10000);
	562	state->membank("bank2")->set_base(ram + 0x0000);
563	563	// RAM
564	564	space->install_read_bank (0x2000, 0xf7ff, "bank3");
565	565	space->install_write_bank(0x2000, 0xf7ff, "bank4");
566		memory_set_bankptr(machine, "bank3", ram + 0x2000);
567		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	566	state->membank("bank3")->set_base(ram + 0x2000);
	567	state->membank("bank4")->set_base(ram + 0x2000);
568	568	// Keyboard
569	569	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
570	570	space->install_write_bank(0xf800, 0xf9ff, "bank5");
571		memory_set_bankptr(machine, "bank5", ram + 0xf800);
	571	state->membank("bank5")->set_base(ram + 0xf800);
572	572	// System reg
573	573	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
574	574	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
585	585	// ROM
586	586	space->install_read_bank (0x0000, 0x3fff, "bank1");
587	587	space->install_write_bank(0x0000, 0x3fff, "bank2");
588		memory_set_bankptr(machine, "bank1", mem + 0x10000);
589		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	588	state->membank("bank1")->set_base(mem + 0x10000);
	589	state->membank("bank2")->set_base(ram + 0x0000);
590	590	// RAM
591	591	space->install_read_bank (0x4000, 0xf7ff, "bank3");
592	592	space->install_write_bank(0x4000, 0xf7ff, "bank4");
593		memory_set_bankptr(machine, "bank3", ram + 0x4000);
594		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	593	state->membank("bank3")->set_base(ram + 0x4000);
	594	state->membank("bank4")->set_base(ram + 0x4000);
595	595	// Keyboard
596	596	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
597	597	space->install_write_bank(0xf800, 0xf9ff, "bank5");
598		memory_set_bankptr(machine, "bank5", ram + 0xf800);
	598	state->membank("bank5")->set_base(ram + 0xf800);
599	599	// System reg
600	600	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
601	601	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
612	612	// RAM
613	613	space->install_read_bank (0x0000, 0xf7ff, "bank1");
614	614	space->install_write_bank(0x0000, 0xf7ff, "bank2");
615		memory_set_bankptr(machine, "bank1", ram + 0x0000);
616		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	615	state->membank("bank1")->set_base(ram + 0x0000);
	616	state->membank("bank2")->set_base(ram + 0x0000);
617	617	// Keyboard
618	618	space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
619	619	space->install_write_bank(0xf800, 0xf9ff, "bank3");
620		memory_set_bankptr(machine, "bank3", ram + 0xf800);
	620	state->membank("bank3")->set_base(ram + 0xf800);
621	621	// System reg
622	622	space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
623	623	space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
634	634	// ROM
635	635	space->install_read_bank (0x0000, 0x5fff, "bank1");
636	636	space->install_write_bank(0x0000, 0x5fff, "bank2");
637		memory_set_bankptr(machine, "bank1", mem + 0x10000);
638		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	637	state->membank("bank1")->set_base(mem + 0x10000);
	638	state->membank("bank2")->set_base(ram + 0x0000);
639	639	// RAM
640	640	space->install_read_bank (0x6000, 0xfdff, "bank3");
641	641	space->install_write_bank(0x6000, 0xfdff, "bank4");
642		memory_set_bankptr(machine, "bank3", ram + 0x6000);
643		memory_set_bankptr(machine, "bank4", ram + 0x6000);
	642	state->membank("bank3")->set_base(ram + 0x6000);
	643	state->membank("bank4")->set_base(ram + 0x6000);
644	644	// Devices
645	645	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
646	646	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
654	654	// ROM
655	655	space->install_read_bank (0x0000, 0x1fff, "bank1");
656	656	space->install_write_bank(0x0000, 0x1fff, "bank2");
657		memory_set_bankptr(machine, "bank1", mem + 0x10000);
658		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	657	state->membank("bank1")->set_base(mem + 0x10000);
	658	state->membank("bank2")->set_base(ram + 0x0000);
659	659	// RAM
660	660	space->install_read_bank (0x2000, 0xfdff, "bank3");
661	661	space->install_write_bank(0x2000, 0xfdff, "bank4");
662		memory_set_bankptr(machine, "bank3", ram + 0x2000);
663		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	662	state->membank("bank3")->set_base(ram + 0x2000);
	663	state->membank("bank4")->set_base(ram + 0x2000);
664	664	// Devices
665	665	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
666	666	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
674	674	// ROM
675	675	space->install_read_bank (0x0000, 0x3fff, "bank1");
676	676	space->install_write_bank(0x0000, 0x3fff, "bank2");
677		memory_set_bankptr(machine, "bank1", mem + 0x10000);
678		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	677	state->membank("bank1")->set_base(mem + 0x10000);
	678	state->membank("bank2")->set_base(ram + 0x0000);
679	679	// RAM
680	680	space->install_read_bank (0x4000, 0xfdff, "bank3");
681	681	space->install_write_bank(0x4000, 0xfdff, "bank4");
682		memory_set_bankptr(machine, "bank3", ram + 0x4000);
683		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	682	state->membank("bank3")->set_base(ram + 0x4000);
	683	state->membank("bank4")->set_base(ram + 0x4000);
684	684	// Devices
685	685	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
686	686	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
694	694	// RAM
695	695	space->install_read_bank (0x0000, 0xfdff, "bank1");
696	696	space->install_write_bank(0x0000, 0xfdff, "bank2");
697		memory_set_bankptr(machine, "bank1", ram);
698		memory_set_bankptr(machine, "bank2", ram);
	697	state->membank("bank1")->set_base(ram);
	698	state->membank("bank2")->set_base(ram);
699	699	// Devices
700	700	space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
701	701	space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
r14976	r14977
709	709	// ROM
710	710	space->install_read_bank (0x0000, 0x5fff, "bank1");
711	711	space->install_write_bank(0x0000, 0x5fff, "bank2");
712		memory_set_bankptr(machine, "bank1", mem + 0x10000);
713		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	712	state->membank("bank1")->set_base(mem + 0x10000);
	713	state->membank("bank2")->set_base(ram + 0x0000);
714	714	// RAM
715	715	space->install_read_bank (0x6000, 0xbeff, "bank3");
716	716	space->install_write_bank(0x6000, 0xbeff, "bank4");
717		memory_set_bankptr(machine, "bank3", ram + 0x6000);
718		memory_set_bankptr(machine, "bank4", ram + 0x6000);
	717	state->membank("bank3")->set_base(ram + 0x6000);
	718	state->membank("bank4")->set_base(ram + 0x6000);
719	719	// System reg
720	720	space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
721	721	space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
729	729	// ROM
730	730	space->install_read_bank (0x0000, 0x1fff, "bank1");
731	731	space->install_write_bank(0x0000, 0x1fff, "bank2");
732		memory_set_bankptr(machine, "bank1", mem + 0x10000);
733		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	732	state->membank("bank1")->set_base(mem + 0x10000);
	733	state->membank("bank2")->set_base(ram + 0x0000);
734	734	// RAM
735	735	space->install_read_bank (0x2000, 0xbeff, "bank3");
736	736	space->install_write_bank(0x2000, 0xbeff, "bank4");
737		memory_set_bankptr(machine, "bank3", ram + 0x2000);
738		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	737	state->membank("bank3")->set_base(ram + 0x2000);
	738	state->membank("bank4")->set_base(ram + 0x2000);
739	739	// System reg
740	740	space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
741	741	space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
749	749	// ROM
750	750	space->install_read_bank (0x0000, 0x3fff, "bank1");
751	751	space->install_write_bank(0x0000, 0x3fff, "bank2");
752		memory_set_bankptr(machine, "bank1", mem + 0x10000);
753		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	752	state->membank("bank1")->set_base(mem + 0x10000);
	753	state->membank("bank2")->set_base(ram + 0x0000);
754	754	// RAM
755	755	space->install_read_bank (0x4000, 0xbeff, "bank3");
756	756	space->install_write_bank(0x4000, 0xbeff, "bank4");
757		memory_set_bankptr(machine, "bank3", ram + 0x4000);
758		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	757	state->membank("bank3")->set_base(ram + 0x4000);
	758	state->membank("bank4")->set_base(ram + 0x4000);
759	759	// System reg
760	760	space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
761	761	space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
769	769	// RAM
770	770	space->install_read_bank (0x0000, 0xbeff, "bank1");
771	771	space->install_write_bank(0x0000, 0xbeff, "bank2");
772		memory_set_bankptr(machine, "bank1", ram);
773		memory_set_bankptr(machine, "bank2", ram);
	772	state->membank("bank1")->set_base(ram);
	773	state->membank("bank2")->set_base(ram);
774	774	// System reg
775	775	space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
776	776	space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
r14976	r14977
784	784	// ROM
785	785	space->install_read_bank (0x0000, 0x5fff, "bank1");
786	786	space->install_write_bank(0x0000, 0x5fff, "bank2");
787		memory_set_bankptr(machine, "bank1", mem + 0x10000);
788		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	787	state->membank("bank1")->set_base(mem + 0x10000);
	788	state->membank("bank2")->set_base(ram + 0x0000);
789	789	// RAM
790	790	space->install_read_bank (0x6000, 0xbfff, "bank3");
791	791	space->install_write_bank(0x6000, 0xbfff, "bank4");
792		memory_set_bankptr(machine, "bank3", ram + 0x6000);
793		memory_set_bankptr(machine, "bank4", ram + 0x6000);
	792	state->membank("bank3")->set_base(ram + 0x6000);
	793	state->membank("bank4")->set_base(ram + 0x6000);
794	794	// Video RAM
795	795	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
796	796	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
801	801	// ROM
802	802	space->install_read_bank (0x0000, 0x1fff, "bank1");
803	803	space->install_write_bank(0x0000, 0x1fff, "bank2");
804		memory_set_bankptr(machine, "bank1", mem + 0x10000);
805		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	804	state->membank("bank1")->set_base(mem + 0x10000);
	805	state->membank("bank2")->set_base(ram + 0x0000);
806	806	// RAM
807	807	space->install_read_bank (0x2000, 0xbfff, "bank3");
808	808	space->install_write_bank(0x2000, 0xbfff, "bank4");
809		memory_set_bankptr(machine, "bank3", ram + 0x2000);
810		memory_set_bankptr(machine, "bank4", ram + 0x2000);
	809	state->membank("bank3")->set_base(ram + 0x2000);
	810	state->membank("bank4")->set_base(ram + 0x2000);
811	811	// Video RAM
812	812	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
813	813	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
818	818	// ROM
819	819	space->install_read_bank (0x0000, 0x3fff, "bank1");
820	820	space->install_write_bank(0x0000, 0x3fff, "bank2");
821		memory_set_bankptr(machine, "bank1", mem + 0x10000);
822		memory_set_bankptr(machine, "bank2", ram + 0x0000);
	821	state->membank("bank1")->set_base(mem + 0x10000);
	822	state->membank("bank2")->set_base(ram + 0x0000);
823	823	// RAM
824	824	space->install_read_bank (0x4000, 0xbfff, "bank3");
825	825	space->install_write_bank(0x4000, 0xbfff, "bank4");
826		memory_set_bankptr(machine, "bank3", ram + 0x4000);
827		memory_set_bankptr(machine, "bank4", ram + 0x4000);
	826	state->membank("bank3")->set_base(ram + 0x4000);
	827	state->membank("bank4")->set_base(ram + 0x4000);
828	828	// Video RAM
829	829	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
830	830	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
r14976	r14977
835	835	// RAM
836	836	space->install_read_bank (0x0000, 0xbfff, "bank1");
837	837	space->install_write_bank(0x0000, 0xbfff, "bank2");
838		memory_set_bankptr(machine, "bank1", ram);
839		memory_set_bankptr(machine, "bank2", ram);
	838	state->membank("bank1")->set_base(ram);
	839	state->membank("bank2")->set_base(ram);
840	840	// Video RAM
841	841	space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
842	842	space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));

src/mess/machine/kc.c

r14976	r14977
299	299
300	300	/* yes; set address of bank */
301	301	space->install_read_bank(0x0000, 0x3fff, "bank1");
302		memory_set_bankptr(machine(), "bank1", m_ram_base);
	302	membank("bank1")->set_base(m_ram_base);
303	303
304	304	/* write protect ram? */
305	305	if ((m_pio_data[0] & (1<<3)) == 0)
r14976	r14977
345	345	{
346	346	address_space *space = m_maincpu->memory().space( AS_PROGRAM );
347	347
348		if ((m_pio_data[0] & (1<<7)) && machine().region("basic")->base() != NULL)
	348	if ((m_pio_data[0] & (1<<7)) && memregion("basic")->base() != NULL)
349	349	{
350	350	/* BASIC takes next priority */
351	351	LOG(("BASIC rom 0x0c000\n"));
352	352
353		memory_set_bankptr(machine(), "bank4", machine().region("basic")->base());
	353	membank("bank4")->set_base(machine().root_device().memregion("basic")->base());
354	354	space->install_read_bank(0xc000, 0xdfff, "bank4");
355	355	space->unmap_write(0xc000, 0xdfff);
356	356	}
r14976	r14977
373	373	/* enable CAOS rom in memory range 0x0e000-0x0ffff */
374	374	LOG(("CAOS rom 0x0e000\n"));
375	375	/* read will access the rom */
376		memory_set_bankptr(machine(), "bank5", machine().region("caos")->base() + 0x2000);
	376	membank("bank5")->set_base(machine().root_device().memregion("caos")->base() + 0x2000);
377	377	space->install_read_bank(0xe000, 0xffff, "bank5");
378	378	space->unmap_write(0xe000, 0xffff);
379	379	}
r14976	r14977
397	397	/* IRM enabled */
398	398	LOG(("IRM enabled\n"));
399	399
400		memory_set_bankptr(machine(), "bank3", m_ram_base + 0x4000);
	400	membank("bank3")->set_base(m_ram_base + 0x4000);
401	401	space->install_readwrite_bank(0x8000, 0xbfff, "bank3");
402	402	}
403	403	else
r14976	r14977
423	423	/* yes */
424	424	space->install_read_bank(0x4000, 0x7fff, "bank2");
425	425	/* set address of bank */
426		memory_set_bankptr(machine(), "bank2", m_ram_base + 0x4000);
	426	membank("bank2")->set_base(m_ram_base + 0x4000);
427	427
428	428	/* write protect ram? */
429	429	if ((m_port_86_data & (1<<1)) == 0)
r14976	r14977
462	462	/* CAOS rom takes priority */
463	463	LOG(("CAOS rom 0x0c000\n"));
464	464
465		memory_set_bankptr(machine(), "bank4", machine().region("caos")->base());
	465	membank("bank4")->set_base(machine().root_device().memregion("caos")->base());
466	466	space->install_read_bank(0xc000, 0xdfff, "bank4");
467	467	space->unmap_write(0xc000, 0xdfff);
468	468	}
r14976	r14977
473	473	/* BASIC takes next priority */
474	474	LOG(("BASIC rom 0x0c000\n"));
475	475
476		int bank = machine().region("basic")->bytes() == 0x8000 ? (m_port_86_data>>5) & 0x03 : 0;
	476	int bank = memregion("basic")->bytes() == 0x8000 ? (m_port_86_data>>5) & 0x03 : 0;
477	477
478		memory_set_bankptr(machine(), "bank4", machine().region("basic")->base() + (bank << 13));
	478	membank("bank4")->set_base(machine().root_device().memregion("basic")->base() + (bank << 13));
479	479	space->install_read_bank(0xc000, 0xdfff, "bank4");
480	480	space->unmap_write(0xc000, 0xdfff);
481	481	}
r14976	r14977
500	500
501	501	UINT8* ram_page = (UINT8*)kc85_4_get_video_ram_base(machine(), (m_port_84_data & 0x04), (m_port_84_data & 0x02));
502	502
503		memory_set_bankptr(machine(), "bank3", ram_page);
	503	membank("bank3")->set_base(ram_page);
504	504	space->install_readwrite_bank(0x8000, 0xa7ff, "bank3");
505	505
506	506	ram_page = (UINT8*)kc85_4_get_video_ram_base(machine(), 0, 0);
507	507
508		memory_set_bankptr(machine(), "bank6", ram_page + 0x2800);
	508	membank("bank6")->set_base(ram_page + 0x2800);
509	509	space->install_readwrite_bank(0xa800, 0xbfff, "bank6");
510	510	}
511	511	else if (m_pio_data[1] & (1<<5))
r14976	r14977
530	530	mem_ptr = m_ram_base + (ram8_block<<14);
531	531	}
532	532
533		memory_set_bankptr(machine(), "bank3", mem_ptr);
534		memory_set_bankptr(machine(), "bank6", mem_ptr + 0x2800);
	533	membank("bank3")->set_base(mem_ptr);
	534	membank("bank6")->set_base(mem_ptr + 0x2800);
535	535	space->install_read_bank(0x8000, 0xa7ff, "bank3");
536	536	space->install_read_bank(0xa800, 0xbfff, "bank6");
537	537

src/mess/video/zx.c

r14976	r14977
128	128	zx_state *state = machine.driver_data<zx_state>();
129	129	screen_device *screen = machine.first_screen();
130	130	int offs0 = offs & 0x7fff;
131		UINT8 *rom = machine.region("maincpu")->base();
	131	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
132	132	UINT8 chr = rom[offs0];
133	133
134	134	if ((!state->m_ula_irq_active) && (chr == 0x76))
r14976	r14977
143	143	else
144	144	creg = cpu_get_reg(machine.device("maincpu"), Z80_C);
145	145
146		chrgen = machine.region(region)->base();
	146	chrgen = state->memregion(region)->base();
147	147
148	148	if ((++state->m_ula_scanline_count == screen->height()) || (creg == 32))
149	149	{

src/mess/video/dgn_beta.c

r14976	r14977
105	105	int i;
106	106	if(IsTextMode)
107	107	{
108		UINT8 *chr_gen = device->machine().region("gfx1")->base();
	108	UINT8 *chr_gen = state->memregion("gfx1")->base();
109	109	for ( i = 0; i < x_count; i++ )
110	110	{
111	111	UINT32 offset = ( ( ma + i ) | ((state->m_GCtrl & GCtrlAddrLines)<<8)) << 1;

src/mess/video/911_vdt.c

r14976	r14977
178	178	void vdt911_init(running_machine &machine)
179	179	{
180	180	UINT8 *base;
181		UINT8 *chr = machine.region(vdt911_chr_region)->base();
	181	UINT8 *chr = machine.root_device().memregion(vdt911_chr_region)->base();
182	182
183	183	/* set up US character definitions */
184	184	base = chr+vdt911_US_chr_offset;

src/mess/video/dai.c

r14976	r14977
61	61	address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
62	62	int i, j, k, l;
63	63
64		UINT8* char_rom = screen.machine().region("gfx1")->base();
	64	UINT8* char_rom = state->memregion("gfx1")->base();
65	65
66	66	UINT16 dai_video_memory_start = 0xbfff;
67	67	UINT16 dai_scan_lines = 604;   /* scan lines of PAL tv */

src/mess/video/isa_mda.c

r14976	r14977
197	197	m_pixel = 0;
198	198
199	199	astring tempstring;
200		m_chr_gen = machine().region(subtag(tempstring, "gfx1"))->base();
	200	m_chr_gen = memregion(subtag(tempstring, "gfx1"))->base();
201	201	}
202	202
203	203	/***************************************************************************
r14976	r14977
598	598	m_configuration_switch = 0;
599	599
600	600	astring tempstring;
601		m_chr_gen = machine().region(subtag(tempstring, "gfx1"))->base();
	601	m_chr_gen = memregion(subtag(tempstring, "gfx1"))->base();
602	602	}
603	603
604	604	/***************************************************************************

src/mess/video/rm380z.c

r14976	r14977
382	382
383	383	void rm380z_state::update_screen(bitmap_ind16 &bitmap)
384	384	{
385		unsigned char* pChar=machine().region("chargen")->base();
	385	unsigned char* pChar=machine().root_device().memregion("chargen")->base();
386	386
387	387	int lineWidth=0x80;
388	388	int ncols=80;

src/mess/video/cbmb.c

r14976	r14977
16	16
17	17	void cbm600_vh_init(running_machine &machine)
18	18	{
19		UINT8 *gfx = machine.region("gfx1")->base();
	19	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
20	20	int i;
21	21
22	22	/* inversion logic on board */
r14976	r14977
29	29
30	30	void cbm700_vh_init(running_machine &machine)
31	31	{
32		UINT8 *gfx = machine.region("gfx1")->base();
	32	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
33	33	int i;
34	34	for (i=0; i<0x800; i++) {
35	35	gfx[0x1000+i]=gfx[0x800+i];

src/mess/video/mc80.c

r14976	r14977
140	140	VIDEO_START( mc8030 )
141	141	{
142	142	mc80_state *state = machine.driver_data<mc80_state>();
143		state->m_p_videoram.set_target(machine.region("vram")->base(),state->m_p_videoram.bytes());
	143	state->m_p_videoram.set_target(state->memregion("vram")->base(),state->m_p_videoram.bytes());
144	144	}
145	145
146	146	SCREEN_UPDATE_IND16( mc8030 )

src/mess/video/mbee.c

r14976	r14977
152	152	d3..d0 select state->m_videoram bank */
153	153
154	154	m_1c = data;
155		memory_set_bank(machine(), "basic", BIT(data, 5));
	155	membank("basic")->set_entry(BIT(data, 5));
156	156	}
157	157
158	158	WRITE8_MEMBER( mbee_state::mbee256_1c_w )
r14976	r14977
333	333	case 12:
334	334	data &= 0x3f; // select alternate character set
335	335	if( m_sy6545_reg[12] != data )
336		memcpy(m_p_gfxram, machine().region("gfx")->base() + (((data & 0x30) == 0x20) << 11), 0x800);
	336	memcpy(m_p_gfxram, memregion("gfx")->base() + (((data & 0x30) == 0x20) << 11), 0x800);
337	337	break;
338	338	case 31:
339	339	/* This firstly pushes the contents of the transparent registers onto the MA lines,
r14976	r14977
362	362	VIDEO_START( mbee )
363	363	{
364	364	mbee_state *state = machine.driver_data<mbee_state>();
365		state->m_p_videoram = machine.region("videoram")->base();
366		state->m_p_gfxram = machine.region("gfx")->base()+0x1000;
	365	state->m_p_videoram = machine.root_device().memregion("videoram")->base();
	366	state->m_p_gfxram = state->memregion("gfx")->base()+0x1000;
367	367	state->m_is_premium = 0;
368	368	}
369	369
370	370	VIDEO_START( mbeeic )
371	371	{
372	372	mbee_state *state = machine.driver_data<mbee_state>();
373		state->m_p_videoram = machine.region("videoram")->base();
374		state->m_p_colorram = machine.region("colorram")->base();
375		state->m_p_gfxram = machine.region("gfx")->base()+0x1000;
	373	state->m_p_videoram = machine.root_device().memregion("videoram")->base();
	374	state->m_p_colorram = machine.root_device().memregion("colorram")->base();
	375	state->m_p_gfxram = state->memregion("gfx")->base()+0x1000;
376	376	state->m_is_premium = 0;
377	377	}
378	378
379	379	VIDEO_START( mbeeppc )
380	380	{
381	381	mbee_state *state = machine.driver_data<mbee_state>();
382		state->m_p_videoram = machine.region("videoram")->base();
383		state->m_p_colorram = machine.region("colorram")->base();
384		state->m_p_gfxram = machine.region("gfx")->base()+0x1000;
385		state->m_p_attribram = machine.region("attrib")->base();
	382	state->m_p_videoram = machine.root_device().memregion("videoram")->base();
	383	state->m_p_colorram = machine.root_device().memregion("colorram")->base();
	384	state->m_p_gfxram = machine.root_device().memregion("gfx")->base()+0x1000;
	385	state->m_p_attribram = state->memregion("attrib")->base();
386	386	state->m_is_premium = 1;
387	387	}
388	388
r14976	r14977
556	556
557	557	PALETTE_INIT( mbeeic )
558	558	{
559		const UINT8 *color_prom = machine.region("proms")->base();
	559	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
560	560	UINT16 i;
561	561	UINT8 r, b, g, k;
562	562	UINT8 level[] = { 0, 0x80, 0xff, 0xff };   /* off, half, full intensity */
r14976	r14977
584	584
585	585	PALETTE_INIT( mbeepc85b )
586	586	{
587		const UINT8 *color_prom = machine.region("proms")->base();
	587	const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
588	588	UINT16 i;
589	589	UINT8 r, b, g, k;
590	590	UINT8 level[] = { 0, 0x80, 0x80, 0xff };   /* off, half, full intensity */

src/mess/video/pc1512.c

r14976	r14977
561	561	void pc1512_state::video_start()
562	562	{
563	563	// find memory regions
564		m_char_rom = machine().region(AMS40041_TAG)->base();
	564	m_char_rom = memregion(AMS40041_TAG)->base();
565	565
566	566	// allocate memory
567	567	m_video_ram = auto_alloc_array(machine(), UINT8, 0x10000);

src/mess/video/isa_cga.c

r14976	r14977
732	732	}
733	733
734	734	astring tempstring;
735		m_chr_gen_base = machine().region(subtag(tempstring, "gfx1"))->base();
	735	m_chr_gen_base = memregion(subtag(tempstring, "gfx1"))->base();
736	736	m_chr_gen = m_chr_gen_base + m_chr_gen_offset[1];
737	737	}
738	738
r14976	r14977
1858	1858	}
1859	1859	else
1860	1860	{
1861		memory_set_bankptr(machine(),"bank1", m_vram + isa8_cga_pc1512_device::vram_offset[0]);
	1861	membank("bank1")->set_base(m_vram + isa8_cga_pc1512_device::vram_offset[0]);
1862	1862	}
1863	1863	m_mode_control = data;
1864	1864	switch( m_mode_control & 0x3F )
r14976	r14977
1916	1916	m_read = data;
1917	1917	if ( ( m_mode_control & 0x12 ) == 0x12 )
1918	1918	{
1919		memory_set_bankptr(machine(),"bank1", m_vram + isa8_cga_pc1512_device::vram_offset[data & 3]);
	1919	membank("bank1")->set_base(m_vram + isa8_cga_pc1512_device::vram_offset[data & 3]);
1920	1920	}
1921	1921	break;
1922	1922
r14976	r14977
2031	2031	m_mc6845_locked_register[i] = 0;
2032	2032	}
2033	2033
2034		memory_set_bankptr(machine(), "bank1", m_vram + isa8_cga_pc1512_device::vram_offset[0]);
	2034	membank("bank1")->set_base(m_vram + isa8_cga_pc1512_device::vram_offset[0]);
2035	2035	}
2036	2036

src/mess/video/isa_ega.c

r14976	r14977
598	598	palette_set_color_rgb( machine(), i, r, g, b );
599	599	}
600	600	astring tempstring;
601		UINT8   *dst = machine().region(subtag(tempstring, "user2" ))->base() + 0x0000;
602		UINT8   *src = machine().region(subtag(tempstring, "user1" ))->base() + 0x3fff;
	601	UINT8   *dst = memregion(subtag(tempstring, "user2" ))->base() + 0x0000;
	602	UINT8   *src = memregion(subtag(tempstring, "user1" ))->base() + 0x3fff;
603	603	int      i;
604	604
605	605	/* Perform the EGA bios address line swaps */

src/mess/video/gb.c

r14976	r14977
1235	1235	if (mode == GB_VIDEO_CGB) vram_size = 0x4000;
1236	1236
1237	1237	/* free regions if already allocated */
1238		if (machine.region("gfx1")->base())      machine.region_free(":gfx1");
1239		if (machine.region("gfx2")->base())      machine.region_free(":gfx2");
	1238	if (state->memregion("gfx1")->base())      machine.memory().region_free(":gfx1");
	1239	if (state->memregion("gfx2")->base())      machine.memory().region_free(":gfx2");
1240	1240
1241		state->m_lcd.gb_vram = machine.region_alloc(":gfx1", vram_size, 1, ENDIANNESS_LITTLE );
1242		state->m_lcd.gb_oam = machine.region_alloc(":gfx2", 0x100, 1, ENDIANNESS_LITTLE );
	1241	state->m_lcd.gb_vram = machine.memory().region_alloc(":gfx1", vram_size, 1, ENDIANNESS_LITTLE );
	1242	state->m_lcd.gb_oam = machine.memory().region_alloc(":gfx2", 0x100, 1, ENDIANNESS_LITTLE );
1243	1243	memset( state->m_lcd.gb_vram->base(), 0, vram_size );
1244	1244
1245	1245	state->m_lcd.gb_vram_ptr = state->m_lcd.gb_vram->base();

src/mess/video/iq151_video64.c

r14976	r14977
60	60
61	61	void iq151_video64_device::device_start()
62	62	{
63		m_videoram = (UINT8*)subregion("videoram")->base();
64		m_chargen = (UINT8*)subregion("chargen")->base();
	63	m_videoram = (UINT8*)memregion("videoram")->base();
	64	m_chargen = (UINT8*)memregion("chargen")->base();
65	65
66	66	machine().gfx[0] = gfx_element_alloc(machine(), &iq151_video64_charlayout, m_chargen, 1, 0);
67	67	}

src/mess/video/tmc600.c

r14976	r14977
115	115	m_color_ram = auto_alloc_array(machine(), UINT8, TMC600_PAGE_RAM_SIZE);
116	116
117	117	// find memory regions
118		m_char_rom = machine().region("chargen")->base();
	118	m_char_rom = memregion("chargen")->base();
119	119
120	120	// register for state saving
121	121	save_pointer(NAME(m_color_ram), TMC600_PAGE_RAM_SIZE);

src/mess/video/radio86.c

r14976	r14977
27	27	radio86_state *state = device->machine().driver_data<radio86_state>();
28	28	int i;
29	29	bitmap_ind16 &bitmap = state->m_bitmap;
30		UINT8 *charmap = device->machine().region("gfx1")->base();
	30	UINT8 *charmap = state->memregion("gfx1")->base();
31	31	UINT8 pixels = charmap[(linecount & 7) + (charcode << 3)] ^ 0xff;
32	32	if (vsp) {
33	33	pixels = 0;
r14976	r14977
49	49	radio86_state *state = device->machine().driver_data<radio86_state>();
50	50	int i;
51	51	bitmap_ind16 &bitmap = state->m_bitmap;
52		UINT8 *charmap = device->machine().region("gfx1")->base() + (state->m_mikrosha_font_page & 1) * 0x400;
	52	UINT8 *charmap = state->memregion("gfx1")->base() + (state->m_mikrosha_font_page & 1) * 0x400;
53	53	UINT8 pixels = charmap[(linecount & 7) + (charcode << 3)] ^ 0xff;
54	54	if (vsp) {
55	55	pixels = 0;
r14976	r14977
70	70	radio86_state *state = device->machine().driver_data<radio86_state>();
71	71	int i;
72	72	bitmap_ind16 &bitmap = state->m_bitmap;
73		UINT8 *charmap = device->machine().region("gfx1")->base() + (gpa & 1) * 0x400;
	73	UINT8 *charmap = state->memregion("gfx1")->base() + (gpa & 1) * 0x400;
74	74	UINT8 pixels = charmap[(linecount & 7) + (charcode << 3)] ^ 0xff;
75	75	if (vsp) {
76	76	pixels = 0;
r14976	r14977
91	91	radio86_state *state = device->machine().driver_data<radio86_state>();
92	92	int i;
93	93	bitmap_ind16 &bitmap = state->m_bitmap;
94		UINT8 *charmap = device->machine().region("gfx1")->base() + 0x400 * (gpa * 2 + hlgt);
	94	UINT8 *charmap = state->memregion("gfx1")->base() + 0x400 * (gpa * 2 + hlgt);
95	95	UINT8 pixels = charmap[(linecount & 7) + (charcode << 3)] ^ 0xff;
96	96	if (vsp) {
97	97	pixels = 0;

src/mess/video/abc800.c

r14976	r14977
92	92	void abc800_state::video_start()
93	93	{
94	94	// find memory regions
95		m_char_rom = machine().region(MC6845_TAG)->base();
96		m_fgctl_prom = machine().region("hru2")->base();
	95	m_char_rom = memregion(MC6845_TAG)->base();
	96	m_fgctl_prom = memregion("hru2")->base();
97	97
98	98	// register for state saving
99	99	save_item(NAME(m_hrs));

src/mess/video/thomson.c

r14976	r14977
870	870	{
871	871	assert( point >= 0 && point <= 1 );
872	872	thom_mode_point = ( ! point ) * 0x2000;
873		memory_set_bank( machine, THOM_VRAM_BANK, ! point );
	873	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( ! point );
874	874	}
875	875
876	876
r14976	r14977
1149	1149
1150	1150	thom_mode_point = 0;
1151	1151	state_save_register_global(machine,  thom_mode_point );
1152		memory_set_bank( machine, THOM_VRAM_BANK, 0 );
	1152	machine.root_device().membank( THOM_VRAM_BANK )->set_entry( 0 );
1153	1153
1154	1154	thom_floppy_rcount = 0;
1155	1155	thom_floppy_wcount = 0;

src/mess/video/abc80.c

r14976	r14977
204	204	m_video_ram = auto_alloc_array(machine(), UINT8, 0x400);
205	205
206	206	// find memory regions
207		m_char_rom = machine().region("chargen")->base();
208		m_hsync_prom = machine().region("hsync")->base();
209		m_vsync_prom = machine().region("vsync")->base();
210		m_line_prom = machine().region("line")->base();
211		m_attr_prom = machine().region("attr")->base();
	207	m_char_rom = memregion("chargen")->base();
	208	m_hsync_prom = memregion("hsync")->base();
	209	m_vsync_prom = memregion("vsync")->base();
	210	m_line_prom = memregion("line")->base();
	211	m_attr_prom = memregion("attr")->base();
212	212
213	213	// register for state saving
214	214	save_item(NAME(m_blink));

src/mess/video/x68k.c

r14976	r14977
1088	1088	break;
1089	1089
1090	1090	/* create the char set (gfx will then be updated dynamically from RAM) */
1091		machine.gfx[gfx_index] = gfx_element_alloc(machine, &x68k_pcg_8, machine.region("user1")->base(), 32, 0);
	1091	machine.gfx[gfx_index] = gfx_element_alloc(machine, &x68k_pcg_8, machine.root_device().memregion("user1")->base(), 32, 0);
1092	1092
1093	1093	gfx_index++;
1094	1094
1095		machine.gfx[gfx_index] = gfx_element_alloc(machine, &x68k_pcg_16, machine.region("user1")->base(), 32, 0);
	1095	machine.gfx[gfx_index] = gfx_element_alloc(machine, &x68k_pcg_16, state->memregion("user1")->base(), 32, 0);
1096	1096	machine.gfx[gfx_index]->total_colors = 32;
1097	1097
1098	1098	/* Tilemaps */
r14976	r14977
1150	1150	rect.max_y = cliprect.max_y;
1151	1151
1152	1152	// update tiles
1153		//rom = screen.machine().region("user1")->base();
	1153	//rom = screen.machine().root_device().memregion("user1")->base();
1154	1154	for(x=0;x<256;x++)
1155	1155	{
1156	1156	if(state->m_video.tile16_dirty[x] != 0)

src/mess/video/kaypro.c

r14976	r14977
316	316	VIDEO_START( kaypro )
317	317	{
318	318	kaypro_state *state = machine.driver_data<kaypro_state>();
319		state->m_p_chargen = machine.region("chargen")->base();
	319	state->m_p_chargen = state->memregion("chargen")->base();
320	320	}

src/mess/video/super80.c

r14976	r14977
95	95	super80_state *state = screen.machine().driver_data<super80_state>();
96	96	UINT8 y,ra,chr=32,gfx,screen_on=0;
97	97	UINT16 sy=0,ma=state->m_vidpg,x;
98		UINT8 *RAM = screen.machine().region("maincpu")->base();
	98	UINT8 *RAM = state->memregion("maincpu")->base();
99	99
100	100	output_set_value("cass_led",(state->m_shared & 0x20) ? 1 : 0);
101	101
r14976	r14977
137	137	super80_state *state = screen.machine().driver_data<super80_state>();
138	138	UINT8 y,ra,chr=32,gfx,screen_on=0;
139	139	UINT16 sy=0,ma=state->m_vidpg,x;
140		UINT8 *RAM = screen.machine().region("maincpu")->base();
	140	UINT8 *RAM = state->memregion("maincpu")->base();
141	141
142	142	output_set_value("cass_led",(state->m_shared & 0x20) ? 1 : 0);
143	143
r14976	r14977
179	179	super80_state *state = screen.machine().driver_data<super80_state>();
180	180	UINT8 y,ra,chr=32,gfx,screen_on=0;
181	181	UINT16 sy=0,ma=state->m_vidpg,x;
182		UINT8 *RAM = screen.machine().region("maincpu")->base();
	182	UINT8 *RAM = state->memregion("maincpu")->base();
183	183
184	184	output_set_value("cass_led",(state->m_shared & 0x20) ? 1 : 0);
185	185
r14976	r14977
222	222	UINT8 y,ra,chr=32,gfx,screen_on=0;
223	223	UINT16 sy=0,ma=state->m_vidpg,x;
224	224	UINT8 col, bg=0, fg=0, options=input_port_read(screen.machine(), "CONFIG");
225		UINT8 *RAM = screen.machine().region("maincpu")->base();
	225	UINT8 *RAM = state->memregion("maincpu")->base();
226	226
227	227	/* get selected character generator */
228	228	UINT8 cgen = state->m_current_charset ^ ((options & 0x10)>>4);   /* bit 0 of port F1 and cgen config switch */
r14976	r14977
284	284	{
285	285	super80_state *state = machine.driver_data<super80_state>();
286	286	state->m_vidpg = 0xfe00;
287		state->m_p_chargen = machine.region("chargen")->base();
	287	state->m_p_chargen = state->memregion("chargen")->base();
288	288	}
289	289
290	290	/**************************** I/O PORTS *****************************************************************/
r14976	r14977
381	381	VIDEO_START( super80v )
382	382	{
383	383	super80_state *state = machine.driver_data<super80_state>();
384		state->m_p_pcgram = machine.region("maincpu")->base()+0xf000;
385		state->m_p_videoram = machine.region("videoram")->base();
386		state->m_p_colorram = machine.region("colorram")->base();
	384	state->m_p_pcgram = machine.root_device().memregion("maincpu")->base()+0xf000;
	385	state->m_p_videoram = machine.root_device().memregion("videoram")->base();
	386	state->m_p_colorram = state->memregion("colorram")->base();
387	387	}
388	388
389	389	SCREEN_UPDATE_RGB32( super80v )

src/mess/video/mikromik.c

r14976	r14977
99	99	void mm1_state::video_start()
100	100	{
101	101	// find memory regions
102		m_char_rom = machine().region("chargen")->base();
	102	m_char_rom = memregion("chargen")->base();
103	103
104	104	machine().primary_screen->register_screen_bitmap(m_bitmap);
105	105	}

src/mess/video/pc4.c

r14976	r14977
33	33	else
34	34	{
35	35	//draw CGROM characters
36		bitmap.pix16(l*9 + y, i*6 + x) = BIT(machine().region("charset")->base()[m_ddram[char_pos]*8+y], 4-x);
	36	bitmap.pix16(l*9 + y, i*6 + x) = BIT(machine().root_device().memregion("charset")->base()[m_ddram[char_pos]*8+y], 4-x);
37	37
38	38	}
39	39

src/mess/video/pet.c

r14976	r14977
12	12
13	13	void pet_vh_init (running_machine &machine)
14	14	{
15		UINT8 *gfx = machine.region("gfx1")->base();
	15	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
16	16	int i;
17	17
18	18	/* inversion logic on board */
r14976	r14977
26	26
27	27	void pet80_vh_init (running_machine &machine)
28	28	{
29		UINT8 *gfx = machine.region("gfx1")->base();
	29	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
30	30	int i;
31	31
32	32	/* inversion logic on board */
r14976	r14977
45	45
46	46	void superpet_vh_init (running_machine &machine)
47	47	{
48		UINT8 *gfx = machine.region("gfx1")->base();
	48	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
49	49	int i;
50	50
51	51	for (i=0; i<0x400; i++) {

src/mess/video/osi.c

r14976	r14977
59	59	{
60	60	UINT8 videoram_data = m_video_ram[videoram_addr];
61	61	UINT16 charrom_addr = ((videoram_data << 3) | line) & 0x7ff;
62		UINT8 charrom_data = machine().region("chargen")->base()[charrom_addr];
	62	UINT8 charrom_data = memregion("chargen")->base()[charrom_addr];
63	63
64	64	for (bit = 0; bit < 8; bit++)
65	65	{
r14976	r14977
92	92	{
93	93	UINT8 videoram_data = m_video_ram[videoram_addr];
94	94	UINT16 charrom_addr = ((videoram_data << 3) | line) & 0x7ff;
95		UINT8 charrom_data = machine().region("chargen")->base()[charrom_addr];
	95	UINT8 charrom_data = memregion("chargen")->base()[charrom_addr];
96	96
97	97	for (bit = 0; bit < 8; bit++)
98	98	{
r14976	r14977
132	132	{
133	133	UINT8 videoram_data = m_video_ram[videoram_addr++];
134	134	UINT16 charrom_addr = ((videoram_data << 3) | line) & 0x7ff;
135		UINT8 charrom_data = machine().region("chargen")->base()[charrom_addr];
	135	UINT8 charrom_data = memregion("chargen")->base()[charrom_addr];
136	136
137	137	for (bit = 0; bit < 8; bit++)
138	138	{

src/mess/video/cgc7900.c

r14976	r14977
191	191	void cgc7900_state::video_start()
192	192	{
193	193	/* find memory regions */
194		m_char_rom = machine().region("gfx1")->base();
	194	m_char_rom = memregion("gfx1")->base();
195	195	}
196	196
197	197	/*-------------------------------------------------

src/mess/video/channelf.c

r14976	r14977
37	37	VIDEO_START( channelf )
38	38	{
39	39	channelf_state *state = machine.driver_data<channelf_state>();
40		state->m_p_videoram = machine.region("vram")->base();
	40	state->m_p_videoram = state->memregion("vram")->base();
41	41	}
42	42
43	43	static int recalc_palette_offset(int reg1, int reg2)

src/mess/video/vtvideo.c

r14976	r14977
413	413	vt->screen = device->machine().device<screen_device>(intf->screen_tag);
414	414	assert(vt->screen != NULL);
415	415
416		vt->gfx = device->machine().region(intf->char_rom_region_tag)->base();
	416	vt->gfx = device->machine().root_device().memregion(intf->char_rom_region_tag)->base();
417	417	assert(vt->gfx != NULL);
418	418
419	419	// LBA7 is scan line frequency update

src/mess/video/pc_t1t.c

r14976	r14977
703	703	{
704	704	if (pcjr.bank != data)
705	705	{
706		UINT8 *ram = machine.region("maincpu")->base();
	706	UINT8 *ram = machine.root_device().memregion("maincpu")->base();
707	707	int dram, vram;
708	708	pcjr.bank = data;
709	709	/* it seems the video ram is mapped to the last 128K of main memory */
r14976	r14977
746	746	dram = ((data & 0x07) << 14);
747	747	vram = ((data & 0x38) << (14-3));
748	748	}
749		memory_set_bankptr( machine, "bank14", machine.device<ram_device>(RAM_TAG)->pointer() + vram );
	749	machine.root_device().membank( "bank14" )->set_base( machine.device<ram_device>(RAM_TAG)->pointer() + vram );
750	750	pcjr.displayram = machine.device<ram_device>(RAM_TAG)->pointer() + dram;
751	751	pc_pcjr_mode_switch(machine);
752	752	}
r14976	r14977
932	932	address_space *space = machine.firstcpu->memory().space(AS_PROGRAM);
933	933	address_space *spaceio = machine.firstcpu->memory().space(AS_IO);
934	934
935		pcjr.chr_gen = machine.region("gfx1")->base();
	935	pcjr.chr_gen = machine.root_device().memregion("gfx1")->base();
936	936	pcjr.update_row = NULL;
937	937	pcjr.bank = 0;
938	938	pcjr.chr_size = 16;
r14976	r14977
962	962	int buswidth;
963	963	address_space *spaceio = machine.firstcpu->memory().space(AS_IO);
964	964
965		pcjr.chr_gen = machine.region("gfx1")->base();
	965	pcjr.chr_gen = machine.root_device().memregion("gfx1")->base();
966	966	pcjr.update_row = NULL;
967	967	pcjr.bank = 0;
968	968	pcjr.mode_control = 0x08;

src/mess/video/iq151_video32.c

r14976	r14977
60	60
61	61	void iq151_video32_device::device_start()
62	62	{
63		m_videoram = (UINT8*)subregion("videoram")->base();
64		m_chargen = (UINT8*)subregion("chargen")->base();
	63	m_videoram = (UINT8*)memregion("videoram")->base();
	64	m_chargen = (UINT8*)memregion("chargen")->base();
65	65
66	66	machine().gfx[0] = gfx_element_alloc(machine(), &iq151_video32_charlayout, m_chargen, 1, 0);
67	67	}

src/mess/video/fmtowns.c

r14976	r14977
249	249
250	250	READ8_MEMBER( towns_state::towns_video_cff80_r )
251	251	{
252		UINT8* ROM = space.machine().region("user")->base();
	252	UINT8* ROM = space.machine().root_device().memregion("user")->base();
253	253
254	254	switch(offset)
255	255	{
r14976	r14977
592	592	READ8_MEMBER(towns_state::towns_spriteram_low_r)
593	593	{
594	594	UINT8* RAM = m_messram->pointer();
595		UINT8* ROM = space.machine().region("user")->base();
	595	UINT8* ROM = space.machine().root_device().memregion("user")->base();
596	596
597	597	if(offset < 0x1000)
598	598	{  // 0xc8000-0xc8fff
r14976	r14977
1655	1655	UINT8 colour;
1656	1656	UINT8 data;
1657	1657	UINT8 temp;
1658		UINT8* font_rom = machine.region("user")->base();
	1658	UINT8* font_rom = state->memregion("user")->base();
1659	1659	int a,b;
1660	1660
1661	1661	// all characters are 16 pixels high

src/mess/video/a7800.c

r14976	r14977
321	321	{
322	322	a7800_state *state = timer.machine().driver_data<a7800_state>();
323	323	int frame_scanline;
324		UINT8 *ROM = timer.machine().region("maincpu")->base();
	324	UINT8 *ROM = timer.machine().root_device().memregion("maincpu")->base();
325	325	address_space* space = timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
326	326
327	327	state->m_maria_scanline++;
r14976	r14977
442	442
443	443	READ8_MEMBER(a7800_state::a7800_MARIA_r)
444	444	{
445		UINT8 *ROM = machine().region("maincpu")->base();
	445	UINT8 *ROM = memregion("maincpu")->base();
446	446	switch (offset)
447	447	{
448	448	case 0x08:
r14976	r14977
456	456
457	457	WRITE8_MEMBER(a7800_state::a7800_MARIA_w)
458	458	{
459		UINT8 *ROM = machine().region("maincpu")->base();
	459	UINT8 *ROM = memregion("maincpu")->base();
460	460	switch (offset)
461	461	{
462	462	case 0x00:

src/mess/video/newbrain.c

r14976	r14977
4	4	void newbrain_state::video_start()
5	5	{
6	6	/* find memory regions */
7		m_char_rom = machine().region("chargen")->base();
	7	m_char_rom = memregion("chargen")->base();
8	8
9	9	/* register for state saving */
10	10	save_item(NAME(m_tvcnsl));

src/mess/video/pc_aga.c

r14976	r14977
722	722
723	723	memset( &aga, 0, sizeof( aga ) );
724	724	aga.mode = AGA_COLOR;
725		aga.mda_chr_gen = machine.region("gfx1")->base() + 0x1000;
726		aga.cga_chr_gen = machine.region("gfx1")->base();
	725	aga.mda_chr_gen = machine.root_device().memregion("gfx1")->base() + 0x1000;
	726	aga.cga_chr_gen = machine.root_device().memregion("gfx1")->base();
727	727	aga.videoram = auto_alloc_array(machine, UINT8, 0x10000);
728	728	}
729	729
r14976	r14977
756	756	memset( &aga, 0, sizeof( aga ) );
757	757
758	758	aga.mode = AGA_COLOR;
759		aga.mda_chr_gen = machine.region("gfx1")->base();
760		aga.cga_chr_gen = machine.region("gfx1")->base() + 0x1000;
	759	aga.mda_chr_gen = machine.root_device().memregion("gfx1")->base();
	760	aga.cga_chr_gen = machine.root_device().memregion("gfx1")->base() + 0x1000;
761	761	aga.videoram = auto_alloc_array(machine, UINT8, 0x10000);
762	762	}
763	763

src/mess/video/intv.c

r14976	r14977
173	173	INT32 xInc;
174	174	INT32 i, j, k;
175	175
176		UINT8* memory = machine.region("maincpu")->base();
	176	UINT8* memory = state->memregion("maincpu")->base();
177	177
178	178	for (i = 0; i < STIC_MOBS; i++)
179	179	{
r14976	r14977
240	240	INT16 w, h, nextx, nexty;
241	241	UINT8 csPtr = 0;
242	242	UINT16 nextCard;
243		UINT8 *ram = machine.region("maincpu")->base();
	243	UINT8 *ram = state->memregion("maincpu")->base();
244	244
245	245	for (h = 0, nexty = (STIC_OVERSCAN_TOP_HEIGHT + state->m_row_delay) * STIC_Y_SCALE;
246	246	h < STIC_BACKTAB_HEIGHT;
r14976	r14977
311	311	UINT8 j, isGrom, fgcolor, bgcolor;
312	312	UINT16 nextCard, memoryLocation;
313	313	UINT8* memory;
314		UINT8* ram = machine.region("maincpu")->base();
	314	UINT8* ram = state->memregion("maincpu")->base();
315	315
316	316	for (h = 0, nexty = (STIC_OVERSCAN_TOP_HEIGHT + state->m_row_delay) * STIC_Y_SCALE;
317	317	h < STIC_BACKTAB_HEIGHT;

src/mess/video/ef9345.h

r14976	r14977
89	89	static const device_timer_id BUSY_TIMER = 0;
90	90	static const device_timer_id BLINKING_TIMER = 1;
91	91
92		const memory_region *m_charset;
	92	memory_region *m_charset;
93	93	address_space *m_videoram;
94	94
95	95	screen_device *m_screen;            //screen we are acting on

src/mess/video/mikro80.c

r14976	r14977
18	18	SCREEN_UPDATE_IND16( mikro80 )
19	19	{
20	20	mikro80_state *state = screen.machine().driver_data<mikro80_state>();
21		UINT8 *gfx = screen.machine().region("gfx1")->base();
	21	UINT8 *gfx = state->memregion("gfx1")->base();
22	22	int x,y,b;
23	23
24	24	for(y = 0; y < 32*8; y++ )

src/mess/video/mz80.c

r14976	r14977
34	34	VIDEO_START( mz80k )
35	35	{
36	36	mz80_state *state = machine.driver_data<mz80_state>();
37		state->m_p_chargen = machine.region("chargen")->base();
	37	state->m_p_chargen = state->memregion("chargen")->base();
38	38	}
39	39
40	40	SCREEN_UPDATE_IND16( mz80k )

src/mess/video/poly88.c

r14976	r14977
24	24	VIDEO_START( poly88 )
25	25	{
26	26	poly88_state *state = machine.driver_data<poly88_state>();
27		state->m_FNT = machine.region("chargen")->base();
	27	state->m_FNT = state->memregion("chargen")->base();
28	28	}
29	29
30	30	SCREEN_UPDATE_IND16( poly88 )

src/mess/video/avigo.c

r14976	r14977
69	69	m_screen_column = 0;
70	70
71	71	/* allocate video memory */
72		m_video_memory = machine().region_alloc( "videoram", (AVIGO_SCREEN_WIDTH>>3) * AVIGO_SCREEN_HEIGHT + 1, 1, ENDIANNESS_LITTLE )->base();
	72	m_video_memory = machine().memory().region_alloc( "videoram", (AVIGO_SCREEN_WIDTH>>3) * AVIGO_SCREEN_HEIGHT + 1, 1, ENDIANNESS_LITTLE )->base();
73	73	memset(m_video_memory, 0, (AVIGO_SCREEN_WIDTH>>3) * AVIGO_SCREEN_HEIGHT + 1);
74	74
75	75	save_pointer(NAME(m_video_memory), (AVIGO_SCREEN_WIDTH>>3) * AVIGO_SCREEN_HEIGHT + 1);

src/mess/video/llc.c

r14976	r14977
20	20	llc_state *state = screen.machine().driver_data<llc_state>();
21	21	UINT8 code,disp;
22	22	int y, x, b,c,inv;
23		UINT8 *gfx = screen.machine().region("gfx1")->base();
	23	UINT8 *gfx = state->memregion("gfx1")->base();
24	24
25	25	for (x = 0; x < 64; x++)
26	26	{
r14976	r14977
52	52	llc_state *state = screen.machine().driver_data<llc_state>();
53	53	UINT8 code,disp;
54	54	int y, x, b,c;
55		UINT8 *gfx = screen.machine().region("gfx1")->base();
	55	UINT8 *gfx = state->memregion("gfx1")->base();
56	56
57	57	for (x = 0; x < 64; x++)
58	58	{

src/mess/video/abc802.c

r14976	r14977
210	210	void abc802_state::video_start()
211	211	{
212	212	// find memory regions
213		m_char_rom = machine().region(MC6845_TAG)->base();
	213	m_char_rom = memregion(MC6845_TAG)->base();
214	214
215	215	// register for state saving
216	216	save_item(NAME(m_flshclk_ctr));

src/mess/video/trs80.c

r14976	r14977
45	45	VIDEO_START( trs80 )
46	46	{
47	47	trs80_state *state = machine.driver_data<trs80_state>();
48		state->m_p_chargen = machine.region("chargen")->base();
	48	state->m_p_chargen = state->memregion("chargen")->base();
49	49	state->m_size_store = 0xff;
50	50	state->m_mode &= 2;
51	51	}

src/mess/video/apple2.c

r14976	r14977
142	142	int row, col;
143	143	UINT32 start_address = (page ? 0x0800 : 0x0400);
144	144	UINT32 address;
145		const UINT8 *textgfx_data = machine.region("gfx1")->base();
146		UINT32 textgfx_datalen = machine.region("gfx1")->bytes();
	145	const UINT8 *textgfx_data = machine.root_device().memregion("gfx1")->base();
	146	UINT32 textgfx_datalen = state->memregion("gfx1")->bytes();
147	147	UINT32 my_a2 = effective_a2(state);
148	148
149	149	/* perform adjustments */
r14976	r14977
346	346	state->m_fgcolor = 15;
347	347	state->m_bgcolor = 0;
348	348	state->m_flash = 0;
349		apple2_font = machine.region("gfx1")->base();
350		state->m_alt_charset_value = machine.region("gfx1")->bytes() / 16;
	349	apple2_font = machine.root_device().memregion("gfx1")->base();
	350	state->m_alt_charset_value = machine.root_device().memregion("gfx1")->bytes() / 16;
351	351	state->m_a2_videoram = vram;
352	352
353	353	/* 2^3 dependent pixels * 2 color sets * 2 offsets */
r14976	r14977
382	382
383	383	/* Fix for Ivel Ultra */
384	384	if (!strcmp(machine.system().name, "ivelultr")) {
385		int len = machine.region("gfx1")->bytes();
	385	int len = machine.root_device().memregion("gfx1")->bytes();
386	386	for (i = 0; i < len; i++)
387	387	{
388	388	apple2_font[i] = BITSWAP8(apple2_font[i],  7, 7, 6, 5, 4, 3, 2, 1);
r14976	r14977
397	397	|| !strcmp(machine.system().name, "ace100")
398	398	|| !strcmp(machine.system().name, "apple2jp"))
399	399	{
400		int len = machine.region("gfx1")->bytes();
	400	int len = machine.root_device().memregion("gfx1")->bytes();
401	401	for (i = 0; i < len; i++)
402	402	{
403	403	apple2_font[i] = BITSWAP8(apple2_font[i], 7, 0, 1, 2, 3, 4, 5, 6);

src/mess/video/abc806.c

r14976	r14977
475	475	m_40 = 1;
476	476
477	477	// find memory regions
478		m_char_rom = machine().region(MC6845_TAG)->base();
479		m_rad_prom = machine().region("rad")->base();
480		m_hru2_prom = machine().region("hru2")->base();
	478	m_char_rom = memregion(MC6845_TAG)->base();
	479	m_rad_prom = memregion("rad")->base();
	480	m_hru2_prom = memregion("hru2")->base();
481	481
482	482	// allocate memory
483	483	m_char_ram.allocate(ABC806_CHAR_RAM_SIZE);

src/mess/video/abc1600.c

r14976	r14977
1055	1055	m_video_ram = auto_alloc_array(machine(), UINT16, VIDEORAM_SIZE);
1056	1056
1057	1057	// find memory regions
1058		m_wrmsk_rom = machine().region("wrmsk")->base();
1059		m_shinf_rom = machine().region("shinf")->base();
1060		m_drmsk_rom = machine().region("drmsk")->base();
	1058	m_wrmsk_rom = memregion("wrmsk")->base();
	1059	m_shinf_rom = memregion("shinf")->base();
	1060	m_drmsk_rom = memregion("drmsk")->base();
1061	1061
1062	1062	// state saving
1063	1063	save_pointer(NAME(m_video_ram), VIDEORAM_SIZE);

src/mess/video/733_asr.c

r14976	r14977
157	157	0x00,0x68,0xb0,0x00,0x00,0x00,0x00,0x00,0x20,0x50,0x20,0x50,0xa8,0x50,0x00,0x00
158	158	};
159	159
160		dst = machine.region(asr733_chr_region)->base();
	160	dst = machine.root_device().memregion(asr733_chr_region)->base();
161	161
162	162	memcpy(dst, fontdata6x8, asrfontdata_size);
163	163	}

src/mess/video/gime.c

r14976	r14977
158	158	m_res_in_floating_bus_func.resolve(config->m_in_floating_bus_func, *this);
159	159
160	160	/* set up ROM/RAM pointers */
161		m_rom = machine().region(config->m_maincpu_tag)->base();
	161	m_rom = memregion(config->m_maincpu_tag)->base();
162	162	m_cart_rom = m_cart_device->get_cart_base();
163	163
164	164	/* populate palettes */
r14976	r14977
602	602	memory += offset;
603	603
604	604	/* set the banks */
605		memory_set_bankptr(machine(), rbank, memory);
606		memory_set_bankptr(machine(), wbank, is_read_only ? m_dummy_bank : memory);
	605	membank(rbank)->set_base(memory);
	606	membank(wbank)->set_base(is_read_only ? m_dummy_bank : memory);
607	607	}
608	608
609	609

src/mess/video/pk8020.c

r14976	r14977
19	19	{
20	20	pk8020_state *state = screen.machine().driver_data<pk8020_state>();
21	21	int y, x, b, j;
22		UINT8 *gfx = screen.machine().region("gfx1")->base();
	22	UINT8 *gfx = state->memregion("gfx1")->base();
23	23	UINT8 *ram = screen.machine().device<ram_device>(RAM_TAG)->pointer();
24	24
25	25	for (y = 0; y < 16; y++)

src/mess/video/galaxy.c

r14976	r14977
20	20	int y, x;
21	21	if (state->m_interrupts_enabled == TRUE)
22	22	{
23		UINT8 *gfx = machine.region("gfx1")->base();
	23	UINT8 *gfx = state->memregion("gfx1")->base();
24	24	UINT8 dat = (state->m_latch_value & 0x3c) >> 2;
25	25	if ((state->m_gal_cnt >= 48 * 2) && (state->m_gal_cnt < 48 * 210))  // display on screen just state->m_first 208 lines
26	26	{

src/mess/video/bbc.c

r14976	r14977
340	340	bbc_state *state = machine.driver_data<bbc_state>();
341	341	if (vdusel)
342	342	{
343		state->m_BBC_Video_RAM= machine.region("maincpu")->base()+0x8000;
	343	state->m_BBC_Video_RAM= state->memregion("maincpu")->base()+0x8000;
344	344	} else {
345		state->m_BBC_Video_RAM= machine.region("maincpu")->base();
	345	state->m_BBC_Video_RAM= machine.root_device().memregion("maincpu")->base();
346	346	}
347	347	}
348	348
r14976	r14977
362	362	set_pixel_lookup(state);
363	363	state->m_saa505x = machine.device("saa505x");
364	364
365		state->m_BBC_Video_RAM = machine.region("maincpu")->base();
	365	state->m_BBC_Video_RAM = state->memregion("maincpu")->base();
366	366	state->m_memorySize=memorySize;
367	367
368	368	}

src/mess/video/k1ge.c

r14976	r14977
831	831	k1ge->timer = device->machine().scheduler().timer_alloc(FUNC(k1ge_timer_callback), (void *) device );
832	832	k1ge->hblank_on_timer = device->machine().scheduler().timer_alloc(FUNC(k1ge_hblank_on_timer_callback), (void *) device );
833	833	k1ge->screen = device->machine().device<screen_device>(k1ge->intf->screen_tag);
834		k1ge->vram = device->machine().region( k1ge->intf->vram_tag )->base();
	834	k1ge->vram = device->machine().root_device().memregion( k1ge->intf->vram_tag )->base();
835	835	k1ge->bitmap = auto_bitmap_ind16_alloc( device->machine(), k1ge->screen->width(), k1ge->screen->height() );
836	836	k1ge->draw = k1ge_draw;
837	837	}

src/mess/video/fm7.c

r14976	r14977
1085	1085
1086	1086	WRITE8_MEMBER(fm7_state::fm77av_video_flags_w)
1087	1087	{
1088		UINT8* RAM = machine().region("subsyscg")->base();
	1088	UINT8* RAM = memregion("subsyscg")->base();
1089	1089
1090	1090	m_video.cgrom = data & 0x03;
1091		memory_set_bankptr(machine(),"bank20",RAM+(m_video.cgrom*0x800));
	1091	membank("bank20")->set_base(RAM+(m_video.cgrom*0x800));
1092	1092	m_video.fine_offset = data & 0x04;
1093	1093	m_video.active_video_page = data & 0x20;
1094	1094	m_video.display_video_page = data & 0x40;
r14976	r14977
1142	1142	*/
1143	1143	WRITE8_MEMBER(fm7_state::fm77av_sub_bank_w)
1144	1144	{
1145		//  UINT8* RAM = machine().region("sub")->base();
	1145	//  UINT8* RAM = memregion("sub")->base();
1146	1146	UINT8* ROM;
1147	1147
1148	1148	if((data & 0x03) == (m_sb_prev & 0x03))
r14976	r14977
1152	1152	switch (data & 0x03)
1153	1153	{
1154	1154	case 0x00:  // Type C, 640x200 (as used on the FM-7)
1155		ROM = machine().region("subsys_c")->base();
1156		//  memory_set_bankptr(machine(),20,ROM);
1157		memory_set_bankptr(machine(),"bank21",ROM+0x800);
	1155	ROM = memregion("subsys_c")->base();
	1156	//  membank(20)->set_base(ROM);
	1157	membank("bank21")->set_base(ROM+0x800);
1158	1158	logerror("VID: Sub ROM Type C selected\n");
1159	1159	break;
1160	1160	case 0x01:  // Type A, 640x200
1161		ROM = machine().region("subsys_a")->base();
1162		//  memory_set_bankptr(machine(),20,RAM+0xd800);
1163		memory_set_bankptr(machine(),"bank21",ROM);
	1161	ROM = memregion("subsys_a")->base();
	1162	//  membank(20)->set_base(RAM+0xd800);
	1163	membank("bank21")->set_base(ROM);
1164	1164	logerror("VID: Sub ROM Type A selected\n");
1165	1165	break;
1166	1166	case 0x02:  // Type B, 320x200
1167		ROM = machine().region("subsys_b")->base();
1168		//  memory_set_bankptr(machine(),20,RAM+0xd800);
1169		memory_set_bankptr(machine(),"bank21",ROM);
	1167	ROM = memregion("subsys_b")->base();
	1168	//  membank(20)->set_base(RAM+0xd800);
	1169	membank("bank21")->set_base(ROM);
1170	1170	logerror("VID: Sub ROM Type B selected\n");
1171	1171	break;
1172	1172	case 0x03:  // CG Font?
1173		ROM = machine().region("subsyscg")->base();
1174		//  memory_set_bankptr(machine(),20,RAM+0xd800);
1175		memory_set_bankptr(machine(),"bank21",ROM);
	1173	ROM = memregion("subsyscg")->base();
	1174	//  membank(20)->set_base(RAM+0xd800);
	1175	membank("bank21")->set_base(ROM);
1176	1176	logerror("VID: Sub ROM CG selected\n");
1177	1177	break;
1178	1178	}
r14976	r14977
1368	1368	// called when banked into main CPU space by the MMR, available only if sub CPU is halted
1369	1369	READ8_MEMBER(fm7_state::fm7_sub_ram_ports_banked_r)
1370	1370	{
1371		UINT8* RAM = machine().region("maincpu")->base();
	1371	UINT8* RAM = memregion("maincpu")->base();
1372	1372	UINT8* ROM;
1373	1373
1374	1374	if(!m_video.sub_halt)
r14976	r14977
1382	1382	return RAM[0x1d000+offset];
1383	1383	if(offset > 0x800) // CGROM
1384	1384	{
1385		ROM = machine().region("subsyscg")->base();
	1385	ROM = memregion("subsyscg")->base();
1386	1386	return ROM[(m_video.cgrom*0x800)+(offset-0x800)];
1387	1387	}
1388	1388
r14976	r14977
1420	1420
1421	1421	WRITE8_MEMBER(fm7_state::fm7_sub_ram_ports_banked_w)
1422	1422	{
1423		UINT8* RAM = machine().region("maincpu")->base();
	1423	UINT8* RAM = memregion("maincpu")->base();
1424	1424
1425	1425	if(!m_video.sub_halt)
1426	1426	return;
r14976	r14977
1476	1476
1477	1477	READ8_MEMBER(fm7_state::fm7_console_ram_banked_r)
1478	1478	{
1479		UINT8* RAM = machine().region("maincpu")->base();
	1479	UINT8* RAM = memregion("maincpu")->base();
1480	1480
1481	1481	if(!m_video.sub_halt)
1482	1482	return 0xff;
r14976	r14977
1486	1486
1487	1487	WRITE8_MEMBER(fm7_state::fm7_console_ram_banked_w)
1488	1488	{
1489		UINT8* RAM = machine().region("maincpu")->base();
	1489	UINT8* RAM = memregion("maincpu")->base();
1490	1490
1491	1491	if(!m_video.sub_halt)
1492	1492	return;

src/mess/formats/ace_ace.c

r14976	r14977
26	26	SNAPSHOT_LOAD( ace )
27	27	{
28	28	cpu_device *cpu = image.device().machine().firstcpu;
29		UINT8 *RAM = image.device().machine().region(cpu->tag())->base();
	29	UINT8 *RAM = image.device().machine().root_device().memregion(cpu->tag())->base();
30	30	address_space *space = cpu->memory().space(AS_PROGRAM);
31	31	unsigned char ace_repeat, ace_byte, loop;
32	32	int done=0, ace_index=0x2000;

src/mess/formats/m65_snqk.c

r14976	r14977
218	218	static void microtan_snapshot_copy(running_machine &machine, UINT8 *snapshot_buff, int snapshot_size)
219	219	{
220	220	microtan_state *state = machine.driver_data<microtan_state>();
221		UINT8 *RAM = machine.region("maincpu")->base();
	221	UINT8 *RAM = state->memregion("maincpu")->base();
222	222	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
223	223	via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
224	224	via6522_device *via_1 = machine.device<via6522_device>("via6522_1");

src/mess/formats/studio2_st2.c

r14976	r14977
73	73	for (int block = 0; block < (header.blocks - 1); block++)
74	74	{
75	75	UINT16 offset = header.page[block] << 8;
76		UINT8 *ptr = ((UINT8 *) image.device().machine().region(CDP1802_TAG)->base()) + offset;
	76	UINT8 *ptr = ((UINT8 *) image.device().machine().root_device().memregion(CDP1802_TAG)->base()) + offset;
77	77
78	78	if (LOG) logerror("ST2 Reading block %u to %04x\n", block, offset);
79	79

src/mess/drivers/vip.c

r14976	r14977
659	659	}
660	660
661	661	/* enable ROM all through address space */
662		program->install_rom(0x0000, 0x01ff, 0, 0xfe00, machine().region(CDP1802_TAG)->base());
	662	program->install_rom(0x0000, 0x01ff, 0, 0xfe00, memregion(CDP1802_TAG)->base());
663	663	}
664	664
665	665	/* Machine Drivers */
r14976	r14977
740	740
741	741	static QUICKLOAD_LOAD( vip )
742	742	{
743		UINT8 *ptr = image.device().machine().region(CDP1802_TAG)->base();
	743	UINT8 *ptr = image.device().machine().root_device().memregion(CDP1802_TAG)->base();
744	744	UINT8 *chip8_ptr = NULL;
745	745	int chip8_size = 0;
746	746	int size = image.length();
r14976	r14977
748	748	if (strcmp(image.filetype(), "c8") == 0)
749	749	{
750	750	/* CHIP-8 program */
751		chip8_ptr = image.device().machine().region("chip8")->base();
752		chip8_size = image.device().machine().region("chip8")->bytes();
	751	chip8_ptr = image.device().machine().root_device().memregion("chip8")->base();
	752	chip8_size = image.device().machine().root_device().memregion("chip8")->bytes();
753	753	}
754	754	else if (strcmp(image.filename(), "c8x") == 0)
755	755	{
756	756	/* CHIP-8X program */
757		chip8_ptr = image.device().machine().region("chip8x")->base();
758		chip8_size = image.device().machine().region("chip8x")->bytes();
	757	chip8_ptr = image.device().machine().root_device().memregion("chip8x")->base();
	758	chip8_size = image.device().machine().root_device().memregion("chip8x")->bytes();
759	759	}
760	760
761	761	if ((size + chip8_size) > image.device().machine().device<ram_device>(RAM_TAG)->size())

src/mess/drivers/comquest.c

r14976	r14977
205	205
206	206	static MACHINE_RESET( comquest )
207	207	{
208		//  UINT8 *mem=machine.region("user1")->base();
209		//  memory_set_bankptr(machine, 1,mem+0x00000);
	208	//  UINT8 *mem=machine.root_device().memregion("user1")->base();
	209	//  state->membank(1)->set_base(mem+0x00000);
210	210	}
211	211
212	212	static const UINT32 amask= 0xffff;

src/mess/drivers/plan80.c

r14976	r14977
144	144	/* after the first 4 bytes have been read from ROM, switch the ram back in */
145	145	static TIMER_CALLBACK( plan80_boot )
146	146	{
147		memory_set_bank(machine, "boot", 0);
	147	plan80_state *state = machine.driver_data<plan80_state>();
	148	state->membank("boot")->set_entry(0);
148	149	}
149	150
150	151	MACHINE_RESET_MEMBER( plan80_state )
151	152	{
152		memory_set_bank(machine(), "boot", 1);
	153	membank("boot")->set_entry(1);
153	154	machine().scheduler().timer_set(attotime::from_usec(10), FUNC(plan80_boot));
154	155	}
155	156
156	157	DRIVER_INIT( plan80 )
157	158	{
158		UINT8 *RAM = machine.region("maincpu")->base();
159		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xf800);
	159	plan80_state *state = machine.driver_data<plan80_state>();
	160	UINT8 *RAM = state->memregion("maincpu")->base();
	161	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xf800);
160	162	}
161	163
162	164	VIDEO_START_MEMBER( plan80_state )
163	165	{
164		m_p_chargen = machine().region("chargen")->base();
	166	m_p_chargen = memregion("chargen")->base();
165	167	}
166	168
167	169	SCREEN_UPDATE16_MEMBER( plan80_state )

src/mess/drivers/pb1000.c

r14976	r14977
303	303	m_gatearray[offset] = data&0xff;
304	304
305	305	if (m_gatearray[0])
306		memory_set_bankptr(machine(), "bank1", machine().region("card1")->base());
	306	membank("bank1")->set_base(machine().root_device().memregion("card1")->base());
307	307	else if (m_gatearray[1])
308		memory_set_bankptr(machine(), "bank1", machine().region("card2")->base());
	308	membank("bank1")->set_base(machine().root_device().memregion("card2")->base());
309	309	else
310		memory_set_bankptr(machine(), "bank1", machine().region("rom")->base());
	310	membank("bank1")->set_base(machine().root_device().memregion("rom")->base());
311	311	}
312	312
313	313	static void lcd_control(hd61700_cpu_device &device, UINT8 data)
r14976	r14977
489	489
490	490	void pb1000_state::machine_start()
491	491	{
492		memory_set_bankptr(machine(), "bank1", machine().region("rom")->base());
	492	membank("bank1")->set_base(machine().root_device().memregion("rom")->base());
493	493
494	494	m_kb_timer = machine().scheduler().timer_alloc(FUNC(keyboard_timer));
495	495	m_kb_timer->adjust(attotime::from_hz(192), 0, attotime::from_hz(192));

src/mess/drivers/pdp1.c

r14976	r14977
655	655	};
656	656
657	657	/* set up our font */
658		dst = machine.region("gfx1")->base();
	658	dst = machine.root_device().memregion("gfx1")->base();
659	659	memcpy(dst, fontdata6x8, pdp1_fontdata_size);
660	660
661	661	machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(pdp1_machine_stop),&machine));

src/mess/drivers/elf.c

r14976	r14977
245	245	/* setup memory banking */
246	246	program->install_read_bank(0x0000, 0x00ff, "bank1");
247	247	program->install_write_handler(0x0000, 0x00ff, write8_delegate(FUNC(elf2_state::memory_w), this));
248		memory_configure_bank(machine(), "bank1", 0, 1, m_ram->pointer(), 0);
249		memory_set_bank(machine(), "bank1", 0);
	248	membank("bank1")->configure_entry(0, m_ram->pointer());
	249	membank("bank1")->set_entry(0);
250	250
251	251	/* register for state saving */
252	252	save_item(NAME(m_data));

src/mess/drivers/dectalk.c

r14976	r14977
268	268	static void dectalk_x2212_store( running_machine &machine )
269	269	{
270	270	dectalk_state *state = machine.driver_data<dectalk_state>();
271		UINT8 *nvram = machine.region("nvram")->base();
	271	UINT8 *nvram = state->memregion("nvram")->base();
272	272	int i;
273	273	for (i = 0; i < 256; i++)
274	274	nvram[i] = state->m_x2214_sram[i];
r14976	r14977
280	280	static void dectalk_x2212_recall( running_machine &machine )
281	281	{
282	282	dectalk_state *state = machine.driver_data<dectalk_state>();
283		UINT8 *nvram = machine.region("nvram")->base();
	283	UINT8 *nvram = state->memregion("nvram")->base();
284	284	int i;
285	285	for (i = 0; i < 256; i++)
286	286	state->m_x2214_sram[i] = nvram[i];

src/mess/drivers/homelab.c

r14976	r14977
177	177
178	178	VIDEO_START_MEMBER( homelab_state )
179	179	{
180		m_p_chargen = machine().region("chargen")->base();
	180	m_p_chargen = memregion("chargen")->base();
181	181	}
182	182
183	183	static SCREEN_UPDATE_IND16( homelab )

src/mess/drivers/vt520.c

r14976	r14977
50	50
51	51	static MACHINE_RESET(vt520)
52	52	{
53		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
54		UINT8 *rom = machine.region("maincpu")->base();
	53	vt520_state *state = machine.driver_data<vt520_state>();
	54	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	55	UINT8 *rom = state->memregion("maincpu")->base();
55	56	space->unmap_write(0x0000, 0xffff);
56		memory_set_bankptr(machine, "bank1", rom + 0x70000);
	57	state->membank("bank1")->set_base(rom + 0x70000);
57	58	}
58	59
59	60	static VIDEO_START( vt520 )

src/mess/drivers/pc8401a.c

r14976	r14977
86	86	/* internal ROM */
87	87	program->install_read_bank(0x0000, 0x7fff, "bank1");
88	88	program->unmap_write(0x0000, 0x7fff);
89		memory_set_bank(machine(), "bank1", rombank);
	89	membank("bank1")->set_entry(rombank);
90	90	}
91	91	else
92	92	{
r14976	r14977
98	98
99	99	case 1: /* RAM 0000H to 7FFFH */
100	100	program->install_readwrite_bank(0x0000, 0x7fff, "bank1");
101		memory_set_bank(machine(), "bank1", 4);
	101	membank("bank1")->set_entry(4);
102	102	//logerror("0x0000-0x7fff = RAM 0-7fff\n");
103	103	break;
104	104
105	105	case 2:   /* RAM 8000H to FFFFH */
106	106	program->install_readwrite_bank(0x0000, 0x7fff, "bank1");
107		memory_set_bank(machine(), "bank1", 5);
	107	membank("bank1")->set_entry(5);
108	108	//logerror("0x0000-0x7fff = RAM 8000-ffff\n");
109	109	break;
110	110
r14976	r14977
117	117	{
118	118	case 0: /* cell addresses 0000H to 3FFFH */
119	119	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
120		memory_set_bank(machine(), "bank3", 0);
	120	membank("bank3")->set_entry(0);
121	121	//logerror("0x8000-0xbfff = RAM 0-3fff\n");
122	122	break;
123	123
124	124	case 1: /* cell addresses 4000H to 7FFFH */
125	125	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
126		memory_set_bank(machine(), "bank3", 1);
	126	membank("bank3")->set_entry(1);
127	127	//logerror("0x8000-0xbfff = RAM 4000-7fff\n");
128	128	break;
129	129
130	130	case 2: /* cell addresses 8000H to BFFFH */
131	131	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
132		memory_set_bank(machine(), "bank3", 2);
	132	membank("bank3")->set_entry(2);
133	133	//logerror("0x8000-0xbfff = RAM 8000-bfff\n");
134	134	break;
135	135
r14976	r14977
137	137	if (m_ram->size() > 64)
138	138	{
139	139	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
140		memory_set_bank(machine(), "bank3", 3); // TODO or 4
	140	membank("bank3")->set_entry(3); // TODO or 4
141	141	}
142	142	else
143	143	{
r14976	r14977
152	152	/* CRT video RAM */
153	153	program->install_readwrite_bank(0xc000, 0xdfff, "bank4");
154	154	program->unmap_readwrite(0xe000, 0xe7ff);
155		memory_set_bank(machine(), "bank4", 1);
	155	membank("bank4")->set_entry(1);
156	156	//logerror("0xc000-0xdfff = video RAM\n");
157	157	}
158	158	else
159	159	{
160	160	/* RAM */
161	161	program->install_readwrite_bank(0xc000, 0xe7ff, "bank4");
162		memory_set_bank(machine(), "bank4", 0);
	162	membank("bank4")->set_entry(0);
163	163	//logerror("0xc000-0e7fff = RAM c000-e7fff\n");
164	164	}
165	165	}
r14976	r14977
261	261
262	262	READ8_MEMBER( pc8401a_state::io_rom_data_r )
263	263	{
264		UINT8 *iorom = machine().region("iorom")->base();
	264	UINT8 *iorom = memregion("iorom")->base();
265	265
266	266	//logerror("I/O ROM read from %05x\n", m_io_addr);
267	267
r14976	r14977
496	496	UINT8 *ram = m_ram->pointer();
497	497
498	498	/* set up A0/A1 memory banking */
499		memory_configure_bank(machine(), "bank1", 0, 4, machine().region(Z80_TAG)->base(), 0x8000);
500		memory_configure_bank(machine(), "bank1", 4, 2, ram, 0x8000);
501		memory_set_bank(machine(), "bank1", 0);
	499	membank("bank1")->configure_entries(0, 4, memregion(Z80_TAG)->base(), 0x8000);
	500	membank("bank1")->configure_entries(4, 2, ram, 0x8000);
	501	membank("bank1")->set_entry(0);
502	502
503	503	/* set up A2 memory banking */
504		memory_configure_bank(machine(), "bank3", 0, 5, ram, 0x4000);
505		memory_set_bank(machine(), "bank3", 0);
	504	membank("bank3")->configure_entries(0, 5, ram, 0x4000);
	505	membank("bank3")->set_entry(0);
506	506
507	507	/* set up A3 memory banking */
508		memory_configure_bank(machine(), "bank4", 0, 1, ram + 0xc000, 0);
509		memory_configure_bank(machine(), "bank4", 1, 1, m_crt_ram, 0);
510		memory_set_bank(machine(), "bank4", 0);
	508	membank("bank4")->configure_entry(0, ram + 0xc000);
	509	membank("bank4")->configure_entry(1, m_crt_ram);
	510	membank("bank4")->set_entry(0);
511	511
512	512	/* set up A4 memory banking */
513		memory_configure_bank(machine(), "bank5", 0, 1, ram + 0xe800, 0);
514		memory_set_bank(machine(), "bank5", 0);
	513	membank("bank5")->configure_entry(0, ram + 0xe800);
	514	membank("bank5")->set_entry(0);
515	515
516	516	/* bank switch */
517	517	bankswitch(0);

src/mess/drivers/pc100.c

r14976	r14977
332	332	pc100_state *state = machine.driver_data<pc100_state>();
333	333
334	334	device_set_irq_callback(machine.device("maincpu"), pc100_irq_callback);
335		state->m_kanji_rom = (UINT16 *)(*machine.region("kanji"));
336		state->m_vram = (UINT16 *)(*machine.region("vram"));
	335	state->m_kanji_rom = (UINT16 *)(*machine.root_device().memregion("kanji"));
	336	state->m_vram = (UINT16 *)(*state->memregion("vram"));
337	337	}
338	338
339	339	static MACHINE_RESET(pc100)

src/mess/drivers/atari400.c

r14976	r14977
746	746
747	747	static void a800xl_mmu(running_machine &machine, UINT8 new_mmu)
748	748	{
749		UINT8 *base = machine.region("maincpu")->base();
	749	UINT8 *base = machine.root_device().memregion("maincpu")->base();
750	750	UINT8 *base1, *base2, *base3, *base4;
751	751
752	752	/* check if memory C000-FFFF changed */
r14976	r14977
768	768	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xc000, 0xcfff, "bank3");
769	769	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xd800, 0xffff, "bank4");
770	770	}
771		memory_set_bankptr(machine, "bank3", base3);
772		memory_set_bankptr(machine, "bank4", base4);
	771	machine.root_device().membank("bank3")->set_base(base3);
	772	machine.root_device().membank("bank4")->set_base(base4);
773	773
774	774	/* check if BASIC changed */
775	775	if( new_mmu & 0x02 )
r14976	r14977
786	786	base1 = base + 0x10000;  /* 8K BASIC */
787	787	}
788	788
789		memory_set_bankptr(machine, "bank1", base1);
	789	machine.root_device().membank("bank1")->set_base(base1);
790	790
791	791	/* check if self-test ROM changed */
792	792	if( new_mmu & 0x80 )
r14976	r14977
802	802	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0x5000, 0x57ff);
803	803	base2 = base + 0x15000;  /* 0x0800 bytes */
804	804	}
805		memory_set_bankptr(machine, "bank2", base2);
	805	machine.root_device().membank("bank2")->set_base(base2);
806	806	}
807	807
808	808	/* BASIC was available in a separate cart, so we don't test it */
809	809	static void a1200xl_mmu(running_machine &machine, UINT8 new_mmu)
810	810	{
811		UINT8 *base = machine.region("maincpu")->base();
	811	UINT8 *base = machine.root_device().memregion("maincpu")->base();
812	812	UINT8 *base2, *base3, *base4;
813	813
814	814	/* check if memory C000-FFFF changed */
r14976	r14977
830	830	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xc000, 0xcfff, "bank3");
831	831	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xd800, 0xffff, "bank4");
832	832	}
833		memory_set_bankptr(machine, "bank3", base3);
834		memory_set_bankptr(machine, "bank4", base4);
	833	machine.root_device().membank("bank3")->set_base(base3);
	834	machine.root_device().membank("bank4")->set_base(base4);
835	835
836	836	/* check if self-test ROM changed */
837	837	if( new_mmu & 0x80 )
r14976	r14977
847	847	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x5000, 0x57ff, "bank2");
848	848	machine.device("maincpu")->memory().space(AS_PROGRAM)->unmap_write(0x5000, 0x57ff);
849	849	}
850		memory_set_bankptr(machine, "bank2", base2);
	850	machine.root_device().membank("bank2")->set_base(base2);
851	851	}
852	852
853	853	static void xegs_mmu(running_machine &machine, UINT8 new_mmu)
854	854	{
855		UINT8 *base = machine.region("maincpu")->base();
	855	UINT8 *base = machine.root_device().memregion("maincpu")->base();
856	856	UINT8 *base2, *base3, *base4;
857	857
858	858	/* check if memory C000-FFFF changed */
r14976	r14977
874	874	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xc000, 0xcfff, "bank3");
875	875	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_bank(0xd800, 0xffff, "bank4");
876	876	}
877		memory_set_bankptr(machine, "bank3", base3);
878		memory_set_bankptr(machine, "bank4", base4);
	877	machine.root_device().membank("bank3")->set_base(base3);
	878	machine.root_device().membank("bank4")->set_base(base4);
879	879
880	880
881	881	/* check if self-test ROM changed */
r14976	r14977
892	892	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0x5000, 0x57ff);
893	893	base2 = base + 0x15000;  /* 0x0800 bytes */
894	894	}
895		memory_set_bankptr(machine, "bank2", base2);
	895	machine.root_device().membank("bank2")->set_base(base2);
896	896	}
897	897
898	898	/**************************************************************
r14976	r14977
1466	1466
1467	1467	static DRIVER_INIT( a600xl )
1468	1468	{
1469		UINT8 *rom = machine.region("maincpu")->base();
	1469	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1470	1470	memcpy( rom + 0x5000, rom + 0xd000, 0x800 );
1471	1471	}
1472	1472

src/mess/drivers/pc9801.c

r14976	r14977
392	392	m_tvram = auto_alloc_array(machine(), UINT8, 0x4000);
393	393
394	394	// find memory regions
395		m_char_rom = machine().region("chargen")->base();
	395	m_char_rom = memregion("chargen")->base();
396	396	}
397	397
398	398	UINT32 pc9801_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
r14976	r14977
914	914	{
915	915	case 0x09://cg window font read
916	916	{
917		UINT8 *pcg = machine().region("pcg")->base();
	917	UINT8 *pcg = memregion("pcg")->base();
918	918
919	919	return pcg[((m_font_addr & 0x7f7f) << 4) | m_font_lr | (m_font_line & 0x0f)];
920	920	}
r14976	r14977
980	980	return;
981	981	case 0x09: //cg window font write
982	982	{
983		UINT8 *pcg = machine().region("pcg")->base();
	983	UINT8 *pcg = memregion("pcg")->base();
984	984
985	985	pcg[((m_font_addr & 0x7f7f) << 4) | m_font_lr | m_font_line] = data;
986	986	return;
r14976	r14977
1198	1198
1199	1199	READ8_MEMBER(pc9801_state::pc9801rs_wram_r)
1200	1200	{
1201		UINT8 *WRAM = machine().region("wram")->base();
	1201	UINT8 *WRAM = memregion("wram")->base();
1202	1202
1203	1203	return WRAM[offset];
1204	1204	}
1205	1205
1206	1206	WRITE8_MEMBER(pc9801_state::pc9801rs_wram_w)
1207	1207	{
1208		UINT8 *WRAM = machine().region("wram")->base();
	1208	UINT8 *WRAM = memregion("wram")->base();
1209	1209
1210	1210	WRAM[offset] = data;
1211	1211	}
1212	1212
1213	1213	READ8_MEMBER(pc9801_state::pc9801rs_ex_wram_r)
1214	1214	{
1215		UINT8 *EX_WRAM = machine().region("ex_wram")->base();
	1215	UINT8 *EX_WRAM = memregion("ex_wram")->base();
1216	1216
1217	1217	return EX_WRAM[offset];
1218	1218	}
1219	1219
1220	1220	WRITE8_MEMBER(pc9801_state::pc9801rs_ex_wram_w)
1221	1221	{
1222		UINT8 *EX_WRAM = machine().region("ex_wram")->base();
	1222	UINT8 *EX_WRAM = memregion("ex_wram")->base();
1223	1223
1224	1224	EX_WRAM[offset] = data;
1225	1225	}
1226	1226
1227	1227	READ8_MEMBER(pc9801_state::pc9801rs_ipl_r)
1228	1228	{
1229		UINT8 *ROM = machine().region("ipl")->base();
	1229	UINT8 *ROM = memregion("ipl")->base();
1230	1230
1231	1231	return ROM[(offset & 0x1ffff)+(m_rom_bank*0x20000)];
1232	1232	}
r14976	r14977
1234	1234	READ8_MEMBER(pc9801_state::pc9801rs_knjram_r)
1235	1235	{
1236	1236
1237		UINT8 *KNJRAM = machine().region("kanji")->base();
	1237	UINT8 *KNJRAM = memregion("kanji")->base();
1238	1238
1239	1239	return KNJRAM[offset];
1240	1240	}
1241	1241
1242	1242	WRITE8_MEMBER(pc9801_state::pc9801rs_knjram_w)
1243	1243	{
1244		UINT8 *KNJRAM = machine().region("kanji")->base();
	1244	UINT8 *KNJRAM = memregion("kanji")->base();
1245	1245
1246	1246	KNJRAM[offset] = data;
1247	1247	}
r14976	r14977
2436	2436	{
2437	2437	UINT8 op_mode;
2438	2438	UINT8 *ROM;
2439		UINT8 *PRG = machine.region("fdc_data")->base();
	2439	UINT8 *PRG = machine.root_device().memregion("fdc_data")->base();
2440	2440	int i;
2441	2441
2442		ROM = machine.region("fdc_bios_2dd")->base();
	2442	ROM = machine.root_device().memregion("fdc_bios_2dd")->base();
2443	2443	op_mode = (input_port_read(machine, "ROM_LOAD") & 2) >> 1;
2444	2444
2445	2445	for(i=0;i<0x1000;i++)
2446	2446	ROM[i] = PRG[i+op_mode*0x8000];
2447	2447
2448		ROM = machine.region("fdc_bios_2hd")->base();
	2448	ROM = machine.root_device().memregion("fdc_bios_2hd")->base();
2449	2449	op_mode = input_port_read(machine, "ROM_LOAD") & 1;
2450	2450
2451	2451	for(i=0;i<0x1000;i++)

src/mess/drivers/nakajies.c

r14976	r14977
356	356	m_bank_base[i] = m_rom_base + ( ( ( ( m_bank[i] & 0x0f ) ^ 0xf ) << 17 ) % m_rom_size );
357	357	}
358	358	}
359		memory_set_bankptr( machine(), "bank0", m_bank_base[0] );
360		memory_set_bankptr( machine(), "bank1", m_bank_base[1] );
361		memory_set_bankptr( machine(), "bank2", m_bank_base[2] );
362		memory_set_bankptr( machine(), "bank3", m_bank_base[3] );
363		memory_set_bankptr( machine(), "bank4", m_bank_base[4] );
364		memory_set_bankptr( machine(), "bank5", m_bank_base[5] );
365		memory_set_bankptr( machine(), "bank6", m_bank_base[6] );
366		memory_set_bankptr( machine(), "bank7", m_bank_base[7] );
	359	membank( "bank0" )->set_base( m_bank_base[0] );
	360	membank( "bank1" )->set_base( m_bank_base[1] );
	361	membank( "bank2" )->set_base( m_bank_base[2] );
	362	membank( "bank3" )->set_base( m_bank_base[3] );
	363	membank( "bank4" )->set_base( m_bank_base[4] );
	364	membank( "bank5" )->set_base( m_bank_base[5] );
	365	membank( "bank6" )->set_base( m_bank_base[6] );
	366	membank( "bank7" )->set_base( m_bank_base[7] );
367	367	}
368	368
369	369	void nakajies_state::bank_w( UINT8 banknr, offs_t offset, UINT8 data )
r14976	r14977
623	623
624	624	void nakajies_state::machine_start()
625	625	{
626		m_rom_base = machine().region("bios")->base();
627		m_rom_size = machine().region("bios")->bytes();
	626	m_rom_base = memregion("bios")->base();
	627	m_rom_size = memregion("bios")->bytes();
628	628
629	629	const char *gamename = machine().system().name;
630	630
r14976	r14977
633	633	{
634	634	m_ram_size = 256 * 1024;
635	635	}
636		m_ram_base = machine().region_alloc( "mainram", m_ram_size, 1, ENDIANNESS_LITTLE )->base();
	636	m_ram_base = machine().memory().region_alloc( "mainram", m_ram_size, 1, ENDIANNESS_LITTLE )->base();
637	637	}
638	638
639	639

src/mess/drivers/mz2000.c

r14976	r14977
74	74	static SCREEN_UPDATE_IND16( mz2000 )
75	75	{
76	76	mz2000_state *state = screen.machine().driver_data<mz2000_state>();
77		UINT8 *tvram = screen.machine().region("tvram")->base();
78		UINT8 *gvram = screen.machine().region("gvram")->base();
79		UINT8 *gfx_data = screen.machine().region("chargen")->base();
	77	UINT8 *tvram = screen.machine().root_device().memregion("tvram")->base();
	78	UINT8 *gvram = screen.machine().root_device().memregion("gvram")->base();
	79	UINT8 *gfx_data = state->memregion("chargen")->base();
80	80	int x,y,xi,yi;
81	81	UINT8 x_size;
82	82	UINT32 count;
r14976	r14977
170	170
171	171	READ8_MEMBER(mz2000_state::mz2000_ipl_r)
172	172	{
173		UINT8 *ipl = machine().region("ipl")->base();
	173	UINT8 *ipl = memregion("ipl")->base();
174	174
175	175	return ipl[offset];
176	176	}
177	177
178	178	READ8_MEMBER(mz2000_state::mz2000_wram_r)
179	179	{
180		UINT8 *wram = machine().region("wram")->base();
	180	UINT8 *wram = memregion("wram")->base();
181	181
182	182	return wram[offset];
183	183	}
184	184
185	185	WRITE8_MEMBER(mz2000_state::mz2000_wram_w)
186	186	{
187		UINT8 *wram = machine().region("wram")->base();
	187	UINT8 *wram = memregion("wram")->base();
188	188
189	189	wram[offset] = data;
190	190	}
191	191
192	192	READ8_MEMBER(mz2000_state::mz2000_tvram_r)
193	193	{
194		UINT8 *tvram = machine().region("tvram")->base();
	194	UINT8 *tvram = memregion("tvram")->base();
195	195
196	196	return tvram[offset];
197	197	}
198	198
199	199	WRITE8_MEMBER(mz2000_state::mz2000_tvram_w)
200	200	{
201		UINT8 *tvram = machine().region("tvram")->base();
	201	UINT8 *tvram = memregion("tvram")->base();
202	202
203	203	tvram[offset] = data;
204	204	}
205	205
206	206	READ8_MEMBER(mz2000_state::mz2000_gvram_r)
207	207	{
208		UINT8 *gvram = machine().region("gvram")->base();
	208	UINT8 *gvram = memregion("gvram")->base();
209	209
210	210	return gvram[offset+m_gvram_bank*0x4000];
211	211	}
212	212
213	213	WRITE8_MEMBER(mz2000_state::mz2000_gvram_w)
214	214	{
215		UINT8 *gvram = machine().region("gvram")->base();
	215	UINT8 *gvram = memregion("gvram")->base();
216	216
217	217	gvram[offset+m_gvram_bank*0x4000] = data;
218	218	}

src/mess/drivers/osbexec.c

r14976	r14977
78	78	if ( m_pia0_porta & 0x01 )
79	79	m_ram_0000 += 0x10000;
80	80
81		memory_set_bankptr( machine, "0000", m_ram_0000 + 0x0000 );
82		memory_set_bankptr( machine, "2000", m_ram_0000 + 0x2000 );
83		memory_set_bankptr( machine, "4000", m_ram_0000 + 0x4000 );
	81	membank( "0000" )->set_base( m_ram_0000 + 0x0000 );
	82	membank( "2000" )->set_base( m_ram_0000 + 0x2000 );
	83	membank( "4000" )->set_base( m_ram_0000 + 0x4000 );
84	84	m_ram_c000 = m_ram_0000 + 0xc000;
85		memory_set_bankptr( machine, "e000", m_ram_0000 + 0xe000 );
	85	membank( "e000" )->set_base( m_ram_0000 + 0xe000 );
86	86
87	87	if ( m_pia0_porta & 0x80 )
88	88	{
89		memory_set_bankptr( machine, "0000", machine.region("maincpu")->base());
	89	membank( "0000" )->set_base( memregion("maincpu")->base());
90	90	/* When BIOS is enabled 2000-3FFF is set to the "ROM RAM" */
91		memory_set_bankptr( machine, "2000", ram_ptr + 0x20000 );
	91	membank( "2000" )->set_base( ram_ptr + 0x20000 );
92	92	}
93	93
94	94	if ( m_pia0_porta & 0x40 )
r14976	r14977
606	606	{
607	607	osbexec_state *state = machine.driver_data<osbexec_state>();
608	608
609		state->m_fontram_region = machine.region_alloc( "fontram", 0x1000, 1, ENDIANNESS_LITTLE);
610		state->m_vram_region = machine.region_alloc( "vram", 0x2000, 1, ENDIANNESS_LITTLE );
	609	state->m_fontram_region = machine.memory().region_alloc( "fontram", 0x1000, 1, ENDIANNESS_LITTLE);
	610	state->m_vram_region = machine.memory().region_alloc( "vram", 0x2000, 1, ENDIANNESS_LITTLE );
611	611	state->m_vram = state->m_vram_region->base();
612	612	state->m_fontram = state->m_fontram_region->base();
613	613

src/mess/drivers/z100.c

r14976	r14977
814	814
815	815	static DRIVER_INIT( z100 )
816	816	{
817		UINT8 *ROM = machine.region("ipl")->base();
	817	UINT8 *ROM = machine.root_device().memregion("ipl")->base();
818	818
819	819	ROM[0xfc116 & 0x3fff] = 0x90; // patch parity IRQ check
820	820	ROM[0xfc117 & 0x3fff] = 0x90;

src/mess/drivers/v6809.c

r14976	r14977
229	229	static VIDEO_START( v6809 )
230	230	{
231	231	v6809_state *state = machine.driver_data<v6809_state>();
232		state->m_p_chargen = machine.region("chargen")->base();
233		state->m_p_videoram = machine.region("videoram")->base();
	232	state->m_p_chargen = machine.root_device().memregion("chargen")->base();
	233	state->m_p_videoram = state->memregion("videoram")->base();
234	234	}
235	235
236	236	static const mc6845_interface v6809_crtc = {

src/mess/drivers/mmd1.c

r14976	r14977
360	360
361	361	READ8_MEMBER( mmd1_state::mmd2_bank_r )
362	362	{
363		memory_set_bank(machine(), "bank1", offset);
364		memory_set_bank(machine(), "bank2", offset);
365		memory_set_bank(machine(), "bank3", offset);
366		memory_set_bank(machine(), "bank4", offset);
367		memory_set_bank(machine(), "bank5", offset);
368		memory_set_bank(machine(), "bank6", offset);
369		memory_set_bank(machine(), "bank7", offset);
370		memory_set_bank(machine(), "bank8", offset);
	363	membank("bank1")->set_entry(offset);
	364	membank("bank2")->set_entry(offset);
	365	membank("bank3")->set_entry(offset);
	366	membank("bank4")->set_entry(offset);
	367	membank("bank5")->set_entry(offset);
	368	membank("bank6")->set_entry(offset);
	369	membank("bank7")->set_entry(offset);
	370	membank("bank8")->set_entry(offset);
371	371	return 0xff;
372	372	}
373	373
r14976	r14977
446	446
447	447	static MACHINE_RESET( mmd2 )
448	448	{
449		memory_set_bank(machine, "bank1", 0);
450		memory_set_bank(machine, "bank2", 0);
451		memory_set_bank(machine, "bank3", 0);
452		memory_set_bank(machine, "bank4", 0);
453		memory_set_bank(machine, "bank5", 0);
454		memory_set_bank(machine, "bank6", 0);
455		memory_set_bank(machine, "bank7", 0);
456		memory_set_bank(machine, "bank8", 0);
	449	mmd1_state *state = machine.driver_data<mmd1_state>();
	450	state->membank("bank1")->set_entry(0);
	451	state->membank("bank2")->set_entry(0);
	452	state->membank("bank3")->set_entry(0);
	453	state->membank("bank4")->set_entry(0);
	454	state->membank("bank5")->set_entry(0);
	455	state->membank("bank6")->set_entry(0);
	456	state->membank("bank7")->set_entry(0);
	457	state->membank("bank8")->set_entry(0);
457	458	}
458	459
459	460	DRIVER_INIT( mmd2 )
r14976	r14977
462	463	We preset all banks here, so that bankswitching will incur no speed penalty.
463	464	0000/0400 indicate ROMs, D800/DC00/E400 indicate RAM, 8000 is a dummy write area for ROM banks.
464	465	*/
465
466		UINT8 *p_ram = machine.region("maincpu")->base();
467		memory_configure_bank(machine, "bank1", 0, 1, &p_ram[0x0000], 0);
468		memory_configure_bank(machine, "bank1", 1, 1, &p_ram[0xd800], 0);
469		memory_configure_bank(machine, "bank1", 2, 1, &p_ram[0x0c00], 0);
470		memory_configure_bank(machine, "bank2", 0, 1, &p_ram[0x8000], 0);
471		memory_configure_bank(machine, "bank2", 1, 1, &p_ram[0xd800], 0);
472		memory_configure_bank(machine, "bank2", 2, 1, &p_ram[0x8000], 0);
473		memory_configure_bank(machine, "bank3", 0, 1, &p_ram[0x0400], 0);
474		memory_configure_bank(machine, "bank3", 1, 1, &p_ram[0xdc00], 0);
475		memory_configure_bank(machine, "bank3", 2, 1, &p_ram[0xdc00], 0);
476		memory_configure_bank(machine, "bank4", 0, 1, &p_ram[0x8000], 0);
477		memory_configure_bank(machine, "bank4", 1, 1, &p_ram[0xdc00], 0);
478		memory_configure_bank(machine, "bank4", 2, 1, &p_ram[0xdc00], 0);
479		memory_configure_bank(machine, "bank5", 0, 1, &p_ram[0xd800], 0);
480		memory_configure_bank(machine, "bank5", 1, 1, &p_ram[0x0000], 0);
481		memory_configure_bank(machine, "bank5", 2, 1, &p_ram[0x0000], 0);
482		memory_configure_bank(machine, "bank6", 0, 1, &p_ram[0xd800], 0);
483		memory_configure_bank(machine, "bank6", 1, 1, &p_ram[0x8000], 0);
484		memory_configure_bank(machine, "bank6", 2, 1, &p_ram[0x8000], 0);
485		memory_configure_bank(machine, "bank7", 0, 1, &p_ram[0xe400], 0);
486		memory_configure_bank(machine, "bank7", 1, 1, &p_ram[0x0c00], 0);
487		memory_configure_bank(machine, "bank7", 2, 1, &p_ram[0xd800], 0);
488		memory_configure_bank(machine, "bank8", 0, 1, &p_ram[0xe400], 0);
489		memory_configure_bank(machine, "bank8", 1, 1, &p_ram[0x8000], 0);
490		memory_configure_bank(machine, "bank8", 2, 1, &p_ram[0xd800], 0);
	466	mmd1_state *state = machine.driver_data<mmd1_state>();
	467	UINT8 *p_ram = machine.root_device().memregion("maincpu")->base();
	468	state->membank("bank1")->configure_entry(0, &p_ram[0x0000]);
	469	state->membank("bank1")->configure_entry(1, &p_ram[0xd800]);
	470	state->membank("bank1")->configure_entry(2, &p_ram[0x0c00]);
	471	state->membank("bank2")->configure_entry(0, &p_ram[0x8000]);
	472	state->membank("bank2")->configure_entry(1, &p_ram[0xd800]);
	473	state->membank("bank2")->configure_entry(2, &p_ram[0x8000]);
	474	state->membank("bank3")->configure_entry(0, &p_ram[0x0400]);
	475	state->membank("bank3")->configure_entry(1, &p_ram[0xdc00]);
	476	state->membank("bank3")->configure_entry(2, &p_ram[0xdc00]);
	477	state->membank("bank4")->configure_entry(0, &p_ram[0x8000]);
	478	state->membank("bank4")->configure_entry(1, &p_ram[0xdc00]);
	479	state->membank("bank4")->configure_entry(2, &p_ram[0xdc00]);
	480	state->membank("bank5")->configure_entry(0, &p_ram[0xd800]);
	481	state->membank("bank5")->configure_entry(1, &p_ram[0x0000]);
	482	state->membank("bank5")->configure_entry(2, &p_ram[0x0000]);
	483	state->membank("bank6")->configure_entry(0, &p_ram[0xd800]);
	484	state->membank("bank6")->configure_entry(1, &p_ram[0x8000]);
	485	state->membank("bank6")->configure_entry(2, &p_ram[0x8000]);
	486	state->membank("bank7")->configure_entry(0, &p_ram[0xe400]);
	487	state->membank("bank7")->configure_entry(1, &p_ram[0x0c00]);
	488	state->membank("bank7")->configure_entry(2, &p_ram[0xd800]);
	489	state->membank("bank8")->configure_entry(0, &p_ram[0xe400]);
	490	state->membank("bank8")->configure_entry(1, &p_ram[0x8000]);
	491	state->membank("bank8")->configure_entry(2, &p_ram[0xd800]);
491	492	}
492	493
493	494	static MACHINE_CONFIG_START( mmd1, mmd1_state )

src/mess/drivers/mc1000.c

r14976	r14977
29	29	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
30	30
31	31	/* MC6845 video RAM */
32		memory_set_bank(machine(), "bank2", m_mc6845_bank);
	32	membank("bank2")->set_entry(m_mc6845_bank);
33	33
34	34	/* extended RAM */
35	35	if (m_ram->size() > 16*1024)
r14976	r14977
58	58	program->install_readwrite_bank(0x8000, 0x97ff, "bank4");
59	59	}
60	60
61		memory_set_bank(machine(), "bank4", m_mc6847_bank);
	61	membank("bank4")->set_entry(m_mc6847_bank);
62	62
63	63	/* extended RAM */
64	64	if (m_ram->size() > 16*1024)
r14976	r14977
326	326	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
327	327
328	328	/* setup memory banking */
329		UINT8 *rom = machine().region(Z80_TAG)->base();
	329	UINT8 *rom = memregion(Z80_TAG)->base();
330	330
331	331	program->install_readwrite_bank(0x0000, 0x1fff, "bank1");
332		memory_configure_bank(machine(), "bank1", 0, 1, rom, 0);
333		memory_configure_bank(machine(), "bank1", 1, 1, rom + 0xc000, 0);
334		memory_set_bank(machine(), "bank1", 1);
	332	membank("bank1")->configure_entry(0, rom);
	333	membank("bank1")->configure_entry(1, rom + 0xc000);
	334	membank("bank1")->set_entry(1);
335	335
336	336	m_rom0000 = 1;
337	337
338	338	program->install_readwrite_bank(0x2000, 0x27ff, "bank2");
339		memory_configure_bank(machine(), "bank2", 0, 1, rom + 0x2000, 0);
340		memory_configure_bank(machine(), "bank2", 1, 1, m_mc6845_video_ram, 0);
341		memory_set_bank(machine(), "bank2", 0);
	339	membank("bank2")->configure_entry(0, rom + 0x2000);
	340	membank("bank2")->configure_entry(1, m_mc6845_video_ram);
	341	membank("bank2")->set_entry(0);
342	342
343		memory_configure_bank(machine(), "bank3", 0, 1, rom + 0x4000, 0);
344		memory_set_bank(machine(), "bank3", 0);
	343	membank("bank3")->configure_entry(0, rom + 0x4000);
	344	membank("bank3")->set_entry(0);
345	345
346		memory_configure_bank(machine(), "bank4", 0, 1, m_mc6847_video_ram, 0);
347		memory_configure_bank(machine(), "bank4", 1, 1, rom + 0x8000, 0);
348		memory_set_bank(machine(), "bank4", 0);
	346	membank("bank4")->configure_entry(0, m_mc6847_video_ram);
	347	membank("bank4")->configure_entry(1, rom + 0x8000);
	348	membank("bank4")->set_entry(0);
349	349
350		memory_configure_bank(machine(), "bank5", 0, 1, rom + 0x9800, 0);
351		memory_set_bank(machine(), "bank5", 0);
	350	membank("bank5")->configure_entry(0, rom + 0x9800);
	351	membank("bank5")->set_entry(0);
352	352
353	353	bankswitch();
354	354
r14976	r14977
363	363
364	364	void mc1000_state::machine_reset()
365	365	{
366		memory_set_bank(machine(), "bank1", 1);
	366	membank("bank1")->set_entry(1);
367	367
368	368	m_rom0000 = 1;
369	369	}
r14976	r14977
488	488	{
489	489	if (address >= 0xc000)
490	490	{
491		memory_set_bank(machine(), "bank1", 0);
	491	membank("bank1")->set_entry(0);
492	492	m_rom0000 = 0;
493	493	}
494	494	}

src/mess/drivers/pt68k4.c

r14976	r14977
39	39	static MACHINE_RESET(pt68k4)
40	40	{
41	41	pt68k4_state *state = machine.driver_data<pt68k4_state>();
42		UINT8* user1 = machine.region("user1")->base();
	42	UINT8* user1 = state->memregion("user1")->base();
43	43
44	44	memcpy((UINT8*)state->m_p_ram.target(), user1, 8);
45	45

src/mess/drivers/adam.c

r14976	r14977
258	258	if (BIT(m_adamnet, 1))
259	259	{
260	260	program->unmap_readwrite(0x0000, 0x5fff);
261		program->install_rom(0x6000, 0x7fff, machine().region("wp")->base() + 0x8000);
	261	program->install_rom(0x6000, 0x7fff, memregion("wp")->base() + 0x8000);
262	262	}
263	263	else
264	264	{
265		program->install_rom(0x0000, 0x7fff, machine().region("wp")->base());
	265	program->install_rom(0x0000, 0x7fff, memregion("wp")->base());
266	266	}
267	267	break;
268	268
r14976	r14977
278	278	break;
279	279
280	280	case LO_OS7_ROM_INTERNAL_RAM:
281		program->install_rom(0x0000, 0x1fff, machine().region("os7")->base());
	281	program->install_rom(0x0000, 0x1fff, memregion("os7")->base());
282	282	program->install_ram(0x2000, 0x7fff, ram + 0x2000);
283	283	break;
284	284	}
r14976	r14977
290	290	break;
291	291
292	292	case HI_ROM_EXPANSION:
293		program->install_rom(0x8000, 0xffff, machine().region("xrom")->base());
	293	program->install_rom(0x8000, 0xffff, memregion("xrom")->base());
294	294	break;
295	295
296	296	case HI_RAM_EXPANSION:
297	297	if (m_game)
298	298	{
299		program->install_rom(0x8000, 0xffff, machine().region("cart")->base());
	299	program->install_rom(0x8000, 0xffff, memregion("cart")->base());
300	300	}
301	301	else
302	302	{
r14976	r14977
308	308	break;
309	309
310	310	case HI_CARTRIDGE_ROM:
311		program->install_rom(0x8000, 0xffff, machine().region("cart")->base());
	311	program->install_rom(0x8000, 0xffff, memregion("cart")->base());
312	312	break;
313	313	}
314	314	}

src/mess/drivers/msbc1.c

r14976	r14977
66	66	void msbc1_state::machine_reset()
67	67	{
68	68	void *ram = machine().firstcpu->memory().space(AS_PROGRAM)->get_write_ptr(0);
69		UINT8 *rom = machine().region(MC68000R12_TAG)->base();
	69	UINT8 *rom = memregion(MC68000R12_TAG)->base();
70	70
71	71	memcpy(ram, rom, 8);
72	72

src/mess/drivers/unixpc.c

r14976	r14977
66	66	if (BIT(data, 15))
67	67	space.install_ram(0x000000, 0x3fffff, m_ram->pointer());
68	68	else
69		space.install_rom(0x000000, 0x3fffff, space.machine().region("bootrom")->base());
	69	space.install_rom(0x000000, 0x3fffff, space.machine().root_device().memregion("bootrom")->base());
70	70	}
71	71
72	72	void unixpc_state::machine_reset()

src/mess/drivers/mini2440.c

r14976	r14977
170	170	state->m_nand = machine.device<nand_device>( "nand");
171	171	state->m_dac[0] = machine.device( "dac1");
172	172	state->m_dac[1] = machine.device( "dac2");
173		state->m_nand->set_data_ptr(machine.region("nand")->base());
	173	state->m_nand->set_data_ptr(state->memregion("nand")->base());
174	174	}
175	175
176	176	static MACHINE_RESET( mini2440 )

src/mess/drivers/pc88va.c

r14976	r14977
110	110	static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
111	111	{
112	112	pc88va_state *state = machine.driver_data<pc88va_state>();
113		UINT16 *tvram = (UINT16 *)(*machine.region("tvram"));
	113	UINT16 *tvram = (UINT16 *)(*state->memregion("tvram"));
114	114	int offs,i;
115	115
116	116	offs = state->m_tsp.spr_offset;
r14976	r14977
220	220	static void draw_text(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect)
221	221	{
222	222	pc88va_state *state = machine.driver_data<pc88va_state>();
223		UINT8 *tvram = machine.region("tvram")->base();
224		UINT8 *kanji = machine.region("kanji")->base();
	223	UINT8 *tvram = machine.root_device().memregion("tvram")->base();
	224	UINT8 *kanji = state->memregion("kanji")->base();
225	225	int xi,yi;
226	226	int x,y;
227	227	int res_x,res_y;
r14976	r14977
463	463	return 0xffff;
464	464	case 1: // TVRAM
465	465	{
466		UINT16 *tvram = (UINT16 *)(*machine().region("tvram"));
	466	UINT16 *tvram = (UINT16 *)(*machine().root_device().memregion("tvram"));
467	467
468	468	if(((offset*2) & 0x30000) == 0)
469	469	return tvram[offset];
r14976	r14977
472	472	}
473	473	case 4:
474	474	{
475		UINT16 *gvram = (UINT16 *)(*machine().region("gvram"));
	475	UINT16 *gvram = (UINT16 *)(*machine().root_device().memregion("gvram"));
476	476
477	477	return gvram[offset];
478	478	}
479	479	case 8: // kanji ROM
480	480	case 9:
481	481	{
482		UINT16 *knj_ram = (UINT16 *)(*machine().region("kanji"));
	482	UINT16 *knj_ram = (UINT16 *)(*machine().root_device().memregion("kanji"));
483	483	UINT32 knj_offset;
484	484
485	485	knj_offset = (offset + (((m_bank_reg & 0x100) >> 8)*0x20000));
r14976	r14977
495	495	case 0xc: // Dictionary ROM
496	496	case 0xd:
497	497	{
498		UINT16 *dic_rom = (UINT16 *)(*machine().region("dictionary"));
	498	UINT16 *dic_rom = (UINT16 *)(*machine().root_device().memregion("dictionary"));
499	499	UINT32 dic_offset;
500	500
501	501	dic_offset = (offset + (((m_bank_reg & 0x100) >> 8)*0x20000));
r14976	r14977
515	515	break;
516	516	case 1: // TVRAM
517	517	{
518		UINT16 *tvram = (UINT16 *)(*machine().region("tvram"));
	518	UINT16 *tvram = (UINT16 *)(*machine().root_device().memregion("tvram"));
519	519
520	520	if(((offset*2) & 0x30000) == 0)
521	521	COMBINE_DATA(&tvram[offset]);
r14976	r14977
523	523	break;
524	524	case 4: // TVRAM
525	525	{
526		UINT16 *gvram = (UINT16 *)(*machine().region("gvram"));
	526	UINT16 *gvram = (UINT16 *)(*machine().root_device().memregion("gvram"));
527	527
528	528	COMBINE_DATA(&gvram[offset]);
529	529	}
r14976	r14977
531	531	case 8: // kanji ROM, backup RAM at 0xb0000 - 0xb3fff
532	532	case 9:
533	533	{
534		UINT16 *knj_ram = (UINT16 *)(*machine().region("kanji"));
	534	UINT16 *knj_ram = (UINT16 *)(*machine().root_device().memregion("kanji"));
535	535	UINT32 knj_offset;
536	536
537	537	knj_offset = ((offset) + (((m_bank_reg & 0x100) >> 8)*0x20000));
r14976	r14977
886	886
887	887	/* RBC1 */
888	888	{
889		UINT8 *ROM10 = machine().region("rom10")->base();
	889	UINT8 *ROM10 = memregion("rom10")->base();
890	890
891	891	if((m_bank_reg & 0xe0) == 0x00)
892		memory_set_bankptr(machine(), "rom10_bank", &ROM10[(m_bank_reg & 0x10) ? 0x10000 : 0x00000]);
	892	membank("rom10_bank")->set_base(&ROM10[(m_bank_reg & 0x10) ? 0x10000 : 0x00000]);
893	893	}
894	894
895	895	/* RBC0 */
896	896	{
897		UINT8 *ROM00 = machine().region("rom00")->base();
	897	UINT8 *ROM00 = memregion("rom00")->base();
898	898
899		memory_set_bankptr(machine(), "rom00_bank", &ROM00[(m_bank_reg & 0xf)*0x10000]); // TODO: docs says that only 0 - 5 are used, dunno why ...
	899	membank("rom00_bank")->set_base(&ROM00[(m_bank_reg & 0xf)*0x10000]); // TODO: docs says that only 0 - 5 are used, dunno why ...
900	900	}
901	901	}
902	902
r14976	r14977
1064	1064
1065	1065	READ8_MEMBER(pc88va_state::backupram_dsw_r)
1066	1066	{
1067		UINT16 *knj_ram = (UINT16 *)(*machine().region("kanji"));
	1067	UINT16 *knj_ram = (UINT16 *)(*machine().root_device().memregion("kanji"));
1068	1068
1069	1069	if(offset == 0)
1070	1070	return knj_ram[(0x50000 + 0x1fc2) / 2] & 0xff;
r14976	r14977
1533	1533	static MACHINE_RESET( pc88va )
1534	1534	{
1535	1535	pc88va_state *state = machine.driver_data<pc88va_state>();
1536		UINT8 *ROM00 = machine.region("rom00")->base();
1537		UINT8 *ROM10 = machine.region("rom10")->base();
	1536	UINT8 *ROM00 = machine.root_device().memregion("rom00")->base();
	1537	UINT8 *ROM10 = state->memregion("rom10")->base();
1538	1538
1539		memory_set_bankptr(machine, "rom10_bank", &ROM10[0x00000]);
1540		memory_set_bankptr(machine, "rom00_bank", &ROM00[0x00000]);
	1539	state->membank("rom10_bank")->set_base(&ROM10[0x00000]);
	1540	state->membank("rom00_bank")->set_base(&ROM00[0x00000]);
1541	1541
1542	1542	state->m_bank_reg = 0x4100;
1543	1543	state->m_backupram_wp = 1;

src/mess/drivers/pc6001.c

r14976	r14977
367	367	static void draw_tile_text(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int x,int y,int tile,int attr,int has_mc6847)
368	368	{
369	369	int xi,yi,pen,fgcol,color;
370		UINT8 *gfx_data = machine.region("gfx1")->base();
	370	UINT8 *gfx_data = machine.root_device().memregion("gfx1")->base();
371	371
372	372	for(yi=0;yi<12;yi++)
373	373	{
r14976	r14977
570	570	else if(state->m_exgfx_text_mode)
571	571	{
572	572	int xi,yi,pen,fgcol,bgcol,color;
573		UINT8 *gfx_data = screen.machine().region("gfx1")->base();
	573	UINT8 *gfx_data = screen.machine().root_device().memregion("gfx1")->base();
574	574
575	575	for(y=0;y<20;y++)
576	576	{
r14976	r14977
619	619	pc6001_state *state = screen.machine().driver_data<pc6001_state>();
620	620	int x,y,tile,attr;
621	621	int xi,yi,pen,fgcol,bgcol,color;
622		UINT8 *gfx_data = screen.machine().region("gfx1")->base();
	622	UINT8 *gfx_data = state->memregion("gfx1")->base();
623	623
624	624
625	625	if(state->m_sr_video_mode & 8) // text mode
r14976	r14977
760	760
761	761	static UINT8 pc6001_get_char_rom(running_machine &machine, UINT8 ch, int line)
762	762	{
763		UINT8 *gfx = machine.region("gfx1")->base();
	763	UINT8 *gfx = machine.root_device().memregion("gfx1")->base();
764	764	return gfx[ch*16+line];
765	765	}
766	766	#endif
r14976	r14977
801	801	m_port_c_8255 |= 0xa8;
802	802
803	803	{
804		UINT8 *gfx_data = machine().region("gfx1")->base();
805		UINT8 *ext_rom = machine().region("cart_img")->base();
	804	UINT8 *gfx_data = memregion("gfx1")->base();
	805	UINT8 *ext_rom = memregion("cart_img")->base();
806	806
807	807	//printf("%02x\n",data);
808	808
809	809	if((data & 0x0f) == 0x05)
810		memory_set_bankptr(machine(), "bank1", &ext_rom[0x2000]);
	810	membank("bank1")->set_base(&ext_rom[0x2000]);
811	811	if((data & 0x0f) == 0x04)
812		memory_set_bankptr(machine(), "bank1", &gfx_data[0]);
	812	membank("bank1")->set_base(&gfx_data[0]);
813	813	}
814	814	}
815	815	m_ppi->write(space,offset,data);
r14976	r14977
1015	1015
1016	1016	WRITE8_MEMBER(pc6001_state::pc6001m2_bank_r0_w)
1017	1017	{
1018		UINT8 *ROM = machine().region("maincpu")->base();
1019		UINT8 *gfx_data = machine().region("gfx1")->base();
	1018	UINT8 *ROM = memregion("maincpu")->base();
	1019	UINT8 *gfx_data = memregion("gfx1")->base();
1020	1020
1021	1021	//  bankaddress = 0x10000 + (0x4000 * ((data & 0x40)>>6));
1022		//  memory_set_bankptr(machine(), 1, &ROM[bankaddress]);
	1022	//  membank(1)->set_base(&ROM[bankaddress]);
1023	1023
1024	1024	m_bank_r0 = data;
1025	1025
1026	1026	//  printf("%02x BANK | %02x\n",data,m_bank_opt);
1027		memory_set_bankptr(machine(), "bank1", &ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][0]]);
1028		memory_set_bankptr(machine(), "bank2", &ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][1]]);
1029		memory_set_bankptr(machine(), "bank3", &ROM[banksw_table_r0[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1027	membank("bank1")->set_base(&ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][0]]);
	1028	membank("bank2")->set_base(&ROM[banksw_table_r0[(data & 0xf)+(m_bank_opt*0x10)][1]]);
	1029	membank("bank3")->set_base(&ROM[banksw_table_r0[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1030	1030	if(!m_gfx_bank_on)
1031		memory_set_bankptr(machine(), "bank4", &ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1031	membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1032	1032	else
1033		memory_set_bankptr(machine(), "bank4", &gfx_data[m_cgrom_bank_addr]);
	1033	membank("bank4")->set_base(&gfx_data[m_cgrom_bank_addr]);
1034	1034	}
1035	1035
1036	1036	WRITE8_MEMBER(pc6001_state::pc6001m2_bank_r1_w)
1037	1037	{
1038		UINT8 *ROM = machine().region("maincpu")->base();
	1038	UINT8 *ROM = memregion("maincpu")->base();
1039	1039
1040	1040	//  bankaddress = 0x10000 + (0x4000 * ((data & 0x40)>>6));
1041		//  memory_set_bankptr(machine(), 1, &ROM[bankaddress]);
	1041	//  membank(1)->set_base(&ROM[bankaddress]);
1042	1042
1043	1043	m_bank_r1 = data;
1044	1044
1045	1045	//  printf("%02x BANK\n",data);
1046		memory_set_bankptr(machine(), "bank5", &ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][0]]);
1047		memory_set_bankptr(machine(), "bank6", &ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][1]]);
1048		memory_set_bankptr(machine(), "bank7", &ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1049		memory_set_bankptr(machine(), "bank8", &ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1046	membank("bank5")->set_base(&ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][0]]);
	1047	membank("bank6")->set_base(&ROM[banksw_table_r1[(data & 0xf)+(m_bank_opt*0x10)][1]]);
	1048	membank("bank7")->set_base(&ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1049	membank("bank8")->set_base(&ROM[banksw_table_r1[((data & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1050	1050	}
1051	1051
1052	1052	WRITE8_MEMBER(pc6001_state::pc6001m2_bank_w0_w)
r14976	r14977
1056	1056
1057	1057	WRITE8_MEMBER(pc6001_state::pc6001m2_opt_bank_w)
1058	1058	{
1059		UINT8 *ROM = machine().region("maincpu")->base();
1060		UINT8 *gfx_data = machine().region("gfx1")->base();
	1059	UINT8 *ROM = memregion("maincpu")->base();
	1060	UINT8 *gfx_data = memregion("gfx1")->base();
1061	1061
1062	1062	/*
1063	1063	0 - TVROM / VOICE ROM
r14976	r14977
1067	1067	*/
1068	1068	m_bank_opt = data & 3;
1069	1069
1070		memory_set_bankptr(machine(), "bank1", &ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][0]]);
1071		memory_set_bankptr(machine(), "bank2", &ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][1]]);
1072		memory_set_bankptr(machine(), "bank3", &ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1070	membank("bank1")->set_base(&ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][0]]);
	1071	membank("bank2")->set_base(&ROM[banksw_table_r0[(m_bank_r0 & 0xf)+(m_bank_opt*0x10)][1]]);
	1072	membank("bank3")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1073	1073	if(!m_gfx_bank_on)
1074		memory_set_bankptr(machine(), "bank4", &ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1074	membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1075	1075	else
1076		memory_set_bankptr(machine(), "bank4", &gfx_data[m_cgrom_bank_addr]);
1077		memory_set_bankptr(machine(), "bank4", &ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1078		memory_set_bankptr(machine(), "bank5", &ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][0]]);
1079		memory_set_bankptr(machine(), "bank6", &ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][1]]);
1080		memory_set_bankptr(machine(), "bank7", &ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
1081		memory_set_bankptr(machine(), "bank8", &ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1076	membank("bank4")->set_base(&gfx_data[m_cgrom_bank_addr]);
	1077	membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1078	membank("bank5")->set_base(&ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][0]]);
	1079	membank("bank6")->set_base(&ROM[banksw_table_r1[(m_bank_r1 & 0xf)+(m_bank_opt*0x10)][1]]);
	1080	membank("bank7")->set_base(&ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][2]]);
	1081	membank("bank8")->set_base(&ROM[banksw_table_r1[((m_bank_r1 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1082	1082
1083	1083	}
1084	1084
1085	1085	WRITE8_MEMBER(pc6001_state::work_ram0_w)
1086	1086	{
1087		UINT8 *ROM = machine().region("maincpu")->base();
	1087	UINT8 *ROM = memregion("maincpu")->base();
1088	1088	ROM[offset+((m_bank_w & 0x01) ? WRAM(0) : EXWRAM(0))] = data;
1089	1089	}
1090	1090
1091	1091	WRITE8_MEMBER(pc6001_state::work_ram1_w)
1092	1092	{
1093		UINT8 *ROM = machine().region("maincpu")->base();
	1093	UINT8 *ROM = memregion("maincpu")->base();
1094	1094	ROM[offset+((m_bank_w & 0x01) ? WRAM(1) : EXWRAM(1))] = data;
1095	1095	}
1096	1096
1097	1097	WRITE8_MEMBER(pc6001_state::work_ram2_w)
1098	1098	{
1099		UINT8 *ROM = machine().region("maincpu")->base();
	1099	UINT8 *ROM = memregion("maincpu")->base();
1100	1100	ROM[offset+((m_bank_w & 0x04) ? WRAM(2) : EXWRAM(2))] = data;
1101	1101	}
1102	1102
1103	1103	WRITE8_MEMBER(pc6001_state::work_ram3_w)
1104	1104	{
1105		UINT8 *ROM = machine().region("maincpu")->base();
	1105	UINT8 *ROM = memregion("maincpu")->base();
1106	1106	ROM[offset+((m_bank_w & 0x04) ? WRAM(3) : EXWRAM(3))] = data;
1107	1107	}
1108	1108
1109	1109	WRITE8_MEMBER(pc6001_state::work_ram4_w)
1110	1110	{
1111		UINT8 *ROM = machine().region("maincpu")->base();
	1111	UINT8 *ROM = memregion("maincpu")->base();
1112	1112	ROM[offset+((m_bank_w & 0x10) ? WRAM(4) : EXWRAM(4))] = data;
1113	1113	}
1114	1114
1115	1115	WRITE8_MEMBER(pc6001_state::work_ram5_w)
1116	1116	{
1117		UINT8 *ROM = machine().region("maincpu")->base();
	1117	UINT8 *ROM = memregion("maincpu")->base();
1118	1118	ROM[offset+((m_bank_w & 0x10) ? WRAM(5) : EXWRAM(5))] = data;
1119	1119	}
1120	1120
1121	1121	WRITE8_MEMBER(pc6001_state::work_ram6_w)
1122	1122	{
1123		UINT8 *ROM = machine().region("maincpu")->base();
	1123	UINT8 *ROM = memregion("maincpu")->base();
1124	1124	ROM[offset+((m_bank_w & 0x40) ? WRAM(6) : EXWRAM(6))] = data;
1125	1125	}
1126	1126
1127	1127	WRITE8_MEMBER(pc6001_state::work_ram7_w)
1128	1128	{
1129		UINT8 *ROM = machine().region("maincpu")->base();
	1129	UINT8 *ROM = memregion("maincpu")->base();
1130	1130	ROM[offset+((m_bank_w & 0x40) ? WRAM(7) : EXWRAM(7))] = data;
1131	1131	}
1132	1132
r14976	r14977
1151	1151	m_port_c_8255 |= 0xa8;
1152	1152
1153	1153	{
1154		UINT8 *ROM = machine().region("maincpu")->base();
1155		UINT8 *gfx_data = machine().region("gfx1")->base();
	1154	UINT8 *ROM = memregion("maincpu")->base();
	1155	UINT8 *gfx_data = memregion("gfx1")->base();
1156	1156
1157	1157	//printf("%02x\n",data);
1158	1158
1159	1159	if((data & 0x0f) == 0x05)
1160	1160	{
1161	1161	m_gfx_bank_on = 0;
1162		memory_set_bankptr(machine(), "bank4", &ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
	1162	membank("bank4")->set_base(&ROM[banksw_table_r0[((m_bank_r0 & 0xf0)>>4)+(m_bank_opt*0x10)][3]]);
1163	1163	}
1164	1164	if((data & 0x0f) == 0x04)
1165	1165	{
1166	1166	m_gfx_bank_on = 1;
1167		memory_set_bankptr(machine(), "bank4", &gfx_data[m_cgrom_bank_addr]);
	1167	membank("bank4")->set_base(&gfx_data[m_cgrom_bank_addr]);
1168	1168	}
1169	1169	}
1170	1170	}
r14976	r14977
1174	1174	static void vram_bank_change(running_machine &machine,UINT8 vram_bank)
1175	1175	{
1176	1176	pc6001_state *state = machine.driver_data<pc6001_state>();
1177		UINT8 *work_ram = machine.region("maincpu")->base();
	1177	UINT8 *work_ram = state->memregion("maincpu")->base();
1178	1178
1179	1179	//  popmessage("%02x",vram_bank);
1180	1180
r14976	r14977
1481	1481	WRITE8_MEMBER(pc6001_state::pc6001sr_bank_rn_w)
1482	1482	{
1483	1483	static const char *const bank_name[8] = { "bank1","bank2","bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
1484		UINT8 *ROM = machine().region("maincpu")->base();
	1484	UINT8 *ROM = memregion("maincpu")->base();
1485	1485	UINT8 bank_num;
1486	1486
1487	1487	m_sr_bank_r[offset] = data;
r14976	r14977
1489	1489
1490	1490	switch(data & 0xf0)
1491	1491	{
1492		case 0xf0: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_SYSROM_1(bank_num)]); break;
1493		case 0xe0: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_SYSROM_2(bank_num)]); break;
1494		case 0xd0: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_CGROM1(bank_num)]); break;
1495		case 0xc0: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_EXROM0(bank_num)]); break;
1496		case 0xb0: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_EXROM1(bank_num)]); break;
1497		case 0x20: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_EXRAM0(bank_num)]); break;
1498		case 0x00: memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_WRAM0(bank_num)]); break;
1499		default:   memory_set_bankptr(machine(), bank_name[offset], &ROM[SR_NULL(bank_num)]); break;
	1492	case 0xf0: membank(bank_name[offset])->set_base(&ROM[SR_SYSROM_1(bank_num)]); break;
	1493	case 0xe0: membank(bank_name[offset])->set_base(&ROM[SR_SYSROM_2(bank_num)]); break;
	1494	case 0xd0: membank(bank_name[offset])->set_base(&ROM[SR_CGROM1(bank_num)]); break;
	1495	case 0xc0: membank(bank_name[offset])->set_base(&ROM[SR_EXROM0(bank_num)]); break;
	1496	case 0xb0: membank(bank_name[offset])->set_base(&ROM[SR_EXROM1(bank_num)]); break;
	1497	case 0x20: membank(bank_name[offset])->set_base(&ROM[SR_EXRAM0(bank_num)]); break;
	1498	case 0x00: membank(bank_name[offset])->set_base(&ROM[SR_WRAM0(bank_num)]); break;
	1499	default:   membank(bank_name[offset])->set_base(&ROM[SR_NULL(bank_num)]); break;
1500	1500	}
1501	1501	}
1502	1502
r14976	r14977
1512	1512
1513	1513	#define SR_WRAM_BANK_W(_v_) \
1514	1514	{ \
1515		UINT8 *ROM = machine().region("maincpu")->base(); \
	1515	UINT8 *ROM = memregion("maincpu")->base(); \
1516	1516	UINT8 bank_num; \
1517	1517	bank_num = m_sr_bank_w[_v_] & 0x0f; \
1518	1518	if((m_sr_bank_w[_v_] & 0xf0) != 0x20) \
r14976	r14977
1540	1540
1541	1541	WRITE8_MEMBER(pc6001_state::pc6001sr_vram_bank_w)
1542	1542	{
1543		UINT8 *work_ram = machine().region("maincpu")->base();
	1543	UINT8 *work_ram = memregion("maincpu")->base();
1544	1544
1545	1545	m_video_ram = work_ram + 0x70000 + ((data & 0x0f)*0x1000);
1546	1546	}
r14976	r14977
1591	1591
1592	1592	if(0)
1593	1593	{
1594		UINT8 *gfx_data = machine().region("gfx1")->base();
1595		UINT8 *ext_rom = machine().region("cart_img")->base();
	1594	UINT8 *gfx_data = memregion("gfx1")->base();
	1595	UINT8 *ext_rom = memregion("cart_img")->base();
1596	1596
1597	1597	//printf("%02x\n",data);
1598	1598
1599	1599	if((data & 0x0f) == 0x05)
1600		memory_set_bankptr(machine(), "bank1", &ext_rom[0x2000]);
	1600	membank("bank1")->set_base(&ext_rom[0x2000]);
1601	1601	if((data & 0x0f) == 0x04)
1602		memory_set_bankptr(machine(), "bank1", &gfx_data[0]);
	1602	membank("bank1")->set_base(&gfx_data[0]);
1603	1603	}
1604	1604	}
1605	1605	m_ppi->write(space,offset,data);
r14976	r14977
2002	2002	else
2003	2003	cas_data_i>>=1;
2004	2004	#else
2005		UINT8 *cas_data = timer.machine().region("cas")->base();
	2005	UINT8 *cas_data = timer.machine().root_device().memregion("cas")->base();
2006	2006
2007	2007	state->m_cur_keycode = cas_data[state->m_cas_offset++];
2008	2008	popmessage("%04x %04x",state->m_cas_offset,state->m_cas_maxsize);
r14976	r14977
2073	2073	static MACHINE_RESET(pc6001)
2074	2074	{
2075	2075	pc6001_state *state = machine.driver_data<pc6001_state>();
2076		UINT8 *work_ram = machine.region("maincpu")->base();
	2076	UINT8 *work_ram = state->memregion("maincpu")->base();
2077	2077
2078	2078	state->m_video_ram =  work_ram + 0xc000;
2079	2079
r14976	r14977
2091	2091	static MACHINE_RESET(pc6001m2)
2092	2092	{
2093	2093	pc6001_state *state = machine.driver_data<pc6001_state>();
2094		UINT8 *work_ram = machine.region("maincpu")->base();
	2094	UINT8 *work_ram = machine.root_device().memregion("maincpu")->base();
2095	2095
2096	2096	state->m_video_ram = work_ram + 0xc000 + 0x28000;
2097	2097
r14976	r14977
2103	2103
2104	2104	/* set default bankswitch */
2105	2105	{
2106		UINT8 *ROM = machine.region("maincpu")->base();
	2106	UINT8 *ROM = state->memregion("maincpu")->base();
2107	2107	state->m_bank_r0 = 0x71;
2108		memory_set_bankptr(machine, "bank1", &ROM[BASICROM(0)]);
2109		memory_set_bankptr(machine, "bank2", &ROM[BASICROM(1)]);
2110		memory_set_bankptr(machine, "bank3", &ROM[EXROM(0)]);
2111		memory_set_bankptr(machine, "bank4", &ROM[EXROM(1)]);
	2108	state->membank("bank1")->set_base(&ROM[BASICROM(0)]);
	2109	state->membank("bank2")->set_base(&ROM[BASICROM(1)]);
	2110	state->membank("bank3")->set_base(&ROM[EXROM(0)]);
	2111	state->membank("bank4")->set_base(&ROM[EXROM(1)]);
2112	2112	state->m_bank_r1 = 0xdd;
2113		memory_set_bankptr(machine, "bank5", &ROM[WRAM(4)]);
2114		memory_set_bankptr(machine, "bank6", &ROM[WRAM(5)]);
2115		memory_set_bankptr(machine, "bank7", &ROM[WRAM(6)]);
2116		memory_set_bankptr(machine, "bank8", &ROM[WRAM(7)]);
	2113	state->membank("bank5")->set_base(&ROM[WRAM(4)]);
	2114	state->membank("bank6")->set_base(&ROM[WRAM(5)]);
	2115	state->membank("bank7")->set_base(&ROM[WRAM(6)]);
	2116	state->membank("bank8")->set_base(&ROM[WRAM(7)]);
2117	2117	state->m_bank_opt = 0x02; //tv rom
2118	2118	state->m_bank_w = 0x50; //enable write to work ram 4,5,6,7
2119	2119	state->m_gfx_bank_on = 0;
r14976	r14977
2127	2127	static MACHINE_RESET(pc6001sr)
2128	2128	{
2129	2129	pc6001_state *state = machine.driver_data<pc6001_state>();
2130		UINT8 *work_ram = machine.region("maincpu")->base();
	2130	UINT8 *work_ram = machine.root_device().memregion("maincpu")->base();
2131	2131
2132	2132	state->m_video_ram = work_ram + 0x70000;
2133	2133
r14976	r14977
2139	2139
2140	2140	/* set default bankswitch */
2141	2141	{
2142		UINT8 *ROM = machine.region("maincpu")->base();
2143		state->m_sr_bank_r[0] = 0xf8; memory_set_bankptr(machine, "bank1", &ROM[SR_SYSROM_1(0x08)]);
2144		state->m_sr_bank_r[1] = 0xfa; memory_set_bankptr(machine, "bank2", &ROM[SR_SYSROM_1(0x0a)]);
2145		state->m_sr_bank_r[2] = 0xb0; memory_set_bankptr(machine, "bank3", &ROM[SR_EXROM1(0x00)]);
2146		state->m_sr_bank_r[3] = 0xc0; memory_set_bankptr(machine, "bank4", &ROM[SR_EXROM0(0x00)]);
2147		state->m_sr_bank_r[4] = 0x08; memory_set_bankptr(machine, "bank5", &ROM[SR_WRAM0(0x08)]);
2148		state->m_sr_bank_r[5] = 0x0a; memory_set_bankptr(machine, "bank6", &ROM[SR_WRAM0(0x0a)]);
2149		state->m_sr_bank_r[6] = 0x0c; memory_set_bankptr(machine, "bank7", &ROM[SR_WRAM0(0x0c)]);
2150		state->m_sr_bank_r[7] = 0x0e; memory_set_bankptr(machine, "bank8", &ROM[SR_WRAM0(0x0e)]);
	2142	UINT8 *ROM = state->memregion("maincpu")->base();
	2143	state->m_sr_bank_r[0] = 0xf8; state->membank("bank1")->set_base(&ROM[SR_SYSROM_1(0x08)]);
	2144	state->m_sr_bank_r[1] = 0xfa; state->membank("bank2")->set_base(&ROM[SR_SYSROM_1(0x0a)]);
	2145	state->m_sr_bank_r[2] = 0xb0; state->membank("bank3")->set_base(&ROM[SR_EXROM1(0x00)]);
	2146	state->m_sr_bank_r[3] = 0xc0; state->membank("bank4")->set_base(&ROM[SR_EXROM0(0x00)]);
	2147	state->m_sr_bank_r[4] = 0x08; state->membank("bank5")->set_base(&ROM[SR_WRAM0(0x08)]);
	2148	state->m_sr_bank_r[5] = 0x0a; state->membank("bank6")->set_base(&ROM[SR_WRAM0(0x0a)]);
	2149	state->m_sr_bank_r[6] = 0x0c; state->membank("bank7")->set_base(&ROM[SR_WRAM0(0x0c)]);
	2150	state->m_sr_bank_r[7] = 0x0e; state->membank("bank8")->set_base(&ROM[SR_WRAM0(0x0e)]);
2151	2151	//      state->m_bank_opt = 0x02; //tv rom
2152	2152
2153	2153	/* enable default work RAM writes */
r14976	r14977
2237	2237	static DEVICE_IMAGE_LOAD( pc6001_cass )
2238	2238	{
2239	2239	pc6001_state *state = image.device().machine().driver_data<pc6001_state>();
2240		UINT8 *cas = image.device().machine().region("cas")->base();
	2240	UINT8 *cas = state->memregion("cas")->base();
2241	2241	UINT32 size;
2242	2242
2243	2243	size = image.length();

src/mess/drivers/mycom.c

r14976	r14977
117	117
118	118	VIDEO_START_MEMBER( mycom_state )
119	119	{
120		m_p_videoram = machine().region("vram")->base();
121		m_p_chargen = machine().region("chargen")->base();
	120	m_p_videoram = memregion("vram")->base();
	121	m_p_chargen = memregion("chargen")->base();
122	122	}
123	123
124	124	static MC6845_UPDATE_ROW( mycom_update_row )
r14976	r14977
181	181	{
182	182	switch(data)
183	183	{
184		case 0x00: memory_set_bank(machine(), "boot", 1); break;
185		case 0x01: memory_set_bank(machine(), "boot", 0); break;
	184	case 0x00: membank("boot")->set_entry(1); break;
	185	case 0x01: membank("boot")->set_entry(0); break;
186	186	case 0x02: m_upper_sw = 0x10000; break;
187	187	case 0x03: m_upper_sw = 0x0c000; break;
188	188	}
r14976	r14977
537	537
538	538	MACHINE_START_MEMBER(mycom_state)
539	539	{
540		m_p_ram = machine().region("maincpu")->base();
	540	m_p_ram = memregion("maincpu")->base();
541	541	}
542	542
543	543	MACHINE_RESET_MEMBER(mycom_state)
544	544	{
545		memory_set_bank(machine(), "boot", 1);
	545	membank("boot")->set_entry(1);
546	546	m_upper_sw = 0x10000;
547	547	m_0a = 0;
548	548	}
549	549
550	550	static DRIVER_INIT( mycom )
551	551	{
552		UINT8 *RAM = machine.region("maincpu")->base();
553		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x10000);
	552	mycom_state *state = machine.driver_data<mycom_state>();
	553	UINT8 *RAM = state->memregion("maincpu")->base();
	554	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x10000);
554	555	}
555	556
556	557	static MACHINE_CONFIG_START( mycom, mycom_state )

src/mess/drivers/spc1000.c

r14976	r14977
52	52	{
53	53	m_IPLK = m_IPLK ? 0 : 1;
54	54	if (m_IPLK == 1) {
55		UINT8 *mem = machine().region("maincpu")->base();
56		memory_set_bankptr(machine(), "bank1", mem);
57		memory_set_bankptr(machine(), "bank3", mem);
	55	UINT8 *mem = memregion("maincpu")->base();
	56	membank("bank1")->set_base(mem);
	57	membank("bank3")->set_base(mem);
58	58	} else {
59	59	UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
60		memory_set_bankptr(machine(), "bank1", ram);
61		memory_set_bankptr(machine(), "bank3", ram + 0x8000);
	60	membank("bank1")->set_base(ram);
	61	membank("bank3")->set_base(ram + 0x8000);
62	62	}
63	63	}
64	64
r14976	r14977
66	66	{
67	67	m_IPLK = m_IPLK ? 0 : 1;
68	68	if (m_IPLK == 1) {
69		UINT8 *mem = machine().region("maincpu")->base();
70		memory_set_bankptr(machine(), "bank1", mem);
71		memory_set_bankptr(machine(), "bank3", mem);
	69	UINT8 *mem = memregion("maincpu")->base();
	70	membank("bank1")->set_base(mem);
	71	membank("bank3")->set_base(mem);
72	72	} else {
73	73	UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
74		memory_set_bankptr(machine(), "bank1", ram);
75		memory_set_bankptr(machine(), "bank3", ram + 0x8000);
	74	membank("bank1")->set_base(ram);
	75	membank("bank3")->set_base(ram + 0x8000);
76	76	}
77	77	return 0;
78	78	}
r14976	r14977
225	225	{
226	226	spc1000_state *state = machine.driver_data<spc1000_state>();
227	227	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
228		UINT8 *mem = machine.region("maincpu")->base();
	228	UINT8 *mem = state->memregion("maincpu")->base();
229	229	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
230	230
231	231	space->install_read_bank(0x0000, 0x7fff, "bank1");
r14976	r14977
234	234	space->install_write_bank(0x0000, 0x7fff, "bank2");
235	235	space->install_write_bank(0x8000, 0xffff, "bank4");
236	236
237		memory_set_bankptr(machine, "bank1", mem);
238		memory_set_bankptr(machine, "bank2", ram);
239		memory_set_bankptr(machine, "bank3", mem);
240		memory_set_bankptr(machine, "bank4", ram + 0x8000);
	237	state->membank("bank1")->set_base(mem);
	238	state->membank("bank2")->set_base(ram);
	239	state->membank("bank3")->set_base(mem);
	240	state->membank("bank4")->set_base(ram + 0x8000);
241	241
242	242	state->m_IPLK = 1;
243	243	}

src/mess/drivers/vii.c

r14976	r14977
547	547
548	548	void vii_state::vii_switch_bank(UINT32 bank)
549	549	{
550		UINT8 *cart = machine().region("cart")->base();
	550	UINT8 *cart = memregion("cart")->base();
551	551
552	552	if(bank != m_current_bank)
553	553	{
r14976	r14977
917	917	static DEVICE_IMAGE_LOAD( vii_cart )
918	918	{
919	919	vii_state *state = image.device().machine().driver_data<vii_state>();
920		UINT8 *cart = image.device().machine().region( "cart" )->base();
	920	UINT8 *cart = state->memregion( "cart" )->base();
921	921	if (image.software_entry() == NULL)
922	922	{
923	923	int size = image.length();
r14976	r14977
951	951	static DEVICE_IMAGE_LOAD( vsmile_cart )
952	952	{
953	953	vii_state *state = image.device().machine().driver_data<vii_state>();
954		UINT8 *cart = image.device().machine().region( "cart" )->base();
	954	UINT8 *cart = state->memregion( "cart" )->base();
955	955	if (image.software_entry() == NULL)
956	956	{
957	957	int size = image.length();
r14976	r14977
996	996	state->m_controller_input[6] = 0xff;
997	997	state->m_controller_input[7] = 0;
998	998
999		UINT8 *rom = machine.region( "cart" )->base();
	999	UINT8 *rom = state->memregion( "cart" )->base();
1000	1000	if (rom)
1001	1001	{ // to prevent batman crash
1002	1002	memcpy(state->m_p_cart, rom + 0x4000*2, (0x400000 - 0x4000) * 2);

src/mess/drivers/x1.c

r14976	r14977
343	343	int width = BIT(state->m_avram[((x+y*x_size)+mc6845_start_addr) & 0x7ff], 7);
344	344	int height = BIT(state->m_avram[((x+y*x_size)+mc6845_start_addr) & 0x7ff], 6);
345	345	int pcg_bank = BIT(state->m_avram[((x+y*x_size)+mc6845_start_addr) & 0x7ff], 5);
346		UINT8 *gfx_data = machine.region(pcg_bank ? "pcg" : "cgrom")->base();
	346	UINT8 *gfx_data = machine.root_device().memregion(pcg_bank ? "pcg" : "cgrom")->base();
347	347	int   knj_enable = 0;
348	348	int knj_side = 0;
349	349	int knj_bank = 0;
r14976	r14977
357	357	knj_bank = state->m_kvram[((x+y*x_size)+mc6845_start_addr) & 0x7ff] & 0x0f;
358	358	if(knj_enable)
359	359	{
360		gfx_data = machine.region("kanji")->base();
	360	gfx_data = state->memregion("kanji")->base();
361	361	tile = ((tile + (knj_bank << 8)) << 1) + (knj_side & 1);
362	362	}
363	363	}
r14976	r14977
965	965
966	966	READ8_MEMBER( x1_state::x1_rom_r )
967	967	{
968		UINT8 *rom = machine().region("cart_img")->base();
	968	UINT8 *rom = memregion("cart_img")->base();
969	969
970	970	//  printf("%06x\n",m_rom_index[0]<<16|m_rom_index[1]<<8|m_rom_index[2]<<0);
971	971
r14976	r14977
1123	1123
1124	1124	if(addr == 0 && m_scrn_reg.pcg_mode) // Kanji ROM read, X1Turbo only
1125	1125	{
1126		gfx_data = machine().region("kanji")->base();
	1126	gfx_data = memregion("kanji")->base();
1127	1127	pcg_offset = (m_tvram[check_chr_addr()]+(m_kvram[check_chr_addr()]<<8)) & 0xfff;
1128	1128	pcg_offset*=0x20;
1129	1129	pcg_offset+=(offset & 0x0f);
r14976	r14977
1136	1136	UINT8 y_char_size;
1137	1137
1138	1138	/* addr == 0 reads from the ANK rom */
1139		gfx_data = machine().region((addr == 0) ? "cgrom" : "pcg")->base();
	1139	gfx_data = memregion((addr == 0) ? "cgrom" : "pcg")->base();
1140	1140	y_char_size = ((m_crtc_vreg[9]+1) > 8) ? 8 : m_crtc_vreg[9]+1;
1141	1141	if(y_char_size == 0) { y_char_size = 1; }
1142	1142	pcg_offset = m_tvram[get_pcg_addr(m_crtc_vreg[1], y_char_size)]*8;
r14976	r14977
1151	1151	WRITE8_MEMBER( x1_state::x1_pcg_w )
1152	1152	{
1153	1153	int addr,pcg_offset;
1154		UINT8 *PCG_RAM = machine().region("pcg")->base();
	1154	UINT8 *PCG_RAM = memregion("pcg")->base();
1155	1155
1156	1156	addr = (offset & 0x300) >> 8;
1157	1157
r14976	r14977
1446	1446
1447	1447	READ8_MEMBER( x1_state::x1_kanji_r )
1448	1448	{
1449		UINT8 *kanji_rom = machine().region("kanji")->base();
	1449	UINT8 *kanji_rom = memregion("kanji")->base();
1450	1450	UINT8 res;
1451	1451
1452	1452	res = kanji_rom[jis_convert(m_kanji_addr & 0xfff0)+(offset*0x10)+(m_kanji_addr & 0xf)];
r14976	r14977
1489	1489
1490	1490	READ8_MEMBER( x1_state::x1_emm_r )
1491	1491	{
1492		UINT8 *emm_ram = machine().region("emm")->base();
	1492	UINT8 *emm_ram = memregion("emm")->base();
1493	1493	UINT8 res;
1494	1494
1495	1495	if(offset & ~3)
r14976	r14977
1514	1514
1515	1515	WRITE8_MEMBER( x1_state::x1_emm_w )
1516	1516	{
1517		UINT8 *emm_ram = machine().region("emm")->base();
	1517	UINT8 *emm_ram = memregion("emm")->base();
1518	1518
1519	1519	if(offset & ~3)
1520	1520	{
r14976	r14977
1545	1545
1546	1546	WRITE8_MEMBER( x1_state::x1turbo_bank_w )
1547	1547	{
1548		//UINT8 *RAM = machine().region("x1_cpu")->base();
	1548	//UINT8 *RAM = memregion("x1_cpu")->base();
1549	1549	/*
1550	1550	--x- ---- BML5: latch bit (doesn't have any real function)
1551	1551	---x ---- BMCS: select bank RAM, active low
r14976	r14977
1559	1559	/* TODO: waitstate penalties */
1560	1560	READ8_MEMBER( x1_state::x1_mem_r )
1561	1561	{
1562		UINT8 *wram = machine().region("wram")->base();
	1562	UINT8 *wram = memregion("wram")->base();
1563	1563
1564	1564	if((offset & 0x8000) == 0 && (m_ram_bank == 0))
1565	1565	{
1566		UINT8 *ipl = machine().region("ipl")->base();
	1566	UINT8 *ipl = memregion("ipl")->base();
1567	1567	return ipl[offset]; //ROM
1568	1568	}
1569	1569
r14976	r14977
1572	1572
1573	1573	WRITE8_MEMBER( x1_state::x1_mem_w )
1574	1574	{
1575		UINT8 *wram = machine().region("wram")->base();
	1575	UINT8 *wram = memregion("wram")->base();
1576	1576
1577	1577	wram[offset] = data; //RAM
1578	1578	}
r14976	r14977
1581	1581	{
1582	1582	if((m_ex_bank & 0x10) == 0)
1583	1583	{
1584		UINT8 *wram = machine().region("wram")->base();
	1584	UINT8 *wram = memregion("wram")->base();
1585	1585
1586	1586	return wram[offset+((m_ex_bank & 0xf)*0x10000)];
1587	1587	}
r14976	r14977
1593	1593	{
1594	1594	if((m_ex_bank & 0x10) == 0)
1595	1595	{
1596		UINT8 *wram = machine().region("wram")->base();
	1596	UINT8 *wram = memregion("wram")->base();
1597	1597
1598	1598	wram[offset+((m_ex_bank & 0xf)*0x10000)] = data; //RAM
1599	1599	}
r14976	r14977
2468	2468	MACHINE_RESET( x1 )
2469	2469	{
2470	2470	x1_state *state = machine.driver_data<x1_state>();
2471		//UINT8 *ROM = machine.region("x1_cpu")->base();
2472		UINT8 *PCG_RAM = machine.region("pcg")->base();
	2471	//UINT8 *ROM = machine.root_device().memregion("x1_cpu")->base();
	2472	UINT8 *PCG_RAM = state->memregion("pcg")->base();
2473	2473	int i;
2474	2474
2475	2475	memset(state->m_gfx_bitmap_ram,0x00,0xc000*2);
r14976	r14977
2764	2764	DRIVER_INIT( x1_kanji )
2765	2765	{
2766	2766	UINT32 i,j,k,l;
2767		UINT8 *kanji = machine.region("kanji")->base();
2768		UINT8 *raw_kanji = machine.region("raw_kanji")->base();
	2767	UINT8 *kanji = machine.root_device().memregion("kanji")->base();
	2768	UINT8 *raw_kanji = machine.root_device().memregion("raw_kanji")->base();
2769	2769
2770	2770	k = 0;
2771	2771	for(l=0;l<2;l++)

src/mess/drivers/sun3.c

r14976	r14977
247	247
248	248	MACHINE_RESET_MEMBER(sun3_state)
249	249	{
250		UINT8* user1 = machine().region("user1")->base();
	250	UINT8* user1 = memregion("user1")->base();
251	251
252	252	memcpy((UINT8*)m_p_ram.target(),user1,0x10000);
253	253

src/mess/drivers/pocketc.c

r14976	r14977
798	798	static MACHINE_START( pc1260 )
799	799	{
800	800	device_t *main_cpu = machine.device("maincpu");
801		UINT8 *ram = machine.region("maincpu")->base() + 0x4000;
	801	UINT8 *ram = machine.root_device().memregion("maincpu")->base() + 0x4000;
802	802	UINT8 *cpu = sc61860_internal_ram(main_cpu);
803	803
804	804	machine.device<nvram_device>("cpu_nvram")->set_base(cpu, 96);

src/mess/drivers/xor100.c

r14976	r14977
66	66	if (m_bank < banks)
67	67	{
68	68	program->install_write_bank(0x0000, 0xffff, "bank1");
69		memory_set_bank(machine(), "bank1", 1 + m_bank);
	69	membank("bank1")->set_entry(1 + m_bank);
70	70	}
71	71	else
72	72	{
r14976	r14977
75	75
76	76	program->install_read_bank(0x0000, 0xf7ff, 0x07ff, 0, "bank2");
77	77	program->install_read_bank(0xf800, 0xffff, "bank3");
78		memory_set_bank(machine(), "bank2", 0);
79		memory_set_bank(machine(), "bank3", 0);
	78	membank("bank2")->set_entry(0);
	79	membank("bank3")->set_entry(0);
80	80	break;
81	81
82	82	case EPROM_F800:
r14976	r14977
84	84	{
85	85	program->install_write_bank(0x0000, 0xffff, "bank1");
86	86	program->install_read_bank(0x0000, 0xf7ff, "bank2");
87		memory_set_bank(machine(), "bank1", 1 + m_bank);
88		memory_set_bank(machine(), "bank2", 1 + m_bank);
	87	membank("bank1")->set_entry(1 + m_bank);
	88	membank("bank2")->set_entry(1 + m_bank);
89	89	}
90	90	else
91	91	{
r14976	r14977
94	94	}
95	95
96	96	program->install_read_bank(0xf800, 0xffff, "bank3");
97		memory_set_bank(machine(), "bank3", 0);
	97	membank("bank3")->set_entry(0);
98	98	break;
99	99
100	100	case EPROM_OFF:
r14976	r14977
103	103	program->install_write_bank(0x0000, 0xffff, "bank1");
104	104	program->install_read_bank(0x0000, 0xf7ff, "bank2");
105	105	program->install_read_bank(0xf800, 0xffff, "bank3");
106		memory_set_bank(machine(), "bank1", 1 + m_bank);
107		memory_set_bank(machine(), "bank2", 1 + m_bank);
108		memory_set_bank(machine(), "bank3", 1 + m_bank);
	106	membank("bank1")->set_entry(1 + m_bank);
	107	membank("bank2")->set_entry(1 + m_bank);
	108	membank("bank3")->set_entry(1 + m_bank);
109	109	}
110	110	else
111	111	{
r14976	r14977
536	536	{
537	537	int banks = m_ram->size() / 0x10000;
538	538	UINT8 *ram = m_ram->pointer();
539		UINT8 *rom = machine().region(Z80_TAG)->base();
	539	UINT8 *rom = memregion(Z80_TAG)->base();
540	540
541	541	/* setup memory banking */
542		memory_configure_bank(machine(), "bank1", 1, banks, ram, 0x10000);
543		memory_configure_bank(machine(), "bank2", 0, 1, rom, 0);
544		memory_configure_bank(machine(), "bank2", 1, banks, ram, 0x10000);
545		memory_configure_bank(machine(), "bank3", 0, 1, rom, 0);
546		memory_configure_bank(machine(), "bank3", 1, banks, ram + 0xf800, 0x10000);
	542	membank("bank1")->configure_entries(1, banks, ram, 0x10000);
	543	membank("bank2")->configure_entry(0, rom);
	544	membank("bank2")->configure_entries(1, banks, ram, 0x10000);
	545	membank("bank3")->configure_entry(0, rom);
	546	membank("bank3")->configure_entries(1, banks, ram + 0xf800, 0x10000);
547	547
548	548	/* register for state saving */
549	549	save_item(NAME(m_mode));

src/mess/drivers/palm.c

r14976	r14977
122	122	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
123	123	space->install_read_bank (0x000000, machine.device<ram_device>(RAM_TAG)->size() - 1, machine.device<ram_device>(RAM_TAG)->size() - 1, 0, "bank1");
124	124	space->install_write_bank(0x000000, machine.device<ram_device>(RAM_TAG)->size() - 1, machine.device<ram_device>(RAM_TAG)->size() - 1, 0, "bank1");
125		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	125	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
126	126
127	127	state->save_item(NAME(state->m_port_f_latch));
128	128	state->save_item(NAME(state->m_spim_data));
r14976	r14977
134	134	static MACHINE_RESET( palm )
135	135	{
136	136	// Copy boot ROM
137		UINT8* bios = machine.region("bios")->base();
	137	UINT8* bios = machine.root_device().memregion("bios")->base();
138	138	memset(machine.device<ram_device>(RAM_TAG)->pointer(), 0, machine.device<ram_device>(RAM_TAG)->size());
139	139	memcpy(machine.device<ram_device>(RAM_TAG)->pointer(), bios, 0x20000);
140	140

src/mess/drivers/fp1100.c

r14976	r14977
147	147	{
148	148	if(m_mem_bank == 0 && offset <= 0x8fff)
149	149	{
150		UINT8 *ipl = machine().region("ipl")->base();
	150	UINT8 *ipl = memregion("ipl")->base();
151	151	return ipl[offset];
152	152	}
153	153

src/mess/drivers/beehive.c

r14976	r14977
232	232
233	233	VIDEO_START_MEMBER( beehive_state )
234	234	{
235		m_p_chargen = machine().region("chargen")->base();
	235	m_p_chargen = memregion("chargen")->base();
236	236	}
237	237
238	238	/* This system appears to have inline attribute bytes of unknown meaning.

src/mess/drivers/vic20.c

r14976	r14977
785	785	void vic20_state::machine_start()
786	786	{
787	787	// find memory regions
788		m_basic = machine().region("basic")->base();
789		m_kernal = machine().region("kernal")->base();
790		m_charom = machine().region("charom")->base();
	788	m_basic = memregion("basic")->base();
	789	m_kernal = memregion("kernal")->base();
	790	m_charom = memregion("charom")->base();
791	791
792	792	// allocate memory
793	793	m_color_ram = auto_alloc_array(machine(), UINT8, 0x400);

src/mess/drivers/arcadia.c

r14976	r14977
453	453
454	454	static DEVICE_IMAGE_LOAD( arcadia_cart )
455	455	{
456		UINT8 *rom = image.device().machine().region("maincpu")->base();
	456	UINT8 *rom = image.device().machine().root_device().memregion("maincpu")->base();
457	457	int size;
458	458
459	459	memset(rom, 0, 0x8000);
r14976	r14977
461	461	{
462	462	size = image.length();
463	463
464		if (size > image.device().machine().region("maincpu")->bytes())
465		size = image.device().machine().region("maincpu")->bytes();
	464	if (size > image.device().machine().root_device().memregion("maincpu")->bytes())
	465	size = image.device().machine().root_device().memregion("maincpu")->bytes();
466	466
467	467	if (image.fread(rom, size) != size)
468	468	return IMAGE_INIT_FAIL;
r14976	r14977
733	733	static DRIVER_INIT( arcadia )
734	734	{
735	735	int i;
736		UINT8 *gfx=machine.region("gfx1")->base();
	736	UINT8 *gfx=machine.root_device().memregion("gfx1")->base();
737	737	for (i=0; i<256; i++) gfx[i]=i;
738	738	#if 0
739	739	// this is here to allow developement of some simple testroutines
740	740	// for a real console
741	741	{
742		UINT8 *rom=machine.region("maincpu")->base();
	742	UINT8 *rom=machine.root_device().memregion("maincpu")->base();
743	743	/* this is a simple routine to display all rom characters
744	744	on the display for a snapshot */
745	745	static const UINT8 prog[]={ // address 0 of course

src/mess/drivers/lcmate2.c

r14976	r14977
84	84
85	85	WRITE8_MEMBER( lcmate2_state::bankswitch_w )
86	86	{
87		memory_set_bank(machine(), "rombank", data&0x0f);
	87	membank("rombank")->set_entry(data&0x0f);
88	88	}
89	89
90	90	static ADDRESS_MAP_START(lcmate2_mem, AS_PROGRAM, 8, lcmate2_state)
r14976	r14977
199	199
200	200	void lcmate2_state::machine_start()
201	201	{
202		memory_configure_bank(machine(), "rombank", 0, 0x10, (UINT8*)machine().region("maincpu")->base(), 0x4000);
	202	membank("rombank")->configure_entries(0, 0x10, (UINT8*)machine().root_device().memregion("maincpu")->base(), 0x4000);
203	203	}
204	204
205	205	static const hd44780_interface lcmate2_display =

src/mess/drivers/smc777.c

r14976	r14977
95	95	smc777_state *state = screen.machine().driver_data<smc777_state>();
96	96	int x,y,yi;
97	97	UINT16 count;
98		UINT8 *vram = screen.machine().region("vram")->base();
99		UINT8 *attr = screen.machine().region("attr")->base();
100		UINT8 *gram = screen.machine().region("fbuf")->base();
	98	UINT8 *vram = screen.machine().root_device().memregion("vram")->base();
	99	UINT8 *attr = screen.machine().root_device().memregion("attr")->base();
	100	UINT8 *gram = state->memregion("fbuf")->base();
101	101	int x_width;
102	102
103	103	bitmap.fill(screen.machine().pens[state->m_backdrop_pen], cliprect);
r14976	r14977
181	181	{
182	182	for(xi=0;xi<8;xi++)
183	183	{
184		UINT8 *gfx_data = screen.machine().region("pcg")->base();
	184	UINT8 *gfx_data = screen.machine().root_device().memregion("pcg")->base();
185	185	int pen;
186	186
187	187	pen = ((gfx_data[tile*8+yi]>>(7-xi)) & 1) ? (color+state->m_pal_mode) : bk_pen;
r14976	r14977
246	246
247	247	READ8_MEMBER(smc777_state::smc777_vram_r)
248	248	{
249		UINT8 *vram = machine().region("vram")->base();
	249	UINT8 *vram = memregion("vram")->base();
250	250	UINT16 vram_index;
251	251
252	252	vram_index  = ((offset & 0x0007) << 8);
r14976	r14977
257	257
258	258	READ8_MEMBER(smc777_state::smc777_attr_r)
259	259	{
260		UINT8 *attr = machine().region("attr")->base();
	260	UINT8 *attr = memregion("attr")->base();
261	261	UINT16 vram_index;
262	262
263	263	vram_index  = ((offset & 0x0007) << 8);
r14976	r14977
268	268
269	269	READ8_MEMBER(smc777_state::smc777_pcg_r)
270	270	{
271		UINT8 *pcg = machine().region("pcg")->base();
	271	UINT8 *pcg = memregion("pcg")->base();
272	272	UINT16 vram_index;
273	273
274	274	vram_index  = ((offset & 0x0007) << 8);
r14976	r14977
279	279
280	280	WRITE8_MEMBER(smc777_state::smc777_vram_w)
281	281	{
282		UINT8 *vram = machine().region("vram")->base();
	282	UINT8 *vram = memregion("vram")->base();
283	283	UINT16 vram_index;
284	284
285	285	vram_index  = ((offset & 0x0007) << 8);
r14976	r14977
290	290
291	291	WRITE8_MEMBER(smc777_state::smc777_attr_w)
292	292	{
293		UINT8 *attr = machine().region("attr")->base();
	293	UINT8 *attr = memregion("attr")->base();
294	294	UINT16 vram_index;
295	295
296	296	vram_index  = ((offset & 0x0007) << 8);
r14976	r14977
301	301
302	302	WRITE8_MEMBER(smc777_state::smc777_pcg_w)
303	303	{
304		UINT8 *pcg = machine().region("pcg")->base();
	304	UINT8 *pcg = memregion("pcg")->base();
305	305	UINT16 vram_index;
306	306
307	307	vram_index  = ((offset & 0x0007) << 8);
r14976	r14977
314	314
315	315	READ8_MEMBER(smc777_state::smc777_fbuf_r)
316	316	{
317		UINT8 *fbuf = machine().region("fbuf")->base();
	317	UINT8 *fbuf = memregion("fbuf")->base();
318	318	UINT16 vram_index;
319	319
320	320	vram_index  = ((offset & 0x007f) << 8);
r14976	r14977
325	325
326	326	WRITE8_MEMBER(smc777_state::smc777_fbuf_w)
327	327	{
328		UINT8 *fbuf = machine().region("fbuf")->base();
	328	UINT8 *fbuf = memregion("fbuf")->base();
329	329	UINT16 vram_index;
330	330
331	331	vram_index  = ((offset & 0x00ff) << 8);
r14976	r14977
570	570
571	571	READ8_MEMBER(smc777_state::smc777_mem_r)
572	572	{
573		UINT8 *wram = machine().region("wram")->base();
574		UINT8 *bios = machine().region("bios")->base();
	573	UINT8 *wram = memregion("wram")->base();
	574	UINT8 *bios = memregion("bios")->base();
575	575	UINT8 z80_r;
576	576
577	577	if(m_raminh_prefetch != 0xff) //do the bankswitch AFTER that the prefetch instruction is executed (FIXME: this is an hackish implementation)
r14976	r14977
593	593
594	594	WRITE8_MEMBER(smc777_state::smc777_mem_w)
595	595	{
596		UINT8 *wram = machine().region("wram")->base();
	596	UINT8 *wram = memregion("wram")->base();
597	597
598	598	wram[offset] = data;
599	599	}

src/mess/drivers/bcs3.c

r14976	r14977
216	216
217	217	VIDEO_START_MEMBER( bcs3_state )
218	218	{
219		m_p_chargen = machine().region("chargen")->base();
	219	m_p_chargen = memregion("chargen")->base();
220	220	}
221	221
222	222	static SCREEN_UPDATE_IND16( bcs3 )

src/mess/drivers/scorpion.c

r14976	r14977
190	190
191	191	state->m_screen_location = messram + ((state->m_port_7ffd_data & 8) ? (7<<14) : (5<<14));
192	192
193		memory_set_bankptr(machine, "bank4", messram + (((state->m_port_7ffd_data & 0x07) | ((state->m_port_1ffd_data & 0x10)>>1)) * 0x4000));
	193	state->membank("bank4")->set_base(messram + (((state->m_port_7ffd_data & 0x07) | ((state->m_port_1ffd_data & 0x10)>>1)) * 0x4000));
194	194
195	195	if ((state->m_port_1ffd_data & 0x01)==0x01)
196	196	{
197	197	state->m_ram_0000 = messram+(8<<14);
198		memory_set_bankptr(machine, "bank1", messram+(8<<14));
	198	state->membank("bank1")->set_base(messram+(8<<14));
199	199	logerror("RAM\n");
200	200	}
201	201	else
r14976	r14977
208	208	{
209	209	state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ? 1 : 0;
210	210	}
211		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	211	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
212	212	}
213	213
214	214
r14976	r14977
243	243	state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ? 1 : 0;
244	244	betadisk_disable(beta);
245	245	state->m_ram_disabled_by_beta = 1;
246		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	246	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
247	247	}
248	248	}
249	249	else if (((pc & 0xff00) == 0x3d00) && (state->m_ROMSelection==1))
r14976	r14977
254	254	if(address<=0x3fff)
255	255	{
256	256	state->m_ram_disabled_by_beta = 1;
257		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
258		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	257	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	258	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
259	259	return ~0;
260	260	}
261	261	return address;
r14976	r14977
333	333	memset(messram,0,256*1024);
334	334
335	335	/* Bank 5 is always in 0x4000 - 0x7fff */
336		memory_set_bankptr(machine, "bank2", messram + (5<<14));
	336	state->membank("bank2")->set_base(messram + (5<<14));
337	337
338	338	/* Bank 2 is always in 0x8000 - 0xbfff */
339		memory_set_bankptr(machine, "bank3", messram + (2<<14));
	339	state->membank("bank3")->set_base(messram + (2<<14));
340	340
341	341	state->m_port_7ffd_data = 0;
342	342	state->m_port_1ffd_data = 0;

src/mess/drivers/abc80.c

r14976	r14977
350	350	}
351	351	else if (!(mmu & MMU_ROM))
352	352	{
353		data = machine().region(Z80_TAG)->base()[offset & 0x3fff];
	353	data = memregion(Z80_TAG)->base()[offset & 0x3fff];
354	354	}
355	355	else if (mmu & MMU_VRAMS)
356	356	{
r14976	r14977
664	664	void abc80_state::machine_start()
665	665	{
666	666	// find memory regions
667		m_mmu_rom = machine().region("mmu")->base();
	667	m_mmu_rom = memregion("mmu")->base();
668	668
669	669	// register for state saving
670	670	save_item(NAME(m_key_data));

src/mess/drivers/zexall.c

r14976	r14977
63	63	{
64	64	// rom is self-modifying, so need to refresh it on each run
65	65	zexall_state *state = machine.driver_data<zexall_state>();
66		UINT8 *rom = machine.region("romcode")->base();
	66	UINT8 *rom = state->memregion("romcode")->base();
67	67	UINT8 *ram = state->m_main_ram;
68	68	/* fill main ram with zexall code */
69	69	memcpy(ram, rom, 0x228a);

src/mess/drivers/spectrum.c

r14976	r14977
689	689	return IMAGE_INIT_FAIL;
690	690	}
691	691
692		if (image.fread(image.device().machine().region("maincpu")->base(), filesize) != filesize)
	692	if (image.fread(image.device().machine().root_device().memregion("maincpu")->base(), filesize) != filesize)
693	693	{
694	694	image.seterror(IMAGE_ERROR_UNSPECIFIED, "Error loading file");
695	695	return IMAGE_INIT_FAIL;
r14976	r14977
698	698	else
699	699	{
700	700	filesize = image.get_software_region_length("rom");
701		memcpy(image.device().machine().region("maincpu")->base(), image.get_software_region("rom"), filesize);
	701	memcpy(image.device().machine().root_device().memregion("maincpu")->base(), image.get_software_region("rom"), filesize);
702	702	}
703	703	return IMAGE_INIT_PASS;
704	704	}

src/mess/drivers/sg1000.c

r14976	r14977
663	663	case 40 * 1024:
664	664	program->install_read_bank(0x8000, 0x9fff, "bank1");
665	665	program->unmap_write(0x8000, 0x9fff);
666		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(Z80_TAG)->base() + 0x8000, 0);
667		memory_set_bank(machine(), "bank1", 0);
	666	membank("bank1")->configure_entry(0, memregion(Z80_TAG)->base() + 0x8000);
	667	membank("bank1")->set_entry(0);
668	668	break;
669	669
670	670	case 48 * 1024:
671	671	program->install_read_bank(0x8000, 0xbfff, "bank1");
672	672	program->unmap_write(0x8000, 0xbfff);
673		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(Z80_TAG)->base() + 0x8000, 0);
674		memory_set_bank(machine(), "bank1", 0);
	673	membank("bank1")->configure_entry(0, memregion(Z80_TAG)->base() + 0x8000);
	674	membank("bank1")->set_entry(0);
675	675	break;
676	676
677	677	default:
r14976	r14977
699	699	running_machine &machine = image.device().machine();
700	700	sg1000_state *state = machine.driver_data<sg1000_state>();
701	701	address_space *program = machine.device(Z80_TAG)->memory().space(AS_PROGRAM);
702		UINT8 *ptr = machine.region(Z80_TAG)->base();
	702	UINT8 *ptr = state->memregion(Z80_TAG)->base();
703	703	UINT32 ram_size = 0x400;
704	704	bool install_2000_ram = false;
705	705	UINT32 size;
r14976	r14977
813	813	running_machine &machine = image.device().machine();
814	814	sg1000_state *state = machine.driver_data<sg1000_state>();
815	815	UINT32 size;
816		UINT8 *ptr = machine.region(Z80_TAG)->base();
	816	UINT8 *ptr = state->memregion(Z80_TAG)->base();
817	817
818	818	if (image.software_entry() == NULL)
819	819	{
r14976	r14977
869	869	{
870	870	running_machine &machine = image.device().machine();
871	871	sc3000_state *state = machine.driver_data<sc3000_state>();
872		UINT8 *ptr = machine.region(Z80_TAG)->base();
	872	UINT8 *ptr = state->memregion(Z80_TAG)->base();
873	873	UINT32 size;
874	874
875	875	if (image.software_entry() == NULL)
r14976	r14977
947	947	}
948	948
949	949	/* ROM selection */
950		memory_set_bank(machine(), "bank1", BIT(data, 6));
	950	membank("bank1")->set_entry(BIT(data, 6));
951	951
952	952	/* printer strobe */
953	953	m_centronics->strobe_w(BIT(data, 7));
r14976	r14977
1032	1032
1033	1033	static TIMER_CALLBACK( lightgun_tick )
1034	1034	{
1035		UINT8 *rom = machine.region(Z80_TAG)->base();
	1035	UINT8 *rom = machine.root_device().memregion(Z80_TAG)->base();
1036	1036
1037	1037	if (IS_CARTRIDGE_TV_DRAW(rom))
1038	1038	{
r14976	r14977
1081	1081	void sf7000_state::machine_start()
1082	1082	{
1083	1083	/* configure memory banking */
1084		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(Z80_TAG)->base(), 0);
1085		memory_configure_bank(machine(), "bank1", 1, 1, m_ram->pointer(), 0);
1086		memory_configure_bank(machine(), "bank2", 0, 1, m_ram->pointer(), 0);
	1084	membank("bank1")->configure_entry(0, memregion(Z80_TAG)->base());
	1085	membank("bank1")->configure_entry(1, m_ram->pointer());
	1086	membank("bank2")->configure_entry(0, m_ram->pointer());
1087	1087
1088	1088	/* register for state saving */
1089	1089	save_item(NAME(m_keylatch));
r14976	r14977
1097	1097
1098	1098	void sf7000_state::machine_reset()
1099	1099	{
1100		memory_set_bank(machine(), "bank1", 0);
1101		memory_set_bank(machine(), "bank2", 0);
	1100	membank("bank1")->set_entry(0);
	1101	membank("bank2")->set_entry(0);
1102	1102	}
1103	1103
1104	1104	/***************************************************************************

src/mess/drivers/tx0.c

r14976	r14977
70	70	};
71	71
72	72	/* set up our font */
73		dst = machine.region("gfx1")->base();
	73	dst = machine.root_device().memregion("gfx1")->base();
74	74
75	75	memcpy(dst, fontdata6x8, tx0_fontdata_size);
76	76	}

src/mess/drivers/ip22.c

r14976	r14977
895	895	data ^= 0xffffffff;
896	896	}
897	897
898		// if banks 0 or 1 have 2 subbanks, also kill it, we only want 128 MB
	898	// if banks 0 or 1 have 2 membanks, also kill it, we only want 128 MB
899	899	if (sgi_mc_r(&space, 0xc0/4, 0xffffffff) & 0x40004000)
900	900	{
901	901	// a random perturbation so the memory test fails
r14976	r14977
1226	1226	machine.scheduler().timer_set(attotime::from_msec(1), FUNC(ip22_timer));
1227	1227
1228	1228	// set up low RAM mirror
1229		memory_set_bankptr(machine, "bank1", state->m_mainram);
	1229	state->membank("bank1")->set_base(state->m_mainram);
1230	1230
1231	1231	state->m_PBUS_DMA.nActive = 0;
1232	1232

src/mess/drivers/px8.c

r14976	r14977
77	77	{
78	78	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
79	79	UINT8 *ram = m_ram->pointer();
80		UINT8 *ipl_rom = machine().region(UPD70008_TAG)->base();
	80	UINT8 *ipl_rom = memregion(UPD70008_TAG)->base();
81	81
82	82	if (!m_bank0)
83	83	{

src/mess/drivers/phc25.c

r14976	r14977
322	322	void phc25_state::video_start()
323	323	{
324	324	/* find memory regions */
325		m_char_rom = machine().region(Z80_TAG)->base() + 0x5000;
	325	m_char_rom = memregion(Z80_TAG)->base() + 0x5000;
326	326	}
327	327
328	328	/* AY-3-8910 Interface */

src/mess/drivers/mikromik.c

r14976	r14977
131	131	}
132	132	else if (!(mmu & MMU_CE0))
133	133	{
134		data = machine().region(I8085A_TAG)->base()[offset & 0x1fff];
	134	data = memregion(I8085A_TAG)->base()[offset & 0x1fff];
135	135	}
136	136	else if (!(mmu & MMU_CE1))
137	137	{
138		data = machine().region(I8085A_TAG)->base()[0x2000 + (offset & 0x1fff)];
	138	data = memregion(I8085A_TAG)->base()[0x2000 + (offset & 0x1fff)];
139	139	}
140	140	}
141	141
r14976	r14977
735	735	void mm1_state::machine_start()
736	736	{
737	737	// find memory regions
738		m_mmu_rom = machine().region("address")->base();
739		m_key_rom = machine().region("keyboard")->base();
	738	m_mmu_rom = memregion("address")->base();
	739	m_key_rom = memregion("keyboard")->base();
740	740
741	741	// register for state saving
742	742	save_item(NAME(m_sense));

src/mess/drivers/spec128.c

r14976	r14977
213	213	ram_page = state->m_port_7ffd_data & 0x07;
214	214	ram_data = messram + (ram_page<<14);
215	215
216		memory_set_bankptr(machine, "bank4", ram_data);
	216	state->membank("bank4")->set_base(ram_data);
217	217	}
218	218
219	219	/* ROM switching */
r14976	r14977
221	221
222	222	/* rom 0 is 128K rom, rom 1 is 48 BASIC */
223	223
224		ChosenROM = machine.region("maincpu")->base() + 0x010000 + (ROMSelection<<14);
	224	ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000 + (ROMSelection<<14);
225	225
226		memory_set_bankptr(machine, "bank1", ChosenROM);
	226	state->membank("bank1")->set_base(ChosenROM);
227	227	}
228	228
229	229	static  READ8_HANDLER ( spectrum_128_ula_r )
r14976	r14977
261	261	/* 0x0000-0x3fff always holds ROM */
262	262
263	263	/* Bank 5 is always in 0x4000 - 0x7fff */
264		memory_set_bankptr(machine, "bank2", messram + (5<<14));
	264	state->membank("bank2")->set_base(messram + (5<<14));
265	265
266	266	/* Bank 2 is always in 0x8000 - 0xbfff */
267		memory_set_bankptr(machine, "bank3", messram + (2<<14));
	267	state->membank("bank3")->set_base(messram + (2<<14));
268	268
269	269	MACHINE_RESET_CALL(spectrum);
270	270

src/mess/drivers/phunsy.c

r14976	r14977
76	76	switch( m_u_bank )
77	77	{
78	78	case 0x00:   /* RAM */
79		memory_set_bankptr( machine(), "bank1", m_ram_1800 );
	79	membank( "bank1" )->set_base( m_ram_1800 );
80	80	break;
81	81	case 0x01:   /* MDCR program */
82	82	case 0x02:   /* Disassembler */
83	83	case 0x03:   /* Label handler */
84		memory_set_bankptr( machine(), "bank1", machine().region("maincpu")->base() + ( 0x800 * m_u_bank ) );
	84	membank( "bank1" )->set_base( memregion("maincpu")->base() + ( 0x800 * m_u_bank ) );
85	85	break;
86	86	default:   /* Not used */
87	87	break;
88	88	}
89	89
90		memory_set_bankptr( machine(), "bank2", machine().region("ram_4000")->base() + 0x4000 * m_q_bank );
	90	membank( "bank2" )->set_base( memregion("ram_4000")->base() + 0x4000 * m_q_bank );
91	91	}
92	92
93	93
r14976	r14977
182	182
183	183	MACHINE_RESET_MEMBER(phunsy_state)
184	184	{
185		memory_set_bankptr( machine(), "bank1", m_ram_1800 );
186		memory_set_bankptr( machine(), "bank2", machine().region("ram_4000")->base() );
	185	membank( "bank1" )->set_base( m_ram_1800 );
	186	membank( "bank2" )->set_base( memregion("ram_4000")->base() );
187	187
188	188	m_u_bank = 0;
189	189	m_q_bank = 0;
r14976	r14977
204	204
205	205	VIDEO_START_MEMBER( phunsy_state )
206	206	{
207		m_p_chargen = machine().region( "chargen" )->base();
	207	m_p_chargen = memregion( "chargen" )->base();
208	208	}
209	209
210	210

src/mess/drivers/a2600.c

r14976	r14977
115	115
116	116
117	117
118		#define CART machine.region("user1")->base()
	118	#define CART machine.root_device().memregion("user1")->base()
119	119
120	120	#define MASTER_CLOCK_NTSC   3579545
121	121	#define MASTER_CLOCK_PAL   3546894
r14976	r14977
579	579	{
580	580	a2600_state *state = machine.driver_data<a2600_state>();
581	581	state->m_bank_base[1] = CART + 0x1000 * offset;
582		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	582	state->membank("bank1")->set_base(state->m_bank_base[1]);
583	583	}
584	584	static void modeFA_switch(running_machine &machine, UINT16 offset, UINT8 data)
585	585	{
586	586	a2600_state *state = machine.driver_data<a2600_state>();
587	587	state->m_bank_base[1] = CART + 0x1000 * offset;
588		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	588	state->membank("bank1")->set_base(state->m_bank_base[1]);
589	589	}
590	590	static void modeF6_switch(running_machine &machine, UINT16 offset, UINT8 data)
591	591	{
592	592	a2600_state *state = machine.driver_data<a2600_state>();
593	593	state->m_bank_base[1] = CART + 0x1000 * offset;
594		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	594	state->membank("bank1")->set_base(state->m_bank_base[1]);
595	595	}
596	596	static void modeF4_switch(running_machine &machine, UINT16 offset, UINT8 data)
597	597	{
598	598	a2600_state *state = machine.driver_data<a2600_state>();
599	599	state->m_bank_base[1] = CART + 0x1000 * offset;
600		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	600	state->membank("bank1")->set_base(state->m_bank_base[1]);
601	601	}
602	602	static void mode3F_switch(running_machine &machine, UINT16 offset, UINT8 data)
603	603	{
604	604	a2600_state *state = machine.driver_data<a2600_state>();
605	605	state->m_bank_base[1] = CART + 0x800 * (data & (state->m_number_banks - 1));
606		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	606	state->membank("bank1")->set_base(state->m_bank_base[1]);
607	607	}
608	608	static void modeUA_switch(running_machine &machine, UINT16 offset, UINT8 data)
609	609	{
610	610	a2600_state *state = machine.driver_data<a2600_state>();
611	611	state->m_bank_base[1] = CART + (offset >> 6) * 0x1000;
612		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	612	state->membank("bank1")->set_base(state->m_bank_base[1]);
613	613	}
614	614	static void modeE0_switch(running_machine &machine, UINT16 offset, UINT8 data)
615	615	{
r14976	r14977
618	618	char bank_name[10];
619	619	sprintf(bank_name,"bank%d",bank);
620	620	state->m_bank_base[bank] = CART + 0x400 * (offset & 7);
621		memory_set_bankptr(machine,bank_name, state->m_bank_base[bank]);
	621	state->membank(bank_name)->set_base(state->m_bank_base[bank]);
622	622	}
623	623	static void modeE7_switch(running_machine &machine, UINT16 offset, UINT8 data)
624	624	{
625	625	a2600_state *state = machine.driver_data<a2600_state>();
626	626	state->m_bank_base[1] = CART + 0x800 * offset;
627		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	627	state->membank("bank1")->set_base(state->m_bank_base[1]);
628	628	}
629	629	static void modeE7_RAM_switch(running_machine &machine, UINT16 offset, UINT8 data)
630	630	{
631	631	a2600_state *state = machine.driver_data<a2600_state>();
632		memory_set_bankptr(machine,"bank9", state->m_extra_RAM->base() + (4 + offset) * 256 );
	632	state->membank("bank9")->set_base(state->m_extra_RAM->base() + (4 + offset) * 256 );
633	633	}
634	634	static void modeDC_switch(running_machine &machine, UINT16 offset, UINT8 data)
635	635	{
636	636	a2600_state *state = machine.driver_data<a2600_state>();
637	637	state->m_bank_base[1] = CART + 0x1000 * next_bank(state);
638		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	638	state->membank("bank1")->set_base(state->m_bank_base[1]);
639	639	}
640	640	static void mode3E_switch(running_machine &machine, UINT16 offset, UINT8 data)
641	641	{
642	642	a2600_state *state = machine.driver_data<a2600_state>();
643	643	state->m_bank_base[1] = CART + 0x800 * (data & (state->m_number_banks - 1));
644		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	644	state->membank("bank1")->set_base(state->m_bank_base[1]);
645	645	state->m_mode3E_ram_enabled = 0;
646	646	}
647	647	static void mode3E_RAM_switch(running_machine &machine, UINT16 offset, UINT8 data)
648	648	{
649	649	a2600_state *state = machine.driver_data<a2600_state>();
650	650	state->m_ram_base = state->m_extra_RAM->base() + 0x200 * ( data & 0x3F );
651		memory_set_bankptr(machine,"bank1", state->m_ram_base );
	651	state->membank("bank1")->set_base(state->m_ram_base );
652	652	state->m_mode3E_ram_enabled = 1;
653	653	}
654	654	static void modeFV_switch(running_machine &machine, UINT16 offset, UINT8 data)
r14976	r14977
660	660	state->m_FVlocked = 1;
661	661	state->m_current_bank = state->m_current_bank ^ 0x01;
662	662	state->m_bank_base[1] = CART + 0x1000 * state->m_current_bank;
663		memory_set_bankptr(machine,"bank1", state->m_bank_base[1]);
	663	state->membank("bank1")->set_base(state->m_bank_base[1]);
664	664	}
665	665	}
666	666	static void modeJVP_switch(running_machine &machine, UINT16 offset, UINT8 data)
r14976	r14977
677	677	break;
678	678	}
679	679	state->m_bank_base[1] = CART + 0x1000 * state->m_current_bank;
680		memory_set_bankptr(machine, "bank1", state->m_bank_base[1] );
	680	state->membank("bank1")->set_base(state->m_bank_base[1] );
681	681	}
682	682
683	683
r14976	r14977
816	816	{
817	817	case 0x00:
818	818	m_bank_base[1] = m_extra_RAM->base() + 2 * 0x800;
819		m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? machine().region("maincpu")->base() + 0x1800 : machine().region("user1")->base();
	819	m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? memregion("maincpu")->base() + 0x1800 : memregion("user1")->base();
820	820	m_modeSS_high_ram_enabled = 0;
821	821	break;
822	822	case 0x04:
823	823	m_bank_base[1] = m_extra_RAM->base();
824		m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? machine().region("maincpu")->base() + 0x1800 : machine().region("user1")->base();
	824	m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? memregion("maincpu")->base() + 0x1800 : memregion("user1")->base();
825	825	m_modeSS_high_ram_enabled = 0;
826	826	break;
827	827	case 0x08:
r14976	r14977
836	836	break;
837	837	case 0x10:
838	838	m_bank_base[1] = m_extra_RAM->base() + 2 * 0x800;
839		m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? machine().region("maincpu")->base() + 0x1800 : machine().region("user1")->base();
	839	m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? memregion("maincpu")->base() + 0x1800 : memregion("user1")->base();
840	840	m_modeSS_high_ram_enabled = 0;
841	841	break;
842	842	case 0x14:
843	843	m_bank_base[1] = m_extra_RAM->base() + 0x800;
844		m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? machine().region("maincpu")->base() + 0x1800 : machine().region("user1")->base();
	844	m_bank_base[2] = ( m_modeSS_byte & 0x01 ) ? memregion("maincpu")->base() + 0x1800 : memregion("user1")->base();
845	845	m_modeSS_high_ram_enabled = 0;
846	846	break;
847	847	case 0x18:
r14976	r14977
855	855	m_modeSS_high_ram_enabled = 1;
856	856	break;
857	857	}
858		memory_set_bankptr(machine(), "bank1", m_bank_base[1] );
859		memory_set_bankptr(machine(), "bank2", m_bank_base[2] );
	858	membank("bank1")->set_base(m_bank_base[1] );
	859	membank("bank2")->set_base(m_bank_base[2] );
860	860	}
861	861	else if ( offset == 0xFF9 )
862	862	{
r14976	r14977
1015	1015	}
1016	1016	else
1017	1017	{
1018		UINT8   display_data = machine().region("user1")->base()[0x2000 + ( ~ ( ( m_dpc.df[data_fetcher].low | ( m_dpc.df[data_fetcher].high << 8 ) ) ) & 0x7FF ) ];
	1018	UINT8   display_data = memregion("user1")->base()[0x2000 + ( ~ ( ( m_dpc.df[data_fetcher].low | ( m_dpc.df[data_fetcher].high << 8 ) ) ) & 0x7FF ) ];
1019	1019
1020	1020	switch( offset & 0x38 )
1021	1021	{
r14976	r14977
1122	1122	/* Still cheating a bit here by looking bit 13 of the address..., but the high byte of the
1123	1123	cpu should be the last byte that was on the data bus and so should determine the bank
1124	1124	we should switch in. */
1125		m_bank_base[1] = machine().region("user1")->base() + 0x1000 * ( ( address & 0x2000 ) ? 0 : 1 );
1126		memory_set_bankptr(machine(), "bank1", m_bank_base[1] );
	1125	m_bank_base[1] = memregion("user1")->base() + 0x1000 * ( ( address & 0x2000 ) ? 0 : 1 );
	1126	membank("bank1")->set_base(m_bank_base[1] );
1127	1127	/* and restore old opbase handler */
1128	1128	machine().device("maincpu")->memory().space(AS_PROGRAM)->set_direct_update_handler(m_FE_old_opbase_handler);
1129	1129	}
r14976	r14977
1291	1291	0x1000 + (i + 1) * 0x1000 / count - 1, handler[i]);
1292	1292
1293	1293	state->m_bank_base[i + 1] = cart + init;
1294		memory_set_bankptr(machine,handler[i], state->m_bank_base[i + 1]);
	1294	state->membank(handler[i])->set_base(state->m_bank_base[i + 1]);
1295	1295	}
1296	1296	}
1297	1297
r14976	r14977
1584	1584	a2600_state *state = machine.driver_data<a2600_state>();
1585	1585	screen_device *screen = machine.first_screen();
1586	1586	state->m_current_screen_height = screen->height();
1587		state->m_extra_RAM = machine.region_alloc("user2", 0x8600, 1, ENDIANNESS_LITTLE);
	1587	state->m_extra_RAM = machine.memory().region_alloc("user2", 0x8600, 1, ENDIANNESS_LITTLE);
1588	1588	memset( state->m_riot_ram, 0x00, 0x80 );
1589	1589	state->m_current_reset_bank_counter = 0xFF;
1590	1590	state->m_dpc.oscillator = machine.scheduler().timer_alloc(FUNC(modeDPC_timer_callback));
r14976	r14977
1956	1956	space->install_write_handler(0x1fe8, 0x1feb, write8_delegate(FUNC(a2600_state::modeE7_RAM_switch_w),state));
1957	1957	space->install_read_handler(0x1fe8, 0x1feb, read8_delegate(FUNC(a2600_state::modeE7_RAM_switch_r),state));
1958	1958	space->install_readwrite_bank(0x1800, 0x18ff, "bank9");
1959		memory_set_bankptr(machine, "bank9", state->m_extra_RAM->base() + 4 * 256 );
	1959	state->membank("bank9")->set_base(state->m_extra_RAM->base() + 4 * 256 );
1960	1960	break;
1961	1961
1962	1962	case modeDC:
r14976	r14977
1979	1979	space->install_read_handler(0x1000, 0x1fff, read8_delegate(FUNC(a2600_state::modeSS_r),state));
1980	1980	state->m_bank_base[1] = state->m_extra_RAM->base() + 2 * 0x800;
1981	1981	state->m_bank_base[2] = CART;
1982		memory_set_bankptr(machine, "bank1", state->m_bank_base[1] );
1983		memory_set_bankptr(machine, "bank2", state->m_bank_base[2] );
	1982	state->membank("bank1")->set_base(state->m_bank_base[1] );
	1983	state->membank("bank2")->set_base(state->m_bank_base[2] );
1984	1984	state->m_modeSS_write_enabled = 0;
1985	1985	state->m_modeSS_byte_started = 0;
1986	1986	space->set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeSS_opbase), state));
r14976	r14977
2012	2012	break;
2013	2013
2014	2014	case mode32in1:
2015		memory_set_bankptr(machine, "bank1", CART + state->m_current_reset_bank_counter * 0x800 );
2016		memory_set_bankptr(machine, "bank2", CART + state->m_current_reset_bank_counter * 0x800 );
	2015	state->membank("bank1")->set_base(CART + state->m_current_reset_bank_counter * 0x800 );
	2016	state->membank("bank2")->set_base(CART + state->m_current_reset_bank_counter * 0x800 );
2017	2017	break;
2018	2018
2019	2019	case modeJVP:
r14976	r14977
2029	2029	space->install_write_bank(0x1000, 0x10ff, "bank9");
2030	2030	space->install_read_bank(0x1100, 0x11ff, "bank9");
2031	2031
2032		memory_set_bankptr(machine,"bank9", state->m_extra_RAM->base());
	2032	state->membank("bank9")->set_base(state->m_extra_RAM->base());
2033	2033	}
2034	2034
2035	2035	if (state->m_banking_mode == modeCV)
r14976	r14977
2037	2037	space->install_write_bank(0x1400, 0x17ff, "bank9");
2038	2038	space->install_read_bank(0x1000, 0x13ff, "bank9");
2039	2039
2040		memory_set_bankptr(machine,"bank9", state->m_extra_RAM->base());
	2040	state->membank("bank9")->set_base(state->m_extra_RAM->base());
2041	2041	}
2042	2042
2043	2043	if (chip)
r14976	r14977
2045	2045	space->install_write_bank(0x1000, 0x107f, "bank9");
2046	2046	space->install_read_bank(0x1080, 0x10ff, "bank9");
2047	2047
2048		memory_set_bankptr(machine,"bank9", state->m_extra_RAM->base());
	2048	state->membank("bank9")->set_base(state->m_extra_RAM->base());
2049	2049	}
2050	2050
2051	2051	/* Banks may have changed, reset the cpu so it uses the correct reset vector */

src/mess/drivers/pcw.c

r14976	r14977
253	253	space->install_read_bank(block * 0x04000 + 0x0000, block * 0x04000 + 0x3fff,block_name);
254	254	//      LOG(("MEM: read block %i -> bank %i\n",block,bank));
255	255	}
256		memory_set_bankptr(machine, block_name, machine.device<ram_device>(RAM_TAG)->pointer() + ((bank * 0x4000) % machine.device<ram_device>(RAM_TAG)->size()));
	256	state->membank(block_name)->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + ((bank * 0x4000) % machine.device<ram_device>(RAM_TAG)->size()));
257	257	}
258	258
259	259
260	260
261	261	static void pcw_update_write_memory_block(running_machine &machine, int block, int bank)
262	262	{
	263	pcw_state *state = machine.driver_data<pcw_state>();
263	264	char block_name[10];
264	265
265	266	sprintf(block_name,"bank%d",block+5);
266		memory_set_bankptr(machine, block_name, machine.device<ram_device>(RAM_TAG)->pointer() + ((bank * 0x4000) % machine.device<ram_device>(RAM_TAG)->size()));
	267	state->membank(block_name)->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + ((bank * 0x4000) % machine.device<ram_device>(RAM_TAG)->size()));
267	268	//  LOG(("MEM: write block %i -> bank %i\n",block,bank));
268	269	}
269	270
r14976	r14977
343	344	{
344	345	unsigned char *FakeROM;
345	346
346		FakeROM = &machine.region("maincpu")->base()[0x010000];
	347	FakeROM = &machine.root_device().memregion("maincpu")->base()[0x010000];
347	348
348		memory_set_bankptr(machine, "bank1", FakeROM);
	349	state->membank("bank1")->set_base(FakeROM);
349	350	}*/
350	351	}
351	352
r14976	r14977
1050	1051	static MACHINE_RESET( pcw )
1051	1052	{
1052	1053	pcw_state *state = machine.driver_data<pcw_state>();
1053		UINT8* code = machine.region("printer_mcu")->base();
	1054	UINT8* code = state->memregion("printer_mcu")->base();
1054	1055	int x;
1055	1056	/* ram paging is actually undefined at power-on */
1056	1057

src/mess/drivers/studio2.c

r14976	r14977
437	437	// WARNING: list code currently assume that cart mapping starts at 0x400.
438	438	// the five dumps currently available work like this, but the .st2 format
439	439	// allows for more freedom... how was the content of a real cart mapped?
440		UINT8 *ptr = ((UINT8 *) image.device().machine().region(CDP1802_TAG)->base()) + 0x400;
	440	UINT8 *ptr = ((UINT8 *) image.device().machine().root_device().memregion(CDP1802_TAG)->base()) + 0x400;
441	441	memcpy(ptr, image.get_software_region("rom"), image.get_software_region_length("rom"));
442	442	return IMAGE_INIT_PASS;
443	443	}

src/mess/drivers/osi.c

r14976	r14977
640	640	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
641	641
642	642	/* configure RAM banking */
643		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(M6502_TAG)->base(), 0);
644		memory_set_bank(machine(), "bank1", 0);
	643	membank("bank1")->configure_entry(0, memregion(M6502_TAG)->base());
	644	membank("bank1")->set_entry(0);
645	645
646	646	switch (m_ram->size())
647	647	{
r14976	r14977
665	665	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
666	666
667	667	/* configure RAM banking */
668		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(M6502_TAG)->base(), 0);
669		memory_set_bank(machine(), "bank1", 0);
	668	membank("bank1")->configure_entry(0, memregion(M6502_TAG)->base());
	669	membank("bank1")->set_entry(0);
670	670
671	671	switch (m_ram->size())
672	672	{

src/mess/drivers/mekd2.c

r14976	r14977
299	299	static const char magic[] = "MEK6800D2";
300	300	char buff[9];
301	301	UINT16 addr, size;
302		UINT8 ident, *RAM = image.device().machine().region("maincpu")->base();
	302	UINT8 ident, *RAM = image.device().machine().root_device().memregion("maincpu")->base();
303	303
304	304	image.fread( buff, sizeof (buff));
305	305	if (memcmp(buff, magic, sizeof (buff)))

src/mess/drivers/rt1715.c

r14976	r14977
109	109
110	110	static MACHINE_START( rt1715 )
111	111	{
112		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x0800);
113		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer());
	112	rt1715_state *state = machine.driver_data<rt1715_state>();
	113	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x0800);
	114	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
114	115	}
115	116
116	117	static MACHINE_RESET( rt1715 )
117	118	{
	119	rt1715_state *state = machine.driver_data<rt1715_state>();
118	120	/* on reset, enable ROM */
119		memory_set_bankptr(machine, "bank1", machine.region("ipl")->base());
	121	state->membank("bank1")->set_base(state->memregion("ipl")->base());
120	122	}
121	123
122	124	WRITE8_MEMBER(rt1715_state::rt1715_rom_disable)
r14976	r14977
124	126	logerror("%s: rt1715_set_bank %02x\n", machine().describe_context(), data);
125	127
126	128	/* disable ROM, enable RAM */
127		memory_set_bankptr(machine(), "bank1", machine().device<ram_device>(RAM_TAG)->pointer());
	129	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
128	130	}
129	131
130	132	/***************************************************************************

src/mess/drivers/dual68.c

r14976	r14977
63	63	static MACHINE_RESET(dual68)
64	64	{
65	65	dual68_state *state = machine.driver_data<dual68_state>();
66		UINT8* user1 = machine.region("user1")->base();
	66	UINT8* user1 = state->memregion("user1")->base();
67	67
68	68	memcpy((UINT8*)state->m_p_ram.target(),user1,0x2000);
69	69

src/mess/drivers/rex6000.c

r14976	r14977
450	450	m_flash[3] = machine().device<fujitsu_29dl16x_device>("flash1b");
451	451
452	452	m_ram_base = m_ram->pointer();
453		memory_set_bankptr(machine(), "ram", m_ram_base + 0x4000);
	453	membank("ram")->set_base(m_ram_base + 0x4000);
454	454	}
455	455	void rex6000_state::machine_reset()
456	456	{

src/mess/drivers/mirage.c

r14976	r14977
78	78	void mirage_state::machine_reset()
79	79	{
80	80	last_sndram_bank = 0;
81		memory_set_bankptr(machine(), "sndbank", machine().region("es5503")->base() );
	81	membank("sndbank")->set_base(machine().root_device().memregion("es5503")->base() );
82	82	}
83	83
84	84	static ADDRESS_MAP_START( mirage_map, AS_PROGRAM, 8, mirage_state )
r14976	r14977
112	112	static WRITE8_DEVICE_HANDLER( mirage_via_write_portb )
113	113	{
114	114	int bank = 0;
115		mirage_state *mirage = device->machine().driver_data<mirage_state>();
	115	mirage_state *state = device->machine().driver_data<mirage_state>();
116	116
117	117	// handle sound RAM bank switching
118	118	bank = (data & 2) ? (64*1024) : 0;
119	119	bank += (data & 1) ? (32*1024) : 0;
120		if (bank != mirage->last_sndram_bank)
	120	if (bank != state->last_sndram_bank)
121	121	{
122		mirage->last_sndram_bank = bank;
123		memory_set_bankptr(device->machine(), "sndbank", device->machine().region("es5503")->base() + bank);
	122	state->last_sndram_bank = bank;
	123	state->membank("sndbank")->set_base(device->machine().root_device().memregion("es5503")->base() + bank);
124	124	}
125	125	}
126	126

src/mess/drivers/v1050.c

r14976	r14977
130	130	if (BIT(m_bank, 0))
131	131	{
132	132	program->install_readwrite_bank(0x0000, 0x1fff, "bank1");
133		memory_set_bank(machine(), "bank1", bank);
	133	membank("bank1")->set_entry(bank);
134	134	}
135	135	else
136	136	{
137	137	program->install_read_bank(0x0000, 0x1fff, "bank1");
138	138	program->unmap_write(0x0000, 0x1fff);
139		memory_set_bank(machine(), "bank1", 3);
	139	membank("bank1")->set_entry(3);
140	140	}
141	141
142		memory_set_bank(machine(), "bank2", bank);
	142	membank("bank2")->set_entry(bank);
143	143
144	144	if (bank == 2)
145	145	{
r14976	r14977
149	149	{
150	150	program->install_readwrite_bank(0x4000, 0x7fff, "bank3");
151	151	program->install_readwrite_bank(0x8000, 0xbfff, "bank4");
152		memory_set_bank(machine(), "bank3", bank);
153		memory_set_bank(machine(), "bank4", bank);
	152	membank("bank3")->set_entry(bank);
	153	membank("bank4")->set_entry(bank);
154	154	}
155	155
156		memory_set_bank(machine(), "bank5", bank);
	156	membank("bank5")->set_entry(bank);
157	157	}
158	158
159	159	// Keyboard HACK
r14976	r14977
1044	1044	// setup memory banking
1045	1045	UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
1046	1046
1047		memory_configure_bank(machine(), "bank1", 0, 2, ram, 0x10000);
1048		memory_configure_bank(machine(), "bank1", 2, 1, ram + 0x1c000, 0);
1049		memory_configure_bank(machine(), "bank1", 3, 1, machine().region(Z80_TAG)->base(), 0);
	1047	membank("bank1")->configure_entries(0, 2, ram, 0x10000);
	1048	membank("bank1")->configure_entry(2, ram + 0x1c000);
	1049	membank("bank1")->configure_entry(3, memregion(Z80_TAG)->base());
1050	1050
1051	1051	program->install_readwrite_bank(0x2000, 0x3fff, "bank2");
1052		memory_configure_bank(machine(), "bank2", 0, 2, ram + 0x2000, 0x10000);
1053		memory_configure_bank(machine(), "bank2", 2, 1, ram + 0x1e000, 0);
	1052	membank("bank2")->configure_entries(0, 2, ram + 0x2000, 0x10000);
	1053	membank("bank2")->configure_entry(2, ram + 0x1e000);
1054	1054
1055	1055	program->install_readwrite_bank(0x4000, 0x7fff, "bank3");
1056		memory_configure_bank(machine(), "bank3", 0, 2, ram + 0x4000, 0x10000);
	1056	membank("bank3")->configure_entries(0, 2, ram + 0x4000, 0x10000);
1057	1057
1058	1058	program->install_readwrite_bank(0x8000, 0xbfff, "bank4");
1059		memory_configure_bank(machine(), "bank4", 0, 2, ram + 0x8000, 0x10000);
	1059	membank("bank4")->configure_entries(0, 2, ram + 0x8000, 0x10000);
1060	1060
1061	1061	program->install_readwrite_bank(0xc000, 0xffff, "bank5");
1062		memory_configure_bank(machine(), "bank5", 0, 3, ram + 0xc000, 0);
	1062	membank("bank5")->configure_entries(0, 3, ram + 0xc000, 0);
1063	1063
1064	1064	bankswitch();
1065	1065

src/mess/drivers/ql.c

r14976	r14977
309	309	space.unmap_readwrite(0x0c0000, 0x0fffff);
310	310
311	311	// Setup trumcard rom mapped to rom so unlink us
312		space.install_rom(0x010000, 0x018000, &machine().region(M68008_TAG)->base()[TRUMP_ROM_BASE]);
	312	space.install_rom(0x010000, 0x018000, &machine().root_device().memregion(M68008_TAG)->base()[TRUMP_ROM_BASE]);
313	313
314		return machine().region(M68008_TAG)->base()[TRUMP_ROM_BASE+offset];
	314	return memregion(M68008_TAG)->base()[TRUMP_ROM_BASE+offset];
315	315	}
316	316
317	317	READ8_MEMBER( ql_state::cart_rom_r )
318	318	{
319	319	// Setup trumcard rom mapped in at $c0000
320		space.install_rom(0x0c0000, 0x0c8000, &machine().region(M68008_TAG)->base()[TRUMP_ROM_BASE]);
	320	space.install_rom(0x0c0000, 0x0c8000, &machine().root_device().memregion(M68008_TAG)->base()[TRUMP_ROM_BASE]);
321	321
322	322	// Setup cart rom to rom handler, so unlink us
323		space.install_rom(0x0c000, 0x0ffff, &machine().region(M68008_TAG)->base()[CART_ROM_BASE]);
	323	space.install_rom(0x0c000, 0x0ffff, &machine().root_device().memregion(M68008_TAG)->base()[CART_ROM_BASE]);
324	324
325		return machine().region(M68008_TAG)->base()[CART_ROM_BASE+offset];
	325	return memregion(M68008_TAG)->base()[CART_ROM_BASE+offset];
326	326	}
327	327
328	328	void ql_state::trump_card_set_control(UINT8 data)
r14976	r14977
978	978	{
979	979	case DISK_TYPE_SANDY :
980	980	logerror("Configuring SandySuperDisk\n");
981		program->install_rom(0x0c0000, 0x0c3fff, &machine().region(M68008_TAG)->base()[SANDY_ROM_BASE]);
	981	program->install_rom(0x0c0000, 0x0c3fff, &machine().root_device().memregion(M68008_TAG)->base()[SANDY_ROM_BASE]);
982	982	program->install_read_handler(SANDY_IO_BASE, SANDY_IO_END, 0, 0, read8_delegate(FUNC(ql_state::disk_io_r), this));
983	983	program->install_write_handler(SANDY_IO_BASE, SANDY_IO_END, 0, 0, write8_delegate(FUNC(ql_state::disk_io_w), this));
984	984	m_disk_io_base=SANDY_IO_BASE;

src/mess/drivers/ti990_10.c

r14976	r14977
294	294	/* load specific ti990/12 rom page */
295	295	const int page = 3;
296	296
297		memmove(machine.region("maincpu")->base()+0x1FFC00, machine.region("maincpu")->base()+0x1FFC00+(page*0x400), 0x400);
	297	memmove(machine.root_device().memregion("maincpu")->base()+0x1FFC00, machine.root_device().memregion("maincpu")->base()+0x1FFC00+(page*0x400), 0x400);
298	298	#endif
299	299	vdt911_init(machine);
300	300	}

src/mess/drivers/amiga.c

r14976	r14977
536	536	{
537	537	amiga_state *state = device->machine().driver_data<amiga_state>();
538	538	/* switch banks as appropriate */
539		memory_set_bank(device->machine(), "bank1", data & 1);
	539	state->membank("bank1")->set_entry(data & 1);
540	540
541	541	/* swap the write handlers between ROM and bank 1 based on the bit */
542	542	if ((data & 1) == 0) {
r14976	r14977
550	550	device->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x000000, state->m_chip_ram.bytes() - 1, 0, mirror_mask, "bank1");
551	551
552	552	/* if there is a cart region, check for cart overlay */
553		if (device->machine().region("user2")->base() != NULL)
	553	if (device->machine().root_device().memregion("user2")->base() != NULL)
554	554	amiga_cart_check_overlay(device->machine());
555	555	}
556	556	else
r14976	r14977
621	621	amiga_machine_config(machine, &amiga_intf);
622	622
623	623	/* set up memory */
624		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
625		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	624	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	625	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
626	626
627	627	/* initialize cartridge (if present) */
628	628	amiga_cart_init(machine);
r14976	r14977
653	653	amiga_machine_config(machine, &amiga_intf);
654	654
655	655	/* set up memory */
656		memory_configure_bank(1, 0, 1, state->m_chip_ram, 0);
657		memory_configure_bank(1, 1, 1, machine.region("user1")->base(), 0);
	656	1.root_device().membank(0)->configure_entries(1, state->m_chip_ram, 0);
	657	1.root_device().membank(1)->configure_entries(1, machine.root_device().memregion("user1")->base(), 0);
658	658
659	659	/* initialize Action Replay (if present) */
660	660	amiga_cart_init(machine);
r14976	r14977
682	682	amiga_machine_config(machine, &amiga_intf);
683	683
684	684	/* set up memory */
685		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
686		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	685	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	686	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
687	687
688	688	/* initialize keyboard - in cdtv we can use a standard Amiga keyboard*/
689	689	amigakbd_init(machine);

src/mess/drivers/sorcerer.c

r14976	r14977
346	346	{
347	347	UINT8 y,ra,chr,gfx;
348	348	UINT16 sy=0,ma=0xf080,x;
349		UINT8 *RAM = screen.machine().region("maincpu")->base();
	349	UINT8 *RAM = screen.machine().root_device().memregion("maincpu")->base();
350	350
351	351	for (y = 0; y < 30; y++)
352	352	{
r14976	r14977
483	483
484	484	static DRIVER_INIT( sorcerer )
485	485	{
486		UINT8 *RAM = machine.region("maincpu")->base();
487		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xe000);
	486	sorcerer_state *state = machine.driver_data<sorcerer_state>();
	487	UINT8 *RAM = state->memregion("maincpu")->base();
	488	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xe000);
488	489	}
489	490
490	491	/***************************************************************************

src/mess/drivers/abc80x.c

r14976	r14977
211	211	else
212	212	{
213	213	// BASIC ROM selected
214		program->install_rom(0x0000, 0x3fff, machine().region(Z80_TAG)->base());
	214	program->install_rom(0x0000, 0x3fff, memregion(Z80_TAG)->base());
215	215	}
216	216	}
217	217
r14976	r14977
227	227	if (m_lrs)
228	228	{
229	229	// ROM and video RAM selected
230		program->install_rom(0x0000, 0x77ff, machine().region(Z80_TAG)->base());
	230	program->install_rom(0x0000, 0x77ff, memregion(Z80_TAG)->base());
231	231	program->install_ram(0x7800, 0x7fff, m_char_ram);
232	232	}
233	233	else
r14976	r14977
266	266	//logerror("%04x-%04x: Video RAM %04x (32K)\n", start_addr, end_addr, videoram_offset);
267	267
268	268	program->install_readwrite_bank(start_addr, end_addr, bank_name);
269		memory_configure_bank(machine(), bank_name, 1, 1, m_video_ram + videoram_offset, 0);
270		memory_set_bank(machine(), bank_name, 1);
	269	membank(bank_name)->configure_entry(1, m_video_ram + videoram_offset);
	270	membank(bank_name)->set_entry(1);
271	271	}
272	272
273	273	for (bank = 9; bank <= 16; bank++)
r14976	r14977
280	280	//logerror("%04x-%04x: Work RAM (32K)\n", start_addr, end_addr);
281	281
282	282	program->install_readwrite_bank(start_addr, end_addr, bank_name);
283		memory_set_bank(machine(), bank_name, 0);
	283	membank(bank_name)->set_entry(0);
284	284	}
285	285	}
286	286	else
r14976	r14977
300	300	//logerror("%04x-%04x: Video RAM %04x (4K)\n", start_addr, end_addr, videoram_offset);
301	301
302	302	program->install_readwrite_bank(start_addr, end_addr, bank_name);
303		memory_configure_bank(machine(), bank_name, 1, 1, m_video_ram + videoram_offset, 0);
304		memory_set_bank(machine(), bank_name, 1);
	303	membank(bank_name)->configure_entry(1, m_video_ram + videoram_offset);
	304	membank(bank_name)->set_entry(1);
305	305	}
306	306	else
307	307	{
r14976	r14977
315	315
316	316	program->install_read_bank(start_addr, end_addr, bank_name);
317	317	program->unmap_write(start_addr, end_addr);
318		memory_set_bank(machine(), bank_name, 0);
	318	membank(bank_name)->set_entry(0);
319	319	break;
320	320
321	321	case 8:
r14976	r14977
325	325	program->install_read_bank(0x7000, 0x77ff, bank_name);
326	326	program->unmap_write(0x7000, 0x77ff);
327	327	program->install_readwrite_handler(0x7800, 0x7fff, 0, 0, read8_delegate(FUNC(abc806_state::charram_r),this), write8_delegate(FUNC(abc806_state::charram_w),this));
328		memory_set_bank(machine(), bank_name, 0);
	328	membank(bank_name)->set_entry(0);
329	329	break;
330	330
331	331	default:
r14976	r14977
333	333	//logerror("%04x-%04x: Work RAM (4K)\n", start_addr, end_addr);
334	334
335	335	program->install_readwrite_bank(start_addr, end_addr, bank_name);
336		memory_set_bank(machine(), bank_name, 0);
	336	membank(bank_name)->set_entry(0);
337	337	break;
338	338	}
339	339	}
r14976	r14977
366	366	program->install_readwrite_bank(start_addr, end_addr, bank_name);
367	367	}
368	368
369		memory_configure_bank(machine(), bank_name, 1, 1, m_video_ram + videoram_offset, 0);
370		memory_set_bank(machine(), bank_name, 1);
	369	membank(bank_name)->configure_entry(1, m_video_ram + videoram_offset);
	370	membank(bank_name)->set_entry(1);
371	371	}
372	372	}
373	373	}
r14976	r14977
994	994
995	995	void abc806_state::machine_start()
996	996	{
997		UINT8 *mem = machine().region(Z80_TAG)->base();
	997	UINT8 *mem = memregion(Z80_TAG)->base();
998	998	UINT32 videoram_size = m_ram->size() - (32 * 1024);
999	999	int bank;
1000	1000	char bank_name[10];
r14976	r14977
1005	1005	for (bank = 1; bank <= 16; bank++)
1006	1006	{
1007	1007	sprintf(bank_name,"bank%d",bank);
1008		memory_configure_bank(machine(), bank_name, 0, 1, mem + (0x1000 * (bank - 1)), 0);
1009		memory_configure_bank(machine(), bank_name, 1, 1, m_video_ram, 0);
1010		memory_set_bank(machine(), bank_name, 0);
	1008	membank(bank_name)->configure_entry(0, mem + (0x1000 * (bank - 1)));
	1009	membank(bank_name)->configure_entry(1, m_video_ram);
	1010	membank(bank_name)->set_entry(0);
1011	1011	}
1012	1012
1013	1013	// register for state saving
r14976	r14977
1034	1034	for (bank = 1; bank <= 16; bank++)
1035	1035	{
1036	1036	sprintf(bank_name,"bank%d",bank);
1037		memory_set_bank(machine(), bank_name, 0);
	1037	membank(bank_name)->set_entry(0);
1038	1038	}
1039	1039
1040	1040	bankswitch();
r14976	r14977
1415	1415	{
1416	1416	if (address >= 0x7c00 && address < 0x8000)
1417	1417	{
1418		direct.explicit_configure(0x7c00, 0x7fff, 0x3ff, machine().region(Z80_TAG)->base() + 0x7c00);
	1418	direct.explicit_configure(0x7c00, 0x7fff, 0x3ff, memregion(Z80_TAG)->base() + 0x7c00);
1419	1419
1420	1420	if (!m_fetch_charram)
1421	1421	{
r14976	r14977
1451	1451	{
1452	1452	if (address >= 0x7800 && address < 0x8000)
1453	1453	{
1454		direct.explicit_configure(0x7800, 0x7fff, 0x7ff, machine().region(Z80_TAG)->base() + 0x7800);
	1454	direct.explicit_configure(0x7800, 0x7fff, 0x7ff, memregion(Z80_TAG)->base() + 0x7800);
1455	1455
1456	1456	if (!m_fetch_charram)
1457	1457	{
r14976	r14977
1489	1489	{
1490	1490	if (address >= 0x7800 && address < 0x8000)
1491	1491	{
1492		direct.explicit_configure(0x7800, 0x7fff, 0x7ff, machine().region(Z80_TAG)->base() + 0x7800);
	1492	direct.explicit_configure(0x7800, 0x7fff, 0x7ff, memregion(Z80_TAG)->base() + 0x7800);
1493	1493	return ~0;
1494	1494	}
1495	1495	}
r14976	r14977
1513	1513	{
1514	1514	if (address >= 0x7800 && address < 0x8000)
1515	1515	{
1516		direct.explicit_configure(0x7800, 0x7fff, 0x7ff, machine().region(Z80_TAG)->base() + 0x7800);
	1516	direct.explicit_configure(0x7800, 0x7fff, 0x7ff, memregion(Z80_TAG)->base() + 0x7800);
1517	1517
1518	1518	if (!m_fetch_charram)
1519	1519	{

src/mess/drivers/a7000.c

r14976	r14977
265	265	int x_size,y_size,x_start,y_start;
266	266	int x,y,xi;
267	267	UINT32 count;
268		UINT8 *vram = machine().region("vram")->base();
	268	UINT8 *vram = memregion("vram")->base();
269	269
270	270	bitmap.fill(machine().pens[0x100], cliprect);
271	271
r14976	r14977
609	609	UINT32 dst = 0;
610	610	UINT32 size = m_viddma_addr_end;
611	611	UINT32 dma_index;
612		UINT8 *vram = machine().region("vram")->base();
	612	UINT8 *vram = memregion("vram")->base();
613	613
614	614	/* TODO: this should actually be a qword transfer */
615	615	for(dma_index = 0;dma_index < size;dma_index++)

src/mess/drivers/qx10.c

r14976	r14977
248	248
249	249	if (!m_memprom)
250	250	{
251		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base());
	251	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
252	252	}
253	253	else
254	254	{
255		memory_set_bankptr(machine(), "bank1", machine().device<ram_device>(RAM_TAG)->pointer() + drambank*64*1024);
	255	membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + drambank*64*1024);
256	256	}
257	257	if (m_memcmos)
258	258	{
259		memory_set_bankptr(machine(), "bank2", m_cmosram);
	259	membank("bank2")->set_base(m_cmosram);
260	260	}
261	261	else
262	262	{
263		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + drambank*64*1024 + 32*1024);
	263	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + drambank*64*1024 + 32*1024);
264	264	}
265	265	}
266	266
r14976	r14977
958	958	//m_video_ram = auto_alloc_array_clear(machine(), UINT8, 0x60000);
959	959
960	960	// find memory regions
961		m_char_rom = machine().region("chargen")->base();
	961	m_char_rom = memregion("chargen")->base();
962	962	}
963	963
964	964	static UPD7220_INTERFACE( hgdc_intf )

src/mess/drivers/bigbord2.c

r14976	r14977
178	178	if (bank)
179	179	{
180	180	/* ROM */
181		program->install_rom(0x0000, 0x0fff, machine.region("monitor")->base());
	181	program->install_rom(0x0000, 0x0fff, machine.root_device().memregion("monitor")->base());
182	182	program->unmap_readwrite(0x1000, 0x1fff);
183	183	program->install_ram(0x3000, 0x3fff, m_videoram);
184	184	}
r14976	r14977
442	442	void bigbord2_state::video_start()
443	443	{
444	444	/* find memory regions */
445		m_char_rom = machine().region("chargen")->base();
	445	m_char_rom = memregion("chargen")->base();
446	446	}
447	447
448	448

src/mess/drivers/tvc.c

r14976	r14977
37	37
38	38	static void tvc_set_mem_page(running_machine &machine, UINT8 data)
39	39	{
	40	tvc_state *state = machine.driver_data<tvc_state>();
40	41	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
41	42	switch(data & 0x18) {
42	43	case 0x00 : // system ROM selected
43	44	space->install_read_bank(0x0000, 0x3fff, "bank1");
44	45	space->unmap_write(0x0000, 0x3fff);
45		memory_set_bankptr(space->machine(), "bank1", machine.region("sys")->base());
	46	state->membank("bank1")->set_base(machine.root_device().memregion("sys")->base());
46	47	break;
47	48	case 0x08 : // Cart ROM selected
48	49	space->install_read_bank(0x0000, 0x3fff, "bank1");
49	50	space->unmap_write(0x0000, 0x3fff);
50		memory_set_bankptr(space->machine(), "bank1", machine.region("cart")->base());
	51	state->membank("bank1")->set_base(machine.root_device().memregion("cart")->base());
51	52	break;
52	53	case 0x10 : // RAM selected
53	54	space->install_readwrite_bank(0x0000, 0x3fff, "bank1");
54		memory_set_bankptr(space->machine(), "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	55	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
55	56	break;
56	57	}
57	58	// Bank 2 is always RAM
58		memory_set_bankptr(space->machine(), "bank2", machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
	59	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x4000);
59	60	if ((data & 0x20)==0) {
60	61	// Video RAM
61		memory_set_bankptr(space->machine(), "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000);
	62	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000);
62	63	} else {
63	64	// System RAM page 3
64		memory_set_bankptr(space->machine(), "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
	65	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
65	66	}
66	67	switch(data & 0xc0) {
67	68	case 0x00 : // Cart ROM selected
68	69	space->install_read_bank(0xc000, 0xffff, "bank4");
69	70	space->unmap_write(0xc000, 0xffff);
70		memory_set_bankptr(space->machine(), "bank4", machine.region("cart")->base());
	71	state->membank("bank4")->set_base(machine.root_device().memregion("cart")->base());
71	72	break;
72	73	case 0x40 : // System ROM selected
73	74	space->install_read_bank(0xc000, 0xffff, "bank4");
74	75	space->unmap_write(0xc000, 0xffff);
75		memory_set_bankptr(space->machine(), "bank4", machine.region("sys")->base());
	76	state->membank("bank4")->set_base(machine.root_device().memregion("sys")->base());
76	77	break;
77	78	case 0x80 : // RAM selected
78	79	space->install_readwrite_bank(0xc000, 0xffff, "bank4");
79		memory_set_bankptr(space->machine(), "bank4", machine.device<ram_device>(RAM_TAG)->pointer()+0xc000);
	80	state->membank("bank4")->set_base(machine.device<ram_device>(RAM_TAG)->pointer()+0xc000);
80	81	break;
81	82	case 0xc0 : // External ROM selected
82	83	space->install_read_bank(0xc000, 0xffff, "bank4");
83	84	space->unmap_write(0xc000, 0xffff);
84		memory_set_bankptr(space->machine(), "bank4", machine.region("ext")->base());
	85	state->membank("bank4")->set_base(machine.root_device().memregion("ext")->base());
85	86	break;
86	87
87	88	}

src/mess/drivers/tmc1800.c

r14976	r14977
169	169	{
170	170	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
171	171	UINT8 *ram = m_ram->pointer();
172		UINT8 *rom = machine().region(CDP1802_TAG)->base();
	172	UINT8 *rom = memregion(CDP1802_TAG)->base();
173	173
174	174	if (m_roc)
175	175	{
r14976	r14977
746	746
747	747	/* enable ROM */
748	748	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
749		UINT8 *rom = machine().region(CDP1802_TAG)->base();
	749	UINT8 *rom = memregion(CDP1802_TAG)->base();
750	750	program->install_rom(0x0000, 0x01ff, 0, 0x7e00, rom);
751	751	}
752	752
r14976	r14977
763	763
764	764	static QUICKLOAD_LOAD( tmc1800 )
765	765	{
766		UINT8 *ptr = image.device().machine().region(CDP1802_TAG)->base();
	766	UINT8 *ptr = image.device().machine().root_device().memregion(CDP1802_TAG)->base();
767	767	int size = image.length();
768	768
769	769	if (size > image.device().machine().device<ram_device>(RAM_TAG)->size())

src/mess/drivers/crvision.c

r14976	r14977
847	847	UINT32 size;
848	848	UINT8 *temp_copy;
849	849	running_machine &machine = image.device().machine();
850		UINT8 *mem = machine.region(M6502_TAG)->base();
	850	crvision_state *state = machine.driver_data<crvision_state>();
	851	UINT8 *mem = state->memregion(M6502_TAG)->base();
851	852	address_space *program = machine.device(M6502_TAG)->memory().space(AS_PROGRAM);
852	853
853	854	if (image.software_entry() == NULL)
r14976	r14977
940	941	return IMAGE_INIT_FAIL;
941	942	}
942	943
943		memory_configure_bank(machine, "bank1", 0, 1, mem + 0x8000, 0);
944		memory_set_bank(machine, "bank1", 0);
	944	state->membank("bank1")->configure_entry(0, mem + 0x8000);
	945	state->membank("bank1")->set_entry(0);
945	946
946		memory_configure_bank(machine, "bank2", 0, 1, mem + 0x4000, 0);
947		memory_set_bank(machine, "bank2", 0);
	947	state->membank("bank2")->configure_entry(0, mem + 0x4000);
	948	state->membank("bank2")->set_entry(0);
948	949
949	950	auto_free(machine, temp_copy);
950	951

src/mess/drivers/fmtowns.c

r14976	r14977
157	157	// TODO: init serial ROM contents
158	158	int x;
159	159	static const UINT8 code[8] = { 0x04,0x65,0x54,0xA4,0x95,0x45,0x35,0x5F };
160		UINT8* srom = machine.region("serial")->base();
	160	UINT8* srom = machine.root_device().memregion("serial")->base();
161	161
162	162	memset(m_towns_serial_rom,0,256/8);
163	163
r14976	r14977
1130	1130
1131	1131	void towns_state::towns_update_video_banks(address_space& space)
1132	1132	{
	1133	towns_state *state = space.machine().driver_data<towns_state>();
1133	1134	UINT8* ROM;
1134	1135
1135	1136	if(m_towns_mainmem_enable != 0)  // first MB is RAM
1136	1137	{
1137		ROM = space.machine().region("user")->base();
	1138	ROM = state->memregion("user")->base();
1138	1139
1139		//      memory_set_bankptr(space.machine(),1,m_messram->pointer()+0xc0000);
1140		//      memory_set_bankptr(space.machine(),2,m_messram->pointer()+0xc8000);
1141		//      memory_set_bankptr(space.machine(),3,m_messram->pointer()+0xc9000);
1142		//      memory_set_bankptr(space.machine(),4,m_messram->pointer()+0xca000);
1143		//      memory_set_bankptr(space.machine(),5,m_messram->pointer()+0xca000);
1144		//      memory_set_bankptr(space.machine(),10,m_messram->pointer()+0xca800);
1145		memory_set_bankptr(space.machine(),"bank6",m_messram->pointer()+0xcb000);
1146		memory_set_bankptr(space.machine(),"bank7",m_messram->pointer()+0xcb000);
	1140	//      state->membank(1)->set_base(m_messram->pointer()+0xc0000);
	1141	//      state->membank(2)->set_base(m_messram->pointer()+0xc8000);
	1142	//      state->membank(3)->set_base(m_messram->pointer()+0xc9000);
	1143	//      state->membank(4)->set_base(m_messram->pointer()+0xca000);
	1144	//      state->membank(5)->set_base(m_messram->pointer()+0xca000);
	1145	//      state->membank(10)->set_base(m_messram->pointer()+0xca800);
	1146	state->membank("bank6")->set_base(m_messram->pointer()+0xcb000);
	1147	state->membank("bank7")->set_base(m_messram->pointer()+0xcb000);
1147	1148	if(m_towns_system_port & 0x02)
1148		memory_set_bankptr(space.machine(),"bank11",m_messram->pointer()+0xf8000);
	1149	state->membank("bank11")->set_base(m_messram->pointer()+0xf8000);
1149	1150	else
1150		memory_set_bankptr(space.machine(),"bank11",ROM+0x238000);
1151		memory_set_bankptr(space.machine(),"bank12",m_messram->pointer()+0xf8000);
	1151	state->membank("bank11")->set_base(ROM+0x238000);
	1152	state->membank("bank12")->set_base(m_messram->pointer()+0xf8000);
1152	1153	return;
1153	1154	}
1154	1155	else  // enable I/O ports and VRAM
1155	1156	{
1156		ROM = space.machine().region("user")->base();
	1157	ROM = state->memregion("user")->base();
1157	1158
1158		//      memory_set_bankptr(space.machine(),1,towns_gfxvram+(towns_vram_rplane*0x8000));
1159		//      memory_set_bankptr(space.machine(),2,towns_txtvram);
1160		//      memory_set_bankptr(space.machine(),3,state->m_messram->pointer()+0xc9000);
	1159	//      state->membank(1)->set_base(towns_gfxvram+(towns_vram_rplane*0x8000));
	1160	//      state->membank(2)->set_base(towns_txtvram);
	1161	//      state->membank(3)->set_base(state->m_messram->pointer()+0xc9000);
1161	1162	//      if(towns_ankcg_enable != 0)
1162		//          memory_set_bankptr(space.machine(),4,ROM+0x180000+0x3d000);  // ANK CG 8x8
	1163	//          state->membank(4)->set_base(ROM+0x180000+0x3d000);  // ANK CG 8x8
1163	1164	//      else
1164		//          memory_set_bankptr(space.machine(),4,towns_txtvram+0x2000);
1165		//      memory_set_bankptr(space.machine(),5,towns_txtvram+0x2000);
1166		//      memory_set_bankptr(space.machine(),10,state->m_messram->pointer()+0xca800);
	1165	//          state->membank(4)->set_base(towns_txtvram+0x2000);
	1166	//      state->membank(5)->set_base(towns_txtvram+0x2000);
	1167	//      state->membank(10)->set_base(state->m_messram->pointer()+0xca800);
1167	1168	if(m_towns_ankcg_enable != 0)
1168		memory_set_bankptr(space.machine(),"bank6",ROM+0x180000+0x3d800);  // ANK CG 8x16
	1169	state->membank("bank6")->set_base(ROM+0x180000+0x3d800);  // ANK CG 8x16
1169	1170	else
1170		memory_set_bankptr(space.machine(),"bank6",m_messram->pointer()+0xcb000);
1171		memory_set_bankptr(space.machine(),"bank7",m_messram->pointer()+0xcb000);
	1171	state->membank("bank6")->set_base(m_messram->pointer()+0xcb000);
	1172	state->membank("bank7")->set_base(m_messram->pointer()+0xcb000);
1172	1173	if(m_towns_system_port & 0x02)
1173		memory_set_bankptr(space.machine(),"bank11",m_messram->pointer()+0xf8000);
	1174	state->membank("bank11")->set_base(m_messram->pointer()+0xf8000);
1174	1175	else
1175		memory_set_bankptr(space.machine(),"bank11",ROM+0x238000);
1176		memory_set_bankptr(space.machine(),"bank12",m_messram->pointer()+0xf8000);
	1176	state->membank("bank11")->set_base(ROM+0x238000);
	1177	state->membank("bank12")->set_base(m_messram->pointer()+0xf8000);
1177	1178	return;
1178	1179	}
1179	1180	}

src/mess/drivers/mz2500.c

r14976	r14977
218	218	static void draw_80x25(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,UINT16 map_addr)
219	219	{
220	220	mz2500_state *state = machine.driver_data<mz2500_state>();
221		UINT8 *vram = machine.region("maincpu")->base();
	221	UINT8 *vram = machine.root_device().memregion("maincpu")->base();
222	222	int x,y,count,xi,yi;
223	223	UINT8 *gfx_data;
224	224	UINT8 y_step;
r14976	r14977
243	243	int inv_col = (attr & 0x40) >> 6;
244	244
245	245	if(gfx_sel & 8) // Xevious, PCG 8 colors have priority above kanji roms
246		gfx_data = machine.region("pcg")->base();
	246	gfx_data = machine.root_device().memregion("pcg")->base();
247	247	else if(gfx_sel == 0x80)
248	248	{
249		gfx_data = machine.region("kanji")->base();
	249	gfx_data = state->memregion("kanji")->base();
250	250	tile|= tile_bank << 8;
251	251	if(y_step == 2)
252	252	tile &= 0x3ffe;
253	253	}
254	254	else if(gfx_sel == 0xc0)
255	255	{
256		gfx_data = machine.region("kanji")->base();
	256	gfx_data = machine.root_device().memregion("kanji")->base();
257	257	tile|= (tile_bank << 8);
258	258	if(y_step == 2)
259	259	tile &= 0x3ffe;
r14976	r14977
261	261	}
262	262	else
263	263	{
264		gfx_data = machine.region("pcg")->base();
	264	gfx_data = machine.root_device().memregion("pcg")->base();
265	265	}
266	266
267	267	for(yi=0;yi<8*y_step;yi++)
r14976	r14977
309	309	static void draw_40x25(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int plane,UINT16 map_addr)
310	310	{
311	311	mz2500_state *state = machine.driver_data<mz2500_state>();
312		UINT8 *vram = machine.region("maincpu")->base();
	312	UINT8 *vram = machine.root_device().memregion("maincpu")->base();
313	313	int x,y,count,xi,yi;
314	314	UINT8 *gfx_data;
315	315	UINT8 y_step;
r14976	r14977
335	335	int inv_col = (attr & 0x40) >> 6;
336	336
337	337	if(gfx_sel & 8) // Xevious, PCG 8 colors have priority above kanji roms
338		gfx_data = machine.region("pcg")->base();
	338	gfx_data = machine.root_device().memregion("pcg")->base();
339	339	else if(gfx_sel == 0x80)
340	340	{
341		gfx_data = machine.region("kanji")->base();
	341	gfx_data = state->memregion("kanji")->base();
342	342	tile|= tile_bank << 8;
343	343	if(y_step == 2)
344	344	tile &= 0x3ffe;
345	345	}
346	346	else if(gfx_sel == 0xc0)
347	347	{
348		gfx_data = machine.region("kanji")->base();
	348	gfx_data = machine.root_device().memregion("kanji")->base();
349	349	tile|= (tile_bank << 8);
350	350	if(y_step == 2)
351	351	tile &= 0x3ffe;
r14976	r14977
353	353	}
354	354	else
355	355	{
356		gfx_data = machine.region("pcg")->base();
	356	gfx_data = machine.root_device().memregion("pcg")->base();
357	357	}
358	358
359	359	for(yi=0;yi<8*y_step;yi++)
r14976	r14977
399	399
400	400	static void draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int pri)
401	401	{
402		//mz2500_state *state = machine.driver_data<mz2500_state>();
	402	mz2500_state *state = machine.driver_data<mz2500_state>();
403	403	UINT32 count;
404		UINT8 *vram = machine.region("maincpu")->base();
	404	UINT8 *vram = state->memregion("maincpu")->base();
405	405	UINT8 pen,pen_bit[2];
406	406	int x,y,xi,pen_i;
407	407	int res_x,res_y;
r14976	r14977
443	443	{
444	444	mz2500_state *state = machine.driver_data<mz2500_state>();
445	445	UINT32 count;
446		UINT8 *vram = machine.region("maincpu")->base();
	446	UINT8 *vram = state->memregion("maincpu")->base();
447	447	UINT8 pen,pen_bit[4];
448	448	int x,y,xi,pen_i;
449	449	UINT32 wa_reg;
r14976	r14977
501	501	{
502	502	mz2500_state *state = machine.driver_data<mz2500_state>();
503	503	UINT32 count;
504		UINT8 *vram = machine.region("maincpu")->base();
	504	UINT8 *vram = state->memregion("maincpu")->base();
505	505	UINT8 pen,pen_bit[8];
506	506	int x,y,xi,pen_i;
507	507	UINT32 wa_reg;
r14976	r14977
733	733
734	734	UINT8 mz2500_state::mz2500_ram_read(UINT16 offset, UINT8 bank_num)
735	735	{
736		UINT8 *ram = machine().region("maincpu")->base();
	736	UINT8 *ram = memregion("maincpu")->base();
737	737	UINT8 cur_bank = m_bank_val[bank_num];
738	738
739	739	switch(cur_bank)
r14976	r14977
768	768	{
769	769	if(m_kanji_bank & 0x80) //kanji ROM
770	770	{
771		UINT8 *knj_rom = machine().region("kanji")->base();
	771	UINT8 *knj_rom = memregion("kanji")->base();
772	772
773	773	return knj_rom[(offset & 0x7ff)+((m_kanji_bank & 0x7f)*0x800)];
774	774	}
775	775	else //PCG RAM
776	776	{
777		UINT8 *pcg_ram = machine().region("pcg")->base();
	777	UINT8 *pcg_ram = memregion("pcg")->base();
778	778
779	779	return pcg_ram[offset];
780	780	}
r14976	r14977
782	782	break;
783	783	case 0x3a:
784	784	{
785		UINT8 *dic_rom = machine().region("dictionary")->base();
	785	UINT8 *dic_rom = memregion("dictionary")->base();
786	786
787	787	return dic_rom[(offset & 0x1fff) + ((m_dic_bank & 0x1f)*0x2000)];
788	788	}
r14976	r14977
792	792	case 0x3e:
793	793	case 0x3f:
794	794	{
795		UINT8 *phone_rom = machine().region("phone")->base();
	795	UINT8 *phone_rom = memregion("phone")->base();
796	796
797	797	return phone_rom[offset+(cur_bank & 3)*0x2000];
798	798	}
r14976	r14977
805	805
806	806	void mz2500_state::mz2500_ram_write(UINT16 offset, UINT8 data, UINT8 bank_num)
807	807	{
808		UINT8 *ram = machine().region("maincpu")->base();
	808	UINT8 *ram = memregion("maincpu")->base();
809	809	UINT8 cur_bank = m_bank_val[bank_num];
810	810
811	811	//  if(cur_bank >= 0x30 && cur_bank <= 0x33)
r14976	r14977
898	898	}
899	899	else //PCG RAM
900	900	{
901		UINT8 *pcg_ram = machine().region("pcg")->base();
	901	UINT8 *pcg_ram = memregion("pcg")->base();
902	902	pcg_ram[offset] = data;
903	903	if((offset & 0x1800) == 0x0000)
904	904	gfx_element_mark_dirty(machine().gfx[3], (offset) >> 3);
r14976	r14977
967	967
968	968	WRITE8_MEMBER(mz2500_state::mz2500_bank_data_w)
969	969	{
970		//  UINT8 *ROM = machine().region("maincpu")->base();
	970	//  UINT8 *ROM = memregion("maincpu")->base();
971	971	//  static const char *const bank_name[] = { "bank0", "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7" };
972	972
973	973	m_bank_val[m_bank_addr] = data & 0x3f;
r14976	r14977
975	975	//  if((data*2) >= 0x70)
976	976	//  printf("%s %02x\n",bank_name[m_bank_addr],m_bank_val[m_bank_addr]*2);
977	977
978		//  memory_set_bankptr(machine(), bank_name[m_bank_addr], &ROM[m_bank_val[m_bank_addr]*0x2000]);
	978	//  membank(bank_name[m_bank_addr])->set_base(&ROM[m_bank_val[m_bank_addr]*0x2000]);
979	979
980	980	m_bank_addr++;
981	981	m_bank_addr&=7;
r14976	r14977
1207	1207
1208	1208	READ8_MEMBER(mz2500_state::mz2500_rom_r)
1209	1209	{
1210		UINT8 *rom = machine().region("rom")->base();
	1210	UINT8 *rom = memregion("rom")->base();
1211	1211	UINT8 res;
1212	1212
1213	1213	m_lrom_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
r14976	r14977
1340	1340	if((m_cg_reg_index & 0x1f) == 0x05 && (m_cg_reg[0x05] & 0xc0) == 0x80) //clear bitmap buffer
1341	1341	{
1342	1342	UINT32 i;
1343		UINT8 *vram = machine().region("maincpu")->base();
	1343	UINT8 *vram = memregion("maincpu")->base();
1344	1344	UINT32 layer_bank;
1345	1345
1346	1346	layer_bank = (m_cg_reg[0x0e] & 0x80) ? 0x10000 : 0x00000;
r14976	r14977
1426	1426
1427	1427	READ8_MEMBER(mz2500_state::mz2500_kanji_r)
1428	1428	{
1429		UINT8 *knj2_rom = machine().region("kanji2")->base();
	1429	UINT8 *knj2_rom = memregion("kanji2")->base();
1430	1430
1431	1431	printf("Read from kanji 2 ROM\n");
1432	1432
r14976	r14977
1455	1455
1456	1456	READ8_MEMBER(mz2500_state::mz2500_emm_data_r)
1457	1457	{
1458		UINT8 *emm_ram = machine().region("emm")->base();
	1458	UINT8 *emm_ram = memregion("emm")->base();
1459	1459	UINT8 emm_lo_index;
1460	1460
1461	1461	emm_lo_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
r14976	r14977
1479	1479
1480	1480	WRITE8_MEMBER(mz2500_state::mz2500_emm_data_w)
1481	1481	{
1482		UINT8 *emm_ram = machine().region("emm")->base();
	1482	UINT8 *emm_ram = memregion("emm")->base();
1483	1483	UINT8 emm_lo_index;
1484	1484
1485	1485	emm_lo_index = (cpu_get_reg(machine().device("maincpu"), Z80_B));
r14976	r14977
1718	1718	static MACHINE_RESET(mz2500)
1719	1719	{
1720	1720	mz2500_state *state = machine.driver_data<mz2500_state>();
1721		UINT8 *RAM = machine.region("maincpu")->base();
1722		UINT8 *IPL = machine.region("ipl")->base();
	1721	UINT8 *RAM = machine.root_device().memregion("maincpu")->base();
	1722	UINT8 *IPL = state->memregion("ipl")->base();
1723	1723	UINT32 i;
1724	1724
1725	1725	mz2500_reset(state, IPL_RESET);

src/mess/drivers/gmaster.c

r14976	r14977
17	17	UINT8 data = 0;
18	18	if (m_gmachine.ports[2] & 1)
19	19	{
20		data = machine().region("maincpu")->base()[0x4000 + offset];
	20	data = memregion("maincpu")->base()[0x4000 + offset];
21	21	logerror("%.4x external memory %.4x read %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
22	22	}
23	23	else
r14976	r14977
44	44	{
45	45	if (m_gmachine.ports[2] & 1)
46	46	{
47		machine().region("maincpu")->base()[0x4000 + offset] = data;
	47	memregion("maincpu")->base()[0x4000 + offset] = data;
48	48	logerror("%.4x external memory %.4x written %.2x\n", (int)cpu_get_reg(&space.device(), CPUINFO_INT_PC), 0x4000 + offset, data);
49	49	}
50	50	else

src/mess/drivers/newbrain.c

r14976	r14977
86	86	case 0:
87	87	/* ROM */
88	88	memory_install_rom_helper(program, bank_name, bank_start, bank_end);
89		memory_configure_bank(machine(), bank_name, 0, 1, machine().region("eim")->base() + eim_bank_start, 0);
	89	membank(bank_name)->configure_entry(0, memregion("eim")->base() + eim_bank_start);
90	90	break;
91	91
92	92	case 2:
93	93	/* RAM */
94	94	memory_install_ram_helper(program, bank_name, bank_start, bank_end);
95		memory_configure_bank(machine(), bank_name, 0, 1, m_eim_ram + eim_bank_start, 0);
	95	membank(bank_name)->configure_entry(0, m_eim_ram + eim_bank_start);
96	96	break;
97	97
98	98	default:
r14976	r14977
118	118	{
119	119	/* all banks point to ROM at 0xe000 */
120	120	memory_install_rom_helper(program, bank_name, bank_start, bank_end);
121		memory_configure_bank(machine(), bank_name, 0, 1, machine().region(Z80_TAG)->base() + 0xe000, 0);
	121	membank(bank_name)->configure_entry(0, memregion(Z80_TAG)->base() + 0xe000);
122	122	}
123	123	else
124	124	{
125		memory_configure_bank(machine(), bank_name, 0, 1, machine().region(Z80_TAG)->base() + bank_start, 0);
	125	membank(bank_name)->configure_entry(0, memregion(Z80_TAG)->base() + bank_start);
126	126
127	127	if (bank < 5)
128	128	{
r14976	r14977
132	132	else if (bank == 5)
133	133	{
134	134	/* 0x8000-0x9fff */
135		if (machine().region("eim")->base())
	135	if (machine().root_device().memregion("eim")->base())
136	136	{
137	137	/* expansion interface ROM */
138	138	memory_install_rom_helper(program, bank_name, bank_start, bank_end);
139		memory_configure_bank(machine(), bank_name, 0, 1, machine().region("eim")->base() + 0x4000, 0);
	139	membank(bank_name)->configure_entry(0, memregion("eim")->base() + 0x4000);
140	140	}
141	141	else
142	142	{
143	143	/* mirror of 0xa000-0xbfff */
144		if (machine().region(Z80_TAG)->base()[0xa001] == 0)
	144	if (machine().root_device().memregion(Z80_TAG)->base()[0xa001] == 0)
145	145	{
146	146	/* unmapped on the M model */
147	147	memory_install_unmapped(program, bank_name, bank_start, bank_end);
r14976	r14977
152	152	memory_install_rom_helper(program, bank_name, bank_start, bank_end);
153	153	}
154	154
155		memory_configure_bank(machine(), bank_name, 0, 1, machine().region(Z80_TAG)->base() + 0xa000, 0);
	155	membank(bank_name)->configure_entry(0, memregion(Z80_TAG)->base() + 0xa000);
156	156	}
157	157	}
158	158	else if (bank == 6)
159	159	{
160	160	/* 0xa000-0xbfff */
161		if (machine().region(Z80_TAG)->base()[0xa001] == 0)
	161	if (machine().root_device().memregion(Z80_TAG)->base()[0xa001] == 0)
162	162	{
163	163	/* unmapped on the M model */
164	164	memory_install_unmapped(program, bank_name, bank_start, bank_end);
r14976	r14977
176	176	}
177	177	}
178	178
179		memory_set_bank(machine(), bank_name, 0);
	179	membank(bank_name)->set_entry(0);
180	180	}
181	181	}
182	182

src/mess/drivers/qtsbc.c

r14976	r14977
66	66
67	67	MACHINE_RESET_MEMBER(qtsbc_state)
68	68	{
69		UINT8* bios = machine().region("maincpu")->base()+0x10000;
	69	UINT8* bios = memregion("maincpu")->base()+0x10000;
70	70	memcpy(m_p_ram, bios, 0x800);
71	71	}
72	72

src/mess/drivers/sapi1.c

r14976	r14977
27	27	/* switch out the rom shadow */
28	28	WRITE8_MEMBER( sapi1_state::sapi3_00_w )
29	29	{
30		memory_set_bank(machine(), "bank1", 0);
	30	membank("bank1")->set_entry(0);
31	31	}
32	32
33	33	READ8_MEMBER( sapi1_state::sapi2_keyboard_status_r)

src/mess/drivers/einstein.c

r14976	r14977
112	112	{
113	113	einstein_state *einstein = device->machine().driver_data<einstein_state>();
114	114	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
115		UINT8 *data = device->machine().region("gfx1")->base();
	115	UINT8 *data = device->machine().root_device().memregion("gfx1")->base();
116	116	UINT8 char_code, data_byte;
117	117	int i, x;
118	118
r14976	r14977
306	306
307	307	static void einstein_page_rom(running_machine &machine)
308	308	{
309		einstein_state *einstein = machine.driver_data<einstein_state>();
310		memory_set_bankptr(machine, "bank1", einstein->m_rom_enabled ? machine.region("bios")->base() : machine.device<ram_device>(RAM_TAG)->pointer());
	309	einstein_state *state = machine.driver_data<einstein_state>();
	310	state->membank("bank1")->set_base(state->m_rom_enabled ? machine.root_device().memregion("bios")->base() : machine.device<ram_device>(RAM_TAG)->pointer());
311	311	}
312	312
313	313	/* writing to this port is a simple trigger, and switches between RAM and ROM */
r14976	r14977
421	421
422	422	static MACHINE_RESET( einstein )
423	423	{
424		einstein_state *einstein = machine.driver_data<einstein_state>();
	424	einstein_state *state = machine.driver_data<einstein_state>();
425	425	//device_t *floppy;
426	426	//UINT8 config = input_port_read(machine, "config");
427	427
428	428	/* save pointers to our devices */
429		einstein->m_color_screen = machine.device("screen");
430		einstein->m_ctc = machine.device(IC_I058);
	429	state->m_color_screen = machine.device("screen");
	430	state->m_ctc = machine.device(IC_I058);
431	431
432	432	/* initialize memory mapping */
433		memory_set_bankptr(machine, "bank2", machine.device<ram_device>(RAM_TAG)->pointer());
434		memory_set_bankptr(machine, "bank3", machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
435		einstein->m_rom_enabled = 1;
	433	state->membank("bank2")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
	434	state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x8000);
	435	state->m_rom_enabled = 1;
436	436	einstein_page_rom(machine);
437	437
438	438	/* a reset causes the fire int, adc int, keyboard int mask
439	439	to be set to 1, which causes all these to be DISABLED */
440		einstein->m_interrupt = 0;
441		einstein->m_interrupt_mask = 0;
	440	state->m_interrupt = 0;
	441	state->m_interrupt_mask = 0;
442	442
443		einstein->m_ctc_trigger = 0;
	443	state->m_ctc_trigger = 0;
444	444
445	445	/* configure floppy drives */
446	446	/*  floppy_type_t type_80 = FLOPPY_STANDARD_5_25_DSHD;

src/mess/drivers/ti99_2.c

r14976	r14977
115	115	state->m_ROM_paged = 1;
116	116	}
117	117
118		#define TI99_2_32_ROMPAGE0 (machine().region("maincpu")->base()+0x4000)
119		#define TI99_2_32_ROMPAGE1 (machine().region("maincpu")->base()+0x10000)
	118	#define TI99_2_32_ROMPAGE0 (machine().root_device().memregion("maincpu")->base()+0x4000)
	119	#define TI99_2_32_ROMPAGE1 (machine().root_device().memregion("maincpu")->base()+0x10000)
120	120
121	121	static MACHINE_RESET( ti99_2 )
122	122	{
123	123	ti99_2_state *state = machine.driver_data<ti99_2_state>();
124	124	state->m_irq_state = ASSERT_LINE;
125	125	if (! state->m_ROM_paged)
126		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base()+0x4000);
	126	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base()+0x4000);
127	127	else
128		memory_set_bankptr(machine, "bank1", (machine.region("maincpu")->base()+0x4000));
	128	state->membank("bank1")->set_base((state->memregion("maincpu")->base()+0x4000));
129	129	}
130	130
131	131	static INTERRUPT_GEN( ti99_2_vblank_interrupt )
r14976	r14977
237	237	/* now, we handle ROM paging */
238	238	if (m_ROM_paged)
239	239	{   /* if we have paged ROMs, page according to S0 keyboard interface line */
240		memory_set_bankptr(machine(), "bank1", (m_KeyRow == 0) ? TI99_2_32_ROMPAGE1 : TI99_2_32_ROMPAGE0);
	240	membank("bank1")->set_base((m_KeyRow == 0) ? TI99_2_32_ROMPAGE1 : TI99_2_32_ROMPAGE0);
241	241	}
242	242	}
243	243

src/mess/drivers/fk1.c

r14976	r14977
299	299	UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
300	300
301	301	space_mem->install_write_bank(0x0000, 0x3fff, "bank1");
302		memory_set_bankptr(machine(), "bank1", ram);
303		memory_set_bankptr(machine(), "bank2", ram + 0x4000);
	302	membank("bank1")->set_base(ram);
	303	membank("bank2")->set_base(ram + 0x4000);
304	304	return 0;
305	305	}
306	306
r14976	r14977
308	308	{
309	309	address_space *space_mem = m_maincpu->memory().space(AS_PROGRAM);
310	310	space_mem->unmap_write(0x0000, 0x3fff);
311		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base());
312		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0x10000);
	311	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
	312	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x10000);
313	313	return 0;
314	314	}
315	315
r14976	r14977
429	429	UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
430	430
431	431	space->unmap_write(0x0000, 0x3fff);
432		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base()); // ROM
433		memory_set_bankptr(machine(), "bank2", ram + 0x10000); // VRAM
434		memory_set_bankptr(machine(), "bank3", ram + 0x8000);
435		memory_set_bankptr(machine(), "bank4", ram + 0xc000);
	432	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base()); // ROM
	433	membank("bank2")->set_base(ram + 0x10000); // VRAM
	434	membank("bank3")->set_base(ram + 0x8000);
	435	membank("bank4")->set_base(ram + 0xc000);
436	436
437	437	device_set_irq_callback(machine().device("maincpu"), fk1_irq_callback);
438	438	}

src/mess/drivers/ccs2422.c

r14976	r14977
72	72
73	73	MACHINE_RESET_MEMBER(ccs2422_state)
74	74	{
75		UINT8* user1 = machine().region("user1")->base();
	75	UINT8* user1 = memregion("user1")->base();
76	76	memcpy((UINT8*)m_ccs_ram, user1, 0x0800);
77	77
78	78	// this should be rom/ram banking

src/mess/drivers/multi8.c

r14976	r14977
94	94
95	95	state->m_vram_bank = 8;
96	96	state->m_bw_mode = 0;
97		state->m_p_chargen = machine.region("chargen")->base();
	97	state->m_p_chargen = state->memregion("chargen")->base();
98	98	}
99	99
100	100	static void multi8_draw_pixel(running_machine &machine, bitmap_ind16 &bitmap,int y,int x,UINT8 pen,UINT8 width)
r14976	r14977
644	644	static MACHINE_START(multi8)
645	645	{
646	646	multi8_state *state = machine.driver_data<multi8_state>();
647		state->m_p_vram = machine.region("vram")->base();
648		state->m_p_wram = machine.region("wram")->base();
649		state->m_p_kanji = machine.region("kanji")->base();
	647	state->m_p_vram = machine.root_device().memregion("vram")->base();
	648	state->m_p_wram = machine.root_device().memregion("wram")->base();
	649	state->m_p_kanji = state->memregion("kanji")->base();
650	650	}
651	651
652	652	static MACHINE_RESET(multi8)

src/mess/drivers/mes.c

r14976	r14977
53	53
54	54	VIDEO_START_MEMBER( mes_state )
55	55	{
56		m_p_chargen = machine().region("chargen")->base();
	56	m_p_chargen = memregion("chargen")->base();
57	57	}
58	58
59	59	/* This system appears to have 2 screens. Not implemented.

src/mess/drivers/bullet.c

r14976	r14977
104	104
105	105	if (!m_brom && !BIT(offset, 5))
106	106	{
107		data = machine().region(Z80_TAG)->base()[offset & 0x1f];
	107	data = memregion(Z80_TAG)->base()[offset & 0x1f];
108	108	}
109	109	else
110	110	{
r14976	r14977
329	329
330	330	if (!m_rome && !BIT(offset, 5))
331	331	{
332		data = machine().region(Z80_TAG)->base()[offset & 0x1f];
	332	data = memregion(Z80_TAG)->base()[offset & 0x1f];
333	333	}
334	334	else
335	335	{

src/mess/drivers/vtech1.c

r14976	r14977
595	595
596	596	if (data >= 1)
597	597	if ((data <= 3 && m_ram_size == 66*1024) || (m_ram_size == 4098*1024))
598		memory_set_bank(machine(), "bank3", data - 1);
	598	membank("bank3")->set_entry(data - 1);
599	599	}
600	600
601	601	WRITE8_MEMBER(vtech1_state::vtech1_video_bank_w)
602	602	{
603	603	logerror("vtech1_video_bank_w $%02X\n", data);
604		memory_set_bank(machine(), "bank4", data & 0x03);
	604	membank("bank4")->set_entry(data & 0x03);
605	605	}
606	606
607	607
r14976	r14977
626	626
627	627	static DRIVER_INIT( vtech1 )
628	628	{
629		vtech1_state *vtech1 = machine.driver_data<vtech1_state>();
	629	vtech1_state *state = machine.driver_data<vtech1_state>();
630	630	address_space *prg = machine.device("maincpu")->memory().space(AS_PROGRAM);
631	631	int id;
632	632
633	633	/* ram */
634		vtech1->m_ram = machine.device<ram_device>(RAM_TAG)->pointer();
635		vtech1->m_ram_size = machine.device<ram_device>(RAM_TAG)->size();
	634	state->m_ram = machine.device<ram_device>(RAM_TAG)->pointer();
	635	state->m_ram_size = machine.device<ram_device>(RAM_TAG)->size();
636	636
637	637	/* setup memory banking */
638		memory_set_bankptr(machine, "bank1", vtech1->m_ram);
	638	state->membank("bank1")->set_base(state->m_ram);
639	639
640	640	/* 16k memory expansion? */
641		if (vtech1->m_ram_size == 18*1024 || vtech1->m_ram_size == 22*1024 || vtech1->m_ram_size == 32*1024)
	641	if (state->m_ram_size == 18*1024 || state->m_ram_size == 22*1024 || state->m_ram_size == 32*1024)
642	642	{
643		offs_t base = 0x7800 + (vtech1->m_ram_size - 0x4000);
	643	offs_t base = 0x7800 + (state->m_ram_size - 0x4000);
644	644	prg->install_readwrite_bank(base, base + 0x3fff, "bank2");
645		memory_set_bankptr(machine, "bank2", vtech1->m_ram + base - 0x7800);
	645	state->membank("bank2")->set_base(state->m_ram + base - 0x7800);
646	646	}
647	647
648	648	/* 64k expansion? */
649		if (vtech1->m_ram_size >= 66*1024)
	649	if (state->m_ram_size >= 66*1024)
650	650	{
651	651	/* install fixed first bank */
652	652	prg->install_readwrite_bank(0x8000, 0xbfff, "bank2");
653		memory_set_bankptr(machine, "bank2", vtech1->m_ram + 0x800);
	653	state->membank("bank2")->set_base(state->m_ram + 0x800);
654	654
655	655	/* install the others, dynamically banked in */
656	656	prg->install_readwrite_bank(0xc000, 0xffff, "bank3");
657		memory_configure_bank(machine, "bank3", 0, (vtech1->m_ram_size - 0x4800) / 0x4000, vtech1->m_ram + 0x4800, 0x4000);
658		memory_set_bank(machine, "bank3", 0);
	657	state->membank("bank3")->configure_entries(0, (state->m_ram_size - 0x4800) / 0x4000, state->m_ram + 0x4800, 0x4000);
	658	state->membank("bank3")->set_entry(0);
659	659	}
660	660
661	661	/* initialize floppy */
662		vtech1->m_drive = -1;
663		vtech1->m_fdc_track_x2[0] = 80;
664		vtech1->m_fdc_track_x2[1] = 80;
665		vtech1->m_fdc_wrprot[0] = 0x80;
666		vtech1->m_fdc_wrprot[1] = 0x80;
667		vtech1->m_fdc_status = 0;
668		vtech1->m_fdc_edge = 0;
669		vtech1->m_fdc_bits = 8;
670		vtech1->m_fdc_start = 0;
671		vtech1->m_fdc_write = 0;
672		vtech1->m_fdc_offs = 0;
673		vtech1->m_fdc_latch = 0;
	662	state->m_drive = -1;
	663	state->m_fdc_track_x2[0] = 80;
	664	state->m_fdc_track_x2[1] = 80;
	665	state->m_fdc_wrprot[0] = 0x80;
	666	state->m_fdc_wrprot[1] = 0x80;
	667	state->m_fdc_status = 0;
	668	state->m_fdc_edge = 0;
	669	state->m_fdc_bits = 8;
	670	state->m_fdc_start = 0;
	671	state->m_fdc_write = 0;
	672	state->m_fdc_offs = 0;
	673	state->m_fdc_latch = 0;
674	674
675	675	for(id=0;id<2;id++)
676	676	{
r14976	r14977
680	680
681	681	static DRIVER_INIT( vtech1h )
682	682	{
683		vtech1_state *vtech1 = machine.driver_data<vtech1_state>();
	683	vtech1_state *state = machine.driver_data<vtech1_state>();
684	684	address_space *prg = machine.device("maincpu")->memory().space(AS_PROGRAM);
685	685
686	686	DRIVER_INIT_CALL(vtech1);
687	687
688	688	/* the SHRG mod replaces the standard videoram chip with an 8k chip */
689		//vtech1->m_videoram_size = 0x2000;
690		//vtech1->m_videoram = auto_alloc_array(machine, UINT8, vtech1->m_videoram_size);
	689	//state->m_videoram_size = 0x2000;
	690	//state->m_videoram = auto_alloc_array(machine, UINT8, state->m_videoram_size);
691	691
692	692	prg->install_readwrite_bank(0x7000, 0x77ff, "bank4");
693		memory_configure_bank(machine, "bank4", 0, 4, vtech1->m_videoram, 0x800);
694		memory_set_bank(machine, "bank4", 0);
	693	state->membank("bank4")->configure_entries(0, 4, state->m_videoram, 0x800);
	694	state->membank("bank4")->set_entry(0);
695	695	}
696	696
697	697	/***************************************************************************

src/mess/drivers/pda600.c

r14976	r14977
109	109
110	110	void pda600_state::video_start()
111	111	{
112		m_video_ram = machine().region("videoram")->base();
	112	m_video_ram = memregion("videoram")->base();
113	113	}
114	114
115	115	UINT32 pda600_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)

src/mess/drivers/camplynx.c

r14976	r14977
112	112	WRITE8_MEMBER( camplynx_state::lynx48k_bank_w )
113	113	{
114	114	if (!data)
115		memory_set_bank(machine(), "bank1", 0);
	115	membank("bank1")->set_entry(0);
116	116	else
117	117	if (data & 2)
118		memory_set_bank(machine(), "bank1", 1);
	118	membank("bank1")->set_entry(1);
119	119	else
120	120	if (data & 4)
121		memory_set_bank(machine(), "bank1", 2);
	121	membank("bank1")->set_entry(2);
122	122	else
123	123	logerror("%04X: Cannot understand bankswitch command %X\n",cpu_get_pc(m_maincpu), data);
124	124	}
r14976	r14977
127	127	{
128	128	/* get address space */
129	129	address_space *mem = m_maincpu->memory().space(AS_PROGRAM);
130		UINT8 *base = mem->machine().region("maincpu")->base();
	130	UINT8 *base = mem->machine().root_device().memregion("maincpu")->base();
131	131
132	132	/* Set read banks */
133	133	UINT8 bank = data & 0x0f;
134	134
135	135	if (!bank)
136	136	{
137		memory_set_bankptr(mem->machine(), "bank1", base + 0x00000);
138		memory_set_bankptr(mem->machine(), "bank2", base + 0x02000);
139		memory_set_bankptr(mem->machine(), "bank3", base + 0x04000);
140		memory_set_bankptr(mem->machine(), "bank4", base + 0x16000);
141		memory_set_bankptr(mem->machine(), "bank5", base + 0x18000);
142		memory_set_bankptr(mem->machine(), "bank6", base + 0x1a000);
143		memory_set_bankptr(mem->machine(), "bank7", base + 0x0c000);
144		memory_set_bankptr(mem->machine(), "bank8", base + 0x0e000);
	137	membank("bank1")->set_base(base + 0x00000);
	138	membank("bank2")->set_base(base + 0x02000);
	139	membank("bank3")->set_base(base + 0x04000);
	140	membank("bank4")->set_base(base + 0x16000);
	141	membank("bank5")->set_base(base + 0x18000);
	142	membank("bank6")->set_base(base + 0x1a000);
	143	membank("bank7")->set_base(base + 0x0c000);
	144	membank("bank8")->set_base(base + 0x0e000);
145	145	}
146	146	else
147	147	if (bank == 0x0e)
148	148	{
149		memory_set_bankptr(mem->machine(), "bank1", base + 0x20000);
150		memory_set_bankptr(mem->machine(), "bank2", base + 0x22000);
151		memory_set_bankptr(mem->machine(), "bank3", base + 0x24000);
152		memory_set_bankptr(mem->machine(), "bank4", base + 0x26000);
153		memory_set_bankptr(mem->machine(), "bank5", base + 0x28000);
154		memory_set_bankptr(mem->machine(), "bank6", base + 0x2a000);
155		memory_set_bankptr(mem->machine(), "bank7", base + 0x2c000);
156		memory_set_bankptr(mem->machine(), "bank8", base + 0x2e000);
	149	membank("bank1")->set_base(base + 0x20000);
	150	membank("bank2")->set_base(base + 0x22000);
	151	membank("bank3")->set_base(base + 0x24000);
	152	membank("bank4")->set_base(base + 0x26000);
	153	membank("bank5")->set_base(base + 0x28000);
	154	membank("bank6")->set_base(base + 0x2a000);
	155	membank("bank7")->set_base(base + 0x2c000);
	156	membank("bank8")->set_base(base + 0x2e000);
157	157	}
158	158	else
159	159	logerror("%04X: Cannot understand bankswitch command %X\n",cpu_get_pc(m_maincpu), data);
r14976	r14977
163	163
164	164	if (!bank)
165	165	{
166		memory_set_bankptr(mem->machine(), "bank11", base + 0x10000);
167		memory_set_bankptr(mem->machine(), "bank12", base + 0x12000);
168		memory_set_bankptr(mem->machine(), "bank13", base + 0x14000);
169		memory_set_bankptr(mem->machine(), "bank14", base + 0x16000);
170		memory_set_bankptr(mem->machine(), "bank15", base + 0x18000);
171		memory_set_bankptr(mem->machine(), "bank16", base + 0x1a000);
172		memory_set_bankptr(mem->machine(), "bank17", base + 0x1c000);
173		memory_set_bankptr(mem->machine(), "bank18", base + 0x1e000);
	166	membank("bank11")->set_base(base + 0x10000);
	167	membank("bank12")->set_base(base + 0x12000);
	168	membank("bank13")->set_base(base + 0x14000);
	169	membank("bank14")->set_base(base + 0x16000);
	170	membank("bank15")->set_base(base + 0x18000);
	171	membank("bank16")->set_base(base + 0x1a000);
	172	membank("bank17")->set_base(base + 0x1c000);
	173	membank("bank18")->set_base(base + 0x1e000);
174	174	}
175	175	else
176	176	if (bank == 0xc0)
177	177	{
178		memory_set_bankptr(mem->machine(), "bank11", base + 0x20000);
179		memory_set_bankptr(mem->machine(), "bank12", base + 0x22000);
180		memory_set_bankptr(mem->machine(), "bank13", base + 0x24000);
181		memory_set_bankptr(mem->machine(), "bank14", base + 0x26000);
182		memory_set_bankptr(mem->machine(), "bank15", base + 0x28000);
183		memory_set_bankptr(mem->machine(), "bank16", base + 0x2a000);
184		memory_set_bankptr(mem->machine(), "bank17", base + 0x2c000);
185		memory_set_bankptr(mem->machine(), "bank18", base + 0x2e000);
	178	membank("bank11")->set_base(base + 0x20000);
	179	membank("bank12")->set_base(base + 0x22000);
	180	membank("bank13")->set_base(base + 0x24000);
	181	membank("bank14")->set_base(base + 0x26000);
	182	membank("bank15")->set_base(base + 0x28000);
	183	membank("bank16")->set_base(base + 0x2a000);
	184	membank("bank17")->set_base(base + 0x2c000);
	185	membank("bank18")->set_base(base + 0x2e000);
186	186	}
187	187	else
188	188	logerror("%04X: Cannot understand bankswitch command %X\n",cpu_get_pc(m_maincpu), data);
r14976	r14977
379	379
380	380	static MC6845_UPDATE_ROW( lynx48k_update_row )
381	381	{
382		UINT8 *RAM = device->machine().region("maincpu")->base();
	382	UINT8 *RAM = device->machine().root_device().memregion("maincpu")->base();
383	383	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
384	384	UINT8 r,g,b;
385	385	UINT32 x, *p = &bitmap.pix32(y);
r14976	r14977
403	403
404	404	static MC6845_UPDATE_ROW( lynx128k_update_row )
405	405	{
406		UINT8 *RAM = device->machine().region("maincpu")->base();
	406	UINT8 *RAM = device->machine().root_device().memregion("maincpu")->base();
407	407	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
408	408	UINT8 r,g,b;
409	409	UINT32 x, *p = &bitmap.pix32(y);
r14976	r14977
514	514
515	515	static DRIVER_INIT( lynx48k )
516	516	{
517		UINT8 *RAM = machine.region("maincpu")->base();
518		memory_configure_bank(machine, "bank1", 0, 3, &RAM[0x8000],  0x8000);
	517	camplynx_state *state = machine.driver_data<camplynx_state>();
	518	UINT8 *RAM = state->memregion("maincpu")->base();
	519	state->membank("bank1")->configure_entries(0, 3, &RAM[0x8000],  0x8000);
519	520	}
520	521
521	522

src/mess/drivers/ng_aes.c

r14976	r14977
557	557	static void _set_main_cpu_vector_table_source( running_machine &machine )
558	558	{
559	559	neogeo_state *state = machine.driver_data<neogeo_state>();
560		memory_set_bank(machine, NEOGEO_BANK_VECTORS, state->m_main_cpu_vector_table_source);
	560	state->membank(NEOGEO_BANK_VECTORS)->set_entry(state->m_main_cpu_vector_table_source);
561	561	}
562	562
563	563
r14976	r14977
573	573	static void _set_main_cpu_bank_address( running_machine &machine )
574	574	{
575	575	neogeo_state *state = machine.driver_data<neogeo_state>();
576		memory_set_bankptr(machine, NEOGEO_BANK_CARTRIDGE, &machine.region("maincpu")->base()[state->m_main_cpu_bank_address]);
	576	state->membank(NEOGEO_BANK_CARTRIDGE)->set_base(&state->memregion("maincpu")->base()[state->m_main_cpu_bank_address]);
577	577	}
578	578
579	579
r14976	r14977
581	581	WRITE16_MEMBER(ng_aes_state::main_cpu_bank_select_w)
582	582	{
583	583	UINT32 bank_address;
584		UINT32 len = machine().region("maincpu")->bytes();
	584	UINT32 len = memregion("maincpu")->bytes();
585	585
586	586	if ((len <= 0x100000) && (data & 0x07))
587	587	logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", cpu_get_pc(&space.device()), data);
r14976	r14977
602	602
603	603	static void main_cpu_banking_init( running_machine &machine )
604	604	{
	605	ng_aes_state *state = machine.driver_data<ng_aes_state>();
605	606	address_space *mainspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
606	607
607	608	/* create vector banks */
608		memory_configure_bank(machine, NEOGEO_BANK_VECTORS, 0, 1, machine.region("mainbios")->base(), 0);
609		memory_configure_bank(machine, NEOGEO_BANK_VECTORS, 1, 1, machine.region("maincpu")->base(), 0);
	609	state->membank(NEOGEO_BANK_VECTORS)->configure_entry(0, machine.root_device().memregion("mainbios")->base());
	610	state->membank(NEOGEO_BANK_VECTORS)->configure_entry(1, machine.root_device().memregion("maincpu")->base());
610	611
611	612	/* set initial main CPU bank */
612		if (machine.region("maincpu")->bytes() > 0x100000)
	613	if (machine.root_device().memregion("maincpu")->bytes() > 0x100000)
613	614	neogeo_set_main_cpu_bank_address(mainspace, 0x100000);
614	615	else
615	616	neogeo_set_main_cpu_bank_address(mainspace, 0x000000);
r14976	r14977
629	630	int region;
630	631
631	632	for (region = 0; region < 4; region++)
632		memory_set_bank(machine, NEOGEO_BANK_AUDIO_CPU_CART_BANK + region, state->m_audio_cpu_banks[region]);
	633	state->membank(NEOGEO_BANK_AUDIO_CPU_CART_BANK + region)->set_entry(state->m_audio_cpu_banks[region]);
633	634	}
634	635
635	636
r14976	r14977
681	682	{
682	683	neogeo_state *state = space->machine().driver_data<neogeo_state>();
683	684
684		/*  if (!machine.region("audiobios")->base())   */
	685	/*  if (!state->memregion("audiobios")->base())   */
685	686	state->m_audio_cpu_rom_source = 1;
686	687
687		memory_set_bank(space->machine(), NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, state->m_audio_cpu_rom_source);
	688	state->membank(NEOGEO_BANK_AUDIO_CPU_MAIN_BANK)->set_entry(state->m_audio_cpu_rom_source);
688	689
689	690	/* reset CPU if the source changed -- this is a guess */
690	691	if (state->m_audio_cpu_rom_source != state->m_audio_cpu_rom_source_last)
r14976	r14977
716	717	UINT32 address_mask;
717	718
718	719	/* audio bios/cartridge selection */
719		if (machine.region("audiobios")->base())
720		memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, 0, 1, machine.region("audiobios")->base(), 0);
721		memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, 1, 1, machine.region("audiocpu")->base(), 0);
	720	if (machine.root_device().memregion("audiobios")->base())
	721	state->membank(NEOGEO_BANK_AUDIO_CPU_MAIN_BANK)->configure_entry(0, machine.root_device().memregion("audiobios")->base());
	722	state->membank(NEOGEO_BANK_AUDIO_CPU_MAIN_BANK)->configure_entry(1, machine.root_device().memregion("audiocpu")->base());
722	723
723	724	/* audio banking */
724		address_mask = machine.region("audiocpu")->bytes() - 0x10000 - 1;
	725	address_mask = machine.root_device().memregion("audiocpu")->bytes() - 0x10000 - 1;
725	726
726		rgn = machine.region("audiocpu")->base();
	727	rgn = state->memregion("audiocpu")->base();
727	728	for (region = 0; region < 4; region++)
728	729	{
729	730	for (bank = 0; bank < 0x100; bank++)
730	731	{
731	732	UINT32 bank_address = 0x10000 + (((bank << (11 + region)) & 0x3ffff) & address_mask);
732		memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_CART_BANK + region, bank, 1, &rgn[bank_address], 0);
	733	state->membank(NEOGEO_BANK_AUDIO_CPU_CART_BANK + region)->configure_entry(bank, &rgn[bank_address]);
733	734	}
734	735	}
735	736
r14976	r14977
1001	1002	READ16_MEMBER(ng_aes_state::neocd_transfer_r)
1002	1003	{
1003	1004	UINT16 ret = 0x0000;
1004		UINT8* Z80 = machine().region("audiocpu")->base();
1005		UINT8* PCM = machine().region("ymsnd")->base();
1006		UINT8* FIX = machine().region("fixed")->base();
1007		UINT16* SPR = (UINT16*)(*machine().region("sprites"));
	1005	UINT8* Z80 = memregion("audiocpu")->base();
	1006	UINT8* PCM = memregion("ymsnd")->base();
	1007	UINT8* FIX = memregion("fixed")->base();
	1008	UINT16* SPR = (UINT16*)(*machine().root_device().memregion("sprites"));
1008	1009
1009	1010	switch(m_neocd_ctrl.area_sel)
1010	1011	{
r14976	r14977
1027	1028
1028	1029	WRITE16_MEMBER(ng_aes_state::neocd_transfer_w)
1029	1030	{
1030		UINT8* Z80 = machine().region("audiocpu")->base();
1031		UINT8* PCM = machine().region("ymsnd")->base();
1032		UINT8* FIX = machine().region("fixed")->base();
1033		UINT16* SPR = (UINT16*)(*machine().region("sprites"));
	1031	UINT8* Z80 = memregion("audiocpu")->base();
	1032	UINT8* PCM = memregion("ymsnd")->base();
	1033	UINT8* FIX = memregion("fixed")->base();
	1034	UINT16* SPR = (UINT16*)(*machine().root_device().memregion("sprites"));
1034	1035
1035	1036	switch(m_neocd_ctrl.area_sel)
1036	1037	{
r14976	r14977
1150	1151	neogeo_state *state = machine.driver_data<neogeo_state>();
1151	1152
1152	1153	/* set the BIOS bank */
1153		memory_set_bankptr(machine, NEOGEO_BANK_BIOS, machine.region("mainbios")->base());
	1154	state->membank(NEOGEO_BANK_BIOS)->set_base(state->memregion("mainbios")->base());
1154	1155
1155	1156	/* set the initial main CPU bank */
1156	1157	main_cpu_banking_init(machine);
r14976	r14977
1205	1206	static MACHINE_START(neocd)
1206	1207	{
1207	1208	ng_aes_state *state = machine.driver_data<ng_aes_state>();
1208		UINT8* ROM = machine.region("mainbios")->base();
1209		UINT8* RAM = machine.region("maincpu")->base();
1210		UINT8* Z80bios = machine.region("audiobios")->base();
1211		UINT8* FIXbios = machine.region("fixedbios")->base();
	1209	UINT8* ROM = machine.root_device().memregion("mainbios")->base();
	1210	UINT8* RAM = machine.root_device().memregion("maincpu")->base();
	1211	UINT8* Z80bios = machine.root_device().memregion("audiobios")->base();
	1212	UINT8* FIXbios = state->memregion("fixedbios")->base();
1212	1213	int x;
1213	1214
1214	1215	common_machine_start(machine);

src/mess/drivers/bml3.c

r14976	r14977
131	131	static VIDEO_START( bml3 )
132	132	{
133	133	bml3_state *state = machine.driver_data<bml3_state>();
134		state->m_p_chargen = machine.region("chargen")->base();
	134	state->m_p_chargen = state->memregion("chargen")->base();
135	135	}
136	136
137	137	static SCREEN_UPDATE_IND16( bml3 )
r14976	r14977
140	140	int x,y,count;
141	141	int xi,yi;
142	142	int width; //,height;
143		UINT8 *vram = screen.machine().region("vram")->base();
	143	UINT8 *vram = state->memregion("vram")->base();
144	144
145	145	count = 0x0000;
146	146
r14976	r14977
274	274
275	275	READ8_MEMBER( bml3_state::bml3_vram_r )
276	276	{
277		UINT8 *vram = machine().region("vram")->base();
	277	UINT8 *vram = memregion("vram")->base();
278	278
279	279	/* TODO: this presumably also triggers an attr latch read, unsure yet */
280	280	m_attr_latch = vram[offset+0x4000];
r14976	r14977
284	284
285	285	WRITE8_MEMBER( bml3_state::bml3_vram_w )
286	286	{
287		UINT8 *vram = machine().region("vram")->base();
	287	UINT8 *vram = memregion("vram")->base();
288	288
289	289	vram[offset] = data;
290	290	vram[offset+0x4000] = m_attr_latch;
r14976	r14977
637	637	address_space *mem = m_maincpu->memory().space(AS_PROGRAM);
638	638
639	639	/* defaults */
640		mem->install_rom(0xa000, 0xfeff,mem->machine().
641		region("maincpu")->base() + 0xa000);
642		mem->install_rom(0xfff0, 0xffff,mem->machine().
643		region("maincpu")->base() + 0xfff0);
644		mem->install_write_handler(0xa000, 0xbfff, 0, 0,
645		write8_delegate(FUNC(bml3_state::bml3_a000_w), this),
646		0);
647		mem->install_write_handler(0xc000, 0xdfff, 0, 0,
648		write8_delegate(FUNC(bml3_state::bml3_c000_w), this),
649		0);
650		mem->install_write_handler(0xe000, 0xefff, 0, 0,
651		write8_delegate(FUNC(bml3_state::bml3_e000_w), this),
652		0);
653		mem->install_write_handler(0xf000, 0xfeff, 0, 0,
654		write8_delegate(FUNC(bml3_state::bml3_f000_w), this),
655		0);
656		mem->install_write_handler(0xfff0, 0xffff, 0, 0,
657		write8_delegate(FUNC(bml3_state::bml3_fff0_w), this),
658		0);
	640	mem->install_rom(0xa000, 0xfeff,mem->machine().root_device().memregion("maincpu")->base() + 0xa000);
	641	mem->install_rom(0xfff0, 0xffff,mem->machine().root_device().memregion("maincpu")->base() + 0xfff0);
	642	mem->install_write_handler(0xa000, 0xbfff, 0, 0,write8_delegate(FUNC(bml3_state::bml3_a000_w), this),0);
	643	mem->install_write_handler(0xc000, 0xdfff, 0, 0,write8_delegate(FUNC(bml3_state::bml3_c000_w), this),0);
	644	mem->install_write_handler(0xe000, 0xefff, 0, 0,write8_delegate(FUNC(bml3_state::bml3_e000_w), this),0);
	645	mem->install_write_handler(0xf000, 0xfeff, 0, 0,write8_delegate(FUNC(bml3_state::bml3_f000_w), this),0);
	646	mem->install_write_handler(0xfff0, 0xffff, 0, 0,write8_delegate(FUNC(bml3_state::bml3_fff0_w), this),0);
659	647
660	648	m_firq_mask = -1; // disable firq
661	649	}
r14976	r14977
737	725	else
738	726	{
739	727	mem->install_rom(0xa000, 0xbfff,
740		mem->machine().region("maincpu")->base() + 0xa000);
	728	mem->machine().root_device().memregion("maincpu")->base() + 0xa000);
741	729	mem->install_write_handler(0xa000, 0xbfff, 0, 0,
742	730	write8_delegate(FUNC(bml3_state::bml3_a000_w), this),
743	731	0);
r14976	r14977
755	743	else
756	744	{
757	745	mem->install_rom(0xc000, 0xdfff,
758		mem->machine().region("maincpu")->base() + 0xc000);
	746	mem->machine().root_device().memregion("maincpu")->base() + 0xc000);
759	747	mem->install_write_handler(0xc000, 0xdfff, 0, 0,
760	748	write8_delegate(FUNC(bml3_state::bml3_c000_w), this),
761	749	0);
r14976	r14977
773	761	else
774	762	{
775	763	mem->install_rom(0xe000, 0xefff,
776		mem->machine().region("maincpu")->base() + 0xe000);
	764	mem->machine().root_device().memregion("maincpu")->base() + 0xe000);
777	765	mem->install_write_handler(0xe000, 0xefff, 0, 0,
778	766	write8_delegate(FUNC(bml3_state::bml3_e000_w), this),
779	767	0);
r14976	r14977
789	777	else
790	778	{
791	779	mem->install_rom(0xf000, 0xfeff,
792		mem->machine().region("maincpu")->base() + 0xf000);
	780	mem->machine().root_device().memregion("maincpu")->base() + 0xf000);
793	781	mem->install_write_handler(0xf000, 0xfeff, 0, 0,
794	782	write8_delegate(FUNC(bml3_state::bml3_f000_w), this),
795	783	0);
r14976	r14977
804	792	else
805	793	{
806	794	mem->install_rom(0xfff0, 0xffff,
807		mem->machine().region("maincpu")->base() + 0xfff0);
	795	mem->machine().root_device().memregion("maincpu")->base() + 0xfff0);
808	796	mem->install_write_handler(0xfff0, 0xffff, 0, 0,
809	797	write8_delegate(FUNC(bml3_state::bml3_fff0_w), this),
810	798	0);

src/mess/drivers/kyocera.c

r14976	r14977
123	123	program->unmap_write(0x0000, 0x7fff);
124	124	}
125	125
126		memory_set_bank(machine(), "bank1", rom_bank);
	126	membank("bank1")->set_entry(rom_bank);
127	127
128	128	switch (ram_bank)
129	129	{
r14976	r14977
158	158	break;
159	159	}
160	160
161		memory_set_bank(machine(), "bank2", ram_bank);
	161	membank("bank2")->set_entry(ram_bank);
162	162	}
163	163
164	164	WRITE8_MEMBER( pc8201_state::bank_w )
r14976	r14977
391	391
392	392	if (m_rom_sel)
393	393	{
394		data = machine().region("option")->base()[m_rom_addr & 0x1ffff];
	394	data = memregion("option")->base()[m_rom_addr & 0x1ffff];
395	395	}
396	396
397	397	return data;
r14976	r14977
435	435	*/
436	436
437	437	/* ROM bank selection */
438		memory_set_bank(machine(), "bank1", BIT(data, 0));
	438	membank("bank1")->set_entry(BIT(data, 0));
439	439
440	440	/* printer strobe */
441	441	m_centronics->strobe_w(BIT(data, 1));
r14976	r14977
470	470	{
471	471	program->install_read_bank(0x0000, 0x7fff, "bank1");
472	472	program->unmap_write(0x0000, 0x7fff);
473		memory_set_bank(machine(), "bank1", rom_bank);
	473	membank("bank1")->set_entry(rom_bank);
474	474	}
475	475
476	476	if (m_ram->size() < ((ram_bank + 1) * 24 * 1024))
r14976	r14977
481	481	else
482	482	{
483	483	program->install_readwrite_bank(0xa000, 0xffff, "bank2");
484		memory_set_bank(machine(), "bank2", ram_bank);
	484	membank("bank2")->set_entry(ram_bank);
485	485	}
486	486	}
487	487
r14976	r14977
1136	1136	/* configure ROM banking */
1137	1137	program->install_read_bank(0x0000, 0x7fff, "bank1");
1138	1138	program->unmap_write(0x0000, 0x7fff);
1139		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(I8085_TAG)->base(), 0);
1140		memory_configure_bank(machine(), "bank1", 1, 1, machine().region("option")->base(), 0);
1141		memory_set_bank(machine(), "bank1", 0);
	1139	membank("bank1")->configure_entry(0, memregion(I8085_TAG)->base());
	1140	membank("bank1")->configure_entry(1, memregion("option")->base());
	1141	membank("bank1")->set_entry(0);
1142	1142
1143	1143	/* configure RAM banking */
1144	1144	switch (m_ram->size())
r14976	r14977
1153	1153	break;
1154	1154	}
1155	1155
1156		memory_configure_bank(machine(), "bank2", 0, 1, m_ram->pointer(), 0);
1157		memory_set_bank(machine(), "bank2", 0);
	1156	membank("bank2")->configure_entry(0, m_ram->pointer());
	1157	membank("bank2")->set_entry(0);
1158	1158
1159	1159	/* register for state saving */
1160	1160	save_item(NAME(m_bank));
r14976	r14977
1172	1172	m_rtc->oe_w(1);
1173	1173
1174	1174	/* configure ROM banking */
1175		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(I8085_TAG)->base(), 0);
1176		memory_configure_bank(machine(), "bank1", 1, 1, machine().region("option")->base(), 0);
1177		memory_configure_bank(machine(), "bank1", 2, 2, ram + 0x8000, 0x8000);
1178		memory_set_bank(machine(), "bank1", 0);
	1175	membank("bank1")->configure_entry(0, memregion(I8085_TAG)->base());
	1176	membank("bank1")->configure_entry(1, memregion("option")->base());
	1177	membank("bank1")->configure_entries(2, 2, ram + 0x8000, 0x8000);
	1178	membank("bank1")->set_entry(0);
1179	1179
1180	1180	/* configure RAM banking */
1181		memory_configure_bank(machine(), "bank2", 0, 1, ram, 0);
1182		memory_configure_bank(machine(), "bank2", 2, 2, ram + 0x8000, 0x8000);
1183		memory_set_bank(machine(), "bank2", 0);
	1181	membank("bank2")->configure_entry(0, ram);
	1182	membank("bank2")->configure_entries(2, 2, ram + 0x8000, 0x8000);
	1183	membank("bank2")->set_entry(0);
1184	1184
1185	1185	bankswitch(0);
1186	1186
r14976	r14977
1203	1203	/* configure ROM banking */
1204	1204	program->install_read_bank(0x0000, 0x7fff, "bank1");
1205	1205	program->unmap_write(0x0000, 0x7fff);
1206		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(I8085_TAG)->base(), 0);
1207		memory_configure_bank(machine(), "bank1", 1, 1, machine().region("option")->base(), 0);
1208		memory_set_bank(machine(), "bank1", 0);
	1206	membank("bank1")->configure_entry(0, memregion(I8085_TAG)->base());
	1207	membank("bank1")->configure_entry(1, memregion("option")->base());
	1208	membank("bank1")->set_entry(0);
1209	1209
1210	1210	/* configure RAM banking */
1211	1211	switch (m_ram->size())
r14976	r14977
1230	1230	break;
1231	1231	}
1232	1232
1233		memory_configure_bank(machine(), "bank2", 0, 1, m_ram->pointer(), 0);
1234		memory_set_bank(machine(), "bank2", 0);
	1233	membank("bank2")->configure_entry(0, m_ram->pointer());
	1234	membank("bank2")->set_entry(0);
1235	1235
1236	1236	/* register for state saving */
1237	1237	save_item(NAME(m_bank));
r14976	r14977
1243	1243	void tandy200_state::machine_start()
1244	1244	{
1245	1245	/* configure ROM banking */
1246		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(I8085_TAG)->base(), 0);
1247		memory_configure_bank(machine(), "bank1", 1, 1, machine().region(I8085_TAG)->base() + 0x10000, 0);
1248		memory_configure_bank(machine(), "bank1", 2, 1, machine().region("option")->base(), 0);
1249		memory_set_bank(machine(), "bank1", 0);
	1246	membank("bank1")->configure_entry(0, memregion(I8085_TAG)->base());
	1247	membank("bank1")->configure_entry(1, memregion(I8085_TAG)->base() + 0x10000);
	1248	membank("bank1")->configure_entry(2, memregion("option")->base());
	1249	membank("bank1")->set_entry(0);
1250	1250
1251	1251	/* configure RAM banking */
1252		memory_configure_bank(machine(), "bank2", 0, 3, m_ram->pointer(), 0x6000);
1253		memory_set_bank(machine(), "bank2", 0);
	1252	membank("bank2")->configure_entries(0, 3, m_ram->pointer(), 0x6000);
	1253	membank("bank2")->set_entry(0);
1254	1254
1255	1255	/* register for state saving */
1256	1256	save_item(NAME(m_bank));

src/mess/drivers/mccpm.c

r14976	r14977
112	112
113	113	MACHINE_RESET_MEMBER( mccpm_state )
114	114	{
115		UINT8* bios = machine().region("maincpu")->base();
	115	UINT8* bios = memregion("maincpu")->base();
116	116	memcpy(m_p_ram, bios, 0x1000);
117	117	}
118	118

src/mess/drivers/systec.c

r14976	r14977
93	93
94	94	static MACHINE_RESET(systec)
95	95	{
96		UINT8 *m_p_maincpu = machine.region("maincpu")->base();
97		UINT8 *m_p_roms = machine.region("roms")->base();
	96	UINT8 *m_p_maincpu = machine.root_device().memregion("maincpu")->base();
	97	UINT8 *m_p_roms = machine.root_device().memregion("roms")->base();
98	98	memcpy(m_p_maincpu, m_p_roms, 0x2000);
99	99	}
100	100

src/mess/drivers/tutor.c

r14976	r14977
225	225	tutor_state *state = machine.driver_data<tutor_state>();
226	226	state->m_tape_interrupt_timer = machine.scheduler().timer_alloc(FUNC(tape_interrupt_handler));
227	227
228		memory_configure_bank(machine, "bank1", 0, 1, machine.region("maincpu")->base() + basic_base, 0);
229		memory_configure_bank(machine, "bank1", 1, 1, machine.region("maincpu")->base() + cartridge_base, 0);
230		memory_set_bank(machine, "bank1", 0);
	228	state->membank("bank1")->configure_entry(0, machine.root_device().memregion("maincpu")->base() + basic_base);
	229	state->membank("bank1")->configure_entry(1, state->memregion("maincpu")->base() + cartridge_base);
	230	state->membank("bank1")->set_entry(0);
231	231	}
232	232
233	233
234	234	static DRIVER_INIT(pyuuta)
235	235	{
236	236	DRIVER_INIT_CALL(tutor);
237		memory_set_bank(machine, "bank1", 1);
	237	tutor_state *state = machine.driver_data<tutor_state>();
	238	state->membank("bank1")->set_entry(1);
238	239	}
239	240
240	241
r14976	r14977
296	297	static DEVICE_IMAGE_LOAD( tutor_cart )
297	298	{
298	299	UINT32 size;
299		UINT8 *ptr = image.device().machine().region("maincpu")->base();
	300	UINT8 *ptr = image.device().machine().root_device().memregion("maincpu")->base();
300	301
301	302	if (image.software_entry() == NULL)
302	303	{
r14976	r14977
315	316
316	317	static DEVICE_IMAGE_UNLOAD( tutor_cart )
317	318	{
318		memset(image.device().machine().region("maincpu")->base() + cartridge_base, 0, 0x6000);
	319	memset(image.device().machine().root_device().memregion("maincpu")->base() + cartridge_base, 0, 0x6000);
319	320	}
320	321
321	322	/*
r14976	r14977
363	364	case 0x08:
364	365	/* disable cartridge ROM, enable BASIC ROM at base >8000 */
365	366	m_cartridge_enable = 0;
366		memory_set_bank(machine(), "bank1", 0);
	367	membank("bank1")->set_entry(0);
367	368	break;
368	369
369	370	case 0x0c:
370	371	/* enable cartridge ROM, disable BASIC ROM at base >8000 */
371	372	m_cartridge_enable = 1;
372		memory_set_bank(machine(), "bank1", 1);
	373	membank("bank1")->set_entry(1);
373	374	break;
374	375
375	376	default:

src/mess/drivers/z1013.c

r14976	r14977
187	187	VIDEO_START( z1013 )
188	188	{
189	189	z1013_state *state = machine.driver_data<z1013_state>();
190		state->m_p_chargen = machine.region("chargen")->base();
	190	state->m_p_chargen = state->memregion("chargen")->base();
191	191	}
192	192
193	193	SCREEN_UPDATE_IND16( z1013 )

src/mess/drivers/comx35.c

r14976	r14977
24	24
25	25	READ8_MEMBER( comx35_state::mem_r )
26	26	{
27		UINT8 *rom = machine().region(CDP1802_TAG)->base();
	27	UINT8 *rom = memregion(CDP1802_TAG)->base();
28	28	UINT8 *ram = m_ram->pointer();
29	29	int extrom = 1;
30	30

src/mess/drivers/trs80.c

r14976	r14977
892	892	trs80_state *state = machine.driver_data<trs80_state>();
893	893	state->m_mode = 0;
894	894	state->m_model4 = 2;
895		state->m_p_videoram.set_target(machine.region("maincpu")->base()+0x4000,state->m_p_videoram.bytes());
	895	state->m_p_videoram.set_target(state->memregion("maincpu")->base()+0x4000,state->m_p_videoram.bytes());
896	896	}
897	897
898	898	static DRIVER_INIT( trs80m4p )
r14976	r14977
900	900	trs80_state *state = machine.driver_data<trs80_state>();
901	901	state->m_mode = 0;
902	902	state->m_model4 = 4;
903		state->m_p_videoram.set_target(machine.region("maincpu")->base()+0x4000,state->m_p_videoram.bytes());
	903	state->m_p_videoram.set_target(state->memregion("maincpu")->base()+0x4000,state->m_p_videoram.bytes());
904	904	}
905	905
906	906	static DRIVER_INIT( lnw80 )
r14976	r14977
908	908	trs80_state *state = machine.driver_data<trs80_state>();
909	909	state->m_mode = 0;
910	910	state->m_model4 = 0;
911		state->m_p_gfxram = machine.region("gfx2")->base();
912		state->m_p_videoram.set_target(machine.region("maincpu")->base()+0x4000,state->m_p_videoram.bytes());
	911	state->m_p_gfxram = machine.root_device().memregion("gfx2")->base();
	912	state->m_p_videoram.set_target(state->memregion("maincpu")->base()+0x4000,state->m_p_videoram.bytes());
913	913	}
914	914
915	915	/*    YEAR  NAME      PARENT  COMPAT  MACHINE     INPUT    INIT         COMPANY           FULLNAME */

src/mess/drivers/digel804.c

r14976	r14977
174	174	state->m_powerfail_state = 1; // "O11"
175	175	state->m_chipinsert_state = 0; // PIN
176	176	state->m_ram_bank = 0;
177		memory_set_bankptr( machine, "bankedram", machine.region("user_ram")->base() + ( state->m_ram_bank * 0x10000 ));
	177	state->membank( "bankedram" )->set_base( state->memregion("user_ram")->base() + ( state->m_ram_bank * 0x10000 ));
178	178	machine.scheduler().timer_set(attotime::from_hz(10000), FUNC(ep804_kbd_callback));
179	179	}
180	180
r14976	r14977
290	290	m_ram_bank = data&7;
291	291	if ((data&0xF8)!=0)
292	292	logerror("Digel804: port 0x43 ram bank had unexpected data %02x written to it!\n", data);
293		memory_set_bankptr( machine(), "bankedram", machine().region("user_ram")->base() + ( m_ram_bank * 0x10000 ));
	293	membank( "bankedram" )->set_base( memregion("user_ram")->base() + ( m_ram_bank * 0x10000 ));
294	294
295	295	}
296	296

src/mess/drivers/tiki100.c

r14976	r14977
59	59	program->install_readwrite_handler(0x0000, 0x7fff, read8_delegate(FUNC(tiki100_state::gfxram_r), this), write8_delegate(FUNC(tiki100_state::gfxram_w), this));
60	60	program->install_readwrite_bank(0x8000, 0xffff, "bank3");
61	61
62		memory_set_bank(machine(), "bank1", BANK_VIDEO_RAM);
63		memory_set_bank(machine(), "bank2", BANK_VIDEO_RAM);
64		memory_set_bank(machine(), "bank3", BANK_RAM);
	62	membank("bank1")->set_entry(BANK_VIDEO_RAM);
	63	membank("bank2")->set_entry(BANK_VIDEO_RAM);
	64	membank("bank3")->set_entry(BANK_RAM);
65	65	}
66	66	}
67	67	else
r14976	r14977
74	74	program->install_readwrite_bank(0x4000, 0x7fff, "bank2");
75	75	program->install_readwrite_bank(0x8000, 0xffff, "bank3");
76	76
77		memory_set_bank(machine(), "bank1", BANK_ROM);
78		memory_set_bank(machine(), "bank2", BANK_RAM);
79		memory_set_bank(machine(), "bank3", BANK_RAM);
	77	membank("bank1")->set_entry(BANK_ROM);
	78	membank("bank2")->set_entry(BANK_RAM);
	79	membank("bank3")->set_entry(BANK_RAM);
80	80	}
81	81	else
82	82	{
r14976	r14977
85	85	program->install_readwrite_bank(0x4000, 0x7fff, "bank2");
86	86	program->install_readwrite_bank(0x8000, 0xffff, "bank3");
87	87
88		memory_set_bank(machine(), "bank1", BANK_RAM);
89		memory_set_bank(machine(), "bank2", BANK_RAM);
90		memory_set_bank(machine(), "bank3", BANK_RAM);
	88	membank("bank1")->set_entry(BANK_RAM);
	89	membank("bank2")->set_entry(BANK_RAM);
	90	membank("bank3")->set_entry(BANK_RAM);
91	91	}
92	92	}
93	93	}
r14976	r14977
554	554	/* setup memory banking */
555	555	UINT8 *ram = m_ram->pointer();
556	556
557		memory_configure_bank(machine(), "bank1", BANK_ROM, 1, machine().region(Z80_TAG)->base(), 0);
558		memory_configure_bank(machine(), "bank1", BANK_RAM, 1, ram, 0);
559		memory_configure_bank(machine(), "bank1", BANK_VIDEO_RAM, 1, m_video_ram, 0);
	557	membank("bank1")->configure_entry(BANK_ROM, memregion(Z80_TAG)->base());
	558	membank("bank1")->configure_entry(BANK_RAM, ram);
	559	membank("bank1")->configure_entry(BANK_VIDEO_RAM, m_video_ram);
560	560
561		memory_configure_bank(machine(), "bank2", BANK_RAM, 1, ram + 0x4000, 0);
562		memory_configure_bank(machine(), "bank2", BANK_VIDEO_RAM, 1, m_video_ram + 0x4000, 0);
	561	membank("bank2")->configure_entry(BANK_RAM, ram + 0x4000);
	562	membank("bank2")->configure_entry(BANK_VIDEO_RAM, m_video_ram + 0x4000);
563	563
564		memory_configure_bank(machine(), "bank3", BANK_RAM, 1, ram + 0x8000, 0);
	564	membank("bank3")->configure_entry(BANK_RAM, ram + 0x8000);
565	565
566	566	bankswitch();
567	567

src/mess/drivers/atm.c

r14976	r14977
43	43	{
44	44	m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ? 1 : 0;
45	45	betadisk_disable(beta);
46		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
	46	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
47	47	}
48	48	}
49	49	else if (((pc & 0xff00) == 0x3d00) && (m_ROMSelection==1))
r14976	r14977
56	56	if(address<=0x3fff)
57	57	{
58	58	if (m_ROMSelection == 3) {
59		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine().region("maincpu")->base() + 0x018000);
60		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x018000);
	59	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, memregion("maincpu")->base() + 0x018000);
	60	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x018000);
61	61	} else {
62		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine().region("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
63		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
	62	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
	63	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x010000 + (m_ROMSelection<<14));
64	64	}
65	65	return ~0;
66	66	}
r14976	r14977
75	75
76	76	state->m_screen_location = messram + ((state->m_port_7ffd_data & 8) ? (7<<14) : (5<<14));
77	77
78		memory_set_bankptr(machine, "bank4", messram + ((state->m_port_7ffd_data & 0x07) * 0x4000));
	78	state->membank("bank4")->set_base(messram + ((state->m_port_7ffd_data & 0x07) * 0x4000));
79	79
80	80	if (beta->started() && betadisk_is_active(beta) && !( state->m_port_7ffd_data & 0x10 ) )
81	81	{
r14976	r14977
86	86	state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ;
87	87	}
88	88	/* rom 0 is 128K rom, rom 1 is 48 BASIC */
89		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	89	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
90	90	}
91	91
92	92	WRITE8_MEMBER(atm_state::atm_port_7ffd_w)
r14976	r14977
135	135	memset(messram,0,128*1024);
136	136
137	137	/* Bank 5 is always in 0x4000 - 0x7fff */
138		memory_set_bankptr(machine, "bank2", messram + (5<<14));
	138	state->membank("bank2")->set_base(messram + (5<<14));
139	139
140	140	/* Bank 2 is always in 0x8000 - 0xbfff */
141		memory_set_bankptr(machine, "bank3", messram + (2<<14));
	141	state->membank("bank3")->set_base(messram + (2<<14));
142	142
143	143	state->m_port_7ffd_data = 0;
144	144	state->m_port_1ffd_data = -1;

src/mess/drivers/tricep.c

r14976	r14977
56	56	static MACHINE_RESET(tricep)
57	57	{
58	58	tricep_state *state = machine.driver_data<tricep_state>();
59		UINT8* user1 = machine.region("user1")->base();
	59	UINT8* user1 = state->memregion("user1")->base();
60	60
61	61	memcpy((UINT8*)state->m_p_ram.target(),user1,0x2000);
62	62

src/mess/drivers/pockstat.c

r14976	r14977
789	789	if(m_ftlb_regs.entry[index] == bank)
790	790	{
791	791	//printf( "Address %08x is assigned to %08x in entry %d\n", 0x02000000 + (offset << 2), index * 0x2000 + ((offset << 2) & 0x1fff), index );
792		return machine().region("flash")->u32(index * (0x2000/4) + (offset & (0x1fff/4)));
	792	return memregion("flash")->u32(index * (0x2000/4) + (offset & (0x1fff/4)));
793	793	}
794	794	}
795	795	}
796		return machine().region("flash")->u32(offset & 0x7fff);
	796	return memregion("flash")->u32(offset & 0x7fff);
797	797	}
798	798
799	799
r14976	r14977
819	819	if(m_ps_flash_write_count)
820	820	{
821	821	m_ps_flash_write_count--;
822		COMBINE_DATA(&((UINT32*)(*machine().region("flash")))[offset]);
	822	COMBINE_DATA(&((UINT32*)(*machine().root_device().memregion("flash")))[offset]);
823	823	}
824	824	}
825	825
r14976	r14977
958	958	static DEVICE_IMAGE_LOAD( pockstat_flash )
959	959	{
960	960	int i, length;
961		UINT8 *cart = image.device().machine().region("flash")->base();
	961	UINT8 *cart = image.device().machine().root_device().memregion("flash")->base();
962	962	static const char *gme_id = "123-456-STD";
963	963
964	964	length = image.fread( cart, 0x20f40);

src/mess/drivers/homez80.c

r14976	r14977
220	220
221	221	VIDEO_START_MEMBER( homez80_state )
222	222	{
223		m_p_chargen = machine().region("chargen")->base();
	223	m_p_chargen = memregion("chargen")->base();
224	224	}
225	225
226	226	SCREEN_UPDATE16_MEMBER( homez80_state )

src/mess/drivers/abc1600.c

r14976	r14977
846	846	if (!BOOTE && !A19 && !A18 && !A17)
847	847	{
848	848	// _BOOTCE
849		UINT8 *rom = machine().region(MC68008P8_TAG)->base();
	849	UINT8 *rom = memregion(MC68008P8_TAG)->base();
850	850	data = rom[offset & 0x3fff];
851	851	}
852	852	else if (A19 && !m_ifc2 && !FC1)

src/mess/drivers/sage2.c

r14976	r14977
48	48
49	49	if (m_reset || (offset >= 0xfe0000))
50	50	{
51		data = machine().region(M68000_TAG)->base()[offset & 0x1fff];
	51	data = memregion(M68000_TAG)->base()[offset & 0x1fff];
52	52	}
53	53	else if (offset < 0x080000)
54	54	{
r14976	r14977
663	663	program->set_direct_update_handler(direct_update_delegate(FUNC(sage2_direct_update_handler), &machine));
664	664
665	665	// patch out i8251 test
666		machine.region(M68000_TAG)->base()[0x1be8] = 0xd6;
667		machine.region(M68000_TAG)->base()[0x1be9] = 0x4e;
	666	machine.root_device().memregion(M68000_TAG)->base()[0x1be8] = 0xd6;
	667	machine.root_device().memregion(M68000_TAG)->base()[0x1be9] = 0x4e;
668	668	}
669	669
670	670

src/mess/drivers/ob68k1a.c

r14976	r14977
314	314
315	315	// set reset vector
316	316	void *ram = program->get_write_ptr(0);
317		UINT8 *rom = machine().region(MC68000L10_TAG)->base();
	317	UINT8 *rom = memregion(MC68000L10_TAG)->base();
318	318
319	319	memcpy(ram, rom, 8);
320	320

src/mess/drivers/fp6000.c

r14976	r14977
77	77	fp6000_state *state = screen.machine().driver_data<fp6000_state>();
78	78	int x,y;
79	79	int xi,yi;
80		UINT8 *gfx_rom = screen.machine().region("pcg")->base();
	80	UINT8 *gfx_rom = state->memregion("pcg")->base();
81	81	UINT32 count;
82	82
83	83	count = 0;
r14976	r14977
277	277	{
278	278	fp6000_state *state = machine.driver_data<fp6000_state>();
279	279
280		state->m_char_rom = machine.region("pcg")->base();
	280	state->m_char_rom = state->memregion("pcg")->base();
281	281	state->m_mc6845 = machine.device<mc6845_device>("crtc");
282	282	}
283	283

src/mess/drivers/tandy2k.c

r14976	r14977
677	677	program->install_ram(0x00000, ram_size - 1, ram);
678	678
679	679	// patch out i186 relocation register check
680		UINT8 *rom = machine().region(I80186_TAG)->base();
	680	UINT8 *rom = memregion(I80186_TAG)->base();
681	681	rom[0x1f16] = 0x90;
682	682	rom[0x1f17] = 0x90;
683	683

src/mess/drivers/x07.c

r14976	r14977
333	333	break;
334	334	case 0x1c:   //UDC Init
335	335	{
336		memcpy(m_t6834_ram + 0x200, (UINT8*)machine().region("gfx1")->base() + 0x400, 0x100);
337		memcpy(m_t6834_ram + 0x300, (UINT8*)machine().region("gfx1")->base() + 0x700, 0x100);
	336	memcpy(m_t6834_ram + 0x200, (UINT8*)machine().root_device().memregion("gfx1")->base() + 0x400, 0x100);
	337	memcpy(m_t6834_ram + 0x300, (UINT8*)machine().root_device().memregion("gfx1")->base() + 0x700, 0x100);
338	338	}
339	339	break;
340	340
r14976	r14977
900	900	}
901	901	else                     //charset
902	902	{
903		return machine().region("gfx1")->base()[pos];
	903	return memregion("gfx1")->base()[pos];
904	904	}
905	905	}
906	906
r14976	r14977
1047	1047
1048	1048	if (image.software_entry() == NULL)
1049	1049	{
1050		UINT8 *rom = machine.region_alloc( "card", image.length(), 1, ENDIANNESS_LITTLE )->base();
	1050	UINT8 *rom = machine.memory().region_alloc( "card", image.length(), 1, ENDIANNESS_LITTLE )->base();
1051	1051	image.fread(rom, image.length());
1052	1052
1053	1053	space->install_ram(ram_size, ram_size + 0xfff);
r14976	r14977
1353	1353	strcpy((char*)state->m_t6834_ram + udk_offset[i], udk_ini[i]);
1354	1354
1355	1355	//copy default chars in the UDC
1356		memcpy(state->m_t6834_ram + 0x200, (UINT8*)machine.region("gfx1")->base() + 0x400, 0x100);
1357		memcpy(state->m_t6834_ram + 0x300, (UINT8*)machine.region("gfx1")->base() + 0x700, 0x100);
	1356	memcpy(state->m_t6834_ram + 0x200, (UINT8*)machine.root_device().memregion("gfx1")->base() + 0x400, 0x100);
	1357	memcpy(state->m_t6834_ram + 0x300, (UINT8*)machine.root_device().memregion("gfx1")->base() + 0x700, 0x100);
1358	1358	state->m_warm_start = 0;
1359	1359	}
1360	1360	}

src/mess/drivers/nanos.c

r14976	r14977
272	272
273	273	VIDEO_START_MEMBER( nanos_state )
274	274	{
275		m_p_chargen = machine().region("chargen")->base();
	275	m_p_chargen = memregion("chargen")->base();
276	276	}
277	277
278	278	SCREEN_UPDATE16_MEMBER( nanos_state )
r14976	r14977
341	341	nanos_state *state = device->machine().driver_data<nanos_state>();
342	342	state->m_key_command = BIT(data,1);
343	343	if (BIT(data,7)) {
344		memory_set_bankptr(device->machine(), "bank1", device->machine().region("maincpu")->base());
	344	state->membank("bank1")->set_base(state->memregion("maincpu")->base());
345	345	} else {
346		memory_set_bankptr(device->machine(), "bank1", device->machine().device<ram_device>(RAM_TAG)->pointer());
	346	state->membank("bank1")->set_base(device->machine().device<ram_device>(RAM_TAG)->pointer());
347	347	}
348	348	}
349	349
r14976	r14977
455	455	space->install_write_bank(0x0000, 0x0fff, "bank3");
456	456	space->install_write_bank(0x1000, 0xffff, "bank2");
457	457
458		memory_set_bankptr(machine(), "bank1", machine().region("maincpu")->base());
459		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
460		memory_set_bankptr(machine(), "bank3", machine().device<ram_device>(RAM_TAG)->pointer());
	458	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
	459	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
	460	membank("bank3")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
461	461
462	462	floppy_mon_w(floppy_get_device(space->machine(), 0), CLEAR_LINE);
463	463	floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0), 1,1);

src/mess/drivers/gp2x.c

r14976	r14977
202	202
203	203	READ32_MEMBER( gp2x_state::nand_r )
204	204	{
205		UINT32 *ROM = (UINT32 *)(*machine().region("maincpu"));
	205	UINT32 *ROM = (UINT32 *)(*machine().root_device().memregion("maincpu"));
206	206	UINT32 ret;
207	207
208	208	if (offset == 0)

src/mess/drivers/k8915.c

r14976	r14977
57	57	{
58	58	// seems to switch ram and rom around.
59	59	if (data == 0x87)
60		memory_set_bank(machine(), "boot", 0); // ram at 0000
	60	membank("boot")->set_entry(0); // ram at 0000
61	61	else
62		memory_set_bank(machine(), "boot", 1); // rom at 0000
	62	membank("boot")->set_entry(1); // rom at 0000
63	63	}
64	64
65	65	static ADDRESS_MAP_START(k8915_mem, AS_PROGRAM, 8, k8915_state)
r14976	r14977
82	82
83	83	MACHINE_RESET_MEMBER(k8915_state)
84	84	{
85		memory_set_bank(machine(), "boot", 1);
	85	membank("boot")->set_entry(1);
86	86	}
87	87
88	88	static DRIVER_INIT(k8915)
89	89	{
90		UINT8 *RAM = machine.region("maincpu")->base();
91		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x10000);
	90	k8915_state *state = machine.driver_data<k8915_state>();
	91	UINT8 *RAM = state->memregion("maincpu")->base();
	92	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x10000);
92	93	}
93	94
94	95	VIDEO_START_MEMBER( k8915_state )
95	96	{
96		m_p_chargen = machine().region("chargen")->base();
	97	m_p_chargen = memregion("chargen")->base();
97	98	}
98	99
99	100	SCREEN_UPDATE16_MEMBER( k8915_state )

src/mess/drivers/z9001.c

r14976	r14977
95	95
96	96	VIDEO_START_MEMBER( z9001_state )
97	97	{
98		m_p_chargen = machine().region("chargen")->base();
	98	m_p_chargen = memregion("chargen")->base();
99	99	}
100	100
101	101	static SCREEN_UPDATE_IND16( z9001 )

src/mess/drivers/pasopia7.c

r14976	r14977
199	199
200	200	static void draw_cg4_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
201	201	{
202		UINT8 *vram = machine.region("vram")->base();
	202	UINT8 *vram = machine.root_device().memregion("vram")->base();
203	203	int x,y,xi,yi;
204	204	int count;
205	205
r14976	r14977
231	231	static void draw_tv_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
232	232	{
233	233	pasopia7_state *state = machine.driver_data<pasopia7_state>();
234		UINT8 *vram = machine.region("vram")->base();
235		UINT8 *gfx_data = machine.region("font")->base();
	234	UINT8 *vram = machine.root_device().memregion("vram")->base();
	235	UINT8 *gfx_data = state->memregion("font")->base();
236	236	int x,y,xi,yi;
237	237	int count;
238	238
r14976	r14977
290	290	static void draw_mixed_screen(running_machine &machine, bitmap_ind16 &bitmap,const rectangle &cliprect,int width)
291	291	{
292	292	pasopia7_state *state = machine.driver_data<pasopia7_state>();
293		UINT8 *vram = machine.region("vram")->base();
294		UINT8 *gfx_data = machine.region("font")->base();
	293	UINT8 *vram = machine.root_device().memregion("vram")->base();
	294	UINT8 *gfx_data = state->memregion("font")->base();
295	295	int x,y,xi,yi;
296	296	int count;
297	297
r14976	r14977
391	391
392	392	READ8_MEMBER( pasopia7_state::vram_r )
393	393	{
394		UINT8 *vram = machine().region("vram")->base();
	394	UINT8 *vram = memregion("vram")->base();
395	395	UINT8 res;
396	396
397	397	if (m_vram_sel == 0)
398	398	{
399		UINT8 *work_ram = machine().region("maincpu")->base();
	399	UINT8 *work_ram = memregion("maincpu")->base();
400	400
401	401	return work_ram[offset+0x8000];
402	402	}
r14976	r14977
421	421
422	422	WRITE8_MEMBER( pasopia7_state::vram_w )
423	423	{
424		UINT8 *vram = machine().region("vram")->base();
	424	UINT8 *vram = memregion("vram")->base();
425	425
426	426	if (m_vram_sel)
427	427	{
r14976	r14977
444	444	}
445	445	else
446	446	{
447		UINT8 *work_ram = machine().region("maincpu")->base();
	447	UINT8 *work_ram = memregion("maincpu")->base();
448	448
449	449	work_ram[offset+0x8000] = data;
450	450	}
r14976	r14977
452	452
453	453	WRITE8_MEMBER( pasopia7_state::pasopia7_memory_ctrl_w )
454	454	{
455		UINT8 *work_ram = machine().region("maincpu")->base();
456		UINT8 *basic = machine().region("basic")->base();
	455	UINT8 *work_ram = memregion("maincpu")->base();
	456	UINT8 *basic = memregion("basic")->base();
457	457
458	458	switch(data & 3)
459	459	{
460	460	case 0:
461	461	case 3: //select Basic ROM
462		memory_set_bankptr(machine(), "bank1", basic    + 0x00000);
463		memory_set_bankptr(machine(), "bank2", basic    + 0x04000);
	462	membank("bank1")->set_base(basic    + 0x00000);
	463	membank("bank2")->set_base(basic    + 0x04000);
464	464	break;
465	465	case 1: //select Basic ROM + BIOS ROM
466		memory_set_bankptr(machine(), "bank1", basic    + 0x00000);
467		memory_set_bankptr(machine(), "bank2", work_ram + 0x10000);
	466	membank("bank1")->set_base(basic    + 0x00000);
	467	membank("bank2")->set_base(work_ram + 0x10000);
468	468	break;
469	469	case 2: //select Work RAM
470		memory_set_bankptr(machine(), "bank1", work_ram + 0x00000);
471		memory_set_bankptr(machine(), "bank2", work_ram + 0x04000);
	470	membank("bank1")->set_base(work_ram + 0x00000);
	471	membank("bank2")->set_base(work_ram + 0x04000);
472	472	break;
473	473	}
474	474
r14976	r14977
510	510	{
511	511	UINT8 *pac2_ram;
512	512
513		pac2_ram = machine().region(((m_pac2_bank_select-3) & 1) ? "rampac2" : "rampac1")->base();
	513	pac2_ram = memregion(((m_pac2_bank_select-3) & 1) ? "rampac2" : "rampac1")->base();
514	514
515	515	pac2_ram[m_pac2_index[(m_pac2_bank_select-3) & 1]] = data;
516	516	}
r14976	r14977
545	545	{
546	546	UINT8 *pac2_ram;
547	547
548		pac2_ram = machine().region(((m_pac2_bank_select-3) & 1) ? "rampac2" : "rampac1")->base();
	548	pac2_ram = memregion(((m_pac2_bank_select-3) & 1) ? "rampac2" : "rampac1")->base();
549	549
550	550	return pac2_ram[m_pac2_index[(m_pac2_bank_select-3) & 1]];
551	551	}
552	552	else if(m_pac2_bank_select == 2)
553	553	{
554		UINT8 *kanji_rom = machine().region("kanji")->base();
	554	UINT8 *kanji_rom = memregion("kanji")->base();
555	555
556	556	return kanji_rom[m_kanji_index];
557	557	}
r14976	r14977
567	567	/* writes always occurs to the RAM banks, even if the ROMs are selected. */
568	568	WRITE8_MEMBER( pasopia7_state::ram_bank_w )
569	569	{
570		UINT8 *work_ram = machine().region("maincpu")->base();
	570	UINT8 *work_ram = memregion("maincpu")->base();
571	571
572	572	work_ram[offset] = data;
573	573	}
r14976	r14977
991	991	static MACHINE_RESET( pasopia7 )
992	992	{
993	993	pasopia7_state *state = machine.driver_data<pasopia7_state>();
994		UINT8 *bios = machine.region("maincpu")->base();
	994	UINT8 *bios = state->memregion("maincpu")->base();
995	995
996		memory_set_bankptr(machine, "bank1", bios + 0x10000);
997		memory_set_bankptr(machine, "bank2", bios + 0x10000);
998		//  memory_set_bankptr(machine, "bank3", bios + 0x10000);
999		//  memory_set_bankptr(machine, "bank4", bios + 0x10000);
	996	state->membank("bank1")->set_base(bios + 0x10000);
	997	state->membank("bank2")->set_base(bios + 0x10000);
	998	//  state->membank("bank3")->set_base(bios + 0x10000);
	999	//  state->membank("bank4")->set_base(bios + 0x10000);
1000	1000
1001	1001	state->m_nmi_reset |= 4;
1002	1002	}

src/mess/drivers/c10.c

r14976	r14977
56	56	/* after the first 4 bytes have been read from ROM, switch the ram back in */
57	57	static TIMER_CALLBACK( c10_reset )
58	58	{
59		memory_set_bank(machine, "boot", 0);
	59	c10_state *state = machine.driver_data<c10_state>();
	60	state->membank("boot")->set_entry(0);
60	61	}
61	62
62	63	MACHINE_RESET_MEMBER(c10_state)
63	64	{
64		memory_set_bank(machine(), "boot", 1);
	65	membank("boot")->set_entry(1);
65	66	machine().scheduler().timer_set(attotime::from_usec(4), FUNC(c10_reset));
66	67	}
67	68
68	69	VIDEO_START_MEMBER( c10_state )
69	70	{
70		m_p_chargen = machine().region("chargen")->base();
	71	m_p_chargen = memregion("chargen")->base();
71	72	}
72	73
73	74	/* This system appears to have inline attribute bytes of unknown meaning.
r14976	r14977
161	162
162	163	DRIVER_INIT( c10 )
163	164	{
164		UINT8 *RAM = machine.region("maincpu")->base();
165		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x8000);
	165	c10_state *state = machine.driver_data<c10_state>();
	166	UINT8 *RAM = state->memregion("maincpu")->base();
	167	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0x8000);
166	168	}
167	169
168	170	/* ROM definition */

src/mess/drivers/gamepock.c

r14976	r14977
47	47
48	48	static DEVICE_START(gamepock_cart)
49	49	{
50		memory_set_bankptr( device->machine(), "bank1", device->machine().region("user1" )->base() );
	50	gamepock_state *state = device->machine().driver_data<gamepock_state>();
	51	state->membank( "bank1" )->set_base( state->memregion("user1" )->base() );
51	52	}
52	53
53	54
54	55	static DEVICE_IMAGE_LOAD(gamepock_cart) {
55		UINT8 *cart = image.device().machine().region("user1" )->base();
	56	gamepock_state *state = image.device().machine().driver_data<gamepock_state>();
	57	UINT8 *cart = state->memregion("user1" )->base();
56	58
57	59	if ( image.software_entry() == NULL )
58	60	{
r14976	r14977
67	69	cart = image.get_software_region( "rom" );
68	70	}
69	71
70		memory_set_bankptr( image.device().machine(), "bank1", cart );
	72	state->membank( "bank1" )->set_base( cart );
71	73
72	74	return IMAGE_INIT_PASS;
73	75	}

src/mess/drivers/huebler.c

r14976	r14977
222	222	void amu880_state::video_start()
223	223	{
224	224	// find memory regions
225		m_char_rom = machine().region("chargen")->base();
	225	m_char_rom = memregion("chargen")->base();
226	226	}
227	227
228	228	UINT32 amu880_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
r14976	r14977
350	350	void amu880_state::machine_start()
351	351	{
352	352	/* find memory regions */
353		m_kb_rom = machine().region("keyboard")->base();
	353	m_kb_rom = memregion("keyboard")->base();
354	354
355	355	/* register for state saving */
356	356	save_item(NAME(m_key_d6));

src/mess/drivers/sm1800.c

r14976	r14977
104	104	int i;
105	105	sm1800_state *state = device->machine().driver_data<sm1800_state>();
106	106	bitmap_ind16 &bitmap = state->m_bitmap;
107		UINT8 *charmap = device->machine().region("chargen")->base();
	107	UINT8 *charmap = state->memregion("chargen")->base();
108	108	UINT8 pixels = charmap[(linecount & 7) + (charcode << 3)] ^ 0xff;
109	109	if (vsp)
110	110	pixels = 0;

src/mess/drivers/fm7.c

r14976	r14977
288	288
289	289	READ8_MEMBER(fm7_state::vector_r)
290	290	{
291		UINT8* RAM = machine().region("maincpu")->base();
292		UINT8* ROM = machine().region("init")->base();
	291	UINT8* RAM = memregion("maincpu")->base();
	292	UINT8* ROM = memregion("init")->base();
293	293
294	294	if(m_init_rom_en)
295	295	return ROM[0x1ff0+offset];
r14976	r14977
304	304
305	305	WRITE8_MEMBER(fm7_state::vector_w)
306	306	{
307		UINT8* RAM = machine().region("maincpu")->base();
	307	UINT8* RAM = memregion("maincpu")->base();
308	308
309	309	if(m_type == SYS_FM7)
310	310	RAM[0xfff0+offset] = data;
r14976	r14977
342	342	*/
343	343	READ8_MEMBER(fm7_state::fm7_rom_en_r)
344	344	{
345		UINT8* RAM = machine().region("maincpu")->base();
	345	UINT8* RAM = memregion("maincpu")->base();
346	346
347	347	m_basic_rom_en = 1;
348	348	if(m_type == SYS_FM7)
349	349	{
350	350	space.install_read_bank(0x8000,0xfbff,"bank1");
351	351	space.nop_write(0x8000,0xfbff);
352		memory_set_bankptr(machine(),"bank1",RAM+0x38000);
	352	membank("bank1")->set_base(RAM+0x38000);
353	353	}
354	354	else
355	355	fm7_mmr_refresh(&space);
r14976	r14977
359	359
360	360	WRITE8_MEMBER(fm7_state::fm7_rom_en_w)
361	361	{
362		UINT8* RAM = machine().region("maincpu")->base();
	362	UINT8* RAM = memregion("maincpu")->base();
363	363
364	364	m_basic_rom_en = 0;
365	365	if(m_type == SYS_FM7)
366	366	{
367	367	space.install_readwrite_bank(0x8000,0xfbff,"bank1");
368		memory_set_bankptr(machine(),"bank1",RAM+0x8000);
	368	membank("bank1")->set_base(RAM+0x8000);
369	369	}
370	370	else
371	371	fm7_mmr_refresh(&space);
r14976	r14977
988	988	static void fm7_update_bank(address_space* space, int bank, UINT8 physical)
989	989	{
990	990	fm7_state *state = space->machine().driver_data<fm7_state>();
991		UINT8* RAM = space->machine().region("maincpu")->base();
	991	UINT8* RAM = state->memregion("maincpu")->base();
992	992	UINT16 size = 0xfff;
993	993	char bank_name[10];
994	994
r14976	r14977
1038	1038	space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vramB_r),state),write8_delegate(FUNC(fm7_state::fm7_vramB_w),state));
1039	1039	break;
1040	1040	}
1041		//      memory_set_bankptr(space->machine(),bank+1,RAM+(physical<<12)-0x10000);
	1041	//      state->membank(bank+1)->set_base(RAM+(physical<<12)-0x10000);
1042	1042	return;
1043	1043	}
1044	1044	if(physical == 0x1c)
r14976	r14977
1055	1055	{
1056	1056	if(state->m_init_rom_en && (state->m_type == SYS_FM11 || state->m_type == SYS_FM16))
1057	1057	{
1058		RAM = space->machine().region("init")->base();
	1058	RAM = space->machine().root_device().memregion("init")->base();
1059	1059	space->install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1060	1060	space->nop_write(bank*0x1000,(bank*0x1000)+size);
1061		memory_set_bankptr(space->machine(),bank_name,RAM+(physical<<12)-0x35000);
	1061	state->membank(bank_name)->set_base(RAM+(physical<<12)-0x35000);
1062	1062	return;
1063	1063	}
1064	1064	}
r14976	r14977
1066	1066	{
1067	1067	if(state->m_init_rom_en && (state->m_type != SYS_FM11 || state->m_type != SYS_FM16))
1068	1068	{
1069		RAM = space->machine().region("init")->base();
	1069	RAM = space->machine().root_device().memregion("init")->base();
1070	1070	space->install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1071	1071	space->nop_write(bank*0x1000,(bank*0x1000)+size);
1072		memory_set_bankptr(space->machine(),bank_name,RAM+(physical<<12)-0x36000);
	1072	state->membank(bank_name)->set_base(RAM+(physical<<12)-0x36000);
1073	1073	return;
1074	1074	}
1075	1075	}
r14976	r14977
1077	1077	{
1078	1078	if(state->m_basic_rom_en && (state->m_type != SYS_FM11 || state->m_type != SYS_FM16))
1079	1079	{
1080		RAM = space->machine().region("fbasic")->base();
	1080	RAM = space->machine().root_device().memregion("fbasic")->base();
1081	1081	space->install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1082	1082	space->nop_write(bank*0x1000,(bank*0x1000)+size);
1083		memory_set_bankptr(space->machine(),bank_name,RAM+(physical<<12)-0x38000);
	1083	state->membank(bank_name)->set_base(RAM+(physical<<12)-0x38000);
1084	1084	return;
1085	1085	}
1086	1086	}
1087	1087	space->install_readwrite_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1088		memory_set_bankptr(space->machine(),bank_name,RAM+(physical<<12));
	1088	state->membank(bank_name)->set_base(RAM+(physical<<12));
1089	1089	}
1090	1090
1091	1091	static void fm7_mmr_refresh(address_space* space)
r14976	r14977
1093	1093	fm7_state *state = space->machine().driver_data<fm7_state>();
1094	1094	int x;
1095	1095	UINT16 window_addr;
1096		UINT8* RAM = space->machine().region("maincpu")->base();
	1096	UINT8* RAM = state->memregion("maincpu")->base();
1097	1097
1098	1098	if(state->m_mmr.enabled)
1099	1099	{
r14976	r14977
1116	1116	//      if(window_addr < 0xfc00)
1117	1117	{
1118	1118	space->install_readwrite_bank(0x7c00,0x7fff,"bank24");
1119		memory_set_bankptr(space->machine(),"bank24",RAM+window_addr);
	1119	state->membank("bank24")->set_base(RAM+window_addr);
1120	1120	}
1121	1121	}
1122	1122	}
r14976	r14977
1164	1164	*/
1165	1165	READ8_MEMBER(fm7_state::fm7_kanji_r)
1166	1166	{
1167		UINT8* KROM = machine().region("kanji1")->base();
	1167	UINT8* KROM = memregion("kanji1")->base();
1168	1168	UINT32 addr = m_kanji_address << 1;
1169	1169
1170	1170	switch(offset)
r14976	r14977
1846	1846	fm7_state *state = machine.driver_data<fm7_state>();
1847	1847	// The FM-7 has no initialisation ROM, and no other obvious
1848	1848	// way to set the reset vector, so for now this will have to do.
1849		UINT8* RAM = machine.region("maincpu")->base();
	1849	UINT8* RAM = state->memregion("maincpu")->base();
1850	1850
1851	1851	RAM[0xfffe] = 0xfe;
1852	1852	RAM[0xffff] = 0x00;
r14976	r14977
1861	1861	static MACHINE_START(fm77av)
1862	1862	{
1863	1863	fm7_state *state = machine.driver_data<fm7_state>();
1864		UINT8* RAM = machine.region("maincpu")->base();
1865		UINT8* ROM = machine.region("init")->base();
	1864	UINT8* RAM = machine.root_device().memregion("maincpu")->base();
	1865	UINT8* ROM = machine.root_device().memregion("init")->base();
1866	1866
1867	1867	memset(state->m_shared_ram,0xff,0x80);
1868	1868
r14976	r14977
1870	1870	memcpy(RAM+0x3fff0,ROM+0x1ff0,16);
1871	1871
1872	1872	state->m_video.subrom = 0;  // default sub CPU ROM is type C.
1873		RAM = machine.region("subsyscg")->base();
1874		memory_set_bankptr(machine,"bank20",RAM);
1875		RAM = machine.region("subsys_c")->base();
1876		memory_set_bankptr(machine,"bank21",RAM+0x800);
	1873	RAM = machine.root_device().memregion("subsyscg")->base();
	1874	state->membank("bank20")->set_base(RAM);
	1875	RAM = state->memregion("subsys_c")->base();
	1876	state->membank("bank21")->set_base(RAM+0x800);
1877	1877
1878	1878	state->m_type = SYS_FM77AV;
1879	1879	beep_set_frequency(machine.device(BEEPER_TAG),1200);
r14976	r14977
1883	1883	static MACHINE_START(fm11)
1884	1884	{
1885	1885	fm7_state *state = machine.driver_data<fm7_state>();
1886		UINT8* RAM = machine.region("maincpu")->base();
1887		UINT8* ROM = machine.region("init")->base();
	1886	UINT8* RAM = machine.root_device().memregion("maincpu")->base();
	1887	UINT8* ROM = state->memregion("init")->base();
1888	1888
1889	1889	memset(state->m_shared_ram,0xff,0x80);
1890	1890	state->m_type = SYS_FM11;
r14976	r14977
1906	1906	static MACHINE_RESET(fm7)
1907	1907	{
1908	1908	fm7_state *state = machine.driver_data<fm7_state>();
1909		UINT8* RAM = machine.region("maincpu")->base();
1910		UINT8* ROM = machine.region("init")->base();
	1909	UINT8* RAM = machine.root_device().memregion("maincpu")->base();
	1910	UINT8* ROM = state->memregion("init")->base();
1911	1911
1912	1912	state->m_timer->adjust(attotime::from_nsec(2034500),0,attotime::from_nsec(2034500));
1913	1913	state->m_subtimer->adjust(attotime::from_msec(20),0,attotime::from_msec(20));
r14976	r14977
1938	1938	else
1939	1939	state->m_init_rom_en = 0;
1940	1940	if(state->m_type == SYS_FM7)
1941		memory_set_bankptr(machine,"bank1",RAM+0x38000);
	1941	state->membank("bank1")->set_base(RAM+0x38000);
1942	1942	state->m_key_delay = 700;  // 700ms on FM-7
1943	1943	state->m_key_repeat = 70;  // 70ms on FM-7
1944	1944	state->m_break_flag = 0;
r14976	r14977
1958	1958	{
1959	1959	if(!(input_port_read(machine,"DSW") & 0x02))
1960	1960	{  // DOS mode
1961		memory_set_bankptr(machine,"bank17",machine.region("dos")->base());
	1961	state->membank("bank17")->set_base(machine.root_device().memregion("dos")->base());
1962	1962	}
1963	1963	else
1964	1964	{  // BASIC mode
1965		memory_set_bankptr(machine,"bank17",machine.region("basic")->base());
	1965	state->membank("bank17")->set_base(machine.root_device().memregion("basic")->base());
1966	1966	}
1967	1967	}
1968	1968	if(state->m_type == SYS_FM77AV || state->m_type == SYS_FM77AV40EX || state->m_type == SYS_FM11)

src/mess/drivers/compis.c

r14976	r14977
86	86	{
87	87	compis_state *state = screen.machine().driver_data<compis_state>();
88	88	UINT8 *m_p_chargen;
89		m_p_chargen = screen.machine().region("maincpu")->base()+0xca70; //bios0
	89	m_p_chargen = state->memregion("maincpu")->base()+0xca70; //bios0
90	90	if (m_p_chargen[0x214] != 0x08) m_p_chargen+= 0x10; //bios1
91	91	UINT8 y,ra,chr,gfx;
92	92	UINT16 sy=0,ma=0,x;

src/mess/drivers/jr100.c

r14976	r14977
175	175	jr100_state *state = screen.machine().driver_data<jr100_state>();
176	176	int x,y,xi,yi;
177	177
178		UINT8 *rom_pcg = screen.machine().region("maincpu")->base() + 0xe000;
	178	UINT8 *rom_pcg = state->memregion("maincpu")->base() + 0xe000;
179	179	for (y = 0; y < 24; y++)
180	180	{
181	181	for (x = 0; x < 32; x++)

src/mess/drivers/czk80.c

r14976	r14977
76	76
77	77	MACHINE_RESET_MEMBER(czk80_state)
78	78	{
79		UINT8* bios = machine().region("maincpu")->base() + 0xe000;
	79	UINT8* bios = memregion("maincpu")->base() + 0xe000;
80	80	memcpy(m_p_ram, bios, 0x2000);
81	81	memcpy(m_p_ram+0xe000, bios, 0x2000);
82	82	}

src/mess/drivers/exp85.c

r14976	r14977
184	184	/* setup memory banking */
185	185	program->install_read_bank(0x0000, 0x07ff, "bank1");
186	186	program->unmap_write(0x0000, 0x07ff);
187		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(I8085A_TAG)->base() + 0xf000, 0);
188		memory_configure_bank(machine(), "bank1", 1, 1, machine().region(I8085A_TAG)->base(), 0);
189		memory_set_bank(machine(), "bank1", 0);
	187	membank("bank1")->configure_entry(0, memregion(I8085A_TAG)->base() + 0xf000);
	188	membank("bank1")->configure_entry(1, memregion(I8085A_TAG)->base());
	189	membank("bank1")->set_entry(0);
190	190	}
191	191
192	192	/* Machine Driver */

src/mess/drivers/esq1.c

r14976	r14977
89	89	static MACHINE_RESET( esq1 )
90	90	{
91	91	// set default OSROM banking
92		memory_set_bankptr(machine, "osbank", machine.region("osrom")->base() );
	92	esq1_state *state = machine.driver_data<esq1_state>();
	93	state->membank("osbank")->set_base(machine.root_device().memregion("osrom")->base() );
93	94	}
94	95
95	96	static ADDRESS_MAP_START( esq1_map, AS_PROGRAM, 8, esq1_state )
r14976	r14977
129	130	static void duart_output(device_t *device, UINT8 data)
130	131	{
131	132	int bank = ((data >> 1) & 0x7);
132
	133	esq1_state *state = device->machine().driver_data<esq1_state>();
133	134	//  printf("DP [%02x]: %d mlo %d mhi %d tape %d\n", data, data&1, (data>>4)&1, (data>>5)&1, (data>>6)&3);
134	135	//  printf("[%02x] bank %d => offset %x (PC=%x)\n", data, bank, bank * 0x1000, cpu_get_pc(device->machine().firstcpu));
135		memory_set_bankptr(device->machine(), "osbank", device->machine().region("osrom")->base() + (bank * 0x1000) );
	136	state->membank("osbank")->set_base(device->machine().root_device().memregion("osrom")->base() + (bank * 0x1000) );
136	137	}
137	138
138	139	static void duart_tx(device_t *device, int channel, UINT8 data)

src/mess/drivers/ami1200.c

r14976	r14977
55	55	data = (data >> 16) & 1;
56	56
57	57	/* switch banks as appropriate */
58		memory_set_bank(machine(), "bank1", data & 1);
	58	membank("bank1")->set_entry(data & 1);
59	59
60	60	/* swap the write handlers between ROM and bank 1 based on the bit */
61	61	if ((data & 1) == 0)
r14976	r14977
400	400	amiga_machine_config(machine, &cd32_intf);
401	401
402	402	/* set up memory */
403		memory_configure_bank(machine, "bank1", 0, 1, state->m_chip_ram, 0);
404		memory_configure_bank(machine, "bank1", 1, 1, machine.region("user1")->base(), 0);
	403	state->membank("bank1")->configure_entry(0, state->m_chip_ram);
	404	state->membank("bank1")->configure_entry(1, machine.root_device().memregion("user1")->base());
405	405
406	406	/* initialize keyboard */
407	407	amigakbd_init(machine);

src/mess/drivers/hp49gp.c

r14976	r14977
267	267	static DRIVER_INIT( hp49gp )
268	268	{
269	269	hp49gp_state *hp49gp = machine.driver_data<hp49gp_state>();
270		UINT8 *rom = (UINT8 *)machine.region( "maincpu")->base();
	270	UINT8 *rom = (UINT8 *)machine.root_device().memregion( "maincpu")->base();
271	271	memcpy( hp49gp->m_steppingstone, rom, 1024);
272	272	lcd_spi_init( machine);
273	273	}

src/mess/drivers/trs80m2.c

r14976	r14977
130	130	{
131	131	if (m_boot_rom)
132	132	{
133		data = machine().region(Z80_TAG)->base()[offset];
	133	data = memregion(Z80_TAG)->base()[offset];
134	134	}
135	135	else
136	136	{
r14976	r14977
625	625	void trs80m2_state::video_start()
626	626	{
627	627	// find memory regions
628		m_char_rom = machine().region(MC6845_TAG)->base();
	628	m_char_rom = memregion(MC6845_TAG)->base();
629	629
630	630	// allocate memory
631	631	m_video_ram = auto_alloc_array(machine(), UINT8, 0x800);

src/mess/drivers/pdp11.c

r14976	r14977
219	219	static MACHINE_RESET(pdp11)
220	220	{
221	221	// Load M9301-YA
222		UINT8* user1 = machine.region("user1")->base();
223		UINT8* maincpu = machine.region("maincpu")->base();
	222	UINT8* user1 = machine.root_device().memregion("user1")->base();
	223	UINT8* maincpu = machine.root_device().memregion("maincpu")->base();
224	224	int i;
225	225
226	226	for(i=0;i<0x100;i++) {
r14976	r14977
263	263	static MACHINE_RESET(pdp11ub2)
264	264	{
265	265	// Load M9312
266		UINT8* user1 = machine.region("consproms")->base() + input_port_read(machine,"CONSPROM") * 0x0400;
267		UINT8* maincpu = machine.region("maincpu")->base();
	266	UINT8* user1 = machine.root_device().memregion("consproms")->base() + input_port_read(machine,"CONSPROM") * 0x0400;
	267	UINT8* maincpu = machine.root_device().memregion("maincpu")->base();
268	268
269	269	//0165000
270	270	load9312prom(maincpu + 0165000,user1,0x100);
r14976	r14977
281	281	}
282	282
283	283	//0173000
284		load9312prom(maincpu + 0173000,machine.region("devproms")->base() + input_port_read(machine,"DEVPROM1") * 0x0200,0x080);
	284	load9312prom(maincpu + 0173000,machine.root_device().memregion("devproms")->base() + input_port_read(machine,"DEVPROM1") * 0x0200,0x080);
285	285	//0173200
286		load9312prom(maincpu + 0173200,machine.region("devproms")->base() + input_port_read(machine,"DEVPROM2") * 0x0200,0x080);
	286	load9312prom(maincpu + 0173200,machine.root_device().memregion("devproms")->base() + input_port_read(machine,"DEVPROM2") * 0x0200,0x080);
287	287	//0173400
288		load9312prom(maincpu + 0173400,machine.region("devproms")->base() + input_port_read(machine,"DEVPROM3") * 0x0200,0x080);
	288	load9312prom(maincpu + 0173400,machine.root_device().memregion("devproms")->base() + input_port_read(machine,"DEVPROM3") * 0x0200,0x080);
289	289	//0173600
290		load9312prom(maincpu + 0173600,machine.region("devproms")->base() + input_port_read(machine,"DEVPROM4") * 0x0200,0x080);
	290	load9312prom(maincpu + 0173600,machine.root_device().memregion("devproms")->base() + input_port_read(machine,"DEVPROM4") * 0x0200,0x080);
291	291
292	292	}
293	293

src/mess/drivers/pv1000.c

r14976	r14977
57	57
58	58	WRITE8_MEMBER( pv1000_state::pv1000_gfxram_w )
59	59	{
60		UINT8 *gfxram = machine().region( "gfxram" )->base();
	60	UINT8 *gfxram = memregion( "gfxram" )->base();
61	61
62	62	gfxram[ offset ] = data;
63	63	gfx_element_mark_dirty(machine().gfx[1], offset/32);
r14976	r14977
170	170
171	171	static DEVICE_IMAGE_LOAD( pv1000_cart )
172	172	{
173		UINT8 *cart = image.device().machine().region("cart")->base();
	173	UINT8 *cart = image.device().machine().root_device().memregion("cart")->base();
174	174	UINT32 size;
175	175
176	176	if (image.software_entry() == NULL)

src/mess/drivers/palmz22.c

r14976	r14977
242	242	palmz22_state *state = machine.driver_data<palmz22_state>();
243	243	state->m_s3c2410 = machine.device( "s3c2410");
244	244	state->m_nand = machine.device<nand_device>("nand");
245		state->m_nand->set_data_ptr( machine.region("nand")->base());
	245	state->m_nand->set_data_ptr( state->memregion("nand")->base());
246	246	}
247	247
248	248	static MACHINE_RESET( palmz22 )

src/mess/drivers/a5105.c

r14976	r14977
229	229	switch (m_memsel[0])
230	230	{
231	231	case 0:
232		memory_set_bankptr(machine(), "bank1", m_rom_base);
	232	membank("bank1")->set_base(m_rom_base);
233	233	prog->install_read_bank(0x0000, 0x3fff, "bank1");
234	234	prog->unmap_write(0x0000, 0x3fff);
235	235	break;
236	236	case 2:
237		memory_set_bankptr(machine(), "bank1", m_ram_base);
	237	membank("bank1")->set_base(m_ram_base);
238	238	prog->install_readwrite_bank(0x0000, 0x3fff, "bank1");
239	239	break;
240	240	default:
r14976	r14977
250	250	switch (m_memsel[1])
251	251	{
252	252	case 0:
253		memory_set_bankptr(machine(), "bank2", m_rom_base + 0x4000);
	253	membank("bank2")->set_base(m_rom_base + 0x4000);
254	254	prog->install_read_bank(0x4000, 0x7fff, "bank2");
255	255	prog->unmap_write(0x4000, 0x4000);
256	256	break;
257	257	case 1:
258		memory_set_bankptr(machine(), "bank2", machine().region("k5651")->base());
	258	membank("bank2")->set_base(machine().root_device().memregion("k5651")->base());
259	259	prog->install_read_bank(0x4000, 0x7fff, "bank2");
260	260	prog->unmap_write(0x4000, 0x4000);
261	261	break;
262	262	case 2:
263		memory_set_bankptr(machine(), "bank2", m_ram_base + 0x4000);
	263	membank("bank2")->set_base(m_ram_base + 0x4000);
264	264	prog->install_readwrite_bank(0x4000, 0x7fff, "bank2");
265	265	break;
266	266	default:
r14976	r14977
276	276	switch (m_memsel[2])
277	277	{
278	278	case 0:
279		memory_set_bankptr(machine(), "bank3", m_rom_base + 0x8000);
	279	membank("bank3")->set_base(m_rom_base + 0x8000);
280	280	prog->install_read_bank(0x8000, 0xbfff, "bank3");
281	281	prog->unmap_write(0x8000, 0xbfff);
282	282	break;
283	283	case 2:
284		memory_set_bankptr(machine(), "bank3", m_ram_base + 0x8000);
	284	membank("bank3")->set_base(m_ram_base + 0x8000);
285	285	prog->install_readwrite_bank(0x8000, 0xbfff, "bank3");
286	286	break;
287	287	default:
r14976	r14977
297	297	switch (m_memsel[3])
298	298	{
299	299	case 2:
300		memory_set_bankptr(machine(), "bank4", m_ram_base + 0xc000);
	300	membank("bank4")->set_base(m_ram_base + 0xc000);
301	301	prog->install_readwrite_bank(0xc000, 0xffff, "bank4");
302	302	break;
303	303	default:
r14976	r14977
460	460	beep_set_frequency(m_beep, 500);
461	461
462	462	m_ram_base = (UINT8*)machine().device<ram_device>(RAM_TAG)->pointer();
463		m_rom_base = (UINT8*)machine().region("maincpu")->base();
	463	m_rom_base = (UINT8*)machine().root_device().memregion("maincpu")->base();
464	464
465		memory_set_bankptr(machine(), "bank1", m_rom_base);
466		memory_set_bankptr(machine(), "bank2", m_rom_base + 0x4000);
467		memory_set_bankptr(machine(), "bank3", m_ram_base);
468		memory_set_bankptr(machine(), "bank4", m_ram_base + 0x4000);
	465	membank("bank1")->set_base(m_rom_base);
	466	membank("bank2")->set_base(m_rom_base + 0x4000);
	467	membank("bank3")->set_base(m_ram_base);
	468	membank("bank4")->set_base(m_ram_base + 0x4000);
469	469	}
470	470
471	471
r14976	r14977
503	503	VIDEO_START_MEMBER( a5105_state )
504	504	{
505	505	// find memory regions
506		m_char_rom = machine().region("pcg")->base();
	506	m_char_rom = memregion("pcg")->base();
507	507	}
508	508
509	509	static UPD7220_INTERFACE( hgdc_intf )

src/mess/drivers/applix.c

r14976	r14977
105	105	static MACHINE_RESET(applix)
106	106	{
107	107	applix_state *state = machine.driver_data<applix_state>();
108		UINT8* RAM = machine.region("maincpu")->base();
	108	UINT8* RAM = state->memregion("maincpu")->base();
109	109	memcpy(state->m_base, RAM+0x500000, 16);
110	110	machine.device("maincpu")->reset();
111	111	}

src/mess/drivers/nc.c

r14976	r14977
344	344
345	345	mem_bank = mem_bank & state->m_membank_rom_mask;
346	346
347		addr = (machine.region("maincpu")->base()+0x010000) + (mem_bank<<14);
	347	addr = (state->memregion("maincpu")->base()+0x010000) + (mem_bank<<14);
348	348
349		memory_set_bankptr(machine, bank1, addr);
	349	state->membank(bank1)->set_base(addr);
350	350
351	351	space->nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
352	352	LOG(("BANK %d: ROM %d\n",bank,mem_bank));
r14976	r14977
362	362
363	363	addr = machine.device<ram_device>(RAM_TAG)->pointer() + (mem_bank<<14);
364	364
365		memory_set_bankptr(machine, bank1, addr);
366		memory_set_bankptr(machine, bank5, addr);
	365	state->membank(bank1)->set_base(addr);
	366	state->membank(bank5)->set_base(addr);
367	367
368	368	space->install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_w[bank]);
369	369	LOG(("BANK %d: RAM\n",bank));
r14976	r14977
381	381	mem_bank = mem_bank & state->m_membank_card_ram_mask;
382	382	addr = state->m_card_ram + (mem_bank<<14);
383	383
384		memory_set_bankptr(machine, bank1, addr);
	384	state->membank(bank1)->set_base(addr);
385	385
386	386	/* write enabled? */
387	387	if (input_port_read(machine, "EXTRA") & 0x02)
388	388	{
389	389	/* yes */
390		memory_set_bankptr(machine, bank5, addr);
	390	state->membank(bank5)->set_base(addr);
391	391
392	392	space->install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_w[bank]);
393	393	}

src/mess/drivers/bw12.c

r14976	r14977
77	77	break;
78	78	}
79	79
80		memory_set_bank(machine(), "bank1", m_bank);
	80	membank("bank1")->set_entry(m_bank);
81	81	}
82	82
83	83	void bw12_state::floppy_motor_off()
r14976	r14977
405	405	void bw12_state::video_start()
406	406	{
407	407	/* find memory regions */
408		m_char_rom = machine().region("chargen")->base();
	408	m_char_rom = memregion("chargen")->base();
409	409	}
410	410
411	411	/* UPD765 Interface */
r14976	r14977
634	634	void bw12_state::machine_start()
635	635	{
636	636	/* setup memory banking */
637		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(Z80_TAG)->base(), 0);
638		memory_configure_bank(machine(), "bank1", 1, 1, m_ram->pointer(), 0);
639		memory_configure_bank(machine(), "bank1", 2, 2, m_ram->pointer() + 0x10000, 0x8000);
	637	membank("bank1")->configure_entry(0, memregion(Z80_TAG)->base());
	638	membank("bank1")->configure_entry(1, m_ram->pointer());
	639	membank("bank1")->configure_entries(2, 2, m_ram->pointer() + 0x10000, 0x8000);
640	640
641	641	/* register for state saving */
642	642	save_item(NAME(m_bank));

src/mess/drivers/pentagon.c

r14976	r14977
21	21	{
22	22	state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ? 1 : 0;
23	23	betadisk_disable(beta);
24		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	24	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
25	25	}
26	26	} else if (((pc & 0xff00) == 0x3d00) && (state->m_ROMSelection==1))
27	27	{
r14976	r14977
34	34	{
35	35	if (state->m_ROMSelection == 3) {
36	36	if (beta->started()) {
37		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine.region("beta:beta")->base());
38		memory_set_bankptr(machine, "bank1", machine.region("beta:beta")->base());
	37	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine.root_device().memregion("beta:beta")->base());
	38	state->membank("bank1")->set_base(machine.root_device().memregion("beta:beta")->base());
39	39	}
40	40	} else {
41		direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
42		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	41	direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	42	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
43	43	}
44	44	return ~0;
45	45	}
r14976	r14977
53	53	UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
54	54	state->m_screen_location = messram + ((state->m_port_7ffd_data & 8) ? (7<<14) : (5<<14));
55	55
56		memory_set_bankptr(machine, "bank4", messram + ((state->m_port_7ffd_data & 0x07) * 0x4000));
	56	state->membank("bank4")->set_base(messram + ((state->m_port_7ffd_data & 0x07) * 0x4000));
57	57
58	58	if (beta->started() && betadisk_is_active(beta) && !( state->m_port_7ffd_data & 0x10 ) )
59	59	{
r14976	r14977
69	69	state->m_ROMSelection = ((state->m_port_7ffd_data>>4) & 0x01) ;
70	70	}
71	71	/* rom 0 is 128K rom, rom 1 is 48 BASIC */
72		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
	72	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x010000 + (state->m_ROMSelection<<14));
73	73	}
74	74
75	75	static WRITE8_HANDLER(pentagon_port_7ffd_w)
r14976	r14977
119	119	memset(messram,0,128*1024);
120	120
121	121	/* Bank 5 is always in 0x4000 - 0x7fff */
122		memory_set_bankptr(machine, "bank2", messram + (5<<14));
	122	state->membank("bank2")->set_base(messram + (5<<14));
123	123
124	124	/* Bank 2 is always in 0x8000 - 0xbfff */
125		memory_set_bankptr(machine, "bank3", messram + (2<<14));
	125	state->membank("bank3")->set_base(messram + (2<<14));
126	126
127	127	state->m_port_7ffd_data = 0;
128	128	state->m_port_1ffd_data = -1;

src/mess/drivers/pk8000.c

r14976	r14977
38	38
39	39	static void pk8000_set_bank(running_machine &machine,UINT8 data)
40	40	{
41		UINT8 *rom = machine.region("maincpu")->base();
	41	pk8000_state *state = machine.driver_data<pk8000_state>();
	42	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
42	43	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
43	44	UINT8 block1 = data & 3;
44	45	UINT8 block2 = (data >> 2) & 3;
r14976	r14977
47	48
48	49	switch(block1) {
49	50	case 0:
50		memory_set_bankptr(machine, "bank1", rom + 0x10000);
51		memory_set_bankptr(machine, "bank5", ram);
	51	state->membank("bank1")->set_base(rom + 0x10000);
	52	state->membank("bank5")->set_base(ram);
52	53	break;
53	54	case 1: break;
54	55	case 2: break;
55	56	case 3:
56		memory_set_bankptr(machine, "bank1", ram);
57		memory_set_bankptr(machine, "bank5", ram);
	57	state->membank("bank1")->set_base(ram);
	58	state->membank("bank5")->set_base(ram);
58	59	break;
59	60	}
60	61
61	62	switch(block2) {
62	63	case 0:
63		memory_set_bankptr(machine, "bank2", rom + 0x14000);
64		memory_set_bankptr(machine, "bank6", ram + 0x4000);
	64	state->membank("bank2")->set_base(rom + 0x14000);
	65	state->membank("bank6")->set_base(ram + 0x4000);
65	66	break;
66	67	case 1: break;
67	68	case 2: break;
68	69	case 3:
69		memory_set_bankptr(machine, "bank2", ram + 0x4000);
70		memory_set_bankptr(machine, "bank6", ram + 0x4000);
	70	state->membank("bank2")->set_base(ram + 0x4000);
	71	state->membank("bank6")->set_base(ram + 0x4000);
71	72	break;
72	73	}
73	74	switch(block3) {
74	75	case 0:
75		memory_set_bankptr(machine, "bank3", rom + 0x18000);
76		memory_set_bankptr(machine, "bank7", ram + 0x8000);
	76	state->membank("bank3")->set_base(rom + 0x18000);
	77	state->membank("bank7")->set_base(ram + 0x8000);
77	78	break;
78	79	case 1: break;
79	80	case 2: break;
80	81	case 3:
81		memory_set_bankptr(machine, "bank3", ram + 0x8000);
82		memory_set_bankptr(machine, "bank7", ram + 0x8000);
	82	state->membank("bank3")->set_base(ram + 0x8000);
	83	state->membank("bank7")->set_base(ram + 0x8000);
83	84	break;
84	85	}
85	86	switch(block4) {
86	87	case 0:
87		memory_set_bankptr(machine, "bank4", rom + 0x1c000);
88		memory_set_bankptr(machine, "bank8", ram + 0xc000);
	88	state->membank("bank4")->set_base(rom + 0x1c000);
	89	state->membank("bank8")->set_base(ram + 0xc000);
89	90	break;
90	91	case 1: break;
91	92	case 2: break;
92	93	case 3:
93		memory_set_bankptr(machine, "bank4", ram + 0xc000);
94		memory_set_bankptr(machine, "bank8", ram + 0xc000);
	94	state->membank("bank4")->set_base(ram + 0xc000);
	95	state->membank("bank8")->set_base(ram + 0xc000);
95	96	break;
96	97	}
97	98	}

src/mess/drivers/prestige.c

r14976	r14977
125	125	switch (offset)
126	126	{
127	127	case 0:
128		memory_set_bank(machine(), "bank1", data & 0x3f);
	128	membank("bank1")->set_entry(data & 0x3f);
129	129	break;
130	130
131	131	case 1:
132	132	if (m_bank[5] & 0x08)
133		memory_set_bank(machine(), "bank2", 0x40 + (data & 1));
	133	membank("bank2")->set_entry(0x40 + (data & 1));
134	134	else
135		memory_set_bank(machine(), "bank2", data & 0x3f);
	135	membank("bank2")->set_entry(data & 0x3f);
136	136	break;
137	137
138	138	case 2:
139	139	if (m_bank[5] & 0x04)
140		memory_set_bank(machine(), "bank3", 0x40 + (data & 1));
	140	membank("bank3")->set_entry(0x40 + (data & 1));
141	141	else
142		memory_set_bank(machine(), "bank3", data & 0x3f);
	142	membank("bank3")->set_entry(data & 0x3f);
143	143	break;
144	144
145	145	case 3:
146	146	if (m_bank[5] & 0x02)
147		memory_set_bank(machine(), "bank4", 0x04 + (data & 0x03));
	147	membank("bank4")->set_entry(0x04 + (data & 0x03));
148	148	else
149		memory_set_bank(machine(), "bank4", data & 0x03);
	149	membank("bank4")->set_entry(data & 0x03);
150	150	break;
151	151
152	152	case 4:
153		memory_set_bank(machine(), "bank5", data & 0x03);
	153	membank("bank5")->set_entry(data & 0x03);
154	154	break;
155	155
156	156	case 5:
r14976	r14977
419	419
420	420	device_set_irq_callback(m_maincpu, prestige_int_ack);
421	421
422		memory_configure_bank(machine(), "bank1", 0, 64, machine().region("maincpu")->base(), 0x4000);
423		memory_configure_bank(machine(), "bank2", 0, 64, machine().region("maincpu")->base(), 0x4000);
424		memory_configure_bank(machine(), "bank2", 64, 2, machine().region("cart")->base(), 0x4000);
425		memory_configure_bank(machine(), "bank3", 0, 64, machine().region("maincpu")->base(), 0x4000);
426		memory_configure_bank(machine(), "bank3", 64, 2, machine().region("cart")->base(), 0x4000);
427		memory_configure_bank(machine(), "bank4", 0, 4, ram, 0x2000);
428		memory_configure_bank(machine(), "bank4", 4, 4, machine().region("cart")->base(), 0x2000);
429		memory_configure_bank(machine(), "bank5", 0, 4, ram, 0x2000);
	422	membank("bank1")->configure_entries(0, 64, memregion("maincpu")->base(), 0x4000);
	423	membank("bank2")->configure_entries(0, 64, memregion("maincpu")->base(), 0x4000);
	424	membank("bank2")->configure_entries(64, 2, memregion("cart")->base(), 0x4000);
	425	membank("bank3")->configure_entries(0, 64, memregion("maincpu")->base(), 0x4000);
	426	membank("bank3")->configure_entries(64, 2, memregion("cart")->base(), 0x4000);
	427	membank("bank4")->configure_entries(0, 4, ram, 0x2000);
	428	membank("bank4")->configure_entries(4, 4, memregion("cart")->base(), 0x2000);
	429	membank("bank5")->configure_entries(0, 4, ram, 0x2000);
430	430
431		memory_set_bank(machine(), "bank1", 0);
432		memory_set_bank(machine(), "bank2", 0);
433		memory_set_bank(machine(), "bank3", 0);
434		memory_set_bank(machine(), "bank4", 0);
435		memory_set_bank(machine(), "bank5", 0);
	431	membank("bank1")->set_entry(0);
	432	membank("bank2")->set_entry(0);
	433	membank("bank3")->set_entry(0);
	434	membank("bank4")->set_entry(0);
	435	membank("bank5")->set_entry(0);
436	436
437	437	//pointer to the videoram
438	438	m_vram = ram;

src/mess/drivers/okean240.c

r14976	r14977
358	358	/* after the first 6 bytes have been read from ROM, switch the ram back in */
359	359	static TIMER_CALLBACK( okean240_boot )
360	360	{
361		memory_set_bank(machine, "boot", 0);
	361	okean240_state *state = machine.driver_data<okean240_state>();
	362	state->membank("boot")->set_entry(0);
362	363	}
363	364
364	365	MACHINE_RESET_MEMBER( okean240_state )
365	366	{
366	367	machine().scheduler().timer_set(attotime::from_usec(10), FUNC(okean240_boot));
367		memory_set_bank(machine(), "boot", 1);
	368	membank("boot")->set_entry(1);
368	369	m_term_data = 0;
369	370	m_j = 0;
370	371	m_scroll = 0;
r14976	r14977
382	383
383	384	DRIVER_INIT( okean240 )
384	385	{
385		UINT8 *RAM = machine.region("maincpu")->base();
386		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xe000);
	386	okean240_state *state = machine.driver_data<okean240_state>();
	387	UINT8 *RAM = state->memregion("maincpu")->base();
	388	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xe000);
387	389	}
388	390
389	391	VIDEO_START_MEMBER( okean240_state )

src/mess/drivers/ngp.c

r14976	r14977
634	634	static DEVICE_START( ngp_cart )
635	635	{
636	636	ngp_state *state = device->machine().driver_data<ngp_state>();
637		UINT8 *cart = device->machine().region("cart")->base();
	637	UINT8 *cart = state->memregion("cart")->base();
638	638
639	639	state->m_flash_chip[0].present = 0;
640	640	state->m_flash_chip[0].state = F_READ;
r14976	r14977
661	661	return IMAGE_INIT_FAIL;
662	662	}
663	663
664		if (image.fread( image.device().machine().region("cart")->base(), filesize) != filesize)
	664	if (image.fread( image.device().machine().root_device().memregion("cart")->base(), filesize) != filesize)
665	665	{
666	666	image.seterror(IMAGE_ERROR_UNSPECIFIED, "Error loading file");
667	667	return IMAGE_INIT_FAIL;
r14976	r14977
670	670	else
671	671	{
672	672	filesize = image.get_software_region_length("rom");
673		memcpy(image.device().machine().region("cart")->base(), image.get_software_region("rom"), filesize);
	673	memcpy(image.device().machine().root_device().memregion("cart")->base(), image.get_software_region("rom"), filesize);
674	674	}
675	675
676		//printf("%2x%2x - %x - %x\n", (unsigned int) image.device().machine().region("cart")->u8(0x20), (unsigned int) image.device().machine().region("cart")->u8(0x21),
677		//        (unsigned int) image.device().machine().region("cart")->u8(0x22), (unsigned int) image.device().machine().region("cart")->u8(0x23));
	676	//printf("%2x%2x - %x - %x\n", (unsigned int) image.device().machine().root_device().memregion("cart")->u8(0x20), (unsigned int) image.device().machine().root_device().memregion("cart")->u8(0x21),
	677	//        (unsigned int) image.device().machine().root_device().memregion("cart")->u8(0x22), (unsigned int) image.device().machine().root_device().memregion("cart")->u8(0x23));
678	678	state->m_flash_chip[0].manufacturer_id = 0x98;
679	679	switch( filesize )
680	680	{

src/mess/drivers/z88.c

r14976	r14977
68	68	m_maincpu->memory().space(AS_PROGRAM)->install_read_bank(bank<<14, (bank<<14) + 0x3fff, bank_tag);
69	69	m_maincpu->memory().space(AS_PROGRAM)->unmap_write(bank<<14, (bank<<14) + 0x3fff);
70	70
71		memory_set_bank(machine(), bank_tag, page);
	71	membank(bank_tag)->set_entry(page);
72	72	}
73	73	else if (page < 0x40)   // internal RAM
74	74	{
r14976	r14977
78	78	m_maincpu->memory().space(AS_PROGRAM)->install_readwrite_bank(bank<<14, (bank<<14) + 0x3fff, bank_tag);
79	79
80	80	// set the bank
81		memory_set_bank(machine(), bank_tag, page);
	81	membank(bank_tag)->set_entry(page);
82	82	}
83	83	else
84	84	{
r14976	r14977
119	119	else
120	120	m_maincpu->memory().space(AS_PROGRAM)->unmap_write(0, 0x1fff);
121	121
122		memory_set_bank(machine(), "bank1", rams & 1);
	122	membank("bank1")->set_entry(rams & 1);
123	123	}
124	124	}
125	125
r14976	r14977
245	245
246	246	void z88_state::machine_start()
247	247	{
248		m_bios = (UINT8*)machine().region("bios")->base();
	248	m_bios = (UINT8*)machine().root_device().memregion("bios")->base();
249	249	m_ram_base = (UINT8*)m_ram->pointer();
250	250
251	251	// configure the memory banks
252		memory_configure_bank(machine(), "bank1", 0, 1, m_bios, 0);
253		memory_configure_bank(machine(), "bank1", 1, 1, m_ram_base,  0);
254		memory_configure_bank(machine(), "bank2", 0, 32, m_bios, 0x4000);
255		memory_configure_bank(machine(), "bank3", 0, 32, m_bios, 0x4000);
256		memory_configure_bank(machine(), "bank4", 0, 32, m_bios, 0x4000);
257		memory_configure_bank(machine(), "bank5", 0, 32, m_bios, 0x4000);
258		memory_configure_bank(machine(), "bank2", 32, m_ram->size()>>14, m_ram_base, 0x4000);
259		memory_configure_bank(machine(), "bank3", 32, m_ram->size()>>14, m_ram_base, 0x4000);
260		memory_configure_bank(machine(), "bank4", 32, m_ram->size()>>14, m_ram_base, 0x4000);
261		memory_configure_bank(machine(), "bank5", 32, m_ram->size()>>14, m_ram_base, 0x4000);
	252	membank("bank1")->configure_entry(0, m_bios);
	253	membank("bank1")->configure_entry(1, m_ram_base);
	254	membank("bank2")->configure_entries(0, 32, m_bios, 0x4000);
	255	membank("bank3")->configure_entries(0, 32, m_bios, 0x4000);
	256	membank("bank4")->configure_entries(0, 32, m_bios, 0x4000);
	257	membank("bank5")->configure_entries(0, 32, m_bios, 0x4000);
	258	membank("bank2")->configure_entries(32, m_ram->size()>>14, m_ram_base, 0x4000);
	259	membank("bank3")->configure_entries(32, m_ram->size()>>14, m_ram_base, 0x4000);
	260	membank("bank4")->configure_entries(32, m_ram->size()>>14, m_ram_base, 0x4000);
	261	membank("bank5")->configure_entries(32, m_ram->size()>>14, m_ram_base, 0x4000);
262	262
263	263	m_carts[1] = machine().device<z88cart_slot_device>("slot1");
264	264	m_carts[2] = machine().device<z88cart_slot_device>("slot2");

src/mess/drivers/pce220.c

r14976	r14977
310	310
311	311	m_bank_num = data;
312	312
313		memory_set_bank(machine(), "bank3", bank3);
314		memory_set_bank(machine(), "bank4", bank4);
	313	membank("bank3")->set_entry(bank3);
	314	membank("bank4")->set_entry(bank4);
315	315	}
316	316
317	317	WRITE8_MEMBER( pce220_state::ram_bank_w )
318	318	{
319	319	UINT8 bank = BIT(data,2);
320	320
321		memory_set_bank(machine(), "bank1", bank);
322		memory_set_bank(machine(), "bank2", bank);
	321	membank("bank1")->set_entry(bank);
	322	membank("bank2")->set_entry(bank);
323	323	}
324	324
325	325	READ8_MEMBER( pce220_state::timer_r )
r14976	r14977
339	339	{
340	340	address_space *space_prg = m_maincpu->memory().space(AS_PROGRAM);
341	341	space_prg->install_write_bank(0x0000, 0x3fff, "bank1");
342		memory_set_bank(machine(), "bank1", 0);
	342	membank("bank1")->set_entry(0);
343	343	}
344	344	}
345	345
r14976	r14977
474	474	if (data < 0x16)
475	475	{
476	476	space_prg->install_read_bank(0xc000, 0xffff, "bank4");
477		memory_set_bank(machine(), "bank4", data);
	477	membank("bank4")->set_entry(data);
478	478	}
479	479	else
480	480	{
r14976	r14977
843	843
844	844	void pce220_state::machine_start()
845	845	{
846		UINT8 *rom = machine().region("user1")->base();
	846	UINT8 *rom = memregion("user1")->base();
847	847	UINT8 *ram = m_ram->pointer();
848	848
849		memory_configure_bank(machine(), "bank1", 0, 2, ram + 0x0000, 0x8000);
850		memory_configure_bank(machine(), "bank2", 0, 2, ram + 0x4000, 0x8000);
851		memory_configure_bank(machine(), "bank3", 0, 8, rom, 0x4000);
852		memory_configure_bank(machine(), "bank4", 0, 8, rom, 0x4000);
	849	membank("bank1")->configure_entries(0, 2, ram + 0x0000, 0x8000);
	850	membank("bank2")->configure_entries(0, 2, ram + 0x4000, 0x8000);
	851	membank("bank3")->configure_entries(0, 8, rom, 0x4000);
	852	membank("bank4")->configure_entries(0, 8, rom, 0x4000);
853	853
854		m_vram = (UINT8*)machine().region("lcd_vram")->base();
	854	m_vram = (UINT8*)machine().root_device().memregion("lcd_vram")->base();
855	855
856	856	machine().device<nvram_device>("nvram")->set_base(ram, m_ram->size());
857	857	}
858	858
859	859	void pcg850v_state::machine_start()
860	860	{
861		UINT8 *rom = machine().region("user1")->base();
	861	UINT8 *rom = memregion("user1")->base();
862	862	UINT8 *ram = m_ram->pointer();
863	863
864		memory_configure_bank(machine(), "bank1", 0, 2, ram + 0x0000, 0x8000);
865		memory_configure_bank(machine(), "bank2", 0, 2, ram + 0x4000, 0x8000);
866		memory_configure_bank(machine(), "bank3", 0, 22, rom, 0x4000);
867		memory_configure_bank(machine(), "bank4", 0, 22, rom, 0x4000);
	864	membank("bank1")->configure_entries(0, 2, ram + 0x0000, 0x8000);
	865	membank("bank2")->configure_entries(0, 2, ram + 0x4000, 0x8000);
	866	membank("bank3")->configure_entries(0, 22, rom, 0x4000);
	867	membank("bank4")->configure_entries(0, 22, rom, 0x4000);
868	868
869		m_vram = (UINT8*)machine().region("lcd_vram")->base();
	869	m_vram = (UINT8*)machine().root_device().memregion("lcd_vram")->base();
870	870	machine().device<nvram_device>("nvram")->set_base(ram, m_ram->size());
871	871	}
872	872
r14976	r14977
876	876	space->unmap_write(0x0000, 0x3fff);
877	877
878	878	// install the boot code into the first bank
879		memory_set_bankptr(machine(), "bank1", machine().region("user1")->base() + 0x0000);
	879	membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + 0x0000);
880	880
881	881	m_lcd_index_row = 0;
882	882	m_lcd_index_col = 0;

src/mess/drivers/sgi_ip2.c

r14976	r14977
543	543	static DRIVER_INIT( sgi_ip2 )
544	544	{
545	545	sgi_ip2_state *state = machine.driver_data<sgi_ip2_state>();
546		UINT32 *src = (UINT32*)(*machine.region("user1"));
	546	UINT32 *src = (UINT32*)(*state->memregion("user1"));
547	547	UINT32 *dst = state->m_mainram;
548	548	memcpy(dst, src, 8);
549	549

src/mess/drivers/pcw16.c

r14976	r14977
423	423	{
424	424	/* lower 4 banks are write protected. Use the rom
425	425	loaded */
426		mem_ptr = &machine.region("maincpu")->base()[0x010000];
	426	mem_ptr = &state->memregion("maincpu")->base()[0x010000];
427	427	}
428	428	else
429	429	{
r14976	r14977
454	454	state->m_mem_ptr[bank] = (char*)mem_ptr;
455	455	sprintf(bank1,"bank%d",(bank+1));
456	456	sprintf(bank2,"bank%d",(bank+5));
457		memory_set_bankptr(machine, bank1, mem_ptr);
458		memory_set_bankptr(machine, bank2, mem_ptr);
	457	state->membank(bank1)->set_base(mem_ptr);
	458	state->membank(bank2)->set_base(mem_ptr);
459	459
460	460	if ((bank_id & 0x080)==0)
461	461	{

src/mess/drivers/ht68k.c

r14976	r14977
72	72	static MACHINE_RESET(ht68k)
73	73	{
74	74	ht68k_state *state = machine.driver_data<ht68k_state>();
75		UINT8* user1 = machine.region("user1")->base();
	75	UINT8* user1 = state->memregion("user1")->base();
76	76
77	77	memcpy((UINT8*)state->m_p_ram.target(),user1,0x8000);
78	78

src/mess/drivers/paso1600.c

r14976	r14977
75	75	static VIDEO_START( paso1600 )
76	76	{
77	77	paso1600_state *state = machine.driver_data<paso1600_state>();
78		state->m_p_chargen = machine.region("chargen")->base();
79		state->m_p_pcg = machine.region("pcg")->base();
	78	state->m_p_chargen = machine.root_device().memregion("chargen")->base();
	79	state->m_p_pcg = state->memregion("pcg")->base();
80	80	}
81	81
82	82	static SCREEN_UPDATE_IND16( paso1600 )

src/mess/drivers/next.c

r14976	r14977
1151	1151
1152	1152	/*
1153	1153
1154		UINT32 *rom = (UINT32 *)(machine.region("user1")->base());
	1154	UINT32 *rom = (UINT32 *)(machine.root_device().memregion("user1")->base());
1155	1155	rom[0x3f48/4] = 0x2f017000; // memory test funcall
1156	1156	rom[0x3f4c/4] = 0x4e712400;
1157	1157	rom[0x00b8/4] = 0x001a4e71; // rom checksum
1158	1158	rom[0x00bc/4] = 0x4e714e71;
1159	1159
1160	1160	v74
1161		UINT32 *rom = (UINT32 *)(machine.region("user1")->base());
	1161	UINT32 *rom = (UINT32 *)(machine.root_device().memregion("user1")->base());
1162	1162	rom[0x329c/4] = 0x70004e71; // memory test funcall
1163	1163	rom[0x32a0/4] = 0x4e712400;
1164	1164	rom[0x03f8/4] = 0x001a4e71; // rom checksum

src/mess/drivers/prof80.c

r14976	r14977
50	50	{
51	51	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
52	52	UINT8 *ram = m_ram->pointer();
53		UINT8 *rom = machine().region(Z80_TAG)->base();
	53	UINT8 *rom = memregion(Z80_TAG)->base();
54	54	int bank;
55	55
56	56	for (bank = 0; bank < 16; bank++)

src/mess/drivers/vt240.c

r14976	r14977
199	199	/* Driver */
200	200	static DRIVER_INIT( vt240 )
201	201	{
202		UINT8 *ROM = machine.region("ipl")->base();
	202	UINT8 *ROM = machine.root_device().memregion("ipl")->base();
203	203
204	204	/* patch T11 check */
205	205	ROM[0x09d] = 0x00;

src/mess/drivers/pasogo.c

r14976	r14977
177	177
178	178	if (log)
179	179	logerror("%.5x vg230 %02x read %.2x\n",(int) cpu_get_pc(m_maincpu),vg230->index,data);
180		//    data=machine.region("maincpu")->base()[0x4000+offset];
	180	//    data=machine.root_device().memregion("maincpu")->base()[0x4000+offset];
181	181	}
182	182	else
183	183	data=vg230->index;
r14976	r14977
191	191
192	192	if (offset&1)
193	193	{
194		//  machine.region("maincpu")->base()[0x4000+offset]=data;
	194	//  machine.root_device().memregion("maincpu")->base()[0x4000+offset]=data;
195	195	vg230->data[vg230->index]=data;
196	196	switch (vg230->index)
197	197	{
r14976	r14977
295	295	case 0: /*external*/
296	296	case 1: /*ram*/
297	297	sprintf(bank,"bank%d",ems->index+1);
298		memory_set_bankptr( machine(), bank, machine().region("maincpu")->base() + (ems->mapper[ems->index].address&0xfffff) );
	298	membank( bank )->set_base( memregion("maincpu")->base() + (ems->mapper[ems->index].address&0xfffff) );
299	299	break;
300	300	case 3: /* rom 1 */
301	301	case 4: /* pc card a */
r14976	r14977
304	304	break;
305	305	case 2:
306	306	sprintf(bank,"bank%d",ems->index+1);
307		memory_set_bankptr( machine(),  bank, machine().region("user1")->base() + (ems->mapper[ems->index].address&0xfffff) );
	307	membank( bank )->set_base( memregion("user1")->base() + (ems->mapper[ems->index].address&0xfffff) );
308	308	break;
309	309	}
310	310	break;
r14976	r14977
392	392	static SCREEN_UPDATE_IND16( pasogo )
393	393	{
394	394	//static int width=-1,height=-1;
395		UINT8 *rom = screen.machine().region("maincpu")->base()+0xb8000;
	395	UINT8 *rom = screen.machine().root_device().memregion("maincpu")->base()+0xb8000;
396	396	static const UINT16 c[]={ 3, 0 };
397	397	int x,y;
398	398	//  plot_box(bitmap, 0, 0, 64/*bitmap.width*/, bitmap.height, 0);
r14976	r14977
547	547	pasogo_state *state = machine.driver_data<pasogo_state>();
548	548	vg230_init(machine);
549	549	memset(&state->m_ems, 0, sizeof(state->m_ems));
550		memory_set_bankptr( machine, "bank27", machine.region("user1")->base() + 0x00000 );
551		memory_set_bankptr( machine, "bank28", machine.region("maincpu")->base() + 0xb8000/*?*/ );
	550	state->membank( "bank27" )->set_base( machine.root_device().memregion("user1")->base() + 0x00000 );
	551	state->membank( "bank28" )->set_base( state->memregion("maincpu")->base() + 0xb8000/*?*/ );
552	552	}
553	553
554	554	//    YEAR   NAME    PARENT  COMPAT    MACHINE   INPUT     INIT      COMPANY  FULLNAME          FLAGS

src/mess/drivers/sys2900.c

r14976	r14977
67	67	/* after the first 4 bytes have been read from ROM, switch the ram back in */
68	68	static TIMER_CALLBACK( sys2900_boot )
69	69	{
70		memory_set_bank(machine, "boot", 0);
	70	sys2900_state *state = machine.driver_data<sys2900_state>();
	71	state->membank("boot")->set_entry(0);
71	72	}
72	73
73	74	static MACHINE_RESET(sys2900)
74	75	{
75		memory_set_bank(machine, "boot", 1);
	76	sys2900_state *state = machine.driver_data<sys2900_state>();
	77	state->membank("boot")->set_entry(1);
76	78	machine.scheduler().timer_set(attotime::from_usec(5), FUNC(sys2900_boot));
77	79	}
78	80
79	81	DRIVER_INIT( sys2900 )
80	82	{
81		UINT8 *RAM = machine.region("maincpu")->base();
82		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xf000);
	83	sys2900_state *state = machine.driver_data<sys2900_state>();
	84	UINT8 *RAM = state->memregion("maincpu")->base();
	85	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xf000);
83	86	}
84	87
85	88	static VIDEO_START( sys2900 )

src/mess/drivers/lynx.c

r14976	r14977
143	143	device_t *cpu = image.device().machine().device("maincpu");
144	144	address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
145	145	UINT8 *data = NULL;
146		UINT8 *rom = image.device().machine().region("maincpu")->base();
	146	UINT8 *rom = image.device().machine().root_device().memregion("maincpu")->base();
147	147	UINT8 header[10]; // 80 08 dw Start dw Len B S 9 3
148	148	UINT16 start, length;
149	149	int i;

src/mess/drivers/aquarius.c

r14976	r14977
185	185
186	186	READ8_MEMBER(aquarius_state::cartridge_r)
187	187	{
188		UINT8 *rom = machine().region("maincpu")->base() + 0xc000;
	188	UINT8 *rom = memregion("maincpu")->base() + 0xc000;
189	189	return rom[offset] ^ m_scrambler;
190	190	}
191	191
r14976	r14977
213	213
214	214	static DRIVER_INIT( aquarius )
215	215	{
	216	aquarius_state *state = machine.driver_data<aquarius_state>();
216	217	/* install expansion memory if available */
217	218	if (machine.device<ram_device>(RAM_TAG)->size() > 0x1000)
218	219	{
219	220	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
220	221
221	222	space->install_readwrite_bank(0x4000, 0x4000 + machine.device<ram_device>(RAM_TAG)->size() - 0x1000 - 1, "bank1");
222		memory_set_bankptr(machine, "bank1", machine.device<ram_device>(RAM_TAG)->pointer());
	223	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
223	224	}
224	225	}
225	226

src/mess/drivers/cgenie.c

r14976	r14977
710	710	spt = pd_list[i].SPT / heads;
711	711	dir_sector = pd_list[i].DDSL * pd_list[i].GATM * pd_list[i].GPL + pd_list[i].SPT;
712	712	dir_length = pd_list[i].DDGA * pd_list[i].GPL;
713		memcpy(image.device().machine().region("maincpu")->base() + 0x5A71 + floppy_get_drive(image) * sizeof(PDRIVE), &pd_list[i], sizeof(PDRIVE));
	713	memcpy(image.device().machine().root_device().memregion("maincpu")->base() + 0x5A71 + floppy_get_drive(image) * sizeof(PDRIVE), &pd_list[i], sizeof(PDRIVE));
714	714	break;
715	715	}
716	716	}

src/mess/drivers/codata.c

r14976	r14977
39	39	static MACHINE_RESET(codata)
40	40	{
41	41	codata_state *state = machine.driver_data<codata_state>();
42		UINT8* RAM = machine.region("user1")->base();
	42	UINT8* RAM = state->memregion("user1")->base();
43	43	memcpy(state->m_p_base, RAM, 16);
44	44	machine.device("maincpu")->reset();
45	45	}

src/mess/drivers/pasopia.c

r14976	r14977
74	74	{
75	75	pasopia_state *state = device->machine().driver_data<pasopia_state>();
76	76	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
77		UINT8 *m_p_chargen = device->machine().region("chargen")->base();
	77	UINT8 *m_p_chargen = state->memregion("chargen")->base();
78	78	UINT8 chr,gfx,fg=7,bg=0; // colours need to be determined
79	79	UINT16 mem,x;
80	80	UINT32 *p = &bitmap.pix32(y);
r14976	r14977
104	104	WRITE8_MEMBER( pasopia_state::pasopia_ctrl_w )
105	105	{
106	106	m_ram_bank = BIT(data, 1);
107		memory_set_bank(machine(), "bank1", m_ram_bank);
	107	membank("bank1")->set_entry(m_ram_bank);
108	108	}
109	109
110	110	static ADDRESS_MAP_START(pasopia_map, AS_PROGRAM, 8, pasopia_state)
r14976	r14977
136	136	static MACHINE_START(pasopia)
137	137	{
138	138	pasopia_state *state = machine.driver_data<pasopia_state>();
139		state->m_p_vram = machine.region("vram")->base();
	139	state->m_p_vram = state->memregion("vram")->base();
140	140	state->m_hblank = 0;
141		memory_set_bank(machine, "bank1", 0);
142		memory_set_bank(machine, "bank2", 0);
	141	state->membank("bank1")->set_entry(0);
	142	state->membank("bank2")->set_entry(0);
143	143	}
144	144
145	145	static MACHINE_RESET(pasopia)
r14976	r14977
331	331	We preset all banks here, so that bankswitching will incur no speed penalty.
332	332	0000 indicates ROMs, 10000 indicates RAM.
333	333	*/
334
335		UINT8 *p_ram = machine.region("maincpu")->base();
336		memory_configure_bank(machine, "bank1", 0, 2, &p_ram[0x00000], 0x10000);
337		memory_configure_bank(machine, "bank2", 0, 1, &p_ram[0x10000], 0);
	334	pasopia_state *state = machine.driver_data<pasopia_state>();
	335	UINT8 *p_ram = state->memregion("maincpu")->base();
	336	state->membank("bank1")->configure_entries(0, 2, &p_ram[0x00000], 0x10000);
	337	state->membank("bank2")->configure_entry(0, &p_ram[0x10000]);
338	338	}
339	339
340	340	static MACHINE_CONFIG_START( pasopia, pasopia_state )

src/mess/drivers/specpls3.c

r14976	r14977
238	238	ram_page = state->m_port_7ffd_data & 0x07;
239	239	ram_data = messram + (ram_page<<14);
240	240
241		memory_set_bankptr(machine, "bank4", ram_data);
	241	state->membank("bank4")->set_base(ram_data);
242	242
243	243	logerror("RAM at 0xc000: %02x\n", ram_page);
244	244
245	245	/* Reset memory between 0x4000 - 0xbfff in case extended paging was being used */
246	246	/* Bank 5 in 0x4000 - 0x7fff */
247		memory_set_bankptr(machine, "bank2", messram + (5 << 14));
	247	state->membank("bank2")->set_base(messram + (5 << 14));
248	248
249	249	/* Bank 2 in 0x8000 - 0xbfff */
250		memory_set_bankptr(machine, "bank3", messram + (2 << 14));
	250	state->membank("bank3")->set_base(messram + (2 << 14));
251	251
252	252
253	253	ROMSelection = ((state->m_port_7ffd_data >> 4) & 0x01) |
r14976	r14977
255	255
256	256	/* rom 0 is editor, rom 1 is syntax, rom 2 is DOS, rom 3 is 48 BASIC */
257	257
258		ChosenROM = machine.region("maincpu")->base() + 0x010000 + (ROMSelection << 14);
	258	ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000 + (ROMSelection << 14);
259	259
260		memory_set_bankptr(machine, "bank1", ChosenROM);
	260	state->membank("bank1")->set_base(ChosenROM);
261	261	space->unmap_write(0x0000, 0x3fff);
262	262
263	263	logerror("rom switch: %02x\n", ROMSelection);
r14976	r14977
275	275	memory_selection = &spectrum_plus3_memory_selections[(MemorySelection << 2)];
276	276
277	277	ram_data = messram + (memory_selection[0] << 14);
278		memory_set_bankptr(machine, "bank1", ram_data);
	278	state->membank("bank1")->set_base(ram_data);
279	279	/* allow writes to 0x0000-0x03fff */
280	280	space->install_write_bank(0x0000, 0x3fff, "bank1");
281	281
282	282	ram_data = messram + (memory_selection[1] << 14);
283		memory_set_bankptr(machine, "bank2", ram_data);
	283	state->membank("bank2")->set_base(ram_data);
284	284
285	285	ram_data = messram + (memory_selection[2] << 14);
286		memory_set_bankptr(machine, "bank3", ram_data);
	286	state->membank("bank3")->set_base(ram_data);
287	287
288	288	ram_data = messram + (memory_selection[3] << 14);
289		memory_set_bankptr(machine, "bank4", ram_data);
	289	state->membank("bank4")->set_base(ram_data);
290	290
291	291	logerror("extended memory paging: %02x\n", MemorySelection);
292	292	}

src/mess/drivers/apexc.c

r14976	r14977
96	96	/* load RAM contents */
97	97	m_writable = !is_readonly();
98	98
99		fread( machine().region("maincpu")->base(), /*0x8000*/0x1000);
	99	fread( memregion("maincpu")->base(), /*0x8000*/0x1000);
100	100	#ifdef LSB_FIRST
101	101	{   /* fix endianness */
102	102	UINT32 *RAM;
103	103	int i;
104	104
105		RAM = (UINT32 *)(*machine().region("maincpu"));
	105	RAM = (UINT32 *)(*machine().root_device().memregion("maincpu"));
106	106
107	107	for (i=0; i < /*0x2000*/0x0400; i++)
108	108	RAM[i] = BIG_ENDIANIZE_INT32(RAM[i]);
r14976	r14977
126	126	UINT32 *RAM;
127	127	int i;
128	128
129		RAM = (UINT32 *)(*machine().region("maincpu"));
	129	RAM = (UINT32 *)(*machine().root_device().memregion("maincpu"));
130	130
131	131	for (i=0; i < /*0x2000*/0x0400; i++)
132	132	RAM[i] = BIG_ENDIANIZE_INT32(RAM[i]);
133	133	}
134	134	#endif
135	135	/* write */
136		fwrite(machine().region("maincpu")->base(), /*0x8000*/0x1000);
	136	fwrite(machine().root_device().memregion("maincpu")->base(), /*0x8000*/0x1000);
137	137	}
138	138	}
139	139
r14976	r14977
823	823	0x00
824	824	};
825	825
826		dst = machine.region("gfx1")->base();
	826	dst = machine.root_device().memregion("gfx1")->base();
827	827
828	828	memcpy(dst, fontdata6x8, apexcfontdata_size);
829	829	}

src/mess/drivers/x68k.c

r14976	r14977
2569	2569	more or less do the same job */
2570	2570
2571	2571	int drive;
2572		UINT8* romdata = machine.region("user2")->base();
	2572	UINT8* romdata = state->memregion("user2")->base();
2573	2573	attotime irq_time;
2574	2574
2575	2575	memset(machine.device<ram_device>(RAM_TAG)->pointer(),0,machine.device<ram_device>(RAM_TAG)->size());
r14976	r14977
2640	2640	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2641	2641	x68k_state *state = machine.driver_data<x68k_state>();
2642	2642	/*  Install RAM handlers  */
2643		state->m_spriteram = (UINT16*)(*machine.region("user1"));
	2643	state->m_spriteram = (UINT16*)(*state->memregion("user1"));
2644	2644	space->install_legacy_read_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_emptyram_r));
2645	2645	space->install_legacy_write_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_emptyram_w));
2646	2646	space->install_readwrite_bank(0x000000,machine.device<ram_device>(RAM_TAG)->size()-1,0xffffffff,0,"bank1");
2647		memory_set_bankptr(machine, "bank1",machine.device<ram_device>(RAM_TAG)->pointer());
	2647	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
2648	2648	space->install_legacy_read_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram_r));
2649	2649	space->install_legacy_write_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram_w));
2650		memory_set_bankptr(machine, "bank2",state->m_gvram);  // so that code in VRAM is executable - needed for Terra Cresta
	2650	state->membank("bank2")->set_base(state->m_gvram);  // so that code in VRAM is executable - needed for Terra Cresta
2651	2651	space->install_legacy_read_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram_r));
2652	2652	space->install_legacy_write_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram_w));
2653		memory_set_bankptr(machine, "bank3",state->m_tvram);  // so that code in VRAM is executable - needed for Terra Cresta
	2653	state->membank("bank3")->set_base(state->m_tvram);  // so that code in VRAM is executable - needed for Terra Cresta
2654	2654	space->install_legacy_read_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram_r));
2655	2655	space->install_legacy_write_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram_w));
2656		memory_set_bankptr(machine, "bank4",state->m_nvram);  // so that code in SRAM is executable, there is an option for booting from SRAM
	2656	state->membank("bank4")->set_base(state->m_nvram);  // so that code in SRAM is executable, there is an option for booting from SRAM
2657	2657
2658	2658	// start keyboard timer
2659	2659	state->m_kb_timer->adjust(attotime::zero, 0, attotime::from_msec(5));  // every 5ms
r14976	r14977
2671	2671	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2672	2672	x68030_state *state = machine.driver_data<x68030_state>();
2673	2673	/*  Install RAM handlers  */
2674		state->m_spriteram = (UINT16*)(*machine.region("user1"));
	2674	state->m_spriteram = (UINT16*)(*state->memregion("user1"));
2675	2675	space->install_legacy_read_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_rom0_r),0xffffffff);
2676	2676	space->install_legacy_write_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_rom0_w),0xffffffff);
2677	2677	space->install_readwrite_bank(0x000000,machine.device<ram_device>(RAM_TAG)->size()-1,0xffffffff,0,"bank1");
2678		memory_set_bankptr(machine, "bank1",machine.device<ram_device>(RAM_TAG)->pointer());
	2678	state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer());
2679	2679	space->install_legacy_read_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram32_r));
2680	2680	space->install_legacy_write_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram32_w));
2681		memory_set_bankptr(machine, "bank2",state->m_gvram);  // so that code in VRAM is executable - needed for Terra Cresta
	2681	state->membank("bank2")->set_base(state->m_gvram);  // so that code in VRAM is executable - needed for Terra Cresta
2682	2682	space->install_legacy_read_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram32_r));
2683	2683	space->install_legacy_write_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram32_w));
2684		memory_set_bankptr(machine, "bank3",state->m_tvram);  // so that code in VRAM is executable - needed for Terra Cresta
	2684	state->membank("bank3")->set_base(state->m_tvram);  // so that code in VRAM is executable - needed for Terra Cresta
2685	2685	space->install_legacy_read_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram32_r));
2686	2686	space->install_legacy_write_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram32_w));
2687		memory_set_bankptr(machine, "bank4",state->m_nvram);  // so that code in SRAM is executable, there is an option for booting from SRAM
	2687	state->membank("bank4")->set_base(state->m_nvram);  // so that code in SRAM is executable, there is an option for booting from SRAM
2688	2688
2689	2689	// start keyboard timer
2690	2690	state->m_kb_timer->adjust(attotime::zero, 0, attotime::from_msec(5));  // every 5ms
r14976	r14977
2700	2700	static DRIVER_INIT( x68000 )
2701	2701	{
2702	2702	x68k_state *state = machine.driver_data<x68k_state>();
2703		unsigned char* rom = machine.region("maincpu")->base();
2704		unsigned char* user2 = machine.region("user2")->base();
	2703	unsigned char* rom = machine.root_device().memregion("maincpu")->base();
	2704	unsigned char* user2 = machine.root_device().memregion("user2")->base();
2705	2705	//FIXME
2706	2706	//   state->m_gvram = auto_alloc_array(machine, UINT16, 0x080000/sizeof(UINT16));
2707	2707	//   state->m_tvram = auto_alloc_array(machine, UINT16, 0x080000/sizeof(UINT16));
r14976	r14977
2711	2711
2712	2712	#ifdef USE_PREDEFINED_SRAM
2713	2713	{
2714		unsigned char* ramptr = machine.region("user3")->base();
	2714	unsigned char* ramptr = state->memregion("user3")->base();
2715	2715	memcpy(state->m_sram,ramptr,0x4000);
2716	2716	}
2717	2717	#endif

src/mess/drivers/pc2000.c

r14976	r14977
74	74
75	75	WRITE8_MEMBER( pc2000_state::rombank1_w )
76	76	{
77		memory_set_bank(machine(), "bank1", data & 0x0f);
	77	membank("bank1")->set_entry(data & 0x0f);
78	78	}
79	79
80	80	WRITE8_MEMBER( pc2000_state::rombank2_w )
81	81	{
82	82	if (data == 0x80)
83	83	{
84		memory_set_bank(machine(), "bank2", data & 0x10);   //cartridge
	84	membank("bank2")->set_entry(data & 0x10);   //cartridge
85	85	}
86	86	else
87	87	{
88		memory_set_bank(machine(), "bank2", data & 0x0f);
	88	membank("bank2")->set_entry(data & 0x0f);
89	89	}
90	90	}
91	91
r14976	r14977
280	280
281	281	void pc2000_state::machine_start()
282	282	{
283		UINT8 *bios = machine().region("bios")->base();
284		UINT8 *cart = machine().region("cart")->base();
	283	UINT8 *bios = memregion("bios")->base();
	284	UINT8 *cart = memregion("cart")->base();
285	285
286		memory_configure_bank(machine(), "bank1", 0, 0x10, bios, 0x4000);
287		memory_configure_bank(machine(), "bank2", 0, 0x10, bios, 0x4000);
288		memory_configure_bank(machine(), "bank2", 0x10, 1, cart, 0x4000);
	286	membank("bank1")->configure_entries(0, 0x10, bios, 0x4000);
	287	membank("bank2")->configure_entries(0, 0x10, bios, 0x4000);
	288	membank("bank2")->configure_entry(0x10, cart);
289	289	}
290	290
291	291	void pc2000_state::machine_reset()
292	292	{
293	293	//set the initial bank
294		memory_set_bank(machine(), "bank1", 0);
295		memory_set_bank(machine(), "bank2", 0);
	294	membank("bank1")->set_entry(0);
	295	membank("bank2")->set_entry(0);
296	296	}
297	297
298	298	static PALETTE_INIT( pc2000 )

src/mess/drivers/n64.c

r14976	r14977
163	163	{
164	164	int i, length;
165	165	n64_periphs *periphs = image.device().machine().device<n64_periphs>("rcp");
166		UINT8 *cart = image.device().machine().region("user2")->base();
	166	UINT8 *cart = image.device().machine().root_device().memregion("user2")->base();
167	167
168	168	if (image.software_entry() == NULL)
169	169	{
r14976	r14977
235	235	{
236	236	MACHINE_START_CALL( n64 );
237	237
238		UINT8 *ipl = machine.region("ddipl")->base();
	238	UINT8 *ipl = machine.root_device().memregion("ddipl")->base();
239	239
240	240	for (int i = 0; i < 0x400000; i += 4)
241	241	{

src/mess/drivers/beta.c

r14976	r14977
122	122	default:
123	123	if (!m_eprom_oe && !m_eprom_ce)
124	124	{
125		data = machine().region(EPROM_TAG)->base()[m_eprom_addr & 0x7ff];
	125	data = memregion(EPROM_TAG)->base()[m_eprom_addr & 0x7ff];
126	126	popmessage("EPROM read %04x = %02x\n", m_eprom_addr & 0x7ff, data);
127	127	}
128	128	}
r14976	r14977
209	209	if (BIT(data, 6) && (!BIT(m_old_data, 7) && BIT(data, 7)))
210	210	{
211	211	popmessage("EPROM write %04x = %02x\n", m_eprom_addr & 0x7ff, m_eprom_data);
212		machine().region(EPROM_TAG)->base()[m_eprom_addr & 0x7ff] &= m_eprom_data;
	212	memregion(EPROM_TAG)->base()[m_eprom_addr & 0x7ff] &= m_eprom_data;
213	213	}
214	214
215	215	m_old_data = data;
r14976	r14977
228	228
229	229	static DEVICE_IMAGE_UNLOAD( beta_eprom )
230	230	{
231		UINT8 *ptr = image.device().machine().region(EPROM_TAG)->base();
	231	UINT8 *ptr = image.device().machine().root_device().memregion(EPROM_TAG)->base();
232	232
233	233	image.fwrite(ptr, 0x800);
234	234	}

src/mess/drivers/pc8001.c

r14976	r14977
315	315	void pc8001_state::video_start()
316	316	{
317	317	// find memory regions
318		m_char_rom = machine().region("chargen")->base();
	318	m_char_rom = memregion("chargen")->base();
319	319	}
320	320
321	321	/* uPD3301 Interface */
r14976	r14977
463	463	/* setup memory banking */
464	464	UINT8 *ram = m_ram->pointer();
465	465
466		memory_configure_bank(machine(), "bank1", 1, 1, machine().region("n80")->base(), 0);
	466	membank("bank1")->configure_entry(1, memregion("n80")->base());
467	467	program->install_read_bank(0x0000, 0x5fff, "bank1");
468	468	program->unmap_write(0x0000, 0x5fff);
469	469
470	470	switch (m_ram->size())
471	471	{
472	472	case 16*1024:
473		memory_configure_bank(machine(), "bank3", 0, 1, ram, 0);
	473	membank("bank3")->configure_entry(0, ram);
474	474	program->unmap_readwrite(0x6000, 0xbfff);
475	475	program->unmap_readwrite(0x8000, 0xbfff);
476	476	program->install_readwrite_bank(0xc000, 0xffff, "bank3");
477	477	break;
478	478
479	479	case 32*1024:
480		memory_configure_bank(machine(), "bank3", 0, 1, ram, 0);
	480	membank("bank3")->configure_entry(0, ram);
481	481	program->unmap_readwrite(0x6000, 0xbfff);
482	482	program->install_readwrite_bank(0x8000, 0xffff, "bank3");
483	483	break;
484	484
485	485	case 64*1024:
486		memory_configure_bank(machine(), "bank1", 0, 1, ram, 0);
487		memory_configure_bank(machine(), "bank2", 0, 1, ram + 0x6000, 0);
488		memory_configure_bank(machine(), "bank3", 0, 1, ram + 0x8000, 0);
	486	membank("bank1")->configure_entry(0, ram);
	487	membank("bank2")->configure_entry(0, ram + 0x6000);
	488	membank("bank3")->configure_entry(0, ram + 0x8000);
489	489	program->install_readwrite_bank(0x0000, 0x5fff, "bank1");
490	490	program->install_readwrite_bank(0x6000, 0xbfff, "bank2");
491	491	program->install_readwrite_bank(0x8000, 0xffff, "bank3");
492		memory_set_bank(machine(), "bank2", 0);
	492	membank("bank2")->set_entry(0);
493	493	break;
494	494	}
495	495
496		memory_set_bank(machine(), "bank1", 1);
497		memory_set_bank(machine(), "bank3", 0);
	496	membank("bank1")->set_entry(1);
	497	membank("bank3")->set_entry(0);
498	498
499	499	/* register for state saving */
500	500	save_item(NAME(m_width80));

src/mess/drivers/px4.c

r14976	r14977
493	493	/* helper function to map rom capsules */
494	494	static void install_rom_capsule(address_space *space, int size, const char *region)
495	495	{
496		px4_state *px4 = space->machine().driver_data<px4_state>();
	496	px4_state *state = space->machine().driver_data<px4_state>();
497	497
498	498	/* ram, part 1 */
499	499	space->install_readwrite_bank(0x0000, 0xdfff - size, "bank1");
500		memory_set_bankptr(space->machine(), "bank1", px4->m_ram->pointer());
	500	state->membank("bank1")->set_base(state->m_ram->pointer());
501	501
502	502	/* actual rom data, part 1 */
503	503	space->install_read_bank(0xe000 - size, 0xffff - size, "bank2");
504	504	space->nop_write(0xe000 - size, 0xffff - size);
505		memory_set_bankptr(space->machine(), "bank2", space->machine().region(region)->base() + (size - 0x2000));
	505	state->membank("bank2")->set_base(space->machine().root_device().memregion(region)->base() + (size - 0x2000));
506	506
507	507	/* rom data, part 2 */
508	508	if (size != 0x2000)
509	509	{
510	510	space->install_read_bank(0x10000 - size, 0xdfff, "bank3");
511	511	space->nop_write(0x10000 - size, 0xdfff);
512		memory_set_bankptr(space->machine(), "bank3", space->machine().region(region)->base());
	512	state->membank("bank3")->set_base(space->machine().root_device().memregion(region)->base());
513	513	}
514	514
515	515	/* ram, continued */
516	516	space->install_readwrite_bank(0xe000, 0xffff, "bank4");
517		memory_set_bankptr(space->machine(), "bank4", px4->m_ram->pointer() + 0xe000);
	517	state->membank("bank4")->set_base(state->m_ram->pointer() + 0xe000);
518	518	}
519	519
520	520	/* bank register */
r14976	r14977
534	534	/* system bank */
535	535	space_program->install_read_bank(0x0000, 0x7fff, "bank1");
536	536	space_program->nop_write(0x0000, 0x7fff);
537		memory_set_bankptr(machine(), "bank1", machine().region("os")->base());
	537	membank("bank1")->set_base(machine().root_device().memregion("os")->base());
538	538	space_program->install_readwrite_bank(0x8000, 0xffff, "bank2");
539		memory_set_bankptr(machine(), "bank2", m_ram->pointer() + 0x8000);
	539	membank("bank2")->set_base(m_ram->pointer() + 0x8000);
540	540	break;
541	541
542	542	case 0x04:
543	543	/* memory */
544	544	space_program->install_readwrite_bank(0x0000, 0xffff, "bank1");
545		memory_set_bankptr(machine(), "bank1", m_ram->pointer());
	545	membank("bank1")->set_base(m_ram->pointer());
546	546	break;
547	547
548	548	case 0x08: install_rom_capsule(space_program, 0x2000, "capsule1"); break;
r14976	r14977
993	993	else if (m_ramdisk_address < 0x40000)
994	994	{
995	995	/* read from rom */
996		ret = machine().region("ramdisk")->base()[m_ramdisk_address];
	996	ret = memregion("ramdisk")->base()[m_ramdisk_address];
997	997	}
998	998
999	999	m_ramdisk_address = (m_ramdisk_address & 0xffff00) | ((m_ramdisk_address & 0xff) + 1);
r14976	r14977
1071	1071
1072	1072	static DRIVER_INIT( px4 )
1073	1073	{
1074		px4_state *px4 = machine.driver_data<px4_state>();
	1074	px4_state *state = machine.driver_data<px4_state>();
1075	1075
1076	1076	/* find devices */
1077		px4->m_ram = machine.device<ram_device>(RAM_TAG);
	1077	state->m_ram = machine.device<ram_device>(RAM_TAG);
1078	1078
1079	1079	/* init 7508 */
1080		px4->m_one_sec_int_enabled = TRUE;
1081		px4->m_key_int_enabled = TRUE;
1082		px4->m_alarm_int_enabled = TRUE;
	1080	state->m_one_sec_int_enabled = TRUE;
	1081	state->m_key_int_enabled = TRUE;
	1082	state->m_alarm_int_enabled = TRUE;
1083	1083
1084	1084	/* art */
1085		px4->m_receive_timer = machine.scheduler().timer_alloc(FUNC(receive_data));
1086		px4->m_transmit_timer = machine.scheduler().timer_alloc(FUNC(transmit_data));
	1085	state->m_receive_timer = machine.scheduler().timer_alloc(FUNC(receive_data));
	1086	state->m_transmit_timer = machine.scheduler().timer_alloc(FUNC(transmit_data));
1087	1087
1088	1088	/* printer */
1089		px4->m_centronics = machine.device<centronics_device>("centronics");
	1089	state->m_centronics = machine.device<centronics_device>("centronics");
1090	1090
1091	1091	/* external cassette or barcode reader */
1092		px4->m_ext_cas_timer = machine.scheduler().timer_alloc(FUNC(ext_cassette_read));
1093		px4->m_ext_cas = machine.device<cassette_image_device>("extcas");
1094		px4->m_ear_last_state = 0;
	1092	state->m_ext_cas_timer = machine.scheduler().timer_alloc(FUNC(ext_cassette_read));
	1093	state->m_ext_cas = machine.device<cassette_image_device>("extcas");
	1094	state->m_ear_last_state = 0;
1095	1095
1096	1096	/* external devices */
1097		px4->m_sio_device = machine.device("floppy");
1098		px4->m_rs232c_device = NULL;
	1097	state->m_sio_device = machine.device("floppy");
	1098	state->m_rs232c_device = NULL;
1099	1099
1100	1100	/* map os rom and last half of memory */
1101		memory_set_bankptr(machine, "bank1", machine.region("os")->base());
1102		memory_set_bankptr(machine, "bank2", px4->m_ram->pointer() + 0x8000);
	1101	state->membank("bank1")->set_base(machine.root_device().memregion("os")->base());
	1102	state->membank("bank2")->set_base(state->m_ram->pointer() + 0x8000);
1103	1103	}
1104	1104
1105	1105	static DRIVER_INIT( px4p )

src/mess/drivers/mmodular.c

r14976	r14977
995	995	// patch LCD delay loop on the 68030 machines until waitstates and/or opcode timings are fixed in MAME core
996	996	// patches gen32 gen32_41 gen32_oc lond030
997	997
998		UINT8 *rom = machine.region("maincpu")->base();
	998	UINT8 *rom = machine.root_device().memregion("maincpu")->base();
999	999
1000	1000	if(rom[0x870] == 0x0c && rom[0x871] == 0x78) {
1001	1001	if (!strcmp(machine.system().name,"gen32_oc")) {

src/mess/drivers/alesis.c

r14976	r14977
144	144	static DRIVER_INIT( hr16 )
145	145	{
146	146	int i;
147		UINT8 *ROM = machine.region("maincpu")->base();
148		UINT8 *orig = machine.region("user1")->base();
	147	UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
	148	UINT8 *orig = machine.root_device().memregion("user1")->base();
149	149	for (i = 0; i < 0x8000; i++)
150	150	{
151	151	ROM[BITSWAP16(i,15,14,13,12,11,10,9,8,0,1,2,3,4,5,6,7)] = orig[i];

src/mess/drivers/pc8801.c

r14976	r14977
324	324	{
325	325	int x,y,xi;
326	326	UINT32 count;
327		UINT8 *gvram = machine.region("gvram")->base();
	327	UINT8 *gvram = machine.root_device().memregion("gvram")->base();
328	328
329	329	count = 0;
330	330
r14976	r14977
356	356	pc8801_state *state = machine.driver_data<pc8801_state>();
357	357	int x,y,xi;
358	358	UINT32 count;
359		UINT8 *gvram = machine.region("gvram")->base();
	359	UINT8 *gvram = state->memregion("gvram")->base();
360	360
361	361	count = 0;
362	362
r14976	r14977
436	436	static UINT8 extract_text_attribute(running_machine &machine,UINT32 address,int x)
437	437	{
438	438	pc8801_state *state = machine.driver_data<pc8801_state>();
439		UINT8 *vram = machine.region("wram")->base();
	439	UINT8 *vram = state->memregion("wram")->base();
440	440	int i;
441	441	int fifo_size;
442	442
r14976	r14977
466	466	{
467	467	pc8801_state *state = machine.driver_data<pc8801_state>();
468	468	int xi,yi;
469		UINT8 *vram = machine.region("wram")->base();
	469	UINT8 *vram = state->memregion("wram")->base();
470	470	UINT8 is_cursor;
471	471	UINT8 y_height;
472	472
r14976	r14977
499	499	else
500	500	{
501	501	UINT8 char_data;
502		UINT8 *gfx_rom = machine.region("gfx1")->base();
	502	UINT8 *gfx_rom = machine.root_device().memregion("gfx1")->base();
503	503
504	504	if(yi >= 8 || secret)
505	505	char_data = 0;
r14976	r14977
692	692	READ8_MEMBER(pc8801_state::pc8801_alu_r)
693	693	{
694	694	int i;
695		UINT8 *gvram = machine().region("gvram")->base();
	695	UINT8 *gvram = memregion("gvram")->base();
696	696	UINT8 b,r,g;
697	697
698	698	/* store data to ALU regs */
r14976	r14977
712	712	WRITE8_MEMBER(pc8801_state::pc8801_alu_w)
713	713	{
714	714	int i;
715		UINT8 *gvram = machine().region("gvram")->base();
	715	UINT8 *gvram = memregion("gvram")->base();
716	716
717	717	switch(m_alu_ctrl2 & 0x30) // alu write mode
718	718	{
r14976	r14977
755	755
756	756	READ8_MEMBER(pc8801_state::pc8801_wram_r)
757	757	{
758		UINT8 *work_ram = machine().region("wram")->base();
	758	UINT8 *work_ram = memregion("wram")->base();
759	759
760	760	return work_ram[offset];
761	761	}
762	762
763	763	WRITE8_MEMBER(pc8801_state::pc8801_wram_w)
764	764	{
765		UINT8 *work_ram = machine().region("wram")->base();
	765	UINT8 *work_ram = memregion("wram")->base();
766	766
767	767	work_ram[offset] = data;
768	768	}
769	769
770	770	READ8_MEMBER(pc8801_state::pc8801_ext_wram_r)
771	771	{
772		UINT8 *ext_work_ram = machine().region("ewram")->base();
	772	UINT8 *ext_work_ram = memregion("ewram")->base();
773	773
774	774	/* TODO: check max range here */
775	775
r14976	r14977
778	778
779	779	WRITE8_MEMBER(pc8801_state::pc8801_ext_wram_w)
780	780	{
781		UINT8 *ext_work_ram = machine().region("ewram")->base();
	781	UINT8 *ext_work_ram = memregion("ewram")->base();
782	782
783	783	/* TODO: check max range here */
784	784
r14976	r14977
787	787
788	788	READ8_MEMBER(pc8801_state::pc8801_nbasic_rom_r)
789	789	{
790		UINT8 *n80_rom = machine().region("n80rom")->base();
	790	UINT8 *n80_rom = memregion("n80rom")->base();
791	791
792	792	return n80_rom[offset];
793	793	}
794	794
795	795	READ8_MEMBER(pc8801_state::pc8801_n88basic_rom_r)
796	796	{
797		UINT8 *n88_rom = machine().region("n88rom")->base();
	797	UINT8 *n88_rom = memregion("n88rom")->base();
798	798
799	799	return n88_rom[offset];
800	800	}
801	801
802	802	READ8_MEMBER(pc8801_state::pc8801_gvram_r)
803	803	{
804		UINT8 *gvram = machine().region("gvram")->base();
	804	UINT8 *gvram = memregion("gvram")->base();
805	805
806	806	return gvram[offset];
807	807	}
808	808
809	809	WRITE8_MEMBER(pc8801_state::pc8801_gvram_w)
810	810	{
811		UINT8 *gvram = machine().region("gvram")->base();
	811	UINT8 *gvram = memregion("gvram")->base();
812	812
813	813	gvram[offset] = data;
814	814	}
815	815
816	816	READ8_MEMBER(pc8801_state::pc8801_high_wram_r)
817	817	{
818		UINT8 *hi_work_ram = machine().region("hiwram")->base();
	818	UINT8 *hi_work_ram = memregion("hiwram")->base();
819	819
820	820	return hi_work_ram[offset];
821	821	}
822	822
823	823	WRITE8_MEMBER(pc8801_state::pc8801_high_wram_w)
824	824	{
825		UINT8 *hi_work_ram = machine().region("hiwram")->base();
	825	UINT8 *hi_work_ram = memregion("hiwram")->base();
826	826
827	827	hi_work_ram[offset] = data;
828	828	}
829	829
830	830	READ8_MEMBER(pc8801_state::pc8801ma_dic_r)
831	831	{
832		UINT8 *dic_rom = machine().region("dictionary")->base();
	832	UINT8 *dic_rom = memregion("dictionary")->base();
833	833
834	834	return dic_rom[offset];
835	835	}
836	836
837	837	READ8_MEMBER(pc8801_state::pc8801_cdbios_rom_r)
838	838	{
839		UINT8 *cdrom_bios = machine().region("cdrom")->base();
	839	UINT8 *cdrom_bios = memregion("cdrom")->base();
840	840
841	841	return cdrom_bios[offset];
842	842	}
r14976	r14977
1335	1335
1336	1336	READ8_MEMBER(pc8801_state::pc8801_kanji_r)
1337	1337	{
1338		UINT8 *knj_rom = machine().region("kanji")->base();
	1338	UINT8 *knj_rom = memregion("kanji")->base();
1339	1339	if((offset & 2) == 0)
1340	1340	return knj_rom[m_knj_addr[0]*2+((offset & 1) ^ 1)];
1341	1341
r14976	r14977
1350	1350
1351	1351	READ8_MEMBER(pc8801_state::pc8801_kanji_lv2_r)
1352	1352	{
1353		UINT8 *knj_rom = machine().region("kanji")->base() + 0x20000;
	1353	UINT8 *knj_rom = memregion("kanji")->base() + 0x20000;
1354	1354	if((offset & 2) == 0)
1355	1355	return knj_rom[m_knj_addr[1]*2+((offset & 1) ^ 1)];
1356	1356

src/mess/drivers/socrates.c

r14976	r14977
127	127	static void socrates_set_rom_bank( running_machine &machine )
128	128	{
129	129	socrates_state *state = machine.driver_data<socrates_state>();
130		memory_set_bankptr( machine, "bank1", machine.region("maincpu")->base() + ( state->m_rom_bank * 0x4000 ));
	130	state->membank( "bank1" )->set_base( state->memregion("maincpu")->base() + ( state->m_rom_bank * 0x4000 ));
131	131	}
132	132
133	133	static void socrates_set_ram_bank( running_machine &machine )
134	134	{
135	135	socrates_state *state = machine.driver_data<socrates_state>();
136		memory_set_bankptr( machine, "bank2", machine.region("vram")->base() + ( (state->m_ram_bank&0x3) * 0x4000 )); // window 0
137		memory_set_bankptr( machine, "bank3", machine.region("vram")->base() + ( ((state->m_ram_bank&0xC)>>2) * 0x4000 )); // window 1
	136	state->membank( "bank2" )->set_base( machine.root_device().memregion("vram")->base() + ( (state->m_ram_bank&0x3) * 0x4000 )); // window 0
	137	state->membank( "bank3" )->set_base( state->memregion("vram")->base() + ( ((state->m_ram_bank&0xC)>>2) * 0x4000 )); // window 1
138	138	}
139	139
140	140	static void socrates_update_kb( running_machine &machine )
r14976	r14977
220	220
221	221	static DRIVER_INIT( socrates )
222	222	{
223		UINT8 *gfx = machine.region("vram")->base();
	223	UINT8 *gfx = machine.root_device().memregion("vram")->base();
224	224	int i;
225	225	/* fill vram with its init powerup bit pattern, so startup has the checkerboard screen */
226	226	for (i = 0; i < 0x10000; i++)
r14976	r14977
275	275	// bit 2 - speech chip bit 2
276	276	// bit 1 - speech chip bit 1
277	277	// bit 0 - speech chip bit 0
278		UINT8 *speechromint = machine().region("speechint")->base();
279		UINT8 *speechromext = machine().region("speechext")->base();
	278	UINT8 *speechromint = memregion("speechint")->base();
	279	UINT8 *speechromext = memregion("speechext")->base();
280	280	int temp = 0;
281	281	temp |= (m_speech_running)?0x80:0;
282	282	temp |= 0x40; // unknown
r14976	r14977
588	588	static VIDEO_START( socrates )
589	589	{
590	590	socrates_state *state = machine.driver_data<socrates_state>();
591		state->m_videoram = machine.region("vram")->base();
	591	state->m_videoram = state->memregion("vram")->base();
592	592	state->m_scroll_offset = 0;
593	593	}
594	594

src/mess/drivers/univac.c

r14976	r14977
49	49
50	50	READ8_MEMBER( univac_state::uts20_vram_r )
51	51	{
52		UINT8 *RAM = machine().region("maincpu")->base();
	52	UINT8 *RAM = memregion("maincpu")->base();
53	53	return RAM[offset | ((m_screen_num) ? 0xe000 : 0xc000)];
54	54	}
55	55
56	56	WRITE8_MEMBER( univac_state::uts20_vram_w )
57	57	{
58		UINT8 *RAM = machine().region("maincpu")->base();
	58	UINT8 *RAM = memregion("maincpu")->base();
59	59	RAM[offset | ((m_screen_num) ? 0xe000 : 0xc000)] = data;
60	60	}
61	61
r14976	r14977
86	86
87	87	VIDEO_START_MEMBER(univac_state)
88	88	{
89		m_p_chargen = machine().region("chargen")->base();
	89	m_p_chargen = memregion("chargen")->base();
90	90	}
91	91
92	92	SCREEN_UPDATE16_MEMBER(univac_state)
93	93	{
94	94	UINT8 y,ra,chr,gfx;
95	95	UINT16 sy=0,ma=0,x;
96		UINT8 *videoram = machine().region("maincpu")->base()+((m_screen_num) ? 0xe000 : 0xc000);
	96	UINT8 *videoram = memregion("maincpu")->base()+((m_screen_num) ? 0xe000 : 0xc000);
97	97
98	98	m_framecnt++;
99	99

src/mess/drivers/pc4.c

r14976	r14977
44	44	WRITE8_MEMBER( pc4_state::bank_w )
45	45	{
46	46	//printf("set bank %x\n", data);
47		memory_set_bank(machine(), "rombank", data&0x07);
	47	membank("rombank")->set_entry(data&0x07);
48	48	}
49	49
50	50	WRITE8_MEMBER( pc4_state::beep_w )
r14976	r14977
179	179
180	180	void pc4_state::machine_start()
181	181	{
182		UINT8* rom_base = (UINT8 *)machine().region("maincpu")->base();
	182	UINT8* rom_base = (UINT8 *)machine().root_device().memregion("maincpu")->base();
183	183
184		memory_configure_bank(machine(), "rombank", 0, 8, rom_base, 0x4000);
185		memory_set_bank(machine(), "rombank", 0);
	184	membank("rombank")->configure_entries(0, 8, rom_base, 0x4000);
	185	membank("rombank")->set_entry(0);
186	186
187	187	m_busy_timer = timer_alloc(BUSY_TIMER);
188	188	m_blink_timer = timer_alloc(BLINKING_TIMER);

src/mess/drivers/timex.c

r14976	r14977
235	235	UINT8 timex_cart_chunks = timex_cart->chunks;
236	236	UINT8 *DOCK = timex_cart->data;
237	237
238		ExROM = machine.region("maincpu")->base() + 0x014000;
	238	ExROM = state->memregion("maincpu")->base() + 0x014000;
239	239
240	240	if (state->m_port_f4_data & 0x01)
241	241	{
r14976	r14977
243	243	{
244	244	space->install_read_bank(0x0000, 0x1fff, "bank1");
245	245	space->unmap_write(0x0000, 0x1fff);
246		memory_set_bankptr(machine, "bank1", ExROM);
	246	state->membank("bank1")->set_base(ExROM);
247	247	logerror("0000-1fff EXROM\n");
248	248	}
249	249	else
250	250	{
251	251	if (timex_cart_type == TIMEX_CART_DOCK)
252	252	{
253		memory_set_bankptr(machine, "bank1", DOCK);
	253	state->membank("bank1")->set_base(DOCK);
254	254	space->install_read_bank(0x0000, 0x1fff, "bank1");
255	255	if (timex_cart_chunks&0x01)
256	256	space->install_write_bank(0x0000, 0x1fff, "bank9");
r14976	r14977
269	269	}
270	270	else
271	271	{
272		ChosenROM = machine.region("maincpu")->base() + 0x010000;
273		memory_set_bankptr(machine, "bank1", ChosenROM);
	272	ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000;
	273	state->membank("bank1")->set_base(ChosenROM);
274	274	space->install_read_bank(0x0000, 0x1fff, "bank1");
275	275	space->unmap_write(0x0000, 0x1fff);
276	276	logerror("0000-1fff HOME\n");
r14976	r14977
280	280	{
281	281	if (state->m_port_ff_data & 0x80)
282	282	{
283		memory_set_bankptr(machine, "bank2", ExROM);
	283	state->membank("bank2")->set_base(ExROM);
284	284	space->install_read_bank(0x2000, 0x3fff, "bank2");
285	285	space->unmap_write(0x2000, 0x3fff);
286	286	logerror("2000-3fff EXROM\n");
r14976	r14977
289	289	{
290	290	if (timex_cart_type == TIMEX_CART_DOCK)
291	291	{
292		memory_set_bankptr(machine, "bank2", DOCK+0x2000);
	292	state->membank("bank2")->set_base(DOCK+0x2000);
293	293	space->install_read_bank(0x2000, 0x3fff, "bank2");
294	294	if (timex_cart_chunks&0x02)
295	295	space->install_write_bank(0x2000, 0x3fff, "bank10");
r14976	r14977
307	307	}
308	308	else
309	309	{
310		ChosenROM = machine.region("maincpu")->base() + 0x012000;
311		memory_set_bankptr(machine, "bank2", ChosenROM);
	310	ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x012000;
	311	state->membank("bank2")->set_base(ChosenROM);
312	312	space->install_read_bank(0x2000, 0x3fff, "bank2");
313	313	space->unmap_write(0x2000, 0x3fff);
314	314	logerror("2000-3fff HOME\n");
r14976	r14977
318	318	{
319	319	if (state->m_port_ff_data & 0x80)
320	320	{
321		memory_set_bankptr(machine, "bank3", ExROM);
	321	state->membank("bank3")->set_base(ExROM);
322	322	space->install_read_bank(0x4000, 0x5fff, "bank3");
323	323	space->unmap_write(0x4000, 0x5fff);
324	324	logerror("4000-5fff EXROM\n");
r14976	r14977
327	327	{
328	328	if (timex_cart_type == TIMEX_CART_DOCK)
329	329	{
330		memory_set_bankptr(machine, "bank3", DOCK+0x4000);
	330	state->membank("bank3")->set_base(DOCK+0x4000);
331	331	space->install_read_bank(0x4000, 0x5fff, "bank3");
332	332	if (timex_cart_chunks&0x04)
333	333	space->install_write_bank(0x4000, 0x5fff, "bank11");
r14976	r14977
344	344	}
345	345	else
346	346	{
347		memory_set_bankptr(machine, "bank3", messram);
348		memory_set_bankptr(machine, "bank11", messram);
	347	state->membank("bank3")->set_base(messram);
	348	state->membank("bank11")->set_base(messram);
349	349	space->install_read_bank(0x4000, 0x5fff, "bank3");
350	350	space->install_write_bank(0x4000, 0x5fff, "bank11");
351	351	logerror("4000-5fff RAM\n");
r14976	r14977
355	355	{
356	356	if (state->m_port_ff_data & 0x80)
357	357	{
358		memory_set_bankptr(machine, "bank4", ExROM);
	358	state->membank("bank4")->set_base(ExROM);
359	359	space->install_read_bank(0x6000, 0x7fff, "bank4");
360	360	space->unmap_write(0x6000, 0x7fff);
361	361	logerror("6000-7fff EXROM\n");
r14976	r14977
364	364	{
365	365	if (timex_cart_type == TIMEX_CART_DOCK)
366	366	{
367		memory_set_bankptr(machine, "bank4", DOCK+0x6000);
	367	state->membank("bank4")->set_base(DOCK+0x6000);
368	368	space->install_read_bank(0x6000, 0x7fff, "bank4");
369	369	if (timex_cart_chunks&0x08)
370	370	space->install_write_bank(0x6000, 0x7fff, "bank12");
r14976	r14977
381	381	}
382	382	else
383	383	{
384		memory_set_bankptr(machine, "bank4", messram + 0x2000);
385		memory_set_bankptr(machine, "bank12", messram + 0x2000);
	384	state->membank("bank4")->set_base(messram + 0x2000);
	385	state->membank("bank12")->set_base(messram + 0x2000);
386	386	space->install_read_bank(0x6000, 0x7fff, "bank4");
387	387	space->install_write_bank(0x6000, 0x7fff, "bank12");
388	388	logerror("6000-7fff RAM\n");
r14976	r14977
392	392	{
393	393	if (state->m_port_ff_data & 0x80)
394	394	{
395		memory_set_bankptr(machine, "bank5", ExROM);
	395	state->membank("bank5")->set_base(ExROM);
396	396	space->install_read_bank(0x8000, 0x9fff, "bank5");
397	397	space->unmap_write(0x8000, 0x9fff);
398	398	logerror("8000-9fff EXROM\n");
r14976	r14977
401	401	{
402	402	if (timex_cart_type == TIMEX_CART_DOCK)
403	403	{
404		memory_set_bankptr(machine, "bank5", DOCK+0x8000);
	404	state->membank("bank5")->set_base(DOCK+0x8000);
405	405	space->install_read_bank(0x8000, 0x9fff,"bank5");
406	406	if (timex_cart_chunks&0x10)
407	407	space->install_write_bank(0x8000, 0x9fff,"bank13");
r14976	r14977
418	418	}
419	419	else
420	420	{
421		memory_set_bankptr(machine, "bank5", messram + 0x4000);
422		memory_set_bankptr(machine, "bank13", messram + 0x4000);
	421	state->membank("bank5")->set_base(messram + 0x4000);
	422	state->membank("bank13")->set_base(messram + 0x4000);
423	423	space->install_read_bank(0x8000, 0x9fff,"bank5");
424	424	space->install_write_bank(0x8000, 0x9fff,"bank13");
425	425	logerror("8000-9fff RAM\n");
r14976	r14977
429	429	{
430	430	if (state->m_port_ff_data & 0x80)
431	431	{
432		memory_set_bankptr(machine, "bank6", ExROM);
	432	state->membank("bank6")->set_base(ExROM);
433	433	space->install_read_bank(0xa000, 0xbfff, "bank6");
434	434	space->unmap_write(0xa000, 0xbfff);
435	435	logerror("a000-bfff EXROM\n");
r14976	r14977
438	438	{
439	439	if (timex_cart_type == TIMEX_CART_DOCK)
440	440	{
441		memory_set_bankptr(machine, "bank6", DOCK+0xa000);
	441	state->membank("bank6")->set_base(DOCK+0xa000);
442	442	space->install_read_bank(0xa000, 0xbfff, "bank6");
443	443	if (timex_cart_chunks&0x20)
444	444	space->install_write_bank(0xa000, 0xbfff, "bank14");
r14976	r14977
456	456	}
457	457	else
458	458	{
459		memory_set_bankptr(machine, "bank6", messram + 0x6000);
460		memory_set_bankptr(machine, "bank14", messram + 0x6000);
	459	state->membank("bank6")->set_base(messram + 0x6000);
	460	state->membank("bank14")->set_base(messram + 0x6000);
461	461	space->install_read_bank(0xa000, 0xbfff, "bank6");
462	462	space->install_write_bank(0xa000, 0xbfff, "bank14");
463	463	logerror("a000-bfff RAM\n");
r14976	r14977
467	467	{
468	468	if (state->m_port_ff_data & 0x80)
469	469	{
470		memory_set_bankptr(machine, "bank7", ExROM);
	470	state->membank("bank7")->set_base(ExROM);
471	471	space->install_read_bank(0xc000, 0xdfff, "bank7");
472	472	space->unmap_write(0xc000, 0xdfff);
473	473	logerror("c000-dfff EXROM\n");
r14976	r14977
476	476	{
477	477	if (timex_cart_type == TIMEX_CART_DOCK)
478	478	{
479		memory_set_bankptr(machine, "bank7", DOCK+0xc000);
	479	state->membank("bank7")->set_base(DOCK+0xc000);
480	480	space->install_read_bank(0xc000, 0xdfff, "bank7");
481	481	if (timex_cart_chunks&0x40)
482	482	space->install_write_bank(0xc000, 0xdfff, "bank15");
r14976	r14977
493	493	}
494	494	else
495	495	{
496		memory_set_bankptr(machine, "bank7", messram + 0x8000);
497		memory_set_bankptr(machine, "bank15", messram + 0x8000);
	496	state->membank("bank7")->set_base(messram + 0x8000);
	497	state->membank("bank15")->set_base(messram + 0x8000);
498	498	space->install_read_bank(0xc000, 0xdfff, "bank7");
499	499	space->install_write_bank(0xc000, 0xdfff, "bank15");
500	500	logerror("c000-dfff RAM\n");
r14976	r14977
504	504	{
505	505	if (state->m_port_ff_data & 0x80)
506	506	{
507		memory_set_bankptr(machine, "bank8", ExROM);
	507	state->membank("bank8")->set_base(ExROM);
508	508	space->install_read_bank(0xe000, 0xffff, "bank8");
509	509	space->unmap_write(0xe000, 0xffff);
510	510	logerror("e000-ffff EXROM\n");
r14976	r14977
513	513	{
514	514	if (timex_cart_type == TIMEX_CART_DOCK)
515	515	{
516		memory_set_bankptr(machine, "bank8", DOCK+0xe000);
	516	state->membank("bank8")->set_base(DOCK+0xe000);
517	517	space->install_read_bank(0xe000, 0xffff, "bank8");
518	518	if (timex_cart_chunks&0x80)
519	519	space->install_write_bank(0xe000, 0xffff, "bank16");
r14976	r14977
530	530	}
531	531	else
532	532	{
533		memory_set_bankptr(machine, "bank8", messram + 0xa000);
534		memory_set_bankptr(machine, "bank16", messram + 0xa000);
	533	state->membank("bank8")->set_base(messram + 0xa000);
	534	state->membank("bank16")->set_base(messram + 0xa000);
535	535	space->install_read_bank(0xe000, 0xffff, "bank8");
536	536	space->install_write_bank(0xe000, 0xffff, "bank16");
537	537	logerror("e000-ffff RAM\n");
r14976	r14977
603	603	spectrum_state *state = machine.driver_data<spectrum_state>();
604	604	UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
605	605
606		memory_set_bankptr(machine, "bank1", messram);
607		memory_set_bankptr(machine, "bank2", messram);
	606	state->membank("bank1")->set_base(messram);
	607	state->membank("bank2")->set_base(messram);
608	608	state->m_port_ff_data = 0;
609	609	state->m_port_f4_data = -1;
610	610	MACHINE_RESET_CALL(spectrum);

src/mess/drivers/bw2.c

r14976	r14977
115	115	break;
116	116	}
117	117
118		memory_set_bank(machine(), "bank1", m_bank);
	118	membank("bank1")->set_entry(m_bank);
119	119	}
120	120
121	121	void bw2_state::ramcard_bankswitch(UINT8 data)
r14976	r14977
195	195	break;
196	196	}
197	197
198		memory_set_bank(machine(), "bank1", m_bank);
	198	membank("bank1")->set_entry(m_bank);
199	199	}
200	200
201	201	WRITE8_MEMBER( bw2_state::ramcard_bank_w )
r14976	r14977
214	214	program->install_readwrite_bank(0x0000, 0x7fff, "bank1");
215	215	}
216	216
217		memory_configure_bank(machine(), "bank1", BANK_RAMCARD_RAM, 1, m_ramcard_ram + bank_offset, 0);
218		memory_set_bank(machine(), "bank1", m_bank);
	217	membank("bank1")->configure_entry(BANK_RAMCARD_RAM, m_ramcard_ram + bank_offset);
	218	membank("bank1")->set_entry(m_bank);
219	219	}
220	220
221	221	/* Floppy */
r14976	r14977
622	622	m_ramcard_ram = auto_alloc_array(machine(), UINT8, BW2_RAMCARD_SIZE);
623	623
624	624	/* memory banking */
625		memory_configure_bank(machine(), "bank1", BANK_RAM1, 1, m_ram->pointer(), 0);
626		memory_configure_bank(machine(), "bank1", BANK_VRAM, 1, m_video_ram, 0);
627		memory_configure_bank(machine(), "bank1", BANK_ROM, 1, machine().region("ic1")->base(), 0);
	625	membank("bank1")->configure_entry(BANK_RAM1, m_ram->pointer());
	626	membank("bank1")->configure_entry(BANK_VRAM, m_video_ram);
	627	membank("bank1")->configure_entry(BANK_ROM, memregion("ic1")->base());
628	628
629	629	/* register for state saving */
630	630	save_item(NAME(m_kb_row));
r14976	r14977
644	644	{
645	645	// RAMCARD installed
646	646
647		memory_configure_bank(machine(), "bank1", BANK_RAMCARD_ROM, 1, machine().region("ramcard")->base(), 0);
648		memory_configure_bank(machine(), "bank1", BANK_RAM3, 2, m_ram->pointer() + 0x8000, 0x8000);
649		memory_configure_bank(machine(), "bank1", BANK_RAMCARD_RAM, 1, m_ramcard_ram, 0);
650		memory_configure_bank(machine(), "bank1", BANK_RAM6, 1, m_ram->pointer() + 0x18000, 0);
	647	membank("bank1")->configure_entry(BANK_RAMCARD_ROM, memregion("ramcard")->base());
	648	membank("bank1")->configure_entries(BANK_RAM3, 2, m_ram->pointer() + 0x8000, 0x8000);
	649	membank("bank1")->configure_entry(BANK_RAMCARD_RAM, m_ramcard_ram);
	650	membank("bank1")->configure_entry(BANK_RAM6, m_ram->pointer() + 0x18000);
651	651
652	652	io->install_write_handler(0x30, 0x30, 0, 0x0f, write8_delegate(FUNC(bw2_state::ramcard_bank_w), this), 0);
653	653	}
r14976	r14977
655	655	{
656	656	// no RAMCARD
657	657
658		memory_configure_bank(machine(), "bank1", BANK_RAM2, 5, m_ram->pointer() + 0x8000, 0x8000);
	658	membank("bank1")->configure_entries(BANK_RAM2, 5, m_ram->pointer() + 0x8000, 0x8000);
659	659
660	660	io->unmap_write(0x30, 0x30, 0, 0x0f);
661	661	}
662	662
663		memory_set_bank(machine(), "bank1", BANK_ROM);
	663	membank("bank1")->set_entry(BANK_ROM);
664	664	}
665	665
666	666	static MACHINE_CONFIG_START( bw2, bw2_state )

src/mess/drivers/jr200.c

r14976	r14977
154	154	}
155	155	else // tile mode
156	156	{
157		gfx_data = screen.machine().region(attr & 0x40 ? "pcg" : "gfx_ram")->base();
	157	gfx_data = screen.machine().root_device().memregion(attr & 0x40 ? "pcg" : "gfx_ram")->base();
158	158
159	159	pen = (gfx_data[(tile*8)+yi]>>(7-xi) & 1) ? (attr & 0x7) : ((attr & 0x38) >> 3);
160	160	}
r14976	r14977
170	170
171	171	READ8_MEMBER(jr200_state::jr200_pcg_1_r)
172	172	{
173		UINT8 *pcg = machine().region("pcg")->base();
	173	UINT8 *pcg = memregion("pcg")->base();
174	174
175	175	return pcg[offset+0x000];
176	176	}
177	177
178	178	READ8_MEMBER(jr200_state::jr200_pcg_2_r)
179	179	{
180		UINT8 *pcg = machine().region("pcg")->base();
	180	UINT8 *pcg = memregion("pcg")->base();
181	181
182	182	return pcg[offset+0x400];
183	183	}
184	184
185	185	WRITE8_MEMBER(jr200_state::jr200_pcg_1_w)
186	186	{
187		UINT8 *pcg = machine().region("pcg")->base();
	187	UINT8 *pcg = memregion("pcg")->base();
188	188
189	189	pcg[offset+0x000] = data;
190	190	gfx_element_mark_dirty(machine().gfx[1], (offset+0x000) >> 3);
r14976	r14977
192	192
193	193	WRITE8_MEMBER(jr200_state::jr200_pcg_2_w)
194	194	{
195		UINT8 *pcg = machine().region("pcg")->base();
	195	UINT8 *pcg = memregion("pcg")->base();
196	196
197	197	pcg[offset+0x400] = data;
198	198	gfx_element_mark_dirty(machine().gfx[1], (offset+0x400) >> 3);
r14976	r14977
200	200
201	201	READ8_MEMBER(jr200_state::jr200_bios_char_r)
202	202	{
203		UINT8 *gfx = machine().region("gfx_ram")->base();
	203	UINT8 *gfx = memregion("gfx_ram")->base();
204	204
205	205	return gfx[offset];
206	206	}
r14976	r14977
208	208
209	209	WRITE8_MEMBER(jr200_state::jr200_bios_char_w)
210	210	{
211		//  UINT8 *gfx = machine().region("gfx_ram")->base();
	211	//  UINT8 *gfx = memregion("gfx_ram")->base();
212	212
213	213	/* TODO: writing is presumably controlled by an I/O bit */
214	214	//  gfx[offset] = data;
r14976	r14977
487	487	static MACHINE_RESET(jr200)
488	488	{
489	489	jr200_state *state = machine.driver_data<jr200_state>();
490		UINT8 *gfx_rom = machine.region("gfx_rom")->base();
491		UINT8 *gfx_ram = machine.region("gfx_ram")->base();
	490	UINT8 *gfx_rom = machine.root_device().memregion("gfx_rom")->base();
	491	UINT8 *gfx_ram = state->memregion("gfx_ram")->base();
492	492	int i;
493	493	memset(state->m_mn1271_ram,0,0x800);
494	494

src/mess/drivers/enterp.c

r14976	r14977
33	33
34	34	static void enterprise_update_memory_page(address_space *space, offs_t page, int index)
35	35	{
	36	ep_state *state = space->machine().driver_data<ep_state>();
36	37	int start = (page - 1) * 0x4000;
37	38	int end = (page - 1) * 0x4000 + 0x3fff;
38	39	char page_num[10];
r14976	r14977
46	47	case 0x03:
47	48	space->install_read_bank(start, end, page_num);
48	49	space->nop_write(start, end);
49		memory_set_bankptr(space->machine(), page_num, space->machine().region("exos")->base() + (index * 0x4000));
	50	state->membank(page_num)->set_base(space->machine().root_device().memregion("exos")->base() + (index * 0x4000));
50	51	break;
51	52
52	53	case 0x04:
r14976	r14977
55	56	case 0x07:
56	57	space->install_read_bank(start, end, page_num);
57	58	space->nop_write(start, end);
58		memory_set_bankptr(space->machine(), page_num, space->machine().region("cartridges")->base() + ((index - 0x04) * 0x4000));
	59	state->membank(page_num)->set_base(space->machine().root_device().memregion("cartridges")->base() + ((index - 0x04) * 0x4000));
59	60	break;
60	61
61	62	case 0x20:
62	63	case 0x21:
63	64	space->install_read_bank(start, end, page_num);
64	65	space->nop_write(start, end);
65		memory_set_bankptr(space->machine(), page_num, space->machine().region("exdos")->base() + ((index - 0x20) * 0x4000));
	66	state->membank(page_num)->set_base(space->machine().root_device().memregion("exdos")->base() + ((index - 0x20) * 0x4000));
66	67	break;
67	68
68	69	case 0xf8:
r14976	r14977
73	74	if (space->machine().device<ram_device>(RAM_TAG)->size() == 128*1024)
74	75	{
75	76	space->install_readwrite_bank(start, end, page_num);
76		memory_set_bankptr(space->machine(), page_num, space->machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xf4) * 0x4000);
	77	state->membank(page_num)->set_base(space->machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xf4) * 0x4000);
77	78	}
78	79	else
79	80	{
r14976	r14977
87	88	case 0xff:
88	89	/* basic 64k ram */
89	90	space->install_readwrite_bank(start, end, page_num);
90		memory_set_bankptr(space->machine(), page_num, space->machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xfc) * 0x4000);
	91	state->membank(page_num)->set_base(space->machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xfc) * 0x4000);
91	92	break;
92	93
93	94	default:

src/mess/drivers/portfoli.c

r14976	r14977
443	443	if (BIT(data, 0))
444	444	{
445	445	// system ROM
446		UINT8 *rom = machine().region(M80C88A_TAG)->base();
	446	UINT8 *rom = memregion(M80C88A_TAG)->base();
447	447	program->install_rom(0xc0000, 0xdffff, rom);
448	448	}
449	449	else
r14976	r14977
658	658	static READ8_DEVICE_HANDLER( hd61830_rd_r )
659	659	{
660	660	UINT16 address = ((offset & 0xff) << 3) | ((offset >> 12) & 0x07);
661		UINT8 data = device->machine().region(HD61830_TAG)->base()[address];
	661	UINT8 data = device->machine().root_device().memregion(HD61830_TAG)->base()[address];
662	662
663	663	return data;
664	664	}

src/mess/drivers/mc10.c

r14976	r14977
247	247
248	248	static DRIVER_INIT( mc10 )
249	249	{
250		mc10_state *mc10 = machine.driver_data<mc10_state>();
	250	mc10_state *state = machine.driver_data<mc10_state>();
251	251	address_space *prg = machine.device("maincpu")->memory().space(AS_PROGRAM);
252	252
253	253	/* initialize keyboard strobe */
254		mc10->m_keyboard_strobe = 0x00;
	254	state->m_keyboard_strobe = 0x00;
255	255
256	256	/* initialize memory */
257		mc10->m_ram_base = mc10->m_ram->pointer();
258		mc10->m_ram_size = mc10->m_ram->size();
259		mc10->m_pr_state = PRINTER_WAIT;
	257	state->m_ram_base = state->m_ram->pointer();
	258	state->m_ram_size = state->m_ram->size();
	259	state->m_pr_state = PRINTER_WAIT;
260	260
261		memory_set_bankptr(machine, "bank1", mc10->m_ram_base);
	261	state->membank("bank1")->set_base(state->m_ram_base);
262	262
263	263	/* initialize memory expansion */
264		if (mc10->m_ram_size == 20*1024)
265		memory_set_bankptr(machine, "bank2", mc10->m_ram_base + 0x1000);
266		else if (mc10->m_ram_size == 24*1024)
267		memory_set_bankptr(machine, "bank2", mc10->m_ram_base + 0x2000);
268		else  if (mc10->m_ram_size != 32*1024)      //ensure that is not alice90
	264	if (state->m_ram_size == 20*1024)
	265	state->membank("bank2")->set_base(state->m_ram_base + 0x1000);
	266	else if (state->m_ram_size == 24*1024)
	267	state->membank("bank2")->set_base(state->m_ram_base + 0x2000);
	268	else  if (state->m_ram_size != 32*1024)      //ensure that is not alice90
269	269	prg->nop_readwrite(0x5000, 0x8fff);
270	270
271	271	/* register for state saving */
272		state_save_register_global(machine, mc10->m_keyboard_strobe);
	272	state_save_register_global(machine, state->m_keyboard_strobe);
273	273
274	274	//for alice32 force port4 DDR to 0xff at startup
275	275	if (!strcmp(machine.system().name, "alice32") || !strcmp(machine.system().name, "alice90"))

src/mess/drivers/atom.c

r14976	r14977
125	125	{
126	126	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
127	127
128		UINT8 *eprom = machine().region(EXTROM_TAG)->base() + (m_eprom << 12);
	128	UINT8 *eprom = memregion(EXTROM_TAG)->base() + (m_eprom << 12);
129	129
130	130	program->install_rom(0xa000, 0xafff, eprom);
131	131	}
r14976	r14977
750	750
751	751	/* With the following, we mirror the cart in the whole memory region */
752	752	for (i = 0; i < mirror; i++)
753		memcpy(image.device().machine().region(this_cart->region)->base() + this_cart->offset + i * size, temp_copy, size);
	753	memcpy(image.device().machine().root_device().memregion(this_cart->region)->base() + this_cart->offset + i * size, temp_copy, size);
754	754
755	755	auto_free(image.device().machine(), temp_copy);
756	756

src/mess/drivers/dim68k.c

r14976	r14977
202	202
203	203	MACHINE_RESET_MEMBER(dim68k_state)
204	204	{
205		UINT8* ROM = machine().region("bootrom")->base();
	205	UINT8* ROM = memregion("bootrom")->base();
206	206
207	207	memcpy((UINT8*)m_ram.target(), ROM, 0x2000);
208	208
r14976	r14977
211	211
212	212	VIDEO_START_MEMBER( dim68k_state )
213	213	{
214		m_p_chargen = machine().region("chargen")->base();
	214	m_p_chargen = memregion("chargen")->base();
215	215	}
216	216
217	217	// Text-only; graphics isn't emulated yet. Need to find out if hardware cursor is used.

src/mess/drivers/coleco.c

r14976	r14977
269	269
270	270	m_maincpu->set_input_line_vector(INPUT_LINE_IRQ0, 0xff);
271	271
272		memset(&machine().region(Z80_TAG)->base()[0x6000], 0xff, 0x400);   // initialize RAM
	272	memset(&machine().root_device().memregion(Z80_TAG)->base()[0x6000], 0xff, 0x400);   // initialize RAM
273	273	}
274	274
275	275	//static int coleco_cart_verify(const UINT8 *cartdata, size_t size)
r14976	r14977
287	287
288	288	static DEVICE_IMAGE_LOAD( czz50_cart )
289	289	{
290		UINT8 *ptr = image.device().machine().region(Z80_TAG)->base() + 0x8000;
	290	UINT8 *ptr = image.device().machine().root_device().memregion(Z80_TAG)->base() + 0x8000;
291	291	UINT32 size;
292	292
293	293	if (image.software_entry() == NULL)

src/mess/drivers/lc80.c

r14976	r14977
300	300	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
301	301
302	302	/* setup memory banking */
303		memory_configure_bank(machine(), "bank1", 0, 1, machine().region(Z80_TAG)->base(), 0); // TODO
304		memory_configure_bank(machine(), "bank1", 1, 1, machine().region(Z80_TAG)->base(), 0);
305		memory_set_bank(machine(), "bank1", 1);
	303	membank("bank1")->configure_entry(0, memregion(Z80_TAG)->base()); // TODO
	304	membank("bank1")->configure_entry(1, memregion(Z80_TAG)->base());
	305	membank("bank1")->set_entry(1);
306	306
307		memory_configure_bank(machine(), "bank2", 0, 1, machine().region(Z80_TAG)->base() + 0x800, 0); // TODO
308		memory_configure_bank(machine(), "bank2", 1, 1, machine().region(Z80_TAG)->base() + 0x800, 0);
309		memory_set_bank(machine(), "bank2", 1);
	307	membank("bank2")->configure_entry(0, memregion(Z80_TAG)->base() + 0x800); // TODO
	308	membank("bank2")->configure_entry(1, memregion(Z80_TAG)->base() + 0x800);
	309	membank("bank2")->set_entry(1);
310	310
311		memory_configure_bank(machine(), "bank3", 0, 1, machine().region(Z80_TAG)->base() + 0x1000, 0); // TODO
312		memory_configure_bank(machine(), "bank3", 1, 1, machine().region(Z80_TAG)->base() + 0x1000, 0);
313		memory_set_bank(machine(), "bank3", 1);
	311	membank("bank3")->configure_entry(0, memregion(Z80_TAG)->base() + 0x1000); // TODO
	312	membank("bank3")->configure_entry(1, memregion(Z80_TAG)->base() + 0x1000);
	313	membank("bank3")->set_entry(1);
314	314
315		memory_configure_bank(machine(), "bank4", 0, 1, machine().region(Z80_TAG)->base() + 0x2000, 0);
316		memory_set_bank(machine(), "bank4", 0);
	315	membank("bank4")->configure_entry(0, memregion(Z80_TAG)->base() + 0x2000);
	316	membank("bank4")->set_entry(0);
317	317
318	318	program->install_readwrite_bank(0x0000, 0x07ff, "bank1");
319	319	program->install_readwrite_bank(0x0800, 0x0fff, "bank2");

src/mess/drivers/rx78.c

r14976	r14977
114	114
115	115	SCREEN_UPDATE16_MEMBER( rx78_state )
116	116	{
117		UINT8 *vram = machine().region("vram")->base();
	117	UINT8 *vram = memregion("vram")->base();
118	118	int x,y,count;
119	119
120	120	bitmap.fill(16, cliprect);
r14976	r14977
192	192
193	193	READ8_MEMBER( rx78_state::rx78_vram_r )
194	194	{
195		UINT8 *vram = machine().region("vram")->base();
	195	UINT8 *vram = memregion("vram")->base();
196	196
197	197	if(m_vram_read_bank == 0 || m_vram_read_bank > 6)
198	198	return 0xff;
r14976	r14977
202	202
203	203	WRITE8_MEMBER( rx78_state::rx78_vram_w )
204	204	{
205		UINT8 *vram = machine().region("vram")->base();
	205	UINT8 *vram = memregion("vram")->base();
206	206
207	207	if(m_vram_write_bank & 0x01) { vram[offset + 0 * 0x2000] = data; }
208	208	if(m_vram_write_bank & 0x02) { vram[offset + 1 * 0x2000] = data; }
r14976	r14977
416	416
417	417	static DEVICE_IMAGE_LOAD( rx78_cart )
418	418	{
419		UINT8 *cart = image.device().machine().region("cart_img")->base();
	419	UINT8 *cart = image.device().machine().root_device().memregion("cart_img")->base();
420	420	UINT32 size;
421	421
422	422	if (image.software_entry() == NULL)

src/mess/drivers/supracan.c

r14976	r14977
400	400	supracan_state *state = machine.driver_data<supracan_state>();
401	401	state->m_sprite_final_bitmap.allocate(1024, 1024, BITMAP_FORMAT_IND16);
402	402
403		state->m_vram = (UINT16*)(*machine.region("ram_gfx"));
404		state->m_vram_swapped = (UINT16*)(*machine.region("ram_gfx2"));
405		state->m_vram_addr_swapped = (UINT8*)(*machine.region("ram_gfx3")); // hack for 1bpp layer at startup
	403	state->m_vram = (UINT16*)(*machine.root_device().memregion("ram_gfx"));
	404	state->m_vram_swapped = (UINT16*)(*machine.root_device().memregion("ram_gfx2"));
	405	state->m_vram_addr_swapped = (UINT8*)(*state->memregion("ram_gfx3")); // hack for 1bpp layer at startup
406	406
407	407	state->m_tilemap_sizes[0][0] = tilemap_create(machine, get_supracan_tilemap0_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
408	408	state->m_tilemap_sizes[0][1] = tilemap_create(machine, get_supracan_tilemap0_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
r14976	r14977
1735	1735
1736	1736	static DEVICE_IMAGE_LOAD( supracan_cart )
1737	1737	{
1738		UINT8 *cart = image.device().machine().region("cart")->base();
	1738	UINT8 *cart = image.device().machine().root_device().memregion("cart")->base();
1739	1739	UINT32 size = 0;
1740	1740
1741	1741	if (image.software_entry() == NULL)

src/mess/drivers/channelf.c

r14976	r14977
230	230	return IMAGE_INIT_FAIL;
231	231	}
232	232
233		if (image.fread( image.device().machine().region("maincpu")->base() + 0x0800, size) != size)
	233	if (image.fread( image.device().machine().root_device().memregion("maincpu")->base() + 0x0800, size) != size)
234	234	{
235	235	image.seterror(IMAGE_ERROR_UNSPECIFIED, "Unable to fully read from file");
236	236	return IMAGE_INIT_FAIL;
r14976	r14977
240	240	else
241	241	{
242	242	size = image.get_software_region_length("rom");
243		memcpy(image.device().machine().region("maincpu")->base() + 0x0800, image.get_software_region("rom"), size);
	243	memcpy(image.device().machine().root_device().memregion("maincpu")->base() + 0x0800, image.get_software_region("rom"), size);
244	244	}
245	245
246	246	return IMAGE_INIT_PASS;

src/mess/drivers/hec2hrp.c

r14976	r14977
308	308	/*****************************************************************************/
309	309	{
310	310	hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
311		UINT8 *RAM   = machine.region("maincpu"  )->base();   // pointer to mess ram
	311	UINT8 *RAM   = machine.root_device().memregion("maincpu"  )->base();   // pointer to mess ram
312	312	//Patch rom possible !
313	313	//RAMD2[0xff6b] = 0x0ff; // force verbose mode hector !
314	314
315	315	// Memory install for bank switching
316		memory_configure_bank(machine, "bank1", HECTOR_BANK_PROG , 1, &RAM[0xc000]   , 0); // Mess ram
317		memory_configure_bank(machine, "bank1", HECTOR_BANK_VIDEO, 1, state->m_hector_videoram_hrx, 0); // Video ram
	316	state->membank("bank1")->configure_entry(HECTOR_BANK_PROG , &RAM[0xc000]   ); // Mess ram
	317	state->membank("bank1")->configure_entry(HECTOR_BANK_VIDEO, state->m_hector_videoram_hrx); // Video ram
318	318
319	319	// Set bank HECTOR_BANK_PROG as basic bank
320		memory_set_bank(machine, "bank1", HECTOR_BANK_PROG);
	320	state->membank("bank1")->set_entry(HECTOR_BANK_PROG);
321	321
322	322	/******************************************************SPECIFIQUE MX ***************************/
323		memory_configure_bank(machine, "bank2", HECTORMX_BANK_PAGE0 , 1, &RAM[0x0000]                    , 0); // Mess ram
324		memory_configure_bank(machine, "bank2", HECTORMX_BANK_PAGE1 , 1, machine.region("page1")->base() , 0); // Rom page 1
325		memory_configure_bank(machine, "bank2", HECTORMX_BANK_PAGE2 , 1, machine.region("page2")->base() , 0); // Rom page 2
326		memory_set_bank(machine, "bank2", HECTORMX_BANK_PAGE0);
	323	state->membank("bank2")->configure_entry(HECTORMX_BANK_PAGE0 , &RAM[0x0000]                    ); // Mess ram
	324	state->membank("bank2")->configure_entry(HECTORMX_BANK_PAGE1 , machine.root_device().memregion("page1")->base() ); // Rom page 1
	325	state->membank("bank2")->configure_entry(HECTORMX_BANK_PAGE2 , machine.root_device().memregion("page2")->base() ); // Rom page 2
	326	state->membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
327	327	/******************************************************SPECIFIQUE MX ***************************/
328	328
329	329	/*************************************************SPECIFIQUE DISK II ***************************/
330		memory_configure_bank(machine, "bank3", DISCII_BANK_ROM , 1, machine.region("rom_disc2")->base() , 0); // ROM
331		memory_configure_bank(machine, "bank3", DISCII_BANK_RAM , 1, machine.region("disc2mem" )->base() , 0); // RAM
332		memory_set_bank(machine, "bank3", DISCII_BANK_ROM);
	330	state->membank("bank3")->configure_entry(DISCII_BANK_ROM , machine.root_device().memregion("rom_disc2")->base() ); // ROM
	331	state->membank("bank3")->configure_entry(DISCII_BANK_RAM , state->memregion("disc2mem" )->base() ); // RAM
	332	state->membank("bank3")->set_entry(DISCII_BANK_ROM);
333	333	/*************************************************SPECIFIQUE DISK II ***************************/
334	334
335	335	// As video HR ram is in bank, use extern memory
r14976	r14977
344	344	//minidisc
345	345	{
346	346	hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
347		UINT8 *RAM   = machine.region("maincpu"  )->base();   // pointer to mess ram
	347	UINT8 *RAM   = machine.root_device().memregion("maincpu"  )->base();   // pointer to mess ram
348	348
349	349	// Memory install for bank switching
350		memory_configure_bank(machine, "bank1", HECTOR_BANK_PROG , 1, &RAM[0xc000]   , 0); // Mess ram
351		memory_configure_bank(machine, "bank1", HECTOR_BANK_VIDEO, 1, state->m_hector_videoram_hrx, 0); // Video ram
	350	state->membank("bank1")->configure_entry(HECTOR_BANK_PROG , &RAM[0xc000]   ); // Mess ram
	351	state->membank("bank1")->configure_entry(HECTOR_BANK_VIDEO, state->m_hector_videoram_hrx); // Video ram
352	352
353	353	// Set bank HECTOR_BANK_PROG as basic bank
354		memory_set_bank(machine, "bank1", HECTOR_BANK_PROG);
	354	state->membank("bank1")->set_entry(HECTOR_BANK_PROG);
355	355	//Here the bank 5 is not used for the language switch but for the floppy ROM.....
356	356	/******************************************************SPECIFIQUE Mini disque ***************************/
357		memory_configure_bank(machine, "bank2", HECTOR_BANK_BASE , 1, &RAM[0x0000]                    , 0); // Rom base page
358		memory_configure_bank(machine, "bank2", HECTOR_BANK_DISC , 1, machine.region("page2")->base() , 0); // Rom page mini disc
359		memory_set_bank(machine, "bank2", HECTOR_BANK_BASE);
	357	state->membank("bank2")->configure_entry(HECTOR_BANK_BASE , &RAM[0x0000]                    ); // Rom base page
	358	state->membank("bank2")->configure_entry(HECTOR_BANK_DISC , state->memregion("page2")->base() ); // Rom page mini disc
	359	state->membank("bank2")->set_entry(HECTOR_BANK_BASE);
360	360	/******************************************************SPECIFIQUE Mini disque ***************************/
361	361
362	362	// As video HR ram is in bank, use extern memory
r14976	r14977
367	367	}
368	368	static MACHINE_RESET(hec2hrx)
369	369	{
	370	hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
370	371	//Hector Memory
371		memory_set_bank(machine, "bank1", HECTOR_BANK_PROG);
372		memory_set_bank(machine, "bank2", HECTORMX_BANK_PAGE0);
	372	state->membank("bank1")->set_entry(HECTOR_BANK_PROG);
	373	state->membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
373	374	//DISK II Memory
374		memory_set_bank(machine, "bank3", DISCII_BANK_ROM);
	375	state->membank("bank3")->set_entry(DISCII_BANK_ROM);
375	376
376	377	// Machines init
377	378	hector_reset(machine, 1, 1);
r14976	r14977
380	381	//minidisc
381	382	static MACHINE_RESET(hec2mdhrx)
382	383	{
	384	hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
383	385	//Hector Memory
384		memory_set_bank(machine, "bank1", HECTOR_BANK_PROG);
385		memory_set_bank(machine, "bank2", HECTORMX_BANK_PAGE0);
	386	state->membank("bank1")->set_entry(HECTOR_BANK_PROG);
	387	state->membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
386	388
387	389	// Machines init
388	390	hector_reset(machine, 1, 0);

src/mess/drivers/unior.c

r14976	r14977
244	244	static VIDEO_START( unior )
245	245	{
246	246	unior_state *state = machine.driver_data<unior_state>();
247		state->m_p_chargen = machine.region("chargen")->base();
248		state->m_p_vram = machine.region("vram")->base();
	247	state->m_p_chargen = machine.root_device().memregion("chargen")->base();
	248	state->m_p_vram = state->memregion("vram")->base();
249	249	}
250	250
251	251	static SCREEN_UPDATE_IND16( unior )

src/mess/drivers/ec65.c

r14976	r14977
155	155	static VIDEO_START( ec65 )
156	156	{
157	157	ec65_state *state = machine.driver_data<ec65_state>();
158		state->m_p_chargen = machine.region("chargen")->base();
	158	state->m_p_chargen = state->memregion("chargen")->base();
159	159	}
160	160
161	161	static MC6845_UPDATE_ROW( ec65_update_row )

src/mess/drivers/cd2650.c

r14976	r14977
90	90
91	91	VIDEO_START_MEMBER(cd2650_state)
92	92	{
93		m_p_chargen = machine().region("chargen")->base();
	93	m_p_chargen = memregion("chargen")->base();
94	94	}
95	95
96	96	SCREEN_UPDATE16_MEMBER(cd2650_state)

src/mess/drivers/tek405x.c

r14976	r14977
125	125	switch (lbs)
126	126	{
127	127	case LBS_RBC:
128		program->install_rom(0x8800, 0xa7ff, machine().region(MC6800_TAG)->base() + 0x800);
	128	program->install_rom(0x8800, 0xa7ff, memregion(MC6800_TAG)->base() + 0x800);
129	129	break;
130	130
131	131	case LBS_BSOFL:
132		program->install_rom(0x8800, 0xa7ff, machine().region("020_0147_00")->base());
	132	program->install_rom(0x8800, 0xa7ff, memregion("020_0147_00")->base());
133	133	break;
134	134
135	135	case LBS_BSCOM:
136		program->install_rom(0x8800, 0xa7ff, machine().region("672_0799_08")->base());
	136	program->install_rom(0x8800, 0xa7ff, memregion("672_0799_08")->base());
137	137	break;
138	138
139	139	default:

src/mess/drivers/pegasus.c

r14976	r14977
320	320
321	321	VIDEO_START_MEMBER( pegasus_state )
322	322	{
323		m_p_chargen = machine().region("chargen")->base();
	323	m_p_chargen = memregion("chargen")->base();
324	324	}
325	325
326	326	static const UINT8 mcm6571a_shift[] =
r14976	r14977
420	420	multipart roms will have. */
421	421	static void pegasus_decrypt_rom( running_machine &machine, UINT16 addr )
422	422	{
423		UINT8 b, *ROM = machine.region("maincpu")->base();
	423	UINT8 b, *ROM = machine.root_device().memregion("maincpu")->base();
424	424	UINT16 i, j;
425	425	UINT8 buff[0x1000];
426	426	if (ROM[addr] == 0x02)
r14976	r14977
439	439
440	440	static DEVICE_IMAGE_LOAD( pegasus_cart_1 )
441	441	{
442		image.fread(image.device().machine().region("maincpu")->base() + 0x0000, 0x1000);
	442	image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0x0000, 0x1000);
443	443	pegasus_decrypt_rom( image.device().machine(), 0x0000 );
444	444
445	445	return IMAGE_INIT_PASS;
r14976	r14977
447	447
448	448	static DEVICE_IMAGE_LOAD( pegasus_cart_2 )
449	449	{
450		image.fread(image.device().machine().region("maincpu")->base() + 0x1000, 0x1000);
	450	image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0x1000, 0x1000);
451	451	pegasus_decrypt_rom( image.device().machine(), 0x1000 );
452	452
453	453	return IMAGE_INIT_PASS;
r14976	r14977
455	455
456	456	static DEVICE_IMAGE_LOAD( pegasus_cart_3 )
457	457	{
458		image.fread(image.device().machine().region("maincpu")->base() + 0x2000, 0x1000);
	458	image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0x2000, 0x1000);
459	459	pegasus_decrypt_rom( image.device().machine(), 0x2000 );
460	460
461	461	return IMAGE_INIT_PASS;
r14976	r14977
463	463
464	464	static DEVICE_IMAGE_LOAD( pegasus_cart_4 )
465	465	{
466		image.fread(image.device().machine().region("maincpu")->base() + 0xc000, 0x1000);
	466	image.fread(image.device().machine().root_device().memregion("maincpu")->base() + 0xc000, 0x1000);
467	467	pegasus_decrypt_rom( image.device().machine(), 0xc000 );
468	468
469	469	return IMAGE_INIT_PASS;
r14976	r14977
471	471
472	472	static DEVICE_IMAGE_LOAD( pegasus_cart_5 )
473	473	{
474		image.fread( image.device().machine().region("maincpu")->base() + 0xd000, 0x1000);
	474	image.fread( image.device().machine().root_device().memregion("maincpu")->base() + 0xd000, 0x1000);
475	475	pegasus_decrypt_rom( image.device().machine(), 0xd000 );
476	476
477	477	return IMAGE_INIT_PASS;
r14976	r14977
479	479
480	480	MACHINE_START_MEMBER( pegasus_state )
481	481	{
482		m_p_pcgram = machine().region("pcg")->base();
	482	m_p_pcgram = memregion("pcg")->base();
483	483	}
484	484
485	485	MACHINE_RESET_MEMBER( pegasus_state )

src/mess/drivers/vg5k.c

r14976	r14977
324	324
325	325	static DRIVER_INIT( vg5k )
326	326	{
327		UINT8 *FNT = machine.region("ef9345")->base();
	327	UINT8 *FNT = machine.root_device().memregion("ef9345")->base();
328	328	UINT16 a,b,c,d,dest=0x2000;
329	329
330	330	/* Unscramble the chargen rom as the format is too complex for gfxdecode to handle unaided */

src/mess/drivers/tsispch.c

r14976	r14977
278	278
279	279	DRIVER_INIT( prose2k )
280	280	{
281		UINT8 *dspsrc = (UINT8 *)(*machine.region("dspprgload"));
282		UINT32 *dspprg = (UINT32 *)(*machine.region("dspprg"));
	281	UINT8 *dspsrc = (UINT8 *)(*machine.root_device().memregion("dspprgload"));
	282	UINT32 *dspprg = (UINT32 *)(*machine.root_device().memregion("dspprg"));
283	283	fprintf(stderr,"driver init\n");
284	284	// unpack 24 bit 7720 data into 32 bit space and shuffle it so it can run as 7725 code
285	285	// data format as-is in dspsrc: (L = always 0, X = doesn't matter)

src/mess/drivers/elwro800.c

r14976	r14977
106	106
107	107	static void elwro800jr_mmu_w(running_machine &machine, UINT8 data)
108	108	{
109		UINT8 *prom = machine.region("proms")->base() + 0x200;
	109	UINT8 *prom = machine.root_device().memregion("proms")->base() + 0x200;
110	110	UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
111	111	UINT8 cs;
112	112	UINT8 ls175;
r14976	r14977
118	118	if (!BIT(cs,0))
119	119	{
120	120	// rom BAS0
121		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x0000); /* BAS0 ROM */
	121	state->membank("bank1")->set_base(state->memregion("maincpu")->base() + 0x0000); /* BAS0 ROM */
122	122	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0x0000, 0x1fff);
123	123	state->m_ram_at_0000 = 0;
124	124	}
125	125	else if (!BIT(cs,4))
126	126	{
127	127	// rom BOOT
128		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x4000); /* BOOT ROM */
	128	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x4000); /* BOOT ROM */
129	129	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0x0000, 0x1fff);
130	130	state->m_ram_at_0000 = 0;
131	131	}
132	132	else
133	133	{
134	134	// RAM
135		memory_set_bankptr(machine, "bank1", messram);
	135	state->membank("bank1")->set_base(messram);
136	136	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x0000, 0x1fff, "bank1");
137	137	state->m_ram_at_0000 = 1;
138	138	}
r14976	r14977
140	140	cs = prom[((0x2000 >> 10) | (ls175 << 6)) & 0x1ff];
141	141	if (!BIT(cs,1))
142	142	{
143		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x2000);   /* BAS1 ROM */
	143	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x2000);   /* BAS1 ROM */
144	144	machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0x2000, 0x3fff);
145	145	}
146	146	else
147	147	{
148		memory_set_bankptr(machine, "bank2", messram + 0x2000); /* RAM */
	148	state->membank("bank2")->set_base(messram + 0x2000); /* RAM */
149	149	machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_bank(0x2000, 0x3fff, "bank2");
150	150	}
151	151
r14976	r14977
225	225
226	226	READ8_MEMBER(elwro800_state::elwro800jr_io_r)
227	227	{
228		UINT8 *prom = machine().region("proms")->base();
	228	UINT8 *prom = memregion("proms")->base();
229	229	UINT8 cs = prom[offset & 0x1ff];
230	230
231	231	if (!BIT(cs,0))
r14976	r14977
321	321
322	322	WRITE8_MEMBER(elwro800_state::elwro800jr_io_w)
323	323	{
324		UINT8 *prom = machine().region("proms")->base();
	324	UINT8 *prom = memregion("proms")->base();
325	325	UINT8 cs = prom[offset & 0x1ff];
326	326
327	327	if (!BIT(cs,0))
r14976	r14977
515	515	state->m_df_on_databus = 0xdf;
516	516	memset(messram, 0, 64*1024);
517	517
518		memory_set_bankptr(machine, "bank3", messram + 0x4000);
	518	state->membank("bank3")->set_base(messram + 0x4000);
519	519
520	520	state->m_port_7ffd_data = 0;
521	521	state->m_port_1ffd_data = -1;

src/mess/drivers/jupiter.c

r14976	r14977
133	133
134	134	VIDEO_START_MEMBER( jupiter3_state )
135	135	{
136		m_p_chargen = machine().region("chargen")->base();
	136	m_p_chargen = memregion("chargen")->base();
137	137	}
138	138
139	139	SCREEN_UPDATE_MEMBER( jupiter3_state )
r14976	r14977
240	240
241	241	void jupiter3_state::machine_reset()
242	242	{
243		UINT8* ROM = machine().region(Z80_TAG)->base();
	243	UINT8* ROM = memregion(Z80_TAG)->base();
244	244	memcpy(m_p_ram, ROM, 0x1000);
245	245	cpu_set_reg(m_maincpu, STATE_GENPC, 0xe000);
246	246	}
r14976	r14977
348	348
349	349	static DRIVER_INIT( jupiter )
350	350	{
351		UINT8 *rom = machine.region(MCM6571AP_TAG)->base();
	351	UINT8 *rom = machine.root_device().memregion(MCM6571AP_TAG)->base();
352	352	UINT8 inverted[0x1000];
353	353
354	354	memcpy(inverted, rom, 0x1000);
r14976	r14977
370	370
371	371	static DRIVER_INIT( jupiter3 )
372	372	{
373		UINT8 *rom = machine.region(Z80_TAG)->base();
	373	UINT8 *rom = machine.root_device().memregion(Z80_TAG)->base();
374	374	UINT8 inverted[0x1000];
375	375
376	376	memcpy(inverted, rom, 0x1000);

src/mess/drivers/exelv.c

r14976	r14977
503	503
504	504	void exelv_state::machine_start()
505	505	{
506		UINT8 *rom = machine().region("user1")->base() + 0x0200;
507		memory_configure_bank(machine(), "bank1", 0, 1, rom, 0x8000 - 0x200);
508		memory_set_bank(machine(), "bank1", 0);
	506	UINT8 *rom = memregion("user1")->base() + 0x0200;
	507	membank("bank1")->configure_entry(0, rom);
	508	membank("bank1")->set_entry(0);
509	509
510	510	/* register for state saving */
511	511	save_item(NAME(m_tms7020_porta));

src/mess/drivers/sun1.c

r14976	r14977
112	112
113	113	MACHINE_RESET_MEMBER(sun1_state)
114	114	{
115		UINT8* user1 = machine().region("user1")->base();
	115	UINT8* user1 = memregion("user1")->base();
116	116
117	117	memcpy((UINT8*)m_p_ram.target(),user1,0x4000);
118	118

src/mess/drivers/m79152pc.c

r14976	r14977
49	49	static VIDEO_START( m79152pc )
50	50	{
51	51	m79152pc_state *state = machine.driver_data<m79152pc_state>();
52		state->m_p_chargen = machine.region("chargen")->base()+4;
	52	state->m_p_chargen = state->memregion("chargen")->base()+4;
53	53	}
54	54
55	55	static SCREEN_UPDATE_IND16( m79152pc )

src/mess/drivers/pv2000.c

r14976	r14977
356	356	state->m_keyb_column = 0;
357	357
358	358	device_set_input_line_vector(machine.device("maincpu"), INPUT_LINE_IRQ0, 0xff);
359		memset(&machine.region("maincpu")->base()[0x7000], 0xff, 0x1000);   // initialize RAM
	359	memset(&state->memregion("maincpu")->base()[0x7000], 0xff, 0x1000);   // initialize RAM
360	360	}
361	361
362	362	static DEVICE_IMAGE_LOAD( pv2000_cart )
363	363	{
364		UINT8 *cart = image.device().machine().region("maincpu")->base() + 0xC000;
	364	UINT8 *cart = image.device().machine().root_device().memregion("maincpu")->base() + 0xC000;
365	365	UINT32 size;
366	366
367	367	if (image.software_entry() == NULL)

src/mess/drivers/pyl601.c

r14976	r14977
60	60	{
61	61	int chip = (data >> 4) % 5;
62	62	int page = data & 7;
63		memory_set_bankptr(machine(), "bank2", machine().region("romdisk")->base() + chip*0x10000 + page * 0x2000);
	63	membank("bank2")->set_base(machine().root_device().memregion("romdisk")->base() + chip*0x10000 + page * 0x2000);
64	64	}
65	65	else
66	66	{
67		memory_set_bankptr(machine(), "bank2", machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
	67	membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
68	68	}
69	69	}
70	70
r14976	r14977
120	120	READ8_MEMBER(pyl601_state::keycheck_r)
121	121	{
122	122	UINT8 retVal = 0x3f;
123		UINT8 *keyboard = machine().region("keyboard")->base();
	123	UINT8 *keyboard = memregion("keyboard")->base();
124	124	UINT16 row1 = input_port_read(machine(), "ROW1");
125	125	UINT16 row2 = input_port_read(machine(), "ROW2");
126	126	UINT16 row3 = input_port_read(machine(), "ROW3");
r14976	r14977
347	347	pyl601_state *state = machine.driver_data<pyl601_state>();
348	348	UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
349	349	state->m_key_code = 0xff;
350		memory_set_bankptr(machine, "bank1", ram + 0x0000);
351		memory_set_bankptr(machine, "bank2", ram + 0xc000);
352		memory_set_bankptr(machine, "bank3", ram + 0xe000);
353		memory_set_bankptr(machine, "bank4", ram + 0xe700);
354		memory_set_bankptr(machine, "bank5", machine.region("maincpu")->base() + 0xf000);
355		memory_set_bankptr(machine, "bank6", ram + 0xf000);
	350	state->membank("bank1")->set_base(ram + 0x0000);
	351	state->membank("bank2")->set_base(ram + 0xc000);
	352	state->membank("bank3")->set_base(ram + 0xe000);
	353	state->membank("bank4")->set_base(ram + 0xe700);
	354	state->membank("bank5")->set_base(state->memregion("maincpu")->base() + 0xf000);
	355	state->membank("bank6")->set_base(ram + 0xf000);
356	356
357	357	machine.device("maincpu")->reset();
358	358	}
r14976	r14977
365	365	{
366	366	pyl601_state *state = device->machine().driver_data<pyl601_state>();
367	367	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
368		UINT8 *charrom = device->machine().region("gfx1")->base();
	368	UINT8 *charrom = state->memregion("gfx1")->base();
369	369
370	370	int column, bit, i;
371	371	UINT8 data;
r14976	r14977
412	412	{
413	413	pyl601_state *state = device->machine().driver_data<pyl601_state>();
414	414	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
415		UINT8 *charrom = device->machine().region("gfx1")->base();
	415	UINT8 *charrom = state->memregion("gfx1")->base();
416	416
417	417	int column, bit, i;
418	418	UINT8 data;

src/mess/drivers/scv.c

r14976	r14977
227	227	{
228	228	case 0:
229	229	case 0x2000:
230		memory_set_bankptr( machine, "bank0", state->m_cart_rom );
231		memory_set_bankptr( machine, "bank1", state->m_cart_rom );
232		memory_set_bankptr( machine, "bank2", state->m_cart_rom );
233		memory_set_bankptr( machine, "bank3", state->m_cart_rom );
234		memory_set_bankptr( machine, "bank4", state->m_cart_rom + 0x1000 );
	230	state->membank( "bank0" )->set_base( state->m_cart_rom );
	231	state->membank( "bank1" )->set_base( state->m_cart_rom );
	232	state->membank( "bank2" )->set_base( state->m_cart_rom );
	233	state->membank( "bank3" )->set_base( state->m_cart_rom );
	234	state->membank( "bank4" )->set_base( state->m_cart_rom + 0x1000 );
235	235	break;
236	236	case 0x4000:
237		memory_set_bankptr( machine, "bank0", state->m_cart_rom );
238		memory_set_bankptr( machine, "bank1", state->m_cart_rom + 0x2000 );
239		memory_set_bankptr( machine, "bank2", state->m_cart_rom );
240		memory_set_bankptr( machine, "bank3", state->m_cart_rom + 0x2000 );
241		memory_set_bankptr( machine, "bank4", state->m_cart_rom + 0x3000 );
	237	state->membank( "bank0" )->set_base( state->m_cart_rom );
	238	state->membank( "bank1" )->set_base( state->m_cart_rom + 0x2000 );
	239	state->membank( "bank2" )->set_base( state->m_cart_rom );
	240	state->membank( "bank3" )->set_base( state->m_cart_rom + 0x2000 );
	241	state->membank( "bank4" )->set_base( state->m_cart_rom + 0x3000 );
242	242	break;
243	243	case 0x8000:
244		memory_set_bankptr( machine, "bank0", state->m_cart_rom );
245		memory_set_bankptr( machine, "bank1", state->m_cart_rom + 0x2000 );
246		memory_set_bankptr( machine, "bank2", state->m_cart_rom + 0x4000 );
247		memory_set_bankptr( machine, "bank3", state->m_cart_rom + 0x6000 );
248		memory_set_bankptr( machine, "bank4", state->m_cart_rom + 0x7000 );
	244	state->membank( "bank0" )->set_base( state->m_cart_rom );
	245	state->membank( "bank1" )->set_base( state->m_cart_rom + 0x2000 );
	246	state->membank( "bank2" )->set_base( state->m_cart_rom + 0x4000 );
	247	state->membank( "bank3" )->set_base( state->m_cart_rom + 0x6000 );
	248	state->membank( "bank4" )->set_base( state->m_cart_rom + 0x7000 );
249	249	break;
250	250	case 0x10000:
251		memory_set_bankptr( machine, "bank0", state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0x8000 : 0 ) );
252		memory_set_bankptr( machine, "bank1", state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xa000 : 0x2000 ) );
253		memory_set_bankptr( machine, "bank2", state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xc000 : 0x4000 ) );
254		memory_set_bankptr( machine, "bank3", state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xe000 : 0x6000 ) );
255		memory_set_bankptr( machine, "bank4", state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xf000 : 0x7000 ) );
	251	state->membank( "bank0" )->set_base( state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0x8000 : 0 ) );
	252	state->membank( "bank1" )->set_base( state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xa000 : 0x2000 ) );
	253	state->membank( "bank2" )->set_base( state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xc000 : 0x4000 ) );
	254	state->membank( "bank3" )->set_base( state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xe000 : 0x6000 ) );
	255	state->membank( "bank4" )->set_base( state->m_cart_rom + ( ( state->m_portc & 0x20 ) ? 0xf000 : 0x7000 ) );
256	256	break;
257	257	case 0x20000:   /* Pole Position 2 */
258	258	int base = ( ( state->m_portc >> 5 ) & 0x03 ) * 0x8000 ;
259		memory_set_bankptr( machine, "bank0", state->m_cart_rom + base + 0 );
260		memory_set_bankptr( machine, "bank1", state->m_cart_rom + base + 0x2000 );
261		memory_set_bankptr( machine, "bank2", state->m_cart_rom + base + 0x4000 );
262		memory_set_bankptr( machine, "bank3", state->m_cart_rom + base + 0x6000 );
263		memory_set_bankptr( machine, "bank4", state->m_cart_rom + base + 0x7000 );
	259	state->membank( "bank0" )->set_base( state->m_cart_rom + base + 0 );
	260	state->membank( "bank1" )->set_base( state->m_cart_rom + base + 0x2000 );
	261	state->membank( "bank2" )->set_base( state->m_cart_rom + base + 0x4000 );
	262	state->membank( "bank3" )->set_base( state->m_cart_rom + base + 0x6000 );
	263	state->membank( "bank4" )->set_base( state->m_cart_rom + base + 0x7000 );
264	264	/* On-cart RAM is enabled when PC6 is high */
265	265	if ( state->m_cart_ram && state->m_portc & 0x40 )
266	266	{
267	267	state->m_cart_ram_enabled = true;
268		memory_set_bankptr( machine, "bank4", state->m_cart_ram );
	268	state->membank( "bank4" )->set_base( state->m_cart_ram );
269	269	}
270	270	break;
271	271	}
r14976	r14977
275	275	{
276	276	if ( state->m_cart_ram_size == 0x1000 )
277	277	{
278		memory_set_bankptr( machine, "bank4", state->m_cart_ram );
	278	state->membank( "bank4" )->set_base( state->m_cart_ram );
279	279	}
280	280	else
281	281	{
282		memory_set_bankptr( machine, "bank3", state->m_cart_ram );
283		memory_set_bankptr( machine, "bank4", state->m_cart_ram + 0x1000 );
	282	state->membank( "bank3" )->set_base( state->m_cart_ram );
	283	state->membank( "bank4" )->set_base( state->m_cart_ram + 0x1000 );
284	284	}
285	285	state->m_cart_ram_enabled = true;
286	286	}
r14976	r14977
302	302	{
303	303	scv_state *state = device->machine().driver_data<scv_state>();
304	304
305		state->m_cart_rom = device->machine().region( "cart" )->base();
	305	state->m_cart_rom = state->memregion( "cart" )->base();
306	306	state->m_cart_rom_size = 0;
307	307	state->m_cart_ram = NULL;
308	308	state->m_cart_ram_size = 0;
r14976	r14977
317	317
318	318	if ( image.software_entry() == NULL )
319	319	{
320		UINT8 *cart = image.device().machine().region( "cart" )->base();
	320	UINT8 *cart = image.device().machine().root_device().memregion( "cart" )->base();
321	321	int size = image.length();
322	322
323		if ( size > image.device().machine().region( "cart" )->bytes() )
	323	if ( size > state->memregion( "cart" )->bytes() )
324	324	{
325	325	image.seterror( IMAGE_ERROR_UNSPECIFIED, "Unsupported cartridge size" );
326	326	return IMAGE_INIT_FAIL;
r14976	r14977
582	582	if ( text_x && text_y )
583	583	{
584	584	/* Text mode */
585		UINT8 *char_data = screen.machine().region( "charrom" )->base() + ( d & 0x7f ) * 8;
	585	UINT8 *char_data = state->memregion( "charrom" )->base() + ( d & 0x7f ) * 8;
586	586	draw_text( bitmap, x * 8, y * 16, char_data, fg, bg );
587	587	}
588	588	else

src/mess/drivers/mstation.c

r14976	r14977
193	193	break;
194	194	case 1: // banked RAM
195	195	sprintf(bank_tag,"bank%d", bank);
196		memory_set_bankptr(machine(), bank_tag, m_ram_base + (((bank == 1 ? m_bank1[0] : m_bank2[0]) & 0x07)<<14));
	196	membank(bank_tag)->set_base(m_ram_base + (((bank == 1 ? m_bank1[0] : m_bank2[0]) & 0x07)<<14));
197	197	program->install_readwrite_bank (bank * 0x4000, bank * 0x4000 + 0x3fff, bank_tag);
198	198	active_flash = -1;
199	199	break;
r14976	r14977
437	437	m_flashes[1] = machine().device<intelfsh8_device>("flash1");
438	438
439	439	// allocate the videoram
440		m_vram = (UINT8*)machine().region_alloc( "vram", 9600, 1, ENDIANNESS_LITTLE )->base();
	440	m_vram = (UINT8*)machine().memory().region_alloc( "vram", 9600, 1, ENDIANNESS_LITTLE )->base();
441	441	m_ram_base = (UINT8*)machine().device<ram_device>(RAM_TAG)->pointer();
442	442
443	443	// map firsh RAM bank at 0xc000-0xffff
444		memory_set_bankptr(machine(), "sysram", m_ram_base);
	444	membank("sysram")->set_base(m_ram_base);
445	445	}
446	446
447	447

src/mess/drivers/iq151.c

r14976	r14977
156	156
157	157	WRITE8_MEMBER(iq151_state::boot_bank_w)
158	158	{
159		memory_set_bank(machine(), "boot", data & 1);
	159	membank("boot")->set_entry(data & 1);
160	160	}
161	161
162	162
r14976	r14977
348	348	{
349	349	iq151_state *state = machine.driver_data<iq151_state>();
350	350
351		UINT8 *RAM = machine.region("maincpu")->base();
352		memory_configure_bank(machine, "boot", 0, 1, RAM + 0xf800, 0);
353		memory_configure_bank(machine, "boot", 1, 1, RAM + 0x0000, 0);
	351	UINT8 *RAM = state->memregion("maincpu")->base();
	352	state->membank("boot")->configure_entry(0, RAM + 0xf800);
	353	state->membank("boot")->configure_entry(1, RAM + 0x0000);
354	354
355	355	device_set_irq_callback(state->m_maincpu, iq151_irq_callback);
356	356
r14976	r14977
364	364
365	365	MACHINE_RESET_MEMBER( iq151_state )
366	366	{
367		memory_set_bank(machine(), "boot", 0);
	367	membank("boot")->set_entry(0);
368	368
369	369	m_vblank_irq_state = 0;
370	370	}

src/mess/drivers/pcfx.c

r14976	r14977
55	55
56	56	void pcfx_state::machine_reset()
57	57	{
58		memory_set_bankptr( machine(), "bank1", machine().region("user1")->base() );
	58	membank( "bank1" )->set_base( memregion("user1")->base() );
59	59	}
60	60
61	61	UINT32 pcfx_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)

src/mess/drivers/h19.c

r14976	r14977
297	297
298	298	VIDEO_START_MEMBER( h19_state )
299	299	{
300		m_p_chargen = machine().region("chargen")->base();
	300	m_p_chargen = memregion("chargen")->base();
301	301	}
302	302
303	303	static MC6845_UPDATE_ROW( h19_update_row )

src/mess/drivers/avigo.c

r14976	r14977
173	173
174	174	case 0x01: // banked RAM
175	175	sprintf(bank_tag,"bank%d", bank);
176		memory_set_bankptr(machine(), bank_tag, m_ram_base + (((bank == 1 ? m_bank1_l : m_bank2_l) & 0x07)<<14));
	176	membank(bank_tag)->set_base(m_ram_base + (((bank == 1 ? m_bank1_l : m_bank2_l) & 0x07)<<14));
177	177	space->install_readwrite_bank (bank * 0x4000, bank * 0x4000 + 0x3fff, bank_tag);
178	178	active_flash = -1;
179	179	break;
r14976	r14977
246	246	/* if is a cold start initialize flash contents */
247	247	if (!m_warm_start)
248	248	{
249		memcpy(m_flashes[0]->space()->get_read_ptr(0), machine().region("bios")->base() + 0x000000, 0x100000);
250		memcpy(m_flashes[1]->space()->get_read_ptr(0), machine().region("bios")->base() + 0x100000, 0x100000);
	249	memcpy(m_flashes[0]->space()->get_read_ptr(0), memregion("bios")->base() + 0x000000, 0x100000);
	250	memcpy(m_flashes[1]->space()->get_read_ptr(0), memregion("bios")->base() + 0x100000, 0x100000);
251	251	}
252	252
253	253	m_irq = 0;
r14976	r14977
267	267	m_ram_base = (UINT8*)m_ram->pointer();
268	268
269	269	// bank3 always first ram bank
270		memory_set_bankptr(machine(), "bank3", m_ram_base);
	270	membank("bank3")->set_base(m_ram_base);
271	271
272	272	/* keep machine pointers to flash devices */
273	273	m_flashes[0] = machine().device<intelfsh8_device>("flash0");

src/mess/drivers/mpz80.c

r14976	r14977
163	163	READ8_MEMBER( mpz80_state::mmu_r )
164	164	{
165	165	m_addr = get_address(offset);
166		UINT8 *rom = machine().region(Z80_TAG)->base();
	166	UINT8 *rom = memregion(Z80_TAG)->base();
167	167	UINT8 data = 0;
168	168
169	169	if (m_pretrap)
r14976	r14977
831	831	{
832	832	if (m_trap && address >= m_trap_start && address <= m_trap_start + 0xf)
833	833	{
834		direct.explicit_configure(m_trap_start, m_trap_start + 0xf, 0xf, machine().region(Z80_TAG)->base() + ((m_trap_reset << 10) | 0x3f0));
	834	direct.explicit_configure(m_trap_start, m_trap_start + 0xf, 0xf, memregion(Z80_TAG)->base() + ((m_trap_reset << 10) | 0x3f0));
835	835	return ~0;
836	836	}
837	837

src/mess/drivers/super6.c

r14976	r14977
32	32	{
33	33	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
34	34	UINT8 *ram = m_ram->pointer();
35		UINT8 *rom = machine().region(Z80_TAG)->base();
	35	UINT8 *rom = memregion(Z80_TAG)->base();
36	36
37	37	// power on jump
38	38	if (!BIT(m_bank0, 6)) {   program->install_rom(0x0000, 0x07ff, 0, 0xf800, rom); return; }

src/mess/drivers/e01.c

r14976	r14977
95	95
96	96	READ8_MEMBER( e01_state::ram_select_r )
97	97	{
98		memory_set_bank(machine(), "bank1", 0);
99		memory_set_bank(machine(), "bank3", 0);
	98	membank("bank1")->set_entry(0);
	99	membank("bank3")->set_entry(0);
100	100
101	101	return 0;
102	102	}
r14976	r14977
359	359	void e01_state::machine_start()
360	360	{
361	361	UINT8 *ram = m_ram->pointer();
362		UINT8 *rom = machine().region(R65C102_TAG)->base();
	362	UINT8 *rom = memregion(R65C102_TAG)->base();
363	363
364	364	/* setup memory banking */
365		memory_configure_bank(machine(), "bank1", 0, 1, ram, 0);
366		memory_configure_bank(machine(), "bank1", 1, 1, rom, 0);
367		memory_set_bank(machine(), "bank1", 1);
	365	membank("bank1")->configure_entry(0, ram);
	366	membank("bank1")->configure_entry(1, rom);
	367	membank("bank1")->set_entry(1);
368	368
369		memory_configure_bank(machine(), "bank2", 0, 1, ram, 0);
370		memory_set_bank(machine(), "bank2", 0);
	369	membank("bank2")->configure_entry(0, ram);
	370	membank("bank2")->set_entry(0);
371	371
372		memory_configure_bank(machine(), "bank3", 0, 1, ram + 0xfd00, 0);
373		memory_configure_bank(machine(), "bank3", 1, 1, rom + 0xfd00, 0);
374		memory_set_bank(machine(), "bank3", 1);
	372	membank("bank3")->configure_entry(0, ram + 0xfd00);
	373	membank("bank3")->configure_entry(1, rom + 0xfd00);
	374	membank("bank3")->set_entry(1);
375	375
376		memory_configure_bank(machine(), "bank4", 0, 1, ram + 0xfd00, 0);
377		memory_set_bank(machine(), "bank4", 0);
	376	membank("bank4")->configure_entry(0, ram + 0xfd00);
	377	membank("bank4")->set_entry(0);
378	378
379	379	/* register for state saving */
380	380	save_item(NAME(m_adlc_ie));
r14976	r14977
392	392
393	393	void e01_state::machine_reset()
394	394	{
395		memory_set_bank(machine(), "bank1", 1);
396		memory_set_bank(machine(), "bank3", 1);
	395	membank("bank1")->set_entry(1);
	396	membank("bank3")->set_entry(1);
397	397	}
398	398
399	399	/***************************************************************************

src/mess/drivers/zrt80.c

r14976	r14977
190	190
191	191	VIDEO_START_MEMBER( zrt80_state )
192	192	{
193		m_p_chargen = machine().region("chargen")->base();
	193	m_p_chargen = memregion("chargen")->base();
194	194	}
195	195
196	196	static MC6845_UPDATE_ROW( zrt80_update_row )

src/mess/drivers/svision.c

r14976	r14977
129	129	break;
130	130	case 0x26: /* bits 5,6 memory management for a000? */
131	131	logerror("%.6f svision write %04x %02x\n", machine().time().as_double(),offset,data);
132		memory_set_bankptr(machine(), "bank1", machine().region("user1")->base() + ((m_reg[0x26] & 0xe0) << 9));
	132	membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + ((m_reg[0x26] & 0xe0) << 9));
133	133	svision_irq(machine());
134	134	break;
135	135	case 0x23: /* delta hero irq routine write */
r14976	r14977
430	430	state->m_sound = machine.device("custom");
431	431	state->m_dma_finished = svision_dma_finished(state->m_sound);
432	432	state->m_pet.on = FALSE;
433		memory_set_bankptr(machine, "bank2", machine.region("user1")->base() + 0x1c000);
	433	state->membank("bank2")->set_base(state->memregion("user1")->base() + 0x1c000);
434	434	}
435	435
436	436	static DRIVER_INIT( svisions )
r14976	r14977
439	439	state->m_svision.timer1 = machine.scheduler().timer_alloc(FUNC(svision_timer));
440	440	state->m_sound = machine.device("custom");
441	441	state->m_dma_finished = svision_dma_finished(state->m_sound);
442		memory_set_bankptr(machine, "bank2", machine.region("user1")->base() + 0x1c000);
	442	state->membank("bank2")->set_base(state->memregion("user1")->base() + 0x1c000);
443	443	state->m_svision.timer1 = machine.scheduler().timer_alloc(FUNC(svision_timer));
444	444	state->m_pet.on = TRUE;
445	445	state->m_pet.timer = machine.scheduler().timer_alloc(FUNC(svision_pet_timer));
r14976	r14977
456	456	size = image.length();
457	457	temp_copy = auto_alloc_array(image.device().machine(), UINT8, size);
458	458
459		if (size > image.device().machine().region("user1")->bytes())
	459	if (size > image.device().machine().root_device().memregion("user1")->bytes())
460	460	{
461	461	image.seterror(IMAGE_ERROR_UNSPECIFIED, "Unsupported cartridge size");
462	462	auto_free(image.device().machine(), temp_copy);
r14976	r14977
477	477	memcpy(temp_copy, image.get_software_region("rom"), size);
478	478	}
479	479
480		mirror = image.device().machine().region("user1")->bytes() / size;
	480	mirror = image.device().machine().root_device().memregion("user1")->bytes() / size;
481	481
482	482	/* With the following, we mirror the cart in the whole "user1" memory region */
483	483	for (i = 0; i < mirror; i++)
484		memcpy(image.device().machine().region("user1")->base() + i * size, temp_copy, size);
	484	memcpy(image.device().machine().root_device().memregion("user1")->base() + i * size, temp_copy, size);
485	485
486	486	auto_free(image.device().machine(), temp_copy);
487	487
r14976	r14977
493	493	svision_state *state = machine.driver_data<svision_state>();
494	494	state->m_svision.timer_shot = FALSE;
495	495	*state->m_dma_finished = FALSE;
496		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
	496	state->membank("bank1")->set_base(state->memregion("user1")->base());
497	497	}
498	498
499	499
r14976	r14977
502	502	svision_state *state = machine.driver_data<svision_state>();
503	503	state->m_svision.timer_shot = FALSE;
504	504	*state->m_dma_finished = FALSE;
505		memory_set_bankptr(machine, "bank1", machine.region("user1")->base());
	505	state->membank("bank1")->set_base(state->memregion("user1")->base());
506	506	state->m_tvlink.palette_on = FALSE;
507	507
508	508	memset(state->m_reg + 0x800, 0xff, 0x40); // normally done from state->m_tvlink microcontroller

src/mess/drivers/c64.c

r14976	r14977
1022	1022	cbm_common_init();
1023	1023
1024	1024	// find memory regions
1025		m_basic = machine().region("basic")->base();
1026		m_kernal = machine().region("kernal")->base();
1027		m_charom = machine().region("charom")->base();
	1025	m_basic = memregion("basic")->base();
	1026	m_kernal = memregion("kernal")->base();
	1027	m_charom = memregion("charom")->base();
1028	1028
1029	1029	// allocate memory
1030	1030	m_color_ram = auto_alloc_array(machine(), UINT8, 0x400);
r14976	r14977
1055	1055	c64_state::machine_start();
1056	1056
1057	1057	// find memory regions
1058		m_basic = machine().region(M6510_TAG)->base();
1059		m_kernal = machine().region(M6510_TAG)->base() + 0x2000;
	1058	m_basic = memregion(M6510_TAG)->base();
	1059	m_kernal = memregion(M6510_TAG)->base() + 0x2000;
1060	1060	}
1061	1061
1062	1062

src/mess/drivers/vta2000.c

r14976	r14977
53	53	static VIDEO_START( vta2000 )
54	54	{
55	55	vta2000_state *state = machine.driver_data<vta2000_state>();
56		state->m_p_chargen = machine.region("chargen")->base();
57		state->m_p_videoram = machine.region("maincpu")->base()+0x8000;
	56	state->m_p_chargen = machine.root_device().memregion("chargen")->base();
	57	state->m_p_videoram = state->memregion("maincpu")->base()+0x8000;
58	58	}
59	59
60	60	static SCREEN_UPDATE_IND16( vta2000 )

src/mess/drivers/ti89.c

r14976	r14977
145	145	}
146	146	else
147	147	{
148		UINT16 *rom_base = (UINT16 *)(*space.machine().region("flash"));
	148	UINT16 *rom_base = (UINT16 *)(*space.machine().root_device().memregion("flash"));
149	149
150	150	return rom_base[offset];
151	151	}
r14976	r14977
420	420
421	421	void ti68k_state::machine_start()
422	422	{
423		UINT16 *rom = (UINT16 *)(*machine().region("flash"));
	423	UINT16 *rom = (UINT16 *)(*machine().root_device().memregion("flash"));
424	424	int i;
425	425
426	426	m_flash_mem = !((rom[0x32] & 0x0f) != 0);

src/mess/drivers/ipds.c

r14976	r14977
89	89	int i;
90	90	ipds_state *state = device->machine().driver_data<ipds_state>();
91	91	bitmap_ind16 &bitmap = state->m_bitmap;
92		UINT8 *charmap = device->machine().region("chargen")->base();
	92	UINT8 *charmap = state->memregion("chargen")->base();
93	93	UINT8 pixels = charmap[(linecount & 7) + (charcode << 3)] ^ 0xff;
94	94
95	95	if (vsp)

src/mess/drivers/xerox820.c

r14976	r14977
147	147	if (bank)
148	148	{
149	149	/* ROM */
150		program->install_rom(0x0000, 0x0fff, machine().region("monitor")->base());
	150	program->install_rom(0x0000, 0x0fff, memregion("monitor")->base());
151	151	program->unmap_readwrite(0x1000, 0x1fff);
152	152	program->install_ram(0x3000, 0x3fff, m_video_ram);
153	153	}
r14976	r14977
166	166	if (bank)
167	167	{
168	168	/* ROM */
169		program->install_rom(0x0000, 0x17ff, machine().region("monitor")->base());
	169	program->install_rom(0x0000, 0x17ff, memregion("monitor")->base());
170	170	program->unmap_readwrite(0x1800, 0x2fff);
171	171	program->install_ram(0x3000, 0x3fff, m_video_ram);
172	172	program->unmap_readwrite(0x4000, 0xbfff);
r14976	r14977
624	624	void xerox820_state::video_start()
625	625	{
626	626	/* find memory regions */
627		m_char_rom = machine().region("chargen")->base();
	627	m_char_rom = memregion("chargen")->base();
628	628	}
629	629
630	630

src/mess/drivers/chesstrv.c

r14976	r14977
202	202
203	203	void chesstrv_state::machine_start()
204	204	{
205		m_ram = machine().region("ram")->base();
	205	m_ram = memregion("ram")->base();
206	206
207	207	save_item(NAME(m_ram_addr));
208	208	save_item(NAME(m_matrix));

src/mess/drivers/ti99_4p.c

r14976	r14977
749	749	driver->m_cassette = static_cast<cassette_image_device*>(machine.device(CASSETTE_TAG));
750	750	driver->m_tms9901 = static_cast<tms9901_device*>(machine.device(TMS9901_TAG));
751	751
752		driver->m_ram = (UINT16*)(*machine.region(SAMSMEM_TAG));
753		driver->m_scratchpad = (UINT16*)(*machine.region(PADMEM_TAG));
	752	driver->m_ram = (UINT16*)(*machine.root_device().memregion(SAMSMEM_TAG));
	753	driver->m_scratchpad = (UINT16*)(*machine.root_device().memregion(PADMEM_TAG));
754	754
755	755	driver->m_peribox->senila(CLEAR_LINE);
756	756	driver->m_peribox->senilb(CLEAR_LINE);
757	757
758		UINT16 *rom = (UINT16*)(*machine.region("maincpu"));
	758	UINT16 *rom = (UINT16*)(*machine.root_device().memregion("maincpu"));
759	759	driver->m_rom0  = rom + 0x2000;
760	760	driver->m_dsr   = rom + 0x6000;
761	761	driver->m_rom6a = rom + 0x3000;

src/mess/drivers/micronic.c

r14976	r14977
163	163	{
164	164	if (data < 2)
165	165	{
166		memory_set_bank(machine(), "bank1", data);
	166	membank("bank1")->set_entry(data);
167	167	m_maincpu->memory().space(AS_PROGRAM)->unmap_write(0x0000, 0x7fff);
168	168	}
169	169	else
170	170	{
171		memory_set_bank(machine(), "bank1", (data <= m_banks_num) ? data : m_banks_num);
	171	membank("bank1")->set_entry((data <= m_banks_num) ? data : m_banks_num);
172	172	m_maincpu->memory().space(AS_PROGRAM)->install_write_bank(0x0000, 0x7fff, "bank1");
173	173	}
174	174	}
r14976	r14977
329	329	void micronic_state::machine_start()
330	330	{
331	331	/* ROM banks */
332		memory_configure_bank(machine(), "bank1", 0x00, 0x02, machine().region(Z80_TAG)->base(), 0x10000);
	332	membank("bank1")->configure_entries(0x00, 0x02, memregion(Z80_TAG)->base(), 0x10000);
333	333
334	334	/* RAM banks */
335	335	m_banks_num = (m_ram->size()>>15) + 1;
336		memory_configure_bank(machine(), "bank1", 0x02, m_banks_num - 1, m_ram->pointer(), 0x8000);
	336	membank("bank1")->configure_entries(0x02, m_banks_num - 1, m_ram->pointer(), 0x8000);
337	337
338	338	/* register for state saving */
339	339	//  save_item(NAME(state->));
r14976	r14977
341	341
342	342	void micronic_state::machine_reset()
343	343	{
344		memory_set_bank(machine(), "bank1", 0);
	344	membank("bank1")->set_entry(0);
345	345	m_maincpu->memory().space(AS_PROGRAM)->unmap_write(0x0000, 0x7fff);
346	346	}
347	347

src/mess/drivers/ptcsol.c

r14976	r14977
529	529	/* after the first 4 bytes have been read from ROM, switch the ram back in */
530	530	static TIMER_CALLBACK( sol20_boot )
531	531	{
532		memory_set_bank(machine, "boot", 0);
	532	sol20_state *state = machine.driver_data<sol20_state>();
	533	state->membank("boot")->set_entry(0);
533	534	}
534	535
535	536	MACHINE_START_MEMBER( sol20_state )
r14976	r14977
585	586	ay31015_set_transmitter_clock( m_uart_s, s_clock);
586	587
587	588	// boot-bank
588		memory_set_bank(machine(), "boot", 1);
	589	membank("boot")->set_entry(1);
589	590	machine().scheduler().timer_set(attotime::from_usec(9), FUNC(sol20_boot));
590	591	}
591	592
592	593	static DRIVER_INIT( sol20 )
593	594	{
594		UINT8 *RAM = machine.region("maincpu")->base();
595		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xc000);
	595	sol20_state *state = machine.driver_data<sol20_state>();
	596	UINT8 *RAM = state->memregion("maincpu")->base();
	597	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xc000);
596	598	}
597	599
598	600	VIDEO_START_MEMBER( sol20_state )
599	601	{
600		m_p_chargen = machine().region("chargen")->base();
	602	m_p_chargen = memregion("chargen")->base();
601	603	}
602	604
603	605	SCREEN_UPDATE16_MEMBER( sol20_state )

src/mess/drivers/alphatro.c

r14976	r14977
135	135
136	136	VIDEO_START_MEMBER( alphatro_state )
137	137	{
138		m_p_chargen = machine().region("chargen")->base();
	138	m_p_chargen = memregion("chargen")->base();
139	139	}
140	140
141	141	static MC6845_UPDATE_ROW( alphatro_update_row )
r14976	r14977
351	351	{
352	352	// do what the IPL does
353	353	//  UINT8* RAM = machine().device<ram_device>("ram")->pointer();
354		UINT8* ROM = machine().region("maincpu")->base();
	354	UINT8* ROM = memregion("maincpu")->base();
355	355	cpu_set_reg(m_maincpu, STATE_GENPC, 0xe000);
356	356	memcpy(m_p_ram, ROM, 0xf000); // copy BASIC to RAM, which the undumped IPL is supposed to do.
357	357	memcpy(m_p_videoram, ROM+0x1000, 0x1000);
358		//  memory_set_bankptr(machine(), "bank1", RAM);
	358	//  membank("bank1")->set_base(RAM);
359	359
360	360	// probably not correct, exact meaning of port is unknown, vblank/vsync is too slow.
361	361	m_sys_timer->adjust(attotime::from_usec(10),0,attotime::from_usec(10));

src/mess/drivers/vc4000.c

r14976	r14977
190	190	static DEVICE_IMAGE_LOAD( vc4000_cart )
191	191	{
192	192	running_machine &machine = image.device().machine();
	193	vc4000_state *state = machine.driver_data<vc4000_state>();
193	194	address_space *memspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
194	195	UINT32 size;
195	196
r14976	r14977
204	205	if (size > 0x1000)   /* 6k rom + 1k ram - Chess2 only */
205	206	{
206	207	memspace->install_read_bank(0x0800, 0x15ff, "bank1");   /* extra rom */
207		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x1000);
	208	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x1000);
208	209
209	210	memspace->install_readwrite_bank(0x1800, 0x1bff, "bank2");   /* ram */
210		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x1800);
	211	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x1800);
211	212	}
212	213	else if (size > 0x0800)   /* some 4k roms have 1k of mirrored ram */
213	214	{
214	215	memspace->install_read_bank(0x0800, 0x0fff, "bank1");   /* extra rom */
215		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x0800);
	216	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x0800);
216	217
217	218	memspace->install_readwrite_bank(0x1000, 0x15ff, 0, 0x800, "bank2"); /* ram */
218		memory_set_bankptr(machine, "bank2", machine.region("maincpu")->base() + 0x1000);
	219	state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x1000);
219	220	}
220	221	else if (size == 0x0800)   /* 2k roms + 2k ram - Hobby Module(Radofin) and elektor TVGC*/
221	222	{
222	223	memspace->install_readwrite_bank(0x0800, 0x0fff, "bank1"); /* ram */
223		memory_set_bankptr(machine, "bank1", machine.region("maincpu")->base() + 0x0800);
	224	state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x0800);
224	225	}
225	226
226	227	if (size > 0)
227	228	{
228	229	if (image.software_entry() == NULL)
229	230	{
230		if (image.fread( machine.region("maincpu")->base(), size) != size)
	231	if (image.fread( machine.root_device().memregion("maincpu")->base(), size) != size)
231	232	return IMAGE_INIT_FAIL;
232	233	}
233	234	else
234		memcpy(machine.region("maincpu")->base(), image.get_software_region("rom"), size);
	235	memcpy(machine.root_device().memregion("maincpu")->base(), image.get_software_region("rom"), size);
235	236	}
236	237
237	238	return IMAGE_INIT_PASS;

src/mess/drivers/cosmicos.c

r14976	r14977
532	532
533	533	static QUICKLOAD_LOAD( cosmicos )
534	534	{
535		UINT8 *ptr = image.device().machine().region(CDP1802_TAG)->base();
	535	UINT8 *ptr = image.device().machine().root_device().memregion(CDP1802_TAG)->base();
536	536	int size = image.length();
537	537
538	538	/* load image to RAM */
r14976	r14977
615	615	if (m_boot)
616	616	{
617	617	/* force A6 and A7 high */
618		direct.explicit_configure(0x0000, 0xffff, 0x3f3f, machine().region(CDP1802_TAG)->base() + 0xc0);
	618	direct.explicit_configure(0x0000, 0xffff, 0x3f3f, memregion(CDP1802_TAG)->base() + 0xc0);
619	619	return ~0;
620	620	}
621	621

src/mess/drivers/pcm.c

r14976	r14977
208	208
209	209	VIDEO_START_MEMBER( pcm_state )
210	210	{
211		m_p_chargen = machine().region("chargen")->base();
	211	m_p_chargen = memregion("chargen")->base();
212	212	}
213	213
214	214	SCREEN_UPDATE16_MEMBER( pcm_state )

src/mess/drivers/dmv.c

r14976	r14977
82	82	static UPD7220_DRAW_TEXT_LINE( hgdc_draw_text )
83	83	{
84	84	dmv_state *state = device->machine().driver_data<dmv_state>();
85		UINT8 * chargen = state->machine().region("maincpu")->base() + 0x1000;
	85	UINT8 * chargen = state->memregion("maincpu")->base() + 0x1000;
86	86
87	87	for( int x = 0; x < pitch; x++ )
88	88	{

src/mess/drivers/sun2.c

r14976	r14977
102	102
103	103	MACHINE_RESET_MEMBER(sun2_state)
104	104	{
105		UINT8* user1 = machine().region("user1")->base();
	105	UINT8* user1 = memregion("user1")->base();
106	106
107	107	memcpy((UINT8*)m_p_ram.target(),user1,0x8000);
108	108

src/mess/drivers/b16.c

r14976	r14977
66	66	VIDEO_START_MEMBER( b16_state )
67	67	{
68	68	// find memory regions
69		m_char_rom = machine().region("pcg")->base();
	69	m_char_rom = memregion("pcg")->base();
70	70	}
71	71
72	72
r14976	r14977
75	75	b16_state *state = machine().driver_data<b16_state>();
76	76	int x,y;
77	77	int xi,yi;
78		UINT8 *gfx_rom = machine().region("pcg")->base();
	78	UINT8 *gfx_rom = memregion("pcg")->base();
79	79
80	80	for(y=0;y<mc6845_v_display;y++)
81	81	{

src/mess/drivers/argo.c

r14976	r14977
58	58	{
59	59	UINT8 *RAM;
60	60	if (m_ram_ctrl)
61		RAM = machine().region("videoram")->base();
	61	RAM = memregion("videoram")->base();
62	62	else
63		RAM = machine().region("extraram")->base();
	63	RAM = memregion("extraram")->base();
64	64
65	65	RAM[offset] = data;
66	66	}
r14976	r14977
103	103	case 0xE8: // hardware scroll - we should use ports E0,E1,E2,E3
104	104	if ((m_scroll_ctrl == 2) & (data == 0xe3))
105	105	{
106		UINT8 *RAM = machine().region("videoram")->base();
	106	UINT8 *RAM = memregion("videoram")->base();
107	107	m_scroll_ctrl = 0;
108	108	memcpy(RAM, RAM+80, 24*80);
109	109	}
r14976	r14977
253	253	/* after the first 4 bytes have been read from ROM, switch the ram back in */
254	254	static TIMER_CALLBACK( argo_boot )
255	255	{
256		memory_set_bank(machine, "boot", 0);
	256	argo_state *state = machine.driver_data<argo_state>();
	257	state->membank("boot")->set_entry(0);
257	258	}
258	259
259	260	MACHINE_RESET_MEMBER(argo_state)
260	261	{
261		memory_set_bank(machine(), "boot", 1);
	262	membank("boot")->set_entry(1);
262	263	machine().scheduler().timer_set(attotime::from_usec(5), FUNC(argo_boot));
263	264	}
264	265
265	266	DRIVER_INIT( argo )
266	267	{
267		UINT8 *RAM = machine.region("maincpu")->base();
268		memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0xf800);
	268	argo_state *state = machine.driver_data<argo_state>();
	269	UINT8 *RAM = state->memregion("maincpu")->base();
	270	state->membank("boot")->configure_entries(0, 2, &RAM[0x0000], 0xf800);
269	271	}
270	272
271	273	VIDEO_START_MEMBER( argo_state )
272	274	{
273		m_p_chargen = machine().region("chargen")->base();
	275	m_p_chargen = memregion("chargen")->base();
274	276	}
275	277
276	278	SCREEN_UPDATE16_MEMBER( argo_state )
r14976	r14977
325	327	else
326	328	{
327	329	ma=0;
328		p_vram = machine().region("videoram")->base();
	330	p_vram = memregion("videoram")->base();
329	331	}
330	332	}
331	333	return 0;

src/mess/drivers/psion.c

r14976	r14977
57	57
58	58	void psion_state::update_banks(running_machine &machine)
59	59	{
	60	psion_state *state = machine.driver_data<psion_state>();
60	61	if (m_ram_bank < m_ram_bank_count && m_ram_bank_count)
61		memory_set_bank(machine, "rambank", m_ram_bank);
	62	state->membank("rambank")->set_entry(m_ram_bank);
62	63
63	64	if (m_rom_bank < m_rom_bank_count && m_rom_bank_count)
64		memory_set_bank(machine, "rombank", m_rom_bank);
	65	state->membank("rombank")->set_entry(m_rom_bank);
65	66	}
66	67
67	68	WRITE8_MEMBER( psion_state::hd63701_int_reg_w )
r14976	r14977
402	403
403	404	if (m_rom_bank_count)
404	405	{
405		UINT8* rom_base = (UINT8 *)machine().region("maincpu")->base();
	406	UINT8* rom_base = (UINT8 *)machine().root_device().memregion("maincpu")->base();
406	407
407		memory_configure_bank(machine(), "rombank", 0, 1, rom_base + 0x8000, 0x4000);
408		memory_configure_bank(machine(), "rombank", 1, m_rom_bank_count-1, rom_base + 0x10000, 0x4000);
409		memory_set_bank(machine(), "rombank", 0);
	408	membank("rombank")->configure_entry(0, rom_base + 0x8000);
	409	membank("rombank")->configure_entries(1, m_rom_bank_count-1, rom_base + 0x10000, 0x4000);
	410	membank("rombank")->set_entry(0);
410	411	}
411	412
412	413	if (m_ram_bank_count)
413	414	{
414	415	m_paged_ram = auto_alloc_array(machine(), UINT8, m_ram_bank_count * 0x4000);
415		memory_configure_bank(machine(), "rambank", 0, m_ram_bank_count, m_paged_ram, 0x4000);
416		memory_set_bank(machine(), "rambank", 0);
	416	membank("rambank")->configure_entries(0, m_ram_bank_count, m_paged_ram, 0x4000);
	417	membank("rambank")->set_entry(0);
417	418	}
418	419
419	420	save_item(NAME(m_kb_counter));

src/mess/drivers/gba.c

r14976	r14977
1946	1946
1947	1947	READ32_MEMBER(gba_state::gba_bios_r)
1948	1948	{
1949		UINT32 *rom = (UINT32 *)(*machine().region("maincpu"));
	1949	UINT32 *rom = (UINT32 *)(*machine().root_device().memregion("maincpu"));
1950	1950	if (m_bios_protected != 0)
1951	1951	{
1952	1952	offset = (m_bios_last_address + 8) / 4;
r14976	r14977
2930	2930	static UINT32 gba_fix_wrong_chip(running_machine &machine, UINT32 cart_size, UINT32 chip)
2931	2931	{
2932	2932	char game_code[5] = { 0 };
2933		UINT8 *ROM = machine.region("cartridge")->base();
	2933	UINT8 *ROM = machine.root_device().memregion("cartridge")->base();
2934	2934
2935	2935	if (cart_size >= 0xAC + 4)
2936	2936	{
r14976	r14977
3012	3012
3013	3013	static DEVICE_IMAGE_LOAD( gba_cart )
3014	3014	{
3015		UINT8 *ROM = image.device().machine().region("cartridge")->base();
	3015	UINT8 *ROM = image.device().machine().root_device().memregion("cartridge")->base();
3016	3016	UINT32 cart_size;
3017	3017	UINT32 chip = 0;
3018	3018	gba_state *state = image.device().machine().driver_data<gba_state>();

src/mess/drivers/vixen.c

r14976	r14977
91	91	{
92	92	logerror("CTL %u\n", data);
93	93
94		memory_set_bank(machine(), "bank3", BIT(data, 0));
	94	membank("bank3")->set_entry(BIT(data, 0));
95	95	}
96	96
97	97
r14976	r14977
412	412	void vixen_state::video_start()
413	413	{
414	414	// find memory regions
415		m_sync_rom = machine().region("video")->base();
416		m_char_rom = machine().region("chargen")->base();
	415	m_sync_rom = memregion("video")->base();
	416	m_char_rom = memregion("chargen")->base();
417	417
418	418	// register for state saving
419	419	save_item(NAME(m_alt));
r14976	r14977
783	783	// configure memory banking
784	784	UINT8 *ram = m_ram->pointer();
785	785
786		memory_configure_bank(machine(), "bank1", 0, 1, ram, 0);
787		memory_configure_bank(machine(), "bank1", 1, 1, machine().region(Z8400A_TAG)->base(), 0);
	786	membank("bank1")->configure_entry(0, ram);
	787	membank("bank1")->configure_entry(1, memregion(Z8400A_TAG)->base());
788	788
789		memory_configure_bank(machine(), "bank2", 0, 1, ram, 0);
790		memory_configure_bank(machine(), "bank2", 1, 1, m_video_ram, 0);
	789	membank("bank2")->configure_entry(0, ram);
	790	membank("bank2")->configure_entry(1, m_video_ram);
791	791
792		memory_configure_bank(machine(), "bank3", 0, 1, m_video_ram, 0);
793		memory_configure_bank(machine(), "bank3", 1, 1, machine().region(Z8400A_TAG)->base(), 0);
	792	membank("bank3")->configure_entry(0, m_video_ram);
	793	membank("bank3")->configure_entry(1, memregion(Z8400A_TAG)->base());
794	794
795		memory_configure_bank(machine(), "bank4", 0, 1, m_video_ram, 0);
	795	membank("bank4")->configure_entry(0, m_video_ram);
796	796
797	797	// register for state saving
798	798	save_item(NAME(m_reset));
r14976	r14977
814	814	program->install_read_bank(0x0000, 0xefff, 0xfff, 0, "bank1");
815	815	program->install_write_bank(0x0000, 0xefff, 0xfff, 0, "bank2");
816	816
817		memory_set_bank(machine(), "bank1", 1);
818		memory_set_bank(machine(), "bank2", 1);
819		memory_set_bank(machine(), "bank3", 1);
	817	membank("bank1")->set_entry(1);
	818	membank("bank2")->set_entry(1);
	819	membank("bank3")->set_entry(1);
820	820
821	821	m_reset = 1;
822	822
r14976	r14977
917	917	program->install_read_bank(0x0000, 0xefff, "bank1");
918	918	program->install_write_bank(0x0000, 0xefff, "bank2");
919	919
920		memory_set_bank(machine, "bank1", 0);
921		memory_set_bank(machine, "bank2", 0);
	920	state->membank("bank1")->set_entry(0);
	921	state->membank("bank2")->set_entry(0);
922	922
923	923	state->m_reset = 0;
924	924	}
925	925
926		direct.explicit_configure(0xf000, 0xffff, 0xfff, machine.region(Z8400A_TAG)->base());
	926	direct.explicit_configure(0xf000, 0xffff, 0xfff, machine.root_device().memregion(Z8400A_TAG)->base());
927	927
928	928	return ~0;
929	929	}

src/mess/drivers/bmjr.c

r14976	r14977
54	54	static VIDEO_START( bmjr )
55	55	{
56	56	bmjr_state *state = machine.driver_data<bmjr_state>();
57		state->m_p_chargen = machine.region("chargen")->base();
	57	state->m_p_chargen = state->memregion("chargen")->base();
58	58	}
59	59
60	60	static SCREEN_UPDATE_IND16( bmjr )

src/mess/drivers/bbcbc.c

r14976	r14977
129	129
130	130	static DEVICE_START( bbcbc_cart )
131	131	{
132		UINT8 *cart = device->machine().region("maincpu" )->base() + 0x4000;
	132	UINT8 *cart = device->machine().root_device().memregion("maincpu" )->base() + 0x4000;
133	133
134	134	memset( cart, 0xFF, 0x8000 );
135	135	}
r14976	r14977
137	137
138	138	static DEVICE_IMAGE_LOAD( bbcbc_cart )
139	139	{
140		UINT8 *cart = image.device().machine().region("maincpu" )->base() + 0x4000;
	140	UINT8 *cart = image.device().machine().root_device().memregion("maincpu" )->base() + 0x4000;
141	141
142	142	if ( image.software_entry() == NULL )
143	143	{

Previous

15994 Revisions

Next

---

© 1998-2018 The MESS Team