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r14945 Monday 16th April, 2012 at 14:18:47 UTC by Miodrag Milanović
removed files not anymore in mame (no whatsnew)
[src/emu]watchdog.c watchdog.h
[src/mame/drivers]stepstag.c wldarrow.c

src/mame/drivers/stepstag.c
r14944r14945
1/*  Jaleco 'Stepping Stage'
2
3*************************************************************************
4 Naibo added:
5
6 A PC computer(Harddisk not dumped yet) + Two 68000 based board set.
7
8 One 68000 drives 3 screens, another handles players input.
9*************************************************************************
10
11 dump is incomplete, these are leftovers from an upgrade
12 music roms are missing at least
13
14 is it a 3 screen game (1 horizontal, 2 vertical) ?
15
16 TODO:
17 - clearly derived from Tetris Plus 2 HW
18 - NVRAM is unchecked
19
20 */
21
22#include "emu.h"
23#include "cpu/m68000/m68000.h"
24#include "rendlay.h"
25#include "stepstag.lh"
26#include "includes/tetrisp2.h"
27#include "machine/nvram.h"
28
29
30class stepstag_state : public tetrisp2_state
31{
32public:
33   stepstag_state(const machine_config &mconfig, device_type type, const char *tag)
34      : tetrisp2_state(mconfig, type, tag) { }
35
36   DECLARE_READ16_MEMBER(stepstag_ip_1_word_r);
37   DECLARE_READ16_MEMBER(unknown_read_0xc00000);
38   DECLARE_READ16_MEMBER(unknown_read_0xd00000);
39   DECLARE_READ16_MEMBER(unknown_read_0xffff00);
40};
41
42READ16_MEMBER(stepstag_state::stepstag_ip_1_word_r)
43{
44   return   ( input_port_read(machine(), "SYSTEM") &  0xfcff ) |
45         (           machine().rand() & ~0xfcff ) |
46         (      1 << (8 + (machine().rand()&1)) );
47}
48
49READ16_MEMBER(stepstag_state::unknown_read_0xc00000)
50{
51   return machine().rand();
52}
53
54READ16_MEMBER(stepstag_state::unknown_read_0xd00000)
55{
56   return machine().rand();
57}
58
59READ16_MEMBER(stepstag_state::unknown_read_0xffff00)
60{
61   return machine().rand();
62}
63
64static ADDRESS_MAP_START( stepstag_map, AS_PROGRAM, 16, stepstag_state )
65   AM_RANGE(0x000000, 0x0fffff) AM_ROM
66   AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram")         // Object RAM
67   AM_RANGE(0x104000, 0x107fff) AM_RAM                                             // Spare Object RAM
68   AM_RANGE(0x108000, 0x10ffff) AM_RAM                                             // Work RAM
69   AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff)      // Priority
70   AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_SHARE("paletteram")      // Palette
71   AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(tetrisp2_vram_fg_w) AM_BASE(m_vram_fg)   // Foreground
72   AM_RANGE(0x404000, 0x407fff) AM_RAM_WRITE(tetrisp2_vram_bg_w) AM_BASE(m_vram_bg)   // Background
73   AM_RANGE(0x408000, 0x409fff) AM_RAM                                             // ???
74   AM_RANGE(0x500000, 0x50ffff) AM_RAM                                             // Line
75   AM_RANGE(0x600000, 0x60ffff) AM_RAM_WRITE(tetrisp2_vram_rot_w) AM_BASE(m_vram_rot)   // Rotation
76   AM_RANGE(0x900000, 0x903fff) AM_READWRITE(tetrisp2_nvram_r, tetrisp2_nvram_w) AM_BASE(m_nvram) AM_SHARE("nvram")   // NVRAM
77   AM_RANGE(0x904000, 0x907fff) AM_READWRITE(tetrisp2_nvram_r, tetrisp2_nvram_w)            // NVRAM (mirror)
78//  AM_RANGE(0xa00000, 0xa7ffff) AM_READ(unknown_read_0xc00000 ) // presumably comms with slave CPU
79   AM_RANGE(0xb00000, 0xb00001) AM_WRITENOP                        // Coin Counter plus other things
80   AM_RANGE(0xb20000, 0xb20001) AM_WRITENOP                                       // protection related?
81   AM_RANGE(0xb40000, 0xb4000b) AM_WRITEONLY AM_BASE(m_scroll_fg)                  // Foreground Scrolling
82   AM_RANGE(0xb40010, 0xb4001b) AM_WRITEONLY AM_BASE(m_scroll_bg)                  // Background Scrolling
83   AM_RANGE(0xb4003e, 0xb4003f) AM_WRITENOP                                       // scr_size
84   AM_RANGE(0xb60000, 0xb6002f) AM_WRITEONLY AM_BASE(m_rotregs)                  // Rotation Registers
85   AM_RANGE(0xba0000, 0xba001f) AM_WRITE(tetrisp2_systemregs_w)                        // system param
86   AM_RANGE(0xba001e, 0xba001f) AM_WRITENOP                                       // Lev 2 irq ack
87   AM_RANGE(0xbe0002, 0xbe0003) AM_READ_PORT("PLAYERS")                              // Inputs
88   AM_RANGE(0xbe0004, 0xbe0005) AM_READ(stepstag_ip_1_word_r)                           // Inputs & protection
89   AM_RANGE(0xbe0008, 0xbe0009) AM_READ_PORT("DSW")                                 // Inputs
90   AM_RANGE(0xbe000a, 0xbe000b) AM_READNOP //watchdog
91ADDRESS_MAP_END
92
93
94
95
96static ADDRESS_MAP_START( stepstag_sub_map, AS_PROGRAM, 16, stepstag_state )
97   AM_RANGE(0x000000, 0x0fffff) AM_ROM
98   AM_RANGE(0x200000, 0x20ffff) AM_RAM
99
100   AM_RANGE(0x300000, 0x33ffff) AM_RAM
101
102   AM_RANGE(0x400000, 0x43ffff) AM_RAM
103
104   AM_RANGE(0x500000, 0x53ffff) AM_RAM
105
106   AM_RANGE(0x700000, 0x700001) AM_WRITENOP //??
107   AM_RANGE(0x700002, 0x700003) AM_WRITENOP //??
108   AM_RANGE(0x700004, 0x700005) AM_WRITENOP //??
109   AM_RANGE(0x700006, 0x700007) AM_WRITENOP //??
110
111   AM_RANGE(0x800000, 0x87ffff) AM_RAM
112   AM_RANGE(0x880000, 0x880001) AM_WRITENOP //??
113   AM_RANGE(0x900000, 0x97ffff) AM_RAM
114   AM_RANGE(0x980000, 0x980001) AM_WRITENOP //??
115   AM_RANGE(0xa00000, 0xa7ffff) AM_RAM
116   AM_RANGE(0xa80000, 0xa80001) AM_WRITENOP //??
117   AM_RANGE(0xc00000, 0xc00001) AM_READ(unknown_read_0xc00000) AM_WRITENOP //??
118   AM_RANGE(0xd00000, 0xd00001) AM_READ(unknown_read_0xd00000)
119   AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP //??
120   AM_RANGE(0xffff00, 0xffff01) AM_READ(unknown_read_0xffff00)
121ADDRESS_MAP_END
122
123/* TODO: inputs are copied from Tetris Plus 2, they needs to be changed accordingly */
124static INPUT_PORTS_START( stepstag )
125   PORT_START("PLAYERS") /*$be0002.w*/
126   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
127   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
128   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
129   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
130   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
131   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
132   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
133   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
134   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
135   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
136   PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
137   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
138   PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
139   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
140   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
141   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
142
143   PORT_START("SYSTEM") /*$be0004.w*/
144   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
145   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
146   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_START1 )
147   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2   )
148   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
149   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE1 )
150   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN1 )
151   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN2 )
152   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_SPECIAL  )   /* ?*/
153   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SPECIAL  )   /* ?*/
154   PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
155   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
156   PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
157   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
158   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
159   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
160
161   PORT_START("DSW") //$be0008.w
162   PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
163   PORT_DIPSETTING(      0x0000, DEF_STR( 5C_1C ) )
164   PORT_DIPSETTING(      0x0001, DEF_STR( 4C_1C ) )
165   PORT_DIPSETTING(      0x0002, DEF_STR( 3C_1C ) )
166   PORT_DIPSETTING(      0x0003, DEF_STR( 2C_1C ) )
167   PORT_DIPSETTING(      0x0007, DEF_STR( 1C_1C ) )
168   PORT_DIPSETTING(      0x0006, DEF_STR( 1C_2C ) )
169   PORT_DIPSETTING(      0x0005, DEF_STR( 1C_3C ) )
170   PORT_DIPSETTING(      0x0004, DEF_STR( 1C_4C ) )
171   PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5,6")
172   PORT_DIPSETTING(      0x0000, DEF_STR( 5C_1C ) )
173   PORT_DIPSETTING(      0x0008, DEF_STR( 4C_1C ) )
174   PORT_DIPSETTING(      0x0010, DEF_STR( 3C_1C ) )
175   PORT_DIPSETTING(      0x0018, DEF_STR( 2C_1C ) )
176   PORT_DIPSETTING(      0x0038, DEF_STR( 1C_1C ) )
177   PORT_DIPSETTING(      0x0030, DEF_STR( 1C_2C ) )
178   PORT_DIPSETTING(      0x0028, DEF_STR( 1C_3C ) )
179   PORT_DIPSETTING(      0x0020, DEF_STR( 1C_4C ) )
180   PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:7")
181   PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
182   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
183   PORT_SERVICE_DIPLOC(  0x0080, IP_ACTIVE_LOW, "SW1:8" )
184   PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
185   PORT_DIPSETTING(      0x0000, DEF_STR( Easy ) )
186   PORT_DIPSETTING(      0x0300, DEF_STR( Normal ) )
187   PORT_DIPSETTING(      0x0100, DEF_STR( Hard ) )
188   PORT_DIPSETTING(      0x0200, DEF_STR( Hardest ) )
189   PORT_DIPNAME( 0x0400, 0x0400, "Vs Mode Rounds" ) PORT_DIPLOCATION("SW2:3")
190   PORT_DIPSETTING(      0x0000, "1" )
191   PORT_DIPSETTING(      0x0400, "3" )
192   PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:4")
193   PORT_DIPSETTING(      0x0800, DEF_STR( Japanese ) )
194   PORT_DIPSETTING(      0x0000, DEF_STR( English ) )
195   PORT_DIPNAME( 0x1000, 0x1000, "F.B.I Logo" ) PORT_DIPLOCATION("SW2:5")
196   PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
197   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
198   PORT_DIPNAME( 0x2000, 0x2000, "Voice" ) PORT_DIPLOCATION("SW2:6")
199   PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
200   PORT_DIPSETTING(      0x2000, DEF_STR( On ) )
201   PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
202   PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
203   PORT_DIPSETTING(      0x4000, DEF_STR( On ) )
204   PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
205   PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
206   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
207INPUT_PORTS_END
208
209/* 8x8x8 tiles */
210static const gfx_layout layout_8x8x8 =
211{
212   8,8,
213   RGN_FRAC(1,1),
214   8,
215   { STEP8(0,1) },
216   { STEP8(0,8) },
217   { STEP8(0,8*8) },
218   8*8*8
219};
220
221/* sprites are contained in 256x256 "tiles" */
222static GFXLAYOUT_RAW( spritelayout, 256, 256, 256*8, 256*256*8 )
223
224
225static GFXDECODE_START( stepstag )
226   GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0x0000, 0x10 ) // [0] Sprites
227   GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x8, 0x1000, 0x10 ) // [1] Background
228   GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x8, 0x2000, 0x10 ) // [2] Rotation
229   GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x8, 0x6000, 0x10 ) // [3] Foreground
230   GFXDECODE_ENTRY( "gfx5", 0, layout_8x8x8, 0x0000, 0x10 ) // [0] Sprites
231   GFXDECODE_ENTRY( "gfx6", 0, layout_8x8x8, 0x1000, 0x10 ) // [1] Background
232   GFXDECODE_ENTRY( "gfx7", 0, layout_8x8x8, 0x2000, 0x10 ) // [2] Rotation
233   GFXDECODE_ENTRY( "gfx8", 0, layout_8x8x8, 0x6000, 0x10 ) // [3] Foreground
234GFXDECODE_END
235
236static SCREEN_UPDATE_IND16( stepstag )
237{
238   return 0;
239}
240
241static MACHINE_CONFIG_START( stepstag, stepstag_state )
242   /* basic machine hardware */
243   MCFG_CPU_ADD("maincpu", M68000, 16000000 ) //??
244   MCFG_CPU_PROGRAM_MAP(stepstag_map)
245   MCFG_CPU_VBLANK_INT("screen", irq2_line_hold)
246
247   MCFG_CPU_ADD("sub", M68000, 16000000 ) //??
248   MCFG_CPU_PROGRAM_MAP(stepstag_sub_map)
249   MCFG_CPU_VBLANK_INT("screen", irq4_line_hold) // 4 & 6 valid
250
251   MCFG_NVRAM_ADD_0FILL("nvram")
252
253   /* video hardware */
254   MCFG_SCREEN_ADD("lscreen", RASTER)
255   MCFG_SCREEN_REFRESH_RATE(60)
256   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
257   MCFG_SCREEN_SIZE(64*8, 32*8)
258   MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1)
259   MCFG_SCREEN_UPDATE_STATIC(stepstag)
260
261   MCFG_SCREEN_ADD("screen", RASTER)
262   MCFG_SCREEN_REFRESH_RATE(60)
263   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
264   MCFG_SCREEN_SIZE(0x140, 0xe0)
265   MCFG_SCREEN_VISIBLE_AREA(0, 0x140-1, 0, 0xe0-1)
266   MCFG_SCREEN_UPDATE_STATIC(tetrisp2)
267
268   MCFG_SCREEN_ADD("rscreen", RASTER)
269   MCFG_SCREEN_REFRESH_RATE(60)
270   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
271   MCFG_SCREEN_SIZE(64*8, 32*8)
272   MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1)
273   MCFG_SCREEN_UPDATE_STATIC(stepstag)
274
275   MCFG_PALETTE_LENGTH(0x8000)
276
277   MCFG_VIDEO_START(tetrisp2)
278   MCFG_GFXDECODE(stepstag)
279
280   MCFG_DEFAULT_LAYOUT(layout_stepstag)
281MACHINE_CONFIG_END
282
283
284ROM_START( stepstag )
285   ROM_REGION( 0x100000, "maincpu", 0 ) /* 68k */
286   ROM_LOAD16_BYTE( "vj98344ver11.1", 0x00001, 0x80000, CRC(aedcb225) SHA1(f167c390e79ffbf7c019c326384ae656ae8b7d13) )
287   ROM_LOAD16_BYTE( "vj98344ver11.4", 0x00000, 0x80000, CRC(391ca913) SHA1(2cc329aa6419f8a0d7e0fb8a9f4c2b8ca25197b3) )
288
289   ROM_REGION( 0x100000, "sub", 0 ) /* 68k */
290   ROM_LOAD16_BYTE( "vj98348ver11.11", 0x00000, 0x80000, CRC(29b7f848) SHA1(c4d89e5c9be622b2d9038c359a5f65ce0dd461b0) )
291   ROM_LOAD16_BYTE( "vj98348ver11.14", 0x00001, 0x80000, CRC(e3314c6c) SHA1(61b0e9f9d0126d9f475304866a03cfa21701d9aa) )
292
293   ROM_REGION( 0x400000, "gfx1", 0 ) /* sprites, TRUSTED */
294   ROM_LOAD( "mr99001-06", 0x00000, 0x400000, CRC(cfa27c93) SHA1(a0837877736e8e898f3acc64bc87ee0cc4d9f243) )
295
296   ROM_REGION( 0x400000, "gfx2", 0 ) /* */
297   ROM_LOAD( "mr99001-03", 0x00000, 0x400000, CRC(40fee0df) SHA1(94c3567e82f8039b3169bf4dcb1fcd9e39c6eb27) )
298
299   ROM_REGION( 0x400000, "gfx3", 0 ) /* */
300   ROM_LOAD( "mr99001-04", 0x00000, 0x400000, CRC(d6837981) SHA1(56709d73304f0b186c70844ae96f73400b541609) )
301
302   ROM_REGION( 0x400000, "gfx4", 0 ) /* FG tiles, TRUSTED */
303   ROM_LOAD( "mr99001-05", 0x00000, 0x400000, CRC(3958473b) SHA1(12279a587263290945744b22aafb80460eea77f7) )
304
305   ROM_REGION( 0x400000, "gfx5", 0 ) /* vertical screen rom */
306   ROM_LOAD( "mr99001-02", 0x00000, 0x400000, CRC(12c65d86) SHA1(7fe5853fa3ba086f8da15702b126eb13c6ea30a9) )
307
308   ROM_REGION( 0x800000, "gfx6", 0 ) /* vertical screen roms */
309   ROM_LOAD( "mr99001-01", 0x00000, 0x400000,  CRC(aa92cebf) SHA1(2ccc0d2ef9bc92c27f0a625819154bbcf9cfde0c) )
310   ROM_LOAD( "s.s.s._vj-98348_3_pr99021-01", 0x400000, 0x400000, CRC(e0fbc6f1) SHA1(7ca4507702f3f81bb9de3f9b5d270d379e439633) )
311
312   ROM_REGION( 0x400000, "gfx7", 0 ) /* */
313   ROM_LOAD( "s.s.s._vj-98348_19_pr99021-02", 0x00000, 0x400000, CRC(2d98da1a) SHA1(b09375fa1b4b2e0794632d6e237459009f40310d) )
314
315   ROM_REGION( 0x400000, "gfx8", 0 ) /* */
316   ROM_LOAD( "s.s.s._vj-98348_26_pr99021-01", 0x000000, 0x400000, CRC(fefb3777) SHA1(df624e105ab1dea52317e318ad29caa02b900788) )
317
318   DISK_REGION( "disks" )
319   DISK_IMAGE("stepstag", 0, NO_DUMP)
320ROM_END
321
322ROM_START( step3 )
323ROM_REGION( 0x100000, "maincpu", 0 ) /* 68k */
324   ROM_LOAD16_BYTE( "vj98344ver11.1", 0x00001, 0x80000, NO_DUMP )
325   ROM_LOAD16_BYTE( "vj98344ver11.4", 0x00000, 0x80000, NO_DUMP )
326   // c'est la programme de stepstag (avoir besoin de modifications, numero de chansons par example)
327
328   ROM_REGION( 0x100000, "sub", 0 ) /* 68k */
329   ROM_LOAD16_BYTE( "vj98348_step3_11_v1.1", 0x00000, 0x80000, CRC(9c36aef5) SHA1(bbac48c2c7949a6f8a6ec83515e94a343c88d1b6) )
330   ROM_LOAD16_BYTE( "vj98348_step3_14_v1.1", 0x00001, 0x80000, CRC(b86be557) SHA1(49dbd6ef1c50adcf3386d5423da8ae7685649c46) )
331
332   ROM_REGION( 0x1000000, "gfx1", 0 ) /* */
333   ROM_LOAD( "mr9930-01.ic2", 0x000000, 0x400000, CRC(9e3e054e) SHA1(06a4fa76cb83dbe9d565d5ccd0a5ecc5067887c9) )
334
335   ROM_REGION( 0x1000000, "gfx2", 0 ) /* */
336   ROM_LOAD( "mr9930-02.ic3", 0x000000, 0x400000, CRC(b23c29f4) SHA1(a7b10a3a9af43db319baf8633bb3728120960923) )
337
338   ROM_REGION( 0x1000000, "gfx3", 0 ) /* */
339   ROM_LOAD( "mr9930-03.ic4", 0x000000, 0x400000, CRC(9a5d070f) SHA1(b4668b4f299033140a2c56499cc2712ba111cb57) )
340
341   ROM_REGION( 0x1000000, "gfx4", 0 ) /* screen centre */
342   ROM_LOAD( "mr99030-04.ic17", 0x000000, 0x400000, CRC(3eac3591) SHA1(3b294e94af23fd92fdf51d2c9c43f60d2ebd1688) )
343
344   ROM_REGION( 0x1000000, "gfx5", 0 ) /* */
345   ROM_LOAD( "mr99030-05.ic18", 0x000000, 0x400000, CRC(dea7b8d6) SHA1(d7d98675eb3998a8057929f90aa340c1e5f6a617) )
346
347   ROM_REGION( 0x1000000, "gfx6", 0 ) /* */
348   ROM_LOAD( "mr99030-06.ic19", 0x000000, 0x400000, CRC(71489d79) SHA1(0398a354c2588e3974cb76a331e46165db6af06d) )
349
350   ROM_REGION( 0x1000000, "gfx7", 0 ) /* */
351   ROM_LOAD( "mr9930-01.ic30", 0x000000, 0x400000, CRC(9e3e054e) SHA1(06a4fa76cb83dbe9d565d5ccd0a5ecc5067887c9) )
352   ROM_LOAD( "mr9930-02.ic29", 0x400000, 0x400000, CRC(b23c29f4) SHA1(a7b10a3a9af43db319baf8633bb3728120960923) )
353   ROM_LOAD( "mr9930-03.ic28", 0x800000, 0x400000, CRC(9a5d070f) SHA1(b4668b4f299033140a2c56499cc2712ba111cb57) )
354
355   ROM_REGION( 0x1000000, "gfx8", 0 ) /* */
356   ROM_LOAD( "vj98348_step3_4_v1.1", 0x000000, 0x400000, CRC(dec612df) SHA1(acb86bb90c1cc61c7db3e022c69a5ff0611ffbae) )
357   ROM_LOAD( "vj98348_step3_18_v1.1", 0x400000, 0x400000, CRC(bc92f0a0) SHA1(49c08de7a898a27972d4209709ddf447c5dca36a) )
358   ROM_LOAD( "vj98348_step3_25_v1.1", 0x800000, 0x400000, CRC(dec612df) SHA1(acb86bb90c1cc61c7db3e022c69a5ff0611ffbae) )
359
360   DISK_REGION( "disks" )
361   DISK_IMAGE("step3", 0, NO_DUMP)
362ROM_END
363
364//GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage", GAME_NO_SOUND| GAME_NOT_WORKING)    // Original Game
365GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage Special", GAME_NO_SOUND| GAME_NOT_WORKING)
366//GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage 2 Supreme", GAME_NO_SOUND| GAME_NOT_WORKING)
367GAME( 1999, step3, 0,   stepstag, stepstag, 0,   ROT0, "Jaleco", "Stepping 3 Superior", GAME_NO_SOUND| GAME_NOT_WORKING)
src/mame/drivers/wldarrow.c
r14944r14945
1/******************************************************
2
3 Wild Arrow - Meyco Games 1982
4
5 Preliminary driver by
6        Tomasz Slanina
7        Pierpaolo Prazzoli
8
9 Wild Arrow (c) 1982 Meyco Games
10 CPU: 8080A
11 RAM: 411A (x48)
12 XTal: 20.0
13
14*******************************************************
15
16To initialize battery RAM, go into testmode (F1 -> F2),
17and then press the Reset Counters button.
18
19If a game is not turned off properly, eg. exiting MAME
20in mid-game, it may run faulty on the next boot.
21Enable the Night Switch to prevent this.
22
23
24TODO:
25- improve inputs and lamp outputs
26
27*******************************************************/
28
29#include "emu.h"
30#include "cpu/i8085/i8085.h"
31#include "sound/dac.h"
32#include "machine/nvram.h"
33
34
35class wldarrow_state : public driver_device
36{
37public:
38   wldarrow_state(const machine_config &mconfig, device_type type, const char *tag)
39      : driver_device(mconfig, type, tag) ,
40      m_videoram_0(*this, "videoram_0"),
41      m_videoram_1(*this, "videora1"),
42      m_videoram_2(*this, "videora2"){ }
43
44   required_shared_ptr<UINT8> m_videoram_0;
45   required_shared_ptr<UINT8> m_videoram_1;
46   required_shared_ptr<UINT8> m_videoram_2;
47   DECLARE_WRITE8_MEMBER(lights_1_w);
48   DECLARE_WRITE8_MEMBER(lights_2_w);
49   DECLARE_WRITE8_MEMBER(counter_w);
50};
51
52
53#define NUM_PENS   (8)
54
55
56/*************************************
57 *
58 *  Video system
59 *
60 *************************************/
61
62static void get_pens(pen_t *pens)
63{
64   offs_t i;
65
66   for (i = 0; i < NUM_PENS; i++)
67   {
68      pens[i] = MAKE_RGB(pal1bit(i >> 2), pal1bit(i >> 1), pal1bit(i >> 0));
69   }
70}
71
72
73static SCREEN_UPDATE_RGB32( wldarrow )
74{
75   wldarrow_state *state = screen.machine().driver_data<wldarrow_state>();
76   pen_t pens[NUM_PENS];
77   offs_t offs;
78
79   get_pens(pens);
80
81   for (offs = 0; offs < state->m_videoram_0.bytes(); offs++)
82   {
83      int i;
84
85      UINT8 y = offs >> 5;
86      UINT8 x = offs << 3;
87
88      UINT8 data0 = state->m_videoram_0[offs];
89      UINT8 data1 = state->m_videoram_1[offs];
90      UINT8 data2 = state->m_videoram_2[offs];
91
92      /* weird equations, but it matches every flyer screenshot -
93           perhaphs they used a look-up PROM? */
94      UINT8 data_r = data0;
95      UINT8 data_g = (data2 & ~data0) | (data2 & data1) | (~data2 & ~data1 & data0);
96      UINT8 data_b = data0 ^ data1;
97
98      for (i = 0; i < 8; i++)
99      {
100         UINT8 color = ((data_r >> 5) & 0x04) |
101                    ((data_g >> 6) & 0x02) |
102                    ((data_b >> 7) & 0x01);
103
104         bitmap.pix32(y, x) = pens[color];
105
106         data_r = data_r << 1;
107         data_g = data_g << 1;
108         data_b = data_b << 1;
109
110         x = x + 1;
111      }
112   }
113
114   return 0;
115}
116
117
118
119/*************************************
120 *
121 *  Lights and coin counter
122 *
123 *************************************/
124
125WRITE8_MEMBER(wldarrow_state::lights_1_w)
126{
127   /* not sure how it is hooked up */
128}
129
130
131WRITE8_MEMBER(wldarrow_state::lights_2_w)
132{
133   /* not sure how it is hooked up */
134}
135
136
137WRITE8_MEMBER(wldarrow_state::counter_w)
138{
139   coin_counter_w(machine(), 0, data);
140}
141
142
143
144/*************************************
145 *
146 *  Audio system - this is a guess
147 *
148 *  The software repeatedly writes to
149 *  either f000/f0ff or f00f/f0f0,
150 *  so I suspect that A3/A4 have
151 *  meaning.
152 *
153 *************************************/
154
155static WRITE8_DEVICE_HANDLER( wldarrow_dac_1_w )
156{
157   dac_data_w(device, 0x00);
158}
159
160
161static WRITE8_DEVICE_HANDLER( wldarrow_dac_2_w )
162{
163   dac_data_w(device, 0x55);
164}
165
166
167static WRITE8_DEVICE_HANDLER( wldarrow_dac_3_w )
168{
169   dac_data_w(device, 0xaa);
170}
171
172
173static WRITE8_DEVICE_HANDLER( wldarrow_dac_4_w )
174{
175   dac_data_w(device, 0xff);
176}
177
178
179
180/*************************************
181 *
182 *  Memory handlers
183 *
184 *************************************/
185
186static ADDRESS_MAP_START( wldarrow_map, AS_PROGRAM, 8, wldarrow_state )
187   AM_RANGE(0x0000, 0x37ff) AM_ROM
188   AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0")
189   AM_RANGE(0x4000, 0x5fff) AM_RAM AM_SHARE("videora0")
190   AM_RANGE(0x6000, 0x7fff) AM_RAM AM_SHARE("videora1")
191   AM_RANGE(0x8000, 0x9fff) AM_RAM AM_SHARE("videora2")
192   AM_RANGE(0xcd00, 0xcdff) AM_RAM AM_SHARE("nvram")
193   AM_RANGE(0xf000, 0xf000) AM_READ_PORT("BITSW") AM_DEVWRITE_LEGACY("dac", wldarrow_dac_1_w)
194   AM_RANGE(0xf004, 0xf004) AM_READ_PORT("IN1") AM_WRITE(lights_1_w)
195   AM_RANGE(0xf006, 0xf006) AM_READ_PORT("IN2") AM_WRITE(lights_2_w)
196   AM_RANGE(0xf008, 0xf008) AM_WRITE(counter_w)
197   AM_RANGE(0xf00f, 0xf00f) AM_DEVWRITE_LEGACY("dac", wldarrow_dac_2_w)
198   AM_RANGE(0xf0f0, 0xf0f0) AM_DEVWRITE_LEGACY("dac", wldarrow_dac_3_w)
199   AM_RANGE(0xf0ff, 0xf0ff) AM_DEVWRITE_LEGACY("dac", wldarrow_dac_4_w)
200ADDRESS_MAP_END
201
202
203
204/*************************************
205 *
206 *  Port definitions
207 *
208 *************************************/
209
210static INPUT_PORTS_START( wldarrow )
211   PORT_START("IN0")
212   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
213   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
214   PORT_DIPNAME( 0x04, 0x00, "Monitor" )
215   PORT_DIPSETTING(    0x00, "Color" )
216   PORT_DIPSETTING(    0x04, "B/W" )
217   PORT_DIPNAME( 0x08, 0x08, "0-3" )
218   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
219   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
220   PORT_DIPNAME( 0x10, 0x10, "0-4" )
221   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
222   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
223   PORT_DIPNAME( 0x20, 0x20, "0-5" )
224   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
225   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
226   PORT_DIPNAME( 0x40, 0x40, "0-6" )
227   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
228   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
229   PORT_DIPNAME( 0x80, 0x80, "0-7" )
230   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
231   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
232
233   PORT_START("BITSW")
234   PORT_DIPNAME( 0x01, 0x00, "Bit Switch 1" )      PORT_DIPLOCATION("BITSWITCH:1")
235   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
236   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
237   PORT_DIPNAME( 0x02, 0x00, "Bit Switch 2" )      PORT_DIPLOCATION("BITSWITCH:2")
238   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
239   PORT_DIPSETTING(    0x02, DEF_STR( On ) )
240   PORT_DIPNAME( 0x04, 0x00, "Bit Switch 3" )      PORT_DIPLOCATION("BITSWITCH:3")
241   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
242   PORT_DIPSETTING(    0x04, DEF_STR( On ) )
243   PORT_DIPNAME( 0x08, 0x00, "Bit Switch 4" )      PORT_DIPLOCATION("BITSWITCH:4")
244   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
245   PORT_DIPSETTING(    0x08, DEF_STR( On ) )
246   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Coinage ) )   PORT_DIPLOCATION("BITSWITCH:5")
247   PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
248   PORT_DIPSETTING(    0x10, DEF_STR( 1C_5C ) )
249   PORT_DIPNAME( 0x20, 0x00, "Bit Switch 6" )      PORT_DIPLOCATION("BITSWITCH:6")
250   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
251   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
252   PORT_DIPNAME( 0x40, 0x00, "Bit Switch 7" )      PORT_DIPLOCATION("BITSWITCH:7")
253   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
254   PORT_DIPSETTING(    0x40, DEF_STR( On ) )
255   PORT_DIPNAME( 0x80, 0x00, "Bit Switch 8" )      PORT_DIPLOCATION("BITSWITCH:8")
256   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
257   PORT_DIPSETTING(    0x80, DEF_STR( On ) )
258
259   PORT_START("IN1")
260   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Stop Reel 3") /* Skill Stop only? */
261   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Stop Reel 2") /* Skill Stop only? */
262   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Stop Reel 1") /* Skill Stop only? */
263   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Spin")
264   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Bet")
265   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset Counters")
266   PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
267   PORT_DIPNAME( 0x80, 0x80, "Night Switch" ) PORT_CODE(KEYCODE_F1) PORT_TOGGLE
268   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
269   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
270
271   PORT_START("IN2")
272   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN)
273INPUT_PORTS_END
274
275
276static INPUT_PORTS_START( mdrawpkr )
277   PORT_START("IN0")
278   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
279   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
280   PORT_DIPNAME( 0x04, 0x04, "0-2" )
281   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
282   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
283   PORT_DIPNAME( 0x08, 0x08, "0-3" )
284   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
285   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
286   PORT_DIPNAME( 0x10, 0x10, "0-4" )
287   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
288   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
289   PORT_DIPNAME( 0x20, 0x20, "0-5" )
290   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
291   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
292   PORT_DIPNAME( 0x40, 0x40, "0-6" )
293   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
294   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
295   PORT_DIPNAME( 0x80, 0x80, "0-7" )
296   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
297   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
298
299   PORT_START("BITSW")
300   PORT_DIPNAME( 0x01, 0x00, "Bit Switch 1" )      PORT_DIPLOCATION("BITSWITCH:1")
301   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
302   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
303   PORT_DIPNAME( 0x02, 0x00, "Bit Switch 2" )      PORT_DIPLOCATION("BITSWITCH:2")
304   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
305   PORT_DIPSETTING(    0x02, DEF_STR( On ) )
306   PORT_DIPNAME( 0x04, 0x00, "Bit Switch 3" )      PORT_DIPLOCATION("BITSWITCH:3")
307   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
308   PORT_DIPSETTING(    0x04, DEF_STR( On ) )
309   PORT_DIPNAME( 0x08, 0x00, "Bit Switch 4" )      PORT_DIPLOCATION("BITSWITCH:4")
310   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
311   PORT_DIPSETTING(    0x08, DEF_STR( On ) )
312   PORT_DIPNAME( 0x10, 0x00, "Bit Switch 5" )      PORT_DIPLOCATION("BITSWITCH:5")
313   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
314   PORT_DIPSETTING(    0x10, DEF_STR( On ) )
315   PORT_DIPNAME( 0x20, 0x00, "Bit Switch 6" )      PORT_DIPLOCATION("BITSWITCH:6")
316   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
317   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
318   PORT_DIPNAME( 0x40, 0x00, "Bit Switch 7" )      PORT_DIPLOCATION("BITSWITCH:7")
319   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
320   PORT_DIPSETTING(    0x40, DEF_STR( On ) )
321   PORT_DIPNAME( 0x80, 0x00, "Bit Switch 8" )      PORT_DIPLOCATION("BITSWITCH:8")
322   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
323   PORT_DIPSETTING(    0x80, DEF_STR( On ) )
324
325   PORT_START("IN1")
326   PORT_DIPNAME( 0x01, 0x01, "2-0" )
327   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
328   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
329   PORT_DIPNAME( 0x02, 0x02, "2-1" )
330   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
331   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
332   PORT_DIPNAME( 0x04, 0x04, "2-2 BET" )
333   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
334   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
335   PORT_DIPNAME( 0x08, 0x08, "2-3" )
336   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
337   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
338   PORT_DIPNAME( 0x10, 0x10, "2-4" )
339   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
340   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
341   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset Counters")
342   PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
343   PORT_DIPNAME( 0x80, 0x80, "Night Switch" ) PORT_CODE(KEYCODE_F1) PORT_TOGGLE
344   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
345   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
346
347   PORT_START("IN2")
348   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN)
349INPUT_PORTS_END
350
351
352static INPUT_PORTS_START( unkmeyco )
353   PORT_START("IN0")
354   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
355   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
356   PORT_DIPNAME( 0x04, 0x04, "0-2" )
357   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
358   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
359   PORT_DIPNAME( 0x08, 0x08, "0-3" )
360   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
361   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
362   PORT_DIPNAME( 0x10, 0x10, "0-4" )
363   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
364   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
365   PORT_DIPNAME( 0x20, 0x20, "0-5" )
366   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
367   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
368   PORT_DIPNAME( 0x40, 0x40, "0-6" )
369   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
370   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
371   PORT_DIPNAME( 0x80, 0x80, "0-7" )
372   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
373   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
374
375   PORT_START("BITSW")
376   PORT_DIPNAME( 0x01, 0x00, "Bit Switch 1" )      PORT_DIPLOCATION("BITSWITCH:1")
377   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
378   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
379   PORT_DIPNAME( 0x02, 0x00, "Bit Switch 2" )      PORT_DIPLOCATION("BITSWITCH:2")
380   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
381   PORT_DIPSETTING(    0x02, DEF_STR( On ) )
382   PORT_DIPNAME( 0x04, 0x00, "Bit Switch 3" )      PORT_DIPLOCATION("BITSWITCH:3")
383   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
384   PORT_DIPSETTING(    0x04, DEF_STR( On ) )
385   PORT_DIPNAME( 0x08, 0x00, "Bit Switch 4" )      PORT_DIPLOCATION("BITSWITCH:4")
386   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
387   PORT_DIPSETTING(    0x08, DEF_STR( On ) )
388   PORT_DIPNAME( 0x10, 0x00, "Bit Switch 5" )      PORT_DIPLOCATION("BITSWITCH:5")
389   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
390   PORT_DIPSETTING(    0x10, DEF_STR( On ) )
391   PORT_DIPNAME( 0x20, 0x00, "Bit Switch 6" )      PORT_DIPLOCATION("BITSWITCH:6")
392   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
393   PORT_DIPSETTING(    0x20, DEF_STR( On ) )
394   PORT_DIPNAME( 0x40, 0x00, "Bit Switch 7" )      PORT_DIPLOCATION("BITSWITCH:7")
395   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
396   PORT_DIPSETTING(    0x40, DEF_STR( On ) )
397   PORT_DIPNAME( 0x80, 0x00, "Bit Switch 8" )      PORT_DIPLOCATION("BITSWITCH:8")
398   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
399   PORT_DIPSETTING(    0x80, DEF_STR( On ) )
400
401   PORT_START("IN1")
402   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Split")
403   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Stand")
404   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Bet")
405   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Hit")
406   PORT_DIPNAME( 0x10, 0x10, "2-4" )
407   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
408   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
409   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset Counters")
410   PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
411   PORT_DIPNAME( 0x80, 0x80, "Night Switch" ) PORT_CODE(KEYCODE_F1) PORT_TOGGLE
412   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
413   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
414
415   PORT_START("IN2")
416   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Insurance")
417   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Surrender")
418   PORT_DIPNAME( 0x04, 0x04, "3-2" )
419   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
420   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
421   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Bonus")
422   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Double Down")
423   PORT_DIPNAME( 0x20, 0x20, "3-5" )
424   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
425   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
426   PORT_DIPNAME( 0x40, 0x40, "3-6" )
427   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
428   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
429   PORT_DIPNAME( 0x80, 0x80, "3-7" )
430   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
431   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
432INPUT_PORTS_END
433
434
435
436/*************************************
437 *
438 *  Machine driver
439 *
440 *************************************/
441
442static MACHINE_CONFIG_START( wldarrow, wldarrow_state )
443
444   /* basic machine hardware */
445   MCFG_CPU_ADD("maincpu", I8080, XTAL_20MHz / 10) // divider guessed
446   MCFG_CPU_PROGRAM_MAP(wldarrow_map)
447
448   MCFG_NVRAM_ADD_0FILL("nvram")
449
450   /* video hardware */
451   MCFG_SCREEN_ADD("screen", RASTER)
452   MCFG_SCREEN_SIZE(256, 256)
453   MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 4*8, 32*8-1)
454   MCFG_SCREEN_REFRESH_RATE(60)
455   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
456   MCFG_SCREEN_UPDATE_STATIC(wldarrow)
457
458   /* audio hardware */
459   MCFG_SPEAKER_STANDARD_MONO("mono")
460   MCFG_SOUND_ADD("dac", DAC, 0)
461   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
462
463MACHINE_CONFIG_END
464
465
466
467/*************************************
468 *
469 *  ROM definition
470 *
471 *************************************/
472
473ROM_START( wldarrow )
474   ROM_REGION( 0x10000, "maincpu", ROMREGION_INVERT )
475   ROM_LOAD( "a1-v48.8k", 0x0000, 0x0800, CRC(05dd8056) SHA1(556ca28d090cbf1855618ba40fc631523bdfadd5) )
476   ROM_LOAD( "a2-v48.7k", 0x0800, 0x0800, CRC(37df3acf) SHA1(a7f7f54af533dd8231bb20c526c053dd99e74863) )
477   ROM_LOAD( "a3-v48.6k", 0x1000, 0x0800, CRC(1295cee2) SHA1(61b260eb907ee4bbf1460277d09e3205c1f6d8a0) )
478   ROM_LOAD( "a4-v48.5k", 0x1800, 0x0800, CRC(5562614e) SHA1(7cb04d76e987944d385d40515396fc27ba00ae83) )
479ROM_END
480
481
482/*
483
484Meyco Games, unknown PCB, 1981
485
486NOTE TO WHOEVER IS MAME DEVELOPER FOR THIS DRIVER:  This is obviously part of a multiple board set.
487The other PCB board(s) were unfound.  If/when the game is identified,
488could you please let me know what it is?
489
490Dumper notes:
491
492-Board is approximately 16.5"x14.25", with no daughterboards or satellite add-on boards.
493
494-Board has 8 pin connector and 50 pin connector with no keying pins (see diagram)
495
496-Board has an 20.000MHz crystal @ C4 (see diagram below).
497
498-No dip switchs or sound chips on this board.
499
500-Board has 32 uPD411 RAM chips.
501
502-The 40 pin CPU is missing, Guru feels it will be an 8080 CPU.
503
504-Dump consists of:
505--6x2516 @ K3, K4, K5, K6, K7, K8.
506
507   K      J     H       G      F             E      D      C       B       A
508  |------------------------------------------------------------------------------|
509 1|                                                                              |
510 2|                                                                              |
511 3|ROM.3k                                    DS0026CN                            |
512 4|ROM.4k                                           20.000                      *|
513 5|ROM.5k                      N8T26AN                                           |
514 6|ROM.6k               C      898-1-R 1.5K  N8T26AN                            &|
515 7|ROM.7k               P      N8T26AN                                          &|
516 8|ROM.8k               U      N8T26AN                                          &|
517 9|                                                                             &|
51810|                                                                              |
51911|                                                                              |
52012|uPD411 uPD411 uPD411 uPD411 uPD411        uPD411 uPD411 uPD411                |
52113|uPD411 uPD411 uPD411 uPD411 uPD411        uPD411 uPD411 uPD411                |
52214|uPD411 uPD411 uPD411 uPD411 uPD411        uPD411 uPD411 uPD411                |
52315|uPD411 uPD411 uPD411 uPD411 uPD411        uPD411 uPD411 uPD411                |
524  |------------------------------------------------------------------------------|
525
526* = 8 pin connector
527& = 50 pin connector (assuming to other half of PCB)
528
529*/
530
531ROM_START( mdrawpkr )
532   ROM_REGION( 0x10000, "maincpu", ROMREGION_INVERT )
533   ROM_LOAD( "tms2516.k8", 0x0000, 0x0800, CRC(2e5fc31e) SHA1(5ea01298051bc51250f67305ac8a65b0b94c120f) )
534   ROM_LOAD( "tms2516.k7", 0x0800, 0x0800, CRC(baaf874e) SHA1(b7bb476ef873102979ad3252d19a26ee3a31d933) )
535   ROM_LOAD( "tms2516.k6", 0x1000, 0x0800, CRC(a0e13c41) SHA1(17f78f91dae64c39f1a39a0b99a081af1d3bed47) )
536   ROM_LOAD( "tms2516.k5", 0x1800, 0x0800, CRC(530a48fd) SHA1(e539962d19d884794ece2e426423f6b33d54058d) )
537   ROM_LOAD( "tms2516.k4", 0x2000, 0x0800, CRC(bb1bd38a) SHA1(90256991eb1d030dd72e7e6f8d1a7cce22340b42) )
538   ROM_LOAD( "tms2516.k3", 0x2800, 0x0800, CRC(30904dc8) SHA1(c82276aa0eb8f48d136ad8c15dd309c9b880c294) )
539ROM_END
540
541ROM_START( mdrawpkra )
542   ROM_REGION( 0x10000, "maincpu", ROMREGION_INVERT )
543   ROM_LOAD( "meyco.k8", 0x0000, 0x0800, CRC(b4f6994d) SHA1(46fb2784b7b333f6755522fd27741a2fc4a4bc99) )
544   ROM_LOAD( "meyco.k7", 0x0800, 0x0800, CRC(8830365d) SHA1(044bc92880b78fa2a6ed5e133b484ac7d34c455a) )
545   ROM_LOAD( "meyco.k6", 0x1000, 0x0800, CRC(e1d5d38d) SHA1(523029185e2edc0351fa128d6494a5002cb2d7e7) )
546   ROM_LOAD( "meyco.k5", 0x1800, 0x0800, CRC(27c8dbcc) SHA1(996732b16c46460400957b3ed7bc36f537258dd7) )
547   ROM_LOAD( "meyco.k4", 0x2000, 0x0800, CRC(e3f18769) SHA1(7c98ca3f8b423200eb51ebe432591a98394ef952) )
548   ROM_LOAD( "meyco.k3", 0x2800, 0x0800, CRC(72aee07f) SHA1(a6d6086f3a6181d5111d05ae779c3f7b363c7f14) )
549ROM_END
550
551ROM_START( unkmeyco )
552   ROM_REGION( 0x10000, "maincpu", ROMREGION_INVERT )
553   ROM_LOAD( "k8", 0x0000, 0x0800, CRC(c6d8a2f7) SHA1(1fcd3ad72a29f832ffaf37edcb74e84e21909496) )
554   ROM_LOAD( "k7", 0x0800, 0x0800, CRC(6e30e5ae) SHA1(980096adefce4d4d97607b22f56f3acf246986ed) )
555   ROM_LOAD( "k6", 0x1000, 0x0800, CRC(7e2cb0e1) SHA1(3ea8f3c051ba730a39404b718d93bcdd762834c3) )
556   ROM_LOAD( "k5", 0x1800, 0x0800, CRC(536c83f9) SHA1(0dc9171c14f96bde68dc3b175abe31fa25753b48) )
557   ROM_LOAD( "k4", 0x2000, 0x0800, CRC(178b0f95) SHA1(cea5922f5294958c59cacd42e30399fc329426d9) )
558   ROM_LOAD( "k3", 0x2800, 0x0800, CRC(9cd6b843) SHA1(fb9c5c5ba96ebb75dc42e7c891d6da2a8a1ea6c1) )
559   ROM_LOAD( "k2", 0x3000, 0x0800, CRC(5f82eafa) SHA1(4f5a4dc773ceae9a69ec532166047867db4ddadf) )
560ROM_END
561
562
563/*************************************
564 *
565 *  Game drivers
566 *
567 *************************************/
568
569GAME( 1982, wldarrow,  0,        wldarrow, wldarrow, 0, ROT0, "Meyco Games", "Wild Arrow (Standard V4.8)",                    GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
570GAME( 1984, mdrawpkr,  0,        wldarrow, mdrawpkr, 0, ROT0, "Meyco Games", "Draw Poker - Joker's Wild (Standard)",          GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // year not shown, but it is in mdrawpkra
571GAME( 1984, mdrawpkra, mdrawpkr, wldarrow, mdrawpkr, 0, ROT0, "Meyco Games", "Draw Poker - Joker's Wild (02-11)",             GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
572GAME( 1983, unkmeyco,  0,        wldarrow, unkmeyco, 0, ROT0, "Meyco Games", "unknown Meyco blackjack game (Standard 00-05)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
src/emu/watchdog.c
r14944r14945
1/***************************************************************************
2
3    watchdog.c
4
5    Watchdog handling
6
7    Copyright Nicola Salmoria and the MAME Team.
8    Visit http://mamedev.org for licensing and usage restrictions.
9
10***************************************************************************/
11
12#include "emu.h"
13#include "emuopts.h"
14
15
16
17/***************************************************************************
18    GLOBAL VARIABLES
19***************************************************************************/
20
21static UINT8 watchdog_enabled;
22static INT32 watchdog_counter;
23static emu_timer *watchdog_timer;
24
25
26
27/***************************************************************************
28    FUNCTION PROTOTYPES
29***************************************************************************/
30
31static void watchdog_internal_reset(running_machine &machine);
32static TIMER_CALLBACK( watchdog_callback );
33
34
35
36/*-------------------------------------------------
37    watchdog_init - one time initialization
38-------------------------------------------------*/
39
40void watchdog_init(running_machine &machine)
41{
42   /* allocate a timer for the watchdog */
43   watchdog_timer = machine.scheduler().timer_alloc(FUNC(watchdog_callback));
44
45   machine.add_notifier(MACHINE_NOTIFY_RESET, machine_notify_delegate(FUNC(watchdog_internal_reset), &machine));
46
47   /* save some stuff in the default tag */
48   machine.save().save_item(NAME(watchdog_enabled));
49   machine.save().save_item(NAME(watchdog_counter));
50}
51
52
53/*-------------------------------------------------
54    watchdog_internal_reset - reset the watchdog
55    system
56-------------------------------------------------*/
57
58static void watchdog_internal_reset(running_machine &machine)
59{
60   /* set up the watchdog timer; only start off enabled if explicitly configured */
61   watchdog_enabled = (machine.config().m_watchdog_vblank_count != 0 || machine.config().m_watchdog_time != attotime::zero);
62   watchdog_reset(machine);
63   watchdog_enabled = TRUE;
64}
65
66
67/*-------------------------------------------------
68    watchdog_callback - watchdog timer callback
69-------------------------------------------------*/
70
71static TIMER_CALLBACK( watchdog_callback )
72{
73   logerror("Reset caused by the watchdog!!!\n");
74
75   int verbose = machine.options().verbose();
76#ifdef MAME_DEBUG
77   verbose = 1;
78#endif
79   if (verbose)
80      popmessage("Reset caused by the watchdog!!!\n");
81
82   machine.schedule_soft_reset();
83}
84
85
86/*-------------------------------------------------
87    on_vblank - updates VBLANK based watchdog
88    timers
89-------------------------------------------------*/
90
91static void on_vblank(running_machine &machine, screen_device &screen, bool vblank_state)
92{
93   /* VBLANK starting */
94   if (vblank_state && watchdog_enabled)
95   {
96      /* check the watchdog */
97      if (screen.machine().config().m_watchdog_vblank_count != 0)
98      {
99         watchdog_counter = watchdog_counter - 1;
100
101         if (watchdog_counter == 0)
102            watchdog_callback(screen.machine(), NULL, 0);
103      }
104   }
105}
106
107
108/*-------------------------------------------------
109    watchdog_reset - reset the watchdog timer
110-------------------------------------------------*/
111
112void watchdog_reset(running_machine &machine)
113{
114   /* if we're not enabled, skip it */
115   if (!watchdog_enabled)
116      watchdog_timer->adjust(attotime::never);
117
118   /* VBLANK-based watchdog? */
119   else if (machine.config().m_watchdog_vblank_count != 0)
120   {
121      watchdog_counter = machine.config().m_watchdog_vblank_count;
122
123      /* register a VBLANK callback for the primary screen */
124      if (machine.primary_screen != NULL)
125         machine.primary_screen->register_vblank_callback(vblank_state_delegate(FUNC(on_vblank), &machine));
126   }
127
128   /* timer-based watchdog? */
129   else if (machine.config().m_watchdog_time != attotime::zero)
130      watchdog_timer->adjust(machine.config().m_watchdog_time);
131
132   /* default to an obscene amount of time (3 seconds) */
133   else
134      watchdog_timer->adjust(attotime::from_seconds(3));
135}
136
137
138/*-------------------------------------------------
139    watchdog_enable - reset the watchdog timer
140-------------------------------------------------*/
141
142void watchdog_enable(running_machine &machine, int enable)
143{
144   /* when re-enabled, we reset our state */
145   if (watchdog_enabled != enable)
146   {
147      watchdog_enabled = enable;
148      watchdog_reset(machine);
149   }
150}
src/emu/watchdog.h
r14944r14945
1/***************************************************************************
2
3    watchdog.h
4
5    Watchdog handling
6
7    Copyright Nicola Salmoria and the MAME Team.
8    Visit http://mamedev.org for licensing and usage restrictions.
9
10***************************************************************************/
11
12#pragma once
13
14#ifndef __EMU_H__
15#error Dont include this file directly; include emu.h instead.
16#endif
17
18#ifndef __WATCHDOG_H__
19#define __WATCHDOG_H__
20
21
22/* startup */
23void watchdog_init(running_machine &machine);
24
25/* reset the watchdog */
26void watchdog_reset(running_machine &machine);
27
28/* enable/disable the watchdog */
29void watchdog_enable(running_machine &machine, int enable);
30
31
32#endif   /* __WATCHDOG_H__ */

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