src/emu/cpu/m68000/m68kfpu.c
| r14868 | r14869 | |
| 1321 | 1321 | m68k->remaining_cycles -= 109; |
| 1322 | 1322 | break; |
| 1323 | 1323 | } |
| 1324 | case 0x06: // FLOGNP1 |
| 1325 | { |
| 1326 | REG_FP(m68k)[dst] = floatx80_flognp1 (source); |
| 1327 | SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); |
| 1328 | m68k->remaining_cycles -= 594; // for MC68881 |
| 1329 | break; |
| 1330 | } |
| 1324 | 1331 | case 0x0e: // FSIN |
| 1325 | 1332 | { |
| 1326 | 1333 | REG_FP(m68k)[dst] = source; |
| r14868 | r14869 | |
| 1337 | 1344 | m68k->remaining_cycles -= 75; |
| 1338 | 1345 | break; |
| 1339 | 1346 | } |
| 1347 | case 0x14: // FLOGN |
| 1348 | { |
| 1349 | REG_FP(m68k)[dst] = floatx80_flogn (source); |
| 1350 | SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); |
| 1351 | m68k->remaining_cycles -= 548; // for MC68881 |
| 1352 | break; |
| 1353 | } |
| 1354 | case 0x15: // FLOG10 |
| 1355 | { |
| 1356 | REG_FP(m68k)[dst] = floatx80_flog10 (source); |
| 1357 | SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); |
| 1358 | m68k->remaining_cycles -= 604; // for MC68881 |
| 1359 | break; |
| 1360 | } |
| 1361 | case 0x16: // FLOG2 |
| 1362 | { |
| 1363 | REG_FP(m68k)[dst] = floatx80_flog2 (source); |
| 1364 | SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]); |
| 1365 | m68k->remaining_cycles -= 604; // for MC68881 |
| 1366 | break; |
| 1367 | } |
| 1340 | 1368 | case 0x18: // FABS |
| 1341 | 1369 | { |
| 1342 | 1370 | REG_FP(m68k)[dst] = source; |
src/emu/cpu/m68000/m68k_in.c
| r14868 | r14869 | |
| 2660 | 2660 | } |
| 2661 | 2661 | width = ((width-1) & 31) + 1; |
| 2662 | 2662 | |
| 2663 | | data = (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); |
| 2663 | data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : |
| 2664 | (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); |
| 2664 | 2665 | |
| 2665 | 2666 | data = MASK_OUT_ABOVE_32(data<<offset); |
| 2666 | 2667 | |
| r14868 | r14869 | |
| 2745 | 2746 | } |
| 2746 | 2747 | width = ((width-1) & 31) + 1; |
| 2747 | 2748 | |
| 2748 | | data = (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); |
| 2749 | data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : |
| 2750 | (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); |
| 2749 | 2751 | data = MASK_OUT_ABOVE_32(data<<offset); |
| 2750 | 2752 | |
| 2751 | 2753 | if((offset+width) > 32) |
| r14868 | r14869 | |
| 2942 | 2944 | (mc68kcpu)->not_z_flag = insert_base; |
| 2943 | 2945 | insert_long = insert_base >> offset; |
| 2944 | 2946 | |
| 2945 | | data_long = (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); |
| 2947 | data_long = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) : |
| 2948 | (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea); |
| 2946 | 2949 | (mc68kcpu)->v_flag = VFLAG_CLEAR; |
| 2947 | 2950 | (mc68kcpu)->c_flag = CFLAG_CLEAR; |
| 2948 | 2951 | |
| 2949 | | if((width + offset) < 16) |
| 2952 | if((width + offset) < 8) |
| 2950 | 2953 | { |
| 2954 | m68ki_write_8((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 24); |
| 2955 | } |
| 2956 | else if((width + offset) < 16) |
| 2957 | { |
| 2951 | 2958 | m68ki_write_16((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 16); |
| 2952 | 2959 | } |
| 2953 | 2960 | else |