src/mess/machine/ncr5390.c
| r14568 | r14569 | |
| 521 | 521 | |
| 522 | 522 | READ8_MEMBER(ncr5390_device::tcount_lo_r) |
| 523 | 523 | { |
| 524 | | fprintf(stderr, "%s: tcount_lo_r %02x (%08x)\n", tag(), tcount & 0xff, cpu_get_pc(&space.device())); |
| 524 | logerror("%s: tcount_lo_r %02x (%08x)\n", tag(), tcount & 0xff, cpu_get_pc(&space.device())); |
| 525 | 525 | return tcount; |
| 526 | 526 | } |
| 527 | 527 | |
| r14568 | r14569 | |
| 529 | 529 | { |
| 530 | 530 | tcount = (tcount & 0xff00) | data; |
| 531 | 531 | status &= ~S_TC0; |
| 532 | | fprintf(stderr, "%s: tcount_lo_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device())); |
| 532 | logerror("%s: tcount_lo_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device())); |
| 533 | 533 | } |
| 534 | 534 | |
| 535 | 535 | READ8_MEMBER(ncr5390_device::tcount_hi_r) |
| 536 | 536 | { |
| 537 | | fprintf(stderr, "%s: tcount_hi_r %02x (%08x)\n", tag(), tcount >> 8, cpu_get_pc(&space.device())); |
| 537 | logerror("%s: tcount_hi_r %02x (%08x)\n", tag(), tcount >> 8, cpu_get_pc(&space.device())); |
| 538 | 538 | return tcount >> 8; |
| 539 | 539 | } |
| 540 | 540 | |
| r14568 | r14569 | |
| 542 | 542 | { |
| 543 | 543 | tcount = (tcount & 0x00ff) | (data << 8); |
| 544 | 544 | status &= ~S_TC0; |
| 545 | | fprintf(stderr, "%s: tcount_hi_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device())); |
| 545 | logerror("%s: tcount_hi_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device())); |
| 546 | 546 | } |
| 547 | 547 | |
| 548 | 548 | UINT8 ncr5390_device::fifo_pop() |
| r14568 | r14569 | |
| 580 | 580 | |
| 581 | 581 | READ8_MEMBER(ncr5390_device::command_r) |
| 582 | 582 | { |
| 583 | | fprintf(stderr, "%s: command_r (%08x)\n", tag(), cpu_get_pc(&space.device())); |
| 583 | logerror("%s: command_r (%08x)\n", tag(), cpu_get_pc(&space.device())); |
| 584 | 584 | return command[0]; |
| 585 | 585 | } |
| 586 | 586 | |
| 587 | 587 | WRITE8_MEMBER(ncr5390_device::command_w) |
| 588 | 588 | { |
| 589 | | // fprintf(stderr, "%s: command_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device())); |
| 589 | // logerror("%s: command_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device())); |
| 590 | 590 | if(command_pos == 2) { |
| 591 | 591 | status |= S_GROSS_ERROR; |
| 592 | 592 | check_irq(); |
| r14568 | r14569 | |
| 771 | 771 | { |
| 772 | 772 | UINT32 ctrl = scsi_bus->ctrl_r(); |
| 773 | 773 | UINT8 res = status | (ctrl & S_MSG ? 4 : 0) | (ctrl & S_CTL ? 2 : 0) | (ctrl & S_INP ? 1 : 0); |
| 774 | | fprintf(stderr, "%s: status_r %02x (%08x)\n", tag(), res, cpu_get_pc(&space.device())); |
| 774 | logerror("%s: status_r %02x (%08x)\n", tag(), res, cpu_get_pc(&space.device())); |
| 775 | 775 | if(irq) |
| 776 | 776 | status &= ~(S_GROSS_ERROR|S_PARITY|S_TCC); |
| 777 | 777 | return res; |
| r14568 | r14569 | |
| 792 | 792 | if(res) |
| 793 | 793 | command_pop_and_chain(); |
| 794 | 794 | |
| 795 | | fprintf(stderr, "%s: istatus_r %02x (%08x)\n", tag(), res, cpu_get_pc(&space.device())); |
| 795 | logerror("%s: istatus_r %02x (%08x)\n", tag(), res, cpu_get_pc(&space.device())); |
| 796 | 796 | return res; |
| 797 | 797 | } |
| 798 | 798 | |
| r14568 | r14569 | |
| 803 | 803 | |
| 804 | 804 | READ8_MEMBER(ncr5390_device::seq_step_r) |
| 805 | 805 | { |
| 806 | | fprintf(stderr, "%s: seq_step_r %d (%08x)\n", tag(), seq, cpu_get_pc(&space.device())); |
| 806 | logerror("%s: seq_step_r %d (%08x)\n", tag(), seq, cpu_get_pc(&space.device())); |
| 807 | 807 | return seq; |
| 808 | 808 | } |
| 809 | 809 | |
src/mess/machine/nextmo.c
| r14568 | r14569 | |
| 38 | 38 | |
| 39 | 39 | READ8_MEMBER(nextmo_device::r4_r) |
| 40 | 40 | { |
| 41 | | fprintf(stderr, "nextmo: r4_r %02x (%08x)\n", r4, cpu_get_pc(&space.device())); |
| 41 | logerror("nextmo: r4_r %02x (%08x)\n", r4, cpu_get_pc(&space.device())); |
| 42 | 42 | return r4; |
| 43 | 43 | } |
| 44 | 44 | |
| r14568 | r14569 | |
| 47 | 47 | if(r4 & 1) |
| 48 | 48 | device_reset(); |
| 49 | 49 | r4 = (r4 & (~data & 0xfc)) | (data & 3); |
| 50 | | fprintf(stderr, "nextmo: r4_w %02x (%08x)\n", r4, cpu_get_pc(&space.device())); |
| 50 | logerror("nextmo: r4_w %02x (%08x)\n", r4, cpu_get_pc(&space.device())); |
| 51 | 51 | } |
| 52 | 52 | |
| 53 | 53 | READ8_MEMBER(nextmo_device::r5_r) |
| 54 | 54 | { |
| 55 | | fprintf(stderr, "nextmo: r5_r %02x (%08x)\n", r5, cpu_get_pc(&space.device())); |
| 55 | logerror("nextmo: r5_r %02x (%08x)\n", r5, cpu_get_pc(&space.device())); |
| 56 | 56 | return r5; |
| 57 | 57 | } |
| 58 | 58 | |
| 59 | 59 | WRITE8_MEMBER(nextmo_device::r5_w) |
| 60 | 60 | { |
| 61 | 61 | r5 = data; |
| 62 | | fprintf(stderr, "nextmo: r5_w %02x (%08x)\n", r5, cpu_get_pc(&space.device())); |
| 62 | logerror("nextmo: r5_w %02x (%08x)\n", r5, cpu_get_pc(&space.device())); |
| 63 | 63 | } |
| 64 | 64 | |
| 65 | 65 | READ8_MEMBER(nextmo_device::r6_r) |
| 66 | 66 | { |
| 67 | | fprintf(stderr, "nextmo: r6_r %02x (%08x)\n", r6, cpu_get_pc(&space.device())); |
| 67 | logerror("nextmo: r6_r %02x (%08x)\n", r6, cpu_get_pc(&space.device())); |
| 68 | 68 | return r6; |
| 69 | 69 | } |
| 70 | 70 | |
| 71 | 71 | WRITE8_MEMBER(nextmo_device::r6_w) |
| 72 | 72 | { |
| 73 | 73 | r6 = data; |
| 74 | | fprintf(stderr, "nextmo: r6_w %02x (%08x)\n", r6, cpu_get_pc(&space.device())); |
| 74 | logerror("nextmo: r6_w %02x (%08x)\n", r6, cpu_get_pc(&space.device())); |
| 75 | 75 | } |
| 76 | 76 | |
| 77 | 77 | READ8_MEMBER(nextmo_device::r7_r) |
| 78 | 78 | { |
| 79 | | fprintf(stderr, "nextmo: r7_r %02x (%08x)\n", r7, cpu_get_pc(&space.device())); |
| 79 | logerror("nextmo: r7_r %02x (%08x)\n", r7, cpu_get_pc(&space.device())); |
| 80 | 80 | return r7; |
| 81 | 81 | } |
| 82 | 82 | |
| 83 | 83 | WRITE8_MEMBER(nextmo_device::r7_w) |
| 84 | 84 | { |
| 85 | 85 | r7 = data; |
| 86 | | fprintf(stderr, "nextmo: r7_w %02x (%08x)\n", r7, cpu_get_pc(&space.device())); |
| 86 | logerror("nextmo: r7_w %02x (%08x)\n", r7, cpu_get_pc(&space.device())); |
| 87 | 87 | if(r7 & 0xc0) { |
| 88 | | fprintf(stderr, "nextmo: start dma %02x %02x\n", r6, r7); |
| 88 | logerror("nextmo: start dma %02x %02x\n", r6, r7); |
| 89 | 89 | sector_pos = 0; |
| 90 | 90 | if(!drq_cb.isnull()) |
| 91 | 91 | drq_cb(true); |
| r14568 | r14569 | |
| 131 | 131 | |
| 132 | 132 | READ8_MEMBER(nextmo_device::r8_r) |
| 133 | 133 | { |
| 134 | | fprintf(stderr, "nextmo: r8_r (%08x)\n", cpu_get_pc(&space.device())); |
| 134 | logerror("nextmo: r8_r (%08x)\n", cpu_get_pc(&space.device())); |
| 135 | 135 | return 0x00; |
| 136 | 136 | } |
| 137 | 137 | |
| 138 | 138 | WRITE8_MEMBER(nextmo_device::r8_w) |
| 139 | 139 | { |
| 140 | | fprintf(stderr, "nextmo: r8_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 140 | logerror("nextmo: r8_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 141 | 141 | } |
| 142 | 142 | |
| 143 | 143 | READ8_MEMBER(nextmo_device::r9_r) |
| 144 | 144 | { |
| 145 | | fprintf(stderr, "nextmo: r9_r (%08x)\n", cpu_get_pc(&space.device())); |
| 145 | logerror("nextmo: r9_r (%08x)\n", cpu_get_pc(&space.device())); |
| 146 | 146 | return 0x00; |
| 147 | 147 | } |
| 148 | 148 | |
| 149 | 149 | WRITE8_MEMBER(nextmo_device::r9_w) |
| 150 | 150 | { |
| 151 | | fprintf(stderr, "nextmo: r9_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 151 | logerror("nextmo: r9_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 152 | 152 | } |
| 153 | 153 | |
| 154 | 154 | READ8_MEMBER(nextmo_device::ra_r) |
| 155 | 155 | { |
| 156 | | fprintf(stderr, "nextmo: ra_r (%08x)\n", cpu_get_pc(&space.device())); |
| 156 | logerror("nextmo: ra_r (%08x)\n", cpu_get_pc(&space.device())); |
| 157 | 157 | return 0x00; |
| 158 | 158 | } |
| 159 | 159 | |
| 160 | 160 | WRITE8_MEMBER(nextmo_device::ra_w) |
| 161 | 161 | { |
| 162 | | fprintf(stderr, "nextmo: ra_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 162 | logerror("nextmo: ra_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 163 | 163 | } |
| 164 | 164 | |
| 165 | 165 | READ8_MEMBER(nextmo_device::rb_r) |
| 166 | 166 | { |
| 167 | | fprintf(stderr, "nextmo: rb_r (%08x)\n", cpu_get_pc(&space.device())); |
| 167 | logerror("nextmo: rb_r (%08x)\n", cpu_get_pc(&space.device())); |
| 168 | 168 | return 0x24; |
| 169 | 169 | } |
| 170 | 170 | |
| 171 | 171 | WRITE8_MEMBER(nextmo_device::rb_w) |
| 172 | 172 | { |
| 173 | | fprintf(stderr, "nextmo: rb_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 173 | logerror("nextmo: rb_w %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 174 | 174 | } |
| 175 | 175 | |
| 176 | 176 | READ8_MEMBER(nextmo_device::r10_r) |
| 177 | 177 | { |
| 178 | | fprintf(stderr, "nextmo: r10_r %d (%08x)\n", offset, cpu_get_pc(&space.device())); |
| 178 | logerror("nextmo: r10_r %d (%08x)\n", offset, cpu_get_pc(&space.device())); |
| 179 | 179 | return 0x00; |
| 180 | 180 | } |
| 181 | 181 | |
| 182 | 182 | WRITE8_MEMBER(nextmo_device::r10_w) |
| 183 | 183 | { |
| 184 | | fprintf(stderr, "nextmo: r10_w %d, %02x (%08x)\n", offset, data, cpu_get_pc(&space.device())); |
| 184 | logerror("nextmo: r10_w %d, %02x (%08x)\n", offset, data, cpu_get_pc(&space.device())); |
| 185 | 185 | } |
| 186 | 186 | |
| 187 | 187 | void nextmo_device::check_ecc() |
| 188 | 188 | { |
| 189 | | fprintf(stderr, "nextmo: check_ecc\n"); |
| 189 | logerror("nextmo: check_ecc\n"); |
| 190 | 190 | for(int i=0; i<0x400; i++) |
| 191 | 191 | sector[i] = i; |
| 192 | 192 | } |
| 193 | 193 | |
| 194 | 194 | void nextmo_device::compute_ecc() |
| 195 | 195 | { |
| 196 | | fprintf(stderr, "nextmo: compute_ecc\n"); |
| 196 | logerror("nextmo: compute_ecc\n"); |
| 197 | 197 | memset(sector+0x400, 0, 0x110); |
| 198 | 198 | } |
src/mess/drivers/next.c
| r14568 | r14569 | |
| 261 | 261 | else if(bit < 30) level = 6; |
| 262 | 262 | else level = 7; |
| 263 | 263 | |
| 264 | | fprintf(stderr, "IRQ info %08x/%08x - %d\n", irq_status, irq_mask, level); |
| 264 | logerror("IRQ info %08x/%08x - %d\n", irq_status, irq_mask, level); |
| 265 | 265 | |
| 266 | 266 | if(level != irq_level) { |
| 267 | 267 | maincpu->set_input_line(irq_level, CLEAR_LINE); |
| r14568 | r14569 | |
| 314 | 314 | dma_read(slot, val, eof, err); |
| 315 | 315 | if(err) { |
| 316 | 316 | ds.state = (ds.state & ~DMA_ENABLE) | DMA_BUSEXC; |
| 317 | | fprintf(stderr, "DMA: bus error on read slot %d\n", slot); |
| 317 | logerror("DMA: bus error on read slot %d\n", slot); |
| 318 | 318 | return; |
| 319 | 319 | } |
| 320 | | if(0) |
| 321 | | fprintf(stderr, "DMA [%08x] = %02x\n", ds.current, val); |
| 322 | 320 | space->write_byte(ds.current++, val); |
| 323 | 321 | dma_check_end(slot, eof); |
| 324 | 322 | if(!(ds.state & DMA_ENABLE)) |
| r14568 | r14569 | |
| 333 | 331 | dma_write(slot, val, eof, err); |
| 334 | 332 | if(err) { |
| 335 | 333 | ds.state = (ds.state & ~DMA_ENABLE) | DMA_BUSEXC; |
| 336 | | fprintf(stderr, "DMA: bus error on write slot %d\n", slot); |
| 334 | logerror("DMA: bus error on write slot %d\n", slot); |
| 337 | 335 | return; |
| 338 | 336 | } |
| 339 | 337 | dma_check_end(slot, false); |
| r14568 | r14569 | |
| 457 | 455 | } |
| 458 | 456 | |
| 459 | 457 | const char *name = dma_name(slot); |
| 460 | | fprintf(stderr, "dma_regs_r %s:%d %08x (%08x)\n", name, reg, res, cpu_get_pc(&space.device())); |
| 458 | logerror("dma_regs_r %s:%d %08x (%08x)\n", name, reg, res, cpu_get_pc(&space.device())); |
| 461 | 459 | |
| 462 | 460 | return res; |
| 463 | 461 | } |
| r14568 | r14569 | |
| 469 | 467 | |
| 470 | 468 | const char *name = dma_name(slot); |
| 471 | 469 | |
| 472 | | fprintf(stderr, "dma_regs_w %s:%d %08x (%08x)\n", name, reg, data, cpu_get_pc(&space.device())); |
| 470 | logerror("dma_regs_w %s:%d %08x (%08x)\n", name, reg, data, cpu_get_pc(&space.device())); |
| 473 | 471 | switch(reg) { |
| 474 | 472 | case 0: |
| 475 | 473 | dma_slots[slot].start = data; |
| r14568 | r14569 | |
| 495 | 493 | const char *name = dma_name(slot); |
| 496 | 494 | |
| 497 | 495 | if(cpu_get_pc(&space.device()) != 0x409bb4e) |
| 498 | | fprintf(stderr, "dma_ctrl_r %s:%d %02x (%08x)\n", name, reg, dma_slots[slot].state, cpu_get_pc(&space.device())); |
| 496 | logerror("dma_ctrl_r %s:%d %02x (%08x)\n", name, reg, dma_slots[slot].state, cpu_get_pc(&space.device())); |
| 499 | 497 | |
| 500 | 498 | return reg ? 0 : dma_slots[slot].state << 24; |
| 501 | 499 | } |
| r14568 | r14569 | |
| 505 | 503 | int slot = offset >> 2; |
| 506 | 504 | int reg = offset & 3; |
| 507 | 505 | const char *name = dma_name(slot); |
| 508 | | fprintf(stderr, "dma_ctrl_w %s:%d %08x @ %08x (%08x)\n", name, reg, data, mem_mask, cpu_get_pc(&space.device())); |
| 506 | logerror("dma_ctrl_w %s:%d %08x @ %08x (%08x)\n", name, reg, data, mem_mask, cpu_get_pc(&space.device())); |
| 509 | 507 | if(!reg) { |
| 510 | 508 | if(ACCESSING_BITS_16_23) |
| 511 | 509 | dma_do_ctrl_w(slot, data >> 16); |
| r14568 | r14569 | |
| 530 | 528 | data & DMA_INITBUFTURBO ? " initbufturbo" : ""); |
| 531 | 529 | #endif |
| 532 | 530 | if(data & DMA_SETENABLE) |
| 533 | | fprintf(stderr, "dma enable %s %s %08x (%08x)\n", name, data & DMA_SETREAD ? "read" : "write", (dma_slots[slot].limit-dma_slots[slot].start) & 0x7fffffff, cpu_get_pc(maincpu)); |
| 531 | logerror("dma enable %s %s %08x (%08x)\n", name, data & DMA_SETREAD ? "read" : "write", (dma_slots[slot].limit-dma_slots[slot].start) & 0x7fffffff, cpu_get_pc(maincpu)); |
| 534 | 532 | |
| 535 | 533 | dma_slot &ds = dma_slots[slot]; |
| 536 | 534 | if(data & (DMA_RESET|DMA_INITBUF|DMA_INITBUFTURBO)) { |
| r14568 | r14569 | |
| 562 | 560 | READ32_MEMBER( next_state::scsictrl_r ) |
| 563 | 561 | { |
| 564 | 562 | UINT32 res = (scsictrl << 24) | (scsistat << 16); |
| 565 | | fprintf(stderr, "scsictrl_read %08x @ %08x (%08x)\n", res, mem_mask, cpu_get_pc(&space.device())); |
| 563 | logerror("scsictrl_read %08x @ %08x (%08x)\n", res, mem_mask, cpu_get_pc(&space.device())); |
| 566 | 564 | return res; |
| 567 | 565 | } |
| 568 | 566 | |
| r14568 | r14569 | |
| 574 | 572 | scsi->reset(); |
| 575 | 573 | device_t::static_set_clock(*scsi, scsi_clocks[scsictrl >> 6]); |
| 576 | 574 | |
| 577 | | fprintf(stderr, "SCSIctrl %dMHz int=%s dma=%s dmadir=%s%s%s dest=%s (%08x)\n", |
| 575 | logerror("SCSIctrl %dMHz int=%s dma=%s dmadir=%s%s%s dest=%s (%08x)\n", |
| 578 | 576 | scsi_clocks[scsictrl >> 6]/1000000, |
| 579 | 577 | scsictrl & 0x20 ? "on" : "off", |
| 580 | 578 | scsictrl & 0x10 ? "on" : "off", |
| r14568 | r14569 | |
| 586 | 584 | } |
| 587 | 585 | if(ACCESSING_BITS_16_23) { |
| 588 | 586 | scsistat = data >> 16; |
| 589 | | fprintf(stderr, "SCSIstat %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 587 | logerror("SCSIstat %02x (%08x)\n", data, cpu_get_pc(&space.device())); |
| 590 | 588 | } |
| 591 | 589 | } |
| 592 | 590 | |
| r14568 | r14569 | |
| 595 | 593 | // Event counters, around that time, are usually fixed-frequency counters. |
| 596 | 594 | // This one being 1MHz seems to make sense |
| 597 | 595 | |
| 598 | | // The nexttrb rom seems pretty convinced that it's 20 bits only. |
| 596 | // The v74 rom seems pretty convinced that it's 20 bits only. |
| 599 | 597 | |
| 600 | 598 | if(ACCESSING_BITS_24_31) |
| 601 | 599 | eventc_latch = machine().time().as_ticks(1000000) & 0xfffff; |
| r14568 | r14569 | |
| 609 | 607 | |
| 610 | 608 | WRITE32_MEMBER( next_state::fdc_control_w ) |
| 611 | 609 | { |
| 612 | | fprintf(stderr, "FDC write %02x (%08x)\n", data >> 24, cpu_get_pc(&space.device())); |
| 610 | logerror("FDC write %02x (%08x)\n", data >> 24, cpu_get_pc(&space.device())); |
| 613 | 611 | } |
| 614 | 612 | |
| 615 | 613 | READ32_MEMBER( next_state::fdc_control_r ) |