MESS SVN History

15994 Revisions

r14280 Tuesday 31st January, 2012 at 08:40:26 UTC by Miodrag Milanović
Source cleanup (nw)

[src/mess/drivers]	a7000.c abc1600.c apf.c bullet.c chesstrv.c fmtowns.c ibmpc.c kyocera.c next.c osbexec.c pasopia.c pc1512.c pcfx.c rm380z.c sage2.c sm1800.c tiki100.c vic20.c wangpc.c x1twin.c
[src/mess/includes]	atarist.h bullet.h c64.h gamecom.h gb.h gba.h lynx.h next.h osborne1.h pc1512.h pokemini.h radio86.h rm380z.h sage2.h samcoupe.h vic20.h wangpc.h wswan.h zx.h
[src/mess/machine]	aim65.c c64user.h ecb_grip.c ecbbus.h isa.c isa.h isa_finalchs.c isa_ide.c isa_ide.h isa_mpu401.c isa_sblaster.c lynx.c mb8795.c n82077aa.c n82077aa.h ncr5390.c ncr5390.h nes.c nextkbd.c nextmo.c pc.c rm380z.c upd765.c vic1010.c vic1010.h vic1110.c vic1110.h vic1111.h vic1112.c vic1112.h vic1210.c vic1210.h vic20exp.c vic20exp.h vic20std.c vic20std.h wangpc_lores.c wangpcbus.c wangpckb.c wangpckb.h
[src/mess/machine/ti99]	tn_ide.c videowrp.c
[src/mess/video]	a7800.c arcadia.c fmtowns.c galaxy.c intv.c isa_vga.h mikromik.c pc8401a.c rm380z.c spectrum.c tms3556.c tms3556.h vic6567.h wswan.c

src/mess/machine/wangpc_lores.c
r14279	r14280
37	37
38	38	void wangpc_lores_video_device::crtc_update_row(mc6845_device device, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT16 ma, UINT8 ra, UINT16 y, UINT8 x_count, INT8 cursor_x, void param)
39	39	{
40		/* const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
41		for (int column = 0; column < x_count; column++)
42		{
43		UINT8 code = m_video_ram[((ma + column) & 0x7ff)];
44		UINT16 addr = (code << 3) \| (ra & 0x07);
45		UINT8 data = m_char_rom[addr & 0x7ff];
	40	/* const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
	41	for (int column = 0; column < x_count; column++)
	42	{
	43	UINT8 code = m_video_ram[((ma + column) & 0x7ff)];
	44	UINT16 addr = (code << 3) \| (ra & 0x07);
	45	UINT8 data = m_char_rom[addr & 0x7ff];
46	46
47		if (column == cursor_x)
48		{
49		data = 0xff;
50		}
	47	if (column == cursor_x)
	48	{
	49	data = 0xff;
	50	}
51	51
52		for (int bit = 0; bit < 8; bit++)
53		{
54		int x = (column * 8) + bit;
55		int color = BIT(data, 7) ? 7 : 0;
	52	for (int bit = 0; bit < 8; bit++)
	53	{
	54	int x = (column * 8) + bit;
	55	int color = BIT(data, 7) ? 7 : 0;
56	56
57		bitmap.pix32(y, x) = palette[color];
	57	bitmap.pix32(y, x) = palette[color];
58	58
59		data <<= 1;
60		}
61		}*/
	59	data <<= 1;
	60	}
	61	}*/
62	62	}
63	63
64	64	static MC6845_UPDATE_ROW( wangpc_lores_video_update_row )
r14279	r14280
168	168	UINT16 wangpc_lores_video_device::wangpcbus_mrdc_r(address_space &space, offs_t offset, UINT16 mem_mask)
169	169	{
170	170	UINT16 data = 0xffff;
171
	171
172	172	if (BIT(m_option, 0) && (offset >= 0xe0000/2) && (offset < 0xf0000/2))
173	173	{
174	174	data = m_video_ram[offset];
175	175	}
176
	176
177	177	return data;
178	178	}
179	179
r14279	r14280
221	221	break;
222	222	}
223	223	}
224
	224
225	225	return data;
226	226	}
227	227
r14279	r14280
235	235	if (sad(offset))
236	236	{
237	237	logerror("Lores write %04x %04x\n", offset << 1, mem_mask);
238
	238
239	239	switch (offset & 0x7f)
240	240	{
241	241	case 0x00/2:
r14279	r14280
256	256	case 0x20/2:
257	257	m_scroll = data;
258	258	break;
259
	259
260	260	case 0x70/2:
261	261	m_irq3 = CLEAR_LINE;
262	262	m_bus->irq3_w(m_irq3);

src/mess/machine/vic20exp.c
r14279	r14280
91	91	memset(&m_out_nmi_cb, 0, sizeof(m_out_nmi_cb));
92	92	memset(&m_out_res_cb, 0, sizeof(m_out_res_cb));
93	93	}
94
	94
95	95	// set brief and instance name
96		update_names();
	96	update_names();
97	97	}
98	98
99	99
r14279	r14280
146	146	{
147	147	size = get_software_region_length("blk1");
148	148	if (size) memcpy(m_cart->vic20_blk1_pointer(), get_software_region("blk1"), size);
149
	149
150	150	size = get_software_region_length("blk2");
151	151	if (size) memcpy(m_cart->vic20_blk2_pointer(), get_software_region("blk2"), size);
152
	152
153	153	size = get_software_region_length("blk3");
154	154	if (size) memcpy(m_cart->vic20_blk3_pointer(), get_software_region("blk3"), size);
155
	155
156	156	size = get_software_region_length("blk5");
157	157	if (size) memcpy(m_cart->vic20_blk5_pointer(), get_software_region("blk5"), size);
158	158	}
r14279	r14280
191	191	UINT8* vic20_expansion_slot_device::blk1_pointer()
192	192	{
193	193	UINT8 *ptr = NULL;
194
	194
195	195	if (m_cart != NULL)
196	196	{
197	197	ptr = m_cart->vic20_blk1_pointer();
r14279	r14280
208	208	UINT8* vic20_expansion_slot_device::blk2_pointer()
209	209	{
210	210	UINT8 *ptr = NULL;
211
	211
212	212	if (m_cart != NULL)
213	213	{
214	214	ptr = m_cart->vic20_blk2_pointer();
r14279	r14280
225	225	UINT8* vic20_expansion_slot_device::blk3_pointer()
226	226	{
227	227	UINT8 *ptr = NULL;
228
	228
229	229	if (m_cart != NULL)
230	230	{
231	231	ptr = m_cart->vic20_blk3_pointer();
r14279	r14280
242	242	UINT8* vic20_expansion_slot_device::blk5_pointer()
243	243	{
244	244	UINT8 *ptr = NULL;
245
	245
246	246	if (m_cart != NULL)
247	247	{
248	248	ptr = m_cart->vic20_blk5_pointer();

src/mess/machine/vic20exp.h
r14279	r14280
207	207	virtual UINT32 vic20_screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { return false; }
208	208
209	209	virtual UINT8* get_cart_base() { return NULL; }
210
	210
211	211	protected:
212	212	vic20_expansion_slot_device *m_slot;
213	213	};

src/mess/machine/nes.c
r14279	r14280
312	312	state->m_chr_map[i].origin = i * 0x400; // for save state uses!
313	313	state->m_chr_map[i].access = &state->m_vram[state->m_chr_map[i].origin];
314	314	}
315		}
316
	315	}
	316
317	317	state->m_irq_timer = machine.scheduler().timer_alloc(FUNC(nes_irq_callback));
318	318	nes_state_register(machine);
319	319	}
r14279	r14280
1344	1344	fatalerror("No PRG entry for this software! Please check if the xml list got corrupted");
1345	1345	if (prg_size < 0x8000)
1346	1346	fatalerror("PRG entry is too small! Please check if the xml list got corrupted");
1347
	1347
1348	1348	// Allocate class pointers for PRG/VROM/VRAM/WRAM and copy data there from the temp copies
1349	1349	state->m_prg = auto_alloc_array(image.device().machine(), UINT8, prg_size);
1350
	1350
1351	1351	if (chr_size)
1352	1352	state->m_vrom = auto_alloc_array(image.device().machine(), UINT8, chr_size);
1353	1353
r14279	r14280
1676	1676	DRIVER_INIT( famicom )
1677	1677	{
1678	1678	nes_state *state = machine.driver_data<nes_state>();
1679
	1679
1680	1680	/* clear some of the variables we don't use */
1681	1681	state->m_trainer = 0;
1682	1682	state->m_battery = 0;

src/mess/machine/nextkbd.c
r14279	r14280
101	101
102	102	READ32_MEMBER( nextkbd_device::ctrl_r )
103	103	{
104		// logerror("nextkbd: ctrl_r %08x @ %08x\n", control, mem_mask);
	104	// logerror("nextkbd: ctrl_r %08x @ %08x\n", control, mem_mask);
105	105	return control;
106	106	}
107	107
r14279	r14280
131	131	}
132	132	if(diff & FLAG_INT)
133	133	int_change_cb(control & FLAG_INT);
134		// logerror("nextkbd: ctrl_w %08x @ %08x\n", data, mem_mask);
	134	// logerror("nextkbd: ctrl_w %08x @ %08x\n", data, mem_mask);
135	135	}
136	136
137	137	WRITE32_MEMBER( nextkbd_device::ctrl2_w )
138	138	{
139		// logerror("nextkbd: ctrl2_w %08x @ %08x\n", data, mem_mask);
	139	// logerror("nextkbd: ctrl2_w %08x @ %08x\n", data, mem_mask);
140	140	}
141	141
142	142	WRITE32_MEMBER( nextkbd_device::data_w )

src/mess/machine/isa_sblaster.c
r14279	r14280
533	533	void sb8_device::dack_w(int line, UINT8 data)
534	534	{
535	535	// printf("dack_w: line %x data %02x\n", line, data);
536		// if(data != 0x80)
537		// printf("%02x\n",data);
	536	// if(data != 0x80)
	537	// printf("%02x\n",data);
538	538
539	539	// set the transfer over timer on the 1st byte
540	540	if (m_dsp.dma_transferred == 0)

src/mess/machine/vic1010.c
r14279	r14280
109	109	UINT8 vic1010_device::vic20_ram1_r(address_space &space, offs_t offset)
110	110	{
111	111	UINT8 data = 0;
112
	112
113	113	for (int i = 0; i < MAX_SLOTS; i++)
114	114	{
115	115	data \|= m_expansion_slot[i]->ram1_r(space, offset);
116	116	}
117
	117
118	118	return data;
119	119	}
120	120
r14279	r14280
139	139	UINT8 vic1010_device::vic20_ram2_r(address_space &space, offs_t offset)
140	140	{
141	141	UINT8 data = 0;
142
	142
143	143	for (int i = 0; i < MAX_SLOTS; i++)
144	144	{
145	145	data \|= m_expansion_slot[i]->ram2_r(space, offset);
146	146	}
147
	147
148	148	return data;
149	149	}
150	150
r14279	r14280
169	169	UINT8 vic1010_device::vic20_ram3_r(address_space &space, offs_t offset)
170	170	{
171	171	UINT8 data = 0;
172
	172
173	173	for (int i = 0; i < MAX_SLOTS; i++)
174	174	{
175	175	data \|= m_expansion_slot[i]->ram3_r(space, offset);
176	176	}
177
	177
178	178	return data;
179	179	}
180	180
r14279	r14280
199	199	UINT8 vic1010_device::vic20_blk1_r(address_space &space, offs_t offset)
200	200	{
201	201	UINT8 data = 0;
202
	202
203	203	for (int i = 0; i < MAX_SLOTS; i++)
204	204	{
205	205	data \|= m_expansion_slot[i]->blk1_r(space, offset);
206	206	}
207
	207
208	208	return data;
209	209	}
210	210
r14279	r14280
229	229	UINT8 vic1010_device::vic20_blk2_r(address_space &space, offs_t offset)
230	230	{
231	231	UINT8 data = 0;
232
	232
233	233	for (int i = 0; i < MAX_SLOTS; i++)
234	234	{
235	235	data \|= m_expansion_slot[i]->blk2_r(space, offset);
236	236	}
237
	237
238	238	return data;
239	239	}
240	240
r14279	r14280
259	259	UINT8 vic1010_device::vic20_blk3_r(address_space &space, offs_t offset)
260	260	{
261	261	UINT8 data = 0;
262
	262
263	263	for (int i = 0; i < MAX_SLOTS; i++)
264	264	{
265	265	data \|= m_expansion_slot[i]->blk3_r(space, offset);
266	266	}
267
	267
268	268	return data;
269	269	}
270	270
r14279	r14280
289	289	UINT8 vic1010_device::vic20_blk5_r(address_space &space, offs_t offset)
290	290	{
291	291	UINT8 data = 0;
292
	292
293	293	for (int i = 0; i < MAX_SLOTS; i++)
294	294	{
295	295	data \|= m_expansion_slot[i]->blk5_r(space, offset);
296	296	}
297
	297
298	298	return data;
299	299	}
300	300

src/mess/machine/vic1010.h
r14279	r14280
40	40	public:
41	41	// construction/destruction
42	42	vic1010_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
43
	43
44	44	// not really public
45	45	DECLARE_WRITE_LINE_MEMBER( irq_w );
46	46	DECLARE_WRITE_LINE_MEMBER( nmi_w );
r14279	r14280
49	49	protected:
50	50	// device-level overrides
51	51	virtual void device_start();
52
	52
53	53	// optional information overrides
54	54	virtual machine_config_constructor device_mconfig_additions() const;
55	55
r14279	r14280
68	68	virtual void vic20_blk3_w(address_space &space, offs_t offset, UINT8 data);
69	69	virtual UINT8 vic20_blk5_r(address_space &space, offs_t offset);
70	70	virtual void vic20_blk5_w(address_space &space, offs_t offset, UINT8 data);
71
	71
72	72	private:
73	73	vic20_expansion_slot_device *m_expansion_slot[MAX_SLOTS];
74	74	};

src/mess/machine/pc.c
r14279	r14280
1095	1095	mess_init_pc_common(machine, PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
1096	1096
1097	1097	pc_vga_init(machine, input_port_0_r, NULL);
1098		pc_vga_io_init(machine, machine.device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine.device("maincpu")->memory().space(AS_IO), 0x0000);
	1098	pc_vga_io_init(machine, machine.device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine.device("maincpu")->memory().space(AS_IO), 0x0000);
1099	1099	}
1100	1100
1101	1101	static IRQ_CALLBACK(pc_irq_callback)

src/mess/machine/vic1110.c
r14279	r14280
45	45	PORT_DIPSETTING( BLK5, "$A000-B3FFF" )
46	46	INPUT_PORTS_END
47	47
48
	48
49	49	//-------------------------------------------------
50	50	// input_ports - device-specific input ports
51	51	//-------------------------------------------------
r14279	r14280
91	91	UINT8 vic1110_device::vic20_blk1_r(address_space &space, offs_t offset)
92	92	{
93	93	UINT8 data = 0;
94
	94
95	95	if (input_port_read(*this, "SW") == BLK1)
96	96	{
97	97	data = m_ram[offset & 0x1fff];
98	98	}
99
	99
100	100	return data;
101	101	}
102	102
r14279	r14280
121	121	UINT8 vic1110_device::vic20_blk2_r(address_space &space, offs_t offset)
122	122	{
123	123	UINT8 data = 0;
124
	124
125	125	if (input_port_read(*this, "SW") == BLK2)
126	126	{
127	127	data = m_ram[offset & 0x1fff];
128	128	}
129
	129
130	130	return data;
131	131	}
132	132
r14279	r14280
151	151	UINT8 vic1110_device::vic20_blk3_r(address_space &space, offs_t offset)
152	152	{
153	153	UINT8 data = 0;
154
	154
155	155	if (input_port_read(*this, "SW") == BLK3)
156	156	{
157	157	data = m_ram[offset & 0x1fff];
158	158	}
159
	159
160	160	return data;
161	161	}
162	162
r14279	r14280
181	181	UINT8 vic1110_device::vic20_blk5_r(address_space &space, offs_t offset)
182	182	{
183	183	UINT8 data = 0;
184
	184
185	185	if (input_port_read(*this, "SW") == BLK5)
186	186	{
187	187	data = m_ram[offset & 0x1fff];
188	188	}
189
	189
190	190	return data;
191	191	}
192	192

src/mess/machine/vic1110.h
r14279	r14280
34	34
35	35	// optional information overrides
36	36	virtual ioport_constructor device_input_ports() const;
37
	37
38	38	protected:
39	39	// device-level overrides
40	40	virtual void device_start();
41
	41
42	42	// device_vic20_expansion_card_interface overrides
43	43	virtual UINT8 vic20_blk1_r(address_space &space, offs_t offset);
44	44	virtual void vic20_blk1_w(address_space &space, offs_t offset, UINT8 data);

src/mess/machine/mb8795.c
r14279	r14280
70	70
71	71	set_promisc(true);
72	72
73		start_send();
	73	start_send();
74	74	}
75	75
76	76	void mb8795_device::recv_cb(UINT8 *buf, int len)
r14279	r14280
87	87
88	88	READ8_MEMBER(mb8795_device::txstat_r)
89	89	{
90		// fprintf(stderr, "mb8795: txstat_r %02x (%08x)\n", txstat, cpu_get_pc(&space.device()));
	90	// fprintf(stderr, "mb8795: txstat_r %02x (%08x)\n", txstat, cpu_get_pc(&space.device()));
91	91	return txstat;
92	92	}
93	93
r14279	r14280
208	208	drq_tx = false;
209	209	if(!drq_tx_cb.isnull())
210	210	drq_tx_cb(drq_tx);
211
	211
212	212	if(eof) {
213	213	fprintf(stderr, "mb8795: send packet, dest=%02x.%02x.%02x.%02x.%02x.%02x len=%04x\n",
214	214	txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4], txbuf[5],
r14279	r14280
283	283	bool mb8795_device::recv_is_broadcast()
284	284	{
285	285	return
286		rxbuf[0] == 0xff &&
287		rxbuf[1] == 0xff &&
288		rxbuf[2] == 0xff &&
289		rxbuf[3] == 0xff &&
290		rxbuf[4] == 0xff &&
	286	rxbuf[0] == 0xff &&
	287	rxbuf[1] == 0xff &&
	288	rxbuf[2] == 0xff &&
	289	rxbuf[3] == 0xff &&
	290	rxbuf[4] == 0xff &&
291	291	rxbuf[5] == 0xff;
292	292	}
293	293
r14279	r14280
305	305	bool mb8795_device::recv_is_local_multicast()
306	306	{
307	307	return
308		(rxbuf[0] & 0x01) &&
	308	(rxbuf[0] & 0x01) &&
309	309	(rxbuf[0] & 0xfe) == mac[0] &&
310	310	rxbuf[1] == mac[1] &&
311	311	rxbuf[2] == mac[2];

src/mess/machine/upd765.c
r14279	r14280
693	693	READ_LINE_DEVICE_HANDLER( upd765_int_r )
694	694	{
695	695	upd765_t *fdc = get_safe_token(device);
696
	696
697	697	return (fdc->upd765_flags & UPD765_INT) ? 1 : 0;
698	698	}
699	699
700	700	READ_LINE_DEVICE_HANDLER( upd765_drq_r )
701	701	{
702	702	upd765_t *fdc = get_safe_token(device);
703
	703
704	704	return (fdc->upd765_flags & UPD765_DMA_DRQ) ? 1 : 0;
705	705	}
706	706

src/mess/machine/wangpckb.c
r14279	r14280
27	27
28	28	CPU - Intel P8051AH "20-8051-225"
29	29	PSG - Texas Instruments SN76496N
30		XR - Exar Semiconductor XR22-908-03B? (hard to read)
	30	XR - Exar Semiconductor XR22-908-03B? (hard to read)
31	31	CN1 - 1x6 pin PCB header
32	32	SW1 - 8-way DIP switch
33	33	SW2 - 8-way DIP switch
r14279	r14280
391	391	int bit = get_in_data_bit();
392	392	receive_register_update_bit(bit);
393	393	/*
394		if (start bit)
395		{
396		m_maincpu->set_input_line(MCS51_RX_LINE, ASSERT_LINE);
397		}
398		*/
	394	if (start bit)
	395	{
	396	m_maincpu->set_input_line(MCS51_RX_LINE, ASSERT_LINE);
	397	}
	398	*/
399	399	if (is_receive_register_full())
400	400	{
401	401	receive_register_extract();
402	402	}
403
	403
404	404	// transmit
405	405	if (!is_transmit_register_empty())
406	406	{
r14279	r14280
426	426	int wangpc_keyboard_device::mcs51_rx_callback(device_t *device)
427	427	{
428	428	wangpc_keyboard_device kb = static_cast<wangpc_keyboard_device >(device->owner());
429
	429
430	430	return kb->get_received_char();
431	431	}
432	432
r14279	r14280
438	438	void wangpc_keyboard_device::mcs51_tx_callback(device_t *device, int data)
439	439	{
440	440	wangpc_keyboard_device kb = static_cast<wangpc_keyboard_device >(device->owner());
441
	441
442	442	kb->transmit_register_setup(data);
443	443	}
444	444
r14279	r14280
482	482	WRITE8_MEMBER( wangpc_keyboard_device::kb_p2_w )
483	483	{
484	484	/*
485
486		bit description
487
488		P2.0 row 0
489		P2.1 row 1
490		P2.2 row 2
491		P2.3 row 3
492		P2.4
493		P2.5
494		P2.6 chip enable for something
495		P2.7
496	485
497		*/
	486	bit description
498	487
	488	P2.0 row 0
	489	P2.1 row 1
	490	P2.2 row 2
	491	P2.3 row 3
	492	P2.4
	493	P2.5
	494	P2.6 chip enable for something
	495	P2.7
	496
	497	*/
	498
499	499	m_y = data;
500	500	}
501	501
r14279	r14280
507	507	WRITE8_MEMBER( wangpc_keyboard_device::kb_p3_w )
508	508	{
509	509	/*
510
511		bit description
512
513		P3.0
514		P3.1
515		P3.2
516		P3.3 chip enable for something
517		P3.4
518		P3.5
519		P3.6
520		P3.7
521	510
522		*/
	511	bit description
	512
	513	P3.0
	514	P3.1
	515	P3.2
	516	P3.3 chip enable for something
	517	P3.4
	518	P3.5
	519	P3.6
	520	P3.7
	521
	522	*/
523	523	}

src/mess/machine/isa_ide.c
r14279	r14280
99	99	//-------------------------------------------------
100	100
101	101	void isa16_ide_device::device_reset()
102		{
	102	{
103	103	m_is_primary = (input_port_read(*this, "DSW") & 1) ? false : true;
104		if (m_is_primary) {
	104	if (m_is_primary) {
105	105	m_isa->install16_device(subdevice("ide"), 0x01f0, 0x01f7, 0, 0, FUNC(ide16_r), FUNC(ide16_w) );
106	106	} else {
107	107	m_isa->install16_device(subdevice("ide"), 0x0170, 0x0177, 0, 0, FUNC(ide16_r), FUNC(ide16_w) );

src/mess/machine/wangpckb.h
r14279	r14280
59	59	virtual const rom_entry *device_rom_region() const;
60	60	virtual machine_config_constructor device_mconfig_additions() const;
61	61	virtual ioport_constructor device_input_ports() const;
62
	62
63	63	// not really public
64	64	DECLARE_READ8_MEMBER( kb_p1_r );
65	65	DECLARE_WRITE8_MEMBER( kb_p2_w );
66	66	DECLARE_WRITE8_MEMBER( kb_p3_w );
67
	67
68	68	static int mcs51_rx_callback(device_t *device);
69	69	static void mcs51_tx_callback(device_t *device, int data);
70
	70
71	71	protected:
72	72	// device-level overrides
73	73	virtual void device_config_complete() { m_shortname = "wangpckb"; }
74	74	virtual void device_start();
75	75	virtual void device_reset();
76	76	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
77
	77
78	78	// device_serial_interface overrides
79	79	virtual void input_callback(UINT8 state);
80	80
81	81	private:
82	82	required_device<cpu_device> m_maincpu;
83
	83
84	84	UINT8 m_y;
85	85	};
86	86

src/mess/machine/isa_ide.h
r14279	r14280
22	22
23	23	// optional information overrides
24	24	virtual machine_config_constructor device_mconfig_additions() const;
25		virtual ioport_constructor device_input_ports() const;
26
	25	virtual ioport_constructor device_input_ports() const;
	26
27	27	bool is_primary() { return m_is_primary; }
28	28	protected:
29	29	// device-level overrides

src/mess/machine/rm380z.c
r14279	r14280
34	34	switch ( offset )
35	35	{
36	36	case 0xFC: // PORT0
37		//printf("FBFCw[%2.2x] FBFD [%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",data,m_fbfd,m_fbfe,cpu_get_pc(machine().device("maincpu")),writenum);
	37	//printf("FBFCw[%2.2x] FBFD [%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",data,m_fbfd,m_fbfe,cpu_get_pc(machine().device("maincpu")),writenum);
38	38	m_port0 = data;
39	39	if (data&0x01)
40	40	{
r14279	r14280
48	48	break;
49	49
50	50	case 0xFD: // screen line counter (?)
51		//printf("FBFC [%2.2x] FBFDw[%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,data,m_fbfe,cpu_get_pc(machine().device("maincpu")),writenum);
52
	51	//printf("FBFC [%2.2x] FBFDw[%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,data,m_fbfe,cpu_get_pc(machine().device("maincpu")),writenum);
	52
53	53	m_old_old_fbfd=m_old_fbfd;
54	54	m_old_fbfd=m_fbfd;
55	55	m_fbfd=data;
r14279	r14280
57	57	writenum++;
58	58
59	59	check_scroll_register();
60
	60
61	61	break;
62	62
63	63	case 0xFE: // line on screen to write to divided by 2
64		//printf("FBFC [%2.2x] FBFD [%2.2x] FBFEw[%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,m_fbfd,data,cpu_get_pc(machine().device("maincpu")),writenum);
	64	//printf("FBFC [%2.2x] FBFD [%2.2x] FBFEw[%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,m_fbfd,data,cpu_get_pc(machine().device("maincpu")),writenum);
65	65	m_fbfe=data;
66	66	break;
67	67
r14279	r14280
69	69	//printf("write of [%x] to FBFF\n",data);
70	70	//logerror("%s: Write %02X to user I/O port\n", machine().describe_context(), data );
71	71	break;
72
	72
73	73	default:
74	74	printf("unknown port [%2.2x] write of [%2.2x]\n",offset,data);
75	75	}
r14279	r14280
102	102	case 0xFF: // user port
103	103	//printf("%s: Read from user port\n", machine().describe_context());
104	104	break;
105
	105
106	106	default:
107	107	printf("read from unknown port [%2.2x]\n",offset);
108	108	}
r14279	r14280
183	183	}
184	184
185	185	// line blanking
186		if ((state->m_rasterlineCtr%LINE_SUBDIVISION)>80)
	186	if ((state->m_rasterlineCtr%LINE_SUBDIVISION)>80)
187	187	{
188	188	state->m_port1\|=0x80;
189	189	}
r14279	r14280
270	270	memset(m_vramattribs,0,RM380Z_SCREENSIZE);
271	271	memset(m_vramchars,0,RM380Z_SCREENSIZE);
272	272	memset(m_vram,0,RM380Z_SCREENSIZE);
273
	273
274	274	config_memory_map();
275	275	machine().scheduler().timer_pulse(attotime::from_hz(TIMER_SPEED), FUNC(static_vblank_timer));
276	276	wd17xx_reset(machine().device("wd1771"));

src/mess/machine/ti99/videowrp.c
r14279	r14280
245	245	video->cpu = device->machine().device("maincpu");
246	246	video->space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
247	247	video->chip = conf->chip;
248
	248
249	249	if (video->chip == TI_V9938)
250	250	{
251	251	astring temp(device->tag(), "_v9938");
r14279	r14280
263	263	const ti99_video_config* conf = (const ti99_video_config*)get_config(device);
264	264	if (conf->chip!=TI_TMS991X)
265	265	{
266		// running_machine &machine = device->machine();
267		// int memsize = (input_port_read(machine, "V9938-MEM")==0)? 0x20000 : 0x30000;
	266	// running_machine &machine = device->machine();
	267	// int memsize = (input_port_read(machine, "V9938-MEM")==0)? 0x20000 : 0x30000;
268	268	//
269		// v9938_init(machine, 0, *machine.primary_screen, machine.primary_screen->default_bitmap(),
270		// MODEL_V9938, memsize, conf->callback);
271		// v9938_reset(0);
	269	// v9938_init(machine, 0, *machine.primary_screen, machine.primary_screen->default_bitmap(),
	270	// MODEL_V9938, memsize, conf->callback);
	271	// v9938_reset(0);
272	272	}
273	273	}
274	274

src/mess/machine/ti99/tn_ide.c
r14279	r14280
391	391	MACHINE_CONFIG_FRAGMENT( tn_ide )
392	392	MCFG_RTC65271_ADD( "ide_rtc", clock_interrupt_callback )
393	393	MCFG_IDE_CONTROLLER_ADD( "ide", ide_interrupt_callback )
394		MCFG_IDE_CONTROLLER_REGIONS(":peribox:idehd0:drive", NULL)
	394	MCFG_IDE_CONTROLLER_REGIONS(":peribox:idehd0:drive", NULL)
395	395	MACHINE_CONFIG_END
396	396
397	397	static const char DEVTEMPLATE_SOURCE[] = __FILE__;

src/mess/machine/vic1111.h
r14279	r14280
35	35	protected:
36	36	// device-level overrides
37	37	virtual void device_start();
38
	38
39	39	// device_vic20_expansion_card_interface overrides
40	40	virtual UINT8 vic20_blk1_r(address_space &space, offs_t offset);
41	41	virtual void vic20_blk1_w(address_space &space, offs_t offset, UINT8 data);

src/mess/machine/ecbbus.h
r14279	r14280
115	115
116	116	DECLARE_WRITE_LINE_MEMBER( int_w );
117	117	DECLARE_WRITE_LINE_MEMBER( nmi_w );
118
	118
119	119	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
120	120
121	121	protected:

src/mess/machine/aim65.c
r14279	r14280
170	170	WRITE8_MEMBER( aim65_state::aim65_pb_w )
171	171	{
172	172	/*
173		d7 = cass out (both decks)
174		d5 = cass2 motor
175		d4 = cass1 motor
176		d2 = tty out (not emulated)
177		d0/1 = printer data (not emulated)
	173	d7 = cass out (both decks)
	174	d5 = cass2 motor
	175	d4 = cass1 motor
	176	d2 = tty out (not emulated)
	177	d0/1 = printer data (not emulated)
178	178	*/
179	179
180	180	UINT8 bits = data ^ m_pb_save;
r14279	r14280
207	207	READ8_MEMBER( aim65_state::aim65_pb_r )
208	208	{
209	209	/*
210		d7 = cassette in (deck 1)
211		d6 = tty in (not emulated)
212		d3 = kb/tty switch
	210	d7 = cassette in (deck 1)
	211	d6 = tty in (not emulated)
	212	d3 = kb/tty switch
213	213	*/
214	214
215	215	UINT8 data = input_port_read(machine(), "switches");
r14279	r14280
260	260
261	261	/* Part of aim65_pb_w
262	262
263		data &= 0x03;
	263	data &= 0x03;
264	264
265		if (m_flag_b == 0)
266		{
267		printerRAM[(m_printer_y * 20) + m_printer_x ] \|= (data << 8);
268		m_flag_b = 1;
269		}
	265	if (m_flag_b == 0)
	266	{
	267	printerRAM[(m_printer_y * 20) + m_printer_x ] \|= (data << 8);
	268	m_flag_b = 1;
	269	}
270	270	*/
271	271
272	272
273	273	/* Items for driver state
274	274
275		emu_timer *m_print_timer;
276		int m_printer_x;
277		int m_printer_y;
278		bool m_printer_dir;
279		bool m_flag_a;
280		bool m_flag_b;
281		bool m_printer_level;
282		UINT16 *m_printerRAM;
	275	emu_timer *m_print_timer;
	276	int m_printer_x;
	277	int m_printer_y;
	278	bool m_printer_dir;
	279	bool m_flag_a;
	280	bool m_flag_b;
	281	bool m_printer_level;
	282	UINT16 *m_printerRAM;
283	283	*/
284	284
285	285
r14279	r14280
296	296
297	297
298	298	/* From Machine Config
299		MCFG_VIDEO_START(aim65)
300		MCFG_VIDEO_UPDATE(aim65)
	299	MCFG_VIDEO_START(aim65)
	300	MCFG_VIDEO_UPDATE(aim65)
301	301	*/
302	302
303	303

src/mess/machine/vic1210.c
r14279	r14280
1	1	/**********************************************************************
2	2
3	3	Commodore VIC-1210 3K RAM Expansion Cartridge emulation
4		Commodore VIC-1211A Super Expander with 3K RAM Cartridge emulation
	4	Commodore VIC-1211A Super Expander with 3K RAM Cartridge emulation
5	5
6	6	Copyright MESS Team.
7	7	Visit http://mamedev.org for licensing and usage restrictions.

src/mess/machine/vic1112.c
r14279	r14280
81	81
82	82	bit description
83	83
84		PB0
85		PB1
86		PB2
	84	PB0
	85	PB1
	86	PB2
87	87	PB3 _EOI
88	88	PB4 _DAV IN
89	89	PB5 _NRFD IN
r14279	r14280
112	112	PB0 _DAV OUT
113	113	PB1 _NRFD OUT
114	114	PB2 _NDAC OUT
115		PB3
116		PB4
117		PB5
118		PB6
119		PB7
	115	PB3
	116	PB4
	117	PB5
	118	PB6
	119	PB7
120	120
121	121	*/
122	122
r14279	r14280
226	226	{
227	227	// find memory regions
228	228	m_rom = subregion("blk5")->base();
229
	229
230	230	// state saving
231	231	save_item(NAME(m_via0_irq));
232	232	save_item(NAME(m_via1_irq));
r14279	r14280
251	251	UINT8 vic1112_device::vic20_io2_r(address_space &space, offs_t offset)
252	252	{
253	253	UINT8 data = 0;
254
	254
255	255	if (offset & 0x10)
256	256	{
257	257	data = m_via1->read(space, offset & 0x0f);
r14279	r14280
260	260	{
261	261	data = m_via0->read(space, offset & 0x0f);
262	262	}
263
	263
264	264	return data;
265	265	}
266	266
r14279	r14280
289	289	UINT8 vic1112_device::vic20_blk5_r(address_space &space, offs_t offset)
290	290	{
291	291	UINT8 data = 0;
292
	292
293	293	if (offset & 0x1000)
294	294	{
295	295	data = m_rom[offset & 0x7ff];
296	296	}
297
	297
298	298	return data;
299	299	}

src/mess/machine/vic1210.h
r14279	r14280
1	1	/**********************************************************************
2	2
3	3	Commodore VIC-1210 3K RAM Expansion Cartridge emulation
4		Commodore VIC-1211A Super Expander with 3K RAM Cartridge emulation
	4	Commodore VIC-1211A Super Expander with 3K RAM Cartridge emulation
5	5
6	6	Copyright MESS Team.
7	7	Visit http://mamedev.org for licensing and usage restrictions.
r14279	r14280
33	33	// construction/destruction
34	34	vic1210_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t *owner, UINT32 clock);
35	35	vic1210_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
36
	36
37	37	protected:
38	38	// device-level overrides
39	39	virtual void device_start();
40
	40
41	41	// device_vic20_expansion_card_interface overrides
42	42	virtual UINT8 vic20_ram1_r(address_space &space, offs_t offset);
43	43	virtual void vic20_ram1_w(address_space &space, offs_t offset, UINT8 data);
r14279	r14280
65	65
66	66	// optional information overrides
67	67	virtual const rom_entry *device_rom_region() const;
68
	68
69	69	// device_vic20_expansion_card_interface overrides
70	70	virtual UINT8 vic20_blk5_r(address_space &space, offs_t offset);
71	71

src/mess/machine/vic1112.h
r14279	r14280
47	47	DECLARE_READ8_MEMBER( via0_pb_r );
48	48	DECLARE_WRITE8_MEMBER( via0_pb_w );
49	49	DECLARE_WRITE_LINE_MEMBER( via1_irq_w );
50
	50
51	51	protected:
52	52	// device-level overrides
53	53	virtual void device_start();
54	54	virtual void device_reset();
55	55	virtual void device_config_complete() { m_shortname = "vic1112"; }
56
	56
57	57	// device_vic20_expansion_card_interface overrides
58	58	virtual UINT8 vic20_io2_r(address_space &space, offs_t offset);
59	59	virtual void vic20_io2_w(address_space &space, offs_t offset, UINT8 data);

src/mess/machine/ncr5390.c
r14279	r14280
108	108	default:
109	109	logerror("ncr5390: device_timer unexpected param %d\n", param);
110	110	exit(0);
111		}
	111	}
112	112	}
113	113
114	114	void ncr5390_device::delay(int cycles, int param)

src/mess/machine/n82077aa.c
r14279	r14280
119	119	if(fi.dev && (diff & (0x10 << i)))
120	120	fi.dev->mon_w(!(dor & (0x10 << i)));
121	121	}
122
	122
123	123	}
124	124
125	125	READ8_MEMBER(n82077aa_device::tdr_r)
r14279	r14280
154	154	if(flopi[i].main_state == RECALIBRATE)
155	155	msr \|= 1<<i;
156	156
157		// fprintf(stderr, "msr_r %02x (%08x)\n", msr, cpu_get_pc(&space.device()));
	157	// fprintf(stderr, "msr_r %02x (%08x)\n", msr, cpu_get_pc(&space.device()));
158	158	return msr;
159	159	}
160	160
r14279	r14280
177	177	break;
178	178	default:
179	179	fprintf(stderr, "fifo_r in phase %d\n", main_phase);
180		// exit(1);
	180	// exit(1);
181	181	}
182	182
183	183	fprintf(stderr, "fifo_r %02x (%08x)\n", r, cpu_get_pc(&space.device()));
r14279	r14280
195	195	break;
196	196	if(cmd == C_INVALID) {
197	197	fprintf(stderr, "Invalid on %02x\n", command[0]);
198		// exit(1);
	198	// exit(1);
199	199	command_pos = 0;
200	200	return;
201	201	}
r14279	r14280
282	282	cur_live.data_bit_context = false;
283	283	cur_live.byte_counter = 0;
284	284	cur_live.pll.reset(cur_live.tm);
285		// cur_live.pll.set_clock(attotime::from_hz(rates[dsr & 3]*2));
	285	// cur_live.pll.set_clock(attotime::from_hz(rates[dsr & 3]*2));
286	286	cur_live.pll.set_clock(attotime::from_hz(rates[dsr & 3]));
287	287	checkpoint_live = cur_live;
288	288	fi.live = true;
r14279	r14280
336	336
337	337	void n82077aa_device::live_abort()
338	338	{
339
	339
340	340	if(!cur_live.tm.is_never() && cur_live.tm > machine().time()) {
341	341	rollback();
342	342	live_run(machine().time());
r14279	r14280
515	515	}
516	516
517	517	case SEARCH_ADDRESS_MARK_DATA_FAILED:
518		// status \|= S_RNF;
	518	// status \|= S_RNF;
519	519	cur_live.state = IDLE;
520	520	return;
521	521
r14279	r14280
542	542	}
543	543
544	544	case READ_SECTOR_DATA_BYTE:
545		// fprintf(stderr, "databyte = %02x\n", cur_live.data_reg);
	545	// fprintf(stderr, "databyte = %02x\n", cur_live.data_reg);
546	546	fifo_push(cur_live.data_reg);
547	547	cur_live.state = READ_SECTOR_DATA;
548	548	checkpoint();
r14279	r14280
594	594	return C_SENSE_INTERRUPT_STATUS;
595	595
596	596	case 0x0f:
597
	597
598	598	case 0x12:
599	599	return command_pos == 2 ? C_PERPENDICULAR : C_INCOMPLETE;
600	600
r14279	r14280
727	727	command_end(fi, 0);
728	728	return;
729	729	}
730		fi.sub_state = SEEK_MOVE;
	730	fi.sub_state = SEEK_MOVE;
731	731	break;
732	732	}
733	733	}
r14279	r14280
738	738	{
739	739	fi.main_state = READ_DATA;
740	740	fi.sub_state = HEAD_LOAD_DONE;
741
	741
742	742	fprintf(stderr, "Read data%s%s%s\n",
743	743	command[0] & 0x80 ? " mt" : "",
744	744	command[0] & 0x40 ? " mfm" : "",
r14279	r14280
964	964	cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3],
965	965	command[2], command[3], command[4], command[5]);
966	966	return
967		cur_live.idbuf[0] == command[2] &&
968		cur_live.idbuf[1] == command[3] &&
969		cur_live.idbuf[2] == command[4] &&
	967	cur_live.idbuf[0] == command[2] &&
	968	cur_live.idbuf[1] == command[3] &&
	969	cur_live.idbuf[2] == command[4] &&
970	970	cur_live.idbuf[3] == command[5];
971	971	}
972	972

src/mess/machine/ncr5390.h
r14279	r14280
14	14	ncr5390_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
15	15	void set_cb(line_cb_t irq_cb, line_cb_t drq_cb);
16	16	void set_slots(const SCSIConfigTable &slots);
17
	17
18	18	DECLARE_ADDRESS_MAP(map, 8);
19	19
20	20	DECLARE_READ8_MEMBER(tcount_lo_r);

src/mess/machine/nextmo.c
r14279	r14280
89	89	sector_pos = 0;
90	90	if(!drq_cb.isnull())
91	91	drq_cb(true);
92		}
	92	}
93	93	}
94	94
95	95	UINT8 nextmo_device::dma_r()

src/mess/machine/n82077aa.h
r14279	r14280
79	79	SEARCH_ADDRESS_MARK_DATA_FAILED,
80	80	READ_SECTOR_DATA,
81	81	READ_SECTOR_DATA_BYTE,
82
	82
83	83	};
84	84
85	85	struct pll_t {

src/mess/machine/isa_mpu401.c
r14279	r14280
1	1	/***************************************************************************
2	2
3		MPU-401 MIDI device interface
	3	MPU-401 MIDI device interface
4	4
5		TODO:
6		- skeleton, doesn't do anything
	5	TODO:
	6	- skeleton, doesn't do anything
7	7
8	8	***************************************************************************/
9	9

src/mess/machine/vic20std.c
r14279	r14280
50	50	UINT8 vic20_standard_cartridge_device::vic20_blk1_r(address_space &space, offs_t offset)
51	51	{
52	52	UINT8 data = 0;
53
	53
54	54	if (m_blk1 != NULL)
55	55	{
56	56	data = m_blk1[offset & 0x1fff];
57	57	}
58
	58
59	59	return data;
60	60	}
61	61
r14279	r14280
67	67	UINT8 vic20_standard_cartridge_device::vic20_blk2_r(address_space &space, offs_t offset)
68	68	{
69	69	UINT8 data = 0;
70
	70
71	71	if (m_blk2 != NULL)
72	72	{
73	73	data = m_blk2[offset & 0x1fff];
74	74	}
75
	75
76	76	return data;
77	77	}
78	78
r14279	r14280
84	84	UINT8 vic20_standard_cartridge_device::vic20_blk3_r(address_space &space, offs_t offset)
85	85	{
86	86	UINT8 data = 0;
87
	87
88	88	if (m_blk3 != NULL)
89	89	{
90	90	data = m_blk3[offset & 0x1fff];
91	91	}
92
	92
93	93	return data;
94	94	}
95	95
r14279	r14280
101	101	UINT8 vic20_standard_cartridge_device::vic20_blk5_r(address_space &space, offs_t offset)
102	102	{
103	103	UINT8 data = 0;
104
	104
105	105	if (m_blk5 != NULL)
106	106	{
107	107	data = m_blk5[offset & 0x1fff];
108	108	}
109
	109
110	110	return data;
111	111	}
112	112
r14279	r14280
121	121	{
122	122	m_blk1 = auto_alloc_array(machine(), UINT8, 0x2000);
123	123	}
124
	124
125	125	return m_blk1;
126	126	}
127	127
r14279	r14280
136	136	{
137	137	m_blk2 = auto_alloc_array(machine(), UINT8, 0x2000);
138	138	}
139
	139
140	140	return m_blk2;
141	141	}
142	142
r14279	r14280
151	151	{
152	152	m_blk3 = auto_alloc_array(machine(), UINT8, 0x2000);
153	153	}
154
	154
155	155	return m_blk3;
156	156	}
157	157
r14279	r14280
166	166	{
167	167	m_blk5 = auto_alloc_array(machine(), UINT8, 0x2000);
168	168	}
169
	169
170	170	return m_blk5;
171	171	}

src/mess/machine/c64user.h
r14279	r14280
138	138
139	139	// reset
140	140	virtual void c64_reset_w(int level) { };
141
	141
142	142	protected:
143	143	c64_user_port_device *m_slot;
144	144	};

src/mess/machine/vic20std.h
r14279	r14280
31	31	public:
32	32	// construction/destruction
33	33	vic20_standard_cartridge_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
34
	34
35	35	protected:
36	36	// device-level overrides
37	37	virtual void device_start();
38
	38
39	39	// device_vic20_expansion_card_interface overrides
40	40	virtual UINT8 vic20_blk1_r(address_space &space, offs_t offset);
41	41	virtual UINT8 vic20_blk2_r(address_space &space, offs_t offset);

src/mess/machine/lynx.c
r14279	r14280
701	701	lynx_blit_8color_rle_line,
702	702	lynx_blit_16color_rle_line
703	703	};
704
	704
705	705	int i; int colors;
706	706
707	707	state->m_blitter.memory_accesses = 0;
r14279	r14280
709	709
710	710	// these might be never set by the state->m_blitter hardware
711	711	state->m_sprite_collide = 0;
712
	712
713	713	//state->m_blitter.busy = 1; // blitter working (there's a bug somewhere that's causing slowdown when this is enabled)
714	714
715	715	// Last SCB is indicated by zero in the high byte of SCBNEXT
r14279	r14280
800	800	lynx_blit_lines(state);
801	801	}
802	802	}
803
	803
804	804	if (0) // turned off for now as it cuases slowdown in some games due to a bug somewhere
805	805	{
806	806	if (state->m_blitter.memory_accesses != 0)
r14279	r14280
1316	1316	UINT16 j; // clipping needed!
1317	1317	UINT8 byte;
1318	1318	UINT16 *line;
1319
1320
1321		// calculate y: first three lines are vblank,
	1319
	1320
	1321	// calculate y: first three lines are vblank,
1322	1322	y = 101-state->m_timer[2].counter;
1323	1323	// Documentation states lower two bits of buffer address are ignored (thus 0xfffc mask)
1324	1324	j = (state->m_mikey.disp_addr & 0xfffc) + y * 160 / 2;
r14279	r14280
1427	1427	}
1428	1428	lynx_timer_count_down( machine, 2 );
1429	1429	break;
1430		case 2:
	1430	case 2:
1431	1431	copybitmap(state->m_bitmap, state->m_bitmap_temp, 0, 0, 0, 0, machine.primary_screen->cliprect());
1432	1432	lynx_timer_count_down( machine, 4 );
1433	1433	break;
r14279	r14280
1554	1554	{
1555	1555	//logerror("timer %d write %x %.2x\n", which, offset, data);
1556	1556	attotime t;
1557
	1557
1558	1558	if ( state->m_timer[which].timer_active && ((state->m_timer[which].cntrl1 & 0x07) != 0x07))
1559	1559	{
1560	1560	state->m_timer[which].counter = (UINT8) (state->m_timer[which].timer->remaining().as_ticks(1000000>>(state->m_timer[which].cntrl1 & 0x07)));
r14279	r14280
1940	1940	*/
1941	1941
1942	1942	lynx_uart_reset(state);
1943
	1943
1944	1944	// hack to allow current object loading to work
1945	1945	#if 0
1946	1946	lynx_timer_write( state, 0, 0, 160 ); // set backup value (hpos) = 160
r14279	r14280
1959	1959	{
1960	1960	lynx_state *state = machine.driver_data<lynx_state>();
1961	1961	state->m_bitmap_temp.allocate(160,102,0,0);
1962
	1962
1963	1963	int i;
1964	1964	state->save_item(NAME(state->m_memory_config));
1965	1965	state->save_pointer(NAME(state->m_mem_fe00), state->m_mem_fe00_size);

src/mess/machine/isa.c
r14279	r14280
290	290	} else {
291	291	// we handle just misalligned by 2
292	292	m_maincpu->memory().space(AS_IO)->install_readwrite_handler(start-2, end, mask, mirror, rhandler, whandler, 0xffff0000);
293		}
	293	}
294	294	break;
295	295	default:
296	296	fatalerror("ISA8: Bus width %d not supported", buswidth);

src/mess/machine/isa.h
r14279	r14280
158	158	void install_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror, const char tag, UINT8 data);
159	159	void install_rom(device_t dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, const char tag, const char *region);
160	160	void install_memory(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_space_func rhandler, const char* rhandler_name, write8_space_func whandler, const char *whandler_name);
161
	161
162	162	void unmap_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror);
163	163	void unmap_rom(offs_t start, offs_t end, offs_t mask, offs_t mirror);
164	164

src/mess/machine/wangpcbus.c
r14279	r14280
144	144	void wangpcbus_device::add_wangpcbus_card(device_wangpcbus_card_interface *card, int sid)
145	145	{
146	146	m_device_list.append(*card);
147
	147
148	148	card->m_bus = this;
149	149	card->m_sid = sid;
150	150	}
r14279	r14280
242	242	{
243	243	UINT8 retVal = 0xff;
244	244	device_wangpcbus_card_interface *entry = m_device_list.first();
245
	245
246	246	while (entry)
247	247	{
248		if (entry->wangpcbus_have_dack(line))
	248	if (entry->wangpcbus_have_dack(line))
249	249	{
250	250	retVal = entry->wangpcbus_dack_r(line);
251	251	break;
252	252	}
253
	253
254	254	entry = entry->next();
255	255	}
256
	256
257	257	return retVal;
258	258	}
259	259
r14279	r14280
265	265	void wangpcbus_device::dack_w(int line,UINT8 data)
266	266	{
267	267	device_wangpcbus_card_interface *entry = m_device_list.first();
268
	268
269	269	while (entry)
270	270	{
271	271	if (entry->wangpcbus_have_dack(line))
272	272	{
273	273	entry->wangpcbus_dack_w(line,data);
274	274	}
275
	275
276	276	entry = entry->next();
277	277	}
278	278	}
r14279	r14280
285	285	void wangpcbus_device::tc_w(int state)
286	286	{
287	287	device_wangpcbus_card_interface *entry = m_device_list.first();
288
	288
289	289	while (entry)
290	290	{
291	291	entry->wangpcbus_tc_w(state);

src/mess/machine/ecb_grip.c
r14279	r14280
249	249	static MC6845_UPDATE_ROW( grip5_update_row )
250	250	{
251	251	grip5_state *state = device->machine().driver_data<grip5_state>();
252		const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
	252	const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
253	253	int column, bit;
254	254
255	255	for (column = 0; column < x_count; column++)

src/mess/machine/isa_finalchs.c
r14279	r14280
1	1	/***************************************************************************
2	2
3		Final Chess Card by TASC
	3	Final Chess Card by TASC
4	4
5		TODO:
6		- skeleton, just boots the CPU
	5	TODO:
	6	- skeleton, just boots the CPU
7	7
8	8	***************************************************************************/
9	9

src/mess/video/wswan.c
r14279	r14280
610	610	{
611	611	machine().primary_screen->register_screen_bitmap(m_bitmap);
612	612	}
613
	613
614	614	UINT32 wswan_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
615	615	{
616	616	copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect);

src/mess/video/pc8401a.c
r14279	r14280
21	21
22	22	UINT32 pc8500_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
23	23	{
24		// m_lcdc->screen_update(screen, bitmap, cliprect);
	24	// m_lcdc->screen_update(screen, bitmap, cliprect);
25	25
26	26	/*
27	27	if (strcmp(screen.tag(), SCREEN_TAG) == 0)

src/mess/video/rm380z.c
r14279	r14280
18	18	{
19	19	int mx=3;
20	20	if (y==6) mx=4;
21
	21
22	22	for (int r=y;r<(y+mx);r++)
23	23	{
24	24	for (int c=x;c<(x+3);c++)
r14279	r14280
33	33	for (int c=0;c<0x3f;c++)
34	34	{
35	35	if (c&0x01) put_point(c,0,0,1);
36		else put_point(c,0,0,0);
	36	else put_point(c,0,0,0);
37	37
38	38	if (c&0x02) put_point(c,3,0,1);
39		else put_point(c,3,0,0);
	39	else put_point(c,3,0,0);
40	40
41	41	if (c&0x04) put_point(c,0,3,1);
42		else put_point(c,0,3,0);
	42	else put_point(c,0,3,0);
43	43
44	44	if (c&0x08) put_point(c,3,3,1);
45		else put_point(c,3,3,0);
	45	else put_point(c,3,3,0);
46	46
47	47	if (c&0x10) put_point(c,0,6,1);
48		else put_point(c,0,6,0);
	48	else put_point(c,0,6,0);
49	49
50	50	if (c&0x20) put_point(c,3,6,1);
51		else put_point(c,3,6,0);
	51	else put_point(c,3,6,0);
52	52	}
53	53	}
54	54
r14279	r14280
59	59	// 80 cols
60	60	m_videomode=RM380Z_VIDEOMODE_80COL;
61	61	}
62		else
	62	else
63	63	{
64	64	// 40 cols
65	65	m_videomode=RM380Z_VIDEOMODE_40COL;
r14279	r14280
83	83	{
84	84	UINT8 ch1=m_vramchars[pos];
85	85	UINT8 ch2=m_vramattribs[pos];
86
	86
87	87	// "special" (unknown) cases first
88	88	if ((ch1==0x80)&&(ch2==0x04))
89	89	{
r14279	r14280
147	147	{
148	148	int sourceaddr=(row*lineWidth)+c;
149	149	int destaddr=((row-1)*lineWidth)+c;
150
	150
151	151	state->m_vram[destaddr]=state->m_vram[sourceaddr];
152	152	state->m_vramchars[destaddr]=state->m_vramchars[sourceaddr];
153	153	state->m_vramattribs[destaddr]=state->m_vramattribs[sourceaddr];
154	154	}
155	155	}
156
	156
157	157	// the last line is filled with spaces
158	158
159	159	for (int c=0;c<lineWidth;c++)
r14279	r14280
161	161	state->m_vram[((RM380Z_SCREENROWS-1)*lineWidth)+c]=0x20;
162	162	state->m_vramchars[((RM380Z_SCREENROWS-1)*lineWidth)+c]=0x20;
163	163	state->m_vramattribs[((RM380Z_SCREENROWS-1)*lineWidth)+c]=0x00;
164		}
	164	}
165	165	}
166	166
167	167	void rm380z_state::check_scroll_register()
168	168	{
169	169	UINT8 r[3];
170
	170
171	171	r[0]=m_old_old_fbfd;
172	172	r[1]=m_old_fbfd;
173	173	r[2]=m_fbfd;
r14279	r14280
175	175	if ( ((r[1]&0x20)==0) && ((r[2]&0x20)==0) )
176	176	{
177	177	// it's a scroll command
178
	178
179	179	if (r[2]>r[1])
180	180	{
181	181	scroll_videoram();
r14279	r14280
185	185	// wrap-scroll
186	186	scroll_videoram();
187	187	}
188
	188
189	189	}
190	190	}
191	191
r14279	r14280
202	202	rm380z_state *state = machine().driver_data<rm380z_state>();
203	203
204	204	//printf("vramw [%2.2x][%2.2x] port0 [%2.2x] fbfd [%2.2x] fbfe [%2.2x] PC [%4.4x]\n",offset,data,state->m_port0,m_fbfd,m_fbfe,cpu_get_pc(machine().device("maincpu")));
205
	205
206	206	int lineWidth=0x80;
207	207	if (m_videomode==RM380Z_VIDEOMODE_40COL)
208	208	{
209	209	lineWidth=0x40;
210	210	}
211
	211
212	212	int rowadder=(m_fbfe&0x0f)*2;
213	213	if (m_videomode==RM380Z_VIDEOMODE_40COL) rowadder=0; // FBFE register is not used in VDU-40
214	214
r14279	r14280
243	243	//bool attrDim=false;
244	244	bool attrRev=false;
245	245	bool attrUnder=false;
246
	246
247	247	if (attribs&0x02) attrUnder=true;
248	248	//if (attribs&0x04) attrDim=true;
249	249	if (attribs&0x08) attrRev=true;
250
	250
251	251	if ((charnum>0)&&(charnum<=0x7f))
252	252	{
253	253	// normal chars (base set)
r14279	r14280
256	256	{
257	257	int basex=RM380Z_CHDIMX*(charnum/RM380Z_NCY);
258	258	int basey=RM380Z_CHDIMY*(charnum%RM380Z_NCY);
259
	259
260	260	for (int r=0;r<RM380Z_CHDIMY;r++)
261	261	{
262	262	for (int c=0;c<RM380Z_CHDIMX;c++)
263	263	{
264	264	UINT8 chval=(chsb[((basey+r)(RM380Z_CHDIMXRM380Z_NCX))+(basex+c)])==0xff?0:1;
265
	265
266	266	if (attrRev)
267	267	{
268	268	if (chval==0) chval=1;
269	269	else chval=0;
270	270	}
271
272		if (attrUnder)
	271
	272	if (attrUnder)
273	273	{
274	274	if (r==(RM380Z_CHDIMY-1))
275	275	{
r14279	r14280
282	282	*dest=chval;
283	283	}
284	284	}
285
	285
286	286	// last pixel of underline
287		if (attrUnder&&(!attrRev))
	287	if (attrUnder&&(!attrRev))
288	288	{
289	289	UINT16 dest=&bitmap.pix16((y(RM380Z_CHDIMY+1))+(RM380Z_CHDIMY-1),(x*(RM380Z_CHDIMX+1))+RM380Z_CHDIMX);
290	290	*dest=attrRev?0:1;
291	291	}
292
	292
293	293	// if reversed, print another column of pixels on the right
294	294	if (attrRev)
295	295	{
r14279	r14280
304	304	{
305	305	int basex=RM380Z_CHDIMX*(charnum/RM380Z_NCY);
306	306	int basey=RM380Z_CHDIMY*(charnum%RM380Z_NCY);
307
	307
308	308	for (int r=0;r<RM380Z_CHDIMY;r++)
309	309	{
310	310	for (int c=0;c<(RM380Z_CHDIMX*2);c+=2)
311	311	{
312	312	UINT8 chval=(chsb[((basey+r)(RM380Z_CHDIMXRM380Z_NCX))+(basex+(c/2))])==0xff?0:1;
313
	313
314	314	if (attrRev)
315	315	{
316	316	if (chval==0) chval=1;
317	317	else chval=0;
318	318	}
319	319
320		if (attrUnder)
	320	if (attrUnder)
321	321	{
322	322	if (r==(RM380Z_CHDIMY-1))
323	323	{
r14279	r14280
328	328
329	329	UINT16 dest=&bitmap.pix16( (y(RM380Z_CHDIMY+1))+r,((x(RM380Z_CHDIMX+1))2)+c);
330	330	UINT16 dest2=&bitmap.pix16( (y(RM380Z_CHDIMY+1))+r,((x(RM380Z_CHDIMX+1))2)+c+1);
331		*dest=chval;
	331	*dest=chval;
332	332	*dest2=chval;
333	333	}
334	334	}
335	335
336	336	// last 2 pixels of underline
337		if (attrUnder)
	337	if (attrUnder)
338	338	{
339	339	UINT16 dest=&bitmap.pix16( (y(RM380Z_CHDIMY+1))+RM380Z_CHDIMY-1 , ((x(RM380Z_CHDIMX+1))2)+(RM380Z_CHDIMX*2));
340	340	UINT16 dest2=&bitmap.pix16( (y(RM380Z_CHDIMY+1))+RM380Z_CHDIMY-1 , ((x(RM380Z_CHDIMX+1))2)+(RM380Z_CHDIMX*2)+1);
341		*dest=attrRev?0:1;
	341	*dest=attrRev?0:1;
342	342	*dest2=attrRev?0:1;
343	343	}
344
	344
345	345	// if reversed, print another 2 columns of pixels on the right
346	346	if (attrRev)
347	347	{
r14279	r14280
349	349	{
350	350	UINT16 dest=&bitmap.pix16( (y(RM380Z_CHDIMY+1))+r,((x(RM380Z_CHDIMX+1))2)+((RM380Z_CHDIMX)*2));
351	351	UINT16 dest2=&bitmap.pix16( (y(RM380Z_CHDIMY+1))+r,((x(RM380Z_CHDIMX+1))2)+((RM380Z_CHDIMX)*2)+1);
352		*dest=1;
	352	*dest=1;
353	353	*dest2=1;
354	354	}
355	355	}
r14279	r14280
391	391
392	392	int lineWidth=0x80;
393	393	int ncols=80;
394
	394
395	395	if (m_videomode==RM380Z_VIDEOMODE_40COL)
396	396	{
397	397	lineWidth=0x40;
r14279	r14280
407	407	{
408	408	UINT8 curch,attribs;
409	409	decode_videoram_char((row*lineWidth)+col,curch,attribs);
410		putChar(curch,attribs,col,row,bitmap,pChar,m_videomode);
411		//putChar(0x44,0x00,10,10,bitmap,pChar,m_videomode);
	410	putChar(curch,attribs,col,row,bitmap,pChar,m_videomode);
	411	//putChar(0x44,0x00,10,10,bitmap,pChar,m_videomode);
412	412	}
413	413	}
414	414	}

src/mess/video/arcadia.c
r14279	r14280
498	498	{
499	499	case 0xc0: graphics=TRUE;break;
500	500	case 0x40: graphics=FALSE;break;
501		// case 0x80:
502		// alien invaders shields are empty 0x80
503		// popmessage(5, "graphics code 0x80 used");
	501	// case 0x80:
	502	// alien invaders shields are empty 0x80
	503	// popmessage(5, "graphics code 0x80 used");
504	504	}
505	505	}
506	506	if (graphics)

src/mess/video/spectrum.c
r14279	r14280
76	76	}
77	77
78	78	/* Empty event buffer for undisplayed frames noting the last border
79		colour (in case colours are not changed in the next frame). */
	79	colour (in case colours are not changed in the next frame). */
80	80	NumItems = spectrum_EventList_NumEvents(screen.machine());
81	81	if (NumItems)
82	82	{

src/mess/video/mikromik.c
r14279	r14280
100	100	{
101	101	// find memory regions
102	102	m_char_rom = machine().region("chargen")->base();
103
	103
104	104	machine().primary_screen->register_screen_bitmap(m_bitmap);
105	105	}
106	106

src/mess/video/fmtowns.c
r14279	r14280
265	265	else
266	266	return 0x00;
267	267	case 0x06:
268		// if(m_video.towns_vblank_flag != 0)
269		// return 0x10;
270		// else
271		// return 0x00;
	268	// if(m_video.towns_vblank_flag != 0)
	269	// return 0x10;
	270	// else
	271	// return 0x00;
272	272	case 0x16: // Kanji character data
273	273	return ROM[(m_video.towns_kanji_offset << 1) + 0x180000];
274	274	case 0x17: // Kanji character data

src/mess/video/a7800.c
r14279	r14280
74	74	state->m_maria_bcntl = 0;
75	75	state->m_maria_kangaroo = 0;
76	76	state->m_maria_rm = 0;
77
	77
78	78	machine.primary_screen->register_screen_bitmap(state->m_bitmap);
79	79	}
80	80

src/mess/video/intv.c
r14279	r14280
40	40	//int i,j,k;
41	41
42	42	state->m_tms9927_num_rows = 25;
43
	43
44	44	machine.primary_screen->register_screen_bitmap(state->m_bitmap);
45	45
46	46	#if 0

src/mess/video/isa_vga.h
r14279	r14280
19	19	public:
20	20	// construction/destruction
21	21	isa8_vga_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
22
	22
23	23	// optional information overrides
24	24	virtual machine_config_constructor device_mconfig_additions() const;
25	25	virtual const rom_entry *device_rom_region() const;

src/mess/video/vic6567.h
r14279	r14280
35	35	devcb_read8 in_button_cb;
36	36
37	37	devcb_read8 in_dma_read_cb;
38		devcb_read8 in_dma_read_color_cb;
	38	devcb_read8 in_dma_read_color_cb;
39	39	devcb_write_line out_irq_cb;
40	40
41	41	devcb_read8 in_rdy_cb;

src/mess/video/tms3556.c
r14279	r14280
115	115	save_item(NAME(m_cg_flag));
116	116	save_item(NAME(m_char_line_counter));
117	117	save_item(NAME(m_dbl_h_phase));
118
	118
119	119	machine().primary_screen->register_screen_bitmap(m_bitmap);
120	120	}
121	121

src/mess/video/tms3556.h
r14279	r14280
57	57	DECLARE_WRITE8_MEMBER( reg_w );
58	58
59	59	void interrupt(running_machine &machine);
60
	60
61	61	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
62	62
63	63	protected:

src/mess/video/galaxy.c
r14279	r14280
117	117
118	118	state->m_gal_video_timer = machine.scheduler().timer_alloc(FUNC(gal_video));
119	119	state->m_gal_video_timer->adjust(attotime::zero, 0, attotime::never);
120
	120
121	121	machine.primary_screen->register_screen_bitmap(state->m_bitmap);
122	122	}
123	123

src/mess/includes/gba.h
r14279	r14280
138	138	public:
139	139	gba_state(const machine_config &mconfig, device_type type, const char *tag)
140	140	: driver_device(mconfig, type, tag) { }
141
	141
142	142	virtual void video_start();
143
	143
144	144	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
145	145
146	146	bitmap_ind16 m_bitmap;

src/mess/includes/wswan.h
r14279	r14280
129	129	: driver_device(mconfig, type, tag),
130	130	m_maincpu(*this, "maincpu")
131	131	{ }
132
	132
133	133	virtual void video_start();
134
	134
135	135	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
136	136
137	137	required_device<cpu_device> m_maincpu;

src/mess/includes/zx.h
r14279	r14280
23	23	: driver_device(mconfig, type, tag) { }
24	24
25	25	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
26
	26
27	27	bitmap_ind16 m_bitmap;
28	28
29	29	DECLARE_READ8_MEMBER(zx_ram_r);

src/mess/includes/rm380z.h
r14279	r14280
70	70
71	71	int m_rasterlineCtr;
72	72	emu_timer* m_vblankTimer;
73
	73
74	74	int m_old_fbfd;
75	75	int m_old_old_fbfd;
76
	76
77	77	int m_videomode;
78	78	int m_old_videomode;
79
	79
80	80	required_device<cpu_device> m_maincpu;
81	81	required_device<ram_device> m_messram;
82	82	optional_device<device_t> m_fdc;

src/mess/includes/pc1512.h
r14279	r14280
100	100	virtual void machine_reset();
101	101
102	102	virtual void video_start();
103
	103
104	104	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
105	105
106	106	void update_speaker();

src/mess/includes/pokemini.h
r14279	r14280
61	61	bitmap_ind16 m_bitmap;
62	62	virtual void video_start();
63	63	virtual void machine_start();
64
	64
65	65	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
66	66	};
67	67

src/mess/includes/gb.h
r14279	r14280
179	179	UINT8 m_mmm01_bank_mask;
180	180	gb_lcd_t m_lcd;
181	181	void (*update_scanline)( running_machine &machine );
182
	182
183	183	bitmap_ind16 m_bitmap;
184	184	};
185	185

src/mess/includes/gamecom.h
r14279	r14280
237	237	bitmap_ind16 m_bitmap;
238	238	void gamecom_set_mmu(UINT8 mmu, UINT8 data);
239	239	void handle_stylus_press(int column);
240
	240
241	241	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
242	242	};
243	243

src/mess/includes/radio86.h
r14279	r14280
18	18	: driver_device(mconfig, type, tag) { }
19	19
20	20	virtual void video_start();
21
	21
22	22	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
23
	23
24	24	bitmap_ind16 m_bitmap;
25	25
26	26	UINT8 m_tape_value;

src/mess/includes/next.h
r14279	r14280
109	109	static const floppy_format_type floppy_formats[];
110	110	static const cdrom_interface cdrom_intf;
111	111	static const harddisk_interface harddisk_intf;
112
	112
113	113	protected:
114	114	struct dma_slot {
115	115	UINT32 start, limit, chain_start, chain_limit, current;

src/mess/includes/vic20.h
r14279	r14280
51	51	required_device<cassette_image_device> m_cassette;
52	52	required_device<ram_device> m_ram;
53	53	required_device<timer_device> m_cassette_timer;
54
	54
55	55	virtual void machine_start();
56	56
57	57	DECLARE_READ8_MEMBER( via0_pa_r );

src/mess/includes/lynx.h
r14279	r14280
45	45	int everon;
46	46	int memory_accesses;
47	47	attotime time;
48
	48
49	49	int no_collide;
50	50	int vstretch;
51	51	int lefthanded;

src/mess/includes/atarist.h
r14279	r14280
101	101	void machine_start();
102	102
103	103	void video_start();
104
	104
105	105	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
106	106
107	107	// video
r14279	r14280
271	271	emu_timer *m_mouse_timer;
272	272	emu_timer *m_glue_timer;
273	273	emu_timer *m_shifter_timer;
274
	274
275	275	bitmap_rgb32 m_bitmap;
276	276
277	277	floppy_image_device *floppy_devices[2];

src/mess/includes/wangpc.h
r14279	r14280
63	63	m_ds1(1),
64	64	m_ds2(1)
65	65	{ }
66
	66
67	67	required_device<cpu_device> m_maincpu;
68	68	required_device<i8237_device> m_dmac;
69	69	required_device<device_t> m_pic;
r14279	r14280
80	80
81	81	virtual void machine_start();
82	82	virtual void machine_reset();
83
	83
84	84	void check_level1_interrupts();
85	85	void check_level2_interrupts();
86	86	void update_fdc_drq();
87	87	void update_fdc_tc();
88
	88
89	89	DECLARE_WRITE8_MEMBER( fdc_ctrl_w );
90	90	DECLARE_READ8_MEMBER( deselect_drive1_r );
91	91	DECLARE_WRITE8_MEMBER( deselect_drive1_w );
r14279	r14280
124	124	DECLARE_READ8_MEMBER( led_off_r );
125	125	DECLARE_WRITE8_MEMBER( parity_nmi_clr_w );
126	126	DECLARE_READ8_MEMBER( option_id_r );
127
	127
128	128	DECLARE_WRITE_LINE_MEMBER( hrq_w );
129	129	DECLARE_WRITE_LINE_MEMBER( eop_w );
130	130	DECLARE_READ8_MEMBER( memr_r );
r14279	r14280
152	152	DECLARE_WRITE_LINE_MEMBER( ack_w );
153	153	DECLARE_WRITE_LINE_MEMBER( busy_w );
154	154	DECLARE_WRITE_LINE_MEMBER( bus_irq2_w );
155
	155
156	156	UINT8 m_dma_page[3];
157	157	int m_dma_channel;
158
	158
159	159	int m_timer2_irq;
160	160	int m_ecpi_irq;
161	161	int m_acknlg;
r14279	r14280
165	165	int m_uart_dr;
166	166	int m_uart_tbre;
167	167	int m_fpu_irq;
168
	168
169	169	int m_fdc_tc_enable;
170	170	int m_fdc_dma_enable;
171	171	int m_fdc_drq;

src/mess/includes/bullet.h
r14279	r14280
118	118	DECLARE_READ8_MEMBER( hwsts_r );
119	119	DECLARE_READ8_MEMBER( scsi_r );
120	120	DECLARE_WRITE8_MEMBER( scsi_w );
121
	121
122	122	DECLARE_READ8_MEMBER( dma_mreq_r );
123	123	DECLARE_WRITE8_MEMBER( dma_mreq_w );
124	124	DECLARE_READ8_MEMBER( pio_pa_r );
125	125	DECLARE_WRITE8_MEMBER( pio_pa_w );
126	126	DECLARE_WRITE_LINE_MEMBER( cstrb_w );
127	127	DECLARE_WRITE_LINE_MEMBER( req_w );
128
	128
129	129	void update_dma_rdy();
130	130
131	131	int m_rome;

src/mess/includes/osborne1.h
r14279	r14280
31	31	m_beep(*this, BEEPER_TAG),
32	32	m_ram(*this, RAM_TAG)
33	33	{ }
34
	34
35	35	virtual void video_start();
36
	36
37	37	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
38	38
39	39	bitmap_ind16 m_bitmap;

src/mess/includes/samcoupe.h
r14279	r14280
38	38	: driver_device(mconfig, type, tag) { }
39	39
40	40	virtual void video_start();
41
	41
42	42	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
43
	43
44	44	bitmap_ind16 m_bitmap;
45	45
46	46	emu_timer *m_video_update_timer;

src/mess/includes/c64.h
r14279	r14280
51	51	DECLARE_READ8_MEMBER( c64_dma_read_color );
52	52	DECLARE_WRITE_LINE_MEMBER( c64_vic_interrupt );
53	53	DECLARE_READ8_MEMBER( c64_rdy_cb );
54
	54
55	55	int m_old_level;
56	56	int m_old_data;
57	57	int m_old_exrom;

src/mess/includes/sage2.h
r14279	r14280
59	59	required_device<ieee488_device> m_ieee488;
60	60
61	61	virtual void machine_reset();
62
	62
63	63	void update_fdc_int();
64	64
65	65	DECLARE_READ8_MEMBER( mmu_r );
r14279	r14280
71	71	DECLARE_WRITE8_MEMBER( ppi1_pc_w );
72	72	DECLARE_WRITE_LINE_MEMBER( fdc_int_w );
73	73	DECLARE_WRITE_LINE_MEMBER( ack_w );
74
	74
75	75	DECLARE_WRITE8_MEMBER(kbd_put);
76
	76
77	77	int m_reset;
78	78
79	79	// floppy state

src/mess/drivers/osbexec.c
r14279	r14280
43	43	required_device<device_t> m_speaker;
44	44
45	45	virtual void video_start();
46
	46
47	47	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
48
	48
49	49	bitmap_ind16 m_bitmap;
50	50
51	51	memory_region *m_fontram_region;

src/mess/drivers/rm380z.c
r14279	r14280
94	94	AM_RANGE(0xc4, 0xc4) AM_WRITE(disk_0_control)
95	95	AM_RANGE(0xc5, 0xff) AM_READWRITE(rm380z_porthi_r, rm380z_porthi_w)
96	96	ADDRESS_MAP_END
97
	97
98	98	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
99	99	{
100	100	DEVCB_DRIVER_MEMBER(rm380z_state, keyboard_put)
101	101	};
102	102
103	103	INPUT_PORTS_START( rm380z )
104		// PORT_START("additional_chars")
105		// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Escape") PORT_CODE(KEYCODE_ESC) PORT_CODE(KEYCODE_ESC)
	104	// PORT_START("additional_chars")
	105	// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Escape") PORT_CODE(KEYCODE_ESC) PORT_CODE(KEYCODE_ESC)
106	106	INPUT_PORTS_END
107	107
108	108	//
r14279	r14280
164	164	/* ROM definition */
165	165	ROM_START( rm380z )
166	166	ROM_REGION( 0x10000, RM380Z_MAINCPU_TAG, 0 )
167		// ROM_LOAD( "cos34e-m.bin", 0x0000, 0x1000, CRC(20e2ddf4) SHA1(3177b28793d5a348c94fd0ae6393d74e2e9a8662))
	167	// ROM_LOAD( "cos34e-m.bin", 0x0000, 0x1000, CRC(20e2ddf4) SHA1(3177b28793d5a348c94fd0ae6393d74e2e9a8662))
168	168	// I'm not sure of how those roms have been dumped. I don't know if those are good dumps or not.
169	169	ROM_LOAD( "cos40b-m.bin", 0x0000, 0x1000, BAD_DUMP CRC(1f0b3a5c) SHA1(0b29cb2a3b7eaa3770b34f08c4fd42844f42700f))
170	170	ROM_LOAD( "cos40b-m_f600-f9ff.bin", 0x1000, 0x400, BAD_DUMP CRC(e3397d9d) SHA1(490a0c834b0da392daf782edc7d51ca8f0668b1a))

src/mess/drivers/pc1512.c
r14279	r14280
986	986	{ DEVCB_DRIVER_LINE_MEMBER(pc1512_state, dack0_w),
987	987	DEVCB_DRIVER_LINE_MEMBER(pc1512_state, dack1_w),
988	988	DEVCB_DRIVER_LINE_MEMBER(pc1512_state, dack2_w),
989		DEVCB_DRIVER_LINE_MEMBER(pc1512_state, dack3_w) }
	989	DEVCB_DRIVER_LINE_MEMBER(pc1512_state, dack3_w) }
990	990	};
991	991
992	992

src/mess/drivers/vic20.c
r14279	r14280
212	212	PORT_MODIFY( "ROW0" )
213	213	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR(':') PORT_CHAR('*')
214	214	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-')
215
	215
216	216	PORT_MODIFY( "ROW1" )
217	217	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('@')
218
	218
219	219	PORT_MODIFY( "ROW2" )
220	220	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x00C4)
221
	221
222	222	PORT_MODIFY( "ROW5" )
223	223	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR(';') PORT_CHAR('+')
224	224	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(0x00D6)
225
	225
226	226	PORT_MODIFY( "ROW6" )
227	227	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR(0x00C5)
228
	228
229	229	PORT_MODIFY( "ROW7" )
230	230	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=')
231	231	INPUT_PORTS_END
r14279	r14280
255	255	PA6 CASS SWITCH
256	256	PA7 SERIAL ATN OUT
257	257
258		*/
	258	*/
259	259
260	260	UINT8 data = 0xfc;
261	261
r14279	r14280
292	292	PA6 CASS SWITCH
293	293	PA7 SERIAL ATN OUT
294	294
295		*/
	295	*/
296	296
297	297	// serial attention out
298	298	m_iec->atn_w(!BIT(data, 7));
r14279	r14280
313	313	PB6 USER PORT K
314	314	PB7 USER PORT L
315	315
316		*/
	316	*/
317	317
318	318	return 0;
319	319	}
r14279	r14280
333	333	PB6 USER PORT K
334	334	PB7 USER PORT L
335	335
336		*/
	336	*/
337	337	}
338	338
339	339	WRITE_LINE_MEMBER( vic20_state::via0_ca2_w )
r14279	r14280
387	387	PA6 ROW 6
388	388	PA7 ROW 7
389	389
390		*/
	390	*/
391	391
392	392	UINT8 data = 0xff;
393	393
r14279	r14280
418	418	PB6 COL 6
419	419	PB7 COL 7, JOY 3
420	420
421		*/
	421	*/
422	422
423	423	UINT8 data = 0xff;
424	424
r14279	r14280
443	443	PB6 COL 6
444	444	PB7 COL 7, JOY 3
445	445
446		*/
	446	*/
447	447
448	448	// cassette write
449	449	m_cassette->output(BIT(data, 3) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
r14279	r14280
629	629	MCFG_CASSETTE_ADD(CASSETTE_TAG, cbm_cassette_interface )
630	630
631	631	MCFG_CBM_IEC_ADD(cbm_iec_intf, "c1541")
632
	632
633	633	MCFG_VIC20_EXPANSION_SLOT_ADD(VIC20_EXPANSION_SLOT_TAG, expansion_intf, vic20_expansion_cards, NULL, NULL)
634	634
635	635	// software lists
r14279	r14280
669	669	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
670	670	MCFG_SOUND_ADD("dac", DAC, 0)
671	671	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
672
	672
673	673	// software lists
674	674	MCFG_SOFTWARE_LIST_FILTER("cart_list", "NTSC")
675	675	MCFG_SOFTWARE_LIST_FILTER("disk_list", "NTSC")
r14279	r14280
703	703	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
704	704	MCFG_SOUND_ADD("dac", DAC, 0)
705	705	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
706
	706
707	707	// software lists
708	708	MCFG_SOFTWARE_LIST_FILTER("cart_list", "PAL")
709	709	MCFG_SOFTWARE_LIST_FILTER("disk_list", "PAL")
r14279	r14280
714	714	//**************************************************************************
715	715	// ROM DEFINITIONS
716	716	//**************************************************************************
717
	717
718	718	//-------------------------------------------------
719	719	// ROM( vic1001 )
720	720	//-------------------------------------------------

src/mess/drivers/a7000.c
r14279	r14280
56	56	void vidc20_dynamic_screen_change();
57	57	virtual void machine_reset();
58	58	virtual void machine_start();
59
	59
60	60	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
61	61	};
62	62

src/mess/drivers/fmtowns.c
r14279	r14280
230	230	case 0x05:
231	231	logerror("SYS: port 0x25 read\n");
232	232	return 0x00;
233		/* case 0x06:
234		count = (m_towns_freerun_counter->time_elapsed() * ATTOSECONDS_TO_HZ(ATTOSECONDS_IN_USEC(1))).as_double();
235		return count & 0xff;
236		case 0x07:
237		count = (m_towns_freerun_counter->time_elapsed() * ATTOSECONDS_TO_HZ(ATTOSECONDS_IN_USEC(1))).as_double();
238		return (count >> 8) & 0xff;
	233	/* case 0x06:
	234	count = (m_towns_freerun_counter->time_elapsed() * ATTOSECONDS_TO_HZ(ATTOSECONDS_IN_USEC(1))).as_double();
	235	return count & 0xff;
	236	case 0x07:
	237	count = (m_towns_freerun_counter->time_elapsed() * ATTOSECONDS_TO_HZ(ATTOSECONDS_IN_USEC(1))).as_double();
	238	return (count >> 8) & 0xff;
239	239	*/ case 0x06:
240	240	//logerror("SYS: (0x26) timer read\n");
241	241	return m_freerun_timer;

src/mess/drivers/wangpc.c
r14279	r14280
1	1	/*
2	2
3		Wang Professional Computer
	3	Wang Professional Computer
4	4
5		http://www.seasip.info/VintagePC/wangpc.html
6
7		chdman -createblankhd q540.chd 512 8 17 512
8
	5	http://www.seasip.info/VintagePC/wangpc.html
	6
	7	chdman -createblankhd q540.chd 512 8 17 512
	8
9	9	*/
10	10
11	11	#include "includes/wangpc.h"
r14279	r14280
30	30	WRITE8_MEMBER( wangpc_state::fdc_ctrl_w )
31	31	{
32	32	/*
33
34		bit description
35
36		0 Enable /EOP
37		1 Disable /DREQ2
38		2 Clear drive 1 door disturbed interrupt
39		3 Clear drive 2 door disturbed interrupt
40		4
41		5
42		6
43		7
44
45		*/
46
	33
	34	bit description
	35
	36	0 Enable /EOP
	37	1 Disable /DREQ2
	38	2 Clear drive 1 door disturbed interrupt
	39	3 Clear drive 2 door disturbed interrupt
	40	4
	41	5
	42	6
	43	7
	44
	45	*/
	46
47	47	m_fdc_tc_enable = BIT(data, 0);
48	48	m_fdc_dma_enable = BIT(data, 1);
49	49
r14279	r14280
55	55	READ8_MEMBER( wangpc_state::deselect_drive1_r )
56	56	{
57	57	m_ds1 = 1;
58
	58
59	59	return 0;
60	60	}
61	61
r14279	r14280
69	69	READ8_MEMBER( wangpc_state::select_drive1_r )
70	70	{
71	71	m_ds1 = 0;
72
	72
73	73	return 0;
74	74	}
75	75
r14279	r14280
83	83	READ8_MEMBER( wangpc_state::deselect_drive2_r )
84	84	{
85	85	m_ds2 = 1;
86
	86
87	87	return 0;
88	88	}
89	89
r14279	r14280
97	97	READ8_MEMBER( wangpc_state::select_drive2_r )
98	98	{
99	99	m_ds2 = 0;
100
	100
101	101	return 0;
102	102	}
103	103
r14279	r14280
111	111	READ8_MEMBER( wangpc_state::motor1_off_r )
112	112	{
113	113	floppy_mon_w(m_floppy0, 1);
114
	114
115	115	return 0;
116	116	}
117	117
r14279	r14280
125	125	READ8_MEMBER( wangpc_state::motor1_on_r )
126	126	{
127	127	floppy_mon_w(m_floppy0, 0);
128
	128
129	129	return 0;
130	130	}
131	131
r14279	r14280
139	139	READ8_MEMBER( wangpc_state::motor2_off_r )
140	140	{
141	141	floppy_mon_w(m_floppy1, 1);
142
	142
143	143	return 0;
144	144	}
145	145
r14279	r14280
153	153	READ8_MEMBER( wangpc_state::motor2_on_r )
154	154	{
155	155	floppy_mon_w(m_floppy1, 0);
156
	156
157	157	return 0;
158	158	}
159	159
r14279	r14280
168	168	{
169	169	upd765_reset_w(m_fdc, 1);
170	170	upd765_reset_w(m_fdc, 0);
171
	171
172	172	return 0;
173	173	}
174	174
r14279	r14280
214	214	READ8_MEMBER( wangpc_state::status_r )
215	215	{
216	216	/*
217
218		bit description
219
220		0 Memory Parity Flag
221		1 I/O Error Flag
222		2 Unassigned
223		3 FDC Interrupt Flag
224		4 Door disturbed on drive 1
225		5 Door disturbed on drive 2
226		6 Door open on drive 1
227		7 Door open on drive 2
228
229		*/
230
	217
	218	bit description
	219
	220	0 Memory Parity Flag
	221	1 I/O Error Flag
	222	2 Unassigned
	223	3 FDC Interrupt Flag
	224	4 Door disturbed on drive 1
	225	5 Door disturbed on drive 2
	226	6 Door open on drive 1
	227	7 Door open on drive 2
	228
	229	*/
	230
231	231	UINT8 data = 0x03;
232
	232
233	233	// FDC interrupt
234	234	data \|= upd765_int_r(m_fdc) << 3;
235
	235
236	236	return data;
237	237	}
238	238
r14279	r14280
276	276	READ8_MEMBER( wangpc_state::led_on_r )
277	277	{
278	278	output_set_led_value(LED_DIAGNOSTIC, 1);
279
	279
280	280	return 0;
281	281	}
282	282
r14279	r14280
309	309	{
310	310	m_uart_dr = 0;
311	311	check_level2_interrupts();
312
	312
313	313	return m_uart->read(space, 0);
314	314	}
315	315
r14279	r14280
322	322	{
323	323	m_uart_tbre = 0;
324	324	check_level2_interrupts();
325
	325
326	326	m_uart->write(space, 0, data);
327	327	}
328	328
r14279	r14280
335	335	{
336	336	m_dav = 1;
337	337	check_level1_interrupts();
338
	338
339	339	return centronics_data_r(m_centronics, 0);
340	340	}
341	341
r14279	r14280
348	348	{
349	349	m_acknlg = 1;
350	350	check_level1_interrupts();
351
	351
352	352	centronics_data_w(m_centronics, 0, data);
353
	353
354	354	centronics_strobe_w(m_centronics, 0);
355	355	centronics_strobe_w(m_centronics, 1);
356	356	}
r14279	r14280
364	364	{
365	365	m_busy = 1;
366	366	check_level1_interrupts();
367
	367
368	368	return 0;
369	369	}
370	370
r14279	r14280
387	387	READ8_MEMBER( wangpc_state::led_off_r )
388	388	{
389	389	output_set_led_value(LED_DIAGNOSTIC, 0);
390
	390
391	391	return 0;
392	392	}
393	393
r14279	r14280
408	408	READ8_MEMBER( wangpc_state::option_id_r )
409	409	{
410	410	/*
411
412		bit description
413
414		0
415		1
416		2
417		3
418		4
419		5
420		6
421		7 FDC Interrupt Flag
422
423		*/
424
	411
	412	bit description
	413
	414	0
	415	1
	416	2
	417	3
	418	4
	419	5
	420	6
	421	7 FDC Interrupt Flag
	422
	423	*/
	424
425	425	UINT8 data = 0;
426
	426
427	427	// FDC interrupt
428	428	data \|= upd765_int_r(m_fdc) << 7;
429
	429
430	430	return data;
431	431	}
432	432
r14279	r14280
441	441	//-------------------------------------------------
442	442
443	443	static ADDRESS_MAP_START( wangpc_mem, AS_PROGRAM, 16, wangpc_state )
444		// AM_RANGE(0x00000, 0xfffff) AM_READWRITE(mrdc_r, amwc_c)
	444	// AM_RANGE(0x00000, 0xfffff) AM_READWRITE(mrdc_r, amwc_c)
445	445	AM_RANGE(0x00000, 0x1ffff) AM_RAM
446	446	AM_RANGE(0xfc000, 0xfffff) AM_ROM AM_REGION(I8086_TAG, 0)
447	447	ADDRESS_MAP_END
r14279	r14280
468	468	AM_RANGE(0x1020, 0x1027) AM_DEVREADWRITE8(I8255A_TAG, i8255_device, read, write, 0x00ff)
469	469	AM_RANGE(0x1040, 0x1047) AM_DEVREADWRITE8_LEGACY(I8253_TAG, pit8253_r, pit8253_w, 0x00ff)
470	470	AM_RANGE(0x1060, 0x1063) AM_DEVREADWRITE8_LEGACY(I8259A_TAG, pic8259_r, pic8259_w, 0x00ff)
471		// AM_RANGE(0x1080, 0x1087) AM_DEVREAD8(SCN2661_TAG, scn2661_device, read, 0x00ff)
472		// AM_RANGE(0x1088, 0x108f) AM_DEVWRITE8(SCN2661_TAG, scn2661_device, write, 0x00ff)
	471	// AM_RANGE(0x1080, 0x1087) AM_DEVREAD8(SCN2661_TAG, scn2661_device, read, 0x00ff)
	472	// AM_RANGE(0x1088, 0x108f) AM_DEVWRITE8(SCN2661_TAG, scn2661_device, write, 0x00ff)
473	473	AM_RANGE(0x10a0, 0x10bf) AM_DEVREADWRITE8_LEGACY(AM9517A_TAG, i8237_r, i8237_w, 0x00ff)
474	474	AM_RANGE(0x10c2, 0x10c7) AM_WRITE8(dma_page_w, 0x00ff)
475	475	AM_RANGE(0x10e0, 0x10e1) AM_READWRITE8(status_r, timer0_irq_clr_w, 0x00ff)
r14279	r14280
496	496
497	497	static INPUT_PORTS_START( wangpc )
498	498	// keyboard defined in machine/wangpckb.c
499
	499
500	500	PORT_START("SW")
501	501	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW:1")
502	502	PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
r14279	r14280
540	540	WRITE_LINE_MEMBER( wangpc_state::eop_w )
541	541	{
542	542	m_dma_eop = !state;
543
	543
544	544	update_fdc_tc();
545	545	check_level2_interrupts();
546	546	}
r14279	r14280
645	645	void wangpc_state::check_level1_interrupts()
646	646	{
647	647	int state = !m_timer2_irq \| !m_ecpi_irq \| !m_acknlg \| !m_dav \| !m_busy;
648
	648
649	649	pic8259_ir1_w(m_pic, state);
650	650	}
651	651
652	652	void wangpc_state::check_level2_interrupts()
653	653	{
654	654	int state = !m_dma_eop \| m_uart_dr \| m_uart_tbre \| upd765_int_r(m_fdc) \| m_fpu_irq;
655
	655
656	656	pic8259_ir2_w(m_pic, state);
657	657	}
658	658
r14279	r14280
678	678	READ8_MEMBER( wangpc_state::ppi_pa_r )
679	679	{
680	680	/*
681
682		bit description
683
684		0 /POWER ON
685		1 /SMART
686		2 /DATA AVAILABLE
687		3 SLCT
688		4 BUSY
689		5 /FAULT
690		6 PE
691		7 ACKNOWLEDGE
692
693		*/
694
	681
	682	bit description
	683
	684	0 /POWER ON
	685	1 /SMART
	686	2 /DATA AVAILABLE
	687	3 SLCT
	688	4 BUSY
	689	5 /FAULT
	690	6 PE
	691	7 ACKNOWLEDGE
	692
	693	*/
	694
695	695	UINT8 data = 0x08 \| 0x02 \| 0x01;
696
	696
697	697	data \|= m_dav << 2;
698	698	data \|= centronics_busy_r(m_centronics) << 4;
699	699	data \|= centronics_fault_r(m_centronics) << 5;
700	700	data \|= centronics_pe_r(m_centronics) << 6;
701	701	data \|= m_acknlg << 7;
702
	702
703	703	return data;
704	704	}
705	705
706	706	READ8_MEMBER( wangpc_state::ppi_pb_r )
707	707	{
708	708	/*
709
710		bit description
711
712		0 /TIMER 2 INTERRUPT
713		1 /SERIAL INTERRUPT
714		2 /PARALLEL PORT INTERRUPT
715		3 /DMA INTERRUPT
716		4 KBD INTERRUPT TRANSMIT
717		5 KBD INTERRUPT RECEIVE
718		6 FLOPPY DISK INTERRUPT
719		7 8087 INTERRUPT
720
721		*/
722
	709
	710	bit description
	711
	712	0 /TIMER 2 INTERRUPT
	713	1 /SERIAL INTERRUPT
	714	2 /PARALLEL PORT INTERRUPT
	715	3 /DMA INTERRUPT
	716	4 KBD INTERRUPT TRANSMIT
	717	5 KBD INTERRUPT RECEIVE
	718	6 FLOPPY DISK INTERRUPT
	719	7 8087 INTERRUPT
	720
	721	*/
	722
723	723	UINT8 data = 0;
724
	724
725	725	// timer 2 interrupt
726	726	data \|= m_timer2_irq;
727
	727
728	728	// serial interrupt
729	729	data \|= m_ecpi_irq << 1;
730
	730
731	731	// parallel port interrupt
732	732	data \|= m_acknlg << 2;
733
	733
734	734	// DMA interrupt
735	735	data \|= m_dma_eop << 3;
736
	736
737	737	// keyboard interrupt
738	738	data \|= m_uart_tbre << 4;
739	739	data \|= m_uart_dr << 5;
740
	740
741	741	// FDC interrupt
742	742	data \|= upd765_int_r(m_fdc) << 6;
743
	743
744	744	// 8087 interrupt
745	745	data \|= m_fpu_irq << 7;
746
	746
747	747	return data;
748	748	}
749	749
750	750	READ8_MEMBER( wangpc_state::ppi_pc_r )
751	751	{
752	752	/*
753
754		bit description
755
756		0
757		1
758		2
759		3
760		4 SW1
761		5 SW2
762		6 SW3
763		7 SW4
764
765		*/
766
	753
	754	bit description
	755
	756	0
	757	1
	758	2
	759	3
	760	4 SW1
	761	5 SW2
	762	6 SW3
	763	7 SW4
	764
	765	*/
	766
767	767	return input_port_read(machine(), "SW") << 4;
768	768	}
769	769
770	770	WRITE8_MEMBER( wangpc_state::ppi_pc_w )
771	771	{
772	772	/*
773
774		bit description
775
776		0 /USR0 (pin 14)
777		1 /USR1 (pin 36)
778		2 /RESET (pin 31)
779		3 Unassigned
780		4
781		5
782		6
783		7
784
785		*/
786
	773
	774	bit description
	775
	776	0 /USR0 (pin 14)
	777	1 /USR1 (pin 36)
	778	2 /RESET (pin 31)
	779	3 Unassigned
	780	4
	781	5
	782	6
	783	7
	784
	785	*/
	786
787	787	centronics_autofeed_w(m_centronics, BIT(data, 0));
788	788	centronics_init_w(m_centronics, BIT(data, 2));
789	789	}
r14279	r14280
840	840	{
841	841	if (state)
842	842	{
843		m_uart_dr = 1;
	843	m_uart_dr = 1;
844	844	check_level2_interrupts();
845	845	}
846	846	}
r14279	r14280
908	908
909	909	if (!state->m_ds1) return state->m_floppy0;
910	910	if (!state->m_ds2) return state->m_floppy1;
911
	911
912	912	return NULL;
913	913	}
914	914
r14279	r14280
998	998	{
999	999	// register CPU IRQ callback
1000	1000	device_set_irq_callback(m_maincpu, wangpc_irq_callback);
1001
	1001
1002	1002	// connect serial keyboard
1003	1003	m_uart->connect(m_kb);
1004	1004	}
r14279	r14280
1032	1032	MCFG_CPU_ADD(I8086_TAG, I8086, 8000000)
1033	1033	MCFG_CPU_PROGRAM_MAP(wangpc_mem)
1034	1034	MCFG_CPU_IO_MAP(wangpc_io)
1035
	1035
1036	1036	// devices
1037	1037	MCFG_I8237_ADD(AM9517A_TAG, 4000000, dmac_intf)
1038	1038	MCFG_PIC8259_ADD(I8259A_TAG, pic_intf)
r14279	r14280
1044	1044	MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(floppy_intf)
1045	1045	MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_intf)
1046	1046	MCFG_WANGPC_KEYBOARD_ADD(kb_intf)
1047
	1047
1048	1048	// bus
1049	1049	MCFG_WANGPC_BUS_ADD(bus_intf)
1050	1050	MCFG_WANGPC_BUS_SLOT_ADD("slot1", 1, wangpc_cards, NULL, NULL)
r14279	r14280
1063	1063	//**************************************************************************
1064	1064	// ROM DEFINITIONS
1065	1065	//**************************************************************************
1066
	1066
1067	1067	//-------------------------------------------------
1068	1068	// ROM( wangpc )
1069	1069	//-------------------------------------------------

src/mess/drivers/bullet.c
r14279	r14280
48	48
49	49	TODO:
50	50
51		- revision F boot ROM dump
	51	- revision F boot ROM dump
52	52	- wmb_org.imd does not load
53	53	- z80dart wait/ready
54	54	- floppy type dips
r14279	r14280
101	101	READ8_MEMBER( bullet_state::mreq_r )
102	102	{
103	103	UINT8 data = 0;
104
	104
105	105	if (!m_brom && !BIT(offset, 5))
106	106	{
107	107	data = machine().region(Z80_TAG)->base()[offset & 0x1f];
r14279	r14280
117	117	data = m_ram->pointer()[offset];
118	118	}
119	119	}
120
	120
121	121	return data;
122	122	}
123	123
r14279	r14280
326	326	READ8_MEMBER( bulletf_state::mreq_r )
327	327	{
328	328	UINT8 data = 0;
329
	329
330	330	if (!m_rome && !BIT(offset, 5))
331	331	{
332	332	data = machine().region(Z80_TAG)->base()[offset & 0x1f];
r14279	r14280
349	349	data = m_ram->pointer()[offset];
350	350	}
351	351	}
352
	352
353	353	return data;
354	354	}
355	355
r14279	r14280
389	389	bit signal
390	390
391	391	0 device select (0=FDC, 1=SCSI)
392		1
393		2
394		3
395		4 DMB4 Source bank
	392	1
	393	2
	394	3
	395	4 DMB4 Source bank
396	396	5
397		6 DMB6 Destination bank
	397	6 DMB6 Destination bank
398	398	7
399	399
400	400	*/
401
	401
402	402	m_rome = 1;
403
	403
404	404	m_xdma0 = data;
405	405	}
406	406
r14279	r14280
420	420	2 Unit select number
421	421	3 Unit select number
422	422	4 Select side 2
423		5 Disable 3 & 5 inch spindle motors
424		6 Set for 1 MHz controller operation, reset for 2 MHz controller operation
425		7 Set to select single density
	423	5 Disable 3 & 5 inch spindle motors
	424	6 Set for 1 MHz controller operation, reset for 2 MHz controller operation
	425	7 Set to select single density
426	426
427	427	*/
428	428
429	429	// floppy drive select
430	430	wd17xx_set_drive(m_fdc, data & 0x0f);
431
	431
432	432	// floppy side select
433	433	wd17xx_set_side(m_fdc, BIT(data, 4));
434	434
r14279	r14280
437	437	floppy_mon_w(m_floppy1, BIT(data, 5));
438	438	floppy_drive_set_ready_state(m_floppy0, BIT(data, 5), 1);
439	439	floppy_drive_set_ready_state(m_floppy1, BIT(data, 5), 1);
440
	440
441	441	// FDC clock
442	442	m_fdc->set_unscaled_clock(BIT(data, 6) ? XTAL_16MHz/16 : XTAL_16MHz/8);
443	443
r14279	r14280
457	457	bit signal
458	458
459	459	0 Select active bank (0=bank 0, 1=bank 1)
460		1
461		2
462		3
	460	1
	461	2
	462	3
463	463	4 Select system space overlay (0=no overlay, 1=overlay)
464	464	5
465	465	6
466	466	7
467	467
468	468	*/
469
	469
470	470	m_mbank = data;
471	471	}
472	472
r14279	r14280
478	478	READ8_MEMBER( bulletf_state::scsi_r )
479	479	{
480	480	UINT8 data = scsi_data_r(m_scsibus, 0);
481
	481
482	482	scsi_ack_w(m_scsibus, 0);
483
	483
484	484	m_wack = 0;
485	485	update_dma_rdy();
486
	486
487	487	return data;
488	488	}
489	489
r14279	r14280
495	495	WRITE8_MEMBER( bulletf_state::scsi_w )
496	496	{
497	497	scsi_data_w(m_scsibus, 0, data);
498
	498
499	499	scsi_ack_w(m_scsibus, 0);
500	500
501	501	m_wack = 0;
r14279	r14280
513	513
514	514	bit signal
515	515
516		0 CBUSY Centronics busy
517		1 SW2 DIP switch 2
518		2 SW3 DIP switch 3
519		3 FD2S *Floppy disk two sided
520		4 HLDST Floppy disk head load status
521		5 XDCG *Floppy disk exchange (8-inch only)
522		6 FDIRQ FDC interrupt request line
523		7 FDDRQ FDC data request line
	516	0 CBUSY Centronics busy
	517	1 SW2 DIP switch 2
	518	2 SW3 DIP switch 3
	519	3 FD2S *Floppy disk two sided
	520	4 HLDST Floppy disk head load status
	521	5 XDCG *Floppy disk exchange (8-inch only)
	522	6 FDIRQ FDC interrupt request line
	523	7 FDDRQ FDC data request line
524	524
525	525	*/
526
	526
527	527	UINT8 data = 0x10;
528
	528
529	529	// centronics busy
530	530	data \|= centronics_busy_r(m_centronics);
531	531
r14279	r14280
914	914
915	915	bit signal
916	916
917		0
918		1
919		2
	917	0
	918	1
	919	2
920	920	3 BUSY
921	921	4 MSG
922	922	5 C/D
r14279	r14280
945	945	0 ATN
946	946	1 RST
947	947	2 SEL
948		3
949		4
950		5
951		6
952		7
	948	3
	949	4
	950	5
	951	6
	952	7
953	953
954	954	*/
955
	955
956	956	//scsi_atn_w(m_scsibus, !BIT(data, 0));
957	957	scsi_rst_w(m_scsibus, !BIT(data, 1));
958	958	scsi_sel_w(m_scsibus, !BIT(data, 2));

src/mess/drivers/kyocera.c
r14279	r14280
233	233	m_uart->pi_w(BIT(data, 2));
234	234	m_uart->cls1_w(BIT(data, 3));
235	235	m_uart->cls2_w(BIT(data, 4));
236
	236
237	237	m_uart->crl_w(1);
238	238	}
239	239
r14279	r14280
988	988	{
989	989	speaker_level_w(m_speaker, state);
990	990	}
991
	991
992	992	m_uart->trc_w(state);
993	993	m_uart->rrc_w(state);
994	994	}

src/mess/drivers/tiki100.c
r14279	r14280
12	12
13	13	TODO:
14	14
15		- floppy broken
	15	- floppy broken
16	16	- palette RAM should be written during HBLANK
17	17	- double sided disks have t0s0,t0s1,t1s0,t1s1... format
18	18	- DART clocks
r14279	r14280
653	653	/* internal ram */
654	654	MCFG_RAM_ADD(RAM_TAG)
655	655	MCFG_RAM_DEFAULT_SIZE("64K")
656
	656
657	657	// software list
658	658	MCFG_SOFTWARE_LIST_ADD("flop_list", "tiki100")
659	659	MACHINE_CONFIG_END
r14279	r14280
663	663	ROM_START( kontiki )
664	664	ROM_REGION( 0x10000, Z80_TAG, ROMREGION_ERASEFF )
665	665	ROM_LOAD( "tikirom-1.30.u10", 0x0000, 0x2000, CRC(c482dcaf) SHA1(d140706bb7fc8b1fbb37180d98921f5bdda73cf9) )
666
	666
667	667	ROM_REGION( 0x100, "proms", 0 )
668	668	ROM_LOAD( "63ls140.u4", 0x000, 0x100, NO_DUMP )
669	669	ROM_END

src/mess/drivers/abc1600.c
r14279	r14280
985	985	4 SEGD4
986	986	5 SEGD5
987	987	6 SEGD6
988		7
	988	7
989	989
990	990	*/
991	991
r14279	r14280
1018	1018
1019	1019	8 X19
1020	1020	9 X20
1021		10 X20
1022		11 X20
1023		12 X20
1024		13 X20
	1021	10 X20
	1022	11 X20
	1023	12 X20
	1024	13 X20
1025	1025	14 _WP
1026	1026	15 NONX
1027	1027
r14279	r14280
1036	1036	UINT16 pgd = m_page_ram[pga];
1037	1037
1038	1038	UINT8 data = 0;
1039
	1039
1040	1040	if (A0)
1041	1041	{
1042	1042	data = pgd & 0xff;
r14279	r14280
1044	1044	else
1045	1045	{
1046	1046	int x20 = BIT(pgd, 9);
1047
	1047
1048	1048	data = (pgd >> 8) \| x20 << 2 \| x20 << 3 \| x20 << 4 \| x20 << 5;
1049	1049	}
1050
	1050
1051	1051	return data;
1052	1052	}
1053	1053

src/mess/drivers/sage2.c
r14279	r14280
12	12
13	13	/*
14	14
15		TODO:
	15	TODO:
16	16
17		- floppy loading
18		- PROM test fails
19		- i8251 test fails on boot
20
21		001BD8: move.b D6, $c071.w
22		001BDC: moveq #$e, D7
23		001BDE: dbra D7, $1bde
24		001BE2: btst #$2, $c073.w
25		001BE8: bne $1bec
26
27		- TMS9914 IEEE-488 controller
28		- board 2 (4x 2651 USART)
29		- Winchester controller
	17	- floppy loading
	18	- PROM test fails
	19	- i8251 test fails on boot
30	20
	21	001BD8: move.b D6, $c071.w
	22	001BDC: moveq #$e, D7
	23	001BDE: dbra D7, $1bde
	24	001BE2: btst #$2, $c073.w
	25	001BE8: bne $1bec
	26
	27	- TMS9914 IEEE-488 controller
	28	- board 2 (4x 2651 USART)
	29	- Winchester controller
	30
31	31	*/
32	32
33	33	#include "includes/sage2.h"
r14279	r14280
45	45	READ8_MEMBER( sage2_state::mmu_r )
46	46	{
47	47	UINT8 data = 0xff;
48
	48
49	49	if (m_reset \|\| (offset >= 0xfe0000))
50	50	{
51	51	data = machine().region(M68000_TAG)->base()[offset & 0x1fff];
r14279	r14280
54	54	{
55	55	data = m_ram->pointer()[offset];
56	56	}
57
	57
58	58	return data;
59	59	}
60	60
r14279	r14280
94	94	AM_RANGE(0xffc052, 0xffc053) AM_DEVREADWRITE8_LEGACY(UPD765_TAG, upd765_data_r, upd765_data_w, 0x00ff)
95	95	AM_RANGE(0xffc060, 0xffc067) AM_DEVREADWRITE8(I8255A_0_TAG, i8255_device, read, write, 0x00ff) // i8255, Printer
96	96	AM_RANGE(0xffc070, 0xffc071) AM_DEVREAD8(I8251_0_TAG, i8251_device, data_r, 0x00ff) AM_DEVWRITE8_LEGACY(TERMINAL_TAG, terminal_write, 0x00ff)
97		// AM_RANGE(0xffc070, 0xffc071) AM_DEVREADWRITE8(I8251_0_TAG, i8251_device, data_r, data_w, 0x00ff)
	97	// AM_RANGE(0xffc070, 0xffc071) AM_DEVREADWRITE8(I8251_0_TAG, i8251_device, data_r, data_w, 0x00ff)
98	98	AM_RANGE(0xffc072, 0xffc073) AM_DEVREADWRITE8(I8251_0_TAG, i8251_device, status_r, control_w, 0x00ff)
99	99	AM_RANGE(0xffc080, 0xffc087) AM_MIRROR(0x78) AM_DEVREADWRITE8_LEGACY(I8253_0_TAG, pit8253_r, pit8253_w, 0x00ff)
100		// AM_RANGE(0xffc400, 0xffc407) AM_DEVREADWRITE8(S2651_0_TAG, s2651_device, read, write, 0x00ff)
101		// AM_RANGE(0xffc440, 0xffc447) AM_DEVREADWRITE8(S2651_1_TAG, s2651_device, read, write, 0x00ff)
102		// AM_RANGE(0xffc480, 0xffc487) AM_DEVREADWRITE8(S2651_2_TAG, s2651_device, read, write, 0x00ff)
103		// AM_RANGE(0xffc4c0, 0xffc4c7) AM_DEVREADWRITE8(S2651_3_TAG, s2651_device, read, write, 0x00ff)
	100	// AM_RANGE(0xffc400, 0xffc407) AM_DEVREADWRITE8(S2651_0_TAG, s2651_device, read, write, 0x00ff)
	101	// AM_RANGE(0xffc440, 0xffc447) AM_DEVREADWRITE8(S2651_1_TAG, s2651_device, read, write, 0x00ff)
	102	// AM_RANGE(0xffc480, 0xffc487) AM_DEVREADWRITE8(S2651_2_TAG, s2651_device, read, write, 0x00ff)
	103	// AM_RANGE(0xffc4c0, 0xffc4c7) AM_DEVREADWRITE8(S2651_3_TAG, s2651_device, read, write, 0x00ff)
104	104	// AM_RANGE(0xffc500, 0xffc7ff) // Winchester drive ports
105	105	ADDRESS_MAP_END
106	106
r14279	r14280
196	196	//-------------------------------------------------
197	197
198	198	/*
199
200		IR0 U74 OUT2
201		IR1 RX2I+
202		IR2 TX1I+
203		IR3 TX2I+
204		IR4 MI-
205		IR5 CNI+
206		IR6 U74 OUT0
207		IR7 SI+
208
	199
	200	IR0 U74 OUT2
	201	IR1 RX2I+
	202	IR2 TX1I+
	203	IR3 TX2I+
	204	IR4 MI-
	205	IR5 CNI+
	206	IR6 U74 OUT0
	207	IR7 SI+
	208
209	209	*/
210	210
211	211	static const struct pic8259_interface pic_intf =
r14279	r14280
232	232	PC3 SL0-
233	233	PC4 SL1-
234	234	PC5 MOT-
235		PC6 PCRMP-
236		PC7 FRES+
	235	PC6 PCRMP-
	236	PC7 FRES+
237	237
238	238	*/
239
	239
240	240	// floppy terminal count
241	241	upd765_tc_w(m_fdc, BIT(data, 0));
242
	242
243	243	// floppy ready
244	244	upd765_ready_w(m_fdc, BIT(data, 1));
245
	245
246	246	// floppy interrupt enable
247	247	m_fdie = BIT(data, 2);
248	248	update_fdc_int();
249
	249
250	250	// drive select
251	251	m_sl0 = BIT(data, 3);
252	252	m_sl1 = BIT(data, 4);
253
	253
254	254	// floppy motor
255	255	floppy_mon_w(m_floppy0, BIT(data, 5));
256	256	floppy_mon_w(m_floppy1, BIT(data, 5));
257
	257
258	258	// FDC reset
259	259	upd765_reset_w(m_fdc, BIT(data, 7));
260	260	}
r14279	r14280
286	286	PB3 CD-
287	287	PB4 BUSY
288	288	PB5 PAPER
289		PB6 SEL
290		PB7 FAULT-
	289	PB6 SEL
	290	PB7 FAULT-
291	291
292	292	*/
293
	293
294	294	UINT8 data = 0;
295
	295
296	296	// floppy interrupt
297	297	data = upd765_int_r(m_fdc);
298
	298
299	299	// floppy write protected
300	300	if (!m_sl0) data \|= floppy_wpt_r(m_floppy0) << 1;
301	301	if (!m_sl1) data \|= floppy_wpt_r(m_floppy1) << 1;
302
	302
303	303	// RS-232 ring indicator
304
	304
305	305	// RS-232 carrier detect
306
	306
307	307	// centronics
308	308	data \|= centronics_busy_r(m_centronics) << 4;
309	309	data \|= centronics_pe_r(m_centronics) << 5;
r14279	r14280
325	325	PC3 LEDR+
326	326	PC4 STROBE-
327	327	PC5 PRIME-
328		PC6 U38 CL-
329		PC7 RMI-
	328	PC6 U38 CL-
	329	PC7 RMI-
330	330
331	331	*/
332
	332
333	333	if (!BIT(data, 0))
334	334	{
335	335	// clear parity error interrupt
336	336	m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);
337	337	}
338
	338
339	339	// s? interrupt
340	340	pic8259_ir7_w(m_pic, BIT(data, 2));
341
	341
342	342	// processor LED
343	343	output_set_led_value(0, BIT(data, 3));
344
	344
345	345	// centronics
346	346	centronics_strobe_w(m_centronics, BIT(data, 4));
347	347	centronics_prime_w(m_centronics, BIT(data, 5));
348
	348
349	349	if (!BIT(data, 6))
350	350	{
351	351	// clear ACK interrupt
352	352	pic8259_ir5_w(m_pic, CLEAR_LINE);
353	353	}
354
	354
355	355	if (!BIT(data, 7))
356	356	{
357	357	// clear modem interrupt
r14279	r14280
500	500
501	501	if (!state->m_sl0) return state->m_floppy0;
502	502	if (!state->m_sl1) return state->m_floppy1;
503
	503
504	504	return NULL;
505	505	}
506	506
r14279	r14280
655	655	{
656	656	state->m_reset = 0;
657	657	}
658
	658
659	659	return address;
660	660	}
661	661
r14279	r14280
663	663	{
664	664	address_space *program = machine.device<cpu_device>(M68000_TAG)->space(AS_PROGRAM);
665	665	program->set_direct_update_handler(direct_update_delegate(FUNC(sage2_direct_update_handler), &machine));
666
	666
667	667	// patch out i8251 test
668	668	machine.region(M68000_TAG)->base()[0x1be8] = 0xd6;
669	669	machine.region(M68000_TAG)->base()[0x1be9] = 0x4e;

src/mess/drivers/sm1800.c
r14279	r14280
81	81	void sm1800_state::video_start()
82	82	{
83	83	machine().primary_screen->register_screen_bitmap(m_bitmap);
84
	84
85	85	}
86	86
87	87	static SCREEN_UPDATE_IND16( sm1800 )

src/mess/drivers/next.c
r14279	r14280
252	252
253	253	void next_state::dma_drq_w(int slot, bool state)
254	254	{
255		// fprintf(stderr, "DMA drq_w %d, %d\n", slot, state);
	255	// fprintf(stderr, "DMA drq_w %d, %d\n", slot, state);
256	256	dma_slot &ds = dma_slots[slot];
257	257	ds.drq = state;
258	258	if(state && (ds.state & DMA_ENABLE)) {
r14279	r14280
480	480	}
481	481	if(data & DMA_SETENABLE) {
482	482	ds.state \|= DMA_ENABLE;
483		// fprintf(stderr, "dma slot %d drq=%s\n", slot, ds.drq ? "on" : "off");
	483	// fprintf(stderr, "dma slot %d drq=%s\n", slot, ds.drq ? "on" : "off");
484	484	if(ds.drq)
485	485	dma_drq_w(slot, ds.drq);
486	486	}

src/mess/drivers/x1twin.c
r14279	r14280
590	590
591	591	MCFG_MB8877_ADD("fdc",x1_mb8877a_interface)
592	592
593		MCFG_CARTSLOT_ADD("cart")
	593	MCFG_CARTSLOT_ADD("cart")
594	594	MCFG_CARTSLOT_EXTENSION_LIST("rom")
595	595	MCFG_CARTSLOT_NOT_MANDATORY
596	596

src/mess/drivers/pasopia.c
r14279	r14280
61	61	UINT16 m_vram_addr;
62	62	UINT8 m_vram_latch;
63	63	UINT8 m_attr_latch;
64		// UINT8 m_gfx_mode;
	64	// UINT8 m_gfx_mode;
65	65	bool m_video_wl;
66	66	bool m_ram_bank;
67	67	UINT8 *m_p_vram;

src/mess/drivers/apf.c
r14279	r14280
724	724
725	725	MCFG_DEVICE_REMOVE( "pia_1" )
726	726
727		// MCFG_DEVICE_REMOVE( WAVE_TAG )
	727	// MCFG_DEVICE_REMOVE( WAVE_TAG )
728	728	MCFG_DEVICE_REMOVE( CASSETTE_TAG )
729	729	MCFG_LEGACY_FLOPPY_2_DRIVES_REMOVE()
730	730

src/mess/drivers/ibmpc.c
r14279	r14280
321	321	DEVICE_INPUT_DEFAULTS_END
322	322
323	323	//static DEVICE_INPUT_DEFAULTS_START(ega)
324		// DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x00)
	324	// DEVICE_INPUT_DEFAULTS("DSW0",0x30, 0x00)
325	325	//DEVICE_INPUT_DEFAULTS_END
326	326
327	327	static SLOT_INTERFACE_START(ibm_isa8_cards)
328	328	SLOT_INTERFACE("cga", ISA8_CGA)
329		// SLOT_INTERFACE("ega", ISA8_EGA)
	329	// SLOT_INTERFACE("ega", ISA8_EGA)
330	330	SLOT_INTERFACE("mda", ISA8_MDA)
331	331	SLOT_INTERFACE("com", ISA8_COM)
332	332	SLOT_INTERFACE("fdc", ISA8_FDC)

src/mess/drivers/pcfx.c
r14279	r14280
20	20	: driver_device(mconfig, type, tag) { }
21	21
22	22	virtual void machine_reset();
23
	23
24	24	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
25	25	};
26	26

src/mess/drivers/chesstrv.c
r14279	r14280
197	197	/*
198	198	static TIMER_DEVICE_CALLBACK( borisdpl_timer_interrupt )
199	199	{
200		cputag_set_input_line_and_vector(timer.machine(), "maincpu", F8_INPUT_LINE_INT_REQ, HOLD_LINE, 0x20);
	200	cputag_set_input_line_and_vector(timer.machine(), "maincpu", F8_INPUT_LINE_INT_REQ, HOLD_LINE, 0x20);
201	201	}
202	202	*/
203	203
r14279	r14280
227	227
228	228	/* video hardware */
229	229	MCFG_DEFAULT_LAYOUT( layout_borisdpl )
230
	230
231	231	//MCFG_TIMER_ADD_PERIODIC("timer_interrupt", borisdpl_timer_interrupt, attotime::from_hz(40))
232	232	MACHINE_CONFIG_END
233	233

15994 Revisions