src/mess/machine/isa_finalchs.c
| r0 | r14263 | |
| 1 | /*************************************************************************** |
| 2 | |
| 3 | Final Chess Card by TASC |
| 4 | |
| 5 | TODO: |
| 6 | - skeleton, just boots the CPU |
| 7 | |
| 8 | ***************************************************************************/ |
| 9 | |
| 10 | #include "emu.h" |
| 11 | #include "isa_finalchs.h" |
| 12 | #include "cpu/m6502/m6502.h" |
| 13 | |
| 14 | static UINT8 FCH_latch_data = 0; |
| 15 | |
| 16 | static WRITE8_HANDLER( io7ff8_write ) |
| 17 | { |
| 18 | FCH_latch_data = data; |
| 19 | } |
| 20 | |
| 21 | static READ8_HANDLER( io7ff8_read ) |
| 22 | { |
| 23 | static unsigned char table[] = { 0xff, 0xfd, 0xfe }; |
| 24 | static int i = -1; |
| 25 | i++; |
| 26 | if (i == 3) i = 0; |
| 27 | return table[i]; // exercise the NMI handler for now with known commands |
| 28 | } |
| 29 | |
| 30 | static READ8_HANDLER( io6000_read ) |
| 31 | { |
| 32 | return 0x55; |
| 33 | } |
| 34 | |
| 35 | static WRITE8_HANDLER( io6000_write ) |
| 36 | { |
| 37 | FCH_latch_data = data; |
| 38 | } |
| 39 | |
| 40 | static ADDRESS_MAP_START(finalchs_mem , AS_PROGRAM, 8) |
| 41 | AM_RANGE( 0x0000, 0x1fff ) AM_RAM |
| 42 | AM_RANGE( 0x7ff8, 0x7ff8 ) AM_READ(io7ff8_read) |
| 43 | AM_RANGE( 0x7ff8, 0x7ff8 ) AM_WRITE(io7ff8_write) |
| 44 | AM_RANGE( 0x6000, 0x6000 ) AM_READ(io6000_read) |
| 45 | AM_RANGE( 0x6000, 0x6000 ) AM_WRITE(io6000_write) |
| 46 | AM_RANGE( 0x8000, 0xffff ) AM_ROM |
| 47 | ADDRESS_MAP_END |
| 48 | |
| 49 | static MACHINE_CONFIG_FRAGMENT( finalchs_config ) |
| 50 | MCFG_CPU_ADD("maincpu",M65C02,5000000) |
| 51 | MCFG_CPU_PROGRAM_MAP(finalchs_mem) |
| 52 | MACHINE_CONFIG_END |
| 53 | |
| 54 | ROM_START(finalchs) |
| 55 | ROM_REGION(0x10000,"maincpu",0) |
| 56 | ROM_LOAD("finalchs.bin", 0x8000, 0x8000, CRC(c8e72dff) SHA1(f422b19a806cef4fadd580caefaaf8c32b644098)) |
| 57 | ROM_END |
| 58 | |
| 59 | READ8_MEMBER( isa8_finalchs_device::finalchs_r ) |
| 60 | { |
| 61 | return 0; |
| 62 | } |
| 63 | |
| 64 | WRITE8_MEMBER( isa8_finalchs_device::finalchs_w ) |
| 65 | { |
| 66 | } |
| 67 | |
| 68 | //************************************************************************** |
| 69 | // GLOBAL VARIABLES |
| 70 | //************************************************************************** |
| 71 | |
| 72 | const device_type ISA8_FINALCHS = &device_creator<isa8_finalchs_device>; |
| 73 | |
| 74 | //------------------------------------------------- |
| 75 | // machine_config_additions - device-specific |
| 76 | // machine configurations |
| 77 | //------------------------------------------------- |
| 78 | |
| 79 | machine_config_constructor isa8_finalchs_device::device_mconfig_additions() const |
| 80 | { |
| 81 | return MACHINE_CONFIG_NAME( finalchs_config ); |
| 82 | } |
| 83 | |
| 84 | //************************************************************************** |
| 85 | // LIVE DEVICE |
| 86 | //************************************************************************** |
| 87 | |
| 88 | //------------------------------------------------- |
| 89 | // isa8_finalchs_device - constructor |
| 90 | //------------------------------------------------- |
| 91 | |
| 92 | isa8_finalchs_device::isa8_finalchs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 93 | : device_t(mconfig, ISA8_FINALCHS, "ISA8_FINALCHS", tag, owner, clock), |
| 94 | device_isa8_card_interface( mconfig, *this ) |
| 95 | { |
| 96 | m_shortname = "finalchs"; |
| 97 | } |
| 98 | |
| 99 | //------------------------------------------------- |
| 100 | // device_start - device-specific startup |
| 101 | //------------------------------------------------- |
| 102 | |
| 103 | void isa8_finalchs_device::device_start() |
| 104 | { |
| 105 | set_isa_device(); |
| 106 | //the included setup program allows any port from 0x100 to 0x1F0 to be selected, at increments of 0x10 |
| 107 | //picked the following at random until we get dips hooked up |
| 108 | m_isa->install_device(0x160, 0x0161, 0, 0, read8_delegate(FUNC(isa8_finalchs_device::finalchs_r), this), write8_delegate(FUNC(isa8_finalchs_device::finalchs_w), this)); |
| 109 | // timer_pulse(machine, ATTOTIME_IN_HZ(1), NULL, 0, cause_M6502_irq); |
| 110 | } |
| 111 | |
| 112 | //------------------------------------------------- |
| 113 | // device_reset - device-specific reset |
| 114 | //------------------------------------------------- |
| 115 | |
| 116 | void isa8_finalchs_device::device_reset() |
| 117 | { |
| 118 | } |
| 119 | |
| 120 | //------------------------------------------------- |
| 121 | // rom_region - device-specific ROM region |
| 122 | //------------------------------------------------- |
| 123 | |
| 124 | const rom_entry *isa8_finalchs_device::device_rom_region() const |
| 125 | { |
| 126 | return ROM_NAME( finalchs ); |
| 127 | } |
src/mess/machine/isa_finalchs.h
| r0 | r14263 | |
| 1 | #pragma once |
| 2 | |
| 3 | #ifndef __ISA_FINALCHS_H__ |
| 4 | #define __ISA_FINALCHS_H__ |
| 5 | |
| 6 | #include "emu.h" |
| 7 | #include "machine/isa.h" |
| 8 | |
| 9 | //************************************************************************** |
| 10 | // TYPE DEFINITIONS |
| 11 | //************************************************************************** |
| 12 | |
| 13 | // ======================> isa8_finalchs_device |
| 14 | |
| 15 | class isa8_finalchs_device : |
| 16 | public device_t, |
| 17 | public device_isa8_card_interface |
| 18 | { |
| 19 | public: |
| 20 | // construction/destruction |
| 21 | isa8_finalchs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 22 | |
| 23 | DECLARE_READ8_MEMBER(finalchs_r); |
| 24 | DECLARE_WRITE8_MEMBER(finalchs_w); |
| 25 | // optional information overrides |
| 26 | virtual machine_config_constructor device_mconfig_additions() const; |
| 27 | virtual const rom_entry *device_rom_region() const; |
| 28 | protected: |
| 29 | // device-level overrides |
| 30 | virtual void device_start(); |
| 31 | virtual void device_reset(); |
| 32 | |
| 33 | private: |
| 34 | // internal state |
| 35 | }; |
| 36 | |
| 37 | |
| 38 | // device type definition |
| 39 | extern const device_type ISA8_FINALCHS; |
| 40 | |
| 41 | #endif /* __ISA_FINALCHS_H__ */ |
src/mess/drivers/mmodular.c
| r14262 | r14263 | |
| 26 | 26 | misc non-modular/non-68K boards |
| 27 | 27 | |
| 28 | 28 | RISC 2500 (Skeleton, does not work, and not sure the same internal chessboard connections are used) |
| 29 | | Final Chess Card by TASC (this is not Mephisto at all, but wanted to make sure it didn't get lost) |
| 30 | 29 | Academy 65C02 4.9152mhz |
| 31 | 30 | Monte Carlo IV, Mega IV and any others not listed above have correct ROM/RAM and maybe LCD, not much else for now |
| 32 | 31 | |
| r14262 | r14263 | |
| 106 | 105 | // Berlin Pro 68020 |
| 107 | 106 | static UINT32 BPL32latch_data = 0; |
| 108 | 107 | |
| 109 | | // Final Chess Card |
| 110 | | static UINT8 FCH_latch_data = 0; |
| 111 | 108 | |
| 112 | | |
| 113 | 109 | // Mephisto Academy |
| 114 | 110 | static UINT8 academyallowNMI = 0; |
| 115 | 111 | |
| r14262 | r14263 | |
| 934 | 930 | logerror("Write to RISC2500 1000000\n"); |
| 935 | 931 | } |
| 936 | 932 | |
| 937 | | static WRITE8_HANDLER( io7ff8_write ) |
| 938 | | { |
| 939 | | FCH_latch_data = data; |
| 940 | | } |
| 941 | | |
| 942 | | static READ8_HANDLER( io7ff8_read ) |
| 943 | | { |
| 944 | | static unsigned char table[] = { 0xff, 0xfd, 0xfe }; |
| 945 | | static int i = -1; |
| 946 | | i++; |
| 947 | | if (i == 3) i = 0; |
| 948 | | return table[i]; // exercise the NMI handler for now with known commands |
| 949 | | } |
| 950 | | |
| 951 | | static READ8_HANDLER( io6000_read ) |
| 952 | | { |
| 953 | | return 0x55; |
| 954 | | } |
| 955 | | |
| 956 | | static WRITE8_HANDLER( io6000_write ) |
| 957 | | { |
| 958 | | FCH_latch_data = data; |
| 959 | | } |
| 960 | | |
| 961 | 933 | static TIMER_DEVICE_CALLBACK( timer_update_irq6 ) |
| 962 | 934 | { |
| 963 | 935 | cputag_set_input_line(timer.machine(), "maincpu", 6, HOLD_LINE); |
| r14262 | r14263 | |
| 1021 | 993 | mboard_savestate_register(machine); |
| 1022 | 994 | } |
| 1023 | 995 | |
| 1024 | | static MACHINE_START( finalchs ) |
| 1025 | | { |
| 1026 | | // timer_pulse(machine, ATTOTIME_IN_HZ(1), NULL, 0, cause_M6502_irq); |
| 1027 | | } |
| 1028 | | |
| 1029 | 996 | static MACHINE_START( diablo68 ) |
| 1030 | 997 | { |
| 1031 | 998 | |
| r14262 | r14263 | |
| 1255 | 1222 | ADDRESS_MAP_END |
| 1256 | 1223 | |
| 1257 | 1224 | |
| 1258 | | static ADDRESS_MAP_START(finalchs_mem , AS_PROGRAM, 8) |
| 1259 | | AM_RANGE( 0x0000, 0x1fff ) AM_RAM |
| 1260 | | AM_RANGE( 0x7ff8, 0x7ff8 ) AM_READ(io7ff8_read) |
| 1261 | | AM_RANGE( 0x7ff8, 0x7ff8 ) AM_WRITE(io7ff8_write) |
| 1262 | | AM_RANGE( 0x6000, 0x6000 ) AM_READ(io6000_read) |
| 1263 | | AM_RANGE( 0x6000, 0x6000 ) AM_WRITE(io6000_write) |
| 1264 | | AM_RANGE( 0x8000, 0xffff ) AM_ROM |
| 1265 | | ADDRESS_MAP_END |
| 1266 | | |
| 1267 | 1225 | static ADDRESS_MAP_START(academy_mem , AS_PROGRAM, 8) |
| 1268 | 1226 | AM_RANGE( 0x0000, 0x1fff ) AM_RAM |
| 1269 | 1227 | AM_RANGE( 0x2400, 0x2400 ) AM_READ ( read_keys_board_academy ) |
| r14262 | r14263 | |
| 1599 | 1557 | |
| 1600 | 1558 | MACHINE_CONFIG_END |
| 1601 | 1559 | |
| 1602 | | static SCREEN_UPDATE_IND16( finalchs ) |
| 1603 | | { |
| 1604 | | return 0; |
| 1605 | | } |
| 1606 | 1560 | |
| 1607 | | static MACHINE_CONFIG_START( finalchs, driver_device ) |
| 1608 | | MCFG_CPU_ADD("maincpu",M65C02,5000000) |
| 1609 | | MCFG_CPU_PROGRAM_MAP(finalchs_mem) |
| 1610 | | MCFG_MACHINE_START(finalchs) |
| 1611 | | MCFG_SCREEN_ADD("screen", RASTER) |
| 1612 | | MCFG_SCREEN_REFRESH_RATE(50) |
| 1613 | | MCFG_SCREEN_UPDATE_STATIC(finalchs) |
| 1614 | | MCFG_SCREEN_SIZE(6*16, 9*2) |
| 1615 | | MCFG_SCREEN_VISIBLE_AREA(0, 6*16-1, 0, 9*2-1) |
| 1616 | | MCFG_PALETTE_LENGTH(2) |
| 1617 | | MCFG_PALETTE_INIT(chess_lcd) |
| 1618 | | |
| 1619 | | MACHINE_CONFIG_END |
| 1620 | | |
| 1621 | 1561 | static MACHINE_CONFIG_DERIVED( milano, polgar ) |
| 1622 | 1562 | MCFG_CPU_MODIFY("maincpu") |
| 1623 | 1563 | MCFG_CPU_PROGRAM_MAP(milano_mem) |
| r14262 | r14263 | |
| 1815 | 1755 | ROM_LOAD( "44780a00.bin", 0x0000, 0x0860, BAD_DUMP CRC(3a89024c) SHA1(5a87b68422a916d1b37b5be1f7ad0b3fb3af5a8d)) |
| 1816 | 1756 | ROM_END |
| 1817 | 1757 | |
| 1818 | | ROM_START(finalchs) |
| 1819 | | ROM_REGION(0x10000,"maincpu",0) |
| 1820 | | ROM_LOAD("finalchs.bin", 0x8000, 0x8000, CRC(c8e72dff) SHA1(f422b19a806cef4fadd580caefaaf8c32b644098)) |
| 1821 | | ROM_END |
| 1822 | | |
| 1823 | 1758 | ROM_START(megaiv) |
| 1824 | 1759 | ROM_REGION(0x10000,"maincpu",0) |
| 1825 | 1760 | ROM_LOAD("megaiv.bin", 0x8000, 0x8000, CRC(dee355d2) SHA1(6bc79c0fb169020f017412f5f9696b9ecafbf99f)) |
| r14262 | r14263 | |
| 1998 | 1933 | CONS( 1988, sforteba, sfortea, 0, sfortea, sfortea, 0,"Novag", "Novag Super Forte B Chess Computer (ALT)",GAME_NO_SOUND|GAME_SUPPORTS_SAVE|GAME_NOT_WORKING ) |
| 1999 | 1934 | CONS( 1988, sexpertb, sfortea, 0, sfortea, sfortea, 0,"Novag", "Novag Expert B Chess Computer",GAME_NO_SOUND|GAME_SUPPORTS_SAVE|GAME_NOT_WORKING ) |
| 2000 | 1935 | CONS( 1989, academy, 0, 0, academy, academy, 0, "Hegener & Glaser", "Mephisto Academy Schachcomputer",GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING ) |
| 2001 | | CONS( 1989, finalchs,0, 0,finalchs, 0, 0,"TASC", "The Final Chess Card",GAME_NOT_WORKING|GAME_NO_SOUND ) |
| 2002 | 1936 | CONS( 1989, megaiv, 0, 0, megaiv, megaiv, 0, "Hegener & Glaser", "Mephisto Mega IV Schachcomputer",GAME_SUPPORTS_SAVE|GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK ) |
| 2003 | 1937 | CONS( 1989, milano, polgar, 0, milano, polgar, polgar, "Hegener & Glaser", "Mephisto Milano Schachcomputer",GAME_REQUIRES_ARTWORK ) |
| 2004 | 1938 | //CONS( 1989, montec4, 0, 0, monteciv, monteciv, 0, "Hegener & Glaser", "Mephisto Monte Carlo IV",GAME_SUPPORTS_SAVE|GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK ) |