src/emu/cpu/m68000/m68kfpu.c
| r14141 | r14142 | |
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| 1823 | 1823 | m68k->fpu_just_reset = 1; |
| 1824 | 1824 | } |
| 1825 | 1825 | |
| 1826 | static void m68040_do_fsave(m68ki_cpu_core *m68k, UINT32 addr, int reg, int inc) |
| 1827 | { |
| 1828 | if (m68k->fpu_just_reset) |
| 1829 | { |
| 1830 | m68ki_write_32(m68k, addr, 0); |
| 1831 | } |
| 1832 | else |
| 1833 | { |
| 1834 | // we normally generate an IDLE frame |
| 1835 | if(reg != -1) |
| 1836 | REG_A(m68k)[reg] += inc ? 6*4 : -6*4; |
| 1837 | perform_fsave(m68k, addr, inc); |
| 1838 | } |
| 1839 | } |
| 1840 | |
| 1841 | static void m68040_do_frestore(m68ki_cpu_core *m68k, UINT32 addr, int reg) |
| 1842 | { |
| 1843 | UINT32 temp = m68ki_read_32(m68k, addr); |
| 1844 | |
| 1845 | // check for NULL frame |
| 1846 | if (temp & 0xff000000) |
| 1847 | { |
| 1848 | // we don't handle non-NULL frames |
| 1849 | m68k->fpu_just_reset = 0; |
| 1850 | |
| 1851 | if (reg != -1) |
| 1852 | { |
| 1853 | // how about an IDLE frame? |
| 1854 | if ((temp & 0x00ff0000) == 0x00180000) |
| 1855 | { |
| 1856 | REG_A(m68k)[reg] += 6*4; |
| 1857 | } // check UNIMP |
| 1858 | else if ((temp & 0x00ff0000) == 0x00380000) |
| 1859 | { |
| 1860 | REG_A(m68k)[reg] += 14*4; |
| 1861 | } // check BUSY |
| 1862 | else if ((temp & 0x00ff0000) == 0x00b40000) |
| 1863 | { |
| 1864 | REG_A(m68k)[reg] += 45*4; |
| 1865 | } |
| 1866 | } |
| 1867 | } |
| 1868 | else |
| 1869 | { |
| 1870 | do_frestore_null(m68k); |
| 1871 | } |
| 1872 | } |
| 1873 | |
| 1826 | 1874 | void m68040_fpu_op1(m68ki_cpu_core *m68k) |
| 1827 | 1875 | { |
| 1828 | 1876 | int ea = m68k->ir & 0x3f; |
| 1829 | 1877 | int mode = (ea >> 3) & 0x7; |
| 1830 | 1878 | int reg = (ea & 0x7); |
| 1831 | | UINT32 addr, temp; |
| 1879 | UINT32 addr |
| 1832 | 1880 | |
| 1833 | 1881 | switch ((m68k->ir >> 6) & 0x3) |
| 1834 | 1882 | { |
| r14141 | r14142 | |
|---|
| 1838 | 1886 | { |
| 1839 | 1887 | case 2: // (An) |
| 1840 | 1888 | addr = REG_A(m68k)[reg]; |
| 1841 | | |
| 1842 | | if (m68k->fpu_just_reset) |
| 1843 | | { |
| 1844 | | m68ki_write_32(m68k, addr, 0); |
| 1845 | | } |
| 1846 | | else |
| 1847 | | { |
| 1848 | | // we normally generate an IDLE frame |
| 1849 | | perform_fsave(m68k, addr, 1); |
| 1850 | | } |
| 1889 | m68040_do_fsave(m68k, addr, -1, 1); |
| 1851 | 1890 | break; |
| 1852 | 1891 | |
| 1853 | 1892 | case 3: // (An)+ |
| 1854 | | addr = EA_AY_PI_32(m68k); |
| 1893 | addr = EA_AY_PI_32(m68k); |
| 1894 | m68040_do_fsave(m68k, addr, reg, 1); |
| 1895 | break; |
| 1855 | 1896 | |
| 1856 | | if (m68k->fpu_just_reset) |
| 1857 | | { |
| 1858 | | m68ki_write_32(m68k, addr, 0); |
| 1859 | | } |
| 1860 | | else |
| 1861 | | { |
| 1862 | | // we normally generate an IDLE frame |
| 1863 | | REG_A(m68k)[reg] += 6*4; |
| 1864 | | perform_fsave(m68k, addr, 1); |
| 1865 | | } |
| 1866 | | break; |
| 1897 | case 4: // -(An) |
| 1898 | addr = EA_AY_PD_32(m68k); |
| 1899 | m68040_do_fsave(m68k, addr, reg, 0); |
| 1900 | break; |
| 1867 | 1901 | |
| 1868 | | case 4: // -(An) |
| 1869 | | addr = EA_AY_PD_32(m68k); |
| 1902 | case 5: // (D16, An) |
| 1903 | addr = EA_AY_DI_16(m68k); |
| 1904 | m68040_do_fsave(m68k, addr, -1, 0); |
| 1905 | break; |
| 1870 | 1906 | |
| 1871 | | if (m68k->fpu_just_reset) |
| 1907 | case 7: // |
| 1908 | switch (reg) |
| 1909 | { |
| 1910 | case 1: // (abs32) |
| 1872 | 1911 | { |
| 1873 | | m68ki_write_32(m68k, addr, 0); |
| 1912 | addr = EA_AL_32(m68k); |
| 1913 | m68040_do_fsave(m68k, addr, -1, 1); |
| 1914 | break; |
| 1874 | 1915 | } |
| 1875 | | else |
| 1916 | case 2: // (d16, PC) |
| 1876 | 1917 | { |
| 1877 | | // we normally generate an IDLE frame |
| 1878 | | REG_A(m68k)[reg] -= 6*4; |
| 1879 | | perform_fsave(m68k, addr, 0); |
| 1918 | addr = EA_PCDI_16(m68k); |
| 1919 | m68040_do_fsave(m68k, addr, -1, 1); |
| 1920 | break; |
| 1880 | 1921 | } |
| 1881 | | break; |
| 1922 | default: |
| 1923 | fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1924 | } |
| 1882 | 1925 | |
| 1883 | | default: |
| 1884 | | fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1926 | break; |
| 1927 | |
| 1928 | default: |
| 1929 | fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1885 | 1930 | } |
| 1886 | 1931 | break; |
| 1887 | 1932 | } |
| r14141 | r14142 | |
|---|
| 1891 | 1936 | { |
| 1892 | 1937 | switch (mode) |
| 1893 | 1938 | { |
| 1894 | | case 2: // (An) |
| 1895 | | addr = REG_A(m68k)[reg]; |
| 1896 | | temp = m68ki_read_32(m68k, addr); |
| 1939 | case 2: // (An) |
| 1940 | addr = REG_A(m68k)[reg]; |
| 1941 | m68040_do_frestore(m68k, addr, -1); |
| 1942 | break; |
| 1897 | 1943 | |
| 1898 | | // check for NULL frame |
| 1899 | | if (temp & 0xff000000) |
| 1900 | | { |
| 1901 | | // we don't handle non-NULL frames and there's no pre/post inc/dec to do here |
| 1902 | | m68k->fpu_just_reset = 0; |
| 1903 | | } |
| 1904 | | else |
| 1905 | | { |
| 1906 | | do_frestore_null(m68k); |
| 1907 | | } |
| 1908 | | break; |
| 1944 | case 3: // (An)+ |
| 1945 | addr = EA_AY_PI_32(m68k); |
| 1946 | m68040_do_frestore(m68k, addr, reg); |
| 1947 | break; |
| 1909 | 1948 | |
| 1910 | | case 3: // (An)+ |
| 1911 | | addr = EA_AY_PI_32(m68k); |
| 1912 | | temp = m68ki_read_32(m68k, addr); |
| 1949 | case 5: // (D16, An) |
| 1950 | addr = EA_AY_DI_16(m68k); |
| 1951 | m68040_do_frestore(m68k, addr, -1); |
| 1952 | break; |
| 1913 | 1953 | |
| 1914 | | // check for NULL frame |
| 1915 | | if (temp & 0xff000000) |
| 1954 | case 7: // |
| 1955 | switch (reg) |
| 1956 | { |
| 1957 | case 1: // (abs32) |
| 1916 | 1958 | { |
| 1917 | | m68k->fpu_just_reset = 0; |
| 1918 | | |
| 1919 | | // how about an IDLE frame? |
| 1920 | | if ((temp & 0x00ff0000) == 0x00180000) |
| 1921 | | { |
| 1922 | | REG_A(m68k)[reg] += 6*4; |
| 1923 | | } // check UNIMP |
| 1924 | | else if ((temp & 0x00ff0000) == 0x00380000) |
| 1925 | | { |
| 1926 | | REG_A(m68k)[reg] += 14*4; |
| 1927 | | } // check BUSY |
| 1928 | | else if ((temp & 0x00ff0000) == 0x00b40000) |
| 1929 | | { |
| 1930 | | REG_A(m68k)[reg] += 45*4; |
| 1931 | | } |
| 1959 | addr = EA_AL_32(m68k); |
| 1960 | m68040_do_frestore(m68k, addr, -1); |
| 1961 | break; |
| 1932 | 1962 | } |
| 1933 | | else |
| 1963 | case 2: // (d16, PC) |
| 1934 | 1964 | { |
| 1935 | | do_frestore_null(m68k); |
| 1965 | addr = EA_PCDI_16(m68k); |
| 1966 | m68040_do_frestore(m68k, addr, -1); |
| 1967 | break; |
| 1936 | 1968 | } |
| 1937 | | break; |
| 1969 | default: |
| 1970 | fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1971 | } |
| 1938 | 1972 | |
| 1939 | | case 5: // (D16, An) |
| 1940 | | addr = EA_AY_DI_16(m68k); |
| 1941 | | temp = m68ki_read_32(m68k, addr); |
| 1973 | break; |
| 1942 | 1974 | |
| 1943 | | // check for NULL frame |
| 1944 | | if (temp & 0xff000000) |
| 1945 | | { |
| 1946 | | // we don't handle non-NULL frames and there's no pre/post inc/dec to do here |
| 1947 | | m68k->fpu_just_reset = 0; |
| 1948 | | } |
| 1949 | | else |
| 1950 | | { |
| 1951 | | do_frestore_null(m68k); |
| 1952 | | } |
| 1953 | | break; |
| 1954 | | |
| 1955 | | case 7: // |
| 1956 | | switch (reg) |
| 1957 | | { |
| 1958 | | case 2: // (d16, PC) |
| 1959 | | { |
| 1960 | | addr = EA_PCDI_16(m68k);; |
| 1961 | | temp = m68ki_read_32(m68k, addr); |
| 1962 | | |
| 1963 | | // check for NULL frame |
| 1964 | | if (temp & 0xff000000) |
| 1965 | | { |
| 1966 | | // we don't handle non-NULL frames and there's no pre/post inc/dec to do here |
| 1967 | | m68k->fpu_just_reset = 0; |
| 1968 | | } |
| 1969 | | else |
| 1970 | | { |
| 1971 | | do_frestore_null(m68k); |
| 1972 | | } |
| 1973 | | break; |
| 1974 | | } |
| 1975 | | default: |
| 1976 | | fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1977 | | } |
| 1978 | | |
| 1979 | | break; |
| 1980 | | |
| 1981 | | default: |
| 1982 | | fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1975 | default: |
| 1976 | fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k)); |
| 1983 | 1977 | } |
| 1984 | 1978 | break; |
| 1985 | 1979 | } |