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r14099 Thursday 19th January, 2012 at 22:58:55 UTC by Barry Rodewald
i386: Fixed BSR/BSF and CMPS based on test-i386 output.
[src/emu/cpu/i386]i386.c i386op16.c i386op32.c

src/emu/cpu/i386/i386op16.c
r14098r14099
287287         dst = temp;
288288         CYCLES(cpustate,CYCLES_BSF);
289289      }
290      STORE_REG16(modrm, dst);
290291   }
291292   CYCLES(cpustate,CYCLES_BSF_BASE);
292   STORE_REG16(modrm, dst);
293293}
294294
295295static void I386OP(bsr_r16_rm16)(i386_state *cpustate)      // Opcode 0x0f bd
r14098r14099
316316         dst = temp;
317317         CYCLES(cpustate,CYCLES_BSR);
318318      }
319      STORE_REG16(modrm, dst);
319320   }
320321   CYCLES(cpustate,CYCLES_BSR_BASE);
321   STORE_REG16(modrm, dst);
322322}
323323
324324
r14098r14099
552552   ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI) );
553553   src = READ16(cpustate,eas);
554554   dst = READ16(cpustate,ead);
555   SUB16(cpustate,dst, src);
555   SUB16(cpustate,src,dst);
556556   BUMP_SI(cpustate,2);
557557   BUMP_DI(cpustate,2);
558558   CYCLES(cpustate,CYCLES_CMPS);
src/emu/cpu/i386/i386.c
r14098r14099
10601060   CHANGE_PC(cpustate,cpustate->eip);
10611061
10621062   cpustate->CPL = cpustate->sreg[CS].selector & 0x03;
1063   printf("286 Task Switch from selector %04x to %04x\n",old_task,selector);
1063//   printf("286 Task Switch from selector %04x to %04x\n",old_task,selector);
10641064}
10651065
10661066static void i386_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested)
r14098r14099
11751175   CHANGE_PC(cpustate,cpustate->eip);
11761176
11771177   cpustate->CPL = cpustate->sreg[CS].selector & 0x03;
1178   printf("386 Task Switch from selector %04x to %04x\n",old_task,selector);
1178//   printf("386 Task Switch from selector %04x to %04x\n",old_task,selector);
11791179}
11801180
11811181static void i386_check_irq_line(i386_state *cpustate)
src/emu/cpu/i386/i386op32.c
r14098r14099
289289         dst = temp;
290290         CYCLES(cpustate,CYCLES_BSF);
291291      }
292      STORE_REG32(modrm, dst);
292293   }
293294   CYCLES(cpustate,CYCLES_BSF_BASE);
294   STORE_REG32(modrm, dst);
295295}
296296
297297static void I386OP(bsr_r32_rm32)(i386_state *cpustate)      // Opcode 0x0f bd
r14098r14099
318318         dst = temp;
319319         CYCLES(cpustate,CYCLES_BSR);
320320      }
321      STORE_REG32(modrm, dst);
321322   }
322323   CYCLES(cpustate,CYCLES_BSR_BASE);
323   STORE_REG32(modrm, dst);
324324}
325325
326326static void I386OP(bt_rm32_r32)(i386_state *cpustate)      // Opcode 0x0f a3
r14098r14099
548548   ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI) );
549549   src = READ32(cpustate,eas);
550550   dst = READ32(cpustate,ead);
551   SUB32(cpustate,dst, src);
551   SUB32(cpustate,src,dst);
552552   BUMP_SI(cpustate,4);
553553   BUMP_DI(cpustate,4);
554554   CYCLES(cpustate,CYCLES_CMPS);

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