src/mess/drivers/fp1100.c
| r12875 | r12876 | |
| 42 | 42 | 'sub' (06E4): unmapped i/o memory write to 00 = 47 & FF |
| 43 | 43 | 'sub' (06EA): unmapped program memory write to F000 = 70 & FF |
| 44 | 44 | |
| 45 | 2011-09-18 Video (bitmapped) added. Notes: |
| 46 | - The colour planes are a guess (r,g,b might need swapping around) |
| 47 | - In "irq_mask_w" is a read of e800. Without this, no videoram writes occur. |
| 48 | - In "fp1100_vram_w" the data is inverted. Without it, a flashing cursor can be seen. |
| 49 | - The text mode is also present at 9000-97FF of the maincpu (not bitmapped). |
| 50 | |
| 45 | 51 | ****************************************************************************/ |
| 46 | 52 | #define ADDRESS_MAP_MODERN |
| 47 | 53 | |
| r12875 | r12876 | |
| 55 | 61 | { |
| 56 | 62 | public: |
| 57 | 63 | fp1100_state(const machine_config &mconfig, device_type type, const char *tag) |
| 58 | | : driver_device(mconfig, type, tag) { } |
| 64 | : driver_device(mconfig, type, tag), |
| 65 | m_maincpu(*this, "maincpu"), |
| 66 | m_subcpu(*this, "sub"), |
| 67 | //m_cass(*this, CASSETTE_TAG), |
| 68 | //m_wave(*this, WAVE_TAG), |
| 69 | //m_speaker(*this, SPEAKER_TAG), |
| 70 | //m_printer(*this, "centronics"), |
| 71 | m_crtc(*this, "crtc") |
| 72 | //m_fdc(*this, "fdc") |
| 73 | { } |
| 59 | 74 | |
| 75 | required_device<cpu_device> m_maincpu; |
| 76 | required_device<cpu_device> m_subcpu; |
| 77 | //required_device<cassette_image_device> m_cass; |
| 78 | //required_device<device_t> m_wave; |
| 79 | //required_device<device_t> m_speaker; |
| 80 | //required_device<device_t> m_printer; |
| 81 | required_device<mc6845_device> m_crtc; |
| 82 | //required_device<device_t> m_fdc; |
| 60 | 83 | DECLARE_READ8_MEMBER(fp1100_mem_r); |
| 61 | 84 | DECLARE_WRITE8_MEMBER(fp1100_mem_w); |
| 62 | 85 | DECLARE_WRITE8_MEMBER(main_bank_w); |
| r12875 | r12876 | |
| 72 | 95 | DECLARE_WRITE8_MEMBER(sub_to_main_w); |
| 73 | 96 | DECLARE_WRITE8_MEMBER(portc_w); |
| 74 | 97 | UINT8 *m_wram; |
| 75 | | UINT8 *m_vram; |
| 98 | UINT8 *m_p_videoram; |
| 76 | 99 | UINT8 m_mem_bank; |
| 77 | 100 | UINT8 irq_mask; |
| 78 | 101 | UINT8 m_main_latch; |
| r12875 | r12876 | |
| 96 | 119 | |
| 97 | 120 | static SCREEN_UPDATE( fp1100 ) |
| 98 | 121 | { |
| 122 | fp1100_state *state = screen->machine().driver_data<fp1100_state>(); |
| 123 | state->m_crtc->update( bitmap, cliprect); |
| 99 | 124 | return 0; |
| 100 | 125 | } |
| 101 | 126 | |
| 127 | static MC6845_UPDATE_ROW( fp1100_update_row ) |
| 128 | { |
| 129 | fp1100_state *state = device->machine().driver_data<fp1100_state>(); |
| 130 | UINT8 r,g,b,col,i; |
| 131 | UINT16 mem,x; |
| 132 | UINT16 *p = BITMAP_ADDR16(bitmap, y, 0); |
| 133 | |
| 134 | for (x = 0; x < x_count; x++) |
| 135 | { |
| 136 | mem = (((ma+x)<<3) + ra) & 0x3fff; |
| 137 | r = state->m_p_videoram[mem]; |
| 138 | g = state->m_p_videoram[mem+0x4000]; |
| 139 | b = state->m_p_videoram[mem+0x8000]; |
| 140 | |
| 141 | for (i = 0; i < 8; i++) |
| 142 | { |
| 143 | col = BIT(r, i) + (BIT(g, i) << 1) + (BIT(b, i) << 2); |
| 144 | if (x == cursor_x) col ^= 7; |
| 145 | *p++ = col; |
| 146 | } |
| 147 | } |
| 148 | } |
| 149 | |
| 102 | 150 | READ8_MEMBER( fp1100_state::fp1100_mem_r ) |
| 103 | 151 | { |
| 104 | 152 | if(m_mem_bank == 0 && offset <= 0x8fff) |
| r12875 | r12876 | |
| 128 | 176 | |
| 129 | 177 | irq_mask = data; |
| 130 | 178 | ///printf("%02x\n",data); |
| 131 | | |
| 179 | // FIXME - the below 2 lines are needed, otherwise nothing ever gets written to videoram |
| 180 | address_space *mem = m_subcpu->memory().space(AS_PROGRAM); |
| 181 | data = mem->read_byte(0xe800); |
| 132 | 182 | } |
| 133 | 183 | |
| 134 | 184 | WRITE8_MEMBER( fp1100_state::main_to_sub_w ) |
| r12875 | r12876 | |
| 175 | 225 | |
| 176 | 226 | READ8_MEMBER( fp1100_state::fp1100_vram_r ) |
| 177 | 227 | { |
| 178 | | return m_vram[offset]; |
| 228 | return m_p_videoram[offset]; |
| 179 | 229 | } |
| 180 | 230 | |
| 181 | 231 | WRITE8_MEMBER( fp1100_state::fp1100_vram_w ) |
| 182 | 232 | { |
| 183 | | m_vram[offset] = data ^ 0xff; |
| 233 | m_p_videoram[offset] = ~data; |
| 184 | 234 | } |
| 185 | 235 | |
| 186 | 236 | READ8_MEMBER( fp1100_state::main_to_sub_r ) |
| r12875 | r12876 | |
| 201 | 251 | AM_RANGE(0xff80, 0xffff) AM_RAM /* upd7801 internal RAM */ |
| 202 | 252 | AM_RANGE(0x0000, 0x0fff) AM_ROM AM_REGION("sub_ipl",0x0000) |
| 203 | 253 | AM_RANGE(0x1000, 0x1fff) AM_ROM AM_REGION("sub_ipl",0x1000) |
| 204 | | AM_RANGE(0x2000, 0xdfff) AM_READWRITE(fp1100_vram_r,fp1100_vram_w) AM_BASE(m_vram) //vram B/R/G |
| 254 | AM_RANGE(0x2000, 0xdfff) AM_READWRITE(fp1100_vram_r,fp1100_vram_w) AM_BASE(m_p_videoram) //vram B/R/G |
| 205 | 255 | AM_RANGE(0xe000, 0xe000) AM_DEVWRITE("crtc", mc6845_device, address_w) |
| 206 | 256 | AM_RANGE(0xe001, 0xe001) AM_DEVWRITE("crtc", mc6845_device, register_w) |
| 207 | 257 | AM_RANGE(0xe400, 0xe400) AM_READ_PORT("DSW") AM_WRITENOP // key mux write |
| r12875 | r12876 | |
| 343 | 393 | "screen", /* screen we are acting on */ |
| 344 | 394 | 8, /* number of pixels per video memory address */ |
| 345 | 395 | NULL, /* before pixel update callback */ |
| 346 | | NULL, /* row update callback */ |
| 396 | fp1100_update_row, /* row update callback */ |
| 347 | 397 | NULL, /* after pixel update callback */ |
| 348 | 398 | DEVCB_NULL, /* callback for display state changes */ |
| 349 | 399 | DEVCB_NULL, /* callback for cursor state changes */ |
| r12875 | r12876 | |
| 375 | 425 | MCFG_MACHINE_START(fp1100) |
| 376 | 426 | MCFG_MACHINE_RESET(fp1100) |
| 377 | 427 | |
| 378 | | MCFG_MC6845_ADD("crtc", H46505, XTAL_4MHz/2, mc6845_intf) /* hand tuned to get ~60 fps */ |
| 379 | | |
| 380 | 428 | /* video hardware */ |
| 381 | 429 | MCFG_SCREEN_ADD("screen", RASTER) |
| 382 | 430 | MCFG_SCREEN_REFRESH_RATE(60) |
| r12875 | r12876 | |
| 386 | 434 | MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1) |
| 387 | 435 | MCFG_VIDEO_START(fp1100) |
| 388 | 436 | MCFG_SCREEN_UPDATE(fp1100) |
| 389 | | MCFG_PALETTE_LENGTH(2) |
| 390 | | MCFG_PALETTE_INIT(black_and_white) |
| 437 | MCFG_PALETTE_LENGTH(8) |
| 391 | 438 | MCFG_GFXDECODE(fp1100) |
| 439 | |
| 440 | /* Devices */ |
| 441 | MCFG_MC6845_ADD("crtc", H46505, XTAL_4MHz/2, mc6845_intf) /* hand tuned to get ~60 fps */ |
| 392 | 442 | MACHINE_CONFIG_END |
| 393 | 443 | |
| 394 | 444 | /* ROM definition */ |