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r12554 Wednesday 10th August, 2011 at 13:19:08 UTC by Robbbert
Z100 - modernised.
[src/mess/drivers]z100.c

src/mess/drivers/z100.c
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44
55    15/07/2011 Skeleton driver.
66
7    Commands:
8    Press H to list all the commands.
9
710    TODO:
811    - remove parity check IRQ patch (understand what it really wants there!)
912    - implement S-100 bus features;
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137140  ZDIPSWHZ    EQU 10000000B   ; 1=50Hz(0=60HZ)
138141
139142****************************************************************************/
143#define ADDRESS_MAP_MODERN
140144
141145#include "emu.h"
142146#include "cpu/i86/i86.h"
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152156{
153157public:
154158   z100_state(const machine_config &mconfig, device_type type, const char *tag)
155      : driver_device(mconfig, type, tag)
159      : driver_device(mconfig, type, tag),
160   m_maincpu(*this, "maincpu"),
161   m_pia0(*this, "pia0"),
162   m_pia1(*this, "pia1"),
163   m_picm(*this, "pic8259_master"),
164   m_pics(*this, "pic8259_slave"),
165   m_fdc(*this, "z207_fdc"),
166   m_crtc(*this, "crtc")
156167   { }
157168
169   required_device<cpu_device> m_maincpu;
170   required_device<device_t> m_pia0;
171   required_device<device_t> m_pia1;
172   required_device<device_t> m_picm;
173   required_device<device_t> m_pics;
174   required_device<device_t> m_fdc;
175   required_device<mc6845_device> m_crtc;
176   DECLARE_READ8_MEMBER(z100_vram_r);
177   DECLARE_WRITE8_MEMBER(z100_vram_w);
178   DECLARE_READ8_MEMBER(keyb_data_r);
179   DECLARE_READ8_MEMBER(keyb_status_r);
180   DECLARE_WRITE8_MEMBER(keyb_command_w);
181   DECLARE_WRITE8_MEMBER(z100_6845_address_w);
182   DECLARE_WRITE8_MEMBER(z100_6845_data_w);
183   DECLARE_READ8_MEMBER(z207_fdc_r);
184   DECLARE_WRITE8_MEMBER(z207_fdc_w);
185   DECLARE_WRITE_LINE_MEMBER(z100_pic_irq);
186   DECLARE_READ8_MEMBER(get_slave_ack);
187   DECLARE_WRITE8_MEMBER(video_pia_A_w);
188   DECLARE_WRITE8_MEMBER(video_pia_B_w);
189   DECLARE_WRITE_LINE_MEMBER(video_pia_CA2_w);
190   DECLARE_WRITE8_MEMBER(video_pia_CB2_w);
158191   UINT8 *m_gvram;
159192   UINT8 m_keyb_press,m_keyb_status;
160193   UINT8 m_vram_enable;
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232265      }
233266   }
234267
235    return 0;
268   return 0;
236269}
237270
238static READ8_HANDLER( z100_vram_r )
271READ8_MEMBER( z100_state::z100_vram_r )
239272{
240   z100_state *state = space->machine().driver_data<z100_state>();
241
242   return state->m_gvram[offset];
273   return m_gvram[offset];
243274}
244275
245static WRITE8_HANDLER( z100_vram_w )
276WRITE8_MEMBER( z100_state::z100_vram_w )
246277{
247   z100_state *state = space->machine().driver_data<z100_state>();
248
249   if(state->m_vram_enable)
278   if(m_vram_enable)
250279   {
251280      int i;
252281
253      state->m_gvram[offset] = data;
282      m_gvram[offset] = data;
254283
255284      for(i=0;i<3;i++)
256285      {
257         if(state->m_gbank & (1 << i))
258            state->m_gvram[((offset) & 0xffff)+0x10000*i] = data;
286         if(m_gbank & (1 << i))
287            m_gvram[((offset) & 0xffff)+0x10000*i] = data;
259288      }
260289   }
261290}
262291
263static ADDRESS_MAP_START(z100_mem, AS_PROGRAM, 8)
292static ADDRESS_MAP_START(z100_mem, AS_PROGRAM, 8, z100_state)
264293   ADDRESS_MAP_UNMAP_HIGH
265294   AM_RANGE(0x00000,0x3ffff) AM_RAM // 128*2 KB RAM
266295//  AM_RANGE(0xb0000,0xbffff) AM_ROM // expansion ROM
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271300   AM_RANGE(0xfc000,0xfffff) AM_ROM AM_REGION("ipl", 0)
272301ADDRESS_MAP_END
273302
274static READ8_HANDLER(keyb_data_r)
303READ8_MEMBER( z100_state::keyb_data_r )
275304{
276   z100_state *state = space->machine().driver_data<z100_state>();
277
278   if(state->m_keyb_press)
305   if(m_keyb_press)
279306   {
280307      UINT8 res;
281308
282      res = state->m_keyb_press;
309      res = m_keyb_press;
283310
284      state->m_keyb_press = 0;
311      m_keyb_press = 0;
285312      return res;
286313   }
287314
288   return state->m_keyb_press;
315   return m_keyb_press;
289316}
290317
291static READ8_HANDLER(keyb_status_r)
318READ8_MEMBER( z100_state::keyb_status_r )
292319{
293   z100_state *state = space->machine().driver_data<z100_state>();
294
295   if(state->m_keyb_status)
320   if(m_keyb_status)
296321   {
297      state->m_keyb_status = 0;
322      m_keyb_status = 0;
298323      return 1;
299324   }
300325
301   return state->m_keyb_status;
326   return m_keyb_status;
302327}
303328
304static WRITE8_HANDLER(keyb_command_w)
329WRITE8_MEMBER( z100_state::keyb_command_w )
305330{
306331   // ...
307332}
308333
309static WRITE8_HANDLER( z100_6845_address_w )
334WRITE8_MEMBER( z100_state::z100_6845_address_w )
310335{
311   z100_state *state = space->machine().driver_data<z100_state>();
312
313   state->m_crtc_index = data;
314   state->m_mc6845->address_w(*space, offset, data);
336   data &= 0x1f;
337   m_crtc_index = data;
338   m_crtc->address_w( space, offset, data );
315339}
316340
317static WRITE8_HANDLER( z100_6845_data_w )
341WRITE8_MEMBER( z100_state::z100_6845_data_w )
318342{
319   z100_state *state = space->machine().driver_data<z100_state>();
320
321   state->m_crtc_vreg[state->m_crtc_index] = data;
322   state->m_mc6845->register_w(*space, offset, data);
343   m_crtc_vreg[m_crtc_index] = data;
344   m_crtc->register_w(space, offset, data);
323345}
324346
325static READ8_HANDLER( z207_fdc_r )
347READ8_MEMBER( z100_state::z207_fdc_r )
326348{
327   device_t* dev = space->machine().device("z207_fdc");
328349   UINT8 res;
329350
330351   res = 0;
331352
332353   switch(offset)
333354   {
334      case 0: res = wd17xx_status_r(dev,offset); break;
335      case 1: res = wd17xx_track_r(dev,offset);  break;
336      case 2: res = wd17xx_sector_r(dev,offset); break;
337      case 3: res = wd17xx_data_r(dev,offset); break;
355      case 0: res = wd17xx_status_r(m_fdc,offset); break;
356      case 1: res = wd17xx_track_r(m_fdc,offset);  break;
357      case 2: res = wd17xx_sector_r(m_fdc,offset); break;
358      case 3: res = wd17xx_data_r(m_fdc,offset); break;
338359   }
339360
340361   return res;
341362}
342363
343static WRITE8_HANDLER( z207_fdc_w )
364WRITE8_MEMBER( z100_state::z207_fdc_w )
344365{
345   z100_state *state = space->machine().driver_data<z100_state>();
346   device_t* dev = space->machine().device("z207_fdc");
347//  UINT8 res;
348
349//  res = 0;
350
351366   switch(offset)
352367   {
353      case 0: wd17xx_command_w(dev,offset,data); break;
354      case 1: wd17xx_track_w(dev,offset,data); break;
355      case 2: wd17xx_sector_w(dev,offset,data); break;
356      case 3: wd17xx_data_w(dev,offset,data); break;
368      case 0: wd17xx_command_w(m_fdc,offset,data); break;
369      case 1: wd17xx_track_w(m_fdc,offset,data); break;
370      case 2: wd17xx_sector_w(m_fdc,offset,data); break;
371      case 3: wd17xx_data_w(m_fdc,offset,data); break;
357372      case 4: // disk control
358         wd17xx_set_drive(dev,data & 3);
359         state->m_z207_cur_drive = data & 3;
373         wd17xx_set_drive(m_fdc,data & 3);
374         m_z207_cur_drive = data & 3;
360375         break;
361376      case 5: // aux control
362         floppy_mon_w(floppy_get_device(space->machine(), state->m_z207_cur_drive), !BIT(data, 1));
363         floppy_drive_set_ready_state(floppy_get_device(space->machine(), state->m_z207_cur_drive), data & 2,0);
377         floppy_mon_w(floppy_get_device(machine(), m_z207_cur_drive), !BIT(data, 1));
378         floppy_drive_set_ready_state(floppy_get_device(machine(), m_z207_cur_drive), data & 2,0);
364379         break;
365380
366381   }
367382}
368383
369static ADDRESS_MAP_START( z100_io , AS_IO, 8)
384static ADDRESS_MAP_START(z100_io, AS_IO, 8, z100_state)
370385   ADDRESS_MAP_UNMAP_HIGH
386   ADDRESS_MAP_GLOBAL_MASK(0xff)
371387//  AM_RANGE (0x00, 0x3f) reserved for non-ZDS vendors
372388//  AM_RANGE (0x40, 0x5f) secondary Multiport card (Z-204)
373389//  AM_RANGE (0x60, 0x7f) primary Multiport card (Z-204)
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381397//  z-207 secondary disk controller (wd1797)
382398//  AM_RANGE (0xcd, 0xce) ET-100 CRT Controller
383399//  AM_RANGE (0xd4, 0xd7) ET-100 Trainer Parallel I/O
384   AM_RANGE (0xd8, 0xdb) AM_DEVREADWRITE_MODERN("pia0", pia6821_device, read, write) //video board
400   AM_RANGE (0xd8, 0xdb) AM_DEVREADWRITE("pia0", pia6821_device, read, write) //video board
385401   AM_RANGE (0xdc, 0xdc) AM_WRITE(z100_6845_address_w)
386402   AM_RANGE (0xdd, 0xdd) AM_WRITE(z100_6845_data_w)
387403//  AM_RANGE (0xde, 0xde) light pen
388   AM_RANGE (0xe0, 0xe3) AM_DEVREADWRITE_MODERN("pia1", pia6821_device, read, write) //main board
404   AM_RANGE (0xe0, 0xe3) AM_DEVREADWRITE("pia1", pia6821_device, read, write) //main board
389405//  AM_RANGE (0xe4, 0xe7) 8253 PIT
390406//  AM_RANGE (0xe8, 0xeb) First 2661-2 serial port (printer)
391407//  AM_RANGE (0xec, 0xef) Second 2661-2 serial port (modem)
392   AM_RANGE (0xf0, 0xf1) AM_DEVREADWRITE("pic8259_slave", pic8259_r, pic8259_w)
393   AM_RANGE (0xf2, 0xf3) AM_DEVREADWRITE("pic8259_master", pic8259_r, pic8259_w)
408   AM_RANGE (0xf0, 0xf1) AM_DEVREADWRITE_LEGACY("pic8259_slave", pic8259_r, pic8259_w)
409   AM_RANGE (0xf2, 0xf3) AM_DEVREADWRITE_LEGACY("pic8259_master", pic8259_r, pic8259_w)
394410   AM_RANGE (0xf4, 0xf4) AM_READ(keyb_data_r) // -> 8041 MCU
395411   AM_RANGE (0xf5, 0xf5) AM_READWRITE(keyb_status_r,keyb_command_w)
396412//  AM_RANGE (0xf6, 0xf6) expansion ROM is present (bit 0, active low)
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409425   {
410426      /* TODO: table */
411427      state->m_keyb_press = (UINT8)(FPTR)(param) & 0xff;
412      //pic8259_ir6_w(field.machine().device("pic8259_master"), 1);
428      //pic8259_ir6_w(state->m_picm, 1);
413429      state->m_keyb_status = 1;
414430   }
415431
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582598   return pic8259_acknowledge( device->machine().device( "pic8259_master" ) );
583599}
584600
585static WRITE_LINE_DEVICE_HANDLER( z100_pic_irq )
601WRITE_LINE_MEMBER( z100_state::z100_pic_irq )
586602{
587   cputag_set_input_line(device->machine(), "maincpu", 0, state ? HOLD_LINE : CLEAR_LINE);
603   cputag_set_input_line(machine(), "maincpu", 0, state ? HOLD_LINE : CLEAR_LINE);
588604//  logerror("PIC#1: set IRQ line to %i\n",interrupt);
589605}
590606
591static READ8_DEVICE_HANDLER( get_slave_ack )
607READ8_MEMBER( z100_state::get_slave_ack )
592608{
593609   if (offset==7) { // IRQ = 7
594      return pic8259_acknowledge(device->machine().device( "pic8259_slave"));
610      return pic8259_acknowledge(m_pics);
595611   }
596   return 0x00;
612   return 0;
597613}
598614
599615static const struct pic8259_interface z100_pic8259_master_config =
600616{
601   DEVCB_LINE(z100_pic_irq),
617   DEVCB_DRIVER_LINE_MEMBER(z100_state, z100_pic_irq),
602618   DEVCB_LINE_VCC,
603   DEVCB_HANDLER(get_slave_ack)
619   DEVCB_DRIVER_MEMBER(z100_state, get_slave_ack)
604620};
605621
606622static const struct pic8259_interface z100_pic8259_slave_config =
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624640   NULL      /* update address callback */
625641};
626642
627static WRITE8_DEVICE_HANDLER( video_pia_A_w )
643WRITE8_MEMBER( z100_state::video_pia_A_w )
628644{
629   z100_state *state = device->machine().driver_data<z100_state>();
630
631645   /*
632646    all bits are active low
633647    x--- ---- -> disable video RAM
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640654    ---- ---x -> enable red display
641655    */
642656
643   state->m_vram_enable = ((data & 0x80) >> 7) ^ 1;
644    state->m_gbank = BITSWAP8(((data & 0x70) >> 4) ^ 0x7,7,6,5,4,3,1,0,2);
645   state->m_flash = ((data & 8) >> 3) ^ 1;
646   state->m_display_mask = BITSWAP8((data & 7) ^ 7,7,6,5,4,3,1,0,2);
657   m_vram_enable = ((data & 0x80) >> 7) ^ 1;
658   m_gbank = BITSWAP8(((data & 0x70) >> 4) ^ 0x7,7,6,5,4,3,1,0,2);
659   m_flash = ((data & 8) >> 3) ^ 1;
660   m_display_mask = BITSWAP8((data & 7) ^ 7,7,6,5,4,3,1,0,2);
647661}
648662
649static WRITE8_DEVICE_HANDLER( video_pia_B_w )
663WRITE8_MEMBER( z100_state::video_pia_B_w )
650664{
651   z100_state *state = device->machine().driver_data<z100_state>();
652
653   state->m_start_addr = data << 4; //<- TODO
665   m_start_addr = data << 4; //<- TODO
654666}
655667
656668/* clear screen */
657static WRITE_LINE_DEVICE_HANDLER( video_pia_CA2_w )
669WRITE_LINE_MEMBER( z100_state::video_pia_CA2_w )
658670{
659   z100_state *drvstate = device->machine().driver_data<z100_state>();
660671   int i;
661672
662   for(i=0;i<0x30000;i++)
663      drvstate->m_gvram[i] = drvstate->m_clr_val;
673   for(i=0; i<0x30000; i++)
674      m_gvram[i] = m_clr_val;
664675}
665676
666static WRITE8_DEVICE_HANDLER( video_pia_CB2_w )
677WRITE8_MEMBER( z100_state::video_pia_CB2_w )
667678{
668   z100_state *state = device->machine().driver_data<z100_state>();
669
670   state->m_clr_val = (data & 1) ? 0x00 : 0xff;
679   m_clr_val = (data & 1) ? 0x00 : 0xff;
671680}
672681
673682static const pia6821_interface pia0_intf =
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678687   DEVCB_NULL,      /* line CB1 in */
679688   DEVCB_NULL,      /* line CA2 in */
680689   DEVCB_NULL,      /* line CB2 in */
681   DEVCB_HANDLER(video_pia_A_w),      /* port A out */
682   DEVCB_HANDLER(video_pia_B_w),      /* port B out */
683   DEVCB_LINE(video_pia_CA2_w),      /* line CA2 out */
684   DEVCB_HANDLER(video_pia_CB2_w),      /* port CB2 out */
690   DEVCB_DRIVER_MEMBER(z100_state, video_pia_A_w),      /* port A out */
691   DEVCB_DRIVER_MEMBER(z100_state, video_pia_B_w),      /* port B out */
692   DEVCB_DRIVER_LINE_MEMBER(z100_state, video_pia_CA2_w),      /* line CA2 out */
693   DEVCB_DRIVER_MEMBER(z100_state, video_pia_CB2_w),      /* port CB2 out */
685694   DEVCB_NULL,      /* IRQA */
686695   DEVCB_NULL      /* IRQB */
687696};
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763772}
764773
765774static MACHINE_CONFIG_START( z100, z100_state )
766    /* basic machine hardware */
767    MCFG_CPU_ADD("maincpu",I8088, XTAL_14_31818MHz/3)
768    MCFG_CPU_PROGRAM_MAP(z100_mem)
769    MCFG_CPU_IO_MAP(z100_io)
775   /* basic machine hardware */
776   MCFG_CPU_ADD("maincpu",I8088, XTAL_14_31818MHz/3)
777   MCFG_CPU_PROGRAM_MAP(z100_mem)
778   MCFG_CPU_IO_MAP(z100_io)
770779
771    MCFG_MACHINE_START(z100)
772    MCFG_MACHINE_RESET(z100)
780   MCFG_MACHINE_START(z100)
781   MCFG_MACHINE_RESET(z100)
773782
783   /* video hardware */
784   MCFG_SCREEN_ADD("screen", RASTER)
785   MCFG_SCREEN_REFRESH_RATE(50)
786   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
787   MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
788   MCFG_SCREEN_SIZE(640, 480)
789   MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
790   MCFG_VIDEO_START(z100)
791   MCFG_SCREEN_UPDATE(z100)
792   MCFG_PALETTE_LENGTH(8)
793   MCFG_PALETTE_INIT(z100)
794
795   /* Devices */
796   MCFG_MC6845_ADD("crtc", MC6845, XTAL_14_31818MHz/8, mc6845_intf)   /* unknown clock, hand tuned to get ~50/~60 fps */
797
774798   MCFG_PIC8259_ADD( "pic8259_master", z100_pic8259_master_config )
775799   MCFG_PIC8259_ADD( "pic8259_slave", z100_pic8259_slave_config )
776800
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779803
780804   MCFG_FD1797_ADD("z207_fdc",z207_interface)
781805   MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(z100_floppy_interface)
782
783    /* video hardware */
784    MCFG_SCREEN_ADD("screen", RASTER)
785    MCFG_SCREEN_REFRESH_RATE(50)
786    MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
787    MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
788    MCFG_SCREEN_SIZE(640, 480)
789    MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
790    MCFG_SCREEN_UPDATE(z100)
791
792   MCFG_MC6845_ADD("crtc", MC6845, XTAL_14_31818MHz/8, mc6845_intf)   /* unknown clock, hand tuned to get ~50/~60 fps */
793
794    MCFG_PALETTE_LENGTH(8)
795   MCFG_PALETTE_INIT(z100)
796
797    MCFG_VIDEO_START(z100)
798806MACHINE_CONFIG_END
799807
800808/* ROM definition */
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820828/* Driver */
821829
822830/*    YEAR  NAME    PARENT  COMPAT   MACHINE    INPUT    INIT    COMPANY   FULLNAME       FLAGS */
823COMP( 1982, z100,   0,       0,       z100,   z100,    z100,      "Zenith",   "Z-100",      GAME_NOT_WORKING | GAME_NO_SOUND)
824
831COMP( 1982, z100,   0,      0,       z100,      z100,    z100,  "Zenith", "Z-100", GAME_NOT_WORKING | GAME_NO_SOUND)

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