src/mame/drivers/saturn.c
| r12071 | r12072 | |
| 128 | 128 | /*VDP2 stuff*/ |
| 129 | 129 | /*SMPC stuff*/ |
| 130 | 130 | /*SCU stuff*/ |
| 131 | | /* TODO: not stated because IRQ system needs to be rewritten anyway ... */ |
| 132 | | static int timer_0; /* Counter for Timer 0 irq*/ |
| 133 | | static int timer_1; /* Counter for Timer 1 irq*/ |
| 134 | 131 | |
| 132 | |
| 135 | 133 | static struct |
| 136 | 134 | { |
| 137 | 135 | UINT8 vblank_out; |
| r12071 | r12072 | |
| 541 | 539 | state->m_smpc.smpcSR = 0x60; // peripheral data ready, no reset, etc. |
| 542 | 540 | state->m_smpc.pmode = state->m_smpc_ram[1]>>4; |
| 543 | 541 | |
| 544 | | state->m_smpc.intback_stage = 1; |
| 542 | state->m_smpc.intback_stage = 2; |
| 545 | 543 | |
| 546 | 544 | smpc_intbackhelper(machine); |
| 547 | 545 | } |
| r12071 | r12072 | |
| 2484 | 2482 | state_save_register_global_pointer(machine, state->m_scsp_regs, 0x1000/2); |
| 2485 | 2483 | state_save_register_global(machine, state->m_NMI_reset); |
| 2486 | 2484 | state_save_register_global(machine, state->m_en_68k); |
| 2487 | | state_save_register_global(machine, timer_0); |
| 2488 | | state_save_register_global(machine, timer_1); |
| 2489 | 2485 | // state_save_register_global(machine, scanline); |
| 2490 | 2486 | state_save_register_global(machine, state->m_smpc.IOSEL1); |
| 2491 | 2487 | state_save_register_global(machine, state->m_smpc.IOSEL2); |
| r12071 | r12072 | |
| 2529 | 2525 | state_save_register_global_pointer(machine, state->m_scsp_regs, 0x1000/2); |
| 2530 | 2526 | state_save_register_global(machine, state->m_NMI_reset); |
| 2531 | 2527 | state_save_register_global(machine, state->m_en_68k); |
| 2532 | | state_save_register_global(machine, timer_0); |
| 2533 | | state_save_register_global(machine, timer_1); |
| 2534 | 2528 | state_save_register_global(machine, state->m_smpc.IOSEL1); |
| 2535 | 2529 | state_save_register_global(machine, state->m_smpc.IOSEL2); |
| 2536 | 2530 | state_save_register_global(machine, state->m_smpc.EXLE1); |
| r12071 | r12072 | |
| 2678 | 2672 | |
| 2679 | 2673 | state->m_smpc.smpcSR = 0x40; // this bit is always on according to docs |
| 2680 | 2674 | |
| 2681 | | timer_0 = 0; |
| 2682 | | timer_1 = 0; |
| 2683 | 2675 | state->m_en_68k = 0; |
| 2684 | 2676 | state->m_NMI_reset = 1; |
| 2685 | 2677 | state->m_smpc_ram[0x21] = (0x80) | ((state->m_NMI_reset & 1) << 6); |
| r12071 | r12072 | |
| 2733 | 2725 | cputag_set_input_line(machine, "slave", INPUT_LINE_RESET, ASSERT_LINE); |
| 2734 | 2726 | cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE); |
| 2735 | 2727 | |
| 2736 | | timer_0 = 0; |
| 2737 | | timer_1 = 0; |
| 2738 | 2728 | state->m_en_68k = 0; |
| 2739 | 2729 | state->m_NMI_reset = 1; |
| 2740 | 2730 | state->m_smpc_ram[0x21] = (0x80) | ((state->m_NMI_reset & 1) << 6); |