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r11090 Wednesday 6th April, 2011 at 13:19:40 UTC by Robbbert
Modernised and / or minor adjustments.

[src/mess/drivers]

68ksbc.c altair.c ccs2422.c cd2650.c k8915.c mccpm.c pcm.c pdp11.c phunsy.c qtsbc.c sun1.c univac.c

src/mess/drivers/phunsy.c

r11089	r11090
37	37	DECLARE_WRITE8_MEMBER( phunsy_1800_w );
38	38	DECLARE_WRITE8_MEMBER( phunsy_ctrl_w );
39	39	DECLARE_WRITE8_MEMBER( phunsy_data_w );
40		DECLARE_WRITE8_MEMBER( phunsy_kbd_put );
	40	DECLARE_WRITE8_MEMBER( kbd_put );
41	41	const UINT8   *m_p_videoram;
42	42	const UINT8   *m_p_chargen;
43	43	UINT8      m_data_out;
r11089	r11090
170	170	INPUT_PORTS_END
171	171
172	172
173		WRITE8_MEMBER( phunsy_state::phunsy_kbd_put )
	173	WRITE8_MEMBER( phunsy_state::kbd_put )
174	174	{
175	175	m_keyboard_input = data;
176	176	}
177	177
178	178
179		static GENERIC_TERMINAL_INTERFACE( phunsy_terminal_intf )
	179	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
180	180	{
181		DEVCB_DRIVER_MEMBER(phunsy_state, phunsy_kbd_put)
	181	DEVCB_DRIVER_MEMBER(phunsy_state, kbd_put)
182	182	};
183	183
184	184
r11089	r11090
303	303	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
304	304
305	305	/* Devices */
306		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,phunsy_terminal_intf)
	306	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
307	307	MACHINE_CONFIG_END
308	308
309	309

src/mess/drivers/qtsbc.c

r11089	r11090
7	7	It expects a rom or similar at E377-up, so currently it crashes.
8	8
9	9	****************************************************************************/
	10	#define ADDRESS_MAP_MODERN
10	11
11	12	#include "emu.h"
12	13	#include "cpu/z80/z80.h"
13	14	#include "machine/terminal.h"
14	15
	16	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
15	17
16	18	class qtsbc_state : public driver_device
17	19	{
18	20	public:
19	21	qtsbc_state(running_machine &machine, const driver_device_config_base &config)
20		: driver_device(machine, config) { }
	22	: driver_device(machine, config),
	23	m_maincpu(*this, "maincpu"),
	24	m_terminal(*this, TERMINAL_TAG)
	25	{ }
21	26
	27	required_device<cpu_device> m_maincpu;
	28	required_device<device_t> m_terminal;
	29	DECLARE_READ8_MEMBER( qtsbc_06_r );
	30	DECLARE_READ8_MEMBER( qtsbc_43_r );
	31	DECLARE_WRITE8_MEMBER( kbd_put );
22	32	UINT8 *m_ram;
23	33	UINT8 m_term_data;
	34	virtual void machine_reset();
24	35	};
25	36
26	37
27
28		static WRITE8_HANDLER( qtsbc_06_w )
	38	READ8_MEMBER( qtsbc_state::qtsbc_06_r )
29	39	{
30		device_t *terminal = space->machine().device(TERMINAL_TAG);
31
32		terminal_write(terminal, 0, data);
33		}
34
35		static READ8_HANDLER( qtsbc_06_r )
36		{
37		qtsbc_state *state = space->machine().driver_data<qtsbc_state>();
38		UINT8 ret = state->m_term_data;
39		state->m_term_data = 0;
	40	UINT8 ret = m_term_data;
	41	m_term_data = 0;
40	42	return ret;
41	43	}
42	44
43		static READ8_HANDLER( qtsbc_43_r )
	45	READ8_MEMBER( qtsbc_state::qtsbc_43_r )
44	46	{
45	47	return 0;
46	48	}
47	49
48		static ADDRESS_MAP_START(qtsbc_mem, AS_PROGRAM, 8)
	50	static ADDRESS_MAP_START(qtsbc_mem, AS_PROGRAM, 8, qtsbc_state)
49	51	ADDRESS_MAP_UNMAP_HIGH
50		AM_RANGE( 0x0000, 0xffff ) AM_RAM AM_BASE_MEMBER(qtsbc_state, m_ram) AM_REGION("maincpu",0)
	52	AM_RANGE( 0x0000, 0xffff ) AM_RAM AM_BASE(m_ram) AM_REGION("maincpu", 0)
51	53	ADDRESS_MAP_END
52	54
53		static ADDRESS_MAP_START( qtsbc_io , AS_IO, 8)
	55	static ADDRESS_MAP_START( qtsbc_io, AS_IO, 8, qtsbc_state)
54	56	ADDRESS_MAP_UNMAP_HIGH
55	57	ADDRESS_MAP_GLOBAL_MASK(0xff)
56		AM_RANGE(0x06, 0x06) AM_READWRITE(qtsbc_06_r,qtsbc_06_w)
	58	AM_RANGE(0x06, 0x06) AM_READ(qtsbc_06_r) AM_DEVWRITE_LEGACY(TERMINAL_TAG, terminal_write)
57	59	AM_RANGE(0x43, 0x43) AM_READ(qtsbc_43_r)
58	60	ADDRESS_MAP_END
59	61
r11089	r11090
62	64	INPUT_PORTS_END
63	65
64	66
65		static MACHINE_RESET(qtsbc)
	67	MACHINE_RESET_MEMBER(qtsbc_state)
66	68	{
67		qtsbc_state *state = machine.driver_data<qtsbc_state>();
68		UINT8* bios = machine.region("maincpu")->base()+0x10000;
69		memcpy(state->m_ram,bios, 0x800);
	69	UINT8* bios = m_machine.region("maincpu")->base()+0x10000;
	70	memcpy(m_ram, bios, 0x800);
70	71	}
71	72
72		static WRITE8_DEVICE_HANDLER( qtsbc_kbd_put )
	73	WRITE8_MEMBER( qtsbc_state::kbd_put )
73	74	{
74		qtsbc_state *state = device->machine().driver_data<qtsbc_state>();
75		state->m_term_data = data;
	75	m_term_data = data;
76	76	}
77	77
78		static GENERIC_TERMINAL_INTERFACE( qtsbc_terminal_intf )
	78	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
79	79	{
80		DEVCB_HANDLER(qtsbc_kbd_put)
	80	DEVCB_DRIVER_MEMBER(qtsbc_state, kbd_put)
81	81	};
82	82
83	83	static MACHINE_CONFIG_START( qtsbc, qtsbc_state )
r11089	r11090
86	86	MCFG_CPU_PROGRAM_MAP(qtsbc_mem)
87	87	MCFG_CPU_IO_MAP(qtsbc_io)
88	88
89		MCFG_MACHINE_RESET(qtsbc)
90
91	89	/* video hardware */
92	90	MCFG_FRAGMENT_ADD( generic_terminal )
93
94		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, qtsbc_terminal_intf)
	91	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
95	92	MACHINE_CONFIG_END
96	93
97	94	/* ROM definition */

src/mess/drivers/ccs2422.c

r11089	r11090
5	5	11/12/2009 Skeleton driver.
6	6
7	7	****************************************************************************/
	8	#define ADDRESS_MAP_MODERN
8	9
9	10	#include "emu.h"
10	11	#include "cpu/z80/z80.h"
11	12	#include "machine/terminal.h"
12	13
	14	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
13	15
14	16	class ccs2422_state : public driver_device
15	17	{
16	18	public:
17	19	ccs2422_state(running_machine &machine, const driver_device_config_base &config)
18		: driver_device(machine, config) { }
	20	: driver_device(machine, config),
	21	m_maincpu(*this, "maincpu"),
	22	m_terminal(*this, TERMINAL_TAG)
	23	{ }
19	24
	25	required_device<cpu_device> m_maincpu;
	26	required_device<device_t> m_terminal;
	27	DECLARE_READ8_MEMBER( ccs2422_10_r );
	28	DECLARE_READ8_MEMBER( ccs2422_11_r );
	29	DECLARE_WRITE8_MEMBER( ccs2422_10_w );
	30	DECLARE_WRITE8_MEMBER( kbd_put );
20	31	UINT8 *m_ccs_ram;
21	32	UINT8 m_term_data;
	33	virtual void machine_reset();
22	34	};
23	35
24	36
25		static READ8_HANDLER( ccs2422_10_r )
	37	READ8_MEMBER( ccs2422_state::ccs2422_10_r )
26	38	{
27		ccs2422_state *state = space->machine().driver_data<ccs2422_state>();
28		UINT8 ret = state->m_term_data;
29		state->m_term_data = 0;
	39	UINT8 ret = m_term_data;
	40	m_term_data = 0;
30	41	return ret;
31	42	}
32	43
33		static READ8_HANDLER( ccs2422_11_r )
	44	READ8_MEMBER( ccs2422_state::ccs2422_11_r )
34	45	{
35		ccs2422_state *state = space->machine().driver_data<ccs2422_state>();
36		return 4 | ((state->m_term_data) ? 1 : 0);
	46	return 4 | (m_term_data ? 1 : 0);
37	47	}
38	48
39		static WRITE8_HANDLER(ccs2422_10_w)
	49	WRITE8_MEMBER( ccs2422_state::ccs2422_10_w )
40	50	{
41		device_t *devconf = space->machine().device(TERMINAL_TAG);
42		terminal_write(devconf,0,data & 0x7f);
	51	terminal_write(m_terminal, 0, data & 0x7f);
43	52	}
44	53
45		static ADDRESS_MAP_START(ccs2422_mem, AS_PROGRAM, 8)
	54	static ADDRESS_MAP_START(ccs2422_mem, AS_PROGRAM, 8, ccs2422_state)
46	55	ADDRESS_MAP_UNMAP_HIGH
47		AM_RANGE(0x0000, 0xffff) AM_RAM AM_BASE_MEMBER(ccs2422_state, m_ccs_ram)
	56	AM_RANGE(0x0000, 0xffff) AM_RAM AM_BASE(m_ccs_ram)
48	57	ADDRESS_MAP_END
49	58
50		static ADDRESS_MAP_START( ccs2422_io , AS_IO, 8)
	59	static ADDRESS_MAP_START( ccs2422_io, AS_IO, 8, ccs2422_state)
51	60	ADDRESS_MAP_UNMAP_HIGH
52	61	ADDRESS_MAP_GLOBAL_MASK(0xff)
53	62	AM_RANGE(0x10, 0x10) AM_READWRITE(ccs2422_10_r,ccs2422_10_w)
r11089	r11090
59	68	INPUT_PORTS_END
60	69
61	70
62		static MACHINE_RESET(ccs2422)
	71	MACHINE_RESET_MEMBER(ccs2422_state)
63	72	{
64		ccs2422_state *state = machine.driver_data<ccs2422_state>();
65		UINT8* user1 = machine.region("user1")->base();
66		memcpy((UINT8*)state->m_ccs_ram,user1,0x0800);
	73	UINT8* user1 = m_machine.region("user1")->base();
	74	memcpy((UINT8*)m_ccs_ram, user1, 0x0800);
67	75
68	76	// this should be rom/ram banking
69	77	}
70	78
71		static WRITE8_DEVICE_HANDLER( ccs2422_kbd_put )
	79	WRITE8_MEMBER( ccs2422_state::kbd_put )
72	80	{
73		ccs2422_state *state = device->machine().driver_data<ccs2422_state>();
74		state->m_term_data = data;
	81	m_term_data = data;
75	82	}
76	83
77		static GENERIC_TERMINAL_INTERFACE( ccs2422_terminal_intf )
	84	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
78	85	{
79		DEVCB_HANDLER(ccs2422_kbd_put)
	86	DEVCB_DRIVER_MEMBER(ccs2422_state, kbd_put)
80	87	};
81	88
82	89	static MACHINE_CONFIG_START( ccs2422, ccs2422_state )
r11089	r11090
85	92	MCFG_CPU_PROGRAM_MAP(ccs2422_mem)
86	93	MCFG_CPU_IO_MAP(ccs2422_io)
87	94
88		MCFG_MACHINE_RESET(ccs2422)
89
90	95	/* video hardware */
91	96	MCFG_FRAGMENT_ADD( generic_terminal )
92		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,ccs2422_terminal_intf)
	97	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
93	98	MACHINE_CONFIG_END
94	99
95	100	/* ROM definition */

src/mess/drivers/mccpm.c

r11089	r11090
6	6	18/11/2010 Connected to a terminal
7	7
8	8	****************************************************************************/
	9	#define ADDRESS_MAP_MODERN
9	10
10	11	#include "emu.h"
11	12	#include "cpu/z80/z80.h"
12	13	#include "machine/terminal.h"
13	14
	15	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
14	16
15	17	class mccpm_state : public driver_device
16	18	{
17	19	public:
18	20	mccpm_state(running_machine &machine, const driver_device_config_base &config)
19		: driver_device(machine, config) { }
	21	: driver_device(machine, config),
	22	m_maincpu(*this, "maincpu"),
	23	m_terminal(*this, TERMINAL_TAG)
	24	{ }
20	25
	26	required_device<cpu_device> m_maincpu;
	27	required_device<device_t> m_terminal;
	28	DECLARE_READ8_MEMBER( mccpm_f0_r );
	29	DECLARE_WRITE8_MEMBER( kbd_put );
21	30	UINT8 *m_ram;
22	31	UINT8 m_term_data;
	32	virtual void machine_reset();
23	33	};
24	34
25	35
26	36
27		static WRITE8_HANDLER( mccpm_f0_w )
	37	READ8_MEMBER( mccpm_state::mccpm_f0_r )
28	38	{
29		device_t *terminal = space->machine().device(TERMINAL_TAG);
30
31		terminal_write(terminal, 0, data);
32		}
33
34		static READ8_HANDLER( mccpm_f0_r )
35		{
36		mccpm_state *state = space->machine().driver_data<mccpm_state>();
37		UINT8 ret = state->m_term_data;
38		state->m_term_data = 0;
	39	UINT8 ret = m_term_data;
	40	m_term_data = 0;
39	41	return ret;
40	42	}
41	43
42		static ADDRESS_MAP_START(mccpm_mem, AS_PROGRAM, 8)
	44	static ADDRESS_MAP_START(mccpm_mem, AS_PROGRAM, 8, mccpm_state)
43	45	ADDRESS_MAP_UNMAP_HIGH
44		AM_RANGE(0x0000, 0xffff) AM_RAM AM_BASE_MEMBER(mccpm_state, m_ram)
	46	AM_RANGE(0x0000, 0xffff) AM_RAM AM_BASE(m_ram)
45	47	ADDRESS_MAP_END
46	48
47		static ADDRESS_MAP_START( mccpm_io , AS_IO, 8)
	49	static ADDRESS_MAP_START( mccpm_io, AS_IO, 8, mccpm_state)
48	50	ADDRESS_MAP_UNMAP_HIGH
49	51	ADDRESS_MAP_GLOBAL_MASK(0xff)
50		AM_RANGE(0xf0, 0xf0) AM_READWRITE(mccpm_f0_r,mccpm_f0_w)
	52	AM_RANGE(0xf0, 0xf0) AM_READ(mccpm_f0_r) AM_DEVWRITE_LEGACY(TERMINAL_TAG, terminal_write)
51	53	ADDRESS_MAP_END
52	54
53	55	/* Input ports */
r11089	r11090
55	57	INPUT_PORTS_END
56	58
57	59
58		static MACHINE_RESET(mccpm)
	60	MACHINE_RESET_MEMBER(mccpm_state)
59	61	{
60		mccpm_state *state = machine.driver_data<mccpm_state>();
61		UINT8* bios = machine.region("maincpu")->base();
62
63		memcpy(state->m_ram,bios, 0x1000);
	62	UINT8* bios = m_machine.region("maincpu")->base();
	63	memcpy(m_ram, bios, 0x1000);
64	64	}
65	65
66		static WRITE8_DEVICE_HANDLER( mccpm_kbd_put )
	66	WRITE8_MEMBER( mccpm_state::kbd_put )
67	67	{
68		mccpm_state *state = device->machine().driver_data<mccpm_state>();
69		state->m_term_data = data;
	68	m_term_data = data;
70	69	}
71	70
72		static GENERIC_TERMINAL_INTERFACE( mccpm_terminal_intf )
	71	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
73	72	{
74		DEVCB_HANDLER(mccpm_kbd_put)
	73	DEVCB_DRIVER_MEMBER(mccpm_state, kbd_put)
75	74	};
76	75
77	76	static MACHINE_CONFIG_START( mccpm, mccpm_state )
r11089	r11090
80	79	MCFG_CPU_PROGRAM_MAP(mccpm_mem)
81	80	MCFG_CPU_IO_MAP(mccpm_io)
82	81
83		MCFG_MACHINE_RESET(mccpm)
84
85	82	/* video hardware */
86	83	MCFG_FRAGMENT_ADD( generic_terminal )
87
88		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, mccpm_terminal_intf)
	84	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
89	85	MACHINE_CONFIG_END
90	86
91	87	/* ROM definition */
r11089	r11090
97	93	/* Driver */
98	94
99	95	/*    YEAR  NAME    PARENT  COMPAT   MACHINE    INPUT    INIT    COMPANY   FULLNAME       FLAGS */
100		COMP( 1981, mccpm,  0,       0,       mccpm,   mccpm,    0,     "GRAF Elektronik Systeme GmbH",   "mc-CP/M-Computer",      GAME_NOT_WORKING | GAME_NO_SOUND)
	96	COMP( 1981, mccpm,  0,       0,      mccpm,     mccpm,    0, "GRAF Elektronik Systeme GmbH", "mc-CP/M-Computer",   GAME_NOT_WORKING | GAME_NO_SOUND)
101	97

src/mess/drivers/k8915.c

r11089	r11090
7	7	When it says DIAGNOSTIC RAZ P, press enter.
8	8
9	9	****************************************************************************/
	10	#define ADDRESS_MAP_MODERN
10	11
11	12	#include "emu.h"
12	13	#include "cpu/z80/z80.h"
13	14	#include "machine/terminal.h"
14	15
	16	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
	17	#define VIDEO_START_MEMBER(name) void name::video_start()
	18	#define SCREEN_UPDATE_MEMBER(name) bool name::screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
15	19
16	20	class k8915_state : public driver_device
17	21	{
18	22	public:
19	23	k8915_state(running_machine &machine, const driver_device_config_base &config)
20		: driver_device(machine, config) { }
	24	: driver_device(machine, config),
	25	m_maincpu(*this, "maincpu"),
	26	m_terminal(*this, TERMINAL_TAG)
	27	{ }
21	28
22		UINT8 *m_videoram;
23		UINT8 *m_charrom;
	29	required_device<cpu_device> m_maincpu;
	30	required_device<device_t> m_terminal;
	31	DECLARE_READ8_MEMBER( k8915_52_r );
	32	DECLARE_READ8_MEMBER( k8915_53_r );
	33	DECLARE_WRITE8_MEMBER( k8915_a8_w );
	34	DECLARE_WRITE8_MEMBER( kbd_put );
	35	UINT8 *m_p_videoram;
	36	UINT8 *m_p_chargen;
24	37	UINT8 m_framecnt;
25	38	UINT8 m_term_data;
26		UINT8 m_k8915_53;
	39	virtual void machine_reset();
	40	virtual void video_start();
	41	virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
27	42	};
28	43
29		static READ8_HANDLER( k8915_52_r )
	44	READ8_MEMBER( k8915_state::k8915_52_r )
30	45	{
31	46	// get data from ascii keyboard
32		k8915_state *state = space->machine().driver_data<k8915_state>();
33		state->m_k8915_53 = 0;
34		return state->m_term_data;
	47	UINT8 ret = m_term_data;
	48	m_term_data = 0;
	49	return ret;
35	50	}
36	51
37		static READ8_HANDLER( k8915_53_r )
	52	READ8_MEMBER( k8915_state::k8915_53_r )
38	53	{
39	54	// keyboard status
40		k8915_state *state = space->machine().driver_data<k8915_state>();
41		return state->m_k8915_53;
	55	return m_term_data ? 1 : 0;
42	56	}
43	57
44		static WRITE8_HANDLER( k8915_a8_w )
	58	WRITE8_MEMBER( k8915_state::k8915_a8_w )
45	59	{
46	60	// seems to switch ram and rom around.
47	61	if (data == 0x87)
48		memory_set_bank(space->machine(), "boot", 0); // ram at 0000
	62	memory_set_bank(machine(), "boot", 0); // ram at 0000
49	63	else
50		memory_set_bank(space->machine(), "boot", 1); // rom at 0000
	64	memory_set_bank(machine(), "boot", 1); // rom at 0000
51	65	}
52	66
53		static ADDRESS_MAP_START(k8915_mem, AS_PROGRAM, 8)
	67	static ADDRESS_MAP_START(k8915_mem, AS_PROGRAM, 8, k8915_state)
54	68	ADDRESS_MAP_UNMAP_HIGH
55	69	AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
56		AM_RANGE(0x1000, 0x17ff) AM_RAM AM_BASE_MEMBER(k8915_state, m_videoram)
	70	AM_RANGE(0x1000, 0x17ff) AM_RAM AM_BASE(m_p_videoram)
57	71	AM_RANGE(0x1800, 0xffff) AM_RAM
58	72	ADDRESS_MAP_END
59	73
60		static ADDRESS_MAP_START( k8915_io, AS_IO, 8 )
	74	static ADDRESS_MAP_START(k8915_io, AS_IO, 8, k8915_state)
61	75	ADDRESS_MAP_GLOBAL_MASK(0xff)
62	76	AM_RANGE(0x52, 0x52) AM_READ(k8915_52_r)
63	77	AM_RANGE(0x53, 0x53) AM_READ(k8915_53_r)
r11089	r11090
68	82	static INPUT_PORTS_START( k8915 )
69	83	INPUT_PORTS_END
70	84
71		static MACHINE_RESET(k8915)
	85	MACHINE_RESET_MEMBER(k8915_state)
72	86	{
73		memory_set_bank(machine, "boot", 1);
	87	memory_set_bank(m_machine, "boot", 1);
74	88	}
75	89
76	90	static DRIVER_INIT(k8915)
r11089	r11090
79	93	memory_configure_bank(machine, "boot", 0, 2, &RAM[0x0000], 0x10000);
80	94	}
81	95
82		static VIDEO_START( k8915 )
	96	VIDEO_START_MEMBER( k8915_state )
83	97	{
84		k8915_state *state = machine.driver_data<k8915_state>();
85		state->m_charrom = machine.region("chargen")->base();
	98	m_p_chargen = m_machine.region("chargen")->base();
86	99	}
87	100
88		static SCREEN_UPDATE( k8915 )
	101	SCREEN_UPDATE_MEMBER( k8915_state )
89	102	{
90		k8915_state *state = screen->machine().driver_data<k8915_state>();
91	103	UINT8 y,ra,chr,gfx;
92	104	UINT16 sy=0,ma=0,x;
93	105
94		state->m_framecnt++;
	106	m_framecnt++;
95	107
96	108	for (y = 0; y < 25; y++)
97	109	{
98	110	for (ra = 0; ra < 10; ra++)
99	111	{
100		UINT16 *p = BITMAP_ADDR16(bitmap, sy++, 0);
	112	UINT16 *p = BITMAP_ADDR16(&bitmap, sy++, 0);
101	113
102	114	for (x = ma; x < ma + 80; x++)
103	115	{
r11089	r11090
105	117
106	118	if (ra < 9)
107	119	{
108		chr = state->m_videoram[x];
	120	chr = m_p_videoram[x];
109	121
110	122	/* Take care of flashing characters */
111		if ((chr & 0x80) && (state->m_framecnt & 0x08))
	123	if ((chr & 0x80) && (m_framecnt & 0x08))
112	124	chr = 0x20;
113	125
114	126	chr &= 0x7f;
115	127
116		gfx = state->m_charrom[(chr<<4) | ra ];
	128	gfx = m_p_chargen[(chr<<4) | ra ];
117	129	}
118	130
119	131	/* Display a scanline of a character */
120		*p++ = ( gfx & 0x80 ) ? 1 : 0;
121		*p++ = ( gfx & 0x40 ) ? 1 : 0;
122		*p++ = ( gfx & 0x20 ) ? 1 : 0;
123		*p++ = ( gfx & 0x10 ) ? 1 : 0;
124		*p++ = ( gfx & 0x08 ) ? 1 : 0;
125		*p++ = ( gfx & 0x04 ) ? 1 : 0;
126		*p++ = ( gfx & 0x02 ) ? 1 : 0;
127		*p++ = ( gfx & 0x01 ) ? 1 : 0;
	132	*p++ = BIT(gfx, 7);
	133	*p++ = BIT(gfx, 6);
	134	*p++ = BIT(gfx, 5);
	135	*p++ = BIT(gfx, 4);
	136	*p++ = BIT(gfx, 3);
	137	*p++ = BIT(gfx, 2);
	138	*p++ = BIT(gfx, 1);
	139	*p++ = BIT(gfx, 0);
128	140	}
129	141	}
130	142	ma+=80;
r11089	r11090
132	144	return 0;
133	145	}
134	146
135		PALETTE_INIT( k8915 )
	147	WRITE8_MEMBER( k8915_state::kbd_put )
136	148	{
137		palette_set_color(machine, 0, RGB_BLACK); /* black */
138		palette_set_color(machine, 1, MAKE_RGB(0, 220, 0)); /* green */
	149	m_term_data = data;
139	150	}
140	151
141		static WRITE8_DEVICE_HANDLER( k8915_kbd_put )
	152	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
142	153	{
143		k8915_state *state = device->machine().driver_data<k8915_state>();
144		state->m_term_data = data;
145		state->m_k8915_53 = 1;
146		}
147
148		static GENERIC_TERMINAL_INTERFACE( k8915_terminal_intf )
149		{
150		DEVCB_HANDLER(k8915_kbd_put)
	154	DEVCB_DRIVER_MEMBER(k8915_state, kbd_put)
151	155	};
152	156
153	157	static MACHINE_CONFIG_START( k8915, k8915_state )
r11089	r11090
156	160	MCFG_CPU_PROGRAM_MAP(k8915_mem)
157	161	MCFG_CPU_IO_MAP(k8915_io)
158	162
159		MCFG_MACHINE_RESET(k8915)
160
161	163	/* video hardware */
162	164	MCFG_SCREEN_ADD("screen", RASTER)
163	165	MCFG_SCREEN_REFRESH_RATE(60)
r11089	r11090
165	167	MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
166	168	MCFG_SCREEN_SIZE(640, 250)
167	169	MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 249)
168		MCFG_SCREEN_UPDATE(k8915)
169
170	170	MCFG_PALETTE_LENGTH(2)
171		MCFG_PALETTE_INIT(k8915)
	171	MCFG_PALETTE_INIT(monochrome_green)
172	172
173		MCFG_VIDEO_START(k8915)
174
175		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, k8915_terminal_intf) // keyboard only
	173	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf) // keyboard only
176	174	MACHINE_CONFIG_END
177	175
178	176
r11089	r11090
189	187	/* Driver */
190	188
191	189	/*   YEAR  NAME    PARENT  COMPAT   MACHINE  INPUT  INIT        COMPANY   FULLNAME       FLAGS */
192		COMP( 1982, k8915,  0,       0,    k8915,   k8915,    k8915,      "Robotron",   "K8915",      GAME_NOT_WORKING | GAME_NO_SOUND)
	190	COMP( 1982, k8915,  0,       0,    k8915,   k8915,    k8915, "Robotron",   "K8915", GAME_NOT_WORKING | GAME_NO_SOUND)

src/mess/drivers/pdp11.c

r11089	r11090
5	5	23/02/2009 Skeleton driver.
6	6
7	7	****************************************************************************/
	8	#define ADDRESS_MAP_MODERN
8	9
9	10	#include "emu.h"
10	11	#include "cpu/t11/t11.h"
r11089	r11090
14	15	{
15	16	public:
16	17	pdp11_state(running_machine &machine, const driver_device_config_base &config)
17		: driver_device(machine, config) { }
18
	18	: driver_device(machine, config),
	19	m_maincpu(*this, "maincpu"),
	20	m_terminal(*this, TERMINAL_TAG)
	21	{ }
	22
	23	required_device<cpu_device> m_maincpu;
	24	required_device<device_t> m_terminal;
	25	DECLARE_READ16_MEMBER( term_r );
	26	DECLARE_READ16_MEMBER( term_tx_status_r );
	27	DECLARE_READ16_MEMBER( term_rx_status_r );
	28	DECLARE_WRITE16_MEMBER( term_w );
	29	DECLARE_WRITE8_MEMBER( kbd_put );
19	30	UINT8 m_term_data;
20	31	UINT16 m_term_status;
21	32	};
22	33
23		static WRITE16_HANDLER(term_w)
	34	WRITE16_MEMBER(pdp11_state::term_w)
24	35	{
25		device_t *devconf = space->machine().device("terminal");
26		terminal_write(devconf,0,data);
	36	terminal_write(m_terminal, 0, data);
27	37	}
28	38
29		static READ16_HANDLER(term_r)
	39	READ16_MEMBER(pdp11_state::term_r)
30	40	{
31		pdp11_state *state = space->machine().driver_data<pdp11_state>();
32		state->m_term_status = 0x0000;
33		return state->m_term_data;
	41	m_term_status = 0x0000;
	42	return m_term_data;
34	43	}
35	44
36		static READ16_HANDLER(term_tx_status_r)
	45	READ16_MEMBER(pdp11_state::term_tx_status_r)
37	46	{   // always ready
38	47	return 0xffff;
39	48	}
40	49
41		static READ16_HANDLER(term_rx_status_r)
	50	READ16_MEMBER(pdp11_state::term_rx_status_r)
42	51	{
43		pdp11_state *state = space->machine().driver_data<pdp11_state>();
44		return state->m_term_status;
	52	return m_term_status;
45	53	}
46	54
47		static ADDRESS_MAP_START(pdp11_mem, AS_PROGRAM, 16)
	55	static ADDRESS_MAP_START(pdp11_mem, AS_PROGRAM, 16, pdp11_state)
48	56	ADDRESS_MAP_UNMAP_HIGH
49	57	AM_RANGE( 0x0000, 0xdfff ) AM_RAM  // RAM
50	58	AM_RANGE( 0xea00, 0xfeff ) AM_ROM
r11089	r11090
54	62	AM_RANGE( 0xff76, 0xff77 ) AM_WRITE(term_w)
55	63	ADDRESS_MAP_END
56	64
57		static ADDRESS_MAP_START(pdp11qb_mem, AS_PROGRAM, 16)
	65	static ADDRESS_MAP_START(pdp11qb_mem, AS_PROGRAM, 16, pdp11_state)
58	66	ADDRESS_MAP_UNMAP_HIGH
59	67	AM_RANGE( 0x0000, 0xe9ff ) AM_RAM  // RAM
60	68	AM_RANGE( 0xea00, 0xefff ) AM_ROM
r11089	r11090
62	70	ADDRESS_MAP_END
63	71
64	72	/* Input ports */
65		INPUT_PORTS_START( pdp11 )
66		PORT_INCLUDE(generic_terminal)
	73	static INPUT_PORTS_START( pdp11 )
67	74	INPUT_PORTS_END
68	75
69	76
r11089	r11090
133	140	{
134	141	0 << 13
135	142	};
136		static WRITE8_DEVICE_HANDLER( pdp_kbd_put )
	143
	144	WRITE8_MEMBER( pdp11_state::kbd_put )
137	145	{
138		pdp11_state *state = device->machine().driver_data<pdp11_state>();
139		state->m_term_data = data;
140		state->m_term_status = 0xffff;
	146	m_term_data = data;
	147	m_term_status = 0xffff;
141	148	}
142	149
143		static GENERIC_TERMINAL_INTERFACE( pdp_terminal_intf )
	150	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
144	151	{
145		DEVCB_HANDLER(pdp_kbd_put)
	152	DEVCB_DRIVER_MEMBER(pdp11_state, kbd_put)
146	153	};
147	154
148	155	static MACHINE_CONFIG_START( pdp11, pdp11_state )
149		/* basic machine hardware */
150		MCFG_CPU_ADD("maincpu",T11, XTAL_4MHz) // Need proper CPU here
	156	/* basic machine hardware */
	157	MCFG_CPU_ADD("maincpu",T11, XTAL_4MHz) // Need proper CPU here
151	158	MCFG_CPU_CONFIG(pdp11_data)
152		MCFG_CPU_PROGRAM_MAP(pdp11_mem)
	159	MCFG_CPU_PROGRAM_MAP(pdp11_mem)
153	160
154		MCFG_MACHINE_RESET(pdp11)
	161	MCFG_MACHINE_RESET(pdp11)
155	162
156		/* video hardware */
	163	/* video hardware */
157	164	MCFG_FRAGMENT_ADD( generic_terminal )
158		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,pdp_terminal_intf)
	165	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
159	166	MACHINE_CONFIG_END
160	167
161	168	static MACHINE_CONFIG_DERIVED( pdp11ub2, pdp11 )
162		MCFG_MACHINE_RESET(pdp11ub2)
	169	MCFG_MACHINE_RESET(pdp11ub2)
163	170	MACHINE_CONFIG_END
164	171
165	172	static MACHINE_CONFIG_DERIVED( pdp11qb, pdp11 )
166		MCFG_MACHINE_RESET(pdp11qb)
	173	MCFG_MACHINE_RESET(pdp11qb)
167	174
168	175	MCFG_CPU_MODIFY("maincpu")
169	176	MCFG_CPU_CONFIG(mxv11_data)
r11089	r11090
172	179
173	180	/* ROM definition */
174	181	ROM_START( pdp11ub )
175		ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
	182	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
176	183	ROM_REGION( 0x1000, "user1", ROMREGION_ERASEFF )
177	184	ROM_LOAD( "23-034a9.bin", 0x0000, 0x0200, CRC(01c5d78d) SHA1(b447c67bfd5134c142240a919f23a949e1953fb2))
178	185	ROM_LOAD( "23-035a9.bin", 0x0200, 0x0200, CRC(c456df6c) SHA1(188c8ece6a2d67911016f55dd22b698a40aff515))
r11089	r11090
181	188	ROM_END
182	189
183	190	ROM_START( pdp11ub2 )
184		ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
	191	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
185	192	ROM_REGION( 0x1000, "user1", ROMREGION_ERASEFF )
186	193	ROM_LOAD( "23-248f1.bin", 0x0000, 0x0400, CRC(ecda1a6d) SHA1(b2bf770dda349fdd469235871564280baf06301d))
187	194	//ROM_LOAD( "23-616f1-1666.bin", 0x0000, 0x0400, CRC(a3dfb5aa) SHA1(7f06c624ae3fbb49535258b8722b5a3c548da3ba))
188	195	ROM_END
189	196
190	197	ROM_START( pdp11qb )
191		ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
	198	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
192	199	ROM_LOAD16_BYTE( "m7195fa.1", 0xc000, 0x2000, CRC(0fa58752) SHA1(4bcd006790a60f2998ee8377ac5e2c18ef330930))
193	200	ROM_LOAD16_BYTE( "m7195fa.2", 0xc001, 0x2000, CRC(15b6f60c) SHA1(80dd4f8ca3c27babb5e75111b04241596a07c53a))
194	201	ROM_END

src/mess/drivers/univac.c

r11089	r11090
5	5	The terminals are models UTS20, UTS30, UTS40, UTS50 and SVT1120,
6	6	however only the UTS20 is dumped (program roms only).
7	7
8		25/05/2009 Skeleton driver [Robbbert].
	8	25/05/2009 Skeleton driver
9	9
10	10	The terminal has 2 screens selectable by the operator with the Fn + 1-2
11	11	buttons. Thus the user can have two sessions open at once, to different

src/mess/drivers/68ksbc.c

r11089	r11090
45	45	DECLARE_READ16_MEMBER( c68ksbc_status_r );
46	46	DECLARE_READ16_MEMBER( c68ksbc_terminal_r );
47	47	DECLARE_WRITE16_MEMBER( c68ksbc_terminal_w );
48		DECLARE_WRITE8_MEMBER( c68ksbc_kbd_put );
	48	DECLARE_WRITE8_MEMBER( kbd_put );
49	49	UINT8 m_term_data;
50	50	};
51	51
r11089	r11090
89	89	{
90	90	}
91	91
92		WRITE8_MEMBER( c68ksbc_state::c68ksbc_kbd_put )
	92	WRITE8_MEMBER( c68ksbc_state::kbd_put )
93	93	{
94	94	m_term_data = data;
95	95	}
96	96
97		static GENERIC_TERMINAL_INTERFACE( c68ksbc_terminal_intf )
	97	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
98	98	{
99		DEVCB_DRIVER_MEMBER(c68ksbc_state, c68ksbc_kbd_put)
	99	DEVCB_DRIVER_MEMBER(c68ksbc_state, kbd_put)
100	100	};
101	101
102	102	static MACHINE_CONFIG_START( c68ksbc, c68ksbc_state )
r11089	r11090
105	105	MCFG_CPU_PROGRAM_MAP(c68ksbc_mem)
106	106	MCFG_MACHINE_RESET(c68ksbc)
107	107	MCFG_FRAGMENT_ADD( generic_terminal )
108		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, c68ksbc_terminal_intf)
	108	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
109	109	MACHINE_CONFIG_END
110	110
111	111	/* ROM definition */

src/mess/drivers/altair.c

r11089	r11090
36	36	DECLARE_READ8_MEMBER( sio_data_r );
37	37	DECLARE_READ8_MEMBER( sio_key_status_r );
38	38	DECLARE_WRITE8_MEMBER( sio_command_w );
39		DECLARE_WRITE8_MEMBER( altair_kbd_put );
	39	DECLARE_WRITE8_MEMBER( kbd_put );
40	40	UINT8 m_term_data;
41	41	UINT8* m_ram;
42	42	};
r11089	r11090
77	77	ADDRESS_MAP_UNMAP_HIGH
78	78	ADDRESS_MAP_GLOBAL_MASK(0xff)
79	79	AM_RANGE( 0x00, 0x00 ) AM_READ(sio_key_status_r)
80		AM_RANGE( 0x01, 0x01 ) AM_MIRROR(0x10) AM_READ(sio_data_r)
81		AM_RANGE( 0x01, 0x01 ) AM_MIRROR(0x10) AM_DEVWRITE_LEGACY(TERMINAL_TAG, terminal_write)
	80	AM_RANGE( 0x01, 0x01 ) AM_MIRROR(0x10) AM_READ(sio_data_r) AM_DEVWRITE_LEGACY(TERMINAL_TAG, terminal_write)
82	81	AM_RANGE( 0x10, 0x10 ) AM_READWRITE(sio_status_r,sio_command_w)
83	82	ADDRESS_MAP_END
84	83
r11089	r11090
112	111	state->m_term_data = 0;
113	112	}
114	113
115		WRITE8_MEMBER( altair_state::altair_kbd_put )
	114	WRITE8_MEMBER( altair_state::kbd_put )
116	115	{
117	116	m_term_data = data;
118	117	}
119	118
120	119	static GENERIC_TERMINAL_INTERFACE( altair_terminal_intf )
121	120	{
122		DEVCB_DRIVER_MEMBER(altair_state, altair_kbd_put)
	121	DEVCB_DRIVER_MEMBER(altair_state, kbd_put)
123	122	};
124	123
125	124	static MACHINE_CONFIG_START( altair, altair_state )

src/mess/drivers/cd2650.c

r11089	r11090
25	25	might possibly look like, but we DID NOT read the source code.
26	26
27	27	****************************************************************************/
	28	#define ADDRESS_MAP_MODERN
28	29
29	30	#include "emu.h"
30	31	#include "cpu/s2650/s2650.h"
31	32	#include "machine/terminal.h"
32	33
	34	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
	35	#define VIDEO_START_MEMBER(name) void name::video_start()
	36	#define SCREEN_UPDATE_MEMBER(name) bool name::screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
33	37
34	38	class cd2650_state : public driver_device
35	39	{
36	40	public:
37	41	cd2650_state(running_machine &machine, const driver_device_config_base &config)
38		: driver_device(machine, config) { }
	42	: driver_device(machine, config),
	43	m_maincpu(*this, "maincpu"),
	44	m_terminal(*this, TERMINAL_TAG)
	45	{ }
39	46
40		const UINT8 *m_charrom;
41		const UINT8 *m_videoram;
	47	required_device<cpu_device> m_maincpu;
	48	required_device<device_t> m_terminal;
	49	DECLARE_READ8_MEMBER( cd2650_keyin_r );
	50	DECLARE_WRITE8_MEMBER( kbd_put );
	51	const UINT8 *m_p_chargen;
	52	const UINT8 *m_p_videoram;
42	53	UINT8 m_term_data;
	54	virtual void machine_reset();
	55	virtual void video_start();
	56	virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
43	57	};
44	58
45	59
46		static READ8_HANDLER( cd2650_keyin_r )
	60	READ8_MEMBER( cd2650_state::cd2650_keyin_r )
47	61	{
48		cd2650_state *state = space->machine().driver_data<cd2650_state>();
49		UINT8 ret = state->m_term_data;
50		state->m_term_data = 0x80;
	62	UINT8 ret = m_term_data;
	63	m_term_data = 0x80;
51	64	if ((ret > 0x60) && (ret < 0x7b))
52	65	ret -= 0x20; // upper case only
53	66	return ret;
54	67	}
55	68
56		static ADDRESS_MAP_START(cd2650_mem, AS_PROGRAM, 8)
	69	static ADDRESS_MAP_START(cd2650_mem, AS_PROGRAM, 8, cd2650_state)
57	70	ADDRESS_MAP_UNMAP_HIGH
58	71	AM_RANGE( 0x0000, 0x03ff) AM_ROM
59	72	AM_RANGE( 0x0400, 0x0fff) AM_RAM
60		AM_RANGE( 0x1000, 0x17ff) AM_RAM AM_BASE_MEMBER(cd2650_state, m_videoram)
	73	AM_RANGE( 0x1000, 0x17ff) AM_RAM AM_BASE(m_p_videoram)
61	74	AM_RANGE( 0x1800, 0x7fff) AM_RAM // expansion ram? the system doesn't use it
62	75	ADDRESS_MAP_END
63	76
64		static ADDRESS_MAP_START( cd2650_io , AS_IO, 8)
	77	static ADDRESS_MAP_START( cd2650_io, AS_IO, 8, cd2650_state)
65	78	ADDRESS_MAP_UNMAP_HIGH
66	79	AM_RANGE(S2650_DATA_PORT,S2650_DATA_PORT) AM_READ(cd2650_keyin_r)
67	80	//AM_RANGE(S2650_SENSE_PORT, S2650_FO_PORT) AM_READWRITE(cd2650_cass_in,cd2650_cass_out)
r11089	r11090
72	85	INPUT_PORTS_END
73	86
74	87
75		static MACHINE_RESET(cd2650)
	88	MACHINE_RESET_MEMBER(cd2650_state)
76	89	{
77		cd2650_state *state = machine.driver_data<cd2650_state>();
78		state->m_term_data = 0x80;
	90	m_term_data = 0x80;
79	91	}
80	92
81		static VIDEO_START( cd2650 )
	93	VIDEO_START_MEMBER(cd2650_state)
82	94	{
83		cd2650_state *state = machine.driver_data<cd2650_state>();
84		state->m_charrom = machine.region("chargen")->base();
	95	m_p_chargen = m_machine.region("chargen")->base();
85	96	}
86	97
87		static SCREEN_UPDATE( cd2650 )
	98	SCREEN_UPDATE_MEMBER(cd2650_state)
88	99	{
89	100	/* The video is unusual in that the characters in each line are spaced at 16 bytes in memory,
90	101	thus line 1 starts at 1000, line 2 at 1001, etc. There are 16 lines of 80 characters.
r11089	r11090
92	103	When the bottom of the screen is reached, it does not scroll, it just wraps around.
93	104	There is no scroll register or any indication of how scrolling might be accomplished. */
94	105
95		cd2650_state *state = screen->machine().driver_data<cd2650_state>();
96	106	UINT16 offset = 0; // if we figure out how the scrolling works, that calculation goes here
97	107	UINT8 y,ra,chr,gfx;
98	108	UINT16 sy=0,x,mem;
r11089	r11090
101	111	{
102	112	for (ra = 0; ra < 10; ra++)
103	113	{
104		UINT16 *p = BITMAP_ADDR16(bitmap, sy++, 0);
	114	UINT16 *p = BITMAP_ADDR16(&bitmap, sy++, 0);
105	115
106	116	for (x = 0; x < 80; x++)
107	117	{
r11089	r11090
113	123	if (mem > 0x4ff)
114	124	mem -= 0x500;
115	125
116		chr = state->m_videoram[mem];
	126	chr = m_p_videoram[mem];
117	127
118	128	if (chr < 0x20)
119	129	chr |= 0x40;
120	130
121		gfx = state->m_charrom[(chr<<4) | ra ];
	131	gfx = m_p_chargen[(chr<<4) | ra ];
122	132	}
123	133
124	134	/* Display a scanline of a character */
125		*p++ = ( gfx & 0x80 ) ? 1 : 0;
126		*p++ = ( gfx & 0x40 ) ? 1 : 0;
127		*p++ = ( gfx & 0x20 ) ? 1 : 0;
128		*p++ = ( gfx & 0x10 ) ? 1 : 0;
129		*p++ = ( gfx & 0x08 ) ? 1 : 0;
130		*p++ = ( gfx & 0x04 ) ? 1 : 0;
131		*p++ = ( gfx & 0x02 ) ? 1 : 0;
132		*p++ = ( gfx & 0x01 ) ? 1 : 0;
	135	*p++ = BIT(gfx, 7);
	136	*p++ = BIT(gfx, 6);
	137	*p++ = BIT(gfx, 5);
	138	*p++ = BIT(gfx, 4);
	139	*p++ = BIT(gfx, 3);
	140	*p++ = BIT(gfx, 2);
	141	*p++ = BIT(gfx, 1);
	142	*p++ = BIT(gfx, 0);
133	143	}
134	144	}
135	145	}
136	146	return 0;
137	147	}
138	148
139		static WRITE8_DEVICE_HANDLER( cd2650_kbd_put )
	149	WRITE8_MEMBER( cd2650_state::kbd_put )
140	150	{
141		cd2650_state *state = device->machine().driver_data<cd2650_state>();
142		state->m_term_data = data;
	151	m_term_data = data;
143	152	}
144	153
145		static GENERIC_TERMINAL_INTERFACE( cd2650_terminal_intf )
	154	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
146	155	{
147		DEVCB_HANDLER(cd2650_kbd_put)
	156	DEVCB_DRIVER_MEMBER(cd2650_state, kbd_put)
148	157	};
149	158
150	159	static MACHINE_CONFIG_START( cd2650, cd2650_state )
r11089	r11090
153	162	MCFG_CPU_PROGRAM_MAP(cd2650_mem)
154	163	MCFG_CPU_IO_MAP(cd2650_io)
155	164
156		MCFG_MACHINE_RESET(cd2650)
157
158	165	/* video hardware */
159	166	MCFG_SCREEN_ADD("screen", RASTER)
160	167	MCFG_SCREEN_REFRESH_RATE(50)
r11089	r11090
162	169	MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
163	170	MCFG_SCREEN_SIZE(640, 160)
164	171	MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 159)
165		MCFG_SCREEN_UPDATE(cd2650)
166
167	172	MCFG_PALETTE_LENGTH(2)
168	173	MCFG_PALETTE_INIT(black_and_white)
169	174
170		MCFG_VIDEO_START(cd2650)
171
172		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, cd2650_terminal_intf) // keyboard only
	175	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf) // keyboard only
173	176	MACHINE_CONFIG_END
174	177
175	178	/* ROM definition */

src/mess/drivers/sun1.c

r11089	r11090
33	33	required_device<device_t> m_terminal;
34	34	DECLARE_READ16_MEMBER( sun1_upd7201_r );
35	35	DECLARE_WRITE16_MEMBER( sun1_upd7201_w );
36		DECLARE_WRITE8_MEMBER( sun1_kbd_put );
	36	DECLARE_WRITE8_MEMBER( kbd_put );
37	37	virtual void machine_reset();
38	38	UINT16* m_ram;
39	39	UINT8 m_term_data;
r11089	r11090
86	86	}
87	87
88	88
89		WRITE8_MEMBER( sun1_state::sun1_kbd_put )
	89	WRITE8_MEMBER( sun1_state::kbd_put )
90	90	{
91	91	m_term_data = data;
92	92	}
93	93
94		static GENERIC_TERMINAL_INTERFACE( sun1_terminal_intf )
	94	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
95	95	{
96		DEVCB_DRIVER_MEMBER(sun1_state, sun1_kbd_put)
	96	DEVCB_DRIVER_MEMBER(sun1_state, kbd_put)
97	97	};
98	98
99	99
r11089	r11090
104	104
105	105	/* video hardware */
106	106	MCFG_FRAGMENT_ADD( generic_terminal )
107		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,sun1_terminal_intf)
	107	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
108	108	MACHINE_CONFIG_END
109	109
110	110	/* ROM definition */

src/mess/drivers/pcm.c

r11089	r11090
64	64	#include "sound/wave.h"
65	65	#include "machine/terminal.h"
66	66
	67	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
	68	#define VIDEO_START_MEMBER(name) void name::video_start()
	69	#define SCREEN_UPDATE_MEMBER(name) bool name::screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
67	70
68	71	class pcm_state : public driver_device
69	72	{
r11089	r11090
94	97	DECLARE_READ8_MEMBER( pcm_85_r );
95	98	DECLARE_WRITE_LINE_MEMBER( pcm_82_w );
96	99	DECLARE_WRITE8_MEMBER( pcm_85_w );
97		DECLARE_WRITE8_MEMBER( pcm_kbd_put );
98		UINT8 *m_videoram;
	100	DECLARE_WRITE8_MEMBER( kbd_put );
	101	UINT8 *m_p_chargen;
	102	UINT8 *m_p_videoram;
99	103	UINT8 m_term_data;
100	104	UINT8 m_step;
101	105	UINT8 m_85;
	106	virtual void machine_reset();
	107	virtual void video_start();
	108	virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
102	109	};
103	110
104	111
r11089	r11090
165	172	ADDRESS_MAP_UNMAP_HIGH
166	173	AM_RANGE( 0x0000, 0x1fff ) AM_ROM  // ROM
167	174	AM_RANGE( 0x2000, 0xf7ff ) AM_RAM  // RAM
168		AM_RANGE( 0xf800, 0xffff ) AM_RAM AM_BASE(m_videoram) // Video RAM
	175	AM_RANGE( 0xf800, 0xffff ) AM_RAM AM_BASE(m_p_videoram) // Video RAM
169	176	ADDRESS_MAP_END
170	177
171		static ADDRESS_MAP_START( pcm_io, AS_IO, 8, pcm_state)
	178	static ADDRESS_MAP_START(pcm_io, AS_IO, 8, pcm_state)
172	179	ADDRESS_MAP_UNMAP_HIGH
173	180	ADDRESS_MAP_GLOBAL_MASK(0xff)
174	181	AM_RANGE(0x80, 0x83) AM_DEVREADWRITE_LEGACY("z80ctc_s", z80ctc_r, z80ctc_w) // system CTC
r11089	r11090
186	193	static INPUT_PORTS_START( pcm )
187	194	INPUT_PORTS_END
188	195
189		WRITE8_MEMBER( pcm_state::pcm_kbd_put )
	196	WRITE8_MEMBER( pcm_state::kbd_put )
190	197	{
191	198	m_term_data = data;
192	199	m_step = 0;
193	200	}
194	201
195		static GENERIC_TERMINAL_INTERFACE( pcm_terminal_intf )
	202	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
196	203	{
197		DEVCB_DRIVER_MEMBER(pcm_state, pcm_kbd_put)
	204	DEVCB_DRIVER_MEMBER(pcm_state, kbd_put)
198	205	};
199	206
200		static MACHINE_RESET(pcm)
	207	MACHINE_RESET_MEMBER(pcm_state)
201	208	{
202	209	}
203	210
204		static VIDEO_START( pcm )
	211	VIDEO_START_MEMBER( pcm_state )
205	212	{
	213	m_p_chargen = machine().region("chargen")->base();
206	214	}
207	215
208		static SCREEN_UPDATE( pcm )
	216	SCREEN_UPDATE_MEMBER( pcm_state )
209	217	{
210		pcm_state *state = screen->machine().driver_data<pcm_state>();
211		UINT8 code;
212		UINT8 line;
213		int y, x, j, b;
	218	UINT8 y,ra,chr,gfx;
	219	UINT16 sy=0,ma=0x400,x;
214	220
215		UINT8 *gfx = screen->machine().region("chargen")->base();
216
217	221	for (y = 0; y < 32; y++)
218	222	{
219		for (x = 0; x < 64; x++)
	223	for (ra = 0; ra < 8; ra++)
220	224	{
221		code = state->m_videoram[(0x400 + y*64 + x) & 0x7ff];
222		for(j = 0; j < 8; j++ )
	225	UINT16 *p = BITMAP_ADDR16(&bitmap, sy++, 0);
	226
	227	for (x = ma; x < ma + 64; x++)
223	228	{
224		line = gfx[code*8 + j];
225		for (b = 0; b < 8; b++)
226		{
227		*BITMAP_ADDR16(bitmap, y*8+j, x * 8 + (7 - b)) =  ((line >> b) & 0x01);
228		}
	229	chr = m_p_videoram[x & 0x7ff];
	230
	231	gfx = m_p_chargen[(chr<<3) | ra];
	232
	233	*p++ = BIT(gfx, 7);
	234	*p++ = BIT(gfx, 6);
	235	*p++ = BIT(gfx, 5);
	236	*p++ = BIT(gfx, 4);
	237	*p++ = BIT(gfx, 3);
	238	*p++ = BIT(gfx, 2);
	239	*p++ = BIT(gfx, 1);
	240	*p++ = BIT(gfx, 0);
229	241	}
230	242	}
	243	ma+=64;
231	244	}
232	245	return 0;
233	246	}
r11089	r11090
321	334	MCFG_CPU_IO_MAP(pcm_io)
322	335	MCFG_CPU_CONFIG(pcm_daisy_chain)
323	336
324		MCFG_MACHINE_RESET(pcm)
325
326	337	/* video hardware */
327	338	MCFG_SCREEN_ADD("screen", RASTER)
328	339	MCFG_SCREEN_REFRESH_RATE(50)
r11089	r11090
330	341	MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
331	342	MCFG_SCREEN_SIZE(64*8, 32*8)
332	343	MCFG_SCREEN_VISIBLE_AREA(0, 64*8-1, 0, 32*8-1)
333		MCFG_SCREEN_UPDATE(pcm)
334	344	MCFG_GFXDECODE(pcm)
335	345	MCFG_PALETTE_LENGTH(2)
336	346	MCFG_PALETTE_INIT(black_and_white)
337	347
338		MCFG_VIDEO_START(pcm)
339
340	348	/* Sound */
341	349	MCFG_SPEAKER_STANDARD_MONO("mono")
342	350	MCFG_SOUND_WAVE_ADD("wave", "cassette")
r11089	r11090
345	353	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
346	354
347	355	/* Devices */
348		MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, pcm_terminal_intf)
	356	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
349	357	MCFG_CASSETTE_ADD( "cassette", default_cassette_config )
350	358	MCFG_Z80PIO_ADD( "z80pio_u", XTAL_10MHz /4, pio_u_intf )
351	359	MCFG_Z80PIO_ADD( "z80pio_s", XTAL_10MHz /4, pio_s_intf )

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