MESS SVN History

15994 Revisions

r11082 Monday 4th April, 2011 at 13:12:07 UTC by Robbbert
[SUN1] Modernised, added terminal keyboard.

[src/mess/drivers]

sun1.c

src/mess/drivers/sun1.c
r11081	r11082
8	8
9	9	04/12/2009 Skeleton driver.
10	10
	11	04/04/2011 Modernised, added terminal keyboard.
	12
11	13	****************************************************************************/
	14	#define ADDRESS_MAP_MODERN
12	15
13	16	#include "emu.h"
14	17	#include "cpu/m68000/m68000.h"
15	18	#include "machine/upd7201.h"
16	19	#include "machine/terminal.h"
17	20
	21	#define MACHINE_RESET_MEMBER(name) void name::machine_reset()
18	22
19	23	class sun1_state : public driver_device
20	24	{
21	25	public:
22	26	sun1_state(running_machine &machine, const driver_device_config_base &config)
23		: driver_device(machine, config) { }
	27	: driver_device(machine, config),
	28	m_maincpu(*this, "maincpu"),
	29	m_terminal(*this, TERMINAL_TAG)
	30	{ }
24	31
	32	required_device<cpu_device> m_maincpu;
	33	required_device<device_t> m_terminal;
	34	DECLARE_READ16_MEMBER( sun1_upd7201_r );
	35	DECLARE_WRITE16_MEMBER( sun1_upd7201_w );
	36	DECLARE_WRITE8_MEMBER( sun1_kbd_put );
	37	virtual void machine_reset();
25	38	UINT16* m_ram;
	39	UINT8 m_term_data;
26	40	};
27	41
28	42
29	43
30	44	// Just hack to show output since upd7201 is not implemented yet
31	45
32		~~static~~ READ16_~~HANDL~~ER(sun1_upd7201_r)
	46	READ16_MEMBER(sun1_state::sun1_upd7201_r)
33	47	{
34		return 0xffff;
	48	UINT16 ret;
	49	if (offset == 0)
	50	{
	51	ret = m_term_data << 8;
	52	m_term_data = 0;
	53	}
	54	else
	55	ret = 0xfeff \| (m_term_data ? 0x100 : 0);
	56
	57	return ret;
35	58	}
36	59
37		~~static~~ WRITE16_~~HANDL~~ER(sun1_upd7201_w)
	60	WRITE16_MEMBER(sun1_state::sun1_upd7201_w)
38	61	{
39		device_t *devconf = space->machine().device(TERMINAL_TAG);
40		if (offset==0) terminal_write(devconf,0,data >> 8);
	62	if (offset == 0)
	63	terminal_write(m_terminal, 0, data >> 8);
41	64	}
42	65
43		static ADDRESS_MAP_START(sun1_mem, AS_PROGRAM, 16)
	66	static ADDRESS_MAP_START(sun1_mem, AS_PROGRAM, 16, sun1_state)
44	67	ADDRESS_MAP_UNMAP_HIGH
45		AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_BASE~~_MEMBER~~(~~sun1_state,~~ m_ram) // 512 KB RAM / ROM at boot
	68	AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_BASE(m_ram) // 512 KB RAM / ROM at boot
46	69	AM_RANGE(0x00200000, 0x00203fff) AM_ROM AM_REGION("user1",0)
47	70	AM_RANGE(0x00600000, 0x00600007) AM_READWRITE( sun1_upd7201_r, sun1_upd7201_w )
48	71	ADDRESS_MAP_END
r11081	r11082
52	75	INPUT_PORTS_END
53	76
54	77
55		~~static~~ MACHINE_RESET(sun1)
	78	MACHINE_RESET_MEMBER(sun1_state)
56	79	{
57		sun1_state *state = machine.driver_data<sun1_state>();
58		UINT8* user1 = machine.region("user1")->base();
	80	UINT8* user1 = m_machine.region("user1")->base();
59	81
60		memcpy((UINT8*)~~state->~~m_ram,user1,0x4000);
	82	memcpy((UINT8*)m_ram,user1,0x4000);
61	83
62		machine.device("maincpu")->reset();
	84	m_machine.device("maincpu")->reset();
	85	m_term_data = 0;
63	86	}
64	87
65	88
66		~~static~~ WRITE8_DE~~VIC~~E~~_HANDLE~~R( sun1_kbd_put )
	89	WRITE8_MEMBER( sun1_state::sun1_kbd_put )
67	90	{
	91	m_term_data = data;
68	92	}
69	93
70	94	static GENERIC_TERMINAL_INTERFACE( sun1_terminal_intf )
71	95	{
72		DEVCB_~~HAN~~DLER(sun1_kbd_put)
	96	DEVCB_DRIVER_MEMBER(sun1_state, sun1_kbd_put)
73	97	};
74	98
75	99
76	100	static MACHINE_CONFIG_START( sun1, sun1_state )
77		/* basic machine hardware */
78		MCFG_CPU_ADD("maincpu", M68000, XTAL_10MHz)
79		MCFG_CPU_PROGRAM_MAP(sun1_mem)
	101	/* basic machine hardware */
	102	MCFG_CPU_ADD("maincpu", M68000, XTAL_10MHz)
	103	MCFG_CPU_PROGRAM_MAP(sun1_mem)
80	104
81		MCFG_MACHINE_RESET(sun1)
82
83		/* video hardware */
84		MCFG_FRAGMENT_ADD( generic_terminal )
	105	/* video hardware */
	106	MCFG_FRAGMENT_ADD( generic_terminal )
85	107	MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG,sun1_terminal_intf)
86	108	MACHINE_CONFIG_END
87	109
88	110	/* ROM definition */
89	111	ROM_START( sun1 )
90		ROM_REGION( 0x4000, "user1", ROMREGION_ERASEFF )
	112	ROM_REGION( 0x4000, "user1", ROMREGION_ERASEFF )
91	113	ROM_LOAD16_BYTE( "v10.8.bin", 0x0001, 0x2000, CRC(3528a0f8) SHA1(be437dd93d1a44eccffa6f5e05935119482beab0))
92	114	ROM_LOAD16_BYTE( "v10.0.bin", 0x0000, 0x2000, CRC(1ad4c52a) SHA1(4bc1a19e8f202378d5d7baa8b95319275c040a6d))
	115
93	116	ROM_REGION( 0x4000, "diag", ROMREGION_ERASEFF )
94	117	ROM_LOAD16_BYTE( "8mhzdiag.8.bin", 0x0001, 0x2000, CRC(808a549e) SHA1(d2aba014a5507c1538f2c1a73e1d2524f28034f4))
95	118	ROM_LOAD16_BYTE( "8mhzdiag.0.bin", 0x0000, 0x2000, CRC(7a92d506) SHA1(5df3800f7083293fc01bb6a7e7538ad425bbebfb))
	119
96	120	ROM_REGION( 0x10000, "gfx", ROMREGION_ERASEFF )
97	121	ROM_LOAD( "gfxu605.g4.bin", 0x0000, 0x0200, CRC(274b7b3d) SHA1(40d8be2cfcbd03512a05925991bb5030d5d4b5e9))
98	122	ROM_LOAD( "gfxu308.g21.bin", 0x0200, 0x0200, CRC(35a6eed8) SHA1(25cb2dd8e5343cd7927c3045eb4cb96dc9935a37))
r11081	r11082
101	125	ROM_LOAD( "gfxu104.g1.bin", 0x0800, 0x0200, CRC(86f7a483) SHA1(8eb3778f5497741cd4345e81ff1a903c9a63c8bb))
102	126	ROM_LOAD( "gfxu307.g61.bin", 0x0a00, 0x0020, CRC(b190f25d) SHA1(80fbdc843f1eb68a2d3713499f04d99dab88ce83))
103	127	ROM_LOAD( "gfxu107.g60.bin", 0x0a20, 0x0020, CRC(425d3a98) SHA1(9ae4ce3761c2f995d00bed8d752c55224d274062))
	128
104	129	ROM_REGION( 0x10000, "cpu", ROMREGION_ERASEFF )
105	130	ROM_LOAD( "cpuu503.p2.bin", 0x0000, 0x0200, CRC(12d9a6be) SHA1(fca99f9c5afc630ac67cbd4e5ba4e5242b826848))
106	131	ROM_LOAD( "cpuu602.p1.bin", 0x0200, 0x0020, CRC(ee1e5a14) SHA1(0d3346cb3b647fa2475bd7b4fa36ea6ecfdaf805))
107	132	ROM_LOAD( "cpuu502.p0.bin", 0x0220, 0x0020, CRC(20eb1183) SHA1(9b268792b28d858d6b6a1b6c4148af88a8d6b735))
108
109	133	ROM_END
110	134
111	135	/* Driver */

15994 Revisions