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r10992 Wednesday 30th March, 2011 at 20:16:03 UTC by Curt Coder
[PC8500] Modernized driver.

[src/mess/drivers]	pc8401a.c
[src/mess/includes]	pc8401a.h
[src/mess/video]	pc8401a.c

src/mess/video/pc8401a.c

r10991	r10992
9	9	palette_set_color(machine, 1, MAKE_RGB(16, 37, 84));
10	10	}
11	11
12		static VIDEO_START( pc8401a )
	12	void pc8401a_state::video_start()
13	13	{
14		pc8401a_state *state = machine.driver_data<pc8401a_state>();
15
16	14	/* allocate video memory */
17		state->video_ram = auto_alloc_array(machine, UINT8, PC8401A_LCD_VIDEORAM_SIZE);
	15	m_video_ram = auto_alloc_array(m_machine, UINT8, PC8401A_LCD_VIDEORAM_SIZE);
18	16
19	17	/* register for state saving */
20		state->save_pointer(NAME(state->video_ram), PC8401A_LCD_VIDEORAM_SIZE);
	18	save_pointer(NAME(m_video_ram), PC8401A_LCD_VIDEORAM_SIZE);
21	19	}
22	20
23		static SCREEN_UPDATE( pc8401a )
	21	bool pc8401a_state::screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
24	22	{
25	23	return 0;
26	24	}
27	25
28	26	/* PC-8500 */
29	27
30		static VIDEO_START( pc8500 )
	28	void pc8500_state::video_start()
31	29	{
32		pc8401a_state *state = machine.driver_data<pc8401a_state>();
33
34	30	/* allocate video memory */
35		state->video_ram = auto_alloc_array(machine, UINT8, PC8500_LCD_VIDEORAM_SIZE);
	31	m_video_ram = auto_alloc_array(m_machine, UINT8, PC8500_LCD_VIDEORAM_SIZE);
36	32
37	33	/* register for state saving */
38		state->save_pointer(NAME(state->video_ram), PC8500_LCD_VIDEORAM_SIZE);
	34	save_pointer(NAME(m_video_ram), PC8500_LCD_VIDEORAM_SIZE);
39	35	}
40	36
41		static SCREEN_UPDATE( pc8500 )
	37	bool pc8500_state::screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect)
42	38	{
43		pc8401a_state *state = screen->machine().driver_data<pc8401a_state>();
	39	sed1330_update(m_lcdc, &bitmap, &cliprect);
44	40
45		if (screen == state->m_screen_lcd)
	41	/*
	42	if (strcmp(screen.tag(), SCREEN_TAG) == 0)
46	43	{
47		sed1330_update(state->m_lcdc, bitmap, cliprect);
	44	sed1330_update(m_lcdc, &bitmap, &cliprect);
48	45	}
49	46	else
50	47	{
51		mc6845_update(state->m_crtc, bitmap, cliprect);
	48	mc6845_update(m_crtc, &bitmap, &cliprect);
52	49	}
	50	*/
53	51
54	52	return 0;
55	53	}
56	54
57	55	/* SED1330 Interface */
58	56
59		static READ8_HANDLER( pc8500_sed1330_vd_r )
	57	READ8_MEMBER( pc8500_state::vd_r )
60	58	{
61		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
62
63		return state->video_ram[offset & PC8500_LCD_VIDEORAM_MASK];
	59	return m_video_ram[offset & PC8500_LCD_VIDEORAM_MASK];
64	60	}
65	61
66		static WRITE8_HANDLER( pc8500_sed1330_vd_w )
	62	WRITE8_MEMBER( pc8500_state::vd_w )
67	63	{
68		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
69
70		state->video_ram[offset & PC8500_LCD_VIDEORAM_MASK] = data;
	64	m_video_ram[offset & PC8500_LCD_VIDEORAM_MASK] = data;
71	65	}
72	66
73	67	static SED1330_INTERFACE( pc8500_sed1330_config )
74	68	{
75	69	SCREEN_TAG,
76		DEVCB_MEMORY_HANDLER(Z80_TAG, PROGRAM, pc8500_sed1330_vd_r),
77		DEVCB_MEMORY_HANDLER(Z80_TAG, PROGRAM, pc8500_sed1330_vd_w)
	70	DEVCB_DRIVER_MEMBER(pc8500_state, vd_r),
	71	DEVCB_DRIVER_MEMBER(pc8500_state, vd_w)
78	72	};
79	73
80	74	/* MC6845 Interface */
r10991	r10992
83	77	{
84	78	}
85	79
86		static const mc6845_interface pc8441a_mc6845_interface = {
	80	static const mc6845_interface pc8441a_mc6845_interface =
	81	{
87	82	CRT_SCREEN_TAG,
88	83	6,
89	84	NULL,
r10991	r10992
104	99	MCFG_PALETTE_LENGTH(2)
105	100	MCFG_PALETTE_INIT(pc8401a)
106	101
107		MCFG_VIDEO_START(pc8401a)
108
109	102	/* LCD */
110	103	MCFG_SCREEN_ADD(SCREEN_TAG, LCD)
111	104	MCFG_SCREEN_REFRESH_RATE(44)
112	105	MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
113	106	MCFG_SCREEN_SIZE(480, 128)
114	107	MCFG_SCREEN_VISIBLE_AREA(0, 480-1, 0, 128-1)
115		MCFG_SCREEN_UPDATE(pc8401a)
116	108	MACHINE_CONFIG_END
117	109
118	110	MACHINE_CONFIG_FRAGMENT( pc8500_video )
r10991	r10992
121	113	MCFG_PALETTE_LENGTH(2+8)
122	114	MCFG_PALETTE_INIT(pc8401a)
123	115
124		MCFG_VIDEO_START(pc8500)
125
126	116	/* LCD */
127	117	MCFG_SCREEN_ADD(SCREEN_TAG, LCD)
128	118	MCFG_SCREEN_REFRESH_RATE(44)
129	119	MCFG_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
130	120	MCFG_SCREEN_SIZE(480, 208)
131	121	MCFG_SCREEN_VISIBLE_AREA(0, 480-1, 0, 200-1)
132		MCFG_SCREEN_UPDATE(pc8500)
133	122
134	123	MCFG_SED1330_ADD(SED1330_TAG, 0, pc8500_sed1330_config)
135	124
r10991	r10992
140	129	MCFG_SCREEN_VISIBLE_AREA(0, 80*8-1, 0, 24*8-1)
141	130	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
142	131	MCFG_SCREEN_REFRESH_RATE(50)
143		MCFG_SCREEN_UPDATE(pc8500)
144	132
145	133	MCFG_MC6845_ADD(MC6845_TAG, MC6845, 400000, pc8441a_mc6845_interface)
146	134	MACHINE_CONFIG_END

src/mess/includes/pc8401a.h

r10991	r10992
3	3	#ifndef __PC8401A__
4	4	#define __PC8401A__
5	5
	6	#define ADDRESS_MAP_MODERN
	7
6	8	#include "emu.h"
7	9	#include "cpu/z80/z80.h"
8	10	#include "imagedev/cartslot.h"
r10991	r10992
10	12	#include "machine/msm8251.h"
11	13	#include "machine/ram.h"
12	14	#include "machine/upd1990a.h"
	15	#include "video/mc6845.h"
13	16	#include "video/sed1330.h"
14		#include "video/mc6845.h"
15	17
16	18	#define SCREEN_TAG      "screen"
17	19	#define CRT_SCREEN_TAG   "screen2"
r10991	r10992
39	41	m_rtc(*this, UPD1990A_TAG),
40	42	m_lcdc(*this, SED1330_TAG),
41	43	m_crtc(*this, MC6845_TAG),
42		m_screen_lcd(*this, SCREEN_TAG)
	44	m_screen_lcd(*this, SCREEN_TAG),
	45	m_ram(*this, RAM_TAG)
43	46	{ }
44	47
45	48	required_device<cpu_device> m_maincpu;
r10991	r10992
47	50	required_device<device_t> m_lcdc;
48	51	required_device<device_t> m_crtc;
49	52	required_device<device_t> m_screen_lcd;
	53	required_device<device_t> m_ram;
50	54
51		/* keyboard state */
52		int key_strobe;         /* key pressed */
	55	virtual void machine_start();
53	56
54		/* clock state */
55		int rtc_data;         /* RTC data output */
56		int rtc_tp;            /* RTC timing pulse output */
	57	virtual void video_start();
	58	virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
57	59
58		/* memory state */
59		UINT8 mmr;            /* memory mapping register */
60		UINT32 io_addr;         /* I/O ROM address counter */
	60	DECLARE_WRITE8_MEMBER( mmr_w );
	61	DECLARE_READ8_MEMBER( mmr_r );
	62	DECLARE_READ8_MEMBER( rtc_r );
	63	DECLARE_WRITE8_MEMBER( rtc_cmd_w );
	64	DECLARE_WRITE8_MEMBER( rtc_ctrl_w );
	65	DECLARE_READ8_MEMBER( io_rom_data_r );
	66	DECLARE_WRITE8_MEMBER( io_rom_addr_w );
	67	DECLARE_READ8_MEMBER( port70_r );
	68	DECLARE_READ8_MEMBER( port71_r );
	69	DECLARE_WRITE8_MEMBER( port70_w );
	70	DECLARE_WRITE8_MEMBER( port71_w );
	71	DECLARE_READ8_MEMBER( ppi_pc_r );
	72	DECLARE_WRITE8_MEMBER( ppi_pc_w );
	73
	74	void bankswitch(UINT8 data);
61	75
62		/* video state */
63		UINT8 *video_ram;      /* LCD video RAM */
64		UINT8 *crt_ram;         /* CRT video RAM */
	76	// keyboard state
	77	int m_key_strobe;         // key pressed
65	78
66		UINT8 key_latch;
	79	// memory state
	80	UINT8 m_mmr;            // memory mapping register
	81	UINT32 m_io_addr;         // I/O ROM address counter
	82
	83	// video state
	84	UINT8 *m_video_ram;         // LCD video RAM
	85	UINT8 *m_crt_ram;         // CRT video RAM
	86
	87	UINT8 m_key_latch;
67	88	};
68	89
69		/* ---------- defined in video/pc8401a.c ---------- */
	90	class pc8500_state : public pc8401a_state
	91	{
	92	public:
	93	pc8500_state(running_machine &machine, const driver_device_config_base &config)
	94	: pc8401a_state(machine, config)
	95	{ }
70	96
	97	virtual void video_start();
	98	virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
	99
	100	DECLARE_READ8_MEMBER( vd_r );
	101	DECLARE_WRITE8_MEMBER( vd_w );
	102	};
	103
	104	// ---------- defined in video/pc8401a.c ----------
	105
71	106	MACHINE_CONFIG_EXTERN( pc8401a_video );
72	107	MACHINE_CONFIG_EXTERN( pc8500_video );
73	108

src/mess/drivers/pc8401a.c

r10991	r10992
18	18	- 8255 ports
19	19	- MC6845 palette
20	20	- MC6845 chargen ROM
	21	- MC6845 screen update
21	22
22	23	- peripherals
23	24	* PC-8431A Dual Floppy Drive
r10991	r10992
32	33
33	34	/* Fake Keyboard */
34	35
35
36	36	static void pc8401a_keyboard_scan(running_machine &machine)
37	37	{
38	38	pc8401a_state *state = machine.driver_data<pc8401a_state>();
r10991	r10992
48	48	if (data != 0xff)
49	49	{
50	50	strobe = 1;
51		state->key_latch = data;
	51	state->m_key_latch = data;
52	52	}
53	53	}
54	54
55		if (!state->key_strobe && strobe)
	55	if (!state->m_key_strobe && strobe)
56	56	{
57	57	/* trigger interrupt */
58		cputag_set_input_line_and_vector(machine, Z80_TAG, INPUT_LINE_IRQ0, ASSERT_LINE, 0x28);
	58	state->m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0x28);
59	59	logerror("INTERRUPT\n");
60	60	}
61	61
62		if (strobe)   state->key_strobe = strobe;
	62	if (strobe)   state->m_key_strobe = strobe;
63	63	}
64	64
65	65	static TIMER_DEVICE_CALLBACK( pc8401a_keyboard_tick )
r10991	r10992
69	69
70	70	/* Read/Write Handlers */
71	71
72		static void pc8401a_bankswitch(running_machine &machine, UINT8 data)
	72	void pc8401a_state::bankswitch(UINT8 data)
73	73	{
74		address_space *program = machine.device(Z80_TAG)->memory().space(AS_PROGRAM);
	74	address_space *program = m_maincpu->memory().space(AS_PROGRAM);
75	75
76	76	int rombank = data & 0x03;
77	77	int ram0000 = (data >> 2) & 0x03;
r10991	r10992
85	85	/* internal ROM */
86	86	program->install_read_bank(0x0000, 0x7fff, "bank1");
87	87	program->unmap_write(0x0000, 0x7fff);
88		memory_set_bank(machine, "bank1", rombank);
	88	memory_set_bank(m_machine, "bank1", rombank);
89	89	}
90	90	else
91	91	{
r10991	r10992
97	97
98	98	case 1: /* RAM 0000H to 7FFFH */
99	99	program->install_readwrite_bank(0x0000, 0x7fff, "bank1");
100		memory_set_bank(machine, "bank1", 4);
	100	memory_set_bank(m_machine, "bank1", 4);
101	101	//logerror("0x0000-0x7fff = RAM 0-7fff\n");
102	102	break;
103	103
104	104	case 2:   /* RAM 8000H to FFFFH */
105	105	program->install_readwrite_bank(0x0000, 0x7fff, "bank1");
106		memory_set_bank(machine, "bank1", 5);
	106	memory_set_bank(m_machine, "bank1", 5);
107	107	//logerror("0x0000-0x7fff = RAM 8000-ffff\n");
108	108	break;
109	109
r10991	r10992
116	116	{
117	117	case 0: /* cell addresses 0000H to 3FFFH */
118	118	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
119		memory_set_bank(machine, "bank3", 0);
	119	memory_set_bank(m_machine, "bank3", 0);
120	120	//logerror("0x8000-0xbfff = RAM 0-3fff\n");
121	121	break;
122	122
123	123	case 1: /* cell addresses 4000H to 7FFFH */
124	124	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
125		memory_set_bank(machine, "bank3", 1);
	125	memory_set_bank(m_machine, "bank3", 1);
126	126	//logerror("0x8000-0xbfff = RAM 4000-7fff\n");
127	127	break;
128	128
129	129	case 2: /* cell addresses 8000H to BFFFH */
130	130	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
131		memory_set_bank(machine, "bank3", 2);
	131	memory_set_bank(m_machine, "bank3", 2);
132	132	//logerror("0x8000-0xbfff = RAM 8000-bfff\n");
133	133	break;
134	134
135	135	case 3: /* RAM cartridge */
136		if (ram_get_size(machine.device(RAM_TAG)) > 64)
	136	if (ram_get_size(m_ram) > 64)
137	137	{
138	138	program->install_readwrite_bank(0x8000, 0xbfff, "bank3");
139		memory_set_bank(machine, "bank3", 3); // TODO or 4
	139	memory_set_bank(m_machine, "bank3", 3); // TODO or 4
140	140	}
141	141	else
142	142	{
r10991	r10992
151	151	/* CRT video RAM */
152	152	program->install_readwrite_bank(0xc000, 0xdfff, "bank4");
153	153	program->unmap_readwrite(0xe000, 0xe7ff);
154		memory_set_bank(machine, "bank4", 1);
	154	memory_set_bank(m_machine, "bank4", 1);
155	155	//logerror("0xc000-0xdfff = video RAM\n");
156	156	}
157	157	else
158	158	{
159	159	/* RAM */
160	160	program->install_readwrite_bank(0xc000, 0xe7ff, "bank4");
161		memory_set_bank(machine, "bank4", 0);
	161	memory_set_bank(m_machine, "bank4", 0);
162	162	//logerror("0xc000-0e7fff = RAM c000-e7fff\n");
163	163	}
164	164	}
165	165
166		static WRITE8_HANDLER( mmr_w )
	166	WRITE8_MEMBER( pc8401a_state::mmr_w )
167	167	{
168	168	/*
169	169
r10991	r10992
180	180
181	181	*/
182	182
183		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
184
185		if (data != state->mmr)
	183	if (data != m_mmr)
186	184	{
187		pc8401a_bankswitch(space->machine(), data);
	185	bankswitch(data);
188	186	}
189	187
190		state->mmr = data;
	188	m_mmr = data;
191	189	}
192	190
193		static READ8_HANDLER( mmr_r )
	191	READ8_MEMBER( pc8401a_state::mmr_r )
194	192	{
195		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
196
197		return state->mmr;
	193	return m_mmr;
198	194	}
199	195
200		static READ8_HANDLER( rtc_r )
	196	READ8_MEMBER( pc8401a_state::rtc_r )
201	197	{
202	198	/*
203	199
r10991	r10992
214	210
215	211	*/
216	212
217		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
218
219		return (state->rtc_data << 1) | (state->rtc_tp << 2);
	213	return (m_rtc->data_out_r() << 1) | (m_rtc->tp_r() << 2);
220	214	}
221	215
222		static WRITE8_HANDLER( rtc_cmd_w )
	216	WRITE8_MEMBER( pc8401a_state::rtc_cmd_w )
223	217	{
224	218	/*
225	219
r10991	r10992
236	230
237	231	*/
238	232
239		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
240
241		state->m_rtc->c0_w(BIT(data, 0));
242		state->m_rtc->c1_w(BIT(data, 1));
243		state->m_rtc->c2_w(BIT(data, 2));
244		state->m_rtc->data_in_w(BIT(data, 3));
	233	m_rtc->c0_w(BIT(data, 0));
	234	m_rtc->c1_w(BIT(data, 1));
	235	m_rtc->c2_w(BIT(data, 2));
	236	m_rtc->data_in_w(BIT(data, 3));
245	237	}
246	238
247		static WRITE8_HANDLER( rtc_ctrl_w )
	239	WRITE8_MEMBER( pc8401a_state::rtc_ctrl_w )
248	240	{
249	241	/*
250	242
r10991	r10992
261	253
262	254	*/
263	255
264		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
265
266		state->m_rtc->oe_w(BIT(data, 0));
267		state->m_rtc->stb_w(BIT(data, 1));
268		state->m_rtc->clk_w(BIT(data, 2));
	256	m_rtc->oe_w(BIT(data, 0));
	257	m_rtc->stb_w(BIT(data, 1));
	258	m_rtc->clk_w(BIT(data, 2));
269	259	}
270	260
271		static READ8_HANDLER( io_rom_data_r )
	261	READ8_MEMBER( pc8401a_state::io_rom_data_r )
272	262	{
273		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
	263	UINT8 *iorom = m_machine.region("iorom")->base();
274	264
275		UINT8 *iorom = space->machine().region("iorom")->base();
	265	//logerror("I/O ROM read from %05x\n", m_io_addr);
276	266
277		//logerror("I/O ROM read from %05x\n", state->io_addr);
278
279		return iorom[state->io_addr];
	267	return iorom[m_io_addr];
280	268	}
281	269
282		static WRITE8_HANDLER( io_rom_addr_w )
	270	WRITE8_MEMBER( pc8401a_state::io_rom_addr_w )
283	271	{
284		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
285
286	272	switch (offset)
287	273	{
288	274	case 0: /* A17..A16 */
289		state->io_addr = ((data & 0x03) << 16) | (state->io_addr & 0xffff);
	275	m_io_addr = ((data & 0x03) << 16) | (m_io_addr & 0xffff);
290	276	break;
291	277
292	278	case 1: /* A15..A8 */
293		state->io_addr = (state->io_addr & 0x300ff) | (data << 8);
	279	m_io_addr = (m_io_addr & 0x300ff) | (data << 8);
294	280	break;
295	281
296	282	case 2: /* A7..A0 */
297		state->io_addr = (state->io_addr & 0x3ff00) | data;
	283	m_io_addr = (m_io_addr & 0x3ff00) | data;
298	284	break;
299	285
300	286	case 3:
r10991	r10992
303	289	}
304	290	}
305	291
306		static READ8_HANDLER( port70_r )
	292	READ8_MEMBER( pc8401a_state::port70_r )
307	293	{
308	294	/*
309	295
r10991	r10992
320	306
321	307	*/
322	308
323		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
324
325		return 0x10 | state->key_strobe;
	309	return 0x10 | m_key_strobe;
326	310	}
327	311
328		static READ8_HANDLER( port71_r )
	312	READ8_MEMBER( pc8401a_state::port71_r )
329	313	{
330		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
331		return state->key_latch;
	314	return m_key_latch;
332	315	}
333	316
334		static WRITE8_HANDLER( port70_w )
	317	WRITE8_MEMBER( pc8401a_state::port70_w )
335	318	{
336		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
337
338		state->key_strobe = 0;
	319	m_key_strobe = 0;
339	320	}
340	321
341		static WRITE8_HANDLER( port71_w )
	322	WRITE8_MEMBER( pc8401a_state::port71_w )
342	323	{
343		pc8401a_state *state = space->machine().driver_data<pc8401a_state>();
344		cputag_set_input_line(space->machine(), Z80_TAG, INPUT_LINE_IRQ0, CLEAR_LINE);
345		state->key_latch = data;
	324	m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
	325
	326	m_key_latch = data;
346	327	}
347	328
348	329	/* Memory Maps */
349	330
350		static ADDRESS_MAP_START( pc8401a_mem, AS_PROGRAM, 8 )
	331	static ADDRESS_MAP_START( pc8401a_mem, AS_PROGRAM, 8, pc8401a_state )
351	332	ADDRESS_MAP_UNMAP_HIGH
352	333	AM_RANGE(0x0000, 0x7fff) AM_RAMBANK("bank1")
353	334	AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank3")
r10991	r10992
355	336	AM_RANGE(0xe800, 0xffff) AM_RAMBANK("bank5")
356	337	ADDRESS_MAP_END
357	338
358		static ADDRESS_MAP_START( pc8401a_io, AS_IO, 8 )
	339	static ADDRESS_MAP_START( pc8401a_io, AS_IO, 8, pc8401a_state )
359	340	ADDRESS_MAP_UNMAP_HIGH
360	341	ADDRESS_MAP_GLOBAL_MASK(0xff)
361	342	ADDRESS_MAP_END
362	343
363		static ADDRESS_MAP_START( pc8500_io, AS_IO, 8 )
	344	static ADDRESS_MAP_START( pc8500_io, AS_IO, 8, pc8401a_state )
364	345	ADDRESS_MAP_UNMAP_HIGH
365	346	ADDRESS_MAP_GLOBAL_MASK(0xff)
366	347	AM_RANGE(0x00, 0x00) AM_READ_PORT("KEY0")
r10991	r10992
374	355	AM_RANGE(0x08, 0x08) AM_READ_PORT("KEY8")
375	356	AM_RANGE(0x09, 0x09) AM_READ_PORT("KEY9")
376	357	AM_RANGE(0x10, 0x10) AM_WRITE(rtc_cmd_w)
377		AM_RANGE(0x20, 0x20) AM_DEVREADWRITE(MSM8251_TAG, msm8251_data_r, msm8251_data_w)
378		AM_RANGE(0x21, 0x21) AM_DEVREADWRITE(MSM8251_TAG, msm8251_status_r, msm8251_control_w)
	358	AM_RANGE(0x20, 0x20) AM_DEVREADWRITE_LEGACY(MSM8251_TAG, msm8251_data_r, msm8251_data_w)
	359	AM_RANGE(0x21, 0x21) AM_DEVREADWRITE_LEGACY(MSM8251_TAG, msm8251_status_r, msm8251_control_w)
379	360	AM_RANGE(0x30, 0x30) AM_READWRITE(mmr_r, mmr_w)
380	361	//  AM_RANGE(0x31, 0x31)
381	362	AM_RANGE(0x40, 0x40) AM_READWRITE(rtc_r, rtc_ctrl_w)
382	363	//  AM_RANGE(0x41, 0x41)
383	364	//  AM_RANGE(0x50, 0x51)
384		AM_RANGE(0x60, 0x60) AM_DEVREADWRITE(SED1330_TAG, sed1330_status_r, sed1330_data_w)
385		AM_RANGE(0x61, 0x61) AM_DEVREADWRITE(SED1330_TAG, sed1330_data_r, sed1330_command_w)
	365	AM_RANGE(0x60, 0x60) AM_DEVREADWRITE_LEGACY(SED1330_TAG, sed1330_status_r, sed1330_data_w)
	366	AM_RANGE(0x61, 0x61) AM_DEVREADWRITE_LEGACY(SED1330_TAG, sed1330_data_r, sed1330_command_w)
386	367	AM_RANGE(0x70, 0x70) AM_READWRITE(port70_r, port70_w)
387	368	AM_RANGE(0x71, 0x71) AM_READWRITE(port71_r, port71_w)
388	369	//  AM_RANGE(0x80, 0x80) modem status, set to 0xff to boot
389	370	//  AM_RANGE(0x8b, 0x8b)
390	371	//  AM_RANGE(0x90, 0x93)
391	372	//  AM_RANGE(0xa0, 0xa1)
392		AM_RANGE(0x98, 0x98) AM_DEVWRITE(MC6845_TAG, mc6845_address_w)
393		AM_RANGE(0x99, 0x99) AM_DEVREADWRITE(MC6845_TAG, mc6845_register_r, mc6845_register_w)
	373	AM_RANGE(0x98, 0x98) AM_DEVWRITE_LEGACY(MC6845_TAG, mc6845_address_w)
	374	AM_RANGE(0x99, 0x99) AM_DEVREADWRITE_LEGACY(MC6845_TAG, mc6845_register_r, mc6845_register_w)
394	375	AM_RANGE(0xb0, 0xb3) AM_WRITE(io_rom_addr_w)
395	376	AM_RANGE(0xb3, 0xb3) AM_READ(io_rom_data_r)
396	377	//  AM_RANGE(0xc8, 0xc8)
397		AM_RANGE(0xfc, 0xff) AM_DEVREADWRITE(I8255A_TAG, i8255a_r, i8255a_w)
	378	AM_RANGE(0xfc, 0xff) AM_DEVREADWRITE_LEGACY(I8255A_TAG, i8255a_r, i8255a_w)
398	379	ADDRESS_MAP_END
399	380
400	381	/* Input Ports */
r10991	r10992
503	484
504	485	/* Machine Initialization */
505	486
506		static MACHINE_START( pc8401a )
	487	void pc8401a_state::machine_start()
507	488	{
508		pc8401a_state *state = machine.driver_data<pc8401a_state>();
509
510	489	/* initialize RTC */
511		state->m_rtc->cs_w(1);
	490	m_rtc->cs_w(1);
512	491
513	492	/* allocate CRT video RAM */
514		state->crt_ram = auto_alloc_array(machine, UINT8, PC8401A_CRT_VIDEORAM_SIZE);
	493	m_crt_ram = auto_alloc_array(m_machine, UINT8, PC8401A_CRT_VIDEORAM_SIZE);
515	494
	495	UINT8 *ram = ram_get_ptr(m_ram);
	496
516	497	/* set up A0/A1 memory banking */
517		memory_configure_bank(machine, "bank1", 0, 4, machine.region(Z80_TAG)->base(), 0x8000);
518		memory_configure_bank(machine, "bank1", 4, 2, ram_get_ptr(machine.device(RAM_TAG)), 0x8000);
519		memory_set_bank(machine, "bank1", 0);
	498	memory_configure_bank(m_machine, "bank1", 0, 4, m_machine.region(Z80_TAG)->base(), 0x8000);
	499	memory_configure_bank(m_machine, "bank1", 4, 2, ram, 0x8000);
	500	memory_set_bank(m_machine, "bank1", 0);
520	501
521	502	/* set up A2 memory banking */
522		memory_configure_bank(machine, "bank3", 0, 5, ram_get_ptr(machine.device(RAM_TAG)), 0x4000);
523		memory_set_bank(machine, "bank3", 0);
	503	memory_configure_bank(m_machine, "bank3", 0, 5, ram, 0x4000);
	504	memory_set_bank(m_machine, "bank3", 0);
524	505
525	506	/* set up A3 memory banking */
526		memory_configure_bank(machine, "bank4", 0, 1, ram_get_ptr(machine.device(RAM_TAG)) + 0xc000, 0);
527		memory_configure_bank(machine, "bank4", 1, 1, state->crt_ram, 0);
528		memory_set_bank(machine, "bank4", 0);
	507	memory_configure_bank(m_machine, "bank4", 0, 1, ram + 0xc000, 0);
	508	memory_configure_bank(m_machine, "bank4", 1, 1, m_crt_ram, 0);
	509	memory_set_bank(m_machine, "bank4", 0);
529	510
530	511	/* set up A4 memory banking */
531		memory_configure_bank(machine, "bank5", 0, 1, ram_get_ptr(machine.device(RAM_TAG)) + 0xe800, 0);
532		memory_set_bank(machine, "bank5", 0);
	512	memory_configure_bank(m_machine, "bank5", 0, 1, ram + 0xe800, 0);
	513	memory_set_bank(m_machine, "bank5", 0);
533	514
534	515	/* bank switch */
535		pc8401a_bankswitch(machine, 0);
	516	bankswitch(0);
536	517
537	518	/* register for state saving */
538		state->save_pointer(NAME(state->crt_ram), PC8401A_CRT_VIDEORAM_SIZE);
539		state->save_item(NAME(state->rtc_data));
540		state->save_item(NAME(state->rtc_tp));
541		state->save_item(NAME(state->mmr));
542		state->save_item(NAME(state->io_addr));
	519	save_pointer(NAME(m_crt_ram), PC8401A_CRT_VIDEORAM_SIZE);
	520	save_item(NAME(m_mmr));
	521	save_item(NAME(m_io_addr));
543	522	}
544	523
545		static READ8_DEVICE_HANDLER( pc8401a_8255_c_r )
	524	READ8_MEMBER( pc8401a_state::ppi_pc_r )
546	525	{
547	526	/*
548	527
r10991	r10992
562	541	return 0;
563	542	}
564	543
565		static WRITE8_DEVICE_HANDLER( pc8401a_8255_c_w )
	544	WRITE8_MEMBER( pc8401a_state::ppi_pc_w )
566	545	{
567	546	/*
568	547
r10991	r10992
580	559	*/
581	560	}
582	561
583		static I8255A_INTERFACE( pc8401a_8255_interface )
	562	static I8255A_INTERFACE( ppi_intf )
584	563	{
585	564	DEVCB_NULL,
586	565	DEVCB_NULL,
587		DEVCB_HANDLER(pc8401a_8255_c_r),
	566	DEVCB_DRIVER_MEMBER(pc8401a_state, ppi_pc_r),
588	567	DEVCB_NULL,
589	568	DEVCB_NULL,
590		DEVCB_HANDLER(pc8401a_8255_c_w),
	569	DEVCB_DRIVER_MEMBER(pc8401a_state, ppi_pc_w),
591	570	};
592	571
593	572	/* uPD1990A Interface */
594	573
595		static WRITE_LINE_DEVICE_HANDLER( pc8401a_upd1990a_data_w )
	574	static UPD1990A_INTERFACE( rtc_intf )
596	575	{
597		pc8401a_state *driver_state = device->machine().driver_data<pc8401a_state>();
598
599		driver_state->rtc_data = state;
600		}
601
602		static WRITE_LINE_DEVICE_HANDLER( pc8401a_upd1990a_tp_w )
603		{
604		pc8401a_state *driver_state = device->machine().driver_data<pc8401a_state>();
605
606		driver_state->rtc_tp = state;
607		}
608
609		static UPD1990A_INTERFACE( pc8401a_upd1990a_intf )
610		{
611		DEVCB_LINE(pc8401a_upd1990a_data_w),
612		DEVCB_LINE(pc8401a_upd1990a_tp_w)
	576	DEVCB_NULL,
	577	DEVCB_NULL
613	578	};
614	579
615	580	/* MSM8251 Interface */
616	581
617		static const msm8251_interface pc8401a_msm8251_interface =
	582	static const msm8251_interface uart_intf =
618	583	{
619	584	DEVCB_NULL,
620	585	DEVCB_NULL,
r10991	r10992
629	594
630	595	/* Machine Drivers */
631	596
632		static MACHINE_CONFIG_START( common, pc8401a_state )
633
	597	static MACHINE_CONFIG_START( pc8401a, pc8401a_state )
634	598	/* basic machine hardware */
635	599	MCFG_CPU_ADD(Z80_TAG, Z80, 4000000) // NEC uPD70008C
636	600	MCFG_CPU_PROGRAM_MAP(pc8401a_mem)
637	601	MCFG_CPU_IO_MAP(pc8401a_io)
638	602
639		MCFG_MACHINE_START(pc8401a)
640
641	603	/* fake keyboard */
642	604	MCFG_TIMER_ADD_PERIODIC("keyboard", pc8401a_keyboard_tick, attotime::from_hz(64))
643	605
644	606	/* devices */
645		MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, pc8401a_upd1990a_intf)
646		MCFG_I8255A_ADD(I8255A_TAG, pc8401a_8255_interface)
647		MCFG_MSM8251_ADD(MSM8251_TAG, pc8401a_msm8251_interface)
	607	MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, rtc_intf)
	608	MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
	609	MCFG_MSM8251_ADD(MSM8251_TAG, uart_intf)
648	610
	611	/* video hardware */
	612	MCFG_FRAGMENT_ADD(pc8401a_video)
	613
649	614	/* option ROM cartridge */
650	615	MCFG_CARTSLOT_ADD("cart")
651	616	MCFG_CARTSLOT_EXTENSION_LIST("rom,bin")
r10991	r10992
662	627	MCFG_RAM_EXTRA_OPTIONS("96K")
663	628	MACHINE_CONFIG_END
664	629
665		static MACHINE_CONFIG_DERIVED( pc8401a, common )
666
667		/* video hardware */
668		MCFG_FRAGMENT_ADD(pc8401a_video)
669		MACHINE_CONFIG_END
670
671		static MACHINE_CONFIG_DERIVED( pc8500, common )
672
	630	static MACHINE_CONFIG_START( pc8500, pc8500_state )
673	631	/* basic machine hardware */
674		MCFG_CPU_MODIFY(Z80_TAG)
	632	MCFG_CPU_ADD(Z80_TAG, Z80, 4000000) // NEC uPD70008C
	633	MCFG_CPU_PROGRAM_MAP(pc8401a_mem)
675	634	MCFG_CPU_IO_MAP(pc8500_io)
676	635
	636	/* fake keyboard */
	637	MCFG_TIMER_ADD_PERIODIC("keyboard", pc8401a_keyboard_tick, attotime::from_hz(64))
	638
	639	/* devices */
	640	MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, rtc_intf)
	641	MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
	642	MCFG_MSM8251_ADD(MSM8251_TAG, uart_intf)
	643
677	644	/* video hardware */
678	645	MCFG_FRAGMENT_ADD(pc8500_video)
	646
	647	/* option ROM cartridge */
	648	MCFG_CARTSLOT_ADD("cart")
	649	MCFG_CARTSLOT_EXTENSION_LIST("rom,bin")
	650	MCFG_CARTSLOT_NOT_MANDATORY
679	651
	652	/* I/O ROM cartridge */
	653	MCFG_CARTSLOT_ADD("iocart")
	654	MCFG_CARTSLOT_EXTENSION_LIST("rom,bin")
	655	MCFG_CARTSLOT_NOT_MANDATORY
	656
680	657	/* internal ram */
681		MCFG_RAM_MODIFY(RAM_TAG)
	658	MCFG_RAM_ADD(RAM_TAG)
682	659	MCFG_RAM_DEFAULT_SIZE("64K")
	660	MCFG_RAM_EXTRA_OPTIONS("96K")
683	661	MACHINE_CONFIG_END
684	662
685	663	/* ROMs */

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