src/mess/drivers/pc9801.c
| r10750 | r10751 | |
|---|
| 33 | 33 | #include "sound/2203intf.h" |
| 34 | 34 | #include "video/upd7220.h" |
| 35 | 35 | #include "imagedev/flopdrv.h" |
| 36 | #include "machine/ram.h" |
| 36 | 37 | |
| 37 | 38 | class pc9801_state : public driver_device |
| 38 | 39 | { |
| r10750 | r10751 | |
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| 79 | 80 | UINT8 por; //Power-On Reset |
| 80 | 81 | UINT8 rom_bank; |
| 81 | 82 | UINT8 fdc_ctrl; |
| 83 | UINT32 ram_size; |
| 82 | 84 | }; |
| 83 | 85 | |
| 84 | 86 | |
| r10750 | r10751 | |
|---|
| 862 | 864 | WRAM[offset] = data; |
| 863 | 865 | } |
| 864 | 866 | |
| 867 | static READ8_HANDLER( pc9801rs_ex_wram_r ) |
| 868 | { |
| 869 | UINT8 *EX_WRAM = space->machine->region("ex_wram")->base(); |
| 870 | |
| 871 | return EX_WRAM[offset]; |
| 872 | } |
| 873 | |
| 874 | static WRITE8_HANDLER( pc9801rs_ex_wram_w ) |
| 875 | { |
| 876 | UINT8 *EX_WRAM = space->machine->region("ex_wram")->base(); |
| 877 | |
| 878 | EX_WRAM[offset] = data; |
| 879 | } |
| 880 | |
| 865 | 881 | static READ8_HANDLER( pc9801rs_ipl_r ) |
| 866 | 882 | { |
| 867 | 883 | pc9801_state *state = space->machine->driver_data<pc9801_state>(); |
| r10750 | r10751 | |
|---|
| 956 | 972 | return pc9801_30_r(space,offset); |
| 957 | 973 | } |
| 958 | 974 | |
| 975 | |
| 959 | 976 | static READ8_HANDLER( pc9801rs_memory_r ) |
| 960 | 977 | { |
| 961 | 978 | pc9801_state *state = space->machine->driver_data<pc9801_state>(); |
| r10750 | r10751 | |
|---|
| 963 | 980 | if(state->gate_a20 == 0) |
| 964 | 981 | offset &= 0xfffff; |
| 965 | 982 | |
| 966 | | if (offset >= 0x00000000 && offset <= 0x0009ffff) { return pc9801rs_wram_r(space,offset); } |
| 967 | | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { return pc9801_tvram_r(space,offset-0xa0000); } |
| 968 | | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { return pc9801rs_knjram_r(space,offset & 0xfff); } |
| 969 | | else if(offset >= 0x000a8000 && offset <= 0x000bffff) { return pc9801_gvram_r(space,offset-0xa8000); } |
| 970 | | else if(offset >= 0x000e0000 && offset <= 0x000fffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
| 971 | | else if(offset >= 0xfffe0000 && offset <= 0xffffffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
| 983 | if (offset >= 0x00000000 && offset <= 0x0009ffff) { return pc9801rs_wram_r(space,offset); } |
| 984 | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { return pc9801_tvram_r(space,offset-0xa0000); } |
| 985 | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { return pc9801rs_knjram_r(space,offset & 0xfff); } |
| 986 | else if(offset >= 0x000a8000 && offset <= 0x000bffff) { return pc9801_gvram_r(space,offset-0xa8000); } |
| 987 | else if(offset >= 0x000e0000 && offset <= 0x000fffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
| 988 | else if(offset >= 0x00100000 && offset <= 0x00100000+state->ram_size-1) { return pc9801rs_ex_wram_r(space,offset-0x00100000); } |
| 989 | else if(offset >= 0xfffe0000 && offset <= 0xffffffff) { return pc9801rs_ipl_r(space,offset & 0x1ffff); } |
| 972 | 990 | |
| 973 | 991 | //printf("%08x\n",offset); |
| 974 | 992 | return 0x00; |
| r10750 | r10751 | |
|---|
| 982 | 1000 | if(state->gate_a20 == 0) |
| 983 | 1001 | offset &= 0xfffff; |
| 984 | 1002 | |
| 985 | | if (offset >= 0x00000000 && offset <= 0x0009ffff) { pc9801rs_wram_w(space,offset,data); } |
| 986 | | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { pc9801_tvram_w(space,offset-0xa0000,data); } |
| 987 | | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { pc9801rs_knjram_w(space,offset & 0xfff,data); } |
| 988 | | else if(offset >= 0x000a8000 && offset <= 0x000bffff) { pc9801_gvram_w(space,offset-0xa8000,data); } |
| 1003 | if (offset >= 0x00000000 && offset <= 0x0009ffff) { pc9801rs_wram_w(space,offset,data); } |
| 1004 | else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { pc9801_tvram_w(space,offset-0xa0000,data); } |
| 1005 | else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { pc9801rs_knjram_w(space,offset & 0xfff,data); } |
| 1006 | else if(offset >= 0x000a8000 && offset <= 0x000bffff) { pc9801_gvram_w(space,offset-0xa8000,data); } |
| 1007 | else if(offset >= 0x00100000 && offset <= 0x00100000+state->ram_size-1) { pc9801rs_ex_wram_w(space,offset-0x00100000,data); } |
| 989 | 1008 | //else |
| 990 | 1009 | // printf("%08x %08x\n",offset,data); |
| 991 | 1010 | |
| r10750 | r10751 | |
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| 1808 | 1827 | state->por = 0xa0; |
| 1809 | 1828 | state->rom_bank = 0; |
| 1810 | 1829 | state->fdc_ctrl = 3; |
| 1830 | |
| 1831 | state->ram_size = ram_get_size(machine->device(RAM_TAG)) - 0xa0000; |
| 1832 | |
| 1833 | printf("%08x\n",state->ram_size); |
| 1811 | 1834 | } |
| 1812 | 1835 | |
| 1813 | 1836 | static INTERRUPT_GEN(pc9801_vrtc_irq) |
| r10750 | r10751 | |
|---|
| 1901 | 1924 | //"upd765_2dd" |
| 1902 | 1925 | MCFG_FLOPPY_4_DRIVES_ADD(pc9801_floppy_config) |
| 1903 | 1926 | |
| 1927 | MCFG_RAM_ADD(RAM_TAG) |
| 1928 | MCFG_RAM_DEFAULT_SIZE("640K") |
| 1929 | MCFG_RAM_EXTRA_OPTIONS("1664K,3712K,7808K") |
| 1930 | |
| 1904 | 1931 | MCFG_SCREEN_ADD("screen", RASTER) |
| 1905 | 1932 | MCFG_SCREEN_REFRESH_RATE(60) |
| 1906 | 1933 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ |
| r10750 | r10751 | |
|---|
| 1962 | 1989 | ROM_LOAD( "itf.rom", 0x18000, 0x08000, CRC(c1815325) SHA1(a2fb11c000ed7c976520622cfb7940ed6ddc904e) ) |
| 1963 | 1990 | ROM_LOAD( "bios.rom", 0x28000, 0x18000, BAD_DUMP CRC(315d2703) SHA1(4f208d1dbb68373080d23bff5636bb6b71eb7565) ) |
| 1964 | 1991 | |
| 1965 | | ROM_REGION( 0xa0000, "wram", ROMREGION_ERASE00 ) |
| 1992 | ROM_REGION( 0x0a0000, "wram", ROMREGION_ERASE00 ) |
| 1966 | 1993 | |
| 1994 | ROM_REGION( 0x700000, "ex_wram", ROMREGION_ERASE00 ) |
| 1995 | |
| 1967 | 1996 | //ROM_REGION( 0x1000, "kanji", ROMREGION_ERASE00 ) |
| 1968 | 1997 | |
| 1969 | 1998 | /* where shall we load this? */ |