Previous

15994 Revisions

Next

r10106 Wednesday 19th January, 2011 at 16:35:18 UTC by Angelo Salese
[PC-8801]: Rewritten bankswitch model from scratch, fixed a bug with Tobira wo Akete

[src/mess/drivers]

pc8801.c

src/mess/drivers/pc8801.c

r10105	r10106
36	36	- Bokosuka Wars: doesn't boot, floppy issue;
37	37	- Bouken Roman: doesn't boot, floppy issue;
38	38	- Bruce Lee: doesn't boot, floppy issue;
39		- Bu U Ma: sets gfx compatibility mode (attr bit 4,N-BASIC), dunno how to draw with it ...;
	39	- Bu U Ma: sets gfx compatibility mode on title screen (attr bit 4,N-BASIC), dunno how to draw with it ...;
40	40	- Grobda: palette is ugly;
41		- Wanderers from Ys: floppy / irq issues?
	41	- Wanderers from Ys: user data looks screwed? It loads with everything as maximum as per now ...
42	42	- Xevious: game is too fast
43	43
44	44	Notes:
r10105	r10106
136	136	#include "sound/beep.h"
137	137	//#include "includes/pc8801.h"
138	138
139		static UINT32 bankr[5],bankw[5];
140	139	static UINT8 i8255_0_pc,i8255_1_pc;
141	140	static UINT8 fdc_irq_opcode;
142	141	static UINT8 ext_rom_bank,gfx_ctrl,vram_sel,misc_ctrl,device_ctrl_data;
r10105	r10106
145	144	static UINT8 layer_mask;
146	145	static UINT8 i8214_irq_level,i8214_irq_state;
147	146	static UINT16 dma_counter[4],dma_address[4];
	147	static UINT8 alu_reg[3];
148	148	static UINT8 dmac_mode;
149	149	static UINT8 alu_ctrl1,alu_ctrl2;
150	150	static UINT8 extram_mode,extram_bank;
r10105	r10106
199	199	UINT8 param[8][5];
200	200	}crtc;
201	201
202		#define NBASIC_BASE 0x80000
203		#define N88BASIC_BASE 0x88000
204		#define WRAM_BASE 0x00000
205		#define GRAM_BASE 0xc0000
206		#define ALU_BASE 0xa0000
207
208	202	static VIDEO_START( pc8801 )
209	203	{
210	204
r10105	r10106
214	208	{
215	209	int x,y,xi;
216	210	UINT32 count;
217		UINT8 *gvram = machine->region("maincpu")->base() + GRAM_BASE;
	211	UINT8 *gvram = machine->region("gvram")->base();
218	212
219	213	count = 0;
220	214
r10105	r10106
244	238	{
245	239	int x,y,xi;
246	240	UINT32 count;
247		UINT8 *gvram = machine->region("maincpu")->base() + GRAM_BASE;
	241	UINT8 *gvram = machine->region("gvram")->base();
248	242
249	243	count = 0;
250	244
r10105	r10106
320	314
321	315	static UINT8 extract_text_attribute(running_machine *machine,UINT32 address,int x)
322	316	{
323		UINT8 *vram = machine->region("maincpu")->base() + WRAM_BASE;
	317	UINT8 *vram = machine->region("wram")->base();
324	318	int i;
325	319	int fifo_size;
326	320
r10105	r10106
350	344	{
351	345	int x,y;
352	346	int xi,yi;
353		UINT8 *vram = machine->region("maincpu")->base() + WRAM_BASE;
	347	UINT8 *vram = machine->region("wram")->base();
354	348	UINT8 is_cursor;
355	349	UINT8 y_height;
356	350	UINT8 attr;
357		UINT8 reverse = 0;
	351	UINT8 reverse;
358	352	UINT8 pal;
359	353	UINT8 gfx_mode;
360	354
r10105	r10106
370	364	{
371	365	pal = (attr & 0xe0) >> 5;
372	366	gfx_mode = (attr & 0x10) >> 4;
	367	reverse = 0;
373	368	}
374	369	else
375	370	{
r10105	r10106
416	411	{
417	412	int x,y;
418	413	int xi,yi;
419		UINT8 *vram = machine->region("maincpu")->base() + WRAM_BASE;
	414	UINT8 *vram = machine->region("wram")->base();
420	415	UINT8 is_cursor;
421	416	UINT8 y_height;
422	417	UINT8 attr;
r10105	r10106
435	430	attr = extract_text_attribute(machine,(((y*120)+80+dma_address[2]) & 0xffff),(x));
436	431
437	432	if(text_color_flag)
	433	{
438	434	pal = (attr & 0xe0) >> 5;
	435	reverse = 0;
	436	}
439	437	else
	438	{
440	439	pal = 7;
	440	reverse = attr & 4;
	441	}
441	442
442	443	pal|=8; //text pal bank
443	444
444		reverse = attr & 4;
445	445
446	446	for(yi=0;yi<8;yi++)
447	447	{
r10105	r10106
508	508	return 0;
509	509	}
510	510
511		static READ8_HANDLER( pc8801_mem_0_r )
	511	static READ8_HANDLER( pc8801_alu_r )
512	512	{
513		UINT8 *ram = space->machine->region("maincpu")->base();
514
515		return ram[offset + bankr[0]];
516		}
517
518		static WRITE8_HANDLER( pc8801_mem_0_w )
519		{
520		UINT8 *ram = space->machine->region("maincpu")->base();
521
522		ram[offset + bankw[0]] = data;
523		}
524
525		static READ8_HANDLER( pc8801_mem_1_r )
526		{
527		UINT8 *ram = space->machine->region("maincpu")->base();
528
529		return ram[offset + bankr[1]];
530		}
531
532		static WRITE8_HANDLER( pc8801_mem_1_w )
533		{
534		UINT8 *ram = space->machine->region("maincpu")->base();
535
536		ram[offset + bankw[1]] = data;
537		}
538
539		static READ8_HANDLER( pc8801_mem_2_r )
540		{
541		UINT8 *ram = space->machine->region("maincpu")->base();
542
543		offset &= 0x3ff;
544
545		return ram[offset + bankr[2]];
546		}
547
548		static WRITE8_HANDLER( pc8801_mem_2_w )
549		{
550		UINT8 *ram = space->machine->region("maincpu")->base();
551
552		offset &= 0x3ff;
553
554		ram[offset + bankw[2]] = data;
555		}
556
557		static UINT8 alu_r(running_machine *machine, UINT16 ram_addr)
558		{
559	513	int i;
560		UINT8 *gvram = machine->region("maincpu")->base();
	514	UINT8 *gvram = space->machine->region("gvram")->base();
561	515	UINT8 b,r,g;
562	516
563	517	/* store data to ALU regs */
564	518	for(i=0;i<3;i++)
565		{
566		gvram[ALU_BASE + i] = gvram[GRAM_BASE + i*0x4000 + ram_addr];
567		}
	519	alu_reg[i] = gvram[i*0x4000 + offset];
568	520
569		b = gvram[GRAM_BASE + ram_addr + 0x0000];
570		r = gvram[GRAM_BASE + ram_addr + 0x4000];
571		g = gvram[GRAM_BASE + ram_addr + 0x8000];
	521	b = gvram[offset + 0x0000];
	522	r = gvram[offset + 0x4000];
	523	g = gvram[offset + 0x8000];
572	524	if(!(alu_ctrl2 & 1)) { b^=0xff; }
573	525	if(!(alu_ctrl2 & 2)) { r^=0xff; }
574	526	if(!(alu_ctrl2 & 4)) { g^=0xff; }
r10105	r10106
576	528	return b & r & g;
577	529	}
578	530
579		static void alu_w(running_machine *machine, UINT16 ram_addr,UINT8 data)
	531	static WRITE8_HANDLER( pc8801_alu_w )
580	532	{
581	533	int i;
582		UINT8 *gvram = machine->region("maincpu")->base();
	534	UINT8 *gvram = space->machine->region("gvram")->base();
583	535
584	536	switch(alu_ctrl2 & 0x30) // alu write mode
585	537	{
r10105	r10106
593	545
594	546	switch(logic_op)
595	547	{
596		case 0x00: { gvram[GRAM_BASE + i*0x4000 + ram_addr] &= ~data; } break;
597		case 0x01: { gvram[GRAM_BASE + i*0x4000 + ram_addr] |= data; } break;
598		case 0x10: { gvram[GRAM_BASE + i*0x4000 + ram_addr] ^= data; } break;
	548	case 0x00: { gvram[i*0x4000 + offset] &= ~data; } break;
	549	case 0x01: { gvram[i*0x4000 + offset] |= data; } break;
	550	case 0x10: { gvram[i*0x4000 + offset] ^= data; } break;
599	551	case 0x11: break; // NOP
600	552	}
601	553	}
r10105	r10106
605	557	case 0x10: // restore data from ALU regs
606	558	{
607	559	for(i=0;i<3;i++)
608		gvram[GRAM_BASE + i*0x4000 + ram_addr] = gvram[ALU_BASE + i];
	560	gvram[i*0x4000 + offset] = alu_reg[i];
609	561	}
610	562	break;
611	563
612	564	case 0x20: // swap ALU reg 1 into R GVRAM
613		gvram[GRAM_BASE + 0x0000 + ram_addr] = gvram[ALU_BASE + 1];
	565	gvram[0x0000 + offset] = alu_reg[1];
614	566	break;
615	567
616	568	case 0x30: // swap ALU reg 0 into B GVRAM
617		gvram[GRAM_BASE + 0x4000 + ram_addr] = gvram[ALU_BASE + 0];
	569	gvram[0x4000 + offset] = alu_reg[0];
618	570	break;
619	571	}
620	572	}
621	573
622		static READ8_HANDLER( pc8801_mem_3_r )
	574
	575	static READ8_HANDLER( pc8801_wram_r )
623	576	{
624		UINT8 *ram = space->machine->region("maincpu")->base();
	577	UINT8 *work_ram = space->machine->region("wram")->base();
625	578
626		if(bankr[3] == 0xa0000)
627		return alu_r(space->machine,(offset + bankr[3]) & 0x3fff);
628
629		return ram[offset + bankr[3]];
	579	return work_ram[offset];
630	580	}
631	581
632		static WRITE8_HANDLER( pc8801_mem_3_w )
	582	static WRITE8_HANDLER( pc8801_wram_w )
633	583	{
634		UINT8 *ram = space->machine->region("maincpu")->base();
	584	UINT8 *work_ram = space->machine->region("wram")->base();
635	585
636		if(bankw[3] == 0xa0000)
637		alu_w(space->machine,(offset + bankw[3]) & 0x3fff,data);
638		else
639		ram[offset + bankw[3]] = data;
	586	work_ram[offset] = data;
640	587	}
641	588
642		static READ8_HANDLER( pc8801_mem_4_r )
	589	static READ8_HANDLER( pc8801_ext_wram_r )
643	590	{
644		UINT8 *ram = space->machine->region("maincpu")->base();
	591	UINT8 *ext_work_ram = space->machine->region("ewram")->base();
645	592
646		if(bankr[4] == 0xa3000)
647		return alu_r(space->machine,(offset + bankr[4]) & 0x3fff);
	593	/* TODO: check max range here */
648	594
649		return ram[offset + bankr[4]];
	595	return ext_work_ram[offset];
650	596	}
651	597
652		static WRITE8_HANDLER( pc8801_mem_4_w )
	598	static WRITE8_HANDLER( pc8801_ext_wram_w )
653	599	{
654		UINT8 *ram = space->machine->region("maincpu")->base();
	600	UINT8 *ext_work_ram = space->machine->region("ewram")->base();
655	601
656		if(bankw[4] == 0xa3000)
657		alu_w(space->machine,(offset + bankw[4]) & 0x3fff,data);
658		else
659		ram[offset + bankw[4]] = data;
	602	/* TODO: check max range here */
	603
	604	ext_work_ram[offset] = data;
660	605	}
661	606
662		static UINT32 pc8801_bankswitch_0_r(running_machine *machine)
	607	static READ8_HANDLER( pc8801_nbasic_rom_r )
663	608	{
664		if(extram_mode & 1) // access R EXT RAM
665		return WRAM_BASE + 0x20000 + extram_bank * 0x8000;
	609	UINT8 *n80_rom = space->machine->region("n80rom")->base();
666	610
667		if(gfx_ctrl & 0x2) //wram read select
668		return WRAM_BASE;
669
670		if(gfx_ctrl & 0x4) //n basic select
671		return NBASIC_BASE;
672
673		return N88BASIC_BASE;
	611	return n80_rom[offset];
674	612	}
675	613
676		static UINT32 pc8801_bankswitch_1_r(running_machine *machine)
	614	static READ8_HANDLER( pc8801_n88basic_rom_r )
677	615	{
678		if(extram_mode & 1) // access R EXT RAM
679		return WRAM_BASE + 0x20000 + 0x6000 + (extram_bank * 0x8000);
	616	UINT8 *n88_rom = space->machine->region("n88rom")->base();
680	617
681		if(gfx_ctrl & 0x2) //wram read select
682		return WRAM_BASE + 0x6000;
683
684		if(gfx_ctrl & 0x4) //n basic select
685		return NBASIC_BASE + 0x6000;
686
687		if(ext_rom_bank & 1) // NOT ext ROM bank
688		return N88BASIC_BASE + 0x6000;
689
690		return N88BASIC_BASE + 0x6000 + (0x2000 * ((misc_ctrl & 3)+1)); // ext ROM bank
	618	return n88_rom[offset];
691	619	}
692	620
693		static UINT32 pc8801_bankswitch_0_w(running_machine *machine)
	621	static READ8_HANDLER( pc8801_gvram_r )
694	622	{
695		if(extram_mode & 0x10) // access W EXT RAM
696		return WRAM_BASE + 0x20000 + (extram_bank * 0x8000);
	623	UINT8 *gvram = space->machine->region("gvram")->base();
697	624
698		return WRAM_BASE;
	625	return gvram[offset];
699	626	}
700	627
701		static UINT32 pc8801_bankswitch_1_w(running_machine *machine)
	628	static WRITE8_HANDLER( pc8801_gvram_w )
702	629	{
703		if(extram_mode & 0x10) // access W EXT RAM
704		return WRAM_BASE + 0x20000 + 0x6000 + (extram_bank * 0x8000);
	630	UINT8 *gvram = space->machine->region("gvram")->base();
705	631
706		return WRAM_BASE + 0x6000;
	632	gvram[offset] = data;
707	633	}
708	634
709		static UINT32 pc8801_bankswitch_2_r(running_machine *machine)
	635	static READ8_HANDLER( pc8801_high_wram_r )
710	636	{
711		if(gfx_ctrl & 6) //wram read select or n basic select banks this as normal wram
712		return WRAM_BASE + 0x8000;
	637	UINT8 *hi_work_ram = space->machine->region("hiwram")->base();
713	638
714		return WRAM_BASE + (window_offset_bank << 8);
	639	return hi_work_ram[offset];
715	640	}
716	641
717		static UINT32 pc8801_bankswitch_2_w(running_machine *machine)
	642	static WRITE8_HANDLER( pc8801_high_wram_w )
718	643	{
719		if(gfx_ctrl & 6) //wram read select or n basic select banks this as normal wram
720		return WRAM_BASE + 0x8000;
	644	UINT8 *hi_work_ram = space->machine->region("hiwram")->base();
721	645
722		return WRAM_BASE + (window_offset_bank << 8);
	646	hi_work_ram[offset] = data;
723	647	}
724	648
725		static UINT32 pc8801_bankswitch_3_r(running_machine *machine)
	649	static READ8_HANDLER( pc8801_mem_r )
726	650	{
727		if(misc_ctrl & 0x40)
	651	if(offset >= 0x0000 && offset <= 0x7fff)
728	652	{
729		vram_sel = 3;
730		if(alu_ctrl2 & 0x80)
731		return ALU_BASE;
732		}
	653	if(extram_mode & 1)
	654	return pc8801_ext_wram_r(space,offset | (extram_bank * 0x8000));
733	655
734		if(vram_sel == 3)
735		return WRAM_BASE + 0xc000;
	656	if(gfx_ctrl & 2)
	657	return pc8801_wram_r(space,offset);
736	658
737		return GRAM_BASE + 0x4000 * vram_sel;
738		}
	659	if(gfx_ctrl & 4)
	660	return pc8801_nbasic_rom_r(space,offset);
739	661
740		static UINT32 pc8801_bankswitch_3_w(running_machine *machine)
741		{
742		if(misc_ctrl & 0x40)
743		{
744		vram_sel = 3;
745		if(alu_ctrl2 & 0x80)
746		return ALU_BASE;
	662	if(offset >= 0x6000 && offset <= 0x7fff && ((ext_rom_bank & 1) == 0))
	663	return pc8801_n88basic_rom_r(space,0x8000 + (offset & 0x1fff) + (0x2000 * (misc_ctrl & 3)));
	664
	665	return pc8801_n88basic_rom_r(space,offset);
747	666	}
	667	else if(offset >= 0x8000 && offset <= 0x83ff) // work RAM window
	668	{
	669	if(gfx_ctrl & 6) //wram read select or n basic select banks this as normal wram
	670	return pc8801_wram_r(space,offset);
748	671
749		if(vram_sel == 3)
750		return WRAM_BASE + 0xc000;
751
752		return GRAM_BASE + 0x4000 * vram_sel;
753		}
754
755		static UINT32 pc8801_bankswitch_4_r(running_machine *machine)
756		{
757		if(misc_ctrl & 0x40)
	672	return pc8801_wram_r(space,(offset & 0x3ff) + (window_offset_bank << 8));
	673	}
	674	else if(offset >= 0x8400 && offset <= 0xbfff)
758	675	{
759		vram_sel = 3;
760		if(alu_ctrl2 & 0x80)
761		return ALU_BASE + 0x3000;
	676	return pc8801_wram_r(space,offset);
762	677	}
763
764		if(vram_sel == 3)
	678	else if(offset >= 0xc000 && offset <= 0xffff)
765	679	{
766		if((misc_ctrl & 0x10) == 0) // high VRAM
767		return WRAM_BASE + 0xf000;
	680	if(misc_ctrl & 0x40)
	681	{
	682	vram_sel = 3;
	683	if(alu_ctrl2 & 0x80)
	684	return pc8801_alu_r(space,offset & 0x3fff);
	685	}
768	686
769		return WRAM_BASE + 0xf000 + 0x10000;
	687	if(vram_sel == 3)
	688	{
	689	if(offset >= 0xf000 && offset <= 0xffff && (misc_ctrl & 0x10))
	690	return pc8801_high_wram_r(space,offset & 0xfff);
	691
	692	return pc8801_wram_r(space,offset);
	693	}
	694
	695	return pc8801_gvram_r(space,(offset & 0x3fff) + (0x4000 * vram_sel));
770	696	}
771	697
772		return GRAM_BASE + 0x3000 + (0x4000 * vram_sel);
	698	return 0xff;
773	699	}
774	700
775		static UINT32 pc8801_bankswitch_4_w(running_machine *machine)
	701	static WRITE8_HANDLER( pc8801_mem_w )
776	702	{
777		if(misc_ctrl & 0x40)
	703	if(offset >= 0x0000 && offset <= 0x7fff)
778	704	{
779		vram_sel = 3;
780		if(alu_ctrl2 & 0x80)
781		return ALU_BASE + 0x3000;
782		}
	705	if(extram_mode & 0x10)
	706	pc8801_ext_wram_w(space,offset | (extram_bank * 0x8000),data);
	707	else
	708	pc8801_wram_w(space,offset,data);
783	709
784		if(vram_sel == 3)
	710	return;
	711	}
	712	else if(offset >= 0x8000 && offset <= 0x83ff)
785	713	{
786		if((misc_ctrl & 0x10) == 0) // high VRAM
787		return WRAM_BASE + 0xf000;
	714	if(gfx_ctrl & 6) //wram read select or n basic select banks this as normal wram
	715	pc8801_wram_w(space,offset,data);
	716	else
	717	pc8801_wram_w(space,(offset & 0x3ff) + (window_offset_bank << 8),data);
788	718
789		return WRAM_BASE + 0xf000 + 0x10000;
	719	return;
790	720	}
	721	else if(offset >= 0x8400 && offset <= 0xbfff)
	722	{
	723	pc8801_wram_w(space,offset,data);
	724	return;
	725	}
	726	else if(offset >= 0xc000 && offset <= 0xffff)
	727	{
	728	if(misc_ctrl & 0x40)
	729	{
	730	vram_sel = 3;
	731	if(alu_ctrl2 & 0x80)
	732	{
	733	pc8801_alu_w(space,offset & 0x3fff,data);
	734	return;
	735	}
	736	}
791	737
792		return GRAM_BASE + 0x3000 + (0x4000 * vram_sel);
793		}
	738	if(vram_sel == 3)
	739	{
	740	if(offset >= 0xf000 && offset <= 0xffff && (misc_ctrl & 0x10))
	741	{
	742	pc8801_high_wram_w(space,offset & 0xfff,data);
	743	return;
	744	}
794	745
	746	pc8801_wram_w(space,offset,data);
	747	return;
	748	}
795	749
	750	pc8801_gvram_w(space,(offset & 0x3fff) + (0x4000 * vram_sel),data);
	751	return;
	752	}
	753	}
	754
796	755	static ADDRESS_MAP_START( pc8801_mem, ADDRESS_SPACE_PROGRAM, 8 )
797		AM_RANGE(0x0000, 0x5fff) AM_READWRITE(pc8801_mem_0_r,pc8801_mem_0_w)
798		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(pc8801_mem_1_r,pc8801_mem_1_w)
799		AM_RANGE(0x8000, 0x83ff) AM_READWRITE(pc8801_mem_2_r,pc8801_mem_2_w)
800		AM_RANGE(0x8400, 0xbfff) AM_RAM
801		AM_RANGE(0xc000, 0xefff) AM_READWRITE(pc8801_mem_3_r,pc8801_mem_3_w)
802		AM_RANGE(0xf000, 0xffff) AM_READWRITE(pc8801_mem_4_r,pc8801_mem_4_w)
	756	AM_RANGE(0x0000, 0xffff) AM_READWRITE(pc8801_mem_r,pc8801_mem_w)
803	757	ADDRESS_MAP_END
804	758
805	759	static READ8_HANDLER( pc8801_ctrl_r )
r10105	r10106
853	807	static WRITE8_HANDLER( pc8801_ext_rom_bank_w )
854	808	{
855	809	ext_rom_bank = data;
856		bankr[0] = pc8801_bankswitch_0_r(space->machine);
857		bankr[1] = pc8801_bankswitch_1_r(space->machine);
858		bankw[0] = pc8801_bankswitch_0_w(space->machine);
859		bankw[1] = pc8801_bankswitch_1_w(space->machine);
860	810	}
861	811
862	812	static void pc8801_dynamic_res_change(running_machine *machine)
r10105	r10106
893	843	*/
894	844
895	845	gfx_ctrl = data;
896		bankr[0] = pc8801_bankswitch_0_r(space->machine);
897		bankr[1] = pc8801_bankswitch_1_r(space->machine);
898		bankw[0] = pc8801_bankswitch_0_w(space->machine);
899		bankw[1] = pc8801_bankswitch_1_w(space->machine);
900	846
901	847	pc8801_dynamic_res_change(space->machine);
902	848	}
r10105	r10106
909	855	static WRITE8_HANDLER( pc8801_vram_select_w )
910	856	{
911	857	vram_sel = offset & 3;
912		bankr[3] = pc8801_bankswitch_3_r(space->machine);
913		bankr[4] = pc8801_bankswitch_4_r(space->machine);
914		bankw[3] = pc8801_bankswitch_3_w(space->machine);
915		bankw[4] = pc8801_bankswitch_4_w(space->machine);
916	858	}
917	859
918	860	static WRITE8_HANDLER( pc8801_irq_level_w )
r10105	r10106
941	883	static WRITE8_HANDLER( pc8801_window_bank_w )
942	884	{
943	885	window_offset_bank = data;
944		bankr[2] = pc8801_bankswitch_2_r(space->machine);
945		bankw[2] = pc8801_bankswitch_2_w(space->machine);
946	886	}
947	887
948	888	static WRITE8_HANDLER( pc8801_window_bank_inc_w )
949	889	{
950	890	window_offset_bank++;
951	891	window_offset_bank&=0xff;
952		bankr[2] = pc8801_bankswitch_2_r(space->machine);
953		bankw[2] = pc8801_bankswitch_2_w(space->machine);
954	892	}
955	893
956	894	static READ8_HANDLER( pc8801_misc_ctrl_r )
r10105	r10106
962	900	{
963	901	misc_ctrl = data;
964	902
965		bankr[1] = pc8801_bankswitch_1_r(space->machine);
966		bankr[3] = pc8801_bankswitch_3_r(space->machine);
967		bankr[4] = pc8801_bankswitch_4_r(space->machine);
968		bankw[3] = pc8801_bankswitch_3_w(space->machine);
969		bankw[4] = pc8801_bankswitch_4_w(space->machine);
970
971	903	sound_irq_mask = ((data & 0x80) == 0);
972	904	}
973	905
r10105	r10106
1113	1045	*/
1114	1046
1115	1047	extram_mode = data & 0x11;
1116		bankr[0] = pc8801_bankswitch_0_r(space->machine);
1117		bankr[1] = pc8801_bankswitch_1_r(space->machine);
1118		bankw[0] = pc8801_bankswitch_0_w(space->machine);
1119		bankw[1] = pc8801_bankswitch_1_w(space->machine);
1120	1048	}
1121	1049
1122	1050	static READ8_HANDLER( pc8801_extram_bank_r )
r10105	r10106
1127	1055	static WRITE8_HANDLER( pc8801_extram_bank_w )
1128	1056	{
1129	1057	extram_bank = data;
1130		bankr[0] = pc8801_bankswitch_0_r(space->machine);
1131		bankr[1] = pc8801_bankswitch_1_r(space->machine);
1132		bankw[0] = pc8801_bankswitch_0_w(space->machine);
1133		bankw[1] = pc8801_bankswitch_1_w(space->machine);
1134	1058	}
1135	1059
1136	1060	static WRITE8_HANDLER( pc8801_alu_ctrl1_w )
1137	1061	{
1138	1062	alu_ctrl1 = data;
1139		bankr[3] = pc8801_bankswitch_3_r(space->machine);
1140		bankr[4] = pc8801_bankswitch_4_r(space->machine);
1141		bankw[3] = pc8801_bankswitch_3_w(space->machine);
1142		bankw[4] = pc8801_bankswitch_4_w(space->machine);
1143	1063	}
1144	1064
1145	1065	static WRITE8_HANDLER( pc8801_alu_ctrl2_w )
1146	1066	{
1147	1067	alu_ctrl2 = data;
1148		bankr[3] = pc8801_bankswitch_3_r(space->machine);
1149		bankr[4] = pc8801_bankswitch_4_r(space->machine);
1150		bankw[3] = pc8801_bankswitch_3_w(space->machine);
1151		bankw[4] = pc8801_bankswitch_4_w(space->machine);
1152	1068	}
1153	1069
1154	1070	static WRITE8_HANDLER( pc8801_pcg8100_w )
r10105	r10106
1705	1621	window_offset_bank = 0x80;
1706	1622	misc_ctrl = 0x80;
1707	1623	layer_mask = 0x00;
1708		bankr[0] = pc8801_bankswitch_0_r(machine);
1709		bankr[1] = pc8801_bankswitch_1_r(machine);
1710		bankw[0] = pc8801_bankswitch_0_w(machine);
1711		bankw[1] = pc8801_bankswitch_1_w(machine);
1712
1713		bankr[2] = pc8801_bankswitch_2_r(machine);
1714		bankw[2] = pc8801_bankswitch_2_w(machine);
1715
1716	1624	vram_sel = 3;
1717		bankr[3] = pc8801_bankswitch_3_r(machine);
1718		bankr[4] = pc8801_bankswitch_4_r(machine);
1719		bankw[3] = pc8801_bankswitch_3_w(machine);
1720		bankw[4] = pc8801_bankswitch_4_w(machine);
1721	1625
1722	1626	pc8801_dynamic_res_change(machine);
1723	1627
r10105	r10106
1726	1630	cpu_set_input_line_vector(machine->device("fdccpu"), 0, 0);
1727	1631
1728	1632	{
1729		UINT8 *gvram = machine->region("maincpu")->base();
1730	1633	int i;
1731	1634
1732		for(i=0;i<0x10000;i++)
1733		gvram[GRAM_BASE + i] = 0x00;
1734
1735	1635	for(i=0;i<3;i++)
1736		gvram[ALU_BASE + i] = 0x00;
	1636	alu_reg[i] = 0x00;
1737	1637	}
1738	1638
1739	1639	{
r10105	r10106
1846	1746	MACHINE_CONFIG_END
1847	1747
1848	1748	/* ROMs */
	1749	#define PC8801_MEM_LOAD \
	1750	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) \
	1751	ROM_REGION( 0x10000, "wram", ROMREGION_ERASEFF ) \
	1752	ROM_REGION( 0x1000, "hiwram", ROMREGION_ERASEFF ) \
	1753	ROM_REGION( 0x40000, "ewram", ROMREGION_ERASEFF ) \
	1754	ROM_REGION( 0xc000, "gvram", ROMREGION_ERASE00 )
1849	1755
	1756
1850	1757	ROM_START( pc8801 ) /* Basic version 1.0 */
1851		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASE00 )
1852		ROM_LOAD( "n80.rom",   0x80000, 0x8000, CRC(5cb8b584) SHA1(063609dd518c124a4fc9ba35d1bae35771666a34) )
1853		ROM_LOAD( "n88.rom",   0x88000, 0x8000, CRC(ffd68be0) SHA1(3518193b8207bdebf22c1380c2db8c554baff329) )
1854		ROM_LOAD( "n88_0.rom", 0x90000, 0x2000, CRC(61984bab) SHA1(d1ae642aed4f0584eeb81ff50180db694e5101d4) )
	1758	PC8801_MEM_LOAD
1855	1759
	1760	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1761	ROM_LOAD( "n80.rom",   0x0000, 0x8000, CRC(5cb8b584) SHA1(063609dd518c124a4fc9ba35d1bae35771666a34) )
	1762
	1763	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1764	ROM_LOAD( "n88.rom",   0x0000, 0x8000, CRC(ffd68be0) SHA1(3518193b8207bdebf22c1380c2db8c554baff329) )
	1765	ROM_LOAD( "n88_0.rom", 0x8000, 0x2000, CRC(61984bab) SHA1(d1ae642aed4f0584eeb81ff50180db694e5101d4) )
	1766
1856	1767	ROM_REGION( 0x10000, "fdccpu", 0)
1857	1768	ROM_LOAD( "disk.rom", 0x0000, 0x0800, CRC(2158d307) SHA1(bb7103a0818850a039c67ff666a31ce49a8d516f) )
1858	1769
r10105	r10106
1863	1774	/* The dump only included "maincpu". Other roms arbitrariely taken from PC-8801 & PC-8801 MkIISR (there should be
1864	1775	at least 1 Kanji ROM). */
1865	1776	ROM_START( pc8801mk2 ) /* Basic version 1.3 */
1866		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1867		ROM_LOAD( "m2_n80.rom",   0x80000, 0x8000, CRC(91d84b1a) SHA1(d8a1abb0df75936b3fc9d226ccdb664a9070ffb1) )
1868		ROM_LOAD( "m2_n88.rom",   0x88000, 0x8000, CRC(f35169eb) SHA1(ef1f067f819781d9fb2713836d195866f0f81501) )
1869		ROM_LOAD( "m2_n88_0.rom", 0x90000, 0x2000, CRC(5eb7a8d0) SHA1(95a70af83b0637a5a0f05e31fb0452bb2cb68055) )
	1777	PC8801_MEM_LOAD
1870	1778
	1779	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1780	ROM_LOAD( "m2_n80.rom",   0x0000, 0x8000, CRC(91d84b1a) SHA1(d8a1abb0df75936b3fc9d226ccdb664a9070ffb1) )
	1781
	1782	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1783	ROM_LOAD( "m2_n88.rom",   0x0000, 0x8000, CRC(f35169eb) SHA1(ef1f067f819781d9fb2713836d195866f0f81501) )
	1784	ROM_LOAD( "m2_n88_0.rom", 0x8000, 0x2000, CRC(5eb7a8d0) SHA1(95a70af83b0637a5a0f05e31fb0452bb2cb68055) )
	1785
1871	1786	ROM_REGION( 0x10000, "fdccpu", 0)
1872	1787	ROM_LOAD( "disk.rom", 0x0000, 0x0800, CRC(2158d307) SHA1(bb7103a0818850a039c67ff666a31ce49a8d516f) )
1873	1788
r10105	r10106
1877	1792	ROM_END
1878	1793
1879	1794	ROM_START( pc8801mk2sr )
1880		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1881		ROM_LOAD( "mk2sr_n80.rom",   0x80000, 0x8000, CRC(27e1857d) SHA1(5b922ed9de07d2a729bdf1da7b57c50ddf08809a) )
1882		ROM_LOAD( "mk2sr_n88.rom",   0x88000, 0x8000, CRC(a0fc0473) SHA1(3b31fc68fa7f47b21c1a1cb027b86b9e87afbfff) )
1883		ROM_LOAD( "mk2sr_n88_0.rom", 0x90000, 0x2000, CRC(710a63ec) SHA1(d239c26ad7ac5efac6e947b0e9549b1534aa970d) )
1884		ROM_LOAD( "n88_1.rom", 0x92000, 0x2000, CRC(c0bd2aa6) SHA1(8528eef7946edf6501a6ccb1f416b60c64efac7c) )
1885		ROM_LOAD( "n88_2.rom", 0x94000, 0x2000, CRC(af2b6efa) SHA1(b7c8bcea219b77d9cc3ee0efafe343cc307425d1) )
1886		ROM_LOAD( "n88_3.rom", 0x96000, 0x2000, CRC(7713c519) SHA1(efce0b51cab9f0da6cf68507757f1245a2867a72) )
	1795	PC8801_MEM_LOAD
1887	1796
	1797	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1798	ROM_LOAD( "mk2sr_n80.rom",   0x0000, 0x8000, CRC(27e1857d) SHA1(5b922ed9de07d2a729bdf1da7b57c50ddf08809a) )
	1799
	1800	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1801	ROM_LOAD( "mk2sr_n88.rom",   0x0000, 0x8000, CRC(a0fc0473) SHA1(3b31fc68fa7f47b21c1a1cb027b86b9e87afbfff) )
	1802	ROM_LOAD( "mk2sr_n88_0.rom", 0x8000, 0x2000, CRC(710a63ec) SHA1(d239c26ad7ac5efac6e947b0e9549b1534aa970d) )
	1803	ROM_LOAD( "n88_1.rom",        0xa000, 0x2000, CRC(c0bd2aa6) SHA1(8528eef7946edf6501a6ccb1f416b60c64efac7c) )
	1804	ROM_LOAD( "n88_2.rom",        0xc000, 0x2000, CRC(af2b6efa) SHA1(b7c8bcea219b77d9cc3ee0efafe343cc307425d1) )
	1805	ROM_LOAD( "n88_3.rom",        0xe000, 0x2000, CRC(7713c519) SHA1(efce0b51cab9f0da6cf68507757f1245a2867a72) )
	1806
1888	1807	ROM_REGION( 0x10000, "fdccpu", 0)
1889	1808	ROM_LOAD( "disk.rom", 0x0000, 0x0800, CRC(2158d307) SHA1(bb7103a0818850a039c67ff666a31ce49a8d516f) )
1890	1809
r10105	r10106
1901	1820	ROM_END
1902	1821
1903	1822	ROM_START( pc8801mk2fr )
1904		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1905		ROM_LOAD( "m2fr_n80.rom",   0x80000, 0x8000, CRC(27e1857d) SHA1(5b922ed9de07d2a729bdf1da7b57c50ddf08809a) )
1906		ROM_LOAD( "m2fr_n88.rom",   0x88000, 0x8000, CRC(b9daf1aa) SHA1(696a480232bcf8c827c7aeea8329db5c44420d2a) )
1907		ROM_LOAD( "m2fr_n88_0.rom", 0x90000, 0x2000, CRC(710a63ec) SHA1(d239c26ad7ac5efac6e947b0e9549b1534aa970d) )
1908		ROM_LOAD( "m2fr_n88_1.rom", 0x92000, 0x2000, CRC(e3e78a37) SHA1(85ecd287fe72b56e54c8b01ea7492ca4a69a7470) )
1909		ROM_LOAD( "m2fr_n88_2.rom", 0x94000, 0x2000, CRC(98c3a7b2) SHA1(fc4980762d3caa56964d0ae583424756f511d186) )
1910		ROM_LOAD( "m2fr_n88_3.rom", 0x96000, 0x2000, CRC(0ca08abd) SHA1(a5a42d0b7caa84c3bc6e337c9f37874d82f9c14b) )
	1823	PC8801_MEM_LOAD
1911	1824
	1825	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1826	ROM_LOAD( "m2fr_n80.rom",   0x0000, 0x8000, CRC(27e1857d) SHA1(5b922ed9de07d2a729bdf1da7b57c50ddf08809a) )
	1827
	1828	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1829	ROM_LOAD( "m2fr_n88.rom",   0x0000, 0x8000, CRC(b9daf1aa) SHA1(696a480232bcf8c827c7aeea8329db5c44420d2a) )
	1830	ROM_LOAD( "m2fr_n88_0.rom", 0x8000, 0x2000, CRC(710a63ec) SHA1(d239c26ad7ac5efac6e947b0e9549b1534aa970d) )
	1831	ROM_LOAD( "m2fr_n88_1.rom", 0xa000, 0x2000, CRC(e3e78a37) SHA1(85ecd287fe72b56e54c8b01ea7492ca4a69a7470) )
	1832	ROM_LOAD( "m2fr_n88_2.rom", 0xc000, 0x2000, CRC(98c3a7b2) SHA1(fc4980762d3caa56964d0ae583424756f511d186) )
	1833	ROM_LOAD( "m2fr_n88_3.rom", 0xe000, 0x2000, CRC(0ca08abd) SHA1(a5a42d0b7caa84c3bc6e337c9f37874d82f9c14b) )
	1834
1912	1835	ROM_REGION( 0x10000, "fdccpu", 0)
1913	1836	ROM_LOAD( "m2fr_disk.rom", 0x0000, 0x0800, CRC(2163b304) SHA1(80da2dee49d4307f00895a129a5cfeff00cf5321) )
1914	1837
r10105	r10106
1921	1844	ROM_END
1922	1845
1923	1846	ROM_START( pc8801mk2mr )
1924		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1925		ROM_LOAD( "m2mr_n80.rom",   0x80000, 0x8000, CRC(f074b515) SHA1(ebe9cf4cf57f1602c887f609a728267f8d953dce) )
1926		ROM_LOAD( "m2mr_n88.rom",   0x88000, 0x8000, CRC(69caa38e) SHA1(3c64090237152ee77c76e04d6f36bad7297bea93) )
1927		ROM_LOAD( "m2mr_n88_0.rom", 0x90000, 0x2000, CRC(710a63ec) SHA1(d239c26ad7ac5efac6e947b0e9549b1534aa970d) )
1928		ROM_LOAD( "m2mr_n88_1.rom", 0x92000, 0x2000, CRC(e3e78a37) SHA1(85ecd287fe72b56e54c8b01ea7492ca4a69a7470) )
1929		ROM_LOAD( "m2mr_n88_2.rom", 0x94000, 0x2000, CRC(11176e0b) SHA1(f13f14f3d62df61498a23f7eb624e1a646caea45) )
1930		ROM_LOAD( "m2mr_n88_3.rom", 0x96000, 0x2000, CRC(0ca08abd) SHA1(a5a42d0b7caa84c3bc6e337c9f37874d82f9c14b) )
	1847	PC8801_MEM_LOAD
1931	1848
	1849	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1850	ROM_LOAD( "m2mr_n80.rom",   0x0000, 0x8000, CRC(f074b515) SHA1(ebe9cf4cf57f1602c887f609a728267f8d953dce) )
	1851
	1852	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1853	ROM_LOAD( "m2mr_n88.rom",   0x0000, 0x8000, CRC(69caa38e) SHA1(3c64090237152ee77c76e04d6f36bad7297bea93) )
	1854	ROM_LOAD( "m2mr_n88_0.rom", 0x8000, 0x2000, CRC(710a63ec) SHA1(d239c26ad7ac5efac6e947b0e9549b1534aa970d) )
	1855	ROM_LOAD( "m2mr_n88_1.rom", 0xa000, 0x2000, CRC(e3e78a37) SHA1(85ecd287fe72b56e54c8b01ea7492ca4a69a7470) )
	1856	ROM_LOAD( "m2mr_n88_2.rom", 0xc000, 0x2000, CRC(11176e0b) SHA1(f13f14f3d62df61498a23f7eb624e1a646caea45) )
	1857	ROM_LOAD( "m2mr_n88_3.rom", 0xe000, 0x2000, CRC(0ca08abd) SHA1(a5a42d0b7caa84c3bc6e337c9f37874d82f9c14b) )
	1858
1932	1859	ROM_REGION( 0x10000, "fdccpu", 0)
1933	1860	ROM_LOAD( "m2mr_disk.rom", 0x0000, 0x2000, CRC(2447516b) SHA1(1492116f15c426f9796dc2bb6fcccf2656c0ca75) )
1934	1861
r10105	r10106
1944	1871	ROM_END
1945	1872
1946	1873	ROM_START( pc8801mh )
1947		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1948		ROM_LOAD( "mh_n80.rom",   0x80000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
1949		ROM_LOAD( "mh_n88.rom",   0x88000, 0x8000, CRC(64c5d162) SHA1(3e0aac76fb5d7edc99df26fa9f365fd991742a5d) )
1950		ROM_LOAD( "mh_n88_0.rom", 0x90000, 0x2000, CRC(deb384fb) SHA1(5f38cafa8aab16338038c82267800446fd082e79) )
1951		ROM_LOAD( "mh_n88_1.rom", 0x92000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
1952		ROM_LOAD( "mh_n88_2.rom", 0x94000, 0x2000, CRC(6aa6b6d8) SHA1(2a077ab444a4fd1470cafb06fd3a0f45420c39cc) )
1953		ROM_LOAD( "mh_n88_3.rom", 0x96000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1874	PC8801_MEM_LOAD
1954	1875
	1876	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1877	ROM_LOAD( "mh_n80.rom",   0x0000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
	1878
	1879	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1880	ROM_LOAD( "mh_n88.rom",   0x0000, 0x8000, CRC(64c5d162) SHA1(3e0aac76fb5d7edc99df26fa9f365fd991742a5d) )
	1881	ROM_LOAD( "mh_n88_0.rom", 0x8000, 0x2000, CRC(deb384fb) SHA1(5f38cafa8aab16338038c82267800446fd082e79) )
	1882	ROM_LOAD( "mh_n88_1.rom", 0xa000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
	1883	ROM_LOAD( "mh_n88_2.rom", 0xc000, 0x2000, CRC(6aa6b6d8) SHA1(2a077ab444a4fd1470cafb06fd3a0f45420c39cc) )
	1884	ROM_LOAD( "mh_n88_3.rom", 0xe000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1885
1955	1886	ROM_REGION( 0x10000, "fdccpu", 0)
1956	1887	ROM_LOAD( "mh_disk.rom", 0x0000, 0x2000, CRC(a222ecf0) SHA1(79e9c0786a14142f7a83690bf41fb4f60c5c1004) )
1957	1888
r10105	r10106
1967	1898	ROM_END
1968	1899
1969	1900	ROM_START( pc8801fa )
1970		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1971		ROM_LOAD( "fa_n80.rom",   0x80000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
1972		ROM_LOAD( "fa_n88.rom",   0x88000, 0x8000, CRC(73573432) SHA1(9b1346d44044eeea921c4cce69b5dc49dbc0b7e9) )
1973		ROM_LOAD( "fa_n88_0.rom", 0x90000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
1974		ROM_LOAD( "fa_n88_1.rom", 0x92000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
1975		ROM_LOAD( "fa_n88_2.rom", 0x94000, 0x2000, CRC(6aee9a4e) SHA1(e94278682ef9e9bbb82201f72c50382748dcea2a) )
1976		ROM_LOAD( "fa_n88_3.rom", 0x96000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1901	PC8801_MEM_LOAD
1977	1902
	1903	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1904	ROM_LOAD( "fa_n80.rom",   0x0000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
	1905
	1906	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1907	ROM_LOAD( "fa_n88.rom",   0x0000, 0x8000, CRC(73573432) SHA1(9b1346d44044eeea921c4cce69b5dc49dbc0b7e9) )
	1908	ROM_LOAD( "fa_n88_0.rom", 0x8000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
	1909	ROM_LOAD( "fa_n88_1.rom", 0xa000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
	1910	ROM_LOAD( "fa_n88_2.rom", 0xc000, 0x2000, CRC(6aee9a4e) SHA1(e94278682ef9e9bbb82201f72c50382748dcea2a) )
	1911	ROM_LOAD( "fa_n88_3.rom", 0xe000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1912
1978	1913	ROM_REGION( 0x10000, "fdccpu", 0)
1979	1914	ROM_LOAD( "fa_disk.rom", 0x0000, 0x0800, CRC(2163b304) SHA1(80da2dee49d4307f00895a129a5cfeff00cf5321) )
1980	1915
r10105	r10106
1990	1925	ROM_END
1991	1926
1992	1927	ROM_START( pc8801ma )
1993		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
1994		ROM_LOAD( "ma_n80.rom",   0x80000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
1995		ROM_LOAD( "ma_n88.rom",   0x88000, 0x8000, CRC(73573432) SHA1(9b1346d44044eeea921c4cce69b5dc49dbc0b7e9) )
1996		ROM_LOAD( "ma_n88_0.rom", 0x90000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
1997		ROM_LOAD( "ma_n88_1.rom", 0x92000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
1998		ROM_LOAD( "ma_n88_2.rom", 0x94000, 0x2000, CRC(6aee9a4e) SHA1(e94278682ef9e9bbb82201f72c50382748dcea2a) )
1999		ROM_LOAD( "ma_n88_3.rom", 0x96000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1928	PC8801_MEM_LOAD
2000	1929
	1930	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1931	ROM_LOAD( "ma_n80.rom",   0x0000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
	1932
	1933	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1934	ROM_LOAD( "ma_n88.rom",   0x0000, 0x8000, CRC(73573432) SHA1(9b1346d44044eeea921c4cce69b5dc49dbc0b7e9) )
	1935	ROM_LOAD( "ma_n88_0.rom", 0x8000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
	1936	ROM_LOAD( "ma_n88_1.rom", 0xa000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
	1937	ROM_LOAD( "ma_n88_2.rom", 0xc000, 0x2000, CRC(6aee9a4e) SHA1(e94278682ef9e9bbb82201f72c50382748dcea2a) )
	1938	ROM_LOAD( "ma_n88_3.rom", 0xe000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1939
2001	1940	ROM_REGION( 0x10000, "fdccpu", 0)
2002	1941	ROM_LOAD( "ma_disk.rom", 0x0000, 0x2000, CRC(a222ecf0) SHA1(79e9c0786a14142f7a83690bf41fb4f60c5c1004) )
2003	1942
r10105	r10106
2017	1956	ROM_END
2018	1957
2019	1958	ROM_START( pc8801ma2 )
2020		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
2021		ROM_LOAD( "ma2_n80.rom",   0x80000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
2022		ROM_LOAD( "ma2_n88.rom",   0x88000, 0x8000, CRC(ae1a6ebc) SHA1(e53d628638f663099234e07837ffb1b0f86d480d) )
2023		ROM_LOAD( "ma2_n88_0.rom", 0x90000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
2024		ROM_LOAD( "ma2_n88_1.rom", 0x92000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
2025		ROM_LOAD( "ma2_n88_2.rom", 0x94000, 0x2000, CRC(1d6277b6) SHA1(dd9c3e50169b75bb707ef648f20d352e6a8bcfe4) )
2026		ROM_LOAD( "ma2_n88_3.rom", 0x96000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1959	PC8801_MEM_LOAD
2027	1960
	1961	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1962	ROM_LOAD( "ma2_n80.rom",   0x0000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
	1963
	1964	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1965	ROM_LOAD( "ma2_n88.rom",   0x0000, 0x8000, CRC(ae1a6ebc) SHA1(e53d628638f663099234e07837ffb1b0f86d480d) )
	1966	ROM_LOAD( "ma2_n88_0.rom", 0x8000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
	1967	ROM_LOAD( "ma2_n88_1.rom", 0xa000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
	1968	ROM_LOAD( "ma2_n88_2.rom", 0xc000, 0x2000, CRC(1d6277b6) SHA1(dd9c3e50169b75bb707ef648f20d352e6a8bcfe4) )
	1969	ROM_LOAD( "ma2_n88_3.rom", 0xe000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1970
2028	1971	ROM_REGION( 0x10000, "fdccpu", 0)
2029	1972	ROM_LOAD( "ma2_disk.rom", 0x0000, 0x2000, CRC(a222ecf0) SHA1(79e9c0786a14142f7a83690bf41fb4f60c5c1004) )
2030	1973
r10105	r10106
2044	1987	ROM_END
2045	1988
2046	1989	ROM_START( pc8801mc )
2047		ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF )
2048		ROM_LOAD( "mc_n80.rom",   0x80000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
2049		ROM_LOAD( "mc_n88.rom",   0x88000, 0x8000, CRC(356d5719) SHA1(5d9ba80d593a5119f52aae1ccd61a1457b4a89a1) )
2050		ROM_LOAD( "mc_n88_0.rom", 0x90000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
2051		ROM_LOAD( "mc_n88_1.rom", 0x92000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
2052		ROM_LOAD( "mc_n88_2.rom", 0x94000, 0x2000, CRC(1d6277b6) SHA1(dd9c3e50169b75bb707ef648f20d352e6a8bcfe4) )
2053		ROM_LOAD( "mc_n88_3.rom", 0x96000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	1990	PC8801_MEM_LOAD
2054	1991
	1992	ROM_REGION( 0x8000, "n80rom", ROMREGION_ERASEFF )
	1993	ROM_LOAD( "mc_n80.rom",   0x0000, 0x8000, CRC(8a2a1e17) SHA1(06dae1db384aa29d81c5b6ed587877e7128fcb35) )
	1994
	1995	ROM_REGION( 0x10000, "n88rom", ROMREGION_ERASEFF )
	1996	ROM_LOAD( "mc_n88.rom",   0x0000, 0x8000, CRC(356d5719) SHA1(5d9ba80d593a5119f52aae1ccd61a1457b4a89a1) )
	1997	ROM_LOAD( "mc_n88_0.rom", 0x8000, 0x2000, CRC(a72697d7) SHA1(5aedbc5916d67ef28767a2b942864765eea81bb8) )
	1998	ROM_LOAD( "mc_n88_1.rom", 0xa000, 0x2000, CRC(7ad5d943) SHA1(4ae4d37409ff99411a623da9f6a44192170a854e) )
	1999	ROM_LOAD( "mc_n88_2.rom", 0xc000, 0x2000, CRC(1d6277b6) SHA1(dd9c3e50169b75bb707ef648f20d352e6a8bcfe4) )
	2000	ROM_LOAD( "mc_n88_3.rom", 0xe000, 0x2000, CRC(692cbcd8) SHA1(af452aed79b072c4d17985830b7c5dca64d4b412) )
	2001
2055	2002	ROM_REGION( 0x10000, "fdccpu", 0)
2056	2003	ROM_LOAD( "mc_disk.rom", 0x0000, 0x2000, CRC(a222ecf0) SHA1(79e9c0786a14142f7a83690bf41fb4f60c5c1004) )
2057	2004

Previous

15994 Revisions

Next

---

© 1998-2018 The MESS Team