src/mess/drivers/super80.c
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| 1 | | /* Super80.c written by Robbbert, 2005-2009. See the MESS wiki for documentation. */ |
| 1 | /* |
| 2 | Super80.c written by Robbbert, 2005-2009. See the MESS sysinfo and wiki for usage documentation. Below for the most technical bits: |
| 2 | 3 | |
| 4 | = Architecture (super80): |
| 5 | |
| 6 | * Z80 @ 2MHz |
| 7 | * 16k, 32k or 48k RAM (0000-BFFF) |
| 8 | * 12k ROM (C000-EFFF) |
| 9 | * 3.5k RAM (F000-FDFF), comes with the "64k ram" modification |
| 10 | * 0.5k RAM (FE00-FFFF) for Chipspeed colour board |
| 11 | |
| 12 | = Architecture (super80v): |
| 13 | |
| 14 | * Z80 @ 2MHz |
| 15 | * 16k, 32k or 48k RAM (0000-BFFF) |
| 16 | * 12k ROM (C000-EFFF) |
| 17 | * 2k Video RAM (F000-F7FF) banked with Colour RAM (modified Chipspeed board) |
| 18 | * 2k PCG RAM (F800-FFFF) banked with Character Generator ROM |
| 19 | |
| 20 | = Super80 ports: |
| 21 | |
| 22 | port $F0: General Purpose output port |
| 23 | Bit 0 - cassette output |
| 24 | Bit 1 - cassette relay control; 0=relay on |
| 25 | Bit 2 - turns screen on and off;0=screen off |
| 26 | Bit 3 - Available for user projects [We will use it for sound] |
| 27 | Bit 4 - Available for user projects |
| 28 | Bit 5 - cassette LED; 0=LED on |
| 29 | Bit 6/7 - not decoded |
| 30 | |
| 31 | port $F1: Video page output port |
| 32 | Bit 0 - not decoded [we will use it for video switching] |
| 33 | Bits 1 to 7 - choose video page to display |
| 34 | Bit 1 controls A9, bit 2 does A10, etc |
| 35 | |
| 36 | port $F2: General purpose input port |
| 37 | Bit 0 - cassette input |
| 38 | Bit 1 - Available for user projects |
| 39 | Bit 2 - Available for user projects |
| 40 | Bit 3 - not decoded |
| 41 | Bit 4 - Switch A [These switches are actual DIP switches on the motherboard] |
| 42 | Bit 5 - Switch B |
| 43 | Bit 6 - Switch C |
| 44 | Bit 7 - Switch D |
| 45 | |
| 46 | = Super80v ports: |
| 47 | |
| 48 | port $10: MC6845 control port |
| 49 | |
| 50 | port $11: MC6845 data port |
| 51 | |
| 52 | port $F0: General Purpose output port |
| 53 | Bit 0 - cassette output |
| 54 | Bit 1 - Cassette relay control; 0=relay on |
| 55 | Bit 2 - Colour banking (0 = Colour Ram, 1 = Video Ram) |
| 56 | Bit 3 - Sound |
| 57 | Bit 4 - PCG banking (0 = PROM, 1 = PCG) |
| 58 | Bit 5 - cassette LED; 0=LED on |
| 59 | Bit 6/7 - not decoded |
| 60 | |
| 61 | port $F2: General purpose input port - same as for Super80. |
| 62 | |
| 63 | = Cassette information: |
| 64 | |
| 65 | The standard cassette system uses sequences of 1200 Hz and 2400 Hz to represent a 0 or a 1 respectivly. |
| 66 | This is identical to the Exidy Sorcerer and the Microbee. Data rates available are 300, 400, 600, and 1200 baud. |
| 67 | The user has to adjust some bytes in memory in order to select a different baud rate. |
| 68 | |
| 69 | BDF8 BDF9 Baud |
| 70 | --------------------- |
| 71 | F8 4 300 |
| 72 | BA 3 400 |
| 73 | 7C 2 600 |
| 74 | 3E 1 1200 |
| 75 | |
| 76 | The enhanced Monitor roms (those not supplied by Dick Smith) have extra commands to change the rates |
| 77 | without the tedium of manually modifying memory. |
| 78 | |
| 79 | When saving, the OS toggles the cassette bit (bit 0 of port F0) at the required frequencies directly. |
| 80 | |
| 81 | When loading, the signal passes through a filter, then into a 4046 PLL (Phase-Locked-Loop) chip. |
| 82 | This acts as a frequency-to-voltage converter. The output of this device is passed to the "+" input |
| 83 | of a LM311 op-amp. The "-" input is connected to a 10-turn trimpot, which is adjusted by the owner |
| 84 | at construction time. It sets the switching midpoint voltage. Voltages above a certain level become |
| 85 | a "1" level at the output, while voltages below become a "0" level. This output in turn connects |
| 86 | to the cassette input bit of port F2. |
| 87 | |
| 88 | The monitor loading routine (at C066 in most monitor roms), waits for a high-to-low transition |
| 89 | (the low is the beginning of the start bit), then waits for half a bit, checks it is still low, |
| 90 | waits for a full bit, then reads the state (this is the first bit), then cycles between waiting |
| 91 | a bit and reading the next, until a full byte has been constructed. Lastly, the stop bit is |
| 92 | checked that it is at a high level. |
| 93 | |
| 94 | This means that we cannot attempt to convert frequency to voltage ourselves, since the OS only |
| 95 | "looks" once a bit. The solution is to use a mame timer running at a high enough rate (200 kHz) |
| 96 | to read the wave state. While the wave state stays constant, a counter is incremented. When the |
| 97 | state changes, the output is set according to how far the counter has progressed. The counter is |
| 98 | then reset ready for the next wave state. The code for this is in the TIMER_CALLBACK. |
| 99 | |
| 100 | A kit was produced by ETI magazine, which plugged into the line from your cassette player earphone |
| 101 | socket. The computer line was plugged into this box instead of the cassette player. The box was |
| 102 | fitted with a speaker and a volume control. You could listen to the tones, to assist with head |
| 103 | alignment, and with debugging. In RMESS, a config switch has been provided so that you can turn |
| 104 | this sound on or off as needed. |
| 105 | |
| 106 | = About the 1 MHz / 2 MHz switching: |
| 107 | |
| 108 | The original hardware runs with a 2 MHz clock, but operates in an unusual way. There is no video |
| 109 | processor chip, just a huge bunch of TTL chips. The system spends half the time running the CPU, |
| 110 | and half the time displaying the picture. The timing will activate the BUSREQ line, and the CPU will |
| 111 | finish its current instruction, activate the BUSACK line, and go to sleep. The video circuits will |
| 112 | read the video RAM and show the picture. At the end, the BUSREQ line is released, and processing can |
| 113 | continue. |
| 114 | |
| 115 | The processing time occurs during the black parts of the screen, therefore half the screen will be |
| 116 | black unless you expand the image with the monitor's controls. This method ensures that there will |
| 117 | be no memory contention, and thus, no snow. The processor will run at 2 MHz pulsed at 48.8 Hz, which |
| 118 | is an effective speed of 1 MHz. |
| 119 | |
| 120 | When saving or loading a cassette file, this pulsing would cause the save tone to be modulated with |
| 121 | a loud hum. When loading, the synchronisation to the start bit could be missed, causing errors. |
| 122 | Therefore the screen can be turned off via an output bit. This disables the BUSREQ control, which |
| 123 | in turn prevents screen refresh, and gives the processor a full uninterrupted 2 MHz speed. |
| 124 | |
| 125 | MAME does not emulate BUSREQ or BUSACK. Further, a real system would display a blank screen by not |
| 126 | updating the video. In MAME, the display continues to show. It just doesn't update. |
| 127 | |
| 128 | To obtain accurate timing, the video update routine will toggle the HALT line on alternate frames. |
| 129 | Although physically incorrect, it is the only way to accurately emulate the speed change function. |
| 130 | The video update routine emulates the blank screen by filling it with spaces. |
| 131 | |
| 132 | For the benefit of those who like to experiment, config switches have been provided in RMESS to |
| 133 | allow you to leave the screen on at all times, and to always run at 2 MHz if desired. These options |
| 134 | cannot exist in real hardware. |
| 135 | |
| 136 | = Quickload: |
| 137 | |
| 138 | This was not a standard feature. It is a hardware facility I added to my machine when age threatened |
| 139 | to kill off my cassette player and tapes. The tapes were loaded up one last time, and transferred to |
| 140 | a hard drive on a surplus 386 PC, in binary format (NOT a wave file). Special roms were made to allow |
| 141 | loading and saving to the S-100 board and its ports. These ports were plugged into the 386 via cables. |
| 142 | A QBASIC program on the 386 monitored the ports and would save and load files when requested by the |
| 143 | Super-80. This worked (and still works) very well, and is a huge improvement over the cassette, both |
| 144 | speedwise and accuracy-wise. |
| 145 | |
| 146 | The modified rom had the autorun option built in. Autorun was never available for cassettes. |
| 147 | |
| 148 | In MESS, the same file format is used - I can transfer files between MESS and the 386 seamlessly. |
| 149 | MESS has one difference - the program simply appears in memory without the processor being aware |
| 150 | of it. To accomplish autorun therefore requires that the processor pc register be set to the start |
| 151 | address of the program. BASIC programs may need some preprocessing before they can be started. This |
| 152 | is not necessary on a Super-80 or a Microbee, but is needed on any system running Microsoft BASIC, |
| 153 | such as the Exidy Sorcerer or the VZ-200. |
| 154 | |
| 155 | In MESS, quickload is available for all Super80 variants (otherwise you would not have any games |
| 156 | to play). MESS features a config switch so the user can turn autorun on or off as desired. |
| 157 | |
| 158 | |
| 159 | = Start of Day circuit: |
| 160 | |
| 161 | When the computer is turned on or reset, the Z80 will want to start executing at 0000. Since this is |
| 162 | RAM, this is not a good idea. The SOD circuit forcibly disables the RAM and enables the ROMs, so they |
| 163 | will appear to be at 0000. Thus, the computer will boot. |
| 164 | |
| 165 | The Master Reset signal (power-on or Reset button pushed), triggers a flipflop that disables RAM and |
| 166 | causes C000 to FFFF to appear at 0000 to 3FFF. This will be reset (back to normal) when A14 and A15 |
| 167 | are high, and /M1 is active. This particular combination occurs on all ROM variants, when reading the |
| 168 | fifth byte in the ROM. In reality, the switchover can take place any time between the 4th byte until |
| 169 | the computer has booted up. This is because the low RAM does not contain any system areas. |
| 170 | |
| 171 | Since MAME does not emulate /M1, a banking scheme has had to be used. Bank 0 is normal RAM. Bank 1 |
| 172 | points to the ROMs. When a machine reset occurs, bank 1 is switched in. A timer is triggered, and |
| 173 | after 4 bytes are read, bank 0 is selected. The timer is as close as can be to real operation of the |
| 174 | hardware. |
| 175 | |
| 176 | */ |
| 177 | |
| 3 | 178 | #include "emu.h" |
| 4 | 179 | #include "cpu/z80/z80.h" |
| 5 | 180 | #include "cpu/z80/z80daisy.h" |