src/emu/video/pc_cga.c
| r15694 | r15695 | |
| 1137 | 1137 | static WRITE8_HANDLER ( char_ram_w ) |
| 1138 | 1138 | { |
| 1139 | 1139 | UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base(); |
| 1140 | offset ^= BIT(offset, 12); |
| 1140 | 1141 | logerror("write char ram %04x %02x\n",offset,data); |
| 1141 | 1142 | gfx[offset + 0x0000] = data; |
| 1142 | 1143 | gfx[offset + 0x0800] = data; |
| r15694 | r15695 | |
| 1147 | 1148 | static READ8_HANDLER ( char_ram_r ) |
| 1148 | 1149 | { |
| 1149 | 1150 | UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base(); |
| 1151 | offset ^= BIT(offset, 12); |
| 1150 | 1152 | return gfx[offset]; |
| 1151 | 1153 | } |
| 1152 | 1154 | |
| r15694 | r15695 | |
| 1226 | 1228 | fatalerror("CGA: Bus width %d not supported", buswidth); |
| 1227 | 1229 | break; |
| 1228 | 1230 | } |
| 1229 | | space_prg->install_legacy_readwrite_handler(0xb8000, 0xb87ff, FUNC(char_ram_r),FUNC(char_ram_w), mask ); |
| 1230 | | space_prg->install_legacy_readwrite_handler(0xb9000, 0xb97ff, FUNC(char_ram_r),FUNC(char_ram_w), mask ); |
| 1231 | space_prg->install_legacy_readwrite_handler(0xb8000, 0xb9fff, FUNC(char_ram_r),FUNC(char_ram_w), mask ); |
| 1231 | 1232 | } else { |
| 1232 | 1233 | if (cga.videoram_size== 0x4000) { |
| 1233 | 1234 | space_prg->install_readwrite_bank(0xb8000, 0xbbfff, 0, 0x04000, "bank11" ); |
src/mess/machine/pc.c
| r15694 | r15695 | |
| 1247 | 1247 | |
| 1248 | 1248 | // SIDE ONE |
| 1249 | 1249 | wd17xx_set_side(device, BIT(data, 1)); |
| 1250 | |
| 1251 | // bits 2, 3 -- motor on (drive 0, 1) |
| 1252 | |
| 1253 | // DRIVE SEL |
| 1254 | wd17xx_set_drive(device, BIT(data, 4)); |
| 1250 | 1255 | } |
| 1251 | 1256 | |
| 1257 | /* |
| 1258 | * Accesses to this port block (halt the CPU until DRQ, INTRQ or MOTOR ON) |
| 1259 | */ |
| 1252 | 1260 | READ8_DEVICE_HANDLER( mc1502_wd17xx_drq_r ) |
| 1253 | 1261 | { |
| 1254 | 1262 | UINT8 data; |
| 1263 | UINT64 newpc; |
| 1255 | 1264 | |
| 1256 | 1265 | data = wd17xx_drq_r(device); |
| 1266 | if (!data && !wd17xx_intrq_r(device)) { |
| 1267 | /* fake cpu halt by resetting PC one insn back */ |
| 1268 | newpc = cpu_get_reg( device->machine().firstcpu, STATE_GENPC ); |
| 1269 | cpu_set_reg( device->machine().firstcpu, STATE_GENPC, newpc - 1 ); |
| 1270 | } |
| 1257 | 1271 | |
| 1258 | 1272 | return data; |
| 1259 | 1273 | } |
| 1260 | 1274 | |
| 1275 | READ8_DEVICE_HANDLER( mc1502_wd17xx_motor_r ) |
| 1276 | { |
| 1277 | UINT8 data; |
| 1278 | |
| 1279 | /* fake motor being always on */ |
| 1280 | data = 1; |
| 1281 | |
| 1282 | return data; |
| 1283 | } |
| 1284 | |
| 1285 | |
| 1261 | 1286 | /********************************************************** |
| 1262 | 1287 | * |
| 1263 | 1288 | * Initialization code |
| r15694 | r15695 | |
| 1428 | 1453 | st->m_u73_q2 = 0; |
| 1429 | 1454 | st->m_out1 = 0; |
| 1430 | 1455 | st->m_pc_spkrdata = 0; |
| 1431 | | st->m_pc_input = 0; |
| 1456 | st->m_pc_input = 1; |
| 1432 | 1457 | st->m_dma_channel = 0; |
| 1433 | 1458 | memset(st->m_dma_offset,0,sizeof(st->m_dma_offset)); |
| 1434 | 1459 | st->m_ppi_portc_switch_high = 0; |
| r15694 | r15695 | |
| 1490 | 1515 | st->m_u73_q2 = 0; |
| 1491 | 1516 | st->m_out1 = 0; |
| 1492 | 1517 | st->m_pc_spkrdata = 0; |
| 1493 | | st->m_pc_input = 0; |
| 1518 | st->m_pc_input = 1; |
| 1494 | 1519 | st->m_dma_channel = 0; |
| 1495 | 1520 | memset(st->m_memboard,0xc,sizeof(st->m_memboard)); // check |
| 1496 | 1521 | memset(st->m_dma_offset,0,sizeof(st->m_dma_offset)); |
src/mess/drivers/pc.c
| r15694 | r15695 | |
| 158 | 158 | AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE("ppi8255", i8255_device, read, write) |
| 159 | 159 | AM_RANGE(0x0068, 0x006B) AM_DEVREADWRITE("ppi8255n2", i8255_device, read, write) // keyboard poll |
| 160 | 160 | AM_RANGE(0x0100, 0x0100) AM_DEVREADWRITE_LEGACY("vg93", mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w) |
| 161 | | AM_RANGE(0x0108, 0x0108) AM_DEVREAD_LEGACY("vg93", mc1502_wd17xx_drq_r) |
| 161 | AM_RANGE(0x0108, 0x0108) AM_DEVREAD_LEGACY("vg93", mc1502_wd17xx_drq_r) // blocking read! |
| 162 | AM_RANGE(0x010a, 0x010a) AM_DEVREAD_LEGACY("vg93", mc1502_wd17xx_motor_r) |
| 162 | 163 | AM_RANGE(0x010c, 0x010c) AM_DEVREADWRITE_LEGACY("vg93", wd17xx_status_r, wd17xx_command_w) |
| 163 | 164 | AM_RANGE(0x010d, 0x010d) AM_DEVREADWRITE_LEGACY("vg93", wd17xx_track_r, wd17xx_track_w) |
| 164 | 165 | AM_RANGE(0x010e, 0x010e) AM_DEVREADWRITE_LEGACY("vg93", wd17xx_sector_r, wd17xx_sector_w) |